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authorLinus Torvalds <torvalds@linux-foundation.org>2019-03-14 12:11:54 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2019-03-14 12:11:54 -0400
commit31ef489a026ef2c07383ef336dc9b6601c7b9b93 (patch)
tree8affbd89d8df2473b5338e020d4ae34b32a62973 /include/linux/platform_data
parent2f194646fecaa9fd4607b670ee9ef84d9ed04566 (diff)
parentfeb59d77a46d5df93864471ca926b6701479091b (diff)
Merge tag 'dmaengine-5.1-rc1' of git://git.infradead.org/users/vkoul/slave-dma
Pull dmaengine updates from Vinod Koul: - dmatest updates for modularizing common struct and code - remove SG support for VDMA xilinx IP and updates to driver - Update to dw driver to support Intel iDMA controllers multi-block support - tegra updates for proper reporting of residue - Add Snow Ridge ioatdma device id and support for IOATDMA v3.4 - struct_size() usage and useless LIST_HEAD cleanups in subsystem. - qDMA controller driver for Layerscape SoCs - stm32-dma PM Runtime support - And usual updates to imx-sdma, sprd, Documentation, fsl-edma, bcm2835, qcom_hidma etc * tag 'dmaengine-5.1-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (81 commits) dmaengine: imx-sdma: fix consistent dma test failures dmaengine: imx-sdma: add a test for imx8mq multi sdma devices dmaengine: imx-sdma: add clock ratio 1:1 check dmaengine: dmatest: move test data alloc & free into functions dmaengine: dmatest: add short-hand `buf_size` var in dmatest_func() dmaengine: dmatest: wrap src & dst data into a struct dmaengine: ioatdma: support latency tolerance report (LTR) for v3.4 dmaengine: ioatdma: add descriptor pre-fetch support for v3.4 dmaengine: ioatdma: disable DCA enabling on IOATDMA v3.4 dmaengine: ioatdma: Add Snow Ridge ioatdma device id dmaengine: sprd: Change channel id to slave id for DMA cell specifier dt-bindings: dmaengine: sprd: Change channel id to slave id for DMA cell specifier dmaengine: mv_xor: Use correct device for DMA API Documentation :dmaengine: clarify DMA desc. pointer after submission Documentation: dmaengine: fix dmatest.rst warning dmaengine: k3dma: Add support for dma-channel-mask dmaengine: k3dma: Delete axi_config dmaengine: k3dma: Upgrade k3dma driver to support hisi_asp_dma hardware Documentation: bindings: dma: Add binding for dma-channel-mask Documentation: bindings: k3dma: Extend the k3dma driver binding to support hisi-asp ...
Diffstat (limited to 'include/linux/platform_data')
-rw-r--r--include/linux/platform_data/dma-dw.h12
-rw-r--r--include/linux/platform_data/dma-imx.h1
2 files changed, 2 insertions, 11 deletions
diff --git a/include/linux/platform_data/dma-dw.h b/include/linux/platform_data/dma-dw.h
index 1a1d58ebffbf..f3eaf9ec00a1 100644
--- a/include/linux/platform_data/dma-dw.h
+++ b/include/linux/platform_data/dma-dw.h
@@ -1,12 +1,9 @@
1/* SPDX-License-Identifier: GPL-2.0 */
1/* 2/*
2 * Driver for the Synopsys DesignWare DMA Controller 3 * Driver for the Synopsys DesignWare DMA Controller
3 * 4 *
4 * Copyright (C) 2007 Atmel Corporation 5 * Copyright (C) 2007 Atmel Corporation
5 * Copyright (C) 2010-2011 ST Microelectronics 6 * Copyright (C) 2010-2011 ST Microelectronics
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */ 7 */
11#ifndef _PLATFORM_DATA_DMA_DW_H 8#ifndef _PLATFORM_DATA_DMA_DW_H
12#define _PLATFORM_DATA_DMA_DW_H 9#define _PLATFORM_DATA_DMA_DW_H
@@ -38,10 +35,6 @@ struct dw_dma_slave {
38/** 35/**
39 * struct dw_dma_platform_data - Controller configuration parameters 36 * struct dw_dma_platform_data - Controller configuration parameters
40 * @nr_channels: Number of channels supported by hardware (max 8) 37 * @nr_channels: Number of channels supported by hardware (max 8)
41 * @is_private: The device channels should be marked as private and not for
42 * by the general purpose DMA channel allocator.
43 * @is_memcpy: The device channels do support memory-to-memory transfers.
44 * @is_idma32: The type of the DMA controller is iDMA32
45 * @chan_allocation_order: Allocate channels starting from 0 or 7 38 * @chan_allocation_order: Allocate channels starting from 0 or 7
46 * @chan_priority: Set channel priority increasing from 0 to 7 or 7 to 0. 39 * @chan_priority: Set channel priority increasing from 0 to 7 or 7 to 0.
47 * @block_size: Maximum block size supported by the controller 40 * @block_size: Maximum block size supported by the controller
@@ -53,9 +46,6 @@ struct dw_dma_slave {
53 */ 46 */
54struct dw_dma_platform_data { 47struct dw_dma_platform_data {
55 unsigned int nr_channels; 48 unsigned int nr_channels;
56 bool is_private;
57 bool is_memcpy;
58 bool is_idma32;
59#define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven */ 49#define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven */
60#define CHAN_ALLOCATION_DESCENDING 1 /* seven to zero */ 50#define CHAN_ALLOCATION_DESCENDING 1 /* seven to zero */
61 unsigned char chan_allocation_order; 51 unsigned char chan_allocation_order;
diff --git a/include/linux/platform_data/dma-imx.h b/include/linux/platform_data/dma-imx.h
index 7d964e787299..9daea8d42a10 100644
--- a/include/linux/platform_data/dma-imx.h
+++ b/include/linux/platform_data/dma-imx.h
@@ -55,6 +55,7 @@ struct imx_dma_data {
55 int dma_request2; /* secondary DMA request line */ 55 int dma_request2; /* secondary DMA request line */
56 enum sdma_peripheral_type peripheral_type; 56 enum sdma_peripheral_type peripheral_type;
57 int priority; 57 int priority;
58 struct device_node *of_node;
58}; 59};
59 60
60static inline int imx_dma_is_ipu(struct dma_chan *chan) 61static inline int imx_dma_is_ipu(struct dma_chan *chan)