diff options
| author | Peter Ujfalusi <peter.ujfalusi@ti.com> | 2015-10-14 07:42:53 -0400 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2015-10-14 10:27:11 -0400 |
| commit | 2b6b3b7420190888793c49e97276e1e73bd7eaed (patch) | |
| tree | b2226f638e1c7253389a80ebca7b02ed6737e58c /include/linux/platform_data | |
| parent | cef5b0da4019358cb03c9b0a964d4d63cd7deaf6 (diff) | |
ARM/dmaengine: edma: Merge the two drivers under drivers/dma/
Move the code out from arch/arm/common and merge it inside of the dmaengine
driver.
This change is done with as minimal (if eny) functional change to the code
as possible to avoid introducing regression.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'include/linux/platform_data')
| -rw-r--r-- | include/linux/platform_data/edma.h | 74 |
1 files changed, 0 insertions, 74 deletions
diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h index 466021c03169..6b9d500956e4 100644 --- a/include/linux/platform_data/edma.h +++ b/include/linux/platform_data/edma.h | |||
| @@ -41,37 +41,6 @@ | |||
| 41 | #ifndef EDMA_H_ | 41 | #ifndef EDMA_H_ |
| 42 | #define EDMA_H_ | 42 | #define EDMA_H_ |
| 43 | 43 | ||
| 44 | /* PaRAM slots are laid out like this */ | ||
| 45 | struct edmacc_param { | ||
| 46 | u32 opt; | ||
| 47 | u32 src; | ||
| 48 | u32 a_b_cnt; | ||
| 49 | u32 dst; | ||
| 50 | u32 src_dst_bidx; | ||
| 51 | u32 link_bcntrld; | ||
| 52 | u32 src_dst_cidx; | ||
| 53 | u32 ccnt; | ||
| 54 | } __packed; | ||
| 55 | |||
| 56 | /* fields in edmacc_param.opt */ | ||
| 57 | #define SAM BIT(0) | ||
| 58 | #define DAM BIT(1) | ||
| 59 | #define SYNCDIM BIT(2) | ||
| 60 | #define STATIC BIT(3) | ||
| 61 | #define EDMA_FWID (0x07 << 8) | ||
| 62 | #define TCCMODE BIT(11) | ||
| 63 | #define EDMA_TCC(t) ((t) << 12) | ||
| 64 | #define TCINTEN BIT(20) | ||
| 65 | #define ITCINTEN BIT(21) | ||
| 66 | #define TCCHEN BIT(22) | ||
| 67 | #define ITCCHEN BIT(23) | ||
| 68 | |||
| 69 | /*ch_status paramater of callback function possible values*/ | ||
| 70 | #define EDMA_DMA_COMPLETE 1 | ||
| 71 | #define EDMA_DMA_CC_ERROR 2 | ||
| 72 | #define EDMA_DMA_TC1_ERROR 3 | ||
| 73 | #define EDMA_DMA_TC2_ERROR 4 | ||
| 74 | |||
| 75 | enum dma_event_q { | 44 | enum dma_event_q { |
| 76 | EVENTQ_0 = 0, | 45 | EVENTQ_0 = 0, |
| 77 | EVENTQ_1 = 1, | 46 | EVENTQ_1 = 1, |
| @@ -84,49 +53,6 @@ enum dma_event_q { | |||
| 84 | #define EDMA_CTLR(i) ((i) >> 16) | 53 | #define EDMA_CTLR(i) ((i) >> 16) |
| 85 | #define EDMA_CHAN_SLOT(i) ((i) & 0xffff) | 54 | #define EDMA_CHAN_SLOT(i) ((i) & 0xffff) |
| 86 | 55 | ||
| 87 | #define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */ | ||
| 88 | #define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */ | ||
| 89 | #define EDMA_CONT_PARAMS_ANY 1001 | ||
| 90 | #define EDMA_CONT_PARAMS_FIXED_EXACT 1002 | ||
| 91 | #define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003 | ||
| 92 | |||
| 93 | #define EDMA_MAX_CC 2 | ||
| 94 | |||
| 95 | struct edma; | ||
| 96 | |||
| 97 | struct edma *edma_get_data(struct device *edma_dev); | ||
| 98 | |||
| 99 | /* alloc/free DMA channels and their dedicated parameter RAM slots */ | ||
| 100 | int edma_alloc_channel(struct edma *cc, int channel, | ||
| 101 | void (*callback)(unsigned channel, u16 ch_status, void *data), | ||
| 102 | void *data, enum dma_event_q); | ||
| 103 | void edma_free_channel(struct edma *cc, unsigned channel); | ||
| 104 | |||
| 105 | /* alloc/free parameter RAM slots */ | ||
| 106 | int edma_alloc_slot(struct edma *cc, int slot); | ||
| 107 | void edma_free_slot(struct edma *cc, unsigned slot); | ||
| 108 | |||
| 109 | /* calls that operate on part of a parameter RAM slot */ | ||
| 110 | dma_addr_t edma_get_position(struct edma *cc, unsigned slot, bool dst); | ||
| 111 | void edma_link(struct edma *cc, unsigned from, unsigned to); | ||
| 112 | |||
| 113 | /* calls that operate on an entire parameter RAM slot */ | ||
| 114 | void edma_write_slot(struct edma *cc, unsigned slot, | ||
| 115 | const struct edmacc_param *params); | ||
| 116 | void edma_read_slot(struct edma *cc, unsigned slot, | ||
| 117 | struct edmacc_param *params); | ||
| 118 | |||
| 119 | /* channel control operations */ | ||
| 120 | int edma_start(struct edma *cc, unsigned channel); | ||
| 121 | void edma_stop(struct edma *cc, unsigned channel); | ||
| 122 | void edma_clean_channel(struct edma *cc, unsigned channel); | ||
| 123 | void edma_pause(struct edma *cc, unsigned channel); | ||
| 124 | void edma_resume(struct edma *cc, unsigned channel); | ||
| 125 | int edma_trigger_channel(struct edma *cc, unsigned channel); | ||
| 126 | |||
| 127 | void edma_assign_channel_eventq(struct edma *cc, unsigned channel, | ||
| 128 | enum dma_event_q eventq_no); | ||
| 129 | |||
| 130 | struct edma_rsv_info { | 56 | struct edma_rsv_info { |
| 131 | 57 | ||
| 132 | const s16 (*rsv_chans)[2]; | 58 | const s16 (*rsv_chans)[2]; |
