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authorLinus Torvalds <torvalds@linux-foundation.org>2018-04-06 00:21:08 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2018-04-06 00:21:08 -0400
commit167569343fac74ec6825a3ab982f795b5880e63e (patch)
tree965adb59fbe10d9f45a7fb90cb1ec1bc18d4613c /include/linux/platform_data
parentb240b419db5d624ce7a5a397d6f62a1a686009ec (diff)
parentcd903711fd9dce808b5cc07e509135886d962b0c (diff)
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann: "This release brings up a new platform based on the old ARM9 core: the Nuvoton NPCM is used as a baseboard management controller, competing with the better known ASpeed AST2xx series. Another important change is the addition of ARMv7-A based chips in mach-stm32. The older parts in this platform are ARMv7-M based microcontrollers, now they are expanding to general-purpose workloads. The other changes are the usual defconfig updates to enable additional drivers, lesser bugfixes. The largest updates as often are the ongoing OMAP cleanups, but we also have a number of changes for the older PXA and davinci platforms this time. For the Renesas shmobile/r-car platform, some new infrastructure is needed to make the watchdog work correctly. Supporting Multiprocessing on Allwinner A80 required a significant amount of new code, but is not doing anything unexpected" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (179 commits) arm: npcm: modify configuration for the NPCM7xx BMC. MAINTAINERS: update entry for ARM/berlin ARM: omap2: fix am43xx build without L2X0 ARM: davinci: da8xx: simplify CFGCHIP regmap_config ARM: davinci: da8xx: fix oops in USB PHY driver due to stack allocated platform_data ARM: multi_v7_defconfig: add NXP FlexCAN IP support ARM: multi_v7_defconfig: enable thermal driver for i.MX devices ARM: multi_v7_defconfig: add RN5T618 PMIC family support ARM: multi_v7_defconfig: add NXP graphics drivers ARM: multi_v7_defconfig: add GPMI NAND controller support ARM: multi_v7_defconfig: add OCOTP driver for NXP SoCs ARM: multi_v7_defconfig: configure I2C driver built-in arm64: defconfig: add CONFIG_UNIPHIER_THERMAL and CONFIG_SNI_AVE ARM: imx: fix imx6sll-only build ARM: imx: select ARM_CPU_SUSPEND for CPU_IDLE as well ARM: mxs_defconfig: Re-sync defconfig ARM: imx_v4_v5_defconfig: Use the generic fsl-asoc-card driver ARM: imx_v4_v5_defconfig: Re-sync defconfig arm64: defconfig: enable stmmac ethernet to defconfig ARM: EXYNOS: Simplify code in coupled CPU idle hot path ...
Diffstat (limited to 'include/linux/platform_data')
-rw-r--r--include/linux/platform_data/asoc-ti-mcbsp.h12
-rw-r--r--include/linux/platform_data/dmtimer-omap.h38
-rw-r--r--include/linux/platform_data/gpio-omap.h5
-rw-r--r--include/linux/platform_data/mtd-nand-pxa3xx.h43
-rw-r--r--include/linux/platform_data/phy-da8xx-usb.h21
-rw-r--r--include/linux/platform_data/pm33xx.h42
-rw-r--r--include/linux/platform_data/spi-omap2-mcspi.h8
-rw-r--r--include/linux/platform_data/ti-sysc.h50
8 files changed, 163 insertions, 56 deletions
diff --git a/include/linux/platform_data/asoc-ti-mcbsp.h b/include/linux/platform_data/asoc-ti-mcbsp.h
index e684543254f3..e319d0a2ec82 100644
--- a/include/linux/platform_data/asoc-ti-mcbsp.h
+++ b/include/linux/platform_data/asoc-ti-mcbsp.h
@@ -25,10 +25,6 @@
25#include <linux/spinlock.h> 25#include <linux/spinlock.h>
26#include <linux/clk.h> 26#include <linux/clk.h>
27 27
28#define MCBSP_CONFIG_TYPE2 0x2
29#define MCBSP_CONFIG_TYPE3 0x3
30#define MCBSP_CONFIG_TYPE4 0x4
31
32/* Platform specific configuration */ 28/* Platform specific configuration */
33struct omap_mcbsp_ops { 29struct omap_mcbsp_ops {
34 void (*request)(unsigned int); 30 void (*request)(unsigned int);
@@ -47,14 +43,6 @@ struct omap_mcbsp_platform_data {
47 int (*force_ick_on)(struct clk *clk, bool force_on); 43 int (*force_ick_on)(struct clk *clk, bool force_on);
48}; 44};
49 45
50/**
51 * omap_mcbsp_dev_attr - OMAP McBSP device attributes for omap_hwmod
52 * @sidetone: name of the sidetone device
53 */
54struct omap_mcbsp_dev_attr {
55 const char *sidetone;
56};
57
58void omap3_mcbsp_init_pdata_callback(struct omap_mcbsp_platform_data *pdata); 46void omap3_mcbsp_init_pdata_callback(struct omap_mcbsp_platform_data *pdata);
59 47
60#endif 48#endif
diff --git a/include/linux/platform_data/dmtimer-omap.h b/include/linux/platform_data/dmtimer-omap.h
index a19b78d826e9..757a0f9e26f9 100644
--- a/include/linux/platform_data/dmtimer-omap.h
+++ b/include/linux/platform_data/dmtimer-omap.h
@@ -20,12 +20,50 @@
20#ifndef __PLATFORM_DATA_DMTIMER_OMAP_H__ 20#ifndef __PLATFORM_DATA_DMTIMER_OMAP_H__
21#define __PLATFORM_DATA_DMTIMER_OMAP_H__ 21#define __PLATFORM_DATA_DMTIMER_OMAP_H__
22 22
23struct omap_dm_timer_ops {
24 struct omap_dm_timer *(*request_by_node)(struct device_node *np);
25 struct omap_dm_timer *(*request_specific)(int timer_id);
26 struct omap_dm_timer *(*request)(void);
27
28 int (*free)(struct omap_dm_timer *timer);
29
30 void (*enable)(struct omap_dm_timer *timer);
31 void (*disable)(struct omap_dm_timer *timer);
32
33 int (*get_irq)(struct omap_dm_timer *timer);
34 int (*set_int_enable)(struct omap_dm_timer *timer,
35 unsigned int value);
36 int (*set_int_disable)(struct omap_dm_timer *timer, u32 mask);
37
38 struct clk *(*get_fclk)(struct omap_dm_timer *timer);
39
40 int (*start)(struct omap_dm_timer *timer);
41 int (*stop)(struct omap_dm_timer *timer);
42 int (*set_source)(struct omap_dm_timer *timer, int source);
43
44 int (*set_load)(struct omap_dm_timer *timer, int autoreload,
45 unsigned int value);
46 int (*set_match)(struct omap_dm_timer *timer, int enable,
47 unsigned int match);
48 int (*set_pwm)(struct omap_dm_timer *timer, int def_on,
49 int toggle, int trigger);
50 int (*set_prescaler)(struct omap_dm_timer *timer, int prescaler);
51
52 unsigned int (*read_counter)(struct omap_dm_timer *timer);
53 int (*write_counter)(struct omap_dm_timer *timer,
54 unsigned int value);
55 unsigned int (*read_status)(struct omap_dm_timer *timer);
56 int (*write_status)(struct omap_dm_timer *timer,
57 unsigned int value);
58};
59
23struct dmtimer_platform_data { 60struct dmtimer_platform_data {
24 /* set_timer_src - Only used for OMAP1 devices */ 61 /* set_timer_src - Only used for OMAP1 devices */
25 int (*set_timer_src)(struct platform_device *pdev, int source); 62 int (*set_timer_src)(struct platform_device *pdev, int source);
26 u32 timer_capability; 63 u32 timer_capability;
27 u32 timer_errata; 64 u32 timer_errata;
28 int (*get_context_loss_count)(struct device *); 65 int (*get_context_loss_count)(struct device *);
66 const struct omap_dm_timer_ops *timer_ops;
29}; 67};
30 68
31#endif /* __PLATFORM_DATA_DMTIMER_OMAP_H__ */ 69#endif /* __PLATFORM_DATA_DMTIMER_OMAP_H__ */
diff --git a/include/linux/platform_data/gpio-omap.h b/include/linux/platform_data/gpio-omap.h
index cb2618147c34..8612855691b2 100644
--- a/include/linux/platform_data/gpio-omap.h
+++ b/include/linux/platform_data/gpio-omap.h
@@ -157,11 +157,6 @@
157#define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr)) 157#define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr))
158#define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES) 158#define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES)
159 159
160struct omap_gpio_dev_attr {
161 int bank_width; /* GPIO bank width */
162 bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
163};
164
165struct omap_gpio_reg_offs { 160struct omap_gpio_reg_offs {
166 u16 revision; 161 u16 revision;
167 u16 direction; 162 u16 direction;
diff --git a/include/linux/platform_data/mtd-nand-pxa3xx.h b/include/linux/platform_data/mtd-nand-pxa3xx.h
index b42ad83cbc20..4fd0f592a2d2 100644
--- a/include/linux/platform_data/mtd-nand-pxa3xx.h
+++ b/include/linux/platform_data/mtd-nand-pxa3xx.h
@@ -6,41 +6,22 @@
6#include <linux/mtd/partitions.h> 6#include <linux/mtd/partitions.h>
7 7
8/* 8/*
9 * Current pxa3xx_nand controller has two chip select which 9 * Current pxa3xx_nand controller has two chip select which both be workable but
10 * both be workable. 10 * historically all platforms remaining on platform data used only one. Switch
11 * 11 * to device tree if you need more.
12 * Notice should be taken that:
13 * When you want to use this feature, you should not enable the
14 * keep configuration feature, for two chip select could be
15 * attached with different nand chip. The different page size
16 * and timing requirement make the keep configuration impossible.
17 */ 12 */
18
19/* The max num of chip select current support */
20#define NUM_CHIP_SELECT (2)
21struct pxa3xx_nand_platform_data { 13struct pxa3xx_nand_platform_data {
22 14 /* Keep OBM/bootloader NFC timing configuration */
23 /* the data flash bus is shared between the Static Memory 15 bool keep_config;
24 * Controller and the Data Flash Controller, the arbiter 16 /* Use a flash-based bad block table */
25 * controls the ownership of the bus 17 bool flash_bbt;
26 */ 18 /* Requested ECC strength and ECC step size */
27 int enable_arbiter;
28
29 /* allow platform code to keep OBM/bootloader defined NFC config */
30 int keep_config;
31
32 /* indicate how many chip selects will be used */
33 int num_cs;
34
35 /* use an flash-based bad block table */
36 bool flash_bbt;
37
38 /* requested ECC strength and ECC step size */
39 int ecc_strength, ecc_step_size; 19 int ecc_strength, ecc_step_size;
40 20 /* Partitions */
41 const struct mtd_partition *parts[NUM_CHIP_SELECT]; 21 const struct mtd_partition *parts;
42 unsigned int nr_parts[NUM_CHIP_SELECT]; 22 unsigned int nr_parts;
43}; 23};
44 24
45extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info); 25extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info);
26
46#endif /* __ASM_ARCH_PXA3XX_NAND_H */ 27#endif /* __ASM_ARCH_PXA3XX_NAND_H */
diff --git a/include/linux/platform_data/phy-da8xx-usb.h b/include/linux/platform_data/phy-da8xx-usb.h
new file mode 100644
index 000000000000..85c2b99381b2
--- /dev/null
+++ b/include/linux/platform_data/phy-da8xx-usb.h
@@ -0,0 +1,21 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * phy-da8xx-usb - TI DaVinci DA8xx USB PHY driver
4 *
5 * Copyright (C) 2018 David Lechner <david@lechnology.com>
6 */
7
8#ifndef __LINUX_PLATFORM_DATA_PHY_DA8XX_USB_H__
9#define __LINUX_PLATFORM_DATA_PHY_DA8XX_USB_H__
10
11#include <linux/regmap.h>
12
13/**
14 * da8xx_usb_phy_platform_data
15 * @cfgchip: CFGCHIP syscon regmap
16 */
17struct da8xx_usb_phy_platform_data {
18 struct regmap *cfgchip;
19};
20
21#endif /* __LINUX_PLATFORM_DATA_PHY_DA8XX_USB_H__ */
diff --git a/include/linux/platform_data/pm33xx.h b/include/linux/platform_data/pm33xx.h
new file mode 100644
index 000000000000..f9bed2a0af9d
--- /dev/null
+++ b/include/linux/platform_data/pm33xx.h
@@ -0,0 +1,42 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * TI pm33xx platform data
4 *
5 * Copyright (C) 2016-2018 Texas Instruments, Inc.
6 * Dave Gerlach <d-gerlach@ti.com>
7 */
8
9#ifndef _LINUX_PLATFORM_DATA_PM33XX_H
10#define _LINUX_PLATFORM_DATA_PM33XX_H
11
12#include <linux/kbuild.h>
13#include <linux/types.h>
14
15#ifndef __ASSEMBLER__
16struct am33xx_pm_sram_addr {
17 void (*do_wfi)(void);
18 unsigned long *do_wfi_sz;
19 unsigned long *resume_offset;
20 unsigned long *emif_sram_table;
21 unsigned long *ro_sram_data;
22};
23
24struct am33xx_pm_platform_data {
25 int (*init)(void);
26 int (*soc_suspend)(unsigned int state, int (*fn)(unsigned long));
27 struct am33xx_pm_sram_addr *(*get_sram_addrs)(void);
28};
29
30struct am33xx_pm_sram_data {
31 u32 wfi_flags;
32 u32 l2_aux_ctrl_val;
33 u32 l2_prefetch_ctrl_val;
34} __packed __aligned(8);
35
36struct am33xx_pm_ro_sram_data {
37 u32 amx3_pm_sram_data_virt;
38 u32 amx3_pm_sram_data_phys;
39} __packed __aligned(8);
40
41#endif /* __ASSEMBLER__ */
42#endif /* _LINUX_PLATFORM_DATA_PM33XX_H */
diff --git a/include/linux/platform_data/spi-omap2-mcspi.h b/include/linux/platform_data/spi-omap2-mcspi.h
index 13c83a25958a..0bf9fddb8306 100644
--- a/include/linux/platform_data/spi-omap2-mcspi.h
+++ b/include/linux/platform_data/spi-omap2-mcspi.h
@@ -2,10 +2,6 @@
2#ifndef _OMAP2_MCSPI_H 2#ifndef _OMAP2_MCSPI_H
3#define _OMAP2_MCSPI_H 3#define _OMAP2_MCSPI_H
4 4
5#define OMAP2_MCSPI_REV 0
6#define OMAP3_MCSPI_REV 1
7#define OMAP4_MCSPI_REV 2
8
9#define OMAP4_MCSPI_REG_OFFSET 0x100 5#define OMAP4_MCSPI_REG_OFFSET 0x100
10 6
11#define MCSPI_PINDIR_D0_IN_D1_OUT 0 7#define MCSPI_PINDIR_D0_IN_D1_OUT 0
@@ -17,10 +13,6 @@ struct omap2_mcspi_platform_config {
17 unsigned int pin_dir:1; 13 unsigned int pin_dir:1;
18}; 14};
19 15
20struct omap2_mcspi_dev_attr {
21 unsigned short num_chipselect;
22};
23
24struct omap2_mcspi_device_config { 16struct omap2_mcspi_device_config {
25 unsigned turbo_mode:1; 17 unsigned turbo_mode:1;
26 18
diff --git a/include/linux/platform_data/ti-sysc.h b/include/linux/platform_data/ti-sysc.h
index 1be356330b96..80ce28d40832 100644
--- a/include/linux/platform_data/ti-sysc.h
+++ b/include/linux/platform_data/ti-sysc.h
@@ -16,6 +16,10 @@ enum ti_sysc_module_type {
16 TI_SYSC_OMAP4_USB_HOST_FS, 16 TI_SYSC_OMAP4_USB_HOST_FS,
17}; 17};
18 18
19struct ti_sysc_cookie {
20 void *data;
21};
22
19/** 23/**
20 * struct sysc_regbits - TI OCP_SYSCONFIG register field offsets 24 * struct sysc_regbits - TI OCP_SYSCONFIG register field offsets
21 * @midle_shift: Offset of the midle bit 25 * @midle_shift: Offset of the midle bit
@@ -41,6 +45,7 @@ struct sysc_regbits {
41 s8 emufree_shift; 45 s8 emufree_shift;
42}; 46};
43 47
48#define SYSC_QUIRK_LEGACY_IDLE BIT(8)
44#define SYSC_QUIRK_RESET_STATUS BIT(7) 49#define SYSC_QUIRK_RESET_STATUS BIT(7)
45#define SYSC_QUIRK_NO_IDLE_ON_INIT BIT(6) 50#define SYSC_QUIRK_NO_IDLE_ON_INIT BIT(6)
46#define SYSC_QUIRK_NO_RESET_ON_INIT BIT(5) 51#define SYSC_QUIRK_NO_RESET_ON_INIT BIT(5)
@@ -83,4 +88,49 @@ struct sysc_config {
83 u32 quirks; 88 u32 quirks;
84}; 89};
85 90
91enum sysc_registers {
92 SYSC_REVISION,
93 SYSC_SYSCONFIG,
94 SYSC_SYSSTATUS,
95 SYSC_MAX_REGS,
96};
97
98/**
99 * struct ti_sysc_module_data - ti-sysc to hwmod translation data for a module
100 * @name: legacy "ti,hwmods" module name
101 * @module_pa: physical address of the interconnect target module
102 * @module_size: size of the interconnect target module
103 * @offsets: array of register offsets as listed in enum sysc_registers
104 * @nr_offsets: number of registers
105 * @cap: interconnect target module capabilities
106 * @cfg: interconnect target module configuration
107 *
108 * This data is enough to allocate a new struct omap_hwmod_class_sysconfig
109 * based on device tree data parsed by ti-sysc driver.
110 */
111struct ti_sysc_module_data {
112 const char *name;
113 u64 module_pa;
114 u32 module_size;
115 int *offsets;
116 int nr_offsets;
117 const struct sysc_capabilities *cap;
118 struct sysc_config *cfg;
119};
120
121struct device;
122
123struct ti_sysc_platform_data {
124 struct of_dev_auxdata *auxdata;
125 int (*init_module)(struct device *dev,
126 const struct ti_sysc_module_data *data,
127 struct ti_sysc_cookie *cookie);
128 int (*enable_module)(struct device *dev,
129 const struct ti_sysc_cookie *cookie);
130 int (*idle_module)(struct device *dev,
131 const struct ti_sysc_cookie *cookie);
132 int (*shutdown_module)(struct device *dev,
133 const struct ti_sysc_cookie *cookie);
134};
135
86#endif /* __TI_SYSC_DATA_H__ */ 136#endif /* __TI_SYSC_DATA_H__ */