aboutsummaryrefslogtreecommitdiffstats
path: root/include/linux/pci.h
diff options
context:
space:
mode:
authorBjorn Helgaas <bhelgaas@google.com>2016-10-03 10:42:57 -0400
committerBjorn Helgaas <bhelgaas@google.com>2016-10-03 10:42:57 -0400
commit4dc2db096a9f7c0316bafc18ee00d89e0acf4ebf (patch)
tree99563a111f0f5c0b2d8e90acfe840c7db1d0c603 /include/linux/pci.h
parent9e18ad98ca71ca0cfcadf633547409829773f36a (diff)
parent6b20f728549030056402d7f68ea670eea1eb8198 (diff)
Merge branch 'pci/aer' into next
* pci/aer: PCI/AER: Fix aer_probe() kernel-doc comment PCI/AER: Cache capability position PCI/AER: Avoid memory allocation in interrupt handling path ACPI / APEI: Send correct severity to calculate AER severity PCI/AER: Remove duplicate AER severity translation PCI/AER: Remove aerdriver.forceload kernel parameter PCI/AER: Remove aerdriver.nosourceid kernel parameter x86/PCI: VMD: Add quirk for AER to ignore source ID PCI/AER: Add bus flag to skip source ID matching Conflicts: drivers/pci/probe.c
Diffstat (limited to 'include/linux/pci.h')
-rw-r--r--include/linux/pci.h10
1 files changed, 8 insertions, 2 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 7256f33b6a15..84d222ad3c08 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -187,8 +187,9 @@ enum pci_irq_reroute_variant {
187 187
188typedef unsigned short __bitwise pci_bus_flags_t; 188typedef unsigned short __bitwise pci_bus_flags_t;
189enum pci_bus_flags { 189enum pci_bus_flags {
190 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, 190 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
191 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2, 191 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
192 PCI_BUS_FLAGS_NO_AERSID = (__force pci_bus_flags_t) 4,
192}; 193};
193 194
194/* These values come from the PCI Express Spec */ 195/* These values come from the PCI Express Spec */
@@ -268,6 +269,9 @@ struct pci_dev {
268 unsigned int class; /* 3 bytes: (base,sub,prog-if) */ 269 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
269 u8 revision; /* PCI revision, low byte of class word */ 270 u8 revision; /* PCI revision, low byte of class word */
270 u8 hdr_type; /* PCI header type (`multi' flag masked out) */ 271 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
272#ifdef CONFIG_PCIEAER
273 u16 aer_cap; /* AER capability offset */
274#endif
271 u8 pcie_cap; /* PCIe capability offset */ 275 u8 pcie_cap; /* PCIe capability offset */
272 u8 msi_cap; /* MSI capability offset */ 276 u8 msi_cap; /* MSI capability offset */
273 u8 msix_cap; /* MSI-X capability offset */ 277 u8 msix_cap; /* MSI-X capability offset */
@@ -1374,9 +1378,11 @@ static inline bool pcie_aspm_support_enabled(void) { return false; }
1374#ifdef CONFIG_PCIEAER 1378#ifdef CONFIG_PCIEAER
1375void pci_no_aer(void); 1379void pci_no_aer(void);
1376bool pci_aer_available(void); 1380bool pci_aer_available(void);
1381int pci_aer_init(struct pci_dev *dev);
1377#else 1382#else
1378static inline void pci_no_aer(void) { } 1383static inline void pci_no_aer(void) { }
1379static inline bool pci_aer_available(void) { return false; } 1384static inline bool pci_aer_available(void) { return false; }
1385static inline int pci_aer_init(struct pci_dev *d) { return -ENODEV; }
1380#endif 1386#endif
1381 1387
1382#ifdef CONFIG_PCIE_ECRC 1388#ifdef CONFIG_PCIE_ECRC