Merge branch 'icrc-counter' into rdma.git for-next

For dependencies, branch based on 'mellanox/mlx5-next' of
git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux.git

Pull RoCE ICRC counters from Leon Romanovsky:

====================
This series exposes RoCE ICRC counter through existing RDMA hw_counters
sysfs interface.

The first patch has all HW definitions in mlx5_ifc.h file and second patch
is the actual counter implementation.
====================

* branch 'icrc-counter':
  IB/mlx5: Support RoCE ICRC encapsulated error counter
  net/mlx5: Add RoCE RX ICRC encapsulated counter

1 files changed, 8 insertions, 3 deletions

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 00b539303f5d..743d9b9efb33 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -1685,7 +1685,11 @@ struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
 
         u8         rx_buffer_full_low[0x20];
 
-        u8         reserved_at_1c0[0x600];
+        u8         rx_icrc_encapsulated_high[0x20];
+
+        u8         rx_icrc_encapsulated_low[0x20];
+
+        u8         reserved_at_200[0x5c0];
 };
 
 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
@@ -8048,8 +8052,9 @@ struct mlx5_ifc_peir_reg_bits {
 };
 
 struct mlx5_ifc_pcam_enhanced_features_bits {
-        u8         reserved_at_0[0x76];
-
+        u8         reserved_at_0[0x6d];
+        u8         rx_icrc_encapsulated_counter[0x1];
+        u8         reserved_at_6e[0x8];
         u8         pfcc_mask[0x1];
         u8         reserved_at_77[0x4];
         u8         rx_buffer_fullness_counters[0x1];