diff options
| author | Simon Horman <horms+renesas@verge.net.au> | 2017-06-16 12:11:03 -0400 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2017-06-20 04:30:50 -0400 |
| commit | f2218db81548544bf7349911546a94bfaabbd697 (patch) | |
| tree | 349d719c43ffb776b23bb87ae86e58f19a5a33e6 /include/linux/mfd | |
| parent | 6cf4156c0988fe9ee14f24144dcfcac35b177d85 (diff) | |
mmc: tmio: improve checkpatch cleanness
Trivial updates to improve checkpatch cleanness.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/tmio.h | 33 |
1 files changed, 16 insertions, 17 deletions
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h index c83c16b931a8..26e8f8c0a6db 100644 --- a/include/linux/mfd/tmio.h +++ b/include/linux/mfd/tmio.h | |||
| @@ -13,15 +13,15 @@ | |||
| 13 | #define tmio_ioread16(addr) readw(addr) | 13 | #define tmio_ioread16(addr) readw(addr) |
| 14 | #define tmio_ioread16_rep(r, b, l) readsw(r, b, l) | 14 | #define tmio_ioread16_rep(r, b, l) readsw(r, b, l) |
| 15 | #define tmio_ioread32(addr) \ | 15 | #define tmio_ioread32(addr) \ |
| 16 | (((u32) readw((addr))) | (((u32) readw((addr) + 2)) << 16)) | 16 | (((u32)readw((addr))) | (((u32)readw((addr) + 2)) << 16)) |
| 17 | 17 | ||
| 18 | #define tmio_iowrite8(val, addr) writeb((val), (addr)) | 18 | #define tmio_iowrite8(val, addr) writeb((val), (addr)) |
| 19 | #define tmio_iowrite16(val, addr) writew((val), (addr)) | 19 | #define tmio_iowrite16(val, addr) writew((val), (addr)) |
| 20 | #define tmio_iowrite16_rep(r, b, l) writesw(r, b, l) | 20 | #define tmio_iowrite16_rep(r, b, l) writesw(r, b, l) |
| 21 | #define tmio_iowrite32(val, addr) \ | 21 | #define tmio_iowrite32(val, addr) \ |
| 22 | do { \ | 22 | do { \ |
| 23 | writew((val), (addr)); \ | 23 | writew((val), (addr)); \ |
| 24 | writew((val) >> 16, (addr) + 2); \ | 24 | writew((val) >> 16, (addr) + 2); \ |
| 25 | } while (0) | 25 | } while (0) |
| 26 | 26 | ||
| 27 | #define CNF_CMD 0x04 | 27 | #define CNF_CMD 0x04 |
| @@ -55,57 +55,57 @@ | |||
| 55 | } while (0) | 55 | } while (0) |
| 56 | 56 | ||
| 57 | /* tmio MMC platform flags */ | 57 | /* tmio MMC platform flags */ |
| 58 | #define TMIO_MMC_WRPROTECT_DISABLE (1 << 0) | 58 | #define TMIO_MMC_WRPROTECT_DISABLE BIT(0) |
| 59 | /* | 59 | /* |
| 60 | * Some controllers can support a 2-byte block size when the bus width | 60 | * Some controllers can support a 2-byte block size when the bus width |
| 61 | * is configured in 4-bit mode. | 61 | * is configured in 4-bit mode. |
| 62 | */ | 62 | */ |
| 63 | #define TMIO_MMC_BLKSZ_2BYTES (1 << 1) | 63 | #define TMIO_MMC_BLKSZ_2BYTES BIT(1) |
| 64 | /* | 64 | /* |
| 65 | * Some controllers can support SDIO IRQ signalling. | 65 | * Some controllers can support SDIO IRQ signalling. |
| 66 | */ | 66 | */ |
| 67 | #define TMIO_MMC_SDIO_IRQ (1 << 2) | 67 | #define TMIO_MMC_SDIO_IRQ BIT(2) |
| 68 | 68 | ||
| 69 | /* Some features are only available or tested on R-Car Gen2 or later */ | 69 | /* Some features are only available or tested on R-Car Gen2 or later */ |
| 70 | #define TMIO_MMC_MIN_RCAR2 (1 << 3) | 70 | #define TMIO_MMC_MIN_RCAR2 BIT(3) |
| 71 | 71 | ||
| 72 | /* | 72 | /* |
| 73 | * Some controllers require waiting for the SD bus to become | 73 | * Some controllers require waiting for the SD bus to become |
| 74 | * idle before writing to some registers. | 74 | * idle before writing to some registers. |
| 75 | */ | 75 | */ |
| 76 | #define TMIO_MMC_HAS_IDLE_WAIT (1 << 4) | 76 | #define TMIO_MMC_HAS_IDLE_WAIT BIT(4) |
| 77 | /* | 77 | /* |
| 78 | * A GPIO is used for card hotplug detection. We need an extra flag for this, | 78 | * A GPIO is used for card hotplug detection. We need an extra flag for this, |
| 79 | * because 0 is a valid GPIO number too, and requiring users to specify | 79 | * because 0 is a valid GPIO number too, and requiring users to specify |
| 80 | * cd_gpio < 0 to disable GPIO hotplug would break backwards compatibility. | 80 | * cd_gpio < 0 to disable GPIO hotplug would break backwards compatibility. |
| 81 | */ | 81 | */ |
| 82 | #define TMIO_MMC_USE_GPIO_CD (1 << 5) | 82 | #define TMIO_MMC_USE_GPIO_CD BIT(5) |
| 83 | 83 | ||
| 84 | /* | 84 | /* |
| 85 | * Some controllers doesn't have over 0x100 register. | 85 | * Some controllers doesn't have over 0x100 register. |
| 86 | * it is used to checking accessibility of | 86 | * it is used to checking accessibility of |
| 87 | * CTL_SD_CARD_CLK_CTL / CTL_CLK_AND_WAIT_CTL | 87 | * CTL_SD_CARD_CLK_CTL / CTL_CLK_AND_WAIT_CTL |
| 88 | */ | 88 | */ |
| 89 | #define TMIO_MMC_HAVE_HIGH_REG (1 << 6) | 89 | #define TMIO_MMC_HAVE_HIGH_REG BIT(6) |
| 90 | 90 | ||
| 91 | /* | 91 | /* |
| 92 | * Some controllers have CMD12 automatically | 92 | * Some controllers have CMD12 automatically |
| 93 | * issue/non-issue register | 93 | * issue/non-issue register |
| 94 | */ | 94 | */ |
| 95 | #define TMIO_MMC_HAVE_CMD12_CTRL (1 << 7) | 95 | #define TMIO_MMC_HAVE_CMD12_CTRL BIT(7) |
| 96 | 96 | ||
| 97 | /* Controller has some SDIO status bits which must be 1 */ | 97 | /* Controller has some SDIO status bits which must be 1 */ |
| 98 | #define TMIO_MMC_SDIO_STATUS_SETBITS (1 << 8) | 98 | #define TMIO_MMC_SDIO_STATUS_SETBITS BIT(8) |
| 99 | 99 | ||
| 100 | /* | 100 | /* |
| 101 | * Some controllers have a 32-bit wide data port register | 101 | * Some controllers have a 32-bit wide data port register |
| 102 | */ | 102 | */ |
| 103 | #define TMIO_MMC_32BIT_DATA_PORT (1 << 9) | 103 | #define TMIO_MMC_32BIT_DATA_PORT BIT(9) |
| 104 | 104 | ||
| 105 | /* | 105 | /* |
| 106 | * Some controllers allows to set SDx actual clock | 106 | * Some controllers allows to set SDx actual clock |
| 107 | */ | 107 | */ |
| 108 | #define TMIO_MMC_CLK_ACTUAL (1 << 10) | 108 | #define TMIO_MMC_CLK_ACTUAL BIT(10) |
| 109 | 109 | ||
| 110 | int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base); | 110 | int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base); |
| 111 | int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base); | 111 | int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base); |
| @@ -146,9 +146,9 @@ struct tmio_nand_data { | |||
| 146 | 146 | ||
| 147 | struct tmio_fb_data { | 147 | struct tmio_fb_data { |
| 148 | int (*lcd_set_power)(struct platform_device *fb_dev, | 148 | int (*lcd_set_power)(struct platform_device *fb_dev, |
| 149 | bool on); | 149 | bool on); |
| 150 | int (*lcd_mode)(struct platform_device *fb_dev, | 150 | int (*lcd_mode)(struct platform_device *fb_dev, |
| 151 | const struct fb_videomode *mode); | 151 | const struct fb_videomode *mode); |
| 152 | int num_modes; | 152 | int num_modes; |
| 153 | struct fb_videomode *modes; | 153 | struct fb_videomode *modes; |
| 154 | 154 | ||
| @@ -157,5 +157,4 @@ struct tmio_fb_data { | |||
| 157 | int width; | 157 | int width; |
| 158 | }; | 158 | }; |
| 159 | 159 | ||
| 160 | |||
| 161 | #endif | 160 | #endif |
