mfd: axp20x: Add support for AXP806 PMIC

The X-Powers AXP806 is a new PMIC that is paired with Allwinner's A80
SoC, along with a master AXP809 PMIC.

This PMIC has a new register layout, and supports some functions not
seen in other X-Powers PMICs, such as master-slave mode, or having
multiple AXP806 PMICs on the same bus with address space extension,
or supporting both I2C and RSB mode. I2C has not been tested.

This patch adds support for the interrupts of the PMIC. A regulator
sub-device is enabled, but actual regulator support will come in a
later patch.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

1 files changed, 60 insertions, 0 deletions

diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
index 0be4982f08fe..fec597fb34cb 100644
--- a/include/linux/mfd/axp20x.h
+++ b/include/linux/mfd/axp20x.h
@@ -20,6 +20,7 @@ enum {
         AXP221_ID,
         AXP223_ID,
         AXP288_ID,
+        AXP806_ID,
         AXP809_ID,
         NR_AXP20X_VARIANTS,
 };
@@ -91,6 +92,30 @@ enum {
 #define AXP22X_ALDO3_V_OUT              0x2a
 #define AXP22X_CHRG_CTRL3               0x35
 
+#define AXP806_STARTUP_SRC              0x00
+#define AXP806_CHIP_ID                  0x03
+#define AXP806_PWR_OUT_CTRL1            0x10
+#define AXP806_PWR_OUT_CTRL2            0x11
+#define AXP806_DCDCA_V_CTRL             0x12
+#define AXP806_DCDCB_V_CTRL             0x13
+#define AXP806_DCDCC_V_CTRL             0x14
+#define AXP806_DCDCD_V_CTRL             0x15
+#define AXP806_DCDCE_V_CTRL             0x16
+#define AXP806_ALDO1_V_CTRL             0x17
+#define AXP806_ALDO2_V_CTRL             0x18
+#define AXP806_ALDO3_V_CTRL             0x19
+#define AXP806_DCDC_MODE_CTRL1          0x1a
+#define AXP806_DCDC_MODE_CTRL2          0x1b
+#define AXP806_DCDC_FREQ_CTRL           0x1c
+#define AXP806_BLDO1_V_CTRL             0x20
+#define AXP806_BLDO2_V_CTRL             0x21
+#define AXP806_BLDO3_V_CTRL             0x22
+#define AXP806_BLDO4_V_CTRL             0x23
+#define AXP806_CLDO1_V_CTRL             0x24
+#define AXP806_CLDO2_V_CTRL             0x25
+#define AXP806_CLDO3_V_CTRL             0x26
+#define AXP806_VREF_TEMP_WARN_L         0xf3
+
 /* Interrupt */
 #define AXP152_IRQ1_EN                  0x40
 #define AXP152_IRQ2_EN                  0x41
@@ -266,6 +291,26 @@ enum {
 };
 
 enum {
+        AXP806_DCDCA = 0,
+        AXP806_DCDCB,
+        AXP806_DCDCC,
+        AXP806_DCDCD,
+        AXP806_DCDCE,
+        AXP806_ALDO1,
+        AXP806_ALDO2,
+        AXP806_ALDO3,
+        AXP806_BLDO1,
+        AXP806_BLDO2,
+        AXP806_BLDO3,
+        AXP806_BLDO4,
+        AXP806_CLDO1,
+        AXP806_CLDO2,
+        AXP806_CLDO3,
+        AXP806_SW,
+        AXP806_REG_ID_MAX,
+};
+
+enum {
         AXP809_DCDC1 = 0,
         AXP809_DCDC2,
         AXP809_DCDC3,
@@ -414,6 +459,21 @@ enum axp288_irqs {
         AXP288_IRQ_BC_USB_CHNG,
 };
 
+enum axp806_irqs {
+        AXP806_IRQ_DIE_TEMP_HIGH_LV1,
+        AXP806_IRQ_DIE_TEMP_HIGH_LV2,
+        AXP806_IRQ_DCDCA_V_LOW,
+        AXP806_IRQ_DCDCB_V_LOW,
+        AXP806_IRQ_DCDCC_V_LOW,
+        AXP806_IRQ_DCDCD_V_LOW,
+        AXP806_IRQ_DCDCE_V_LOW,
+        AXP806_IRQ_PWROK_LONG,
+        AXP806_IRQ_PWROK_SHORT,
+        AXP806_IRQ_WAKEUP,
+        AXP806_IRQ_PWROK_FALL,
+        AXP806_IRQ_PWROK_RISE,
+};
+
 enum axp809_irqs {
         AXP809_IRQ_ACIN_OVER_V = 1,
         AXP809_IRQ_ACIN_PLUGIN,