diff options
| author | Chen-Yu Tsai <wens@csie.org> | 2016-07-08 10:33:37 -0400 |
|---|---|---|
| committer | Lee Jones <lee.jones@linaro.org> | 2016-08-08 07:53:26 -0400 |
| commit | 585083c539ca3f5fb3d00057b25f9be3304d54c6 (patch) | |
| tree | f7d02c455e6c87a9568efa41896925e9894b8d08 /include/linux/mfd | |
| parent | 44fb25d031065fc846c0f97e37456a792312a7d1 (diff) | |
mfd: ac100: Add driver for X-Powers AC100 audio codec / RTC combo IC
The AC100 is a multifunction device with an audio codec subsystem and
an RTC subsystem. These two subsystems share a common register space
and host interface.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/ac100.h | 178 |
1 files changed, 178 insertions, 0 deletions
diff --git a/include/linux/mfd/ac100.h b/include/linux/mfd/ac100.h new file mode 100644 index 000000000000..3c148f196b9f --- /dev/null +++ b/include/linux/mfd/ac100.h | |||
| @@ -0,0 +1,178 @@ | |||
| 1 | /* | ||
| 2 | * Functions and registers to access AC100 codec / RTC combo IC. | ||
| 3 | * | ||
| 4 | * Copyright (C) 2016 Chen-Yu Tsai | ||
| 5 | * | ||
| 6 | * Chen-Yu Tsai <wens@csie.org> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __LINUX_MFD_AC100_H | ||
| 14 | #define __LINUX_MFD_AC100_H | ||
| 15 | |||
| 16 | #include <linux/regmap.h> | ||
| 17 | |||
| 18 | struct ac100_dev { | ||
| 19 | struct device *dev; | ||
| 20 | struct regmap *regmap; | ||
| 21 | }; | ||
| 22 | |||
| 23 | /* Audio codec related registers */ | ||
| 24 | #define AC100_CHIP_AUDIO_RST 0x00 | ||
| 25 | #define AC100_PLL_CTRL1 0x01 | ||
| 26 | #define AC100_PLL_CTRL2 0x02 | ||
| 27 | #define AC100_SYSCLK_CTRL 0x03 | ||
| 28 | #define AC100_MOD_CLK_ENA 0x04 | ||
| 29 | #define AC100_MOD_RST_CTRL 0x05 | ||
| 30 | #define AC100_I2S_SR_CTRL 0x06 | ||
| 31 | |||
| 32 | /* I2S1 interface */ | ||
| 33 | #define AC100_I2S1_CLK_CTRL 0x10 | ||
| 34 | #define AC100_I2S1_SND_OUT_CTRL 0x11 | ||
| 35 | #define AC100_I2S1_SND_IN_CTRL 0x12 | ||
| 36 | #define AC100_I2S1_MXR_SRC 0x13 | ||
| 37 | #define AC100_I2S1_VOL_CTRL1 0x14 | ||
| 38 | #define AC100_I2S1_VOL_CTRL2 0x15 | ||
| 39 | #define AC100_I2S1_VOL_CTRL3 0x16 | ||
| 40 | #define AC100_I2S1_VOL_CTRL4 0x17 | ||
| 41 | #define AC100_I2S1_MXR_GAIN 0x18 | ||
| 42 | |||
| 43 | /* I2S2 interface */ | ||
| 44 | #define AC100_I2S2_CLK_CTRL 0x20 | ||
| 45 | #define AC100_I2S2_SND_OUT_CTRL 0x21 | ||
| 46 | #define AC100_I2S2_SND_IN_CTRL 0x22 | ||
| 47 | #define AC100_I2S2_MXR_SRC 0x23 | ||
| 48 | #define AC100_I2S2_VOL_CTRL1 0x24 | ||
| 49 | #define AC100_I2S2_VOL_CTRL2 0x25 | ||
| 50 | #define AC100_I2S2_VOL_CTRL3 0x26 | ||
| 51 | #define AC100_I2S2_VOL_CTRL4 0x27 | ||
| 52 | #define AC100_I2S2_MXR_GAIN 0x28 | ||
| 53 | |||
| 54 | /* I2S3 interface */ | ||
| 55 | #define AC100_I2S3_CLK_CTRL 0x30 | ||
| 56 | #define AC100_I2S3_SND_OUT_CTRL 0x31 | ||
| 57 | #define AC100_I2S3_SND_IN_CTRL 0x32 | ||
| 58 | #define AC100_I2S3_SIG_PATH_CTRL 0x33 | ||
| 59 | |||
| 60 | /* ADC digital controls */ | ||
| 61 | #define AC100_ADC_DIG_CTRL 0x40 | ||
| 62 | #define AC100_ADC_VOL_CTRL 0x41 | ||
| 63 | |||
| 64 | /* HMIC plug sensing / key detection */ | ||
| 65 | #define AC100_HMIC_CTRL1 0x44 | ||
| 66 | #define AC100_HMIC_CTRL2 0x45 | ||
| 67 | #define AC100_HMIC_STATUS 0x46 | ||
| 68 | |||
| 69 | /* DAC digital controls */ | ||
| 70 | #define AC100_DAC_DIG_CTRL 0x48 | ||
| 71 | #define AC100_DAC_VOL_CTRL 0x49 | ||
| 72 | #define AC100_DAC_MXR_SRC 0x4c | ||
| 73 | #define AC100_DAC_MXR_GAIN 0x4d | ||
| 74 | |||
| 75 | /* Analog controls */ | ||
| 76 | #define AC100_ADC_APC_CTRL 0x50 | ||
| 77 | #define AC100_ADC_SRC 0x51 | ||
| 78 | #define AC100_ADC_SRC_BST_CTRL 0x52 | ||
| 79 | #define AC100_OUT_MXR_DAC_A_CTRL 0x53 | ||
| 80 | #define AC100_OUT_MXR_SRC 0x54 | ||
| 81 | #define AC100_OUT_MXR_SRC_BST 0x55 | ||
| 82 | #define AC100_HPOUT_CTRL 0x56 | ||
| 83 | #define AC100_ERPOUT_CTRL 0x57 | ||
| 84 | #define AC100_SPKOUT_CTRL 0x58 | ||
| 85 | #define AC100_LINEOUT_CTRL 0x59 | ||
| 86 | |||
| 87 | /* ADC digital audio processing (high pass filter & auto gain control */ | ||
| 88 | #define AC100_ADC_DAP_L_STA 0x80 | ||
| 89 | #define AC100_ADC_DAP_R_STA 0x81 | ||
| 90 | #define AC100_ADC_DAP_L_CTRL 0x82 | ||
| 91 | #define AC100_ADC_DAP_R_CTRL 0x83 | ||
| 92 | #define AC100_ADC_DAP_L_T_L 0x84 /* Left Target Level */ | ||
| 93 | #define AC100_ADC_DAP_R_T_L 0x85 /* Right Target Level */ | ||
| 94 | #define AC100_ADC_DAP_L_H_A_C 0x86 /* Left High Avg. Coef */ | ||
| 95 | #define AC100_ADC_DAP_L_L_A_C 0x87 /* Left Low Avg. Coef */ | ||
| 96 | #define AC100_ADC_DAP_R_H_A_C 0x88 /* Right High Avg. Coef */ | ||
| 97 | #define AC100_ADC_DAP_R_L_A_C 0x89 /* Right Low Avg. Coef */ | ||
| 98 | #define AC100_ADC_DAP_L_D_T 0x8a /* Left Decay Time */ | ||
| 99 | #define AC100_ADC_DAP_L_A_T 0x8b /* Left Attack Time */ | ||
| 100 | #define AC100_ADC_DAP_R_D_T 0x8c /* Right Decay Time */ | ||
| 101 | #define AC100_ADC_DAP_R_A_T 0x8d /* Right Attack Time */ | ||
| 102 | #define AC100_ADC_DAP_N_TH 0x8e /* Noise Threshold */ | ||
| 103 | #define AC100_ADC_DAP_L_H_N_A_C 0x8f /* Left High Noise Avg. Coef */ | ||
| 104 | #define AC100_ADC_DAP_L_L_N_A_C 0x90 /* Left Low Noise Avg. Coef */ | ||
| 105 | #define AC100_ADC_DAP_R_H_N_A_C 0x91 /* Right High Noise Avg. Coef */ | ||
| 106 | #define AC100_ADC_DAP_R_L_N_A_C 0x92 /* Right Low Noise Avg. Coef */ | ||
| 107 | #define AC100_ADC_DAP_H_HPF_C 0x93 /* High High-Pass-Filter Coef */ | ||
| 108 | #define AC100_ADC_DAP_L_HPF_C 0x94 /* Low High-Pass-Filter Coef */ | ||
| 109 | #define AC100_ADC_DAP_OPT 0x95 /* AGC Optimum */ | ||
| 110 | |||
| 111 | /* DAC digital audio processing (high pass filter & dynamic range control) */ | ||
| 112 | #define AC100_DAC_DAP_CTRL 0xa0 | ||
| 113 | #define AC100_DAC_DAP_H_HPF_C 0xa1 /* High High-Pass-Filter Coef */ | ||
| 114 | #define AC100_DAC_DAP_L_HPF_C 0xa2 /* Low High-Pass-Filter Coef */ | ||
| 115 | #define AC100_DAC_DAP_L_H_E_A_C 0xa3 /* Left High Energy Avg Coef */ | ||
| 116 | #define AC100_DAC_DAP_L_L_E_A_C 0xa4 /* Left Low Energy Avg Coef */ | ||
| 117 | #define AC100_DAC_DAP_R_H_E_A_C 0xa5 /* Right High Energy Avg Coef */ | ||
| 118 | #define AC100_DAC_DAP_R_L_E_A_C 0xa6 /* Right Low Energy Avg Coef */ | ||
| 119 | #define AC100_DAC_DAP_H_G_D_T_C 0xa7 /* High Gain Delay Time Coef */ | ||
| 120 | #define AC100_DAC_DAP_L_G_D_T_C 0xa8 /* Low Gain Delay Time Coef */ | ||
| 121 | #define AC100_DAC_DAP_H_G_A_T_C 0xa9 /* High Gain Attack Time Coef */ | ||
| 122 | #define AC100_DAC_DAP_L_G_A_T_C 0xaa /* Low Gain Attack Time Coef */ | ||
| 123 | #define AC100_DAC_DAP_H_E_TH 0xab /* High Energy Threshold */ | ||
| 124 | #define AC100_DAC_DAP_L_E_TH 0xac /* Low Energy Threshold */ | ||
| 125 | #define AC100_DAC_DAP_H_G_K 0xad /* High Gain K parameter */ | ||
| 126 | #define AC100_DAC_DAP_L_G_K 0xae /* Low Gain K parameter */ | ||
| 127 | #define AC100_DAC_DAP_H_G_OFF 0xaf /* High Gain offset */ | ||
| 128 | #define AC100_DAC_DAP_L_G_OFF 0xb0 /* Low Gain offset */ | ||
| 129 | #define AC100_DAC_DAP_OPT 0xb1 /* DRC optimum */ | ||
| 130 | |||
| 131 | /* Digital audio processing enable */ | ||
| 132 | #define AC100_ADC_DAP_ENA 0xb4 | ||
| 133 | #define AC100_DAC_DAP_ENA 0xb5 | ||
| 134 | |||
| 135 | /* SRC control */ | ||
| 136 | #define AC100_SRC1_CTRL1 0xb8 | ||
| 137 | #define AC100_SRC1_CTRL2 0xb9 | ||
| 138 | #define AC100_SRC1_CTRL3 0xba | ||
| 139 | #define AC100_SRC1_CTRL4 0xbb | ||
| 140 | #define AC100_SRC2_CTRL1 0xbc | ||
| 141 | #define AC100_SRC2_CTRL2 0xbd | ||
| 142 | #define AC100_SRC2_CTRL3 0xbe | ||
| 143 | #define AC100_SRC2_CTRL4 0xbf | ||
| 144 | |||
| 145 | /* RTC clk control */ | ||
| 146 | #define AC100_CLK32K_ANALOG_CTRL 0xc0 | ||
| 147 | #define AC100_CLKOUT_CTRL1 0xc1 | ||
| 148 | #define AC100_CLKOUT_CTRL2 0xc2 | ||
| 149 | #define AC100_CLKOUT_CTRL3 0xc3 | ||
| 150 | |||
| 151 | /* RTC module */ | ||
| 152 | #define AC100_RTC_RST 0xc6 | ||
| 153 | #define AC100_RTC_CTRL 0xc7 | ||
| 154 | #define AC100_RTC_SEC 0xc8 /* second */ | ||
| 155 | #define AC100_RTC_MIN 0xc9 /* minute */ | ||
| 156 | #define AC100_RTC_HOU 0xca /* hour */ | ||
| 157 | #define AC100_RTC_WEE 0xcb /* weekday */ | ||
| 158 | #define AC100_RTC_DAY 0xcc /* day */ | ||
| 159 | #define AC100_RTC_MON 0xcd /* month */ | ||
| 160 | #define AC100_RTC_YEA 0xce /* year */ | ||
| 161 | #define AC100_RTC_UPD 0xcf /* update trigger */ | ||
| 162 | |||
| 163 | /* RTC alarm */ | ||
| 164 | #define AC100_ALM_INT_ENA 0xd0 | ||
| 165 | #define AC100_ALM_INT_STA 0xd1 | ||
| 166 | #define AC100_ALM_SEC 0xd8 | ||
| 167 | #define AC100_ALM_MIN 0xd9 | ||
| 168 | #define AC100_ALM_HOU 0xda | ||
| 169 | #define AC100_ALM_WEE 0xdb | ||
| 170 | #define AC100_ALM_DAY 0xdc | ||
| 171 | #define AC100_ALM_MON 0xdd | ||
| 172 | #define AC100_ALM_YEA 0xde | ||
| 173 | #define AC100_ALM_UPD 0xdf | ||
| 174 | |||
| 175 | /* RTC general purpose register 0 ~ 15 */ | ||
| 176 | #define AC100_RTC_GP(x) (0xe0 + (x)) | ||
| 177 | |||
| 178 | #endif /* __LINUX_MFD_AC100_H */ | ||
