iio: stm32 trigger: Add support for TRGO2 triggers

Add support for TRGO2 trigger that can be found on STM32F7.
Add additional master modes supported by TRGO2.
Register additional "tim[1/8]_trgo2" triggers for timer1 & timer8.
Detect TRGO2 timer capability (master mode selection 2).

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Acked-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>

1 files changed, 2 insertions, 0 deletions

diff --git a/include/linux/mfd/stm32-timers.h b/include/linux/mfd/stm32-timers.h
index 4a0abbc10ef6..ce7346e7f77a 100644
--- a/include/linux/mfd/stm32-timers.h
+++ b/include/linux/mfd/stm32-timers.h
@@ -34,6 +34,7 @@
 #define TIM_CR1_DIR     BIT(4)  /* Counter Direction       */
 #define TIM_CR1_ARPE    BIT(7)  /* Auto-reload Preload Ena */
 #define TIM_CR2_MMS     (BIT(4) | BIT(5) | BIT(6)) /* Master mode selection */
+#define TIM_CR2_MMS2    GENMASK(23, 20) /* Master mode selection 2 */
 #define TIM_SMCR_SMS    (BIT(0) | BIT(1) | BIT(2)) /* Slave mode selection */
 #define TIM_SMCR_TS     (BIT(4) | BIT(5) | BIT(6)) /* Trigger selection */
 #define TIM_DIER_UIE    BIT(0)  /* Update interrupt        */
@@ -60,6 +61,7 @@
 
 #define MAX_TIM_PSC             0xFFFF
 #define TIM_CR2_MMS_SHIFT       4
+#define TIM_CR2_MMS2_SHIFT      20
 #define TIM_SMCR_TS_SHIFT       4
 #define TIM_BDTR_BKF_MASK       0xF
 #define TIM_BDTR_BKF_SHIFT      16