mfd: mt6397: Add MT6323 support to MT6397 driver

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

2 files changed, 444 insertions, 0 deletions

diff --git a/include/linux/mfd/mt6323/core.h b/include/linux/mfd/mt6323/core.h
new file mode 100644
index 000000000000..06d0ec3b1f8f
--- /dev/null
+++ b/include/linux/mfd/mt6323/core.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2016 Chen Zhong <chen.zhong@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __MFD_MT6323_CORE_H__
+#define __MFD_MT6323_CORE_H__
+
+enum MT6323_IRQ_STATUS_numbers {
+        MT6323_IRQ_STATUS_SPKL_AB = 0,
+        MT6323_IRQ_STATUS_SPKL,
+        MT6323_IRQ_STATUS_BAT_L,
+        MT6323_IRQ_STATUS_BAT_H,
+        MT6323_IRQ_STATUS_WATCHDOG,
+        MT6323_IRQ_STATUS_PWRKEY,
+        MT6323_IRQ_STATUS_THR_L,
+        MT6323_IRQ_STATUS_THR_H,
+        MT6323_IRQ_STATUS_VBATON_UNDET,
+        MT6323_IRQ_STATUS_BVALID_DET,
+        MT6323_IRQ_STATUS_CHRDET,
+        MT6323_IRQ_STATUS_OV,
+        MT6323_IRQ_STATUS_LDO = 16,
+        MT6323_IRQ_STATUS_FCHRKEY,
+        MT6323_IRQ_STATUS_ACCDET,
+        MT6323_IRQ_STATUS_AUDIO,
+        MT6323_IRQ_STATUS_RTC,
+        MT6323_IRQ_STATUS_VPROC,
+        MT6323_IRQ_STATUS_VSYS,
+        MT6323_IRQ_STATUS_VPA,
+        MT6323_IRQ_STATUS_NR,
+};
+
+#endif /* __MFD_MT6323_CORE_H__ */
diff --git a/include/linux/mfd/mt6323/registers.h b/include/linux/mfd/mt6323/registers.h
new file mode 100644
index 000000000000..160f3c0e2589
--- /dev/null
+++ b/include/linux/mfd/mt6323/registers.h
@@ -0,0 +1,408 @@
+/*
+ * Copyright (c) 2016 Chen Zhong <chen.zhong@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __MFD_MT6323_REGISTERS_H__
+#define __MFD_MT6323_REGISTERS_H__
+
+/* PMIC Registers */
+#define MT6323_CHR_CON0           0x0000
+#define MT6323_CHR_CON1           0x0002
+#define MT6323_CHR_CON2           0x0004
+#define MT6323_CHR_CON3           0x0006
+#define MT6323_CHR_CON4           0x0008
+#define MT6323_CHR_CON5           0x000A
+#define MT6323_CHR_CON6           0x000C
+#define MT6323_CHR_CON7           0x000E
+#define MT6323_CHR_CON8           0x0010
+#define MT6323_CHR_CON9           0x0012
+#define MT6323_CHR_CON10          0x0014
+#define MT6323_CHR_CON11          0x0016
+#define MT6323_CHR_CON12          0x0018
+#define MT6323_CHR_CON13          0x001A
+#define MT6323_CHR_CON14          0x001C
+#define MT6323_CHR_CON15          0x001E
+#define MT6323_CHR_CON16          0x0020
+#define MT6323_CHR_CON17          0x0022
+#define MT6323_CHR_CON18          0x0024
+#define MT6323_CHR_CON19          0x0026
+#define MT6323_CHR_CON20          0x0028
+#define MT6323_CHR_CON21          0x002A
+#define MT6323_CHR_CON22          0x002C
+#define MT6323_CHR_CON23          0x002E
+#define MT6323_CHR_CON24          0x0030
+#define MT6323_CHR_CON25          0x0032
+#define MT6323_CHR_CON26          0x0034
+#define MT6323_CHR_CON27          0x0036
+#define MT6323_CHR_CON28          0x0038
+#define MT6323_CHR_CON29          0x003A
+#define MT6323_STRUP_CON0         0x003C
+#define MT6323_STRUP_CON2         0x003E
+#define MT6323_STRUP_CON3         0x0040
+#define MT6323_STRUP_CON4         0x0042
+#define MT6323_STRUP_CON5         0x0044
+#define MT6323_STRUP_CON6         0x0046
+#define MT6323_STRUP_CON7         0x0048
+#define MT6323_STRUP_CON8         0x004A
+#define MT6323_STRUP_CON9         0x004C
+#define MT6323_STRUP_CON10        0x004E
+#define MT6323_STRUP_CON11        0x0050
+#define MT6323_SPK_CON0           0x0052
+#define MT6323_SPK_CON1           0x0054
+#define MT6323_SPK_CON2           0x0056
+#define MT6323_SPK_CON6           0x005E
+#define MT6323_SPK_CON7           0x0060
+#define MT6323_SPK_CON8           0x0062
+#define MT6323_SPK_CON9           0x0064
+#define MT6323_SPK_CON10          0x0066
+#define MT6323_SPK_CON11          0x0068
+#define MT6323_SPK_CON12          0x006A
+#define MT6323_CID                0x0100
+#define MT6323_TOP_CKPDN0         0x0102
+#define MT6323_TOP_CKPDN0_SET     0x0104
+#define MT6323_TOP_CKPDN0_CLR     0x0106
+#define MT6323_TOP_CKPDN1         0x0108
+#define MT6323_TOP_CKPDN1_SET     0x010A
+#define MT6323_TOP_CKPDN1_CLR     0x010C
+#define MT6323_TOP_CKPDN2         0x010E
+#define MT6323_TOP_CKPDN2_SET     0x0110
+#define MT6323_TOP_CKPDN2_CLR     0x0112
+#define MT6323_TOP_RST_CON        0x0114
+#define MT6323_TOP_RST_CON_SET    0x0116
+#define MT6323_TOP_RST_CON_CLR    0x0118
+#define MT6323_TOP_RST_MISC       0x011A
+#define MT6323_TOP_RST_MISC_SET   0x011C
+#define MT6323_TOP_RST_MISC_CLR   0x011E
+#define MT6323_TOP_CKCON0         0x0120
+#define MT6323_TOP_CKCON0_SET     0x0122
+#define MT6323_TOP_CKCON0_CLR     0x0124
+#define MT6323_TOP_CKCON1         0x0126
+#define MT6323_TOP_CKCON1_SET     0x0128
+#define MT6323_TOP_CKCON1_CLR     0x012A
+#define MT6323_TOP_CKTST0         0x012C
+#define MT6323_TOP_CKTST1         0x012E
+#define MT6323_TOP_CKTST2         0x0130
+#define MT6323_TEST_OUT           0x0132
+#define MT6323_TEST_CON0          0x0134
+#define MT6323_TEST_CON1          0x0136
+#define MT6323_EN_STATUS0         0x0138
+#define MT6323_EN_STATUS1         0x013A
+#define MT6323_OCSTATUS0          0x013C
+#define MT6323_OCSTATUS1          0x013E
+#define MT6323_PGSTATUS           0x0140
+#define MT6323_CHRSTATUS          0x0142
+#define MT6323_TDSEL_CON          0x0144
+#define MT6323_RDSEL_CON          0x0146
+#define MT6323_SMT_CON0           0x0148
+#define MT6323_SMT_CON1           0x014A
+#define MT6323_SMT_CON2           0x014C
+#define MT6323_SMT_CON3           0x014E
+#define MT6323_SMT_CON4           0x0150
+#define MT6323_DRV_CON0           0x0152
+#define MT6323_DRV_CON1           0x0154
+#define MT6323_DRV_CON2           0x0156
+#define MT6323_DRV_CON3           0x0158
+#define MT6323_DRV_CON4           0x015A
+#define MT6323_SIMLS1_CON         0x015C
+#define MT6323_SIMLS2_CON         0x015E
+#define MT6323_INT_CON0           0x0160
+#define MT6323_INT_CON0_SET       0x0162
+#define MT6323_INT_CON0_CLR       0x0164
+#define MT6323_INT_CON1           0x0166
+#define MT6323_INT_CON1_SET       0x0168
+#define MT6323_INT_CON1_CLR       0x016A
+#define MT6323_INT_MISC_CON       0x016C
+#define MT6323_INT_MISC_CON_SET   0x016E
+#define MT6323_INT_MISC_CON_CLR   0x0170
+#define MT6323_INT_STATUS0        0x0172
+#define MT6323_INT_STATUS1        0x0174
+#define MT6323_OC_GEAR_0          0x0176
+#define MT6323_OC_GEAR_1          0x0178
+#define MT6323_OC_GEAR_2          0x017A
+#define MT6323_OC_CTL_VPROC       0x017C
+#define MT6323_OC_CTL_VSYS        0x017E
+#define MT6323_OC_CTL_VPA         0x0180
+#define MT6323_FQMTR_CON0         0x0182
+#define MT6323_FQMTR_CON1         0x0184
+#define MT6323_FQMTR_CON2         0x0186
+#define MT6323_RG_SPI_CON         0x0188
+#define MT6323_DEW_DIO_EN         0x018A
+#define MT6323_DEW_READ_TEST      0x018C
+#define MT6323_DEW_WRITE_TEST     0x018E
+#define MT6323_DEW_CRC_SWRST      0x0190
+#define MT6323_DEW_CRC_EN         0x0192
+#define MT6323_DEW_CRC_VAL        0x0194
+#define MT6323_DEW_DBG_MON_SEL    0x0196
+#define MT6323_DEW_CIPHER_KEY_SEL 0x0198
+#define MT6323_DEW_CIPHER_IV_SEL  0x019A
+#define MT6323_DEW_CIPHER_EN      0x019C
+#define MT6323_DEW_CIPHER_RDY     0x019E
+#define MT6323_DEW_CIPHER_MODE    0x01A0
+#define MT6323_DEW_CIPHER_SWRST   0x01A2
+#define MT6323_DEW_RDDMY_NO       0x01A4
+#define MT6323_DEW_RDATA_DLY_SEL  0x01A6
+#define MT6323_BUCK_CON0          0x0200
+#define MT6323_BUCK_CON1          0x0202
+#define MT6323_BUCK_CON2          0x0204
+#define MT6323_BUCK_CON3          0x0206
+#define MT6323_BUCK_CON4          0x0208
+#define MT6323_BUCK_CON5          0x020A
+#define MT6323_VPROC_CON0         0x020C
+#define MT6323_VPROC_CON1         0x020E
+#define MT6323_VPROC_CON2         0x0210
+#define MT6323_VPROC_CON3         0x0212
+#define MT6323_VPROC_CON4         0x0214
+#define MT6323_VPROC_CON5         0x0216
+#define MT6323_VPROC_CON7         0x02