Merge tag 'irqchip-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core

Pull irqchip updates from Marc Zyngier

- Core pseudo-NMI handling code
- Allow the default irq domain to be retrieved
- A new interrupt controller for the Loongson LS1X platform
- Affinity support for the SiFive PLIC
- Better support for the iMX irqsteer driver
- NUMA aware memory allocations for GICv3
- A handful of other fixes (i8259, GICv3, PLIC)

1 files changed, 10 insertions, 0 deletions

diff --git a/include/linux/irq.h b/include/linux/irq.h
index def2b2aac8b1..5e91f6bcaacd 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -442,6 +442,8 @@ static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
  * @irq_set_vcpu_affinity:      optional to target a vCPU in a virtual machine
  * @ipi_send_single:    send a single IPI to destination cpus
  * @ipi_send_mask:      send an IPI to destination cpus in cpumask
+ * @irq_nmi_setup:      function called from core code before enabling an NMI
+ * @irq_nmi_teardown:   function called from core code after disabling an NMI
  * @flags:              chip specific flags
  */
 struct irq_chip {
@@ -490,6 +492,9 @@ struct irq_chip {
         void            (*ipi_send_single)(struct irq_data *data, unsigned int cpu);
         void            (*ipi_send_mask)(struct irq_data *data, const struct cpumask *dest);
 
+        int             (*irq_nmi_setup)(struct irq_data *data);
+        void            (*irq_nmi_teardown)(struct irq_data *data);
+
         unsigned long   flags;
 };
 
@@ -505,6 +510,7 @@ struct irq_chip {
  * IRQCHIP_ONESHOT_SAFE:        One shot does not require mask/unmask
  * IRQCHIP_EOI_THREADED:        Chip requires eoi() on unmask in threaded mode
  * IRQCHIP_SUPPORTS_LEVEL_MSI   Chip can provide two doorbells for Level MSIs
+ * IRQCHIP_SUPPORTS_NMI:        Chip can deliver NMIs, only for root irqchips
  */
 enum {
         IRQCHIP_SET_TYPE_MASKED         = (1 <<  0),
@@ -515,6 +521,7 @@ enum {
         IRQCHIP_ONESHOT_SAFE            = (1 <<  5),
         IRQCHIP_EOI_THREADED            = (1 <<  6),
         IRQCHIP_SUPPORTS_LEVEL_MSI      = (1 <<  7),
+        IRQCHIP_SUPPORTS_NMI            = (1 <<  8),
 };
 
 #include <linux/irqdesc.h>
@@ -594,6 +601,9 @@ extern void handle_percpu_devid_irq(struct irq_desc *desc);
 extern void handle_bad_irq(struct irq_desc *desc);
 extern void handle_nested_irq(unsigned int irq);
 
+extern void handle_fasteoi_nmi(struct irq_desc *desc);
+extern void handle_percpu_devid_fasteoi_nmi(struct irq_desc *desc);
+
 extern int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg);
 extern int irq_chip_pm_get(struct irq_data *data);
 extern int irq_chip_pm_put(struct irq_data *data);