diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-11-23 03:04:05 -0500 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-11-23 03:04:05 -0500 |
commit | 92907cbbef8625bb3998d1eb385fc88f23c97a3f (patch) | |
tree | 15626ff9287e37c3cb81c7286d6db5a7fd77c854 /include/linux/fpga | |
parent | 15fbfccfe92c62ae8d1ecc647c44157ed01ac02e (diff) | |
parent | 1ec218373b8ebda821aec00bb156a9c94fad9cd4 (diff) |
Merge tag 'v4.4-rc2' into drm-intel-next-queued
Linux 4.4-rc2
Backmerge to get at
commit 1b0e3a049efe471c399674fd954500ce97438d30
Author: Imre Deak <imre.deak@intel.com>
Date: Thu Nov 5 23:04:11 2015 +0200
drm/i915/skl: disable display side power well support for now
so that we can proplery re-eanble skl power wells in -next.
Conflicts are just adjacent lines changed, except for intel_fbdev.c
where we need to interleave the changs. Nothing nefarious.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Diffstat (limited to 'include/linux/fpga')
-rw-r--r-- | include/linux/fpga/fpga-mgr.h | 127 |
1 files changed, 127 insertions, 0 deletions
diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h new file mode 100644 index 000000000000..0940bf45e2f2 --- /dev/null +++ b/include/linux/fpga/fpga-mgr.h | |||
@@ -0,0 +1,127 @@ | |||
1 | /* | ||
2 | * FPGA Framework | ||
3 | * | ||
4 | * Copyright (C) 2013-2015 Altera Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License along with | ||
16 | * this program. If not, see <http://www.gnu.org/licenses/>. | ||
17 | */ | ||
18 | #include <linux/mutex.h> | ||
19 | #include <linux/platform_device.h> | ||
20 | |||
21 | #ifndef _LINUX_FPGA_MGR_H | ||
22 | #define _LINUX_FPGA_MGR_H | ||
23 | |||
24 | struct fpga_manager; | ||
25 | |||
26 | /** | ||
27 | * enum fpga_mgr_states - fpga framework states | ||
28 | * @FPGA_MGR_STATE_UNKNOWN: can't determine state | ||
29 | * @FPGA_MGR_STATE_POWER_OFF: FPGA power is off | ||
30 | * @FPGA_MGR_STATE_POWER_UP: FPGA reports power is up | ||
31 | * @FPGA_MGR_STATE_RESET: FPGA in reset state | ||
32 | * @FPGA_MGR_STATE_FIRMWARE_REQ: firmware request in progress | ||
33 | * @FPGA_MGR_STATE_FIRMWARE_REQ_ERR: firmware request failed | ||
34 | * @FPGA_MGR_STATE_WRITE_INIT: preparing FPGA for programming | ||
35 | * @FPGA_MGR_STATE_WRITE_INIT_ERR: Error during WRITE_INIT stage | ||
36 | * @FPGA_MGR_STATE_WRITE: writing image to FPGA | ||
37 | * @FPGA_MGR_STATE_WRITE_ERR: Error while writing FPGA | ||
38 | * @FPGA_MGR_STATE_WRITE_COMPLETE: Doing post programming steps | ||
39 | * @FPGA_MGR_STATE_WRITE_COMPLETE_ERR: Error during WRITE_COMPLETE | ||
40 | * @FPGA_MGR_STATE_OPERATING: FPGA is programmed and operating | ||
41 | */ | ||
42 | enum fpga_mgr_states { | ||
43 | /* default FPGA states */ | ||
44 | FPGA_MGR_STATE_UNKNOWN, | ||
45 | FPGA_MGR_STATE_POWER_OFF, | ||
46 | FPGA_MGR_STATE_POWER_UP, | ||
47 | FPGA_MGR_STATE_RESET, | ||
48 | |||
49 | /* getting an image for loading */ | ||
50 | FPGA_MGR_STATE_FIRMWARE_REQ, | ||
51 | FPGA_MGR_STATE_FIRMWARE_REQ_ERR, | ||
52 | |||
53 | /* write sequence: init, write, complete */ | ||
54 | FPGA_MGR_STATE_WRITE_INIT, | ||
55 | FPGA_MGR_STATE_WRITE_INIT_ERR, | ||
56 | FPGA_MGR_STATE_WRITE, | ||
57 | FPGA_MGR_STATE_WRITE_ERR, | ||
58 | FPGA_MGR_STATE_WRITE_COMPLETE, | ||
59 | FPGA_MGR_STATE_WRITE_COMPLETE_ERR, | ||
60 | |||
61 | /* fpga is programmed and operating */ | ||
62 | FPGA_MGR_STATE_OPERATING, | ||
63 | }; | ||
64 | |||
65 | /* | ||
66 | * FPGA Manager flags | ||
67 | * FPGA_MGR_PARTIAL_RECONFIG: do partial reconfiguration if supported | ||
68 | */ | ||
69 | #define FPGA_MGR_PARTIAL_RECONFIG BIT(0) | ||
70 | |||
71 | /** | ||
72 | * struct fpga_manager_ops - ops for low level fpga manager drivers | ||
73 | * @state: returns an enum value of the FPGA's state | ||
74 | * @write_init: prepare the FPGA to receive confuration data | ||
75 | * @write: write count bytes of configuration data to the FPGA | ||
76 | * @write_complete: set FPGA to operating state after writing is done | ||
77 | * @fpga_remove: optional: Set FPGA into a specific state during driver remove | ||
78 | * | ||
79 | * fpga_manager_ops are the low level functions implemented by a specific | ||
80 | * fpga manager driver. The optional ones are tested for NULL before being | ||
81 | * called, so leaving them out is fine. | ||
82 | */ | ||
83 | struct fpga_manager_ops { | ||
84 | enum fpga_mgr_states (*state)(struct fpga_manager *mgr); | ||
85 | int (*write_init)(struct fpga_manager *mgr, u32 flags, | ||
86 | const char *buf, size_t count); | ||
87 | int (*write)(struct fpga_manager *mgr, const char *buf, size_t count); | ||
88 | int (*write_complete)(struct fpga_manager *mgr, u32 flags); | ||
89 | void (*fpga_remove)(struct fpga_manager *mgr); | ||
90 | }; | ||
91 | |||
92 | /** | ||
93 | * struct fpga_manager - fpga manager structure | ||
94 | * @name: name of low level fpga manager | ||
95 | * @dev: fpga manager device | ||
96 | * @ref_mutex: only allows one reference to fpga manager | ||
97 | * @state: state of fpga manager | ||
98 | * @mops: pointer to struct of fpga manager ops | ||
99 | * @priv: low level driver private date | ||
100 | */ | ||
101 | struct fpga_manager { | ||
102 | const char *name; | ||
103 | struct device dev; | ||
104 | struct mutex ref_mutex; | ||
105 | enum fpga_mgr_states state; | ||
106 | const struct fpga_manager_ops *mops; | ||
107 | void *priv; | ||
108 | }; | ||
109 | |||
110 | #define to_fpga_manager(d) container_of(d, struct fpga_manager, dev) | ||
111 | |||
112 | int fpga_mgr_buf_load(struct fpga_manager *mgr, u32 flags, | ||
113 | const char *buf, size_t count); | ||
114 | |||
115 | int fpga_mgr_firmware_load(struct fpga_manager *mgr, u32 flags, | ||
116 | const char *image_name); | ||
117 | |||
118 | struct fpga_manager *of_fpga_mgr_get(struct device_node *node); | ||
119 | |||
120 | void fpga_mgr_put(struct fpga_manager *mgr); | ||
121 | |||
122 | int fpga_mgr_register(struct device *dev, const char *name, | ||
123 | const struct fpga_manager_ops *mops, void *priv); | ||
124 | |||
125 | void fpga_mgr_unregister(struct device *dev); | ||
126 | |||
127 | #endif /*_LINUX_FPGA_MGR_H */ | ||