firmware: xilinx: Add clock APIs

Add clock APIs to control clocks through firmware
interface.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

1 files changed, 30 insertions, 0 deletions

diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index 287f42caa623..015e130431e6 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -35,6 +35,15 @@
 enum pm_api_id {
         PM_GET_API_VERSION = 1,
         PM_QUERY_DATA = 35,
+        PM_CLOCK_ENABLE,
+        PM_CLOCK_DISABLE,
+        PM_CLOCK_GETSTATE,
+        PM_CLOCK_SETDIVIDER,
+        PM_CLOCK_GETDIVIDER,
+        PM_CLOCK_SETRATE,
+        PM_CLOCK_GETRATE,
+        PM_CLOCK_SETPARENT,
+        PM_CLOCK_GETPARENT,
 };
 
 /* PMU-FW return status codes */
@@ -48,8 +57,20 @@ enum pm_ret_status {
         XST_PM_ABORT_SUSPEND,
 };
 
+enum pm_ioctl_id {
+        IOCTL_SET_PLL_FRAC_MODE = 8,
+        IOCTL_GET_PLL_FRAC_MODE,
+        IOCTL_SET_PLL_FRAC_DATA,
+        IOCTL_GET_PLL_FRAC_DATA,
+};
+
 enum pm_query_id {
         PM_QID_INVALID,
+        PM_QID_CLOCK_GET_NAME,
+        PM_QID_CLOCK_GET_TOPOLOGY,
+        PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS,
+        PM_QID_CLOCK_GET_PARENTS,
+        PM_QID_CLOCK_GET_ATTRIBUTES,
 };
 
 /**
@@ -69,6 +90,15 @@ struct zynqmp_pm_query_data {
 struct zynqmp_eemi_ops {
         int (*get_api_version)(u32 *version);
         int (*query_data)(struct zynqmp_pm_query_data qdata, u32 *out);
+        int (*clock_enable)(u32 clock_id);
+        int (*clock_disable)(u32 clock_id);
+        int (*clock_getstate)(u32 clock_id, u32 *state);
+        int (*clock_setdivider)(u32 clock_id, u32 divider);
+        int (*clock_getdivider)(u32 clock_id, u32 *divider);
+        int (*clock_setrate)(u32 clock_id, u64 rate);
+        int (*clock_getrate)(u32 clock_id, u64 *rate);
+        int (*clock_setparent)(u32 clock_id, u32 parent_id);
+        int (*clock_getparent)(u32 clock_id, u32 *parent_id);
 };
 
 #if IS_REACHABLE(CONFIG_ARCH_ZYNQMP)