diff options
author | Shawn Lin <shawn.lin@rock-chips.com> | 2016-01-22 06:06:50 -0500 |
---|---|---|
committer | Vinod Koul <vinod.koul@intel.com> | 2016-02-08 22:31:41 -0500 |
commit | 6d5bbed30f89acd2ae0d23b3fff5b13b307525d9 (patch) | |
tree | e0d30a6632f33fbee36b7776778bd4442f80a965 /include/linux/dmaengine.h | |
parent | 271e1b86e69140fe65718ae8a264284c46d3129d (diff) |
dmaengine: core: expose max burst capability to clients
This patch add max_burst to dma_get_slave_caps for clients
to get the burst capability of slave dma controller.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'include/linux/dmaengine.h')
-rw-r--r-- | include/linux/dmaengine.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 16a1cad30c33..0a9a0ba1998b 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h | |||
@@ -401,6 +401,7 @@ enum dma_residue_granularity { | |||
401 | * since the enum dma_transfer_direction is not defined as bits for each | 401 | * since the enum dma_transfer_direction is not defined as bits for each |
402 | * type of direction, the dma controller should fill (1 << <TYPE>) and same | 402 | * type of direction, the dma controller should fill (1 << <TYPE>) and same |
403 | * should be checked by controller as well | 403 | * should be checked by controller as well |
404 | * @max_burst: max burst capability per-transfer | ||
404 | * @cmd_pause: true, if pause and thereby resume is supported | 405 | * @cmd_pause: true, if pause and thereby resume is supported |
405 | * @cmd_terminate: true, if terminate cmd is supported | 406 | * @cmd_terminate: true, if terminate cmd is supported |
406 | * @residue_granularity: granularity of the reported transfer residue | 407 | * @residue_granularity: granularity of the reported transfer residue |
@@ -411,6 +412,7 @@ struct dma_slave_caps { | |||
411 | u32 src_addr_widths; | 412 | u32 src_addr_widths; |
412 | u32 dst_addr_widths; | 413 | u32 dst_addr_widths; |
413 | u32 directions; | 414 | u32 directions; |
415 | u32 max_burst; | ||
414 | bool cmd_pause; | 416 | bool cmd_pause; |
415 | bool cmd_terminate; | 417 | bool cmd_terminate; |
416 | enum dma_residue_granularity residue_granularity; | 418 | enum dma_residue_granularity residue_granularity; |
@@ -654,6 +656,7 @@ struct dma_filter { | |||
654 | * the enum dma_transfer_direction is not defined as bits for | 656 | * the enum dma_transfer_direction is not defined as bits for |
655 | * each type of direction, the dma controller should fill (1 << | 657 | * each type of direction, the dma controller should fill (1 << |
656 | * <TYPE>) and same should be checked by controller as well | 658 | * <TYPE>) and same should be checked by controller as well |
659 | * @max_burst: max burst capability per-transfer | ||
657 | * @residue_granularity: granularity of the transfer residue reported | 660 | * @residue_granularity: granularity of the transfer residue reported |
658 | * by tx_status | 661 | * by tx_status |
659 | * @device_alloc_chan_resources: allocate resources and return the | 662 | * @device_alloc_chan_resources: allocate resources and return the |
@@ -712,6 +715,7 @@ struct dma_device { | |||
712 | u32 src_addr_widths; | 715 | u32 src_addr_widths; |
713 | u32 dst_addr_widths; | 716 | u32 dst_addr_widths; |
714 | u32 directions; | 717 | u32 directions; |
718 | u32 max_burst; | ||
715 | bool descriptor_reuse; | 719 | bool descriptor_reuse; |
716 | enum dma_residue_granularity residue_granularity; | 720 | enum dma_residue_granularity residue_granularity; |
717 | 721 | ||