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authorAmir Goldstein <amir73il@gmail.com>2018-06-23 10:54:50 -0400
committerJan Kara <jack@suse.cz>2018-06-27 07:45:07 -0400
commit3ac70bfcde812b1b97d8a88a832df59941fa293f (patch)
tree52dad7896f274af1f4e12fc87997994387e12333 /fs/filesystems.c
parent36f10f55ff1d2867bfc48ed898a9cc0dc6b49dd2 (diff)
fsnotify: add helper to get mask from connector
Use a helper to get the mask from the object (i.e. i_fsnotify_mask) to generalize code of add/remove inode/vfsmount mark. Signed-off-by: Amir Goldstein <amir73il@gmail.com> Signed-off-by: Jan Kara <jack@suse.cz>
Diffstat (limited to 'fs/filesystems.c')
0 files changed, 0 insertions, 0 deletions
lass='upd'>drivers/acpi/blacklist.c2
-rw-r--r--drivers/acpi/ec.c107
-rw-r--r--drivers/acpi/ec_sys.c160
-rw-r--r--drivers/acpi/internal.h24
-rw-r--r--drivers/acpi/processor_core.c2
-rw-r--r--drivers/acpi/processor_idle.c10
-rw-r--r--drivers/acpi/sleep.c35
-rw-r--r--drivers/amba/bus.c88
-rw-r--r--drivers/atm/Kconfig2
-rw-r--r--drivers/atm/adummy.c39
-rw-r--r--drivers/atm/ambassador.c6
-rw-r--r--drivers/atm/eni.c6
-rw-r--r--drivers/atm/firestream.c6
-rw-r--r--drivers/atm/fore200e.c8
-rw-r--r--drivers/atm/he.c310
-rw-r--r--drivers/atm/he.h65
-rw-r--r--drivers/atm/idt77105.c11
-rw-r--r--drivers/atm/idt77252.c5
-rw-r--r--drivers/atm/nicstar.c5196
-rw-r--r--drivers/atm/nicstar.h602
-rw-r--r--drivers/atm/nicstarmac.c364
-rw-r--r--drivers/atm/solos-pci.c6
-rw-r--r--drivers/atm/suni.c5
-rw-r--r--drivers/atm/zatm.c6
-rw-r--r--drivers/base/core.c66
-rw-r--r--drivers/base/platform.c13
-rw-r--r--drivers/base/power/Makefile2
-rw-r--r--drivers/base/power/main.c1
-rw-r--r--drivers/base/power/runtime.c54
-rw-r--r--drivers/base/power/sysfs.c98
-rw-r--r--drivers/base/power/wakeup.c247
-rw-r--r--drivers/block/cciss.c2
-rw-r--r--drivers/block/drbd/drbd_receiver.c2
-rw-r--r--drivers/block/nbd.c2
-rw-r--r--drivers/block/virtio_blk.c64
-rw-r--r--drivers/block/xen-blkfront.c30
-rw-r--r--drivers/bluetooth/Kconfig12
-rw-r--r--drivers/bluetooth/Makefile1
-rw-r--r--drivers/bluetooth/bcm203x.c3
-rw-r--r--drivers/bluetooth/bluecard_cs.c2
-rw-r--r--drivers/bluetooth/bpa10x.c2
-rw-r--r--drivers/bluetooth/btmrvl_debugfs.c2
-rw-r--r--drivers/bluetooth/btmrvl_drv.h5
-rw-r--r--drivers/bluetooth/btmrvl_main.c5
-rw-r--r--drivers/bluetooth/btmrvl_sdio.c111
-rw-r--r--drivers/bluetooth/btusb.c13
-rw-r--r--drivers/bluetooth/dtl1_cs.c2
-rw-r--r--drivers/bluetooth/hci_ath.c235
-rw-r--r--drivers/bluetooth/hci_bcsp.c6
-rw-r--r--drivers/bluetooth/hci_h4.c107
-rw-r--r--drivers/bluetooth/hci_ldisc.c20
-rw-r--r--drivers/bluetooth/hci_ll.c6
-rw-r--r--drivers/bluetooth/hci_uart.h15
-rw-r--r--drivers/char/agp/efficeon-agp.c22
-rw-r--r--drivers/char/agp/intel-agp.c26
-rw-r--r--drivers/char/agp/intel-agp.h6
-rw-r--r--drivers/char/agp/intel-gtt.c96
-rw-r--r--drivers/char/bsr.c1
-rw-r--r--drivers/char/hvc_console.c12
-rw-r--r--drivers/char/hvsi.c4
-rw-r--r--drivers/char/hw_random/n2-drv.c6
-rw-r--r--drivers/char/keyboard.c6
-rw-r--r--drivers/char/random.c2
-rw-r--r--drivers/char/synclink_gt.c2
-rw-r--r--drivers/char/sysrq.c2
-rw-r--r--drivers/char/tpm/tpm_tis.c9
-rw-r--r--drivers/char/vt.c78
-rw-r--r--drivers/clocksource/cs5535-clockevt.c2
-rw-r--r--drivers/cpufreq/cpufreq.c30
-rw-r--r--drivers/cpufreq/cpufreq_ondemand.c33
-rw-r--r--drivers/cpuidle/cpuidle.c2
-rw-r--r--drivers/crypto/amcc/crypto4xx_reg_def.h2
-rw-r--r--drivers/crypto/geode-aes.c2
-rw-r--r--drivers/crypto/hifn_795x.c4
-rw-r--r--drivers/crypto/mv_cesa.c10
-rw-r--r--drivers/crypto/n2_core.c425
-rw-r--r--drivers/crypto/omap-sham.c1
-rw-r--r--drivers/crypto/talitos.c83
-rw-r--r--drivers/dma/at_hdmac.c2
-rw-r--r--drivers/dma/fsldma.c2
-rw-r--r--drivers/edac/Kconfig10
-rw-r--r--drivers/edac/amd64_edac.c213
-rw-r--r--drivers/edac/amd64_edac.h48
-rw-r--r--drivers/edac/e752x_edac.c4
-rw-r--r--drivers/edac/edac_core.h17
-rw-r--r--drivers/edac/edac_mc_sysfs.c86
-rw-r--r--drivers/edac/edac_mce_amd.c16
-rw-r--r--drivers/edac/i5100_edac.c7
-rw-r--r--drivers/edac/i7core_edac.c2
-rw-r--r--drivers/edac/mpc85xx_edac.c4
-rw-r--r--drivers/firmware/Kconfig9
-rw-r--r--drivers/firmware/Makefile1
-rw-r--r--drivers/firmware/iscsi_boot_sysfs.c481
-rw-r--r--drivers/firmware/iscsi_ibft.c726
-rw-r--r--drivers/firmware/iscsi_ibft_find.c56
-rw-r--r--drivers/gpio/cs5535-gpio.c2
-rw-r--r--drivers/gpio/gpiolib.c62
-rw-r--r--drivers/gpio/pl061.c4
-rw-r--r--drivers/gpio/xilinx_gpio.c15
-rw-r--r--drivers/gpu/drm/Kconfig11
-rw-r--r--drivers/gpu/drm/Makefile7
-rw-r--r--drivers/gpu/drm/drm_bufs.c15
-rw-r--r--drivers/gpu/drm/drm_crtc.c30
-rw-r--r--drivers/gpu/drm/drm_crtc_helper.c71
-rw-r--r--drivers/gpu/drm/drm_drv.c43
-rw-r--r--drivers/gpu/drm/drm_edid.c15
-rw-r--r--drivers/gpu/drm/drm_encoder_slave.c7
-rw-r--r--drivers/gpu/drm/drm_fb_helper.c99
-rw-r--r--drivers/gpu/drm/drm_fops.c23
-rw-r--r--drivers/gpu/drm/drm_gem.c11
-rw-r--r--drivers/gpu/drm/drm_global.c (renamed from drivers/gpu/drm/ttm/ttm_global.c)30
-rw-r--r--drivers/gpu/drm/drm_info.c23
-rw-r--r--drivers/gpu/drm/drm_ioctl.c140
-rw-r--r--drivers/gpu/drm/drm_irq.c26
-rw-r--r--drivers/gpu/drm/drm_mm.c359
-rw-r--r--drivers/gpu/drm/drm_pci.c143
-rw-r--r--drivers/gpu/drm/drm_platform.c122
-rw-r--r--drivers/gpu/drm/drm_stub.c92
-rw-r--r--drivers/gpu/drm/drm_sysfs.c3
-rw-r--r--drivers/gpu/drm/drm_trace.h66
-rw-r--r--drivers/gpu/drm/drm_trace_points.c4
-rw-r--r--drivers/gpu/drm/drm_vm.c14
-rw-r--r--drivers/gpu/drm/i2c/Makefile3
-rw-r--r--drivers/gpu/drm/i2c/ch7006_drv.c22
-rw-r--r--drivers/gpu/drm/i2c/ch7006_priv.h2
-rw-r--r--drivers/gpu/drm/i2c/sil164_drv.c462
-rw-r--r--drivers/gpu/drm/i810/i810_dma.c125
-rw-r--r--drivers/gpu/drm/i810/i810_drv.c2
-rw-r--r--drivers/gpu/drm/i810/i810_drv.h65
-rw-r--r--drivers/gpu/drm/i830/i830_dma.c137
-rw-r--r--drivers/gpu/drm/i830/i830_drv.c2
-rw-r--r--drivers/gpu/drm/i830/i830_drv.h49
-rw-r--r--drivers/gpu/drm/i830/i830_irq.c10
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c3
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c26
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c66
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h34
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c188
-rw-r--r--drivers/gpu/drm/i915/i915_gem_tiling.c2
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c58
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h121
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c9
-rw-r--r--drivers/gpu/drm/i915/i915_trace.h36
-rw-r--r--drivers/gpu/drm/i915/intel_display.c795
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c192
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h13
-rw-r--r--drivers/gpu/drm/i915/intel_fb.c6
-rw-r--r--drivers/gpu/drm/i915/intel_hdmi.c9
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c354
-rw-r--r--drivers/gpu/drm/i915/intel_overlay.c14
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo.c12
-rw-r--r--drivers/gpu/drm/i915/intel_tv.c14
-rw-r--r--drivers/gpu/drm/mga/mga_dma.c103
-rw-r--r--drivers/gpu/drm/mga/mga_drv.c4
-rw-r--r--drivers/gpu/drm/mga/mga_drv.h187
-rw-r--r--drivers/gpu/drm/mga/mga_irq.c9
-rw-r--r--drivers/gpu/drm/mga/mga_state.c47
-rw-r--r--drivers/gpu/drm/mga/mga_warp.c4
-rw-r--r--drivers/gpu/drm/nouveau/Kconfig11
-rw-r--r--drivers/gpu/drm/nouveau/Makefile6
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_acpi.c38
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bios.c657
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bios.h4
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bo.c11
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_calc.c4
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_channel.c8
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_connector.c404
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_connector.h7
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_dma.c8
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_dp.c41
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.c41
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.h137
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_encoder.h10
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_fbcon.c5
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_fence.c35
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_gem.c11
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_grctx.c160
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_i2c.c42
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_i2c.h3
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_mem.c332
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_notifier.c30
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_object.c105
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_reg.h91
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_sgdma.c46
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_state.c255
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_ttm.c20
-rw-r--r--drivers/gpu/drm/nouveau/nv04_crtc.c5
-rw-r--r--drivers/gpu/drm/nouveau/nv04_dac.c50
-rw-r--r--drivers/gpu/drm/nouveau/nv04_dfp.c12
-rw-r--r--drivers/gpu/drm/nouveau/nv04_display.c90
-rw-r--r--drivers/gpu/drm/nouveau/nv04_fifo.c20
-rw-r--r--drivers/gpu/drm/nouveau/nv04_graph.c5
-rw-r--r--drivers/gpu/drm/nouveau/nv04_instmem.c21
-rw-r--r--drivers/gpu/drm/nouveau/nv04_mc.c4
-rw-r--r--drivers/gpu/drm/nouveau/nv04_tv.c125
-rw-r--r--drivers/gpu/drm/nouveau/nv10_fifo.c10
-rw-r--r--drivers/gpu/drm/nouveau/nv10_gpio.c (renamed from drivers/gpu/drm/nouveau/nv17_gpio.c)4
-rw-r--r--drivers/gpu/drm/nouveau/nv17_tv.c65
-rw-r--r--drivers/gpu/drm/nouveau/nv20_graph.c100
-rw-r--r--drivers/gpu/drm/nouveau/nv30_fb.c87
-rw-r--r--drivers/gpu/drm/nouveau/nv40_fifo.c8
-rw-r--r--drivers/gpu/drm/nouveau/nv40_graph.c60
-rw-r--r--drivers/gpu/drm/nouveau/nv40_mc.c2
-rw-r--r--drivers/gpu/drm/nouveau/nv50_crtc.c42
-rw-r--r--drivers/gpu/drm/nouveau/nv50_dac.c43
-rw-r--r--drivers/gpu/drm/nouveau/nv50_display.c419
-rw-r--r--drivers/gpu/drm/nouveau/nv50_display.h6
-rw-r--r--drivers/gpu/drm/nouveau/nv50_fifo.c126
-rw-r--r--drivers/gpu/drm/nouveau/nv50_gpio.c35
-rw-r--r--drivers/gpu/drm/nouveau/nv50_graph.c86
-rw-r--r--drivers/gpu/drm/nouveau/nv50_instmem.c68
-rw-r--r--drivers/gpu/drm/nouveau/nv50_sor.c105
-rw-r--r--drivers/gpu/drm/nouveau/nvreg.h22
-rw-r--r--drivers/gpu/drm/r128/r128_cce.c52
-rw-r--r--drivers/gpu/drm/r128/r128_drv.c2
-rw-r--r--drivers/gpu/drm/r128/r128_drv.h122
-rw-r--r--drivers/gpu/drm/r128/r128_irq.c4
-rw-r--r--drivers/gpu/drm/r128/r128_state.c121
-rw-r--r--drivers/gpu/drm/radeon/Makefile1
-rw-r--r--drivers/gpu/drm/radeon/atom.c9
-rw-r--r--drivers/gpu/drm/radeon/atom.h2
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c212
-rw-r--r--drivers/gpu/drm/radeon/atombios_dp.c18
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c22
-rw-r--r--drivers/gpu/drm/radeon/evergreen_cs.c2
-rw-r--r--drivers/gpu/drm/radeon/evergreen_reg.h5
-rw-r--r--drivers/gpu/drm/radeon/evergreend.h5
-rw-r--r--drivers/gpu/drm/radeon/r100.c58
-rw-r--r--drivers/gpu/drm/radeon/r100d.h2
-rw-r--r--drivers/gpu/drm/radeon/r300.c49
-rw-r--r--drivers/gpu/drm/radeon/r300d.h2
-rw-r--r--drivers/gpu/drm/radeon/r420.c2
-rw-r--r--drivers/gpu/drm/radeon/r500_reg.h5
-rw-r--r--drivers/gpu/drm/radeon/r520.c3
-rw-r--r--drivers/gpu/drm/radeon/r600.c50
-rw-r--r--drivers/gpu/drm/radeon/r600_audio.c22
-rw-r--r--drivers/gpu/drm/radeon/r600_blit.c5
-rw-r--r--drivers/gpu/drm/radeon/r600_blit_shaders.c1115
-rw-r--r--drivers/gpu/drm/radeon/r600_cs.c235
-rw-r--r--drivers/gpu/drm/radeon/r600_hdmi.c6
-rw-r--r--drivers/gpu/drm/radeon/r600d.h12
-rw-r--r--drivers/gpu/drm/radeon/radeon.h54
-rw-r--r--drivers/gpu/drm/radeon/radeon_acpi.c67
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.h1
-rw-r--r--drivers/gpu/drm/radeon/radeon_atombios.c75
-rw-r--r--drivers/gpu/drm/radeon/radeon_bios.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_combios.c59
-rw-r--r--drivers/gpu/drm/radeon/radeon_connectors.c75
-rw-r--r--drivers/gpu/drm/radeon/radeon_cp.c8
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c53
-rw-r--r--drivers/gpu/drm/radeon/radeon_display.c77
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.c5
-rw-r--r--drivers/gpu/drm/radeon/radeon_encoders.c15
-rw-r--r--drivers/gpu/drm/radeon/radeon_kms.c40
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_crtc.c18
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_encoders.c31
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_tv.c10
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h18
-rw-r--r--drivers/gpu/drm/radeon/radeon_object.c27
-rw-r--r--drivers/gpu/drm/radeon/radeon_pm.c115
-rw-r--r--drivers/gpu/drm/radeon/radeon_ttm.c20
-rw-r--r--drivers/gpu/drm/radeon/reg_srcs/r30013
-rw-r--r--drivers/gpu/drm/radeon/reg_srcs/r42014
-rw-r--r--drivers/gpu/drm/radeon/reg_srcs/rs60013
-rw-r--r--drivers/gpu/drm/radeon/reg_srcs/rv51513
-rw-r--r--drivers/gpu/drm/radeon/rs400.c9
-rw-r--r--drivers/gpu/drm/radeon/rs600.c17
-rw-r--r--drivers/gpu/drm/radeon/rs690.c45
-rw-r--r--drivers/gpu/drm/radeon/rv515.c26
-rw-r--r--drivers/gpu/drm/radeon/rv770.c27
-rw-r--r--drivers/gpu/drm/radeon/rv770d.h6
-rw-r--r--drivers/gpu/drm/savage/savage_bci.c26
-rw-r--r--drivers/gpu/drm/sis/sis_drv.c3
-rw-r--r--drivers/gpu/drm/sis/sis_mm.c14
-rw-r--r--drivers/gpu/drm/ttm/Makefile2
-rw-r--r--drivers/gpu/drm/ttm/ttm_bo.c10
-rw-r--r--drivers/gpu/drm/ttm/ttm_bo_util.c2
-rw-r--r--drivers/gpu/drm/ttm/ttm_module.c4
-rw-r--r--drivers/gpu/drm/ttm/ttm_page_alloc.c74
-rw-r--r--drivers/gpu/drm/via/via_dma.c120
-rw-r--r--drivers/gpu/drm/via/via_dmablit.c71
-rw-r--r--drivers/gpu/drm/via/via_dmablit.h8
-rw-r--r--drivers/gpu/drm/via/via_drv.h22
-rw-r--r--drivers/gpu/drm/via/via_irq.c13
-rw-r--r--drivers/gpu/drm/via/via_map.c4
-rw-r--r--drivers/gpu/drm/via/via_mm.c7
-rw-r--r--drivers/gpu/drm/via/via_verifier.c47
-rw-r--r--drivers/gpu/drm/via/via_verifier.h4
-rw-r--r--drivers/gpu/drm/via/via_video.c6
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_drv.c2
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_drv.h2
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_fb.c2
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_kms.c1
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_resource.c2
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c20
-rw-r--r--drivers/hid/Kconfig20
-rw-r--r--drivers/hid/Makefile2
-rw-r--r--drivers/hid/hid-axff.c172
-rw-r--r--drivers/hid/hid-core.c30
-rw-r--r--drivers/hid/hid-debug.c2
-rw-r--r--drivers/hid/hid-elecom.c57
-rw-r--r--drivers/hid/hid-ids.h113
-rw-r--r--drivers/hid/hid-input.c24
-rw-r--r--drivers/hid/hid-magicmouse.c96
-rw-r--r--drivers/hid/hid-ntrig.c36
-rw-r--r--drivers/hid/hid-picolcd.c199
-rw-r--r--drivers/hid/hid-roccat-kone.c25
-rw-r--r--drivers/hid/hid-roccat-kone.h2
-rw-r--r--drivers/hid/hid-roccat.c9
-rw-r--r--drivers/hid/hid-roccat.h2
-rw-r--r--drivers/hid/hid-topseed.c5
-rw-r--r--drivers/hid/hid-wacom.c2
-rw-r--r--drivers/hid/hidraw.c2
-rw-r--r--drivers/hid/usbhid/hid-core.c13
-rw-r--r--drivers/hid/usbhid/hid-quirks.c4
-rw-r--r--drivers/hid/usbhid/hiddev.c54
-rw-r--r--drivers/hwmon/Kconfig10
-rw-r--r--drivers/hwmon/Makefile1
-rw-r--r--drivers/hwmon/coretemp.c32
-rw-r--r--drivers/hwmon/it87.c22
-rw-r--r--drivers/hwmon/jz4740-hwmon.c230
-rw-r--r--drivers/hwmon/k8temp.c10
-rw-r--r--drivers/hwmon/ultra45_env.c4
-rw-r--r--drivers/i2c/busses/i2c-cpm.c6
-rw-r--r--drivers/i2c/busses/i2c-i801.c8
-rw-r--r--drivers/i2c/busses/i2c-ibm_iic.c4
-rw-r--r--drivers/i2c/busses/i2c-mpc.c71
-rw-r--r--drivers/i2c/busses/i2c-sibyte.c4
-rw-r--r--drivers/i2c/i2c-core.c16
-rw-r--r--drivers/ide/ide-gd.c2
-rwxr-xr-xdrivers/idle/intel_idle.c2
-rw-r--r--drivers/infiniband/core/addr.c2
-rw-r--r--drivers/infiniband/hw/cxgb3/iwch_cm.c4
-rw-r--r--drivers/infiniband/hw/cxgb3/iwch_qp.c4
-rw-r--r--drivers/infiniband/hw/cxgb4/cm.c16
-rw-r--r--drivers/infiniband/hw/cxgb4/cq.c31
-rw-r--r--drivers/infiniband/hw/cxgb4/iw_cxgb4.h2
-rw-r--r--drivers/infiniband/hw/cxgb4/mem.c4
-rw-r--r--drivers/infiniband/hw/cxgb4/qp.c16
-rw-r--r--drivers/infiniband/hw/cxgb4/t4.h6
-rw-r--r--drivers/infiniband/hw/ehca/hcp_if.h2
-rw-r--r--drivers/infiniband/hw/ipath/ipath_file_ops.c2
-rw-r--r--drivers/infiniband/hw/nes/nes_cm.c2
-rw-r--r--drivers/infiniband/hw/nes/nes_nic.c8
-rw-r--r--drivers/infiniband/hw/qib/Makefile2
-rw-r--r--drivers/infiniband/hw/qib/qib.h1
-rw-r--r--drivers/infiniband/hw/qib/qib_7220.h7
-rw-r--r--drivers/infiniband/hw/qib/qib_7322_regs.h48
-rw-r--r--drivers/infiniband/hw/qib/qib_diag.c19
-rw-r--r--drivers/infiniband/hw/qib/qib_iba6120.c3
-rw-r--r--drivers/infiniband/hw/qib/qib_iba7322.c43
-rw-r--r--drivers/infiniband/hw/qib/qib_init.c21
-rw-r--r--drivers/infiniband/hw/qib/qib_pcie.c2
-rw-r--r--drivers/infiniband/hw/qib/qib_sd7220.c56
-rw-r--r--drivers/infiniband/hw/qib/qib_sd7220_img.c1081
-rw-r--r--drivers/infiniband/hw/qib/qib_tx.c6
-rw-r--r--drivers/infiniband/ulp/ipoib/ipoib_ethtool.c7
-rw-r--r--drivers/infiniband/ulp/ipoib/ipoib_main.c4
-rw-r--r--drivers/input/evdev.c54
-rw-r--r--drivers/input/input.c182
-rw-r--r--drivers/input/joydev.c7
-rw-r--r--drivers/input/joystick/gamecon.c5
-rw-r--r--drivers/input/joystick/xpad.c108
-rw-r--r--drivers/input/keyboard/Kconfig27
-rw-r--r--drivers/input/keyboard/Makefile2
-rw-r--r--drivers/input/keyboard/adp5588-keys.c351
-rw-r--r--drivers/input/keyboard/gpio_keys.c19
-rw-r--r--drivers/input/keyboard/lm8323.c12
-rw-r--r--drivers/input/keyboard/matrix_keypad.c108
-rw-r--r--drivers/input/keyboard/mcs_touchkey.c239
-rw-r--r--drivers/input/keyboard/samsung-keypad.c491
-rw-r--r--drivers/input/keyboard/twl4030_keypad.c17
-rw-r--r--drivers/input/keyboard/w90p910_keypad.c2
-rw-r--r--drivers/input/misc/Kconfig48
-rw-r--r--drivers/input/misc/Makefile4
-rw-r--r--drivers/input/misc/ad714x.c2
-rw-r--r--drivers/input/misc/adxl34x-i2c.c163
-rw-r--r--drivers/input/misc/adxl34x-spi.c145
-rw-r--r--drivers/input/misc/adxl34x.c915
-rw-r--r--drivers/input/misc/adxl34x.h30
-rw-r--r--drivers/input/misc/atlas_btns.c38
-rw-r--r--drivers/input/misc/pwm-beeper.c199
-rw-r--r--drivers/input/misc/sparcspkr.c12
-rw-r--r--drivers/input/misc/twl4030-pwrbutton.c12
-rw-r--r--drivers/input/misc/wistron_btns.c4
-rw-r--r--drivers/input/mouse/Kconfig2
-rw-r--r--drivers/input/mouse/bcm5974.c23
-rw-r--r--drivers/input/mouse/synaptics.c16
-rw-r--r--drivers/input/mouse/synaptics.h3
-rw-r--r--drivers/input/mousedev.c15
-rw-r--r--drivers/input/serio/Kconfig2
-rw-r--r--drivers/input/serio/i8042-io.h5
-rw-r--r--drivers/input/serio/i8042-ppcio.h75
-rw-r--r--drivers/input/serio/i8042-sparcio.h13
-rw-r--r--drivers/input/serio/i8042-x86ia64io.h17
-rw-r--r--drivers/input/serio/i8042.c65
-rw-r--r--drivers/input/tablet/wacom_wac.c44
-rw-r--r--drivers/input/tablet/wacom_wac.h1
-rw-r--r--drivers/input/touchscreen/Kconfig67
-rw-r--r--drivers/input/touchscreen/Makefile6
-rw-r--r--drivers/input/touchscreen/ad7879-i2c.c143
-rw-r--r--drivers/input/touchscreen/ad7879-spi.c198
-rw-r--r--drivers/input/touchscreen/ad7879.c625
-rw-r--r--drivers/input/touchscreen/ad7879.h30
-rw-r--r--drivers/input/touchscreen/ads7846.c206
-rw-r--r--drivers/input/touchscreen/cy8ctmg110_ts.c363
-rw-r--r--drivers/input/touchscreen/mcs5000_ts.c6
-rw-r--r--drivers/input/touchscreen/qt602240_ts.c1401
-rw-r--r--drivers/input/touchscreen/tps6507x-ts.c3
-rw-r--r--drivers/input/touchscreen/usbtouchscreen.c215
-rw-r--r--drivers/input/touchscreen/w90p910_ts.c2
-rw-r--r--drivers/input/xen-kbdfront.c2
-rw-r--r--drivers/isdn/capi/capi.c12
-rw-r--r--drivers/isdn/capi/capidrv.c7
-rw-r--r--drivers/isdn/divert/divert_procfs.c7
-rw-r--r--drivers/isdn/gigaset/Kconfig4
-rw-r--r--drivers/isdn/gigaset/bas-gigaset.c69
-rw-r--r--drivers/isdn/gigaset/capi.c66
-rw-r--r--drivers/isdn/gigaset/common.c2
-rw-r--r--drivers/isdn/gigaset/ev-layer.c226
-rw-r--r--drivers/isdn/gigaset/gigaset.h16
-rw-r--r--drivers/isdn/gigaset/i4l.c4
-rw-r--r--drivers/isdn/gigaset/interface.c37
-rw-r--r--drivers/isdn/gigaset/ser-gigaset.c27
-rw-r--r--drivers/isdn/gigaset/usb-gigaset.c29
-rw-r--r--drivers/isdn/hardware/eicon/divamnt.c7
-rw-r--r--drivers/isdn/hardware/eicon/divasi.c2
-rw-r--r--drivers/isdn/hardware/eicon/divasmain.c71
-rw-r--r--drivers/isdn/hardware/mISDN/avmfritz.c2
-rw-r--r--drivers/isdn/hardware/mISDN/hfcmulti.c13
-rw-r--r--drivers/isdn/hardware/mISDN/hfcpci.c94
-rw-r--r--drivers/isdn/hardware/mISDN/mISDNinfineon.c41
-rw-r--r--drivers/isdn/hardware/mISDN/speedfax.c2
-rw-r--r--drivers/isdn/hardware/mISDN/w6692.c2
-rw-r--r--drivers/isdn/hisax/callc.c2
-rw-r--r--drivers/isdn/hisax/config.c84
-rw-r--r--drivers/isdn/hisax/q931.c13
-rw-r--r--drivers/isdn/hisax/tei.c2
-rw-r--r--drivers/isdn/hysdn/hysdn_procconf.c21
-rw-r--r--drivers/isdn/hysdn/hysdn_proclog.c51
-rw-r--r--drivers/isdn/i4l/isdn_common.c27
-rw-r--r--drivers/isdn/i4l/isdn_net.c7
-rw-r--r--drivers/isdn/i4l/isdn_ppp.c13
-rw-r--r--drivers/isdn/i4l/isdn_tty.c6
-rw-r--r--drivers/isdn/mISDN/tei.c2
-rw-r--r--drivers/isdn/mISDN/timerdev.c7
-rw-r--r--drivers/isdn/pcbit/drv.c10
-rw-r--r--drivers/isdn/sc/ioctl.c23
-rw-r--r--drivers/leds/Kconfig9
-rw-r--r--drivers/leds/Makefile1
-rw-r--r--drivers/leds/leds-ns2.c338
-rw-r--r--drivers/macintosh/macio_sysfs.c5
-rw-r--r--drivers/media/IR/Kconfig35
-rw-r--r--drivers/media/IR/Makefile3
-rw-r--r--drivers/media/IR/imon.c11
-rw-r--r--drivers/media/IR/ir-core-priv.h54
-rw-r--r--drivers/media/IR/ir-jvc-decoder.c152
-rw-r--r--drivers/media/IR/ir-keytable.c5
-rw-r--r--drivers/media/IR/ir-lirc-codec.c278
-rw-r--r--drivers/media/IR/ir-nec-decoder.c151
-rw-r--r--drivers/media/IR/ir-raw-event.c167
-rw-r--r--drivers/media/IR/ir-rc5-decoder.c167
-rw-r--r--drivers/media/IR/ir-rc6-decoder.c153
-rw-r--r--drivers/media/IR/ir-sony-decoder.c155
-rw-r--r--drivers/media/IR/ir-sysfs.c251
-rw-r--r--drivers/media/IR/keymaps/Makefile4
-rw-r--r--drivers/media/IR/keymaps/rc-dib0700-nec.c124
-rw-r--r--drivers/media/IR/keymaps/rc-dib0700-rc5.c235
-rw-r--r--drivers/media/IR/keymaps/rc-lirc.c41
-rw-r--r--drivers/media/IR/keymaps/rc-rc6-mce.c105
-rw-r--r--drivers/media/IR/lirc_dev.c764
-rw-r--r--drivers/media/IR/mceusb.c1143
-rw-r--r--drivers/media/common/saa7146_fops.c2
-rw-r--r--drivers/media/common/saa7146_vbi.c4
-rw-r--r--drivers/media/common/saa7146_video.c4
-rw-r--r--drivers/media/common/tuners/tda18271-fe.c8
-rw-r--r--drivers/media/common/tuners/tuner-simple.c4
-rw-r--r--drivers/media/common/tuners/tuner-types.c16
-rw-r--r--drivers/media/common/tuners/xc5000.c59
-rw-r--r--drivers/media/dvb/bt8xx/dst_ca.c2
-rw-r--r--drivers/media/dvb/dvb-core/dmxdev.c2
-rw-r--r--drivers/media/dvb/dvb-core/dvb_ca_en50221.c10
-rw-r--r--drivers/media/dvb/dvb-core/dvb_demux.c10
-rw-r--r--drivers/media/dvb/dvb-core/dvb_frontend.c10
-rw-r--r--drivers/media/dvb/dvb-usb/a800.c12
-rw-r--r--drivers/media/dvb/dvb-usb/af9005-remote.c4
-rw-r--r--drivers/media/dvb/dvb-usb/af9005.c71
-rw-r--r--drivers/media/dvb/dvb-usb/af9005.h2
-rw-r--r--drivers/media/dvb/dvb-usb/af9015.c42
-rw-r--r--drivers/media/dvb/dvb-usb/af9015.h18
-rw-r--r--drivers/media/dvb/dvb-usb/anysee.c28
-rw-r--r--drivers/media/dvb/dvb-usb/az6027.c13
-rw-r--r--drivers/media/dvb/dvb-usb/cinergyT2-core.c12
-rw-r--r--drivers/media/dvb/dvb-usb/cxusb.c128
-rw-r--r--drivers/media/dvb/dvb-usb/dib0700.h1
-rw-r--r--drivers/media/dvb/dvb-usb/dib0700_core.c266
-rw-r--r--drivers/media/dvb/dvb-usb/dib0700_devices.c614
-rw-r--r--drivers/media/dvb/dvb-usb/dibusb-common.c2
-rw-r--r--drivers/media/dvb/dvb-usb/dibusb-mb.c40
-rw-r--r--drivers/media/dvb/dvb-usb/dibusb-mc.c10
-rw-r--r--drivers/media/dvb/dvb-usb/dibusb.h2
-rw-r--r--drivers/media/dvb/dvb-usb/digitv.c20
-rw-r--r--drivers/media/dvb/dvb-usb/dtt200u.c42
-rw-r--r--drivers/media/dvb/dvb-usb/dvb-usb-ids.h1
-rw-r--r--drivers/media/dvb/dvb-usb/dvb-usb-init.c60
-rw-r--r--drivers/media/dvb/dvb-usb/dvb-usb-remote.c198
-rw-r--r--drivers/media/dvb/dvb-usb/dvb-usb.h92
-rw-r--r--drivers/media/dvb/dvb-usb/dw2102.c67
-rw-r--r--drivers/media/dvb/dvb-usb/gp8psk-fe.c2
-rw-r--r--drivers/media/dvb/dvb-usb/m920x.c44
-rw-r--r--drivers/media/dvb/dvb-usb/nova-t-usb2.c14
-rw-r--r--drivers/media/dvb/dvb-usb/opera1.c16
-rw-r--r--drivers/media/dvb/dvb-usb/vp702x.c14
-rw-r--r--drivers/media/dvb/dvb-usb/vp7045.c14
-rw-r--r--drivers/media/dvb/frontends/Kconfig1
-rw-r--r--drivers/media/dvb/frontends/af9013.c52
-rw-r--r--drivers/media/dvb/frontends/af9013.h2
-rw-r--r--drivers/media/dvb/frontends/af9013_priv.h8
-rw-r--r--drivers/media/dvb/frontends/dib3000mb.c9
-rw-r--r--drivers/media/dvb/frontends/dib3000mb_priv.h4
-rw-r--r--drivers/media/dvb/frontends/dib3000mc.c2
-rw-r--r--drivers/media/dvb/frontends/lgdt3305.c267
-rw-r--r--drivers/media/dvb/frontends/lgdt3305.h10
-rw-r--r--drivers/media/dvb/frontends/lgs8gxx.c50
-rw-r--r--drivers/media/dvb/frontends/mb86a16.c1
-rw-r--r--drivers/media/dvb/frontends/tda10048.c43
-rw-r--r--drivers/media/dvb/mantis/Kconfig14
-rw-r--r--drivers/media/dvb/mantis/mantis_input.c5
-rw-r--r--drivers/media/dvb/siano/sms-cards.c2
-rw-r--r--drivers/media/dvb/siano/sms-cards.h2
-rw-r--r--drivers/media/dvb/siano/smscoreapi.c6
-rw-r--r--drivers/media/dvb/siano/smsir.c261
-rw-r--r--drivers/media/dvb/siano/smsir.h63
-rw-r--r--drivers/media/dvb/siano/smsusb.c3
-rw-r--r--drivers/media/radio/si470x/radio-si470x-common.c2
-rw-r--r--drivers/media/radio/si4713-i2c.c12
-rw-r--r--drivers/media/video/Kconfig196
-rw-r--r--drivers/media/video/Makefile10
-rw-r--r--drivers/media/video/ak881x.c6
-rw-r--r--drivers/media/video/au0828/Makefile2
-rw-r--r--drivers/media/video/au0828/au0828-vbi.c138
-rw-r--r--drivers/media/video/au0828/au0828-video.c443
-rw-r--r--drivers/media/video/au0828/au0828.h20
-rw-r--r--drivers/media/video/bt8xx/bttv-risc.c2
-rw-r--r--drivers/media/video/cpia_usb.c3
-rw-r--r--drivers/media/video/cx18/cx18-ioctl.c2
-rw-r--r--drivers/media/video/cx23885/cx23885-cards.c40
-rw-r--r--drivers/media/video/cx23885/cx23885-core.c11
-rw-r--r--drivers/media/video/cx23885/cx23885-dvb.c2
-rw-r--r--drivers/media/video/cx23885/cx23885-input.c317
-rw-r--r--drivers/media/video/cx23885/cx23885-ir.c2
-rw-r--r--drivers/media/video/cx23885/cx23885.h12
-rw-r--r--drivers/media/video/cx88/cx88-alsa.c37
-rw-r--r--drivers/media/video/cx88/cx88-cards.c9
-rw-r--r--drivers/media/video/cx88/cx88-core.c2
-rw-r--r--drivers/media/video/cx88/cx88-i2c.c6
-rw-r--r--drivers/media/video/cx88/cx88-input.c46
-rw-r--r--drivers/media/video/cx88/cx88.h1
-rw-r--r--drivers/media/video/dabusb.c13
-rw-r--r--drivers/media/video/davinci/Kconfig93
-rw-r--r--drivers/media/video/em28xx/em28xx-cards.c28
-rw-r--r--drivers/media/video/em28xx/em28xx-dvb.c33
-rw-r--r--drivers/media/video/em28xx/em28xx-input.c80
-rw-r--r--drivers/media/video/em28xx/em28xx-video.c4
-rw-r--r--drivers/media/video/em28xx/em28xx.h2
-rw-r--r--drivers/media/video/fsl-viu.c1632
-rw-r--r--drivers/media/video/gspca/Kconfig18
-rw-r--r--drivers/media/video/gspca/Makefile4
-rw-r--r--drivers/media/video/gspca/conex.c8
-rw-r--r--drivers/media/video/gspca/cpia1.c19
-rw-r--r--drivers/media/video/gspca/gl860/gl860-mi2020.c731
-rw-r--r--drivers/media/video/gspca/gl860/gl860-ov9655.c4
-rw-r--r--drivers/media/video/gspca/gl860/gl860.c42
-rw-r--r--drivers/media/video/gspca/gl860/gl860.h13
-rw-r--r--drivers/media/video/gspca/gspca.c340
-rw-r--r--drivers/media/video/gspca/gspca.h22
-rw-r--r--drivers/media/video/gspca/jeilinj.c6
-rw-r--r--drivers/media/video/gspca/m5602/m5602_bridge.h1
-rw-r--r--drivers/media/video/gspca/m5602/m5602_core.c15
-rw-r--r--drivers/media/video/gspca/m5602/m5602_s5k83a.c1
-rw-r--r--drivers/media/video/gspca/mars.c13
-rw-r--r--drivers/media/video/gspca/ov519.c28
-rw-r--r--drivers/media/video/gspca/ov534.c7
-rw-r--r--drivers/media/video/gspca/pac7302.c31
-rw-r--r--drivers/media/video/gspca/pac7311.c29
-rw-r--r--drivers/media/video/gspca/sn9c20x.c18
-rw-r--r--drivers/media/video/gspca/sonixb.c8
-rw-r--r--drivers/media/video/gspca/sonixj.c38
-rw-r--r--drivers/media/video/gspca/spca1528.c605
-rw-r--r--drivers/media/video/gspca/spca500.c13
-rw-r--r--drivers/media/video/gspca/sq930x.c1402
-rw-r--r--drivers/media/video/gspca/stk014.c17
-rw-r--r--drivers/media/video/gspca/stv06xx/stv06xx.h1
-rw-r--r--drivers/media/video/gspca/sunplus.c17
-rw-r--r--drivers/media/video/gspca/t613.c408
-rw-r--r--drivers/media/video/gspca/tv8532.c227
-rw-r--r--drivers/media/video/gspca/vc032x.c228
-rw-r--r--drivers/media/video/gspca/w996Xcf.c16
-rw-r--r--drivers/media/video/gspca/zc3xx.c92
-rw-r--r--drivers/media/video/hdpvr/hdpvr-core.c5
-rw-r--r--drivers/media/video/hdpvr/hdpvr-video.c4
-rw-r--r--drivers/media/video/ir-kbd-i2c.c14
-rw-r--r--drivers/media/video/ivtv/ivtv-driver.c14
-rw-r--r--drivers/media/video/ivtv/ivtv-driver.h4
-rw-r--r--drivers/media/video/ivtv/ivtv-fileops.c30
-rw-r--r--drivers/media/video/ivtv/ivtv-firmware.c122
-rw-r--r--drivers/media/video/ivtv/ivtv-firmware.h1
-rw-r--r--drivers/media/video/ivtv/ivtv-mailbox.c8
-rw-r--r--drivers/media/video/ivtv/ivtv-mailbox.h1
-rw-r--r--drivers/media/video/ivtv/ivtv-streams.c14
-rw-r--r--drivers/media/video/ivtv/ivtv-version.h2
-rw-r--r--drivers/media/video/ivtv/ivtvfb.c45
-rw-r--r--drivers/media/video/mem2mem_testdev.c7
-rw-r--r--drivers/media/video/mt9m111.c16
-rw-r--r--drivers/media/video/mt9t112.c12
-rw-r--r--drivers/media/video/mx2_camera.c1513
-rw-r--r--drivers/media/video/omap/Kconfig4
-rw-r--r--drivers/media/video/omap/Makefile4
-rw-r--r--drivers/media/video/omap/omap_vout.c81
-rw-r--r--drivers/media/video/omap24xxcam.c2
-rw-r--r--drivers/media/video/ov511.c5995
-rw-r--r--drivers/media/video/ov511.h573
-rw-r--r--drivers/media/video/ov772x.c8
-rw-r--r--drivers/media/video/ov9640.c14
-rw-r--r--drivers/media/video/ovcamchip/Makefile4
-rw-r--r--drivers/media/video/ovcamchip/ov6x20.c414
-rw-r--r--drivers/media/video/ovcamchip/ov6x30.c373
-rw-r--r--drivers/media/video/ovcamchip/ov76be.c302
-rw-r--r--drivers/media/video/ovcamchip/ov7x10.c334
-rw-r--r--drivers/media/video/ovcamchip/ov7x20.c454
-rw-r--r--drivers/media/video/ovcamchip/ovcamchip_core.c395
-rw-r--r--drivers/media/video/ovcamchip/ovcamchip_priv.h101
-rw-r--r--drivers/media/video/pvrusb2/pvrusb2-ioread.c5
-rw-r--r--drivers/media/video/pxa_camera.c10
-rw-r--r--drivers/media/video/rj54n1cb0c.c10
-rw-r--r--drivers/media/video/s2255drv.c724
-rw-r--r--drivers/media/video/saa7134/saa7134-alsa.c14
-rw-r--r--drivers/media/video/saa7134/saa7134-cards.c31
-rw-r--r--drivers/media/video/saa7134/saa7134-core.c2
-rw-r--r--drivers/media/video/saa7134/saa7134-dvb.c23
-rw-r--r--drivers/media/video/saa7134/saa7134.h1
-rw-r--r--drivers/media/video/sh_mobile_ceu_camera.c149
-rw-r--r--drivers/media/video/sh_mobile_csi2.c354
-rw-r--r--drivers/media/video/sh_vou.c65
-rw-r--r--drivers/media/video/soc_camera.c3
-rw-r--r--drivers/media/video/soc_camera_platform.c42
-rw-r--r--drivers/media/video/soc_mediabus.c8
-rw-r--r--drivers/media/video/stv680.c1565
-rw-r--r--drivers/media/video/stv680.h227
-rw-r--r--drivers/media/video/tlg2300/pd-main.c3
-rw-r--r--drivers/media/video/tveeprom.c15
-rw-r--r--drivers/media/video/tw9910.c8
-rw-r--r--drivers/media/video/usbvideo/Kconfig14
-rw-r--r--drivers/media/video/usbvideo/Makefile1
-rw-r--r--drivers/media/video/usbvideo/quickcam_messenger.c1126
-rw-r--r--drivers/media/video/usbvideo/quickcam_messenger.h112
-rw-r--r--drivers/media/video/usbvideo/vicam.c2
-rw-r--r--drivers/media/video/uvc/uvc_ctrl.c109
-rw-r--r--drivers/media/video/uvc/uvc_driver.c15
-rw-r--r--drivers/media/video/uvc/uvc_v4l2.c103
-rw-r--r--drivers/media/video/uvc/uvcvideo.h45
-rw-r--r--drivers/media/video/v4l2-compat-ioctl32.c2
-rw-r--r--drivers/media/video/v4l2-dev.c6
-rw-r--r--drivers/media/video/videobuf-core.c84
-rw-r--r--drivers/media/video/videobuf-dma-contig.c6
-rw-r--r--drivers/media/video/videobuf-dma-sg.c76
-rw-r--r--drivers/media/video/videobuf-vmalloc.c36
-rw-r--r--drivers/media/video/w9968cf.c3620
-rw-r--r--drivers/media/video/w9968cf.h333
-rw-r--r--drivers/media/video/w9968cf_decoder.h86
-rw-r--r--drivers/media/video/w9968cf_vpp.h40
-rw-r--r--drivers/media/video/zc0301/Kconfig15
-rw-r--r--drivers/media/video/zc0301/Makefile3
-rw-r--r--drivers/media/video/zc0301/zc0301.h196
-rw-r--r--drivers/media/video/zc0301/zc0301_core.c2098
-rw-r--r--drivers/media/video/zc0301/zc0301_pas202bcb.c362
-rw-r--r--drivers/media/video/zc0301/zc0301_pb0330.c188
-rw-r--r--drivers/media/video/zc0301/zc0301_sensor.h107
-rw-r--r--drivers/media/video/zoran/videocodec.c5
-rw-r--r--drivers/media/video/zoran/zoran.h2
-rw-r--r--drivers/media/video/zoran/zoran_device.c2
-rw-r--r--drivers/media/video/zoran/zr36050.c2
-rw-r--r--drivers/media/video/zoran/zr36060.c2
-rw-r--r--drivers/message/fusion/mptbase.c53
-rw-r--r--drivers/message/fusion/mptbase.h13
-rw-r--r--drivers/message/fusion/mptctl.c38
-rw-r--r--drivers/message/fusion/mptfc.c9
-rw-r--r--drivers/message/fusion/mptlan.c4
-rw-r--r--drivers/message/fusion/mptsas.c278
-rw-r--r--drivers/message/fusion/mptsas.h1
-rw-r--r--drivers/message/fusion/mptscsih.c54
-rw-r--r--drivers/message/fusion/mptspi.c9
-rw-r--r--drivers/misc/Kconfig10
-rw-r--r--drivers/misc/Makefile1
-rw-r--r--drivers/misc/arm-charlcd.c396
-rw-r--r--drivers/misc/cs5535-mfgpt.c2
-rw-r--r--drivers/misc/enclosure.c7
-rw-r--r--drivers/mmc/host/Kconfig9
-rw-r--r--drivers/mmc/host/Makefile1
-rw-r--r--drivers/mmc/host/jz4740_mmc.c1029
-rw-r--r--drivers/mmc/host/mmc_spi.c8
-rw-r--r--drivers/mmc/host/mmci.c156
-rw-r--r--drivers/mmc/host/mmci.h39
-rw-r--r--drivers/mmc/host/mxcmmc.c48
-rw-r--r--drivers/mmc/host/sdhci-s3c.c20
-rw-r--r--drivers/mtd/maps/Kconfig2
-rw-r--r--drivers/mtd/maps/redwood.c43
-rw-r--r--drivers/mtd/maps/sun_uflash.c4
-rw-r--r--drivers/mtd/nand/Kconfig6
-rw-r--r--drivers/mtd/nand/Makefile1
-rw-r--r--drivers/mtd/nand/denali.c2
-rw-r--r--drivers/mtd/nand/jz4740_nand.c516
-rw-r--r--drivers/mtd/nand/mxc_nand.c33
-rw-r--r--drivers/mtd/ubi/build.c3
-rw-r--r--drivers/mtd/ubi/eba.c49
-rw-r--r--drivers/mtd/ubi/io.c60
-rw-r--r--drivers/mtd/ubi/scan.c131
-rw-r--r--drivers/mtd/ubi/scan.h19
-rw-r--r--drivers/mtd/ubi/ubi.h10
-rw-r--r--drivers/net/3c527.c4
-rw-r--r--drivers/net/3c527.h6
-rw-r--r--drivers/net/3c59x.c392
-rw-r--r--drivers/net/8139cp.c2
-rw-r--r--drivers/net/8139too.c8
-rw-r--r--drivers/net/82596.c64
-rw-r--r--drivers/net/Kconfig47
-rw-r--r--drivers/net/Makefile6
-rw-r--r--drivers/net/Space.c6
-rw-r--r--drivers/net/ac3200.c2
-rw-r--r--drivers/net/appletalk/ipddp.c2
-rw-r--r--drivers/net/arcnet/capmode.c177
-rw-r--r--drivers/net/arcnet/com20020-isa.c4
-rw-r--r--drivers/net/arcnet/com90io.c2
-rw-r--r--drivers/net/arm/ixp4xx_eth.c14
-rw-r--r--drivers/net/arm/w90p910_ether.c3
-rw-r--r--drivers/net/at1700.c4
-rw-r--r--drivers/net/atl1c/atl1c.h9
-rw-r--r--drivers/net/atl1c/atl1c_hw.c107
-rw-r--r--drivers/net/atl1c/atl1c_hw.h49
-rw-r--r--drivers/net/atl1c/atl1c_main.c348
-rw-r--r--drivers/net/atlx/atl1.h4
-rw-r--r--drivers/net/au1000_eth.c33
-rw-r--r--drivers/net/ax88796.c4
-rw-r--r--drivers/net/b44.c146
-rw-r--r--drivers/net/bcm63xx_enet.c2
-rw-r--r--drivers/net/benet/be.h31
-rw-r--r--drivers/net/benet/be_cmds.c91
-rw-r--r--drivers/net/benet/be_cmds.h48
-rw-r--r--drivers/net/benet/be_ethtool.c58
-rw-r--r--drivers/net/benet/be_hw.h14
-rw-r--r--drivers/net/benet/be_main.c376
-rw-r--r--drivers/net/bfin_mac.c123
-rw-r--r--drivers/net/bfin_mac.h5
-rw-r--r--drivers/net/bnx2.c264
-rw-r--r--drivers/net/bnx2.h12
-rw-r--r--drivers/net/bnx2x/Makefile7
-rw-r--r--drivers/net/bnx2x/bnx2x.h (renamed from drivers/net/bnx2x.h)239
-rw-r--r--drivers/net/bnx2x/bnx2x_cmn.c2252
-rw-r--r--drivers/net/bnx2x/bnx2x_cmn.h652
-rw-r--r--drivers/net/bnx2x/bnx2x_dump.h (renamed from drivers/net/bnx2x_dump.h)0
-rw-r--r--drivers/net/bnx2x/bnx2x_ethtool.c1971
-rw-r--r--drivers/net/bnx2x/bnx2x_fw_defs.h (renamed from drivers/net/bnx2x_fw_defs.h)0
-rw-r--r--drivers/net/bnx2x/bnx2x_fw_file_hdr.h (renamed from drivers/net/bnx2x_fw_file_hdr.h)0
-rw-r--r--drivers/net/bnx2x/bnx2x_hsi.h (renamed from drivers/net/bnx2x_hsi.h)0
-rw-r--r--drivers/net/bnx2x/bnx2x_init.h (renamed from drivers/net/bnx2x_init.h)0
-rw-r--r--drivers/net/bnx2x/bnx2x_init_ops.h (renamed from drivers/net/bnx2x_init_ops.h)0
-rw-r--r--drivers/net/bnx2x/bnx2x_link.c (renamed from drivers/net/bnx2x_link.c)8
-rw-r--r--drivers/net/bnx2x/bnx2x_link.h (renamed from drivers/net/bnx2x_link.h)0
-rw-r--r--drivers/net/bnx2x/bnx2x_main.c (renamed from drivers/net/bnx2x_main.c)5966
-rw-r--r--drivers/net/bnx2x/bnx2x_reg.h (renamed from drivers/net/bnx2x_reg.h)0
-rw-r--r--drivers/net/bnx2x/bnx2x_stats.c1411
-rw-r--r--drivers/net/bnx2x/bnx2x_stats.h239
-rw-r--r--drivers/net/bonding/bond_alb.c42
-rw-r--r--drivers/net/bonding/bond_ipv6.c2
-rw-r--r--drivers/net/bonding/bond_main.c255
-rw-r--r--drivers/net/bonding/bond_sysfs.c316
-rw-r--r--drivers/net/bonding/bonding.h14
-rw-r--r--drivers/net/caif/Kconfig22
-rw-r--r--drivers/net/caif/Makefile14
-rw-r--r--drivers/net/caif/caif_serial.c12
-rw-r--r--drivers/net/caif/caif_spi.c850
-rw-r--r--drivers/net/caif/caif_spi_slave.c252
-rw-r--r--drivers/net/can/Kconfig9
-rw-r--r--drivers/net/can/Makefile1
-rw-r--r--drivers/net/can/flexcan.c1030
-rw-r--r--drivers/net/can/mscan/mscan.h2
-rw-r--r--drivers/net/can/usb/Kconfig6
-rw-r--r--drivers/net/can/usb/Makefile1
-rw-r--r--drivers/net/can/usb/ems_usb.c2
-rw-r--r--drivers/net/can/usb/esd_usb2.c1132
-rw-r--r--drivers/net/cassini.c25
-rw-r--r--drivers/net/cassini.h4
-rw-r--r--drivers/net/chelsio/common.h1
-rw-r--r--drivers/net/chelsio/subr.c49
-rw-r--r--drivers/net/cnic.c373
-rw-r--r--drivers/net/cnic.h23
-rw-r--r--drivers/net/cnic_if.h4
-rw-r--r--drivers/net/cpmac.c13
-rw-r--r--drivers/net/cris/eth_v10.c4
-rw-r--r--drivers/net/cs89x0.c162
-rw-r--r--drivers/net/cs89x0.h4
-rw-r--r--drivers/net/cxgb3/cxgb3_main.c12
-rw-r--r--drivers/net/cxgb3/sge.c14
-rw-r--r--drivers/net/cxgb3/t3_hw.c16
-rw-r--r--drivers/net/cxgb3/version.h4
-rw-r--r--drivers/net/cxgb4/cxgb4.h11
-rw-r--r--drivers/net/cxgb4/cxgb4_main.c755
-rw-r--r--drivers/net/cxgb4/cxgb4_uld.h6
-rw-r--r--drivers/net/cxgb4/l2t.c7
-rw-r--r--drivers/net/cxgb4/sge.c67
-rw-r--r--drivers/net/cxgb4/t4_hw.c109
-rw-r--r--drivers/net/cxgb4/t4_hw.h45
-rw-r--r--drivers/net/cxgb4/t4_msg.h16
-rw-r--r--drivers/net/cxgb4/t4_regs.h7
-rw-r--r--drivers/net/cxgb4/t4fw_api.h63
-rw-r--r--drivers/net/cxgb4vf/Makefile7
-rw-r--r--drivers/net/cxgb4vf/adapter.h540
-rw-r--r--drivers/net/cxgb4vf/cxgb4vf_main.c2888
-rw-r--r--drivers/net/cxgb4vf/sge.c2454
-rw-r--r--drivers/net/cxgb4vf/t4vf_common.h273
-rw-r--r--drivers/net/cxgb4vf/t4vf_defs.h121
-rw-r--r--drivers/net/cxgb4vf/t4vf_hw.c1333
-rw-r--r--drivers/net/davinci_emac.c200
-rw-r--r--drivers/net/declance.c6
-rw-r--r--drivers/net/depca.c29
-rw-r--r--drivers/net/dm9000.c2
-rw-r--r--drivers/net/dnet.c9
-rw-r--r--drivers/net/e1000/e1000.h22
-rw-r--r--drivers/net/e1000/e1000_ethtool.c27
-rw-r--r--drivers/net/e1000/e1000_main.c86
-rw-r--r--drivers/net/e1000e/82571.c2
-rw-r--r--drivers/net/e1000e/defines.h4
-rw-r--r--drivers/net/e1000e/e1000.h10
-rw-r--r--drivers/net/e1000e/es2lan.c2
-rw-r--r--drivers/net/e1000e/ethtool.c144
-rw-r--r--drivers/net/e1000e/hw.h17
-rw-r--r--drivers/net/e1000e/ich8lan.c456
-rw-r--r--drivers/net/e1000e/lib.c2
-rw-r--r--drivers/net/e1000e/netdev.c359
-rw-r--r--drivers/net/e1000e/param.c2
-rw-r--r--drivers/net/e1000e/phy.c5
-rw-r--r--drivers/net/ehea/ehea_main.c2
-rw-r--r--drivers/net/ehea/ehea_qmr.h2
-rw-r--r--drivers/net/enic/cq_desc.h2
-rw-r--r--drivers/net/enic/cq_enet_desc.h20
-rw-r--r--drivers/net/enic/enic.h21
-rw-r--r--drivers/net/enic/enic_main.c517
-rw-r--r--drivers/net/enic/enic_res.c53
-rw-r--r--drivers/net/enic/enic_res.h33
-rw-r--r--drivers/net/enic/rq_enet_desc.h2
-rw-r--r--drivers/net/enic/vnic_cq.c4
-rw-r--r--drivers/net/enic/vnic_cq.h2
-rw-r--r--drivers/net/enic/vnic_dev.c272
-rw-r--r--drivers/net/enic/vnic_dev.h21
-rw-r--r--drivers/net/enic/vnic_devcmd.h35
-rw-r--r--drivers/net/enic/vnic_enet.h4
-rw-r--r--drivers/net/enic/vnic_intr.c5
-rw-r--r--drivers/net/enic/vnic_intr.h8
-rw-r--r--drivers/net/enic/vnic_nic.h2
-rw-r--r--drivers/net/enic/vnic_resource.h2
-rw-r--r--drivers/net/enic/vnic_rq.c40
-rw-r--r--drivers/net/enic/vnic_rq.h16
-rw-r--r--drivers/net/enic/vnic_rss.h2
-rw-r--r--drivers/net/enic/vnic_stats.h2
-rw-r--r--drivers/net/enic/vnic_vic.c8
-rw-r--r--drivers/net/enic/vnic_vic.h2
-rw-r--r--drivers/net/enic/vnic_wq.c25
-rw-r--r--drivers/net/enic/vnic_wq.h16
-rw-r--r--drivers/net/enic/wq_enet_desc.h2
-rw-r--r--drivers/net/epic100.c47
-rw-r--r--drivers/net/eth16i.c4
-rw-r--r--drivers/net/ethoc.c160
-rw-r--r--drivers/net/fealnx.c68
-rw-r--r--drivers/net/fec.c110
-rw-r--r--drivers/net/fec_mpc52xx.c40
-rw-r--r--drivers/net/fec_mpc52xx_phy.c24
-rw-r--r--drivers/net/forcedeth.c62
-rw-r--r--drivers/net/fs_enet/fs_enet-main.c3
-rw-r--r--drivers/net/fsl_pq_mdio.c1
-rw-r--r--drivers/net/fsl_pq_mdio.h2
-rw-r--r--drivers/net/gianfar.c154
-rw-r--r--drivers/net/gianfar.h13
-rw-r--r--drivers/net/greth.c1
-rw-r--r--drivers/net/hamachi.c63
-rw-r--r--drivers/net/hp100.c55
-rw-r--r--drivers/net/ibm_newemac/core.c6
-rw-r--r--drivers/net/ibmveth.c4
-rw-r--r--drivers/net/igb/e1000_82575.c143
-rw-r--r--drivers/net/igb/e1000_defines.h16
-rw-r--r--drivers/net/igb/igb_ethtool.c8
-rw-r--r--drivers/net/igb/igb_main.c52
-rw-r--r--drivers/net/igbvf/netdev.c11
-rw-r--r--drivers/net/ioc3-eth.c49
-rw-r--r--drivers/net/irda/donauboe.h2
-rw-r--r--drivers/net/irda/irda-usb.h2
-rw-r--r--drivers/net/irda/ks959-sir.c2
-rw-r--r--drivers/net/irda/ksdazzle-sir.c2
-rw-r--r--drivers/net/irda/sh_irda.c2
-rw-r--r--drivers/net/irda/sh_sir.c2
-rw-r--r--drivers/net/irda/smsc-ircc2.c5
-rw-r--r--drivers/net/irda/vlsi_ir.h6
-rw-r--r--drivers/net/ixgbe/ixgbe.h9
-rw-r--r--drivers/net/ixgbe/ixgbe_82599.c18
-rw-r--r--drivers/net/ixgbe/ixgbe_common.h25
-rw-r--r--drivers/net/ixgbe/ixgbe_dcb_82599.c2
-rw-r--r--drivers/net/ixgbe/ixgbe_dcb_nl.c2
-rw-r--r--drivers/net/ixgbe/ixgbe_ethtool.c107
-rw-r--r--drivers/net/ixgbe/ixgbe_fcoe.c56
-rw-r--r--drivers/net/ixgbe/ixgbe_main.c451
-rw-r--r--drivers/net/ixgbe/ixgbe_phy.c33
-rw-r--r--drivers/net/ixgbe/ixgbe_phy.h1
-rw-r--r--drivers/net/ixgbe/ixgbe_sriov.c30
-rw-r--r--drivers/net/ixgbe/ixgbe_type.h2
-rw-r--r--drivers/net/ixgbevf/ixgbevf_main.c18
-rw-r--r--drivers/net/jazzsonic.c17
-rw-r--r--drivers/net/ks8842.c706
-rw-r--r--drivers/net/ksz884x.c61
-rw-r--r--drivers/net/lance.c56
-rw-r--r--drivers/net/ll_temac_main.c83
-rw-r--r--drivers/net/loopback.c33
-rw-r--r--drivers/net/mac8390.c57
-rw-r--r--drivers/net/mac89x0.c52
-rw-r--r--drivers/net/macb.c2
-rw-r--r--drivers/net/macsonic.c37
-rw-r--r--drivers/net/macvlan.c105
-rw-r--r--drivers/net/macvtap.c20
-rw-r--r--drivers/net/mlx4/catas.c4
-rw-r--r--drivers/net/mlx4/en_ethtool.c38
-rw-r--r--drivers/net/mlx4/en_main.c29
-rw-r--r--drivers/net/mlx4/en_netdev.c1
-rw-r--r--drivers/net/mlx4/eq.c20
-rw-r--r--drivers/net/mlx4/main.c16
-rw-r--r--drivers/net/mlx4/mlx4.h15
-rw-r--r--drivers/net/mlx4/mlx4_en.h62
-rw-r--r--drivers/net/mlx4/mr.c2
-rw-r--r--drivers/net/mv643xx_eth.c19
-rw-r--r--drivers/net/myri10ge/myri10ge.c10
-rw-r--r--drivers/net/myri_sbus.c6
-rw-r--r--drivers/net/natsemi.c56
-rw-r--r--drivers/net/ne.c4
-rw-r--r--drivers/net/netxen/netxen_nic_ctx.c16
-rw-r--r--drivers/net/netxen/netxen_nic_ethtool.c13
-rw-r--r--drivers/net/ni52.c37
-rw-r--r--drivers/net/niu.c28
-rw-r--r--drivers/net/niu.h4
-rw-r--r--drivers/net/ns83820.c44
-rw-r--r--drivers/net/octeon/octeon_mgmt.c8
-rw-r--r--drivers/net/pcmcia/axnet_cs.c7
-rw-r--r--drivers/net/phy/broadcom.c46
-rw-r--r--drivers/net/phy/icplus.c2
-rw-r--r--drivers/net/phy/marvell.c115
-rw-r--r--drivers/net/phy/mdio-octeon.c6
-rw-r--r--drivers/net/phy/micrel.c167
-rw-r--r--drivers/net/phy/phy.c8
-rw-r--r--drivers/net/phy/phy_device.c2
-rw-r--r--drivers/net/ppp_generic.c37
-rw-r--r--drivers/net/pppoe.c3
-rw-r--r--drivers/net/ps3_gelic_wireless.h10
-rw-r--r--drivers/net/qla3xxx.c1435
-rw-r--r--drivers/net/qlcnic/qlcnic.h225
-rw-r--r--drivers/net/qlcnic/qlcnic_ctx.c526
-rw-r--r--drivers/net/qlcnic/qlcnic_ethtool.c42
-rw-r--r--drivers/net/qlcnic/qlcnic_hdr.h78
-rw-r--r--drivers/net/qlcnic/qlcnic_hw.c62
-rw-r--r--drivers/net/qlcnic/qlcnic_init.c136
-rw-r--r--drivers/net/qlcnic/qlcnic_main.c1139
-rw-r--r--drivers/net/qlge/qlge.h30
-rw-r--r--drivers/net/qlge/qlge_dbg.c814
-rw-r--r--drivers/net/qlge/qlge_main.c58
-rw-r--r--drivers/net/qlge/qlge_mpi.c17
-rw-r--r--drivers/net/r6040.c302
-rw-r--r--drivers/net/r8169.c4
-rw-r--r--drivers/net/s2io-regs.h2
-rw-r--r--drivers/net/s2io.c184
-rw-r--r--drivers/net/s2io.h8
-rw-r--r--drivers/net/sb1250-mac.c3
-rw-r--r--drivers/net/sfc/efx.c304
-rw-r--r--drivers/net/sfc/efx.h9
-rw-r--r--drivers/net/sfc/ethtool.c167
-rw-r--r--drivers/net/sfc/falcon.c200
-rw-r--r--drivers/net/sfc/falcon_boards.c35
-rw-r--r--drivers/net/sfc/falcon_xmac.c5
-rw-r--r--drivers/net/sfc/io.h37
-rw-r--r--drivers/net/sfc/mcdi.c98
-rw-r--r--drivers/net/sfc/mcdi_mac.c8
-rw-r--r--drivers/net/sfc/mcdi_phy.c41
-rw-r--r--drivers/net/sfc/mdio_10g.c39
-rw-r--r--drivers/net/sfc/mdio_10g.h3
-rw-r--r--drivers/net/sfc/mtd.c23
-rw-r--r--drivers/net/sfc/net_driver.h88
-rw-r--r--drivers/net/sfc/nic.c553
-rw-r--r--drivers/net/sfc/nic.h9
-rw-r--r--drivers/net/sfc/qt202x_phy.c42
-rw-r--r--drivers/net/sfc/rx.c469
-rw-r--r--drivers/net/sfc/selftest.c154
-rw-r--r--drivers/net/sfc/siena.c68
-rw-r--r--drivers/net/sfc/tenxpress.c12
-rw-r--r--drivers/net/sfc/tx.c41
-rw-r--r--drivers/net/sfc/workarounds.h2
-rw-r--r--drivers/net/sh_eth.c57
-rw-r--r--drivers/net/sky2.c40
-rw-r--r--drivers/net/sky2.h6
-rw-r--r--drivers/net/smc91x.h37
-rw-r--r--drivers/net/smsc911x.c94
-rw-r--r--drivers/net/smsc9420.c2
-rw-r--r--drivers/net/starfire.c47
-rw-r--r--drivers/net/stmmac/common.h1
-rw-r--r--drivers/net/stmmac/dwmac1000.h2
-rw-r--r--drivers/net/stmmac/dwmac1000_core.c2
-rw-r--r--drivers/net/stmmac/dwmac100_core.c2
-rw-r--r--drivers/net/stmmac/enh_desc.c2
-rw-r--r--drivers/net/stmmac/stmmac_main.c37
-rw-r--r--drivers/net/sun3_82586.c35
-rw-r--r--drivers/net/sunbmac.c6
-rw-r--r--drivers/net/sunhme.c10
-rw-r--r--drivers/net/sunlance.c6
-rw-r--r--drivers/net/sunqe.c10
-rw-r--r--drivers/net/tc35815.c2
-rw-r--r--drivers/net/tehuti.h2
-rw-r--r--drivers/net/tg3.c799
-rw-r--r--drivers/net/tg3.h98
-rw-r--r--drivers/net/tulip/de2104x.c4
-rw-r--r--drivers/net/tulip/dmfe.c20
-rw-r--r--drivers/net/tulip/eeprom.c10
-rw-r--r--drivers/net/tulip/tulip.h64
-rw-r--r--drivers/net/tulip/tulip_core.c132
-rw-r--r--drivers/net/tulip/winbond-840.c4
-rw-r--r--drivers/net/tun.c24
-rw-r--r--drivers/net/typhoon.c2
-rw-r--r--drivers/net/typhoon.h26
-rw-r--r--drivers/net/ucc_geth.c16
-rw-r--r--drivers/net/ucc_geth.h46
-rw-r--r--drivers/net/usb/asix.c2
-rw-r--r--drivers/net/usb/cdc-phonet.c8
-rw-r--r--drivers/net/usb/hso.c8
-rw-r--r--drivers/net/usb/ipheth.c13
-rw-r--r--drivers/net/usb/kaweth.c2
-rw-r--r--drivers/net/usb/net1080.c4
-rw-r--r--drivers/net/usb/pegasus.c125
-rw-r--r--drivers/net/usb/pegasus.h296
-rw-r--r--drivers/net/usb/rndis_host.c18
-rw-r--r--drivers/net/usb/sierra_net.c2
-rw-r--r--drivers/net/usb/usbnet.c22
-rw-r--r--drivers/net/via-velocity.h12
-rw-r--r--drivers/net/virtio_net.c28
-rw-r--r--drivers/net/vmxnet3/vmxnet3_defs.h6
-rw-r--r--drivers/net/vmxnet3/vmxnet3_drv.c46
-rw-r--r--drivers/net/vmxnet3/vmxnet3_ethtool.c18
-rw-r--r--drivers/net/vmxnet3/vmxnet3_int.h4
-rw-r--r--drivers/net/vxge/Makefile2
-rw-r--r--drivers/net/vxge/vxge-config.c4
-rw-r--r--drivers/net/vxge/vxge-config.h4
-rw-r--r--drivers/net/vxge/vxge-ethtool.c4
-rw-r--r--drivers/net/vxge/vxge-ethtool.h4
-rw-r--r--drivers/net/vxge/vxge-main.c599
-rw-r--r--drivers/net/vxge/vxge-main.h27
-rw-r--r--drivers/net/vxge/vxge-reg.h4
-rw-r--r--drivers/net/vxge/vxge-traffic.c8
-rw-r--r--drivers/net/vxge/vxge-traffic.h4
-rw-r--r--drivers/net/vxge/vxge-version.h9
-rw-r--r--drivers/net/wan/cosa.c10
-rw-r--r--drivers/net/wan/farsync.c125
-rw-r--r--drivers/net/wan/hd64570.h2
-rw-r--r--drivers/net/wan/hdlc_cisco.c4
-rw-r--r--drivers/net/wan/hdlc_fr.c2
-rw-r--r--drivers/net/wan/sdla.c13
-rw-r--r--drivers/net/wd.c4
-rw-r--r--drivers/net/wimax/i2400m/control.c4
-rw-r--r--drivers/net/wimax/i2400m/fw.c8
-rw-r--r--drivers/net/wimax/i2400m/i2400m-usb.h1
-rw-r--r--drivers/net/wimax/i2400m/op-rfkill.c2
-rw-r--r--drivers/net/wimax/i2400m/usb.c2
-rw-r--r--drivers/net/wireless/adm8211.c58
-rw-r--r--drivers/net/wireless/adm8211.h6
-rw-r--r--drivers/net/wireless/airo.c56
-rw-r--r--drivers/net/wireless/at76c50x-usb.c270
-rw-r--r--drivers/net/wireless/at76c50x-usb.h41
-rw-r--r--drivers/net/wireless/ath/ar9170/cmd.c7
-rw-r--r--drivers/net/wireless/ath/ar9170/led.c4
-rw-r--r--drivers/net/wireless/ath/ar9170/main.c191
-rw-r--r--drivers/net/wireless/ath/ar9170/phy.c8
-rw-r--r--drivers/net/wireless/ath/ath5k/Makefile1
-rw-r--r--drivers/net/wireless/ath/ath5k/ani.c20
-rw-r--r--drivers/net/wireless/ath/ath5k/ath5k.h19
-rw-r--r--drivers/net/wireless/ath/ath5k/attach.c2
-rw-r--r--drivers/net/wireless/ath/ath5k/base.c438
-rw-r--r--drivers/net/wireless/ath/ath5k/base.h4
-rw-r--r--drivers/net/wireless/ath/ath5k/caps.c7
-rw-r--r--drivers/net/wireless/ath/ath5k/debug.c99
-rw-r--r--drivers/net/wireless/ath/ath5k/debug.h9
-rw-r--r--drivers/net/wireless/ath/ath5k/desc.c152
-rw-r--r--drivers/net/wireless/ath/ath5k/desc.h310
-rw-r--r--drivers/net/wireless/ath/ath5k/dma.c13
-rw-r--r--drivers/net/wireless/ath/ath5k/eeprom.c3
-rw-r--r--drivers/net/wireless/ath/ath5k/gpio.c7
-rw-r--r--drivers/net/wireless/ath/ath5k/pcu.c24
-rw-r--r--drivers/net/wireless/ath/ath5k/phy.c82
-rw-r--r--drivers/net/wireless/ath/ath5k/qcu.c9
-rw-r--r--drivers/net/wireless/ath/ath5k/reset.c64
-rw-r--r--drivers/net/wireless/ath/ath5k/sysfs.c116
-rw-r--r--drivers/net/wireless/ath/ath9k/Makefile3
-rw-r--r--drivers/net/wireless/ath/ath9k/ahb.c7
-rw-r--r--drivers/net/wireless/ath/ath9k/ani.c743
-rw-r--r--drivers/net/wireless/ath/ath9k/ani.h78
-rw-r--r--drivers/net/wireless/ath/ath9k/ar5008_initvals.h1319
-rw-r--r--drivers/net/wireless/ath/ath9k/ar5008_phy.c492
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9001_initvals.h2479
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9002_calib.c2
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9002_hw.c196
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9002_initvals.h8251
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9002_mac.c1
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9002_phy.c71
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9002_phy.h33
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_2p0_initvals.h (renamed from drivers/net/wireless/ath/ath9k/ar9003_initvals.h)254
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h1785
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_calib.c10
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_eeprom.c15
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_eeprom.h4
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_hw.c185
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_mac.c44
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_mac.h8
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_paprd.c714
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_phy.c699
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_phy.h298
-rw-r--r--drivers/net/wireless/ath/ath9k/ath9k.h93
-rw-r--r--drivers/net/wireless/ath/ath9k/beacon.c3
-rw-r--r--drivers/net/wireless/ath/ath9k/calib.c138
-rw-r--r--drivers/net/wireless/ath/ath9k/calib.h7
-rw-r--r--drivers/net/wireless/ath/ath9k/common.c318
-rw-r--r--drivers/net/wireless/ath/ath9k/common.h77
-rw-r--r--drivers/net/wireless/ath/ath9k/debug.c68
-rw-r--r--drivers/net/wireless/ath/ath9k/debug.h2
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom.c29
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom.h7
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_4k.c12
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_9287.c616
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_def.c14
-rw-r--r--drivers/net/wireless/ath/ath9k/gpio.c9
-rw-r--r--drivers/net/wireless/ath/ath9k/hif_usb.c79
-rw-r--r--drivers/net/wireless/ath/ath9k/hif_usb.h2
-rw-r--r--drivers/net/wireless/ath/ath9k/htc.h38
-rw-r--r--drivers/net/wireless/ath/ath9k/htc_drv_beacon.c23
-rw-r--r--drivers/net/wireless/ath/ath9k/htc_drv_init.c163
-rw-r--r--drivers/net/wireless/ath/ath9k/htc_drv_main.c512
-rw-r--r--drivers/net/wireless/ath/ath9k/htc_drv_txrx.c86
-rw-r--r--drivers/net/wireless/ath/ath9k/htc_hst.c3
-rw-r--r--drivers/net/wireless/ath/ath9k/hw-ops.h22
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c314
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h123
-rw-r--r--drivers/net/wireless/ath/ath9k/init.c61
-rw-r--r--drivers/net/wireless/ath/ath9k/mac.c14
-rw-r--r--drivers/net/wireless/ath/ath9k/mac.h16
-rw-r--r--drivers/net/wireless/ath/ath9k/main.c486
-rw-r--r--drivers/net/wireless/ath/ath9k/pci.c8
-rw-r--r--drivers/net/wireless/ath/ath9k/rc.c633
-rw-r--r--drivers/net/wireless/ath/ath9k/rc.h89
-rw-r--r--drivers/net/wireless/ath/ath9k/recv.c296
-rw-r--r--drivers/net/wireless/ath/ath9k/reg.h90
-rw-r--r--drivers/net/wireless/ath/ath9k/virtual.c8
-rw-r--r--drivers/net/wireless/ath/ath9k/wmi.c3
-rw-r--r--drivers/net/wireless/ath/ath9k/xmit.c251
-rw-r--r--drivers/net/wireless/b43/b43.h6
-rw-r--r--drivers/net/wireless/b43/dma.c69
-rw-r--r--drivers/net/wireless/b43/dma.h8
-rw-r--r--drivers/net/wireless/b43/main.c4
-rw-r--r--drivers/net/wireless/b43/phy_g.c2
-rw-r--r--drivers/net/wireless/b43/phy_lp.c8
-rw-r--r--drivers/net/wireless/b43/phy_n.c16
-rw-r--r--drivers/net/wireless/b43/sdio.c1
-rw-r--r--drivers/net/wireless/b43/wa.c8
-rw-r--r--drivers/net/wireless/b43/xmit.h20
-rw-r--r--drivers/net/wireless/b43legacy/b43legacy.h6
-rw-r--r--drivers/net/wireless/b43legacy/dma.c49
-rw-r--r--drivers/net/wireless/b43legacy/dma.h8
-rw-r--r--drivers/net/wireless/b43legacy/xmit.h10
-rw-r--r--drivers/net/wireless/hostap/hostap_80211.h18
-rw-r--r--drivers/net/wireless/hostap/hostap_ap.c5
-rw-r--r--drivers/net/wireless/hostap/hostap_common.h10
-rw-r--r--drivers/net/wireless/hostap/hostap_hw.c2
-rw-r--r--drivers/net/wireless/hostap/hostap_main.c4
-rw-r--r--drivers/net/wireless/hostap/hostap_pci.c1
-rw-r--r--drivers/net/wireless/hostap/hostap_wlan.h32
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2100.c34
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2100.h16
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2200.c7
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2200.h122
-rw-r--r--drivers/net/wireless/ipw2x00/libipw.h63
-rw-r--r--drivers/net/wireless/ipw2x00/libipw_module.c4
-rw-r--r--drivers/net/wireless/ipw2x00/libipw_tx.c16
-rw-r--r--drivers/net/wireless/ipw2x00/libipw_wx.c6
-rw-r--r--drivers/net/wireless/iwlwifi/Kconfig15
-rw-r--r--drivers/net/wireless/iwlwifi/Makefile4
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-1000.c12
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945-debugfs.c28
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945-fh.h4
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945-hw.h10
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945.c208
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-4965-hw.h2
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-4965.c98
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-5000.c80
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-6000.c538
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-calib.c (renamed from drivers/net/wireless/iwlwifi/iwl-calib.c)223
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-debugfs.c239
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-debugfs.h7
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c36
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-hw.h2
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-lib.c320
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-rs.c20
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-rx.c351
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-tx.c89
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-ucode.c123
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn.c594
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn.h48
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-calib.h6
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-commands.h422
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.c402
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.h44
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-csr.h1
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-debugfs.c144
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-dev.h123
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.c3
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.h17
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-fh.h13
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-hcmd.c1
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-helpers.h27
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-rx.c246
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-scan.c67
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-spectrum.h10
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-sta.c164
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-sta.h43
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-tx.c33
-rw-r--r--drivers/net/wireless/iwlwifi/iwl3945-base.c160
-rw-r--r--drivers/net/wireless/iwmc3200wifi/cfg80211.c12
-rw-r--r--drivers/net/wireless/iwmc3200wifi/commands.h50
-rw-r--r--drivers/net/wireless/iwmc3200wifi/hal.c2
-rw-r--r--drivers/net/wireless/iwmc3200wifi/iwm.h2
-rw-r--r--drivers/net/wireless/iwmc3200wifi/lmac.h32
-rw-r--r--drivers/net/wireless/iwmc3200wifi/rx.c4
-rw-r--r--drivers/net/wireless/iwmc3200wifi/umac.h60
-rw-r--r--drivers/net/wireless/libertas/Makefile3
-rw-r--r--drivers/net/wireless/libertas/README12
-rw-r--r--drivers/net/wireless/libertas/assoc.c2264
-rw-r--r--drivers/net/wireless/libertas/assoc.h155
-rw-r--r--drivers/net/wireless/libertas/cfg.c1861
-rw-r--r--drivers/net/wireless/libertas/cfg.h15
-rw-r--r--drivers/net/wireless/libertas/cmd.c767
-rw-r--r--drivers/net/wireless/libertas/cmd.h27
-rw-r--r--drivers/net/wireless/libertas/cmdresp.c190
-rw-r--r--drivers/net/wireless/libertas/debugfs.c191
-rw-r--r--drivers/net/wireless/libertas/decl.h7
-rw-r--r--drivers/net/wireless/libertas/defs.h18
-rw-r--r--drivers/net/wireless/libertas/dev.h68
-rw-r--r--drivers/net/wireless/libertas/ethtool.c29
-rw-r--r--drivers/net/wireless/libertas/host.h250
-rw-r--r--drivers/net/wireless/libertas/if_sdio.c58
-rw-r--r--drivers/net/wireless/libertas/if_usb.c16
-rw-r--r--drivers/net/wireless/libertas/main.c326
-rw-r--r--drivers/net/wireless/libertas/mesh.c222
-rw-r--r--drivers/net/wireless/libertas/mesh.h19
-rw-r--r--drivers/net/wireless/libertas/radiotap.h4
-rw-r--r--drivers/net/wireless/libertas/rx.c129
-rw-r--r--drivers/net/wireless/libertas/scan.c1354
-rw-r--r--drivers/net/wireless/libertas/scan.h63
-rw-r--r--drivers/net/wireless/libertas/tx.c12
-rw-r--r--drivers/net/wireless/libertas/types.h66
-rw-r--r--drivers/net/wireless/libertas/wext.c2353
-rw-r--r--drivers/net/wireless/libertas/wext.h17
-rw-r--r--drivers/net/wireless/libertas_tf/if_usb.c5
-rw-r--r--drivers/net/wireless/libertas_tf/libertas_tf.h7
-rw-r--r--drivers/net/wireless/libertas_tf/main.c18
-rw-r--r--drivers/net/wireless/mac80211_hwsim.c106
-rw-r--r--drivers/net/wireless/mwl8k.c254
-rw-r--r--drivers/net/wireless/orinoco/cfg.c5
-rw-r--r--drivers/net/wireless/orinoco/fw.c2
-rw-r--r--drivers/net/wireless/orinoco/hermes.h18
-rw-r--r--drivers/net/wireless/orinoco/hermes_dld.c10
-rw-r--r--drivers/net/wireless/orinoco/hw.c6
-rw-r--r--drivers/net/wireless/orinoco/main.c10
-rw-r--r--drivers/net/wireless/orinoco/orinoco.h2
-rw-r--r--drivers/net/wireless/orinoco/orinoco_usb.c18
-rw-r--r--drivers/net/wireless/orinoco/wext.c6
-rw-r--r--drivers/net/wireless/p54/eeprom.c80
-rw-r--r--drivers/net/wireless/p54/fwio.c53
-rw-r--r--drivers/net/wireless/p54/led.c8
-rw-r--r--drivers/net/wireless/p54/main.c17
-rw-r--r--drivers/net/wireless/p54/net2280.h16
-rw-r--r--drivers/net/wireless/p54/p54pci.c3
-rw-r--r--drivers/net/wireless/p54/p54pci.h6
-rw-r--r--drivers/net/wireless/p54/p54spi.c5
-rw-r--r--drivers/net/wireless/p54/p54spi.h2
-rw-r--r--drivers/net/wireless/p54/p54usb.c6
-rw-r--r--drivers/net/wireless/p54/p54usb.h6
-rw-r--r--drivers/net/wireless/p54/txrx.c36
-rw-r--r--drivers/net/wireless/prism54/isl_ioctl.c15
-rw-r--r--drivers/net/wireless/prism54/isl_oid.h18
-rw-r--r--drivers/net/wireless/prism54/islpci_eth.h4
-rw-r--r--drivers/net/wireless/prism54/islpci_mgt.h2
-rw-r--r--drivers/net/wireless/ray_cs.c23
-rw-r--r--drivers/net/wireless/rndis_wlan.c90
-rw-r--r--drivers/net/wireless/rt2x00/rt2400pci.c85
-rw-r--r--drivers/net/wireless/rt2x00/rt2500pci.c87
-rw-r--r--drivers/net/wireless/rt2x00/rt2500usb.c63
-rw-r--r--drivers/net/wireless/rt2x00/rt2800.h93
-rw-r--r--drivers/net/wireless/rt2x00/rt2800lib.c734
-rw-r--r--drivers/net/wireless/rt2x00/rt2800lib.h54
-rw-r--r--drivers/net/wireless/rt2x00/rt2800pci.c366
-rw-r--r--drivers/net/wireless/rt2x00/rt2800pci.h19
-rw-r--r--drivers/net/wireless/rt2x00/rt2800usb.c293
-rw-r--r--drivers/net/wireless/rt2x00/rt2800usb.h37
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00.h69
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00config.c16
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00debug.c1
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00dev.c149
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00dump.h9
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00ht.c47
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00lib.h52
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00link.c73
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00mac.c75
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00pci.c39
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00pci.h10
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00queue.c90
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00queue.h20
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00reg.h5
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00usb.c118
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00usb.h39
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.c130
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.h4
-rw-r--r--drivers/net/wireless/rt2x00/rt73usb.c59
-rw-r--r--drivers/net/wireless/rt2x00/rt73usb.h4
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180.h4
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180_dev.c34
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180_grf5101.c12
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180_max2820.c19
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180_rtl8225.c5
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180_sa2400.c28
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187.h8
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187_dev.c11
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187_rtl8225.c8
-rw-r--r--drivers/net/wireless/rtl818x/rtl818x.h3
-rw-r--r--drivers/net/wireless/wl12xx/Kconfig4
-rw-r--r--drivers/net/wireless/wl12xx/Makefile2
-rw-r--r--drivers/net/wireless/wl12xx/wl1251.h3
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_acx.h102
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_boot.c8
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_cmd.h34
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_event.h4
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_main.c27
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_rx.c6
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_rx.h2
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_sdio.c40
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_spi.c1
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_tx.c10
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_tx.h14
-rw-r--r--drivers/net/wireless/wl12xx/wl1271.h58
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_acx.c41
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_acx.h117
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_boot.c4
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_cmd.c275
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_cmd.h124
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_conf.h16
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_event.c99
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_event.h5
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_ini.h123
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_main.c289
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_rx.c11
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_rx.h2
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_scan.c257
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_scan.h109
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_sdio.c2
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_spi.c1
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_testmode.c11
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_tx.c36
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_tx.h7
-rw-r--r--drivers/net/wireless/wl12xx/wl12xx_80211.h26
-rw-r--r--drivers/net/wireless/wl3501.h16
-rw-r--r--drivers/net/wireless/zd1211rw/zd_mac.c5
-rw-r--r--drivers/net/wireless/zd1211rw/zd_mac.h15
-rw-r--r--drivers/net/wireless/zd1211rw/zd_usb.c2
-rw-r--r--drivers/net/wireless/zd1211rw/zd_usb.h14
-rw-r--r--drivers/net/xen-netfront.c1
-rw-r--r--drivers/net/xilinx_emaclite.c2
-rw-r--r--drivers/net/xtsonic.c12
-rw-r--r--drivers/of/Kconfig40
-rw-r--r--drivers/of/Makefile2
-rw-r--r--drivers/of/address.c595
-rw-r--r--drivers/of/base.c76
-rw-r--r--drivers/of/device.c91
-rw-r--r--drivers/of/fdt.c26
-rw-r--r--drivers/of/gpio.c93
-rw-r--r--drivers/of/irq.c349
-rw-r--r--drivers/of/of_i2c.c50
-rw-r--r--drivers/of/of_mdio.c1
-rw-r--r--drivers/of/of_spi.c11
-rw-r--r--drivers/of/platform.c384
-rw-r--r--drivers/parisc/ccio-dma.c4
-rw-r--r--drivers/parisc/led.c9
-rw-r--r--drivers/parport/parport_sunbpp.c6
-rw-r--r--drivers/pci/pci-acpi.c1
-rw-r--r--drivers/pci/pci.c20
-rw-r--r--drivers/pci/pci.h1
-rw-r--r--drivers/pci/pcie/pme/pcie_pme.c5
-rw-r--r--drivers/pci/setup-res.c32
-rw-r--r--drivers/pcmcia/Kconfig4
-rw-r--r--drivers/pcmcia/ds.c3
-rw-r--r--drivers/pcmcia/pcmcia_resource.c4
-rw-r--r--drivers/pcmcia/pxa2xx_base.c5
-rw-r--r--drivers/pcmcia/sa11xx_base.c2
-rw-r--r--drivers/platform/x86/Kconfig44
-rw-r--r--drivers/platform/x86/Makefile4
-rw-r--r--drivers/platform/x86/acer-wmi.c79
-rw-r--r--drivers/platform/x86/acerhdf.c151
-rw-r--r--drivers/platform/x86/asus-laptop.c29
-rw-r--r--drivers/platform/x86/asus_acpi.c7
-rw-r--r--drivers/platform/x86/classmate-laptop.c13
-rw-r--r--drivers/platform/x86/compal-laptop.c929
-rw-r--r--drivers/platform/x86/dell-laptop.c9
-rw-r--r--drivers/platform/x86/dell-wmi.c11
-rw-r--r--drivers/platform/x86/eeepc-laptop.c2
-rw-r--r--drivers/platform/x86/fujitsu-laptop.c16
-rw-r--r--drivers/platform/x86/hp-wmi.c281
-rw-r--r--drivers/platform/x86/intel_ips.c1660
-rw-r--r--drivers/platform/x86/intel_menlow.c33
-rw-r--r--drivers/platform/x86/intel_pmic_gpio.c340
-rw-r--r--drivers/platform/x86/intel_rar_register.c (renamed from drivers/staging/rar_register/rar_register.c)8
-rw-r--r--drivers/platform/x86/intel_scu_ipc.c190
-rw-r--r--drivers/platform/x86/msi-laptop.c8
-rw-r--r--drivers/platform/x86/msi-wmi.c2
-rw-r--r--drivers/platform/x86/panasonic-laptop.c7
-rw-r--r--drivers/platform/x86/sony-laptop.c13
-rw-r--r--drivers/platform/x86/thinkpad_acpi.c73
-rw-r--r--drivers/platform/x86/toshiba_acpi.c135
-rw-r--r--drivers/platform/x86/wmi.c28
-rw-r--r--drivers/pnp/core.c3
-rw-r--r--drivers/pnp/pnpacpi/core.c23
-rw-r--r--drivers/power/Kconfig11
-rw-r--r--drivers/power/Makefile1
-rw-r--r--drivers/power/ds2782_battery.c31
-rw-r--r--drivers/power/jz4740-battery.c445
-rw-r--r--drivers/rapidio/rio.c2
-rw-r--r--drivers/regulator/ab3100.c4
-rw-r--r--drivers/regulator/tps6507x-regulator.c36
-rw-r--r--drivers/regulator/wm8350-regulator.c2
-rw-r--r--drivers/rtc/Kconfig13
-rw-r--r--drivers/rtc/Makefile1
-rw-r--r--drivers/rtc/rtc-fm3130.c2
-rw-r--r--drivers/rtc/rtc-jz4740.c345
-rw-r--r--drivers/rtc/rtc-pl031.c2
-rw-r--r--drivers/rtc/rtc-rx8025.c2
-rw-r--r--drivers/rtc/rtc-rx8581.c20
-rw-r--r--drivers/s390/block/dasd_devmap.c4
-rw-r--r--drivers/s390/cio/chsc.c2
-rw-r--r--drivers/s390/cio/qdio_setup.c2
-rw-r--r--drivers/s390/net/claw.c2
-rw-r--r--drivers/s390/net/qeth_core.h27
-rw-r--r--drivers/s390/net/qeth_core_main.c423
-rw-r--r--drivers/s390/net/qeth_core_mpc.h5
-rw-r--r--drivers/s390/net/qeth_core_sys.c5
-rw-r--r--drivers/s390/net/qeth_l2_main.c108
-rw-r--r--drivers/s390/net/qeth_l3.h1
-rw-r--r--drivers/s390/net/qeth_l3_main.c262
-rw-r--r--drivers/s390/net/qeth_l3_sys.c14
-rw-r--r--drivers/s390/net/smsgiucv.c11
-rw-r--r--drivers/s390/scsi/zfcp_aux.c10
-rw-r--r--drivers/s390/scsi/zfcp_cfdc.c12
-rw-r--r--drivers/s390/scsi/zfcp_dbf.c5
-rw-r--r--drivers/s390/scsi/zfcp_dbf.h1
-rw-r--r--drivers/s390/scsi/zfcp_def.h5
-rw-r--r--drivers/s390/scsi/zfcp_erp.c32
-rw-r--r--drivers/s390/scsi/zfcp_ext.h11
-rw-r--r--drivers/s390/scsi/zfcp_fc.c54
-rw-r--r--drivers/s390/scsi/zfcp_fc.h27
-rw-r--r--drivers/s390/scsi/zfcp_fsf.c179
-rw-r--r--drivers/s390/scsi/zfcp_fsf.h34
-rw-r--r--drivers/s390/scsi/zfcp_qdio.c214
-rw-r--r--drivers/s390/scsi/zfcp_qdio.h95
-rw-r--r--drivers/s390/scsi/zfcp_scsi.c103
-rw-r--r--drivers/s390/scsi/zfcp_sysfs.c12
-rw-r--r--drivers/sbus/char/bbc_i2c.c10
-rw-r--r--drivers/sbus/char/display7seg.c12
-rw-r--r--drivers/sbus/char/envctrl.c6
-rw-r--r--drivers/sbus/char/flash.c19
-rw-r--r--drivers/sbus/char/openprom.c19
-rw-r--r--drivers/sbus/char/uctrl.c13
-rw-r--r--drivers/scsi/Kconfig4
-rw-r--r--drivers/scsi/Makefile1
-rw-r--r--drivers/scsi/aacraid/linit.c14
-rw-r--r--drivers/scsi/advansys.c2
-rw-r--r--drivers/scsi/aic7xxx/aic7770.c12
-rw-r--r--drivers/scsi/aic7xxx/aic7770_osm.c2
-rw-r--r--drivers/scsi/aic7xxx/aic79xx_core.c624
-rw-r--r--drivers/scsi/aic7xxx/aic79xx_osm.c108
-rw-r--r--drivers/scsi/aic7xxx/aic79xx_osm.h7
-rw-r--r--drivers/scsi/aic7xxx/aic79xx_osm_pci.c8
-rw-r--r--drivers/scsi/aic7xxx/aic79xx_pci.c56
-rw-r--r--drivers/scsi/aic7xxx/aic79xx_proc.c13
-rw-r--r--drivers/scsi/aic7xxx/aic7xxx_93cx6.c10
-rw-r--r--drivers/scsi/aic7xxx/aic7xxx_core.c430
-rw-r--r--drivers/scsi/aic7xxx/aic7xxx_osm.c76
-rw-r--r--drivers/scsi/aic7xxx/aic7xxx_osm.h7
-rw-r--r--drivers/scsi/aic7xxx/aic7xxx_osm_pci.c8
-rw-r--r--drivers/scsi/aic7xxx/aic7xxx_pci.c74
-rw-r--r--drivers/scsi/aic7xxx/aic7xxx_proc.c15
-rw-r--r--drivers/scsi/aic7xxx_old/aic7xxx.seq2
-rw-r--r--drivers/scsi/aic94xx/aic94xx_seq.c4
-rw-r--r--drivers/scsi/aic94xx/aic94xx_task.c2
-rw-r--r--drivers/scsi/arcmsr/arcmsr.h315
-rw-r--r--drivers/scsi/arcmsr/arcmsr_hba.c2309
-rw-r--r--drivers/scsi/be2iscsi/Kconfig2
-rw-r--r--drivers/scsi/be2iscsi/be.h6
-rw-r--r--drivers/scsi/be2iscsi/be_cmds.c116
-rw-r--r--drivers/scsi/be2iscsi/be_cmds.h27
-rw-r--r--drivers/scsi/be2iscsi/be_iscsi.c199
-rw-r--r--drivers/scsi/be2iscsi/be_iscsi.h2
-rw-r--r--drivers/scsi/be2iscsi/be_main.c333
-rw-r--r--drivers/scsi/be2iscsi/be_main.h29
-rw-r--r--drivers/scsi/be2iscsi/be_mgmt.c64
-rw-r--r--drivers/scsi/be2iscsi/be_mgmt.h19
-rw-r--r--drivers/scsi/bfa/Makefile2
-rw-r--r--drivers/scsi/bfa/bfa_cb_ioim_macros.h7
-rw-r--r--drivers/scsi/bfa/bfa_core.c3
-rw-r--r--drivers/scsi/bfa/bfa_fcpim.c29
-rw-r--r--drivers/scsi/bfa/bfa_fcpim_priv.h6
-rw-r--r--drivers/scsi/bfa/bfa_fcport.c139
-rw-r--r--drivers/scsi/bfa/bfa_fcs.c20
-rw-r--r--drivers/scsi/bfa/bfa_fcs_lport.c3
-rw-r--r--drivers/scsi/bfa/bfa_fcxp.c14
-rw-r--r--drivers/scsi/bfa/bfa_fwimg_priv.h25
-rw-r--r--drivers/scsi/bfa/bfa_hw_cb.c7
-rw-r--r--drivers/scsi/bfa/bfa_hw_ct.c7
-rw-r--r--drivers/scsi/bfa/bfa_intr.c1
-rw-r--r--drivers/scsi/bfa/bfa_ioc.c172
-rw-r--r--drivers/scsi/bfa/bfa_ioc.h12
-rw-r--r--drivers/scsi/bfa/bfa_ioc_cb.c36
-rw-r--r--drivers/scsi/bfa/bfa_ioc_ct.c71
-rw-r--r--drivers/scsi/bfa/bfa_iocfc.c107
-rw-r--r--drivers/scsi/bfa/bfa_iocfc.h19
-rw-r--r--drivers/scsi/bfa/bfa_ioim.c65
-rw-r--r--drivers/scsi/bfa/bfa_log_module.c86
-rw-r--r--drivers/scsi/bfa/bfa_lps.c6
-rw-r--r--drivers/scsi/bfa/bfa_port.c31
-rw-r--r--drivers/scsi/bfa/bfa_port_priv.h7
-rw-r--r--drivers/scsi/bfa/bfa_priv.h3
-rw-r--r--drivers/scsi/bfa/bfa_rport.c5
-rw-r--r--drivers/scsi/bfa/bfa_sgpg.c5
-rw-r--r--drivers/scsi/bfa/bfa_uf.c10
-rw-r--r--drivers/scsi/bfa/bfad.c114
-rw-r--r--drivers/scsi/bfa/bfad_attr.c46
-rw-r--r--drivers/scsi/bfa/bfad_debugfs.c547
-rw-r--r--drivers/scsi/bfa/bfad_drv.h36
-rw-r--r--drivers/scsi/bfa/bfad_fwimg.c76
-rw-r--r--drivers/scsi/bfa/bfad_im.c33
-rw-r--r--drivers/scsi/bfa/bfad_im_compat.h13
-rw-r--r--drivers/scsi/bfa/bfad_intr.c8
-rw-r--r--drivers/scsi/bfa/fabric.c44
-rw-r--r--drivers/scsi/bfa/fcpim.c32
-rw-r--r--drivers/scsi/bfa/fcs_fabric.h5
-rw-r--r--drivers/scsi/bfa/fcs_rport.h3
-rw-r--r--drivers/scsi/bfa/fcs_vport.h1
-rw-r--r--drivers/scsi/bfa/fdmi.c6
-rw-r--r--drivers/scsi/bfa/include/aen/bfa_aen_ioc.h8
-rw-r--r--drivers/scsi/bfa/include/bfa.h4
-rw-r--r--drivers/scsi/bfa/include/bfa_fcpim.h20
-rw-r--r--drivers/scsi/bfa/include/bfa_svc.h1
-rw-r--r--drivers/scsi/bfa/include/bfi/bfi_ctreg.h3
-rw-r--r--drivers/scsi/bfa/include/bfi/bfi_ioc.h20
-rw-r--r--drivers/scsi/bfa/include/bfi/bfi_iocfc.h2
-rw-r--r--drivers/scsi/bfa/include/bfi/bfi_pbc.h62
-rw-r--r--drivers/scsi/bfa/include/cna/port/bfa_port.h1
-rw-r--r--drivers/scsi/bfa/include/cs/bfa_debug.h3
-rw-r--r--drivers/scsi/bfa/include/defs/bfa_defs_adapter.h3
-rw-r--r--drivers/scsi/bfa/include/defs/bfa_defs_auth.h6
-rw-r--r--drivers/scsi/bfa/include/defs/bfa_defs_boot.h10
-rw-r--r--drivers/scsi/bfa/include/defs/bfa_defs_driver.h2
-rw-r--r--drivers/scsi/bfa/include/defs/bfa_defs_fcport.h26
-rw-r--r--drivers/scsi/bfa/include/defs/bfa_defs_ioc.h7
-rw-r--r--drivers/scsi/bfa/include/defs/bfa_defs_iocfc.h12
-rw-r--r--drivers/scsi/bfa/include/defs/bfa_defs_itnim.h10
-rw-r--r--drivers/scsi/bfa/include/defs/bfa_defs_mfg.h41
-rw-r--r--drivers/scsi/bfa/include/defs/bfa_defs_pci.h11
-rw-r--r--drivers/scsi/bfa/include/defs/bfa_defs_port.h14
-rw-r--r--drivers/scsi/bfa/include/defs/bfa_defs_pport.h29
-rw-r--r--drivers/scsi/bfa/include/defs/bfa_defs_status.h46
-rw-r--r--drivers/scsi/bfa/include/fcb/bfa_fcb_vport.h3
-rw-r--r--drivers/scsi/bfa/include/fcs/bfa_fcs.h4
-rw-r--r--drivers/scsi/bfa/include/fcs/bfa_fcs_fcpim.h1
-rw-r--r--drivers/scsi/bfa/include/fcs/bfa_fcs_rport.h1
-rw-r--r--drivers/scsi/bfa/include/fcs/bfa_fcs_vport.h4
-rw-r--r--drivers/scsi/bfa/include/log/bfa_log_linux.h6
-rw-r--r--drivers/scsi/bfa/include/protocol/fc.h1
-rw-r--r--drivers/scsi/bfa/lport_api.c30
-rw-r--r--drivers/scsi/bfa/ms.c9
-rw-r--r--drivers/scsi/bfa/ns.c14
-rw-r--r--drivers/scsi/bfa/rport.c88
-rw-r--r--drivers/scsi/bfa/rport_api.c11
-rw-r--r--drivers/scsi/bfa/rport_ftrs.c14
-rw-r--r--drivers/scsi/bfa/scn.c2
-rw-r--r--drivers/scsi/bfa/vport.c56
-rw-r--r--drivers/scsi/bnx2i/bnx2i.h14
-rw-r--r--drivers/scsi/bnx2i/bnx2i_hwi.c4
-rw-r--r--drivers/scsi/bnx2i/bnx2i_init.c37
-rw-r--r--drivers/scsi/bnx2i/bnx2i_iscsi.c236
-rw-r--r--drivers/scsi/cxgb3i/cxgb3i_ddp.c2
-rw-r--r--drivers/scsi/cxgb3i/cxgb3i_offload.c9
-rw-r--r--drivers/scsi/device_handler/scsi_dh_rdac.c1
-rw-r--r--drivers/scsi/dpt_i2o.c26
-rw-r--r--drivers/scsi/fcoe/fcoe.c154
-rw-r--r--drivers/scsi/fcoe/libfcoe.c1519
-rw-r--r--drivers/scsi/fnic/fnic_main.c11
-rw-r--r--drivers/scsi/fnic/fnic_scsi.c22
-rw-r--r--drivers/scsi/hosts.c14
-rw-r--r--drivers/scsi/hpsa.c754
-rw-r--r--drivers/scsi/hpsa.h1
-rw-r--r--drivers/scsi/hpsa_cmd.h4
-rw-r--r--drivers/scsi/hptiop.c2
-rw-r--r--drivers/scsi/ibmvscsi/ibmvfc.c85
-rw-r--r--drivers/scsi/ibmvscsi/ibmvfc.h6
-rw-r--r--drivers/scsi/ibmvscsi/ibmvscsi.c157
-rw-r--r--drivers/scsi/ibmvscsi/ibmvscsi.h4
-rw-r--r--drivers/scsi/ibmvscsi/ibmvstgt.c4
-rw-r--r--drivers/scsi/ibmvscsi/rpa_vscsi.c29
-rw-r--r--drivers/scsi/ipr.c199
-rw-r--r--drivers/scsi/ipr.h35
-rw-r--r--drivers/scsi/libfc/fc_disc.c39
-rw-r--r--drivers/scsi/libfc/fc_elsct.c2
-rw-r--r--drivers/scsi/libfc/fc_exch.c219
-rw-r--r--drivers/scsi/libfc/fc_fcp.c15
-rw-r--r--drivers/scsi/libfc/fc_libfc.c78
-rw-r--r--drivers/scsi/libfc/fc_libfc.h2
-rw-r--r--drivers/scsi/libfc/fc_lport.c216
-rw-r--r--drivers/scsi/libfc/fc_rport.c709
-rw-r--r--drivers/scsi/libsas/sas_ata.c12
-rw-r--r--drivers/scsi/libsas/sas_expander.c2
-rw-r--r--drivers/scsi/libsas/sas_scsi_host.c4
-rw-r--r--drivers/scsi/libsas/sas_task.c6
-rw-r--r--drivers/scsi/lpfc/lpfc.h17
-rw-r--r--drivers/scsi/lpfc/lpfc_attr.c96
-rw-r--r--drivers/scsi/lpfc/lpfc_bsg.c36
-rw-r--r--drivers/scsi/lpfc/lpfc_crtn.h11
-rw-r--r--drivers/scsi/lpfc/lpfc_disc.h2
-rw-r--r--drivers/scsi/lpfc/lpfc_els.c112
-rw-r--r--drivers/scsi/lpfc/lpfc_hbadisc.c220
-rw-r--r--drivers/scsi/lpfc/lpfc_hw.h17
-rw-r--r--drivers/scsi/lpfc/lpfc_init.c279
-rw-r--r--drivers/scsi/lpfc/lpfc_mbox.c23
-rw-r--r--drivers/scsi/lpfc/lpfc_nportdisc.c31
-rw-r--r--drivers/scsi/lpfc/lpfc_scsi.c86
-rw-r--r--drivers/scsi/lpfc/lpfc_sli.c345
-rw-r--r--drivers/scsi/lpfc/lpfc_sli.h2
-rw-r--r--drivers/scsi/lpfc/lpfc_sli4.h8
-rw-r--r--drivers/scsi/lpfc/lpfc_version.h2
-rw-r--r--drivers/scsi/lpfc/lpfc_vport.c2
-rw-r--r--drivers/scsi/mpt2sas/mpi/mpi2.h17
-rw-r--r--drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h193
-rw-r--r--drivers/scsi/mpt2sas/mpi/mpi2_init.h17
-rw-r--r--drivers/scsi/mpt2sas/mpi/mpi2_ioc.h119
-rw-r--r--drivers/scsi/mpt2sas/mpt2sas_base.c172
-rw-r--r--drivers/scsi/mpt2sas/mpt2sas_base.h36
-rw-r--r--drivers/scsi/mpt2sas/mpt2sas_config.c6
-rw-r--r--drivers/scsi/mpt2sas/mpt2sas_ctl.c411
-rw-r--r--drivers/scsi/mpt2sas/mpt2sas_scsih.c748
-rw-r--r--drivers/scsi/mpt2sas/mpt2sas_transport.c575
-rw-r--r--drivers/scsi/mvsas/mv_sas.c20
-rw-r--r--drivers/scsi/pm8001/pm8001_hwi.c18
-rw-r--r--drivers/scsi/pm8001/pm8001_sas.c4
-rw-r--r--drivers/scsi/pmcraid.c893
-rw-r--r--drivers/scsi/pmcraid.h305
-rw-r--r--drivers/scsi/qla2xxx/qla_attr.c33
-rw-r--r--drivers/scsi/qla2xxx/qla_bsg.c294
-rw-r--r--drivers/scsi/qla2xxx/qla_bsg.h9
-rw-r--r--drivers/scsi/qla2xxx/qla_dbg.c2
-rw-r--r--drivers/scsi/qla2xxx/qla_dbg.h2
-rw-r--r--drivers/scsi/qla2xxx/qla_def.h54
-rw-r--r--drivers/scsi/qla2xxx/qla_dfs.c2
-rw-r--r--drivers/scsi/qla2xxx/qla_fw.h2
-rw-r--r--drivers/scsi/qla2xxx/qla_gbl.h29
-rw-r--r--drivers/scsi/qla2xxx/qla_gs.c74
-rw-r--r--drivers/scsi/qla2xxx/qla_init.c178
-rw-r--r--drivers/scsi/qla2xxx/qla_inline.h2
-rw-r--r--drivers/scsi/qla2xxx/qla_iocb.c259
-rw-r--r--drivers/scsi/qla2xxx/qla_isr.c206
-rw-r--r--drivers/scsi/qla2xxx/qla_mbx.c158
-rw-r--r--drivers/scsi/qla2xxx/qla_mid.c61
-rw-r--r--drivers/scsi/qla2xxx/qla_nx.c550
-rw-r--r--drivers/scsi/qla2xxx/qla_nx.h45
-rw-r--r--drivers/scsi/qla2xxx/qla_os.c109
-rw-r--r--drivers/scsi/qla2xxx/qla_settings.h2
-rw-r--r--drivers/scsi/qla2xxx/qla_sup.c49
-rw-r--r--drivers/scsi/qla2xxx/qla_version.h8
-rw-r--r--drivers/scsi/qla4xxx/Kconfig8
-rw-r--r--drivers/scsi/qla4xxx/Makefile2
-rw-r--r--drivers/scsi/qla4xxx/ql4_def.h143
-rw-r--r--drivers/scsi/qla4xxx/ql4_fw.h139
-rw-r--r--drivers/scsi/qla4xxx/ql4_glbl.h106
-rw-r--r--drivers/scsi/qla4xxx/ql4_init.c242
-rw-r--r--drivers/scsi/qla4xxx/ql4_inline.h2
-rw-r--r--drivers/scsi/qla4xxx/ql4_iocb.c73
-rw-r--r--drivers/scsi/qla4xxx/ql4_isr.c396
-rw-r--r--drivers/scsi/qla4xxx/ql4_mbx.c191
-rw-r--r--drivers/scsi/qla4xxx/ql4_nvram.c2
-rw-r--r--drivers/scsi/qla4xxx/ql4_nvram.h10
-rw-r--r--drivers/scsi/qla4xxx/ql4_nx.c2321
-rw-r--r--drivers/scsi/qla4xxx/ql4_nx.h779
-rw-r--r--drivers/scsi/qla4xxx/ql4_os.c758
-rw-r--r--drivers/scsi/qla4xxx/ql4_version.h2
-rw-r--r--drivers/scsi/qlogicpti.c8
-rw-r--r--drivers/scsi/scsi_debug.c6
-rw-r--r--drivers/scsi/scsi_error.c29
-rw-r--r--drivers/scsi/scsi_pm.c206
-rw-r--r--drivers/scsi/scsi_priv.h19
-rw-r--r--drivers/scsi/scsi_scan.c24
-rw-r--r--drivers/scsi/scsi_sysfs.c68
-rw-r--r--drivers/scsi/scsi_transport_fc.c2
-rw-r--r--drivers/scsi/scsi_transport_iscsi.c81
-rw-r--r--drivers/scsi/sd.c21
-rw-r--r--drivers/scsi/sg.c12
-rw-r--r--drivers/scsi/sun_esp.c6
-rw-r--r--drivers/serial/68360serial.c6
-rw-r--r--drivers/serial/8250.c13
-rw-r--r--drivers/serial/Kconfig8
-rw-r--r--drivers/serial/amba-pl010.c2
-rw-r--r--drivers/serial/amba-pl011.c90
-rw-r--r--drivers/serial/atmel_serial.c1
-rw-r--r--drivers/serial/cpm_uart/cpm_uart_core.c2
-rw-r--r--drivers/serial/kgdboc.c18
-rw-r--r--drivers/serial/mpc52xx_uart.c145
-rw-r--r--drivers/serial/nwpserial.c2
-rw-r--r--drivers/serial/sn_console.c6
-rw-r--r--drivers/serial/suncore.c4
-rw-r--r--drivers/serial/sunhv.c8
-rw-r--r--drivers/serial/sunsab.c6
-rw-r--r--drivers/serial/sunsu.c17
-rw-r--r--drivers/serial/sunzilog.c16
-rw-r--r--drivers/serial/uartlite.c1
-rw-r--r--drivers/spi/mpc512x_psc_spi.c2
-rw-r--r--drivers/spi/mpc52xx_psc_spi.c11
-rw-r--r--drivers/spi/mpc52xx_spi.c3
-rw-r--r--drivers/spi/spi.c4
-rw-r--r--drivers/spi/spi_mpc8xxx.c26
-rw-r--r--drivers/spi/spi_ppc4xx.c2
-rw-r--r--drivers/spi/xilinx_spi.c3
-rw-r--r--drivers/spi/xilinx_spi_of.c4
-rw-r--r--drivers/ssb/driver_chipcommon.c25
-rw-r--r--drivers/ssb/driver_chipcommon_pmu.c17
-rw-r--r--drivers/ssb/main.c76
-rw-r--r--drivers/ssb/pci.c15
-rw-r--r--drivers/staging/Kconfig4
-rw-r--r--drivers/staging/Makefile2
-rw-r--r--drivers/staging/batman-adv/hard-interface.c5
-rw-r--r--drivers/staging/cx25821/Makefile11
-rw-r--r--drivers/staging/cx25821/cx25821-alsa.c35
-rw-r--r--drivers/staging/cx25821/cx25821-audio-upstream.c38
-rw-r--r--drivers/staging/cx25821/cx25821-audio.h13
-rw-r--r--drivers/staging/cx25821/cx25821-audups11.c420
-rw-r--r--drivers/staging/cx25821/cx25821-core.c86
-rw-r--r--drivers/staging/cx25821/cx25821-i2c.c3
-rw-r--r--drivers/staging/cx25821/cx25821-medusa-defines.h15
-rw-r--r--drivers/staging/cx25821/cx25821-medusa-reg.h32
-rw-r--r--drivers/staging/cx25821/cx25821-medusa-video.c18
-rw-r--r--drivers/staging/cx25821/cx25821-medusa-video.h4
-rw-r--r--drivers/staging/cx25821/cx25821-reg.h1826
-rw-r--r--drivers/staging/cx25821/cx25821-sram.h50
-rw-r--r--drivers/staging/cx25821/cx25821-video-upstream-ch2.c91
-rw-r--r--drivers/staging/cx25821/cx25821-video-upstream-ch2.h2
-rw-r--r--drivers/staging/cx25821/cx25821-video-upstream.c72
-rw-r--r--drivers/staging/cx25821/cx25821-video-upstream.h2
-rw-r--r--drivers/staging/cx25821/cx25821-video.c905
-rw-r--r--drivers/staging/cx25821/cx25821-video.h20
-rw-r--r--drivers/staging/cx25821/cx25821-video0.c434
-rw-r--r--drivers/staging/cx25821/cx25821-video1.c434
-rw-r--r--drivers/staging/cx25821/cx25821-video2.c436
-rw-r--r--drivers/staging/cx25821/cx25821-video3.c435
-rw-r--r--drivers/staging/cx25821/cx25821-video4.c434
-rw-r--r--drivers/staging/cx25821/cx25821-video5.c434
-rw-r--r--drivers/staging/cx25821/cx25821-video6.c434
-rw-r--r--drivers/staging/cx25821/cx25821-video7.c433
-rw-r--r--drivers/staging/cx25821/cx25821-videoioctl.c480
-rw-r--r--drivers/staging/cx25821/cx25821-vidups10.c418
-rw-r--r--drivers/staging/cx25821/cx25821-vidups9.c416
-rw-r--r--drivers/staging/cx25821/cx25821.h49
-rw-r--r--drivers/staging/lirc/Kconfig110
-rw-r--r--drivers/staging/lirc/Makefile19
-rw-r--r--drivers/staging/lirc/TODO8
-rw-r--r--drivers/staging/lirc/TODO.lirc_i2c3
-rw-r--r--drivers/staging/lirc/lirc_bt829.c383
-rw-r--r--drivers/staging/lirc/lirc_ene0100.c646
-rw-r--r--drivers/staging/lirc/lirc_ene0100.h169
-rw-r--r--drivers/staging/lirc/lirc_i2c.c536
-rw-r--r--drivers/staging/lirc/lirc_igorplugusb.c555
-rw-r--r--drivers/staging/lirc/lirc_imon.c1058
-rw-r--r--drivers/staging/lirc/lirc_it87.c1019
-rw-r--r--drivers/staging/lirc/lirc_it87.h116
-rw-r--r--drivers/staging/lirc/lirc_ite8709.c542
-rw-r--r--drivers/staging/lirc/lirc_parallel.c705
-rw-r--r--drivers/staging/lirc/lirc_parallel.h26
-rw-r--r--drivers/staging/lirc/lirc_sasem.c933
-rw-r--r--drivers/staging/lirc/lirc_serial.c1313
-rw-r--r--drivers/staging/lirc/lirc_sir.c1282
-rw-r--r--drivers/staging/lirc/lirc_streamzap.c821
-rw-r--r--drivers/staging/lirc/lirc_ttusbir.c396
-rw-r--r--drivers/staging/lirc/lirc_zilog.c1387
-rw-r--r--drivers/staging/memrar/memrar_handler.c3
-rw-r--r--drivers/staging/octeon/ethernet-mdio.c2
-rw-r--r--drivers/staging/rar_register/Kconfig30
-rw-r--r--drivers/staging/rar_register/Makefile2
-rw-r--r--drivers/staging/rar_register/rar_register.h44
-rw-r--r--drivers/staging/tm6000/Kconfig4
-rw-r--r--drivers/staging/tm6000/Makefile8
-rw-r--r--drivers/staging/tm6000/tm6000-alsa.c263
-rw-r--r--drivers/staging/tm6000/tm6000-cards.c58
-rw-r--r--drivers/staging/tm6000/tm6000-core.c182
-rw-r--r--drivers/staging/tm6000/tm6000-dvb.c173
-rw-r--r--drivers/staging/tm6000/tm6000-i2c.c25
-rw-r--r--drivers/staging/tm6000/tm6000-input.c364
-rw-r--r--drivers/staging/tm6000/tm6000-stds.c36
-rw-r--r--drivers/staging/tm6000/tm6000-usb-isoc.h5
-rw-r--r--drivers/staging/tm6000/tm6000-video.c335
-rw-r--r--drivers/staging/tm6000/tm6000.h88
-rw-r--r--drivers/staging/winbond/wbusb.c2
-rw-r--r--drivers/usb/Kconfig3
-rw-r--r--drivers/usb/atm/cxacru.c18
-rw-r--r--drivers/usb/atm/speedtch.c10
-rw-r--r--drivers/usb/atm/ueagle-atm.c13
-rw-r--r--drivers/usb/class/cdc-acm.c3
-rw-r--r--drivers/usb/class/usblp.c2
-rw-r--r--drivers/usb/core/hub.c2
-rw-r--r--drivers/usb/core/quirks.c7
-rw-r--r--drivers/usb/gadget/at91_udc.c205
-rw-r--r--drivers/usb/gadget/at91_udc.h3
-rw-r--r--drivers/usb/gadget/f_fs.c2
-rw-r--r--drivers/usb/gadget/f_uvc.c20
-rw-r--r--drivers/usb/gadget/f_uvc.h352
-rw-r--r--drivers/usb/gadget/fsl_mxc_udc.c2
-rw-r--r--drivers/usb/gadget/fsl_qe_udc.c1
-rw-r--r--drivers/usb/gadget/pxa27x_udc.c2
-rw-r--r--drivers/usb/gadget/rndis.c5
-rw-r--r--drivers/usb/gadget/s3c2410_udc.c4
-rw-r--r--drivers/usb/gadget/uvc.h46
-rw-r--r--drivers/usb/gadget/uvc_queue.c153
-rw-r--r--drivers/usb/gadget/uvc_queue.h20
-rw-r--r--drivers/usb/gadget/uvc_v4l2.c2
-rw-r--r--drivers/usb/gadget/uvc_video.c6
-rw-r--r--drivers/usb/gadget/webcam.c28
-rw-r--r--drivers/usb/host/ehci-mxc.c2
-rw-r--r--drivers/usb/host/fhci-sched.c2
-rw-r--r--drivers/usb/host/ohci-hcd.c7
-rw-r--r--drivers/usb/host/ohci-jz4740.c276
-rw-r--r--drivers/usb/host/ohci-pxa27x.c2
-rw-r--r--drivers/usb/host/xhci-mem.c26
-rw-r--r--drivers/usb/host/xhci-ring.c11
-rw-r--r--drivers/usb/host/xhci.c2
-rw-r--r--drivers/usb/host/xhci.h2
-rw-r--r--drivers/usb/misc/sisusbvga/sisusb.c5
-rw-r--r--drivers/usb/musb/tusb6010.c13
-rw-r--r--drivers/usb/serial/ftdi_sio.c9
-rw-r--r--drivers/usb/serial/ftdi_sio_ids.h15
-rw-r--r--drivers/usb/serial/kl5kusb105.c2
-rw-r--r--drivers/usb/serial/option.c4
-rw-r--r--drivers/usb/serial/qcserial.c2
-rw-r--r--drivers/usb/serial/sierra.c1
-rw-r--r--drivers/usb/storage/transport.c4
-rw-r--r--drivers/usb/wusbcore/wusbhc.c2
-rw-r--r--drivers/uwb/wlp/wss-lc.c2
-rw-r--r--drivers/vhost/net.c331
-rw-r--r--drivers/vhost/vhost.c318
-rw-r--r--drivers/vhost/vhost.h63
-rw-r--r--drivers/video/Kconfig10
-rw-r--r--drivers/video/Makefile1
-rw-r--r--drivers/video/aty/radeon_pm.c2
-rw-r--r--drivers/video/au1100fb.c6
-rw-r--r--drivers/video/backlight/locomolcd.c4
-rw-r--r--drivers/video/bw2.c4
-rw-r--r--drivers/video/carminefb.c2
-rw-r--r--drivers/video/cg14.c4
-rw-r--r--drivers/video/cg3.c4
-rw-r--r--drivers/video/cg6.c4
-rw-r--r--drivers/video/console/fbcon.c26
-rw-r--r--drivers/video/console/fbcon.h1
-rw-r--r--drivers/video/controlfb.c2
-rw-r--r--drivers/video/cyber2000fb.c3
-rw-r--r--drivers/video/ffb.c4
-rw-r--r--drivers/video/fsl-diu-fb.c137
-rw-r--r--drivers/video/fsl-diu-fb.h223
-rw-r--r--drivers/video/gbefb.c16
-rw-r--r--drivers/video/imxfb.c72
-rw-r--r--drivers/video/jz4740_fb.c847
-rw-r--r--drivers/video/leo.c4
-rw-r--r--drivers/video/offb.c3
-rw-r--r--drivers/video/omap2/displays/panel-acx565akm.c4
-rw-r--r--drivers/video/omap2/vram.c33
-rw-r--r--drivers/video/p9100.c4
-rw-r--r--drivers/video/pmag-ba-fb.c6
-rw-r--r--drivers/video/pmagb-b-fb.c12
-rw-r--r--drivers/video/sunxvr1000.c4
-rw-r--r--drivers/video/tcx.c4
-rw-r--r--drivers/video/tdfxfb.c4
-rw-r--r--drivers/video/tgafb.c2
-rw-r--r--drivers/video/xen-fbfront.c2
-rw-r--r--drivers/video/xilinxfb.c2
-rw-r--r--drivers/virtio/virtio_ring.c5
-rw-r--r--drivers/watchdog/Kconfig18
-rw-r--r--drivers/watchdog/Makefile2
-rw-r--r--drivers/watchdog/cpwd.c6
-rw-r--r--drivers/watchdog/octeon-wdt-main.c745
-rw-r--r--drivers/watchdog/octeon-wdt-nmi.S64
-rw-r--r--drivers/watchdog/riowd.c4
-rw-r--r--drivers/xen/Kconfig9
-rw-r--r--drivers/xen/Makefile3
-rw-r--r--drivers/xen/events.c95
-rw-r--r--drivers/xen/grant-table.c77
-rw-r--r--drivers/xen/manage.c46
-rw-r--r--drivers/xen/platform-pci.c207
-rw-r--r--drivers/xen/xenbus/xenbus_probe.c52
-rw-r--r--drivers/xen/xenbus/xenbus_xs.c57
-rw-r--r--drivers/xen/xenfs/super.c4
-rw-r--r--drivers/xen/xenfs/xenbus.c3
1919 files changed, 136517 insertions, 90470 deletions
diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig
index 746411518802..08e0140920e1 100644
--- a/drivers/acpi/Kconfig
+++ b/drivers/acpi/Kconfig
@@ -104,6 +104,24 @@ config ACPI_SYSFS_POWER
104 help 104 help
105 Say N to disable power /sys interface 105 Say N to disable power /sys interface
106 106
107config ACPI_EC_DEBUGFS
108 tristate "EC read/write access through /sys/kernel/debug/ec"
109 default n
110 help
111 Say N to disable Embedded Controller /sys/kernel/debug interface
112
113 Be aware that using this interface can confuse your Embedded
114 Controller in a way that a normal reboot is not enough. You then
115 have to power of your system, and remove the laptop battery for
116 some seconds.
117 An Embedded Controller typically is available on laptops and reads
118 sensor values like battery state and temperature.
119 The kernel accesses the EC through ACPI parsed code provided by BIOS
120 tables. This option allows to access the EC directly without ACPI
121 code being involved.
122 Thus this option is a debug option that helps to write ACPI drivers
123 and can be used to identify ACPI code or EC firmware bugs.
124
107config ACPI_PROC_EVENT 125config ACPI_PROC_EVENT
108 bool "Deprecated /proc/acpi/event support" 126 bool "Deprecated /proc/acpi/event support"
109 depends on PROC_FS 127 depends on PROC_FS
diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile
index 6ee33169e1dc..833b582d1762 100644
--- a/drivers/acpi/Makefile
+++ b/drivers/acpi/Makefile
@@ -60,6 +60,7 @@ obj-$(CONFIG_ACPI_SBS) += sbshc.o
60obj-$(CONFIG_ACPI_SBS) += sbs.o 60obj-$(CONFIG_ACPI_SBS) += sbs.o
61obj-$(CONFIG_ACPI_POWER_METER) += power_meter.o 61obj-$(CONFIG_ACPI_POWER_METER) += power_meter.o
62obj-$(CONFIG_ACPI_HED) += hed.o 62obj-$(CONFIG_ACPI_HED) += hed.o
63obj-$(CONFIG_ACPI_EC_DEBUGFS) += ec_sys.o
63 64
64# processor has its own "processor." module_param namespace 65# processor has its own "processor." module_param namespace
65processor-y := processor_driver.o processor_throttling.o 66processor-y := processor_driver.o processor_throttling.o
diff --git a/drivers/acpi/acpica/evxfevnt.c b/drivers/acpi/acpica/evxfevnt.c
index d97b8dce1668..18b3f1468b7d 100644
--- a/drivers/acpi/acpica/evxfevnt.c
+++ b/drivers/acpi/acpica/evxfevnt.c
@@ -70,6 +70,7 @@ acpi_ev_get_gpe_device(struct acpi_gpe_xrupt_info *gpe_xrupt_info,
70acpi_status acpi_enable(void) 70acpi_status acpi_enable(void)
71{ 71{
72 acpi_status status; 72 acpi_status status;
73 int retry;
73 74
74 ACPI_FUNCTION_TRACE(acpi_enable); 75 ACPI_FUNCTION_TRACE(acpi_enable);
75 76
@@ -98,16 +99,18 @@ acpi_status acpi_enable(void)
98 99
99 /* Sanity check that transition succeeded */ 100 /* Sanity check that transition succeeded */
100 101
101 if (acpi_hw_get_mode() != ACPI_SYS_MODE_ACPI) { 102 for (retry = 0; retry < 30000; ++retry) {
102 ACPI_ERROR((AE_INFO, 103 if (acpi_hw_get_mode() == ACPI_SYS_MODE_ACPI) {
103 "Hardware did not enter ACPI mode")); 104 if (retry != 0)
104 return_ACPI_STATUS(AE_NO_HARDWARE_RESPONSE); 105 ACPI_WARNING((AE_INFO,
106 "Platform took > %d00 usec to enter ACPI mode", retry));
107 return_ACPI_STATUS(AE_OK);
108 }
109 acpi_os_stall(100); /* 100 usec */
105 } 110 }
106 111
107 ACPI_DEBUG_PRINT((ACPI_DB_INIT, 112 ACPI_ERROR((AE_INFO, "Hardware did not enter ACPI mode"));
108 "Transition to ACPI mode successful\n")); 113 return_ACPI_STATUS(AE_NO_HARDWARE_RESPONSE);
109
110 return_ACPI_STATUS(AE_OK);
111} 114}
112 115
113ACPI_EXPORT_SYMBOL(acpi_enable) 116ACPI_EXPORT_SYMBOL(acpi_enable)
diff --git a/drivers/acpi/battery.c b/drivers/acpi/battery.c
index 3026e3fa83ef..dc58402b0a17 100644
--- a/drivers/acpi/battery.c
+++ b/drivers/acpi/battery.c
@@ -868,9 +868,15 @@ static void acpi_battery_remove_fs(struct acpi_device *device)
868static void acpi_battery_notify(struct acpi_device *device, u32 event) 868static void acpi_battery_notify(struct acpi_device *device, u32 event)
869{ 869{
870 struct acpi_battery *battery = acpi_driver_data(device); 870 struct acpi_battery *battery = acpi_driver_data(device);
871#ifdef CONFIG_ACPI_SYSFS_POWER
872 struct device *old;
873#endif
871 874
872 if (!battery) 875 if (!battery)
873 return; 876 return;
877#ifdef CONFIG_ACPI_SYSFS_POWER
878 old = battery->bat.dev;
879#endif
874 acpi_battery_update(battery); 880 acpi_battery_update(battery);
875 acpi_bus_generate_proc_event(device, event, 881 acpi_bus_generate_proc_event(device, event,
876 acpi_battery_present(battery)); 882 acpi_battery_present(battery));
@@ -879,7 +885,7 @@ static void acpi_battery_notify(struct acpi_device *device, u32 event)
879 acpi_battery_present(battery)); 885 acpi_battery_present(battery));
880#ifdef CONFIG_ACPI_SYSFS_POWER 886#ifdef CONFIG_ACPI_SYSFS_POWER
881 /* acpi_battery_update could remove power_supply object */ 887 /* acpi_battery_update could remove power_supply object */
882 if (battery->bat.dev) 888 if (old && battery->bat.dev)
883 power_supply_changed(&battery->bat); 889 power_supply_changed(&battery->bat);
884#endif 890#endif
885} 891}
diff --git a/drivers/acpi/blacklist.c b/drivers/acpi/blacklist.c
index 01381be05e96..2bb28b9d91c4 100644
--- a/drivers/acpi/blacklist.c
+++ b/drivers/acpi/blacklist.c
@@ -214,7 +214,7 @@ static struct dmi_system_id acpi_osi_dmi_table[] __initdata = {
214 .ident = "Sony VGN-SR290J", 214 .ident = "Sony VGN-SR290J",
215 .matches = { 215 .matches = {
216 DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"), 216 DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"),
217 DMI_MATCH(DMI_PRODUCT_NAME, "Sony VGN-SR290J"), 217 DMI_MATCH(DMI_PRODUCT_NAME, "VGN-SR290J"),
218 }, 218 },
219 }, 219 },
220 { 220 {
diff --git a/drivers/acpi/ec.c b/drivers/acpi/ec.c
index 5f2027d782e8..1fa0aafebe2a 100644
--- a/drivers/acpi/ec.c
+++ b/drivers/acpi/ec.c
@@ -34,8 +34,6 @@
34#include <linux/init.h> 34#include <linux/init.h>
35#include <linux/types.h> 35#include <linux/types.h>
36#include <linux/delay.h> 36#include <linux/delay.h>
37#include <linux/proc_fs.h>
38#include <linux/seq_file.h>
39#include <linux/interrupt.h> 37#include <linux/interrupt.h>
40#include <linux/list.h> 38#include <linux/list.h>
41#include <linux/spinlock.h> 39#include <linux/spinlock.h>
@@ -45,10 +43,13 @@
45#include <acpi/acpi_drivers.h> 43#include <acpi/acpi_drivers.h>
46#include <linux/dmi.h> 44#include <linux/dmi.h>
47 45
46#include "internal.h"
47
48#define ACPI_EC_CLASS "embedded_controller" 48#define ACPI_EC_CLASS "embedded_controller"
49#define ACPI_EC_DEVICE_NAME "Embedded Controller" 49#define ACPI_EC_DEVICE_NAME "Embedded Controller"
50#define ACPI_EC_FILE_INFO "info" 50#define ACPI_EC_FILE_INFO "info"
51 51
52#undef PREFIX
52#define PREFIX "ACPI: EC: " 53#define PREFIX "ACPI: EC: "
53 54
54/* EC status register */ 55/* EC status register */
@@ -106,19 +107,8 @@ struct transaction {
106 bool done; 107 bool done;
107}; 108};
108 109
109static struct acpi_ec { 110struct acpi_ec *boot_ec, *first_ec;
110 acpi_handle handle; 111EXPORT_SYMBOL(first_ec);
111 unsigned long gpe;
112 unsigned long command_addr;
113 unsigned long data_addr;
114 unsigned long global_lock;
115 unsigned long flags;
116 struct mutex lock;
117 wait_queue_head_t wait;
118 struct list_head list;
119 struct transaction *curr;
120 spinlock_t curr_lock;
121} *boot_ec, *first_ec;
122 112
123static int EC_FLAGS_MSI; /* Out-of-spec MSI controller */ 113static int EC_FLAGS_MSI; /* Out-of-spec MSI controller */
124static int EC_FLAGS_VALIDATE_ECDT; /* ASUStec ECDTs need to be validated */ 114static int EC_FLAGS_VALIDATE_ECDT; /* ASUStec ECDTs need to be validated */
@@ -679,72 +669,6 @@ acpi_ec_space_handler(u32 function, acpi_physical_address address,
679} 669}
680 670
681/* -------------------------------------------------------------------------- 671/* --------------------------------------------------------------------------
682 FS Interface (/proc)
683 -------------------------------------------------------------------------- */
684
685static struct proc_dir_entry *acpi_ec_dir;
686
687static int acpi_ec_read_info(struct seq_file *seq, void *offset)
688{
689 struct acpi_ec *ec = seq->private;
690
691 if (!ec)
692 goto end;
693
694 seq_printf(seq, "gpe:\t\t\t0x%02x\n", (u32) ec->gpe);
695 seq_printf(seq, "ports:\t\t\t0x%02x, 0x%02x\n",
696 (unsigned)ec->command_addr, (unsigned)ec->data_addr);
697 seq_printf(seq, "use global lock:\t%s\n",
698 ec->global_lock ? "yes" : "no");
699 end:
700 return 0;
701}
702
703static int acpi_ec_info_open_fs(struct inode *inode, struct file *file)
704{
705 return single_open(file, acpi_ec_read_info, PDE(inode)->data);
706}
707
708static const struct file_operations acpi_ec_info_ops = {
709 .open = acpi_ec_info_open_fs,
710 .read = seq_read,
711 .llseek = seq_lseek,
712 .release = single_release,
713 .owner = THIS_MODULE,
714};
715
716static int acpi_ec_add_fs(struct acpi_device *device)
717{
718 struct proc_dir_entry *entry = NULL;
719
720 if (!acpi_device_dir(device)) {
721 acpi_device_dir(device) = proc_mkdir(acpi_device_bid(device),
722 acpi_ec_dir);
723 if (!acpi_device_dir(device))
724 return -ENODEV;
725 }
726
727 entry = proc_create_data(ACPI_EC_FILE_INFO, S_IRUGO,
728 acpi_device_dir(device),
729 &acpi_ec_info_ops, acpi_driver_data(device));
730 if (!entry)
731 return -ENODEV;
732 return 0;
733}
734
735static int acpi_ec_remove_fs(struct acpi_device *device)
736{
737
738 if (acpi_device_dir(device)) {
739 remove_proc_entry(ACPI_EC_FILE_INFO, acpi_device_dir(device));
740 remove_proc_entry(acpi_device_bid(device), acpi_ec_dir);
741 acpi_device_dir(device) = NULL;
742 }
743
744 return 0;
745}
746
747/* --------------------------------------------------------------------------
748 Driver Interface 672 Driver Interface
749 -------------------------------------------------------------------------- */ 673 -------------------------------------------------------------------------- */
750static acpi_status 674static acpi_status
@@ -894,7 +818,12 @@ static int acpi_ec_add(struct acpi_device *device)
894 if (!first_ec) 818 if (!first_ec)
895 first_ec = ec; 819 first_ec = ec;
896 device->driver_data = ec; 820 device->driver_data = ec;
897 acpi_ec_add_fs(device); 821
822 WARN(!request_region(ec->data_addr, 1, "EC data"),
823 "Could not request EC data io port 0x%lx", ec->data_addr);
824 WARN(!request_region(ec->command_addr, 1, "EC cmd"),
825 "Could not request EC cmd io port 0x%lx", ec->command_addr);
826
898 pr_info(PREFIX "GPE = 0x%lx, I/O: command/status = 0x%lx, data = 0x%lx\n", 827 pr_info(PREFIX "GPE = 0x%lx, I/O: command/status = 0x%lx, data = 0x%lx\n",
899 ec->gpe, ec->command_addr, ec->data_addr); 828 ec->gpe, ec->command_addr, ec->data_addr);
900 829
@@ -921,7 +850,8 @@ static int acpi_ec_remove(struct acpi_device *device, int type)
921 kfree(handler); 850 kfree(handler);
922 } 851 }
923 mutex_unlock(&ec->lock); 852 mutex_unlock(&ec->lock);
924 acpi_ec_remove_fs(device); 853 release_region(ec->data_addr, 1);
854 release_region(ec->command_addr, 1);
925 device->driver_data = NULL; 855 device->driver_data = NULL;
926 if (ec == first_ec) 856 if (ec == first_ec)
927 first_ec = NULL; 857 first_ec = NULL;
@@ -1120,16 +1050,10 @@ int __init acpi_ec_init(void)
1120{ 1050{
1121 int result = 0; 1051 int result = 0;
1122 1052
1123 acpi_ec_dir = proc_mkdir(ACPI_EC_CLASS, acpi_root_dir);
1124 if (!acpi_ec_dir)
1125 return -ENODEV;
1126
1127 /* Now register the driver for the EC */ 1053 /* Now register the driver for the EC */
1128 result = acpi_bus_register_driver(&acpi_ec_driver); 1054 result = acpi_bus_register_driver(&acpi_ec_driver);
1129 if (result < 0) { 1055 if (result < 0)
1130 remove_proc_entry(ACPI_EC_CLASS, acpi_root_dir);
1131 return -ENODEV; 1056 return -ENODEV;
1132 }
1133 1057
1134 return result; 1058 return result;
1135} 1059}
@@ -1140,9 +1064,6 @@ static void __exit acpi_ec_exit(void)
1140{ 1064{
1141 1065
1142 acpi_bus_unregister_driver(&acpi_ec_driver); 1066 acpi_bus_unregister_driver(&acpi_ec_driver);
1143
1144 remove_proc_entry(ACPI_EC_CLASS, acpi_root_dir);
1145
1146 return; 1067 return;
1147} 1068}
1148#endif /* 0 */ 1069#endif /* 0 */
diff --git a/drivers/acpi/ec_sys.c b/drivers/acpi/ec_sys.c
new file mode 100644
index 000000000000..0e869b3f81ca
--- /dev/null
+++ b/drivers/acpi/ec_sys.c
@@ -0,0 +1,160 @@
1/*
2 * ec_sys.c
3 *
4 * Copyright (C) 2010 SUSE Products GmbH/Novell
5 * Author:
6 * Thomas Renninger <trenn@suse.de>
7 *
8 * This work is licensed under the terms of the GNU GPL, version 2.
9 */
10
11#include <linux/kernel.h>
12#include <linux/acpi.h>
13#include <linux/debugfs.h>
14#include "internal.h"
15
16MODULE_AUTHOR("Thomas Renninger <trenn@suse.de>");
17MODULE_DESCRIPTION("ACPI EC sysfs access driver");
18MODULE_LICENSE("GPL");
19
20static bool write_support;
21module_param(write_support, bool, 0644);
22MODULE_PARM_DESC(write_support, "Dangerous, reboot and removal of battery may "
23 "be needed.");
24
25#define EC_SPACE_SIZE 256
26
27struct sysdev_class acpi_ec_sysdev_class = {
28 .name = "ec",
29};
30
31static struct dentry *acpi_ec_debugfs_dir;
32
33static int acpi_ec_open_io(struct inode *i, struct file *f)
34{
35 f->private_data = i->i_private;
36 return 0;
37}
38
39static ssize_t acpi_ec_read_io(struct file *f, char __user *buf,
40 size_t count, loff_t *off)
41{
42 /* Use this if support reading/writing multiple ECs exists in ec.c:
43 * struct acpi_ec *ec = ((struct seq_file *)f->private_data)->private;
44 */
45 unsigned int size = EC_SPACE_SIZE;
46 u8 *data = (u8 *) buf;
47 loff_t init_off = *off;
48 int err = 0;
49
50 if (*off >= size)
51 return 0;
52 if (*off + count >= size) {
53 size -= *off;
54 count = size;
55 } else
56 size = count;
57
58 while (size) {
59 err = ec_read(*off, &data[*off - init_off]);
60 if (err)
61 return err;
62 *off += 1;
63 size--;
64 }
65 return count;
66}
67
68static ssize_t acpi_ec_write_io(struct file *f, const char __user *buf,
69 size_t count, loff_t *off)
70{
71 /* Use this if support reading/writing multiple ECs exists in ec.c:
72 * struct acpi_ec *ec = ((struct seq_file *)f->private_data)->private;
73 */
74
75 unsigned int size = count;
76 loff_t init_off = *off;
77 u8 *data = (u8 *) buf;
78 int err = 0;
79
80 if (*off >= EC_SPACE_SIZE)
81 return 0;
82 if (*off + count >= EC_SPACE_SIZE) {
83 size = EC_SPACE_SIZE - *off;
84 count = size;
85 }
86
87 while (size) {
88 u8 byte_write = data[*off - init_off];
89 err = ec_write(*off, byte_write);
90 if (err)
91 return err;
92
93 *off += 1;
94 size--;
95 }
96 return count;
97}
98
99static struct file_operations acpi_ec_io_ops = {
100 .owner = THIS_MODULE,
101 .open = acpi_ec_open_io,
102 .read = acpi_ec_read_io,
103 .write = acpi_ec_write_io,
104};
105
106int acpi_ec_add_debugfs(struct acpi_ec *ec, unsigned int ec_device_count)
107{
108 struct dentry *dev_dir;
109 char name[64];
110 mode_t mode = 0400;
111
112 if (ec_device_count == 0) {
113 acpi_ec_debugfs_dir = debugfs_create_dir("ec", NULL);
114 if (!acpi_ec_debugfs_dir)
115 return -ENOMEM;
116 }
117
118 sprintf(name, "ec%u", ec_device_count);
119 dev_dir = debugfs_create_dir(name, acpi_ec_debugfs_dir);
120 if (!dev_dir) {
121 if (ec_device_count != 0)
122 goto error;
123 return -ENOMEM;
124 }
125
126 if (!debugfs_create_x32("gpe", 0444, dev_dir, (u32 *)&first_ec->gpe))
127 goto error;
128 if (!debugfs_create_bool("use_global_lock", 0444, dev_dir,
129 (u32 *)&first_ec->global_lock))
130 goto error;
131
132 if (write_support)
133 mode = 0600;
134 if (!debugfs_create_file("io", mode, dev_dir, ec, &acpi_ec_io_ops))
135 goto error;
136
137 return 0;
138
139error:
140 debugfs_remove_recursive(acpi_ec_debugfs_dir);
141 return -ENOMEM;
142}
143
144static int __init acpi_ec_sys_init(void)
145{
146 int err = 0;
147 if (first_ec)
148 err = acpi_ec_add_debugfs(first_ec, 0);
149 else
150 err = -ENODEV;
151 return err;
152}
153
154static void __exit acpi_ec_sys_exit(void)
155{
156 debugfs_remove_recursive(acpi_ec_debugfs_dir);
157}
158
159module_init(acpi_ec_sys_init);
160module_exit(acpi_ec_sys_exit);
diff --git a/drivers/acpi/internal.h b/drivers/acpi/internal.h
index f8f190ec066e..8ae27264a00e 100644
--- a/drivers/acpi/internal.h
+++ b/drivers/acpi/internal.h
@@ -18,6 +18,11 @@
18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 */ 19 */
20 20
21#ifndef _ACPI_INTERNAL_H_
22#define _ACPI_INTERNAL_H_
23
24#include <linux/sysdev.h>
25
21#define PREFIX "ACPI: " 26#define PREFIX "ACPI: "
22 27
23int init_acpi_device_notify(void); 28int init_acpi_device_notify(void);
@@ -46,6 +51,23 @@ void acpi_early_processor_set_pdc(void);
46/* -------------------------------------------------------------------------- 51/* --------------------------------------------------------------------------
47 Embedded Controller 52 Embedded Controller
48 -------------------------------------------------------------------------- */ 53 -------------------------------------------------------------------------- */
54struct acpi_ec {
55 acpi_handle handle;
56 unsigned long gpe;
57 unsigned long command_addr;
58 unsigned long data_addr;
59 unsigned long global_lock;
60 unsigned long flags;
61 struct mutex lock;
62 wait_queue_head_t wait;
63 struct list_head list;
64 struct transaction *curr;
65 spinlock_t curr_lock;
66 struct sys_device sysdev;
67};
68
69extern struct acpi_ec *first_ec;
70
49int acpi_ec_init(void); 71int acpi_ec_init(void);
50int acpi_ec_ecdt_probe(void); 72int acpi_ec_ecdt_probe(void);
51int acpi_boot_ec_enable(void); 73int acpi_boot_ec_enable(void);
@@ -63,3 +85,5 @@ int acpi_sleep_proc_init(void);
63#else 85#else
64static inline int acpi_sleep_proc_init(void) { return 0; } 86static inline int acpi_sleep_proc_init(void) { return 0; }
65#endif 87#endif
88
89#endif /* _ACPI_INTERNAL_H_ */
diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c
index 51284351418f..e9699aaed109 100644
--- a/drivers/acpi/processor_core.c
+++ b/drivers/acpi/processor_core.c
@@ -223,7 +223,7 @@ static bool processor_physically_present(acpi_handle handle)
223 type = (acpi_type == ACPI_TYPE_DEVICE) ? 1 : 0; 223 type = (acpi_type == ACPI_TYPE_DEVICE) ? 1 : 0;
224 cpuid = acpi_get_cpuid(handle, type, acpi_id); 224 cpuid = acpi_get_cpuid(handle, type, acpi_id);
225 225
226 if (cpuid == -1) 226 if ((cpuid == -1) && (num_possible_cpus() > 1))
227 return false; 227 return false;
228 228
229 return true; 229 return true;
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index b1b385692f46..e9a8026d39f0 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -76,14 +76,19 @@ static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
76module_param(max_cstate, uint, 0000); 76module_param(max_cstate, uint, 0000);
77static unsigned int nocst __read_mostly; 77static unsigned int nocst __read_mostly;
78module_param(nocst, uint, 0000); 78module_param(nocst, uint, 0000);
79static int bm_check_disable __read_mostly;
80module_param(bm_check_disable, uint, 0000);
79 81
80static unsigned int latency_factor __read_mostly = 2; 82static unsigned int latency_factor __read_mostly = 2;
81module_param(latency_factor, uint, 0644); 83module_param(latency_factor, uint, 0644);
82 84
85#ifdef CONFIG_ACPI_PROCFS
83static u64 us_to_pm_timer_ticks(s64 t) 86static u64 us_to_pm_timer_ticks(s64 t)
84{ 87{
85 return div64_u64(t * PM_TIMER_FREQUENCY, 1000000); 88 return div64_u64(t * PM_TIMER_FREQUENCY, 1000000);
86} 89}
90#endif
91
87/* 92/*
88 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. 93 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
89 * For now disable this. Probably a bug somewhere else. 94 * For now disable this. Probably a bug somewhere else.
@@ -763,6 +768,9 @@ static int acpi_idle_bm_check(void)
763{ 768{
764 u32 bm_status = 0; 769 u32 bm_status = 0;
765 770
771 if (bm_check_disable)
772 return 0;
773
766 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); 774 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
767 if (bm_status) 775 if (bm_status)
768 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); 776 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
@@ -947,7 +955,7 @@ static int acpi_idle_enter_bm(struct cpuidle_device *dev,
947 if (acpi_idle_suspend) 955 if (acpi_idle_suspend)
948 return(acpi_idle_enter_c1(dev, state)); 956 return(acpi_idle_enter_c1(dev, state));
949 957
950 if (acpi_idle_bm_check()) { 958 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
951 if (dev->safe_state) { 959 if (dev->safe_state) {
952 dev->last_state = dev->safe_state; 960 dev->last_state = dev->safe_state;
953 return dev->safe_state->enter(dev, dev->safe_state); 961 return dev->safe_state->enter(dev, dev->safe_state);
diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c
index 5b7c52e4a00f..2862c781b372 100644
--- a/drivers/acpi/sleep.c
+++ b/drivers/acpi/sleep.c
@@ -82,6 +82,20 @@ static int acpi_sleep_prepare(u32 acpi_state)
82static u32 acpi_target_sleep_state = ACPI_STATE_S0; 82static u32 acpi_target_sleep_state = ACPI_STATE_S0;
83 83
84/* 84/*
85 * The ACPI specification wants us to save NVS memory regions during hibernation
86 * and to restore them during the subsequent resume. Windows does that also for
87 * suspend to RAM. However, it is known that this mechanism does not work on
88 * all machines, so we allow the user to disable it with the help of the
89 * 'acpi_sleep=nonvs' kernel command line option.
90 */
91static bool nvs_nosave;
92
93void __init acpi_nvs_nosave(void)
94{
95 nvs_nosave = true;
96}
97
98/*
85 * ACPI 1.0 wants us to execute _PTS before suspending devices, so we allow the 99 * ACPI 1.0 wants us to execute _PTS before suspending devices, so we allow the
86 * user to request that behavior by using the 'acpi_old_suspend_ordering' 100 * user to request that behavior by using the 'acpi_old_suspend_ordering'
87 * kernel command line option that causes the following variable to be set. 101 * kernel command line option that causes the following variable to be set.
@@ -197,8 +211,7 @@ static int acpi_suspend_begin(suspend_state_t pm_state)
197 u32 acpi_state = acpi_suspend_states[pm_state]; 211 u32 acpi_state = acpi_suspend_states[pm_state];
198 int error = 0; 212 int error = 0;
199 213
200 error = suspend_nvs_alloc(); 214 error = nvs_nosave ? 0 : suspend_nvs_alloc();
201
202 if (error) 215 if (error)
203 return error; 216 return error;
204 217
@@ -388,20 +401,6 @@ static struct dmi_system_id __initdata acpisleep_dmi_table[] = {
388#endif /* CONFIG_SUSPEND */ 401#endif /* CONFIG_SUSPEND */
389 402
390#ifdef CONFIG_HIBERNATION 403#ifdef CONFIG_HIBERNATION
391/*
392 * The ACPI specification wants us to save NVS memory regions during hibernation
393 * and to restore them during the subsequent resume. However, it is not certain
394 * if this mechanism is going to work on all machines, so we allow the user to
395 * disable this mechanism using the 'acpi_sleep=s4_nonvs' kernel command line
396 * option.
397 */
398static bool s4_no_nvs;
399
400void __init acpi_s4_no_nvs(void)
401{
402 s4_no_nvs = true;
403}
404
405static unsigned long s4_hardware_signature; 404static unsigned long s4_hardware_signature;
406static struct acpi_table_facs *facs; 405static struct acpi_table_facs *facs;
407static bool nosigcheck; 406static bool nosigcheck;
@@ -415,7 +414,7 @@ static int acpi_hibernation_begin(void)
415{ 414{
416 int error; 415 int error;
417 416
418 error = s4_no_nvs ? 0 : suspend_nvs_alloc(); 417 error = nvs_nosave ? 0 : suspend_nvs_alloc();
419 if (!error) { 418 if (!error) {
420 acpi_target_sleep_state = ACPI_STATE_S4; 419 acpi_target_sleep_state = ACPI_STATE_S4;
421 acpi_sleep_tts_switch(acpi_target_sleep_state); 420 acpi_sleep_tts_switch(acpi_target_sleep_state);
@@ -510,7 +509,7 @@ static int acpi_hibernation_begin_old(void)
510 error = acpi_sleep_prepare(ACPI_STATE_S4); 509 error = acpi_sleep_prepare(ACPI_STATE_S4);
511 510
512 if (!error) { 511 if (!error) {
513 if (!s4_no_nvs) 512 if (!nvs_nosave)
514 error = suspend_nvs_alloc(); 513 error = suspend_nvs_alloc();
515 if (!error) 514 if (!error)
516 acpi_target_sleep_state = ACPI_STATE_S4; 515 acpi_target_sleep_state = ACPI_STATE_S4;
diff --git a/drivers/amba/bus.c b/drivers/amba/bus.c
index f60b2b6a0931..d31590e7011b 100644
--- a/drivers/amba/bus.c
+++ b/drivers/amba/bus.c
@@ -122,6 +122,31 @@ static int __init amba_init(void)
122 122
123postcore_initcall(amba_init); 123postcore_initcall(amba_init);
124 124
125static int amba_get_enable_pclk(struct amba_device *pcdev)
126{
127 struct clk *pclk = clk_get(&pcdev->dev, "apb_pclk");
128 int ret;
129
130 pcdev->pclk = pclk;
131
132 if (IS_ERR(pclk))
133 return PTR_ERR(pclk);
134
135 ret = clk_enable(pclk);
136 if (ret)
137 clk_put(pclk);
138
139 return ret;
140}
141
142static void amba_put_disable_pclk(struct amba_device *pcdev)
143{
144 struct clk *pclk = pcdev->pclk;
145
146 clk_disable(pclk);
147 clk_put(pclk);
148}
149
125/* 150/*
126 * These are the device model conversion veneers; they convert the 151 * These are the device model conversion veneers; they convert the
127 * device model structures to our more specific structures. 152 * device model structures to our more specific structures.
@@ -130,17 +155,33 @@ static int amba_probe(struct device *dev)
130{ 155{
131 struct amba_device *pcdev = to_amba_device(dev); 156 struct amba_device *pcdev = to_amba_device(dev);
132 struct amba_driver *pcdrv = to_amba_driver(dev->driver); 157 struct amba_driver *pcdrv = to_amba_driver(dev->driver);
133 struct amba_id *id; 158 struct amba_id *id = amba_lookup(pcdrv->id_table, pcdev);
159 int ret;
134 160
135 id = amba_lookup(pcdrv->id_table, pcdev); 161 do {
162 ret = amba_get_enable_pclk(pcdev);
163 if (ret)
164 break;
165
166 ret = pcdrv->probe(pcdev, id);
167 if (ret == 0)
168 break;
136 169
137 return pcdrv->probe(pcdev, id); 170 amba_put_disable_pclk(pcdev);
171 } while (0);
172
173 return ret;
138} 174}
139 175
140static int amba_remove(struct device *dev) 176static int amba_remove(struct device *dev)
141{ 177{
178 struct amba_device *pcdev = to_amba_device(dev);
142 struct amba_driver *drv = to_amba_driver(dev->driver); 179 struct amba_driver *drv = to_amba_driver(dev->driver);
143 return drv->remove(to_amba_device(dev)); 180 int ret = drv->remove(pcdev);
181
182 amba_put_disable_pclk(pcdev);
183
184 return ret;
144} 185}
145 186
146static void amba_shutdown(struct device *dev) 187static void amba_shutdown(struct device *dev)
@@ -203,7 +244,6 @@ static void amba_device_release(struct device *dev)
203 */ 244 */
204int amba_device_register(struct amba_device *dev, struct resource *parent) 245int amba_device_register(struct amba_device *dev, struct resource *parent)
205{ 246{
206 u32 pid, cid;
207 u32 size; 247 u32 size;
208 void __iomem *tmp; 248 void __iomem *tmp;
209 int i, ret; 249 int i, ret;
@@ -241,25 +281,35 @@ int amba_device_register(struct amba_device *dev, struct resource *parent)
241 goto err_release; 281 goto err_release;
242 } 282 }
243 283
244 /* 284 ret = amba_get_enable_pclk(dev);
245 * Read pid and cid based on size of resource 285 if (ret == 0) {
246 * they are located at end of region 286 u32 pid, cid;
247 */
248 for (pid = 0, i = 0; i < 4; i++)
249 pid |= (readl(tmp + size - 0x20 + 4 * i) & 255) << (i * 8);
250 for (cid = 0, i = 0; i < 4; i++)
251 cid |= (readl(tmp + size - 0x10 + 4 * i) & 255) << (i * 8);
252 287
253 iounmap(tmp); 288 /*
289 * Read pid and cid based on size of resource
290 * they are located at end of region
291 */
292 for (pid = 0, i = 0; i < 4; i++)
293 pid |= (readl(tmp + size - 0x20 + 4 * i) & 255) <<
294 (i * 8);
295 for (cid = 0, i = 0; i < 4; i++)
296 cid |= (readl(tmp + size - 0x10 + 4 * i) & 255) <<
297 (i * 8);
254 298
255 if (cid == 0xb105f00d) 299 amba_put_disable_pclk(dev);
256 dev->periphid = pid;
257 300
258 if (!dev->periphid) { 301 if (cid == 0xb105f00d)
259 ret = -ENODEV; 302 dev->periphid = pid;
260 goto err_release; 303
304 if (!dev->periphid)
305 ret = -ENODEV;
261 } 306 }
262 307
308 iounmap(tmp);
309
310 if (ret)
311 goto err_release;
312
263 ret = device_add(&dev->dev); 313 ret = device_add(&dev->dev);
264 if (ret) 314 if (ret)
265 goto err_release; 315 goto err_release;
diff --git a/drivers/atm/Kconfig b/drivers/atm/Kconfig
index f1a0a00b3b07..be7461c9a87e 100644
--- a/drivers/atm/Kconfig
+++ b/drivers/atm/Kconfig
@@ -177,7 +177,7 @@ config ATM_ZATM_DEBUG
177 177
178config ATM_NICSTAR 178config ATM_NICSTAR
179 tristate "IDT 77201 (NICStAR) (ForeRunnerLE)" 179 tristate "IDT 77201 (NICStAR) (ForeRunnerLE)"
180 depends on PCI && !64BIT && VIRT_TO_BUS 180 depends on PCI
181 help 181 help
182 The NICStAR chipset family is used in a large number of ATM NICs for 182 The NICStAR chipset family is used in a large number of ATM NICs for
183 25 and for 155 Mbps, including IDT cards and the Fore ForeRunnerLE 183 25 and for 155 Mbps, including IDT cards and the Fore ForeRunnerLE
diff --git a/drivers/atm/adummy.c b/drivers/atm/adummy.c
index 6d44f07b69f8..46b94762125b 100644
--- a/drivers/atm/adummy.c
+++ b/drivers/atm/adummy.c
@@ -40,6 +40,42 @@ struct adummy_dev {
40 40
41static LIST_HEAD(adummy_devs); 41static LIST_HEAD(adummy_devs);
42 42
43static ssize_t __set_signal(struct device *dev,
44 struct device_attribute *attr,
45 const char *buf, size_t len)
46{
47 struct atm_dev *atm_dev = container_of(dev, struct atm_dev, class_dev);
48 int signal;
49
50 if (sscanf(buf, "%d", &signal) == 1) {
51
52 if (signal < ATM_PHY_SIG_LOST || signal > ATM_PHY_SIG_FOUND)
53 signal = ATM_PHY_SIG_UNKNOWN;
54
55 atm_dev_signal_change(atm_dev, signal);
56 return 1;
57 }
58 return -EINVAL;
59}
60
61static ssize_t __show_signal(struct device *dev,
62 struct device_attribute *attr, char *buf)
63{
64 struct atm_dev *atm_dev = container_of(dev, struct atm_dev, class_dev);
65 return sprintf(buf, "%d\n", atm_dev->signal);
66}
67static DEVICE_ATTR(signal, 0644, __show_signal, __set_signal);
68
69static struct attribute *adummy_attrs[] = {
70 &dev_attr_signal.attr,
71 NULL
72};
73
74static struct attribute_group adummy_group_attrs = {
75 .name = NULL, /* We want them in dev's root folder */
76 .attrs = adummy_attrs
77};
78
43static int __init 79static int __init
44adummy_start(struct atm_dev *dev) 80adummy_start(struct atm_dev *dev)
45{ 81{
@@ -128,6 +164,9 @@ static int __init adummy_init(void)
128 adummy_dev->atm_dev = atm_dev; 164 adummy_dev->atm_dev = atm_dev;
129 atm_dev->dev_data = adummy_dev; 165 atm_dev->dev_data = adummy_dev;
130 166
167 if (sysfs_create_group(&atm_dev->class_dev.kobj, &adummy_group_attrs))
168 dev_err(&atm_dev->class_dev, "Could not register attrs for adummy\n");
169
131 if (adummy_start(atm_dev)) { 170 if (adummy_start(atm_dev)) {
132 printk(KERN_ERR DEV_LABEL ": adummy_start() failed\n"); 171 printk(KERN_ERR DEV_LABEL ": adummy_start() failed\n");
133 err = -ENODEV; 172 err = -ENODEV;
diff --git a/drivers/atm/ambassador.c b/drivers/atm/ambassador.c
index 9d18644c897e..a33896a482e6 100644
--- a/drivers/atm/ambassador.c
+++ b/drivers/atm/ambassador.c
@@ -2371,10 +2371,8 @@ MODULE_PARM_DESC(pci_lat, "PCI latency in bus cycles");
2371/********** module entry **********/ 2371/********** module entry **********/
2372 2372
2373static struct pci_device_id amb_pci_tbl[] = { 2373static struct pci_device_id amb_pci_tbl[] = {
2374 { PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR, PCI_ANY_ID, PCI_ANY_ID, 2374 { PCI_VDEVICE(MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR), 0 },
2375 0, 0, 0 }, 2375 { PCI_VDEVICE(MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR_BAD), 0 },
2376 { PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR_BAD, PCI_ANY_ID, PCI_ANY_ID,
2377 0, 0, 0 },
2378 { 0, } 2376 { 0, }
2379}; 2377};
2380 2378
diff --git a/drivers/atm/eni.c b/drivers/atm/eni.c
index 90a5a7cac740..80f9f3659e4d 100644
--- a/drivers/atm/eni.c
+++ b/drivers/atm/eni.c
@@ -2269,10 +2269,8 @@ out0:
2269 2269
2270 2270
2271static struct pci_device_id eni_pci_tbl[] = { 2271static struct pci_device_id eni_pci_tbl[] = {
2272 { PCI_VENDOR_ID_EF, PCI_DEVICE_ID_EF_ATM_FPGA, PCI_ANY_ID, PCI_ANY_ID, 2272 { PCI_VDEVICE(EF, PCI_DEVICE_ID_EF_ATM_FPGA), 0 /* FPGA */ },
2273 0, 0, 0 /* FPGA */ }, 2273 { PCI_VDEVICE(EF, PCI_DEVICE_ID_EF_ATM_ASIC), 1 /* ASIC */ },
2274 { PCI_VENDOR_ID_EF, PCI_DEVICE_ID_EF_ATM_ASIC, PCI_ANY_ID, PCI_ANY_ID,
2275 0, 0, 1 /* ASIC */ },
2276 { 0, } 2274 { 0, }
2277}; 2275};
2278MODULE_DEVICE_TABLE(pci,eni_pci_tbl); 2276MODULE_DEVICE_TABLE(pci,eni_pci_tbl);
diff --git a/drivers/atm/firestream.c b/drivers/atm/firestream.c
index 6e600afd06ae..8717809787fb 100644
--- a/drivers/atm/firestream.c
+++ b/drivers/atm/firestream.c
@@ -2027,10 +2027,8 @@ static void __devexit firestream_remove_one (struct pci_dev *pdev)
2027} 2027}
2028 2028
2029static struct pci_device_id firestream_pci_tbl[] = { 2029static struct pci_device_id firestream_pci_tbl[] = {
2030 { PCI_VENDOR_ID_FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS50, 2030 { PCI_VDEVICE(FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS50), FS_IS50},
2031 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FS_IS50}, 2031 { PCI_VDEVICE(FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS155), FS_IS155},
2032 { PCI_VENDOR_ID_FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS155,
2033 PCI_ANY_ID, PCI_ANY_ID, 0, 0, FS_IS155},
2034 { 0, } 2032 { 0, }
2035}; 2033};
2036 2034
diff --git a/drivers/atm/fore200e.c b/drivers/atm/fore200e.c
index da8f176c051e..b7385e077717 100644
--- a/drivers/atm/fore200e.c
+++ b/drivers/atm/fore200e.c
@@ -2657,7 +2657,7 @@ static int __devinit fore200e_sba_probe(struct of_device *op,
2657 2657
2658 fore200e->bus = bus; 2658 fore200e->bus = bus;
2659 fore200e->bus_dev = op; 2659 fore200e->bus_dev = op;
2660 fore200e->irq = op->irqs[0]; 2660 fore200e->irq = op->archdata.irqs[0];
2661 fore200e->phys_base = op->resource[0].start; 2661 fore200e->phys_base = op->resource[0].start;
2662 2662
2663 sprintf(fore200e->name, "%s-%d", bus->model_name, index); 2663 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
@@ -2795,7 +2795,7 @@ static int __init fore200e_module_init(void)
2795 printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n"); 2795 printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n");
2796 2796
2797#ifdef CONFIG_SBUS 2797#ifdef CONFIG_SBUS
2798 err = of_register_driver(&fore200e_sba_driver, &of_bus_type); 2798 err = of_register_platform_driver(&fore200e_sba_driver);
2799 if (err) 2799 if (err)
2800 return err; 2800 return err;
2801#endif 2801#endif
@@ -2806,7 +2806,7 @@ static int __init fore200e_module_init(void)
2806 2806
2807#ifdef CONFIG_SBUS 2807#ifdef CONFIG_SBUS
2808 if (err) 2808 if (err)
2809 of_unregister_driver(&fore200e_sba_driver); 2809 of_unregister_platform_driver(&fore200e_sba_driver);
2810#endif 2810#endif
2811 2811
2812 return err; 2812 return err;
@@ -2818,7 +2818,7 @@ static void __exit fore200e_module_cleanup(void)
2818 pci_unregister_driver(&fore200e_pca_driver); 2818 pci_unregister_driver(&fore200e_pca_driver);
2819#endif 2819#endif
2820#ifdef CONFIG_SBUS 2820#ifdef CONFIG_SBUS
2821 of_unregister_driver(&fore200e_sba_driver); 2821 of_unregister_platform_driver(&fore200e_sba_driver);
2822#endif 2822#endif
2823} 2823}
2824 2824
diff --git a/drivers/atm/he.c b/drivers/atm/he.c
index 56c2e99e458f..801e8b6e9d1f 100644
--- a/drivers/atm/he.c
+++ b/drivers/atm/he.c
@@ -67,6 +67,7 @@
67#include <linux/timer.h> 67#include <linux/timer.h>
68#include <linux/interrupt.h> 68#include <linux/interrupt.h>
69#include <linux/dma-mapping.h> 69#include <linux/dma-mapping.h>
70#include <linux/bitmap.h>
70#include <linux/slab.h> 71#include <linux/slab.h>
71#include <asm/io.h> 72#include <asm/io.h>
72#include <asm/byteorder.h> 73#include <asm/byteorder.h>
@@ -778,61 +779,39 @@ he_init_cs_block_rcm(struct he_dev *he_dev)
778static int __devinit 779static int __devinit
779he_init_group(struct he_dev *he_dev, int group) 780he_init_group(struct he_dev *he_dev, int group)
780{ 781{
782 struct he_buff *heb, *next;
783 dma_addr_t mapping;
781 int i; 784 int i;
782 785
783 /* small buffer pool */ 786 he_writel(he_dev, 0x0, G0_RBPS_S + (group * 32));
784 he_dev->rbps_pool = pci_pool_create("rbps", he_dev->pci_dev, 787 he_writel(he_dev, 0x0, G0_RBPS_T + (group * 32));
785 CONFIG_RBPS_BUFSIZE, 8, 0); 788 he_writel(he_dev, 0x0, G0_RBPS_QI + (group * 32));
786 if (he_dev->rbps_pool == NULL) { 789 he_writel(he_dev, RBP_THRESH(0x1) | RBP_QSIZE(0x0),
787 hprintk("unable to create rbps pages\n"); 790 G0_RBPS_BS + (group * 32));
791
792 /* bitmap table */
793 he_dev->rbpl_table = kmalloc(BITS_TO_LONGS(RBPL_TABLE_SIZE)
794 * sizeof(unsigned long), GFP_KERNEL);
795 if (!he_dev->rbpl_table) {
796 hprintk("unable to allocate rbpl bitmap table\n");
788 return -ENOMEM; 797 return -ENOMEM;
789 } 798 }
799 bitmap_zero(he_dev->rbpl_table, RBPL_TABLE_SIZE);
790 800
791 he_dev->rbps_base = pci_alloc_consistent(he_dev->pci_dev, 801 /* rbpl_virt 64-bit pointers */
792 CONFIG_RBPS_SIZE * sizeof(struct he_rbp), &he_dev->rbps_phys); 802 he_dev->rbpl_virt = kmalloc(RBPL_TABLE_SIZE
793 if (he_dev->rbps_base == NULL) { 803 * sizeof(struct he_buff *), GFP_KERNEL);
794 hprintk("failed to alloc rbps_base\n"); 804 if (!he_dev->rbpl_virt) {
795 goto out_destroy_rbps_pool; 805 hprintk("unable to allocate rbpl virt table\n");
806 goto out_free_rbpl_table;
796 } 807 }
797 memset(he_dev->rbps_base, 0, CONFIG_RBPS_SIZE * sizeof(struct he_rbp));
798 he_dev->rbps_virt = kmalloc(CONFIG_RBPS_SIZE * sizeof(struct he_virt), GFP_KERNEL);
799 if (he_dev->rbps_virt == NULL) {
800 hprintk("failed to alloc rbps_virt\n");
801 goto out_free_rbps_base;
802 }
803
804 for (i = 0; i < CONFIG_RBPS_SIZE; ++i) {
805 dma_addr_t dma_handle;
806 void *cpuaddr;
807
808 cpuaddr = pci_pool_alloc(he_dev->rbps_pool, GFP_KERNEL|GFP_DMA, &dma_handle);
809 if (cpuaddr == NULL)
810 goto out_free_rbps_virt;
811
812 he_dev->rbps_virt[i].virt = cpuaddr;
813 he_dev->rbps_base[i].status = RBP_LOANED | RBP_SMALLBUF | (i << RBP_INDEX_OFF);
814 he_dev->rbps_base[i].phys = dma_handle;
815
816 }
817 he_dev->rbps_tail = &he_dev->rbps_base[CONFIG_RBPS_SIZE - 1];
818
819 he_writel(he_dev, he_dev->rbps_phys, G0_RBPS_S + (group * 32));
820 he_writel(he_dev, RBPS_MASK(he_dev->rbps_tail),
821 G0_RBPS_T + (group * 32));
822 he_writel(he_dev, CONFIG_RBPS_BUFSIZE/4,
823 G0_RBPS_BS + (group * 32));
824 he_writel(he_dev,
825 RBP_THRESH(CONFIG_RBPS_THRESH) |
826 RBP_QSIZE(CONFIG_RBPS_SIZE - 1) |
827 RBP_INT_ENB,
828 G0_RBPS_QI + (group * 32));
829 808
830 /* large buffer pool */ 809 /* large buffer pool */
831 he_dev->rbpl_pool = pci_pool_create("rbpl", he_dev->pci_dev, 810 he_dev->rbpl_pool = pci_pool_create("rbpl", he_dev->pci_dev,
832 CONFIG_RBPL_BUFSIZE, 8, 0); 811 CONFIG_RBPL_BUFSIZE, 64, 0);
833 if (he_dev->rbpl_pool == NULL) { 812 if (he_dev->rbpl_pool == NULL) {
834 hprintk("unable to create rbpl pool\n"); 813 hprintk("unable to create rbpl pool\n");
835 goto out_free_rbps_virt; 814 goto out_free_rbpl_virt;
836 } 815 }
837 816
838 he_dev->rbpl_base = pci_alloc_consistent(he_dev->pci_dev, 817 he_dev->rbpl_base = pci_alloc_consistent(he_dev->pci_dev,
@@ -842,30 +821,29 @@ he_init_group(struct he_dev *he_dev, int group)
842 goto out_destroy_rbpl_pool; 821 goto out_destroy_rbpl_pool;
843 } 822 }
844 memset(he_dev->rbpl_base, 0, CONFIG_RBPL_SIZE * sizeof(struct he_rbp)); 823 memset(he_dev->rbpl_base, 0, CONFIG_RBPL_SIZE * sizeof(struct he_rbp));
845 he_dev->rbpl_virt = kmalloc(CONFIG_RBPL_SIZE * sizeof(struct he_virt), GFP_KERNEL); 824
846 if (he_dev->rbpl_virt == NULL) { 825 INIT_LIST_HEAD(&he_dev->rbpl_outstanding);
847 hprintk("failed to alloc rbpl_virt\n");
848 goto out_free_rbpl_base;
849 }
850 826
851 for (i = 0; i < CONFIG_RBPL_SIZE; ++i) { 827 for (i = 0; i < CONFIG_RBPL_SIZE; ++i) {
852 dma_addr_t dma_handle;
853 void *cpuaddr;
854 828
855 cpuaddr = pci_pool_alloc(he_dev->rbpl_pool, GFP_KERNEL|GFP_DMA, &dma_handle); 829 heb = pci_pool_alloc(he_dev->rbpl_pool, GFP_KERNEL|GFP_DMA, &mapping);
856 if (cpuaddr == NULL) 830 if (!heb)
857 goto out_free_rbpl_virt; 831 goto out_free_rbpl;
832 heb->mapping = mapping;
833 list_add(&heb->entry, &he_dev->rbpl_outstanding);
858 834
859 he_dev->rbpl_virt[i].virt = cpuaddr; 835 set_bit(i, he_dev->rbpl_table);
860 he_dev->rbpl_base[i].status = RBP_LOANED | (i << RBP_INDEX_OFF); 836 he_dev->rbpl_virt[i] = heb;
861 he_dev->rbpl_base[i].phys = dma_handle; 837 he_dev->rbpl_hint = i + 1;
838 he_dev->rbpl_base[i].idx = i << RBP_IDX_OFFSET;
839 he_dev->rbpl_base[i].phys = mapping + offsetof(struct he_buff, data);
862 } 840 }
863 he_dev->rbpl_tail = &he_dev->rbpl_base[CONFIG_RBPL_SIZE - 1]; 841 he_dev->rbpl_tail = &he_dev->rbpl_base[CONFIG_RBPL_SIZE - 1];
864 842
865 he_writel(he_dev, he_dev->rbpl_phys, G0_RBPL_S + (group * 32)); 843 he_writel(he_dev, he_dev->rbpl_phys, G0_RBPL_S + (group * 32));
866 he_writel(he_dev, RBPL_MASK(he_dev->rbpl_tail), 844 he_writel(he_dev, RBPL_MASK(he_dev->rbpl_tail),
867 G0_RBPL_T + (group * 32)); 845 G0_RBPL_T + (group * 32));
868 he_writel(he_dev, CONFIG_RBPL_BUFSIZE/4, 846 he_writel(he_dev, (CONFIG_RBPL_BUFSIZE - sizeof(struct he_buff))/4,
869 G0_RBPL_BS + (group * 32)); 847 G0_RBPL_BS + (group * 32));
870 he_writel(he_dev, 848 he_writel(he_dev,
871 RBP_THRESH(CONFIG_RBPL_THRESH) | 849 RBP_THRESH(CONFIG_RBPL_THRESH) |
@@ -879,7 +857,7 @@ he_init_group(struct he_dev *he_dev, int group)
879 CONFIG_RBRQ_SIZE * sizeof(struct he_rbrq), &he_dev->rbrq_phys); 857 CONFIG_RBRQ_SIZE * sizeof(struct he_rbrq), &he_dev->rbrq_phys);
880 if (he_dev->rbrq_base == NULL) { 858 if (he_dev->rbrq_base == NULL) {
881 hprintk("failed to allocate rbrq\n"); 859 hprintk("failed to allocate rbrq\n");
882 goto out_free_rbpl_virt; 860 goto out_free_rbpl;
883 } 861 }
884 memset(he_dev->rbrq_base, 0, CONFIG_RBRQ_SIZE * sizeof(struct he_rbrq)); 862 memset(he_dev->rbrq_base, 0, CONFIG_RBRQ_SIZE * sizeof(struct he_rbrq));
885 863
@@ -920,33 +898,20 @@ out_free_rbpq_base:
920 pci_free_consistent(he_dev->pci_dev, CONFIG_RBRQ_SIZE * 898 pci_free_consistent(he_dev->pci_dev, CONFIG_RBRQ_SIZE *
921 sizeof(struct he_rbrq), he_dev->rbrq_base, 899 sizeof(struct he_rbrq), he_dev->rbrq_base,
922 he_dev->rbrq_phys); 900 he_dev->rbrq_phys);
923 i = CONFIG_RBPL_SIZE; 901out_free_rbpl:
924out_free_rbpl_virt: 902 list_for_each_entry_safe(heb, next, &he_dev->rbpl_outstanding, entry)
925 while (i--) 903 pci_pool_free(he_dev->rbpl_pool, heb, heb->mapping);
926 pci_pool_free(he_dev->rbpl_pool, he_dev->rbpl_virt[i].virt,
927 he_dev->rbpl_base[i].phys);
928 kfree(he_dev->rbpl_virt);
929 904
930out_free_rbpl_base:
931 pci_free_consistent(he_dev->pci_dev, CONFIG_RBPL_SIZE * 905 pci_free_consistent(he_dev->pci_dev, CONFIG_RBPL_SIZE *
932 sizeof(struct he_rbp), he_dev->rbpl_base, 906 sizeof(struct he_rbp), he_dev->rbpl_base,
933 he_dev->rbpl_phys); 907 he_dev->rbpl_phys);
934out_destroy_rbpl_pool: 908out_destroy_rbpl_pool:
935 pci_pool_destroy(he_dev->rbpl_pool); 909 pci_pool_destroy(he_dev->rbpl_pool);
910out_free_rbpl_virt:
911 kfree(he_dev->rbpl_virt);
912out_free_rbpl_table:
913 kfree(he_dev->rbpl_table);
936 914
937 i = CONFIG_RBPS_SIZE;
938out_free_rbps_virt:
939 while (i--)
940 pci_pool_free(he_dev->rbps_pool, he_dev->rbps_virt[i].virt,
941 he_dev->rbps_base[i].phys);
942 kfree(he_dev->rbps_virt);
943
944out_free_rbps_base:
945 pci_free_consistent(he_dev->pci_dev, CONFIG_RBPS_SIZE *
946 sizeof(struct he_rbp), he_dev->rbps_base,
947 he_dev->rbps_phys);
948out_destroy_rbps_pool:
949 pci_pool_destroy(he_dev->rbps_pool);
950 return -ENOMEM; 915 return -ENOMEM;
951} 916}
952 917
@@ -1002,7 +967,8 @@ he_init_irq(struct he_dev *he_dev)
1002 he_writel(he_dev, 0x0, GRP_54_MAP); 967 he_writel(he_dev, 0x0, GRP_54_MAP);
1003 he_writel(he_dev, 0x0, GRP_76_MAP); 968 he_writel(he_dev, 0x0, GRP_76_MAP);
1004 969
1005 if (request_irq(he_dev->pci_dev->irq, he_irq_handler, IRQF_DISABLED|IRQF_SHARED, DEV_LABEL, he_dev)) { 970 if (request_irq(he_dev->pci_dev->irq,
971 he_irq_handler, IRQF_SHARED, DEV_LABEL, he_dev)) {
1006 hprintk("irq %d already in use\n", he_dev->pci_dev->irq); 972 hprintk("irq %d already in use\n", he_dev->pci_dev->irq);
1007 return -EINVAL; 973 return -EINVAL;
1008 } 974 }
@@ -1576,9 +1542,10 @@ he_start(struct atm_dev *dev)
1576static void 1542static void
1577he_stop(struct he_dev *he_dev) 1543he_stop(struct he_dev *he_dev)
1578{ 1544{
1579 u16 command; 1545 struct he_buff *heb, *next;
1580 u32 gen_cntl_0, reg;
1581 struct pci_dev *pci_dev; 1546 struct pci_dev *pci_dev;
1547 u32 gen_cntl_0, reg;
1548 u16 command;
1582 1549
1583 pci_dev = he_dev->pci_dev; 1550 pci_dev = he_dev->pci_dev;
1584 1551
@@ -1619,37 +1586,19 @@ he_stop(struct he_dev *he_dev)
1619 he_dev->hsp, he_dev->hsp_phys); 1586 he_dev->hsp, he_dev->hsp_phys);
1620 1587
1621 if (he_dev->rbpl_base) { 1588 if (he_dev->rbpl_base) {
1622 int i; 1589 list_for_each_entry_safe(heb, next, &he_dev->rbpl_outstanding, entry)
1623 1590 pci_pool_free(he_dev->rbpl_pool, heb, heb->mapping);
1624 for (i = 0; i < CONFIG_RBPL_SIZE; ++i) {
1625 void *cpuaddr = he_dev->rbpl_virt[i].virt;
1626 dma_addr_t dma_handle = he_dev->rbpl_base[i].phys;
1627 1591
1628 pci_pool_free(he_dev->rbpl_pool, cpuaddr, dma_handle);
1629 }
1630 pci_free_consistent(he_dev->pci_dev, CONFIG_RBPL_SIZE 1592 pci_free_consistent(he_dev->pci_dev, CONFIG_RBPL_SIZE
1631 * sizeof(struct he_rbp), he_dev->rbpl_base, he_dev->rbpl_phys); 1593 * sizeof(struct he_rbp), he_dev->rbpl_base, he_dev->rbpl_phys);
1632 } 1594 }
1633 1595
1596 kfree(he_dev->rbpl_virt);
1597 kfree(he_dev->rbpl_table);
1598
1634 if (he_dev->rbpl_pool) 1599 if (he_dev->rbpl_pool)
1635 pci_pool_destroy(he_dev->rbpl_pool); 1600 pci_pool_destroy(he_dev->rbpl_pool);
1636 1601
1637 if (he_dev->rbps_base) {
1638 int i;
1639
1640 for (i = 0; i < CONFIG_RBPS_SIZE; ++i) {
1641 void *cpuaddr = he_dev->rbps_virt[i].virt;
1642 dma_addr_t dma_handle = he_dev->rbps_base[i].phys;
1643
1644 pci_pool_free(he_dev->rbps_pool, cpuaddr, dma_handle);
1645 }
1646 pci_free_consistent(he_dev->pci_dev, CONFIG_RBPS_SIZE
1647 * sizeof(struct he_rbp), he_dev->rbps_base, he_dev->rbps_phys);
1648 }
1649
1650 if (he_dev->rbps_pool)
1651 pci_pool_destroy(he_dev->rbps_pool);
1652
1653 if (he_dev->rbrq_base) 1602 if (he_dev->rbrq_base)
1654 pci_free_consistent(he_dev->pci_dev, CONFIG_RBRQ_SIZE * sizeof(struct he_rbrq), 1603 pci_free_consistent(he_dev->pci_dev, CONFIG_RBRQ_SIZE * sizeof(struct he_rbrq),
1655 he_dev->rbrq_base, he_dev->rbrq_phys); 1604 he_dev->rbrq_base, he_dev->rbrq_phys);
@@ -1679,13 +1628,13 @@ static struct he_tpd *
1679__alloc_tpd(struct he_dev *he_dev) 1628__alloc_tpd(struct he_dev *he_dev)
1680{ 1629{
1681 struct he_tpd *tpd; 1630 struct he_tpd *tpd;
1682 dma_addr_t dma_handle; 1631 dma_addr_t mapping;
1683 1632
1684 tpd = pci_pool_alloc(he_dev->tpd_pool, GFP_ATOMIC|GFP_DMA, &dma_handle); 1633 tpd = pci_pool_alloc(he_dev->tpd_pool, GFP_ATOMIC|GFP_DMA, &mapping);
1685 if (tpd == NULL) 1634 if (tpd == NULL)
1686 return NULL; 1635 return NULL;
1687 1636
1688 tpd->status = TPD_ADDR(dma_handle); 1637 tpd->status = TPD_ADDR(mapping);
1689 tpd->reserved = 0; 1638 tpd->reserved = 0;
1690 tpd->iovec[0].addr = 0; tpd->iovec[0].len = 0; 1639 tpd->iovec[0].addr = 0; tpd->iovec[0].len = 0;
1691 tpd->iovec[1].addr = 0; tpd->iovec[1].len = 0; 1640 tpd->iovec[1].addr = 0; tpd->iovec[1].len = 0;
@@ -1714,13 +1663,12 @@ he_service_rbrq(struct he_dev *he_dev, int group)
1714 struct he_rbrq *rbrq_tail = (struct he_rbrq *) 1663 struct he_rbrq *rbrq_tail = (struct he_rbrq *)
1715 ((unsigned long)he_dev->rbrq_base | 1664 ((unsigned long)he_dev->rbrq_base |
1716 he_dev->hsp->group[group].rbrq_tail); 1665 he_dev->hsp->group[group].rbrq_tail);
1717 struct he_rbp *rbp = NULL;
1718 unsigned cid, lastcid = -1; 1666 unsigned cid, lastcid = -1;
1719 unsigned buf_len = 0;
1720 struct sk_buff *skb; 1667 struct sk_buff *skb;
1721 struct atm_vcc *vcc = NULL; 1668 struct atm_vcc *vcc = NULL;
1722 struct he_vcc *he_vcc; 1669 struct he_vcc *he_vcc;
1723 struct he_iovec *iov; 1670 struct he_buff *heb, *next;
1671 int i;
1724 int pdus_assembled = 0; 1672 int pdus_assembled = 0;
1725 int updated = 0; 1673 int updated = 0;
1726 1674
@@ -1740,44 +1688,35 @@ he_service_rbrq(struct he_dev *he_dev, int group)
1740 RBRQ_CON_CLOSED(he_dev->rbrq_head) ? " CON_CLOSED" : "", 1688 RBRQ_CON_CLOSED(he_dev->rbrq_head) ? " CON_CLOSED" : "",
1741 RBRQ_HBUF_ERR(he_dev->rbrq_head) ? " HBUF_ERR" : ""); 1689 RBRQ_HBUF_ERR(he_dev->rbrq_head) ? " HBUF_ERR" : "");
1742 1690
1743 if (RBRQ_ADDR(he_dev->rbrq_head) & RBP_SMALLBUF) 1691 i = RBRQ_ADDR(he_dev->rbrq_head) >> RBP_IDX_OFFSET;
1744 rbp = &he_dev->rbps_base[RBP_INDEX(RBRQ_ADDR(he_dev->rbrq_head))]; 1692 heb = he_dev->rbpl_virt[i];
1745 else
1746 rbp = &he_dev->rbpl_base[RBP_INDEX(RBRQ_ADDR(he_dev->rbrq_head))];
1747
1748 buf_len = RBRQ_BUFLEN(he_dev->rbrq_head) * 4;
1749 cid = RBRQ_CID(he_dev->rbrq_head);
1750 1693
1694 cid = RBRQ_CID(he_dev->rbrq_head);
1751 if (cid != lastcid) 1695 if (cid != lastcid)
1752 vcc = __find_vcc(he_dev, cid); 1696 vcc = __find_vcc(he_dev, cid);
1753 lastcid = cid; 1697 lastcid = cid;
1754 1698
1755 if (vcc == NULL) { 1699 if (vcc == NULL || (he_vcc = HE_VCC(vcc)) == NULL) {
1756 hprintk("vcc == NULL (cid 0x%x)\n", cid); 1700 hprintk("vcc/he_vcc == NULL (cid 0x%x)\n", cid);
1757 if (!RBRQ_HBUF_ERR(he_dev->rbrq_head)) 1701 if (!RBRQ_HBUF_ERR(he_dev->rbrq_head)) {
1758 rbp->status &= ~RBP_LOANED; 1702 clear_bit(i, he_dev->rbpl_table);
1703 list_del(&heb->entry);
1704 pci_pool_free(he_dev->rbpl_pool, heb, heb->mapping);
1705 }
1759 1706
1760 goto next_rbrq_entry; 1707 goto next_rbrq_entry;
1761 } 1708 }
1762 1709
1763 he_vcc = HE_VCC(vcc);
1764 if (he_vcc == NULL) {
1765 hprintk("he_vcc == NULL (cid 0x%x)\n", cid);
1766 if (!RBRQ_HBUF_ERR(he_dev->rbrq_head))
1767 rbp->status &= ~RBP_LOANED;
1768 goto next_rbrq_entry;
1769 }
1770
1771 if (RBRQ_HBUF_ERR(he_dev->rbrq_head)) { 1710 if (RBRQ_HBUF_ERR(he_dev->rbrq_head)) {
1772 hprintk("HBUF_ERR! (cid 0x%x)\n", cid); 1711 hprintk("HBUF_ERR! (cid 0x%x)\n", cid);
1773 atomic_inc(&vcc->stats->rx_drop); 1712 atomic_inc(&vcc->stats->rx_drop);
1774 goto return_host_buffers; 1713 goto return_host_buffers;
1775 } 1714 }
1776 1715
1777 he_vcc->iov_tail->iov_base = RBRQ_ADDR(he_dev->rbrq_head); 1716 heb->len = RBRQ_BUFLEN(he_dev->rbrq_head) * 4;
1778 he_vcc->iov_tail->iov_len = buf_len; 1717 clear_bit(i, he_dev->rbpl_table);
1779 he_vcc->pdu_len += buf_len; 1718 list_move_tail(&heb->entry, &he_vcc->buffers);
1780 ++he_vcc->iov_tail; 1719 he_vcc->pdu_len += heb->len;
1781 1720
1782 if (RBRQ_CON_CLOSED(he_dev->rbrq_head)) { 1721 if (RBRQ_CON_CLOSED(he_dev->rbrq_head)) {
1783 lastcid = -1; 1722 lastcid = -1;
@@ -1786,12 +1725,6 @@ he_service_rbrq(struct he_dev *he_dev, int group)
1786 goto return_host_buffers; 1725 goto return_host_buffers;
1787 } 1726 }
1788 1727
1789#ifdef notdef
1790 if ((he_vcc->iov_tail - he_vcc->iov_head) > HE_MAXIOV) {
1791 hprintk("iovec full! cid 0x%x\n", cid);
1792 goto return_host_buffers;
1793 }
1794#endif
1795 if (!RBRQ_END_PDU(he_dev->rbrq_head)) 1728 if (!RBRQ_END_PDU(he_dev->rbrq_head))
1796 goto next_rbrq_entry; 1729 goto next_rbrq_entry;
1797 1730
@@ -1819,15 +1752,8 @@ he_service_rbrq(struct he_dev *he_dev, int group)
1819 1752
1820 __net_timestamp(skb); 1753 __net_timestamp(skb);
1821 1754
1822 for (iov = he_vcc->iov_head; 1755 list_for_each_entry(heb, &he_vcc->buffers, entry)
1823 iov < he_vcc->iov_tail; ++iov) { 1756 memcpy(skb_put(skb, heb->len), &heb->data, heb->len);
1824 if (iov->iov_base & RBP_SMALLBUF)
1825 memcpy(skb_put(skb, iov->iov_len),
1826 he_dev->rbps_virt[RBP_INDEX(iov->iov_base)].virt, iov->iov_len);
1827 else
1828 memcpy(skb_put(skb, iov->iov_len),
1829 he_dev->rbpl_virt[RBP_INDEX(iov->iov_base)].virt, iov->iov_len);
1830 }
1831 1757
1832 switch (vcc->qos.aal) { 1758 switch (vcc->qos.aal) {
1833 case ATM_AAL0: 1759 case ATM_AAL0:
@@ -1867,17 +1793,9 @@ he_service_rbrq(struct he_dev *he_dev, int group)
1867return_host_buffers: 1793return_host_buffers:
1868 ++pdus_assembled; 1794 ++pdus_assembled;
1869 1795
1870 for (iov = he_vcc->iov_head; 1796 list_for_each_entry_safe(heb, next, &he_vcc->buffers, entry)
1871 iov < he_vcc->iov_tail; ++iov) { 1797 pci_pool_free(he_dev->rbpl_pool, heb, heb->mapping);
1872 if (iov->iov_base & RBP_SMALLBUF) 1798 INIT_LIST_HEAD(&he_vcc->buffers);
1873 rbp = &he_dev->rbps_base[RBP_INDEX(iov->iov_base)];
1874 else
1875 rbp = &he_dev->rbpl_base[RBP_INDEX(iov->iov_base)];
1876
1877 rbp->status &= ~RBP_LOANED;
1878 }
1879
1880 he_vcc->iov_tail = he_vcc->iov_head;
1881 he_vcc->pdu_len = 0; 1799 he_vcc->pdu_len = 0;
1882 1800
1883next_rbrq_entry: 1801next_rbrq_entry:
@@ -1978,59 +1896,51 @@ next_tbrq_entry:
1978 } 1896 }
1979} 1897}
1980 1898
1981
1982static void 1899static void
1983he_service_rbpl(struct he_dev *he_dev, int group) 1900he_service_rbpl(struct he_dev *he_dev, int group)
1984{ 1901{
1985 struct he_rbp *newtail; 1902 struct he_rbp *new_tail;
1986 struct he_rbp *rbpl_head; 1903 struct he_rbp *rbpl_head;
1904 struct he_buff *heb;
1905 dma_addr_t mapping;
1906 int i;
1987 int moved = 0; 1907 int moved = 0;
1988 1908
1989 rbpl_head = (struct he_rbp *) ((unsigned long)he_dev->rbpl_base | 1909 rbpl_head = (struct he_rbp *) ((unsigned long)he_dev->rbpl_base |
1990 RBPL_MASK(he_readl(he_dev, G0_RBPL_S))); 1910 RBPL_MASK(he_readl(he_dev, G0_RBPL_S)));
1991 1911
1992 for (;;) { 1912 for (;;) {
1993 newtail = (struct he_rbp *) ((unsigned long)he_dev->rbpl_base | 1913 new_tail = (struct he_rbp *) ((unsigned long)he_dev->rbpl_base |
1994 RBPL_MASK(he_dev->rbpl_tail+1)); 1914 RBPL_MASK(he_dev->rbpl_tail+1));
1995 1915
1996 /* table 3.42 -- rbpl_tail should never be set to rbpl_head */ 1916 /* table 3.42 -- rbpl_tail should never be set to rbpl_head */
1997 if ((newtail == rbpl_head) || (newtail->status & RBP_LOANED)) 1917 if (new_tail == rbpl_head)
1998 break; 1918 break;
1999 1919
2000 newtail->status |= RBP_LOANED; 1920 i = find_next_zero_bit(he_dev->rbpl_table, RBPL_TABLE_SIZE, he_dev->rbpl_hint);
2001 he_dev->rbpl_tail = newtail; 1921 if (i > (RBPL_TABLE_SIZE - 1)) {
2002 ++moved; 1922 i = find_first_zero_bit(he_dev->rbpl_table, RBPL_TABLE_SIZE);
2003 } 1923 if (i > (RBPL_TABLE_SIZE - 1))
2004 1924 break;
2005 if (moved) 1925 }
2006 he_writel(he_dev, RBPL_MASK(he_dev->rbpl_tail), G0_RBPL_T); 1926 he_dev->rbpl_hint = i + 1;
2007}
2008
2009static void
2010he_service_rbps(struct he_dev *he_dev, int group)
2011{
2012 struct he_rbp *newtail;
2013 struct he_rbp *rbps_head;
2014 int moved = 0;
2015
2016 rbps_head = (struct he_rbp *) ((unsigned long)he_dev->rbps_base |
2017 RBPS_MASK(he_readl(he_dev, G0_RBPS_S)));
2018
2019 for (;;) {
2020 newtail = (struct he_rbp *) ((unsigned long)he_dev->rbps_base |
2021 RBPS_MASK(he_dev->rbps_tail+1));
2022 1927
2023 /* table 3.42 -- rbps_tail should never be set to rbps_head */ 1928 heb = pci_pool_alloc(he_dev->rbpl_pool, GFP_ATOMIC|GFP_DMA, &mapping);
2024 if ((newtail == rbps_head) || (newtail->status & RBP_LOANED)) 1929 if (!heb)
2025 break; 1930 break;
2026 1931 heb->mapping = mapping;
2027 newtail->status |= RBP_LOANED; 1932 list_add(&heb->entry, &he_dev->rbpl_outstanding);
2028 he_dev->rbps_tail = newtail; 1933 he_dev->rbpl_virt[i] = heb;
1934 set_bit(i, he_dev->rbpl_table);
1935 new_tail->idx = i << RBP_IDX_OFFSET;
1936 new_tail->phys = mapping + offsetof(struct he_buff, data);
1937
1938 he_dev->rbpl_tail = new_tail;
2029 ++moved; 1939 ++moved;
2030 } 1940 }
2031 1941
2032 if (moved) 1942 if (moved)
2033 he_writel(he_dev, RBPS_MASK(he_dev->rbps_tail), G0_RBPS_T); 1943 he_writel(he_dev, RBPL_MASK(he_dev->rbpl_tail), G0_RBPL_T);
2034} 1944}
2035 1945
2036static void 1946static void
@@ -2055,10 +1965,8 @@ he_tasklet(unsigned long data)
2055 HPRINTK("rbrq%d threshold\n", group); 1965 HPRINTK("rbrq%d threshold\n", group);
2056 /* fall through */ 1966 /* fall through */
2057 case ITYPE_RBRQ_TIMER: 1967 case ITYPE_RBRQ_TIMER:
2058 if (he_service_rbrq(he_dev, group)) { 1968 if (he_service_rbrq(he_dev, group))
2059 he_service_rbpl(he_dev, group); 1969 he_service_rbpl(he_dev, group);
2060 he_service_rbps(he_dev, group);
2061 }
2062 break; 1970 break;
2063 case ITYPE_TBRQ_THRESH: 1971 case ITYPE_TBRQ_THRESH:
2064 HPRINTK("tbrq%d threshold\n", group); 1972 HPRINTK("tbrq%d threshold\n", group);
@@ -2070,7 +1978,7 @@ he_tasklet(unsigned long data)
2070 he_service_rbpl(he_dev, group); 1978 he_service_rbpl(he_dev, group);
2071 break; 1979 break;
2072 case ITYPE_RBPS_THRESH: 1980 case ITYPE_RBPS_THRESH:
2073 he_service_rbps(he_dev, group); 1981 /* shouldn't happen unless small buffers enabled */
2074 break; 1982 break;
2075 case ITYPE_PHY: 1983 case ITYPE_PHY:
2076 HPRINTK("phy interrupt\n"); 1984 HPRINTK("phy interrupt\n");
@@ -2098,7 +2006,6 @@ he_tasklet(unsigned long data)
2098 2006
2099 he_service_rbrq(he_dev, 0); 2007 he_service_rbrq(he_dev, 0);
2100 he_service_rbpl(he_dev, 0); 2008 he_service_rbpl(he_dev, 0);
2101 he_service_rbps(he_dev, 0);
2102 he_service_tbrq(he_dev, 0); 2009 he_service_tbrq(he_dev, 0);
2103 break; 2010 break;
2104 default: 2011 default:
@@ -2252,7 +2159,7 @@ he_open(struct atm_vcc *vcc)
2252 return -ENOMEM; 2159 return -ENOMEM;
2253 } 2160 }
2254 2161
2255 he_vcc->iov_tail = he_vcc->iov_head; 2162 INIT_LIST_HEAD(&he_vcc->buffers);
2256 he_vcc->pdu_len = 0; 2163 he_vcc->pdu_len = 0;
2257 he_vcc->rc_index = -1; 2164 he_vcc->rc_index = -1;
2258 2165
@@ -2406,8 +2313,8 @@ he_open(struct atm_vcc *vcc)
2406 goto open_failed; 2313 goto open_failed;
2407 } 2314 }
2408 2315
2409 rsr1 = RSR1_GROUP(0); 2316 rsr1 = RSR1_GROUP(0) | RSR1_RBPL_ONLY;
2410 rsr4 = RSR4_GROUP(0); 2317 rsr4 = RSR4_GROUP(0) | RSR4_RBPL_ONLY;
2411 rsr0 = vcc->qos.rxtp.traffic_class == ATM_UBR ? 2318 rsr0 = vcc->qos.rxtp.traffic_class == ATM_UBR ?
2412 (RSR0_EPD_ENABLE|RSR0_PPD_ENABLE) : 0; 2319 (RSR0_EPD_ENABLE|RSR0_PPD_ENABLE) : 0;
2413 2320
@@ -2963,8 +2870,7 @@ module_param(sdh, bool, 0);
2963MODULE_PARM_DESC(sdh, "use SDH framing (default 0)"); 2870MODULE_PARM_DESC(sdh, "use SDH framing (default 0)");
2964 2871
2965static struct pci_device_id he_pci_tbl[] = { 2872static struct pci_device_id he_pci_tbl[] = {
2966 { PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_HE, PCI_ANY_ID, PCI_ANY_ID, 2873 { PCI_VDEVICE(FORE, PCI_DEVICE_ID_FORE_HE), 0 },
2967 0, 0, 0 },
2968 { 0, } 2874 { 0, }
2969}; 2875};
2970 2876
diff --git a/drivers/atm/he.h b/drivers/atm/he.h
index c2983e0d4ec1..110a27d2ecfc 100644
--- a/drivers/atm/he.h
+++ b/drivers/atm/he.h
@@ -67,11 +67,6 @@
67#define CONFIG_RBPL_BUFSIZE 4096 67#define CONFIG_RBPL_BUFSIZE 4096
68#define RBPL_MASK(x) (((unsigned long)(x))&((CONFIG_RBPL_SIZE<<3)-1)) 68#define RBPL_MASK(x) (((unsigned long)(x))&((CONFIG_RBPL_SIZE<<3)-1))
69 69
70#define CONFIG_RBPS_SIZE 1024
71#define CONFIG_RBPS_THRESH 64
72#define CONFIG_RBPS_BUFSIZE 128
73#define RBPS_MASK(x) (((unsigned long)(x))&((CONFIG_RBPS_SIZE<<3)-1))
74
75/* 5.1.3 initialize connection memory */ 70/* 5.1.3 initialize connection memory */
76 71
77#define CONFIG_RSRA 0x00000 72#define CONFIG_RSRA 0x00000
@@ -203,36 +198,37 @@ struct he_hsp {
203 } group[HE_NUM_GROUPS]; 198 } group[HE_NUM_GROUPS];
204}; 199};
205 200
206/* figure 2.9 receive buffer pools */ 201/*
202 * figure 2.9 receive buffer pools
203 *
204 * since a virtual address might be more than 32 bits, we store an index
205 * in the virt member of he_rbp. NOTE: the lower six bits in the rbrq
206 * addr member are used for buffer status further limiting us to 26 bits.
207 */
207 208
208struct he_rbp { 209struct he_rbp {
209 volatile u32 phys; 210 volatile u32 phys;
210 volatile u32 status; 211 volatile u32 idx; /* virt */
211}; 212};
212 213
213/* NOTE: it is suggested that virt be the virtual address of the host 214#define RBP_IDX_OFFSET 6
214 buffer. on a 64-bit machine, this would not work. Instead, we
215 store the real virtual address in another list, and store an index
216 (and buffer status) in the virt member.
217*/
218 215
219#define RBP_INDEX_OFF 6 216/*
220#define RBP_INDEX(x) (((long)(x) >> RBP_INDEX_OFF) & 0xffff) 217 * the he dma engine will try to hold an extra 16 buffers in its local
221#define RBP_LOANED 0x80000000 218 * caches. and add a couple buffers for safety.
222#define RBP_SMALLBUF 0x40000000 219 */
223 220
224struct he_virt { 221#define RBPL_TABLE_SIZE (CONFIG_RBPL_SIZE + 16 + 2)
225 void *virt;
226};
227 222
228#define RBPL_ALIGNMENT CONFIG_RBPL_SIZE 223struct he_buff {
229#define RBPS_ALIGNMENT CONFIG_RBPS_SIZE 224 struct list_head entry;
225 dma_addr_t mapping;
226 unsigned long len;
227 u8 data[];
228};
230 229
231#ifdef notyet 230#ifdef notyet
232struct he_group { 231struct he_group {
233 u32 rpbs_size, rpbs_qsize;
234 struct he_rbp rbps_ba;
235
236 u32 rpbl_size, rpbl_qsize; 232 u32 rpbl_size, rpbl_qsize;
237 struct he_rpb_entry *rbpl_ba; 233 struct he_rpb_entry *rbpl_ba;
238}; 234};
@@ -297,18 +293,15 @@ struct he_dev {
297 struct he_rbrq *rbrq_base, *rbrq_head; 293 struct he_rbrq *rbrq_base, *rbrq_head;
298 int rbrq_peak; 294 int rbrq_peak;
299 295
296 struct he_buff **rbpl_virt;
297 unsigned long *rbpl_table;
298 unsigned long rbpl_hint;
300 struct pci_pool *rbpl_pool; 299 struct pci_pool *rbpl_pool;
301 dma_addr_t rbpl_phys; 300 dma_addr_t rbpl_phys;
302 struct he_rbp *rbpl_base, *rbpl_tail; 301 struct he_rbp *rbpl_base, *rbpl_tail;
303 struct he_virt *rbpl_virt; 302 struct list_head rbpl_outstanding;
304 int rbpl_peak; 303 int rbpl_peak;
305 304
306 struct pci_pool *rbps_pool;
307 dma_addr_t rbps_phys;
308 struct he_rbp *rbps_base, *rbps_tail;
309 struct he_virt *rbps_virt;
310 int rbps_peak;
311
312 dma_addr_t tbrq_phys; 305 dma_addr_t tbrq_phys;
313 struct he_tbrq *tbrq_base, *tbrq_head; 306 struct he_tbrq *tbrq_base, *tbrq_head;
314 int tbrq_peak; 307 int tbrq_peak;
@@ -321,20 +314,12 @@ struct he_dev {
321 struct he_dev *next; 314 struct he_dev *next;
322}; 315};
323 316
324struct he_iovec
325{
326 u32 iov_base;
327 u32 iov_len;
328};
329
330#define HE_MAXIOV 20 317#define HE_MAXIOV 20
331 318
332struct he_vcc 319struct he_vcc
333{ 320{
334 struct he_iovec iov_head[HE_MAXIOV]; 321 struct list_head buffers;
335 struct he_iovec *iov_tail;
336 int pdu_len; 322 int pdu_len;
337
338 int rc_index; 323 int rc_index;
339 324
340 wait_queue_head_t rx_waitq; 325 wait_queue_head_t rx_waitq;
diff --git a/drivers/atm/idt77105.c b/drivers/atm/idt77105.c
index dab5cf5274fb..bca9cb89a118 100644
--- a/drivers/atm/idt77105.c
+++ b/drivers/atm/idt77105.c
@@ -126,7 +126,7 @@ static void idt77105_restart_timer_func(unsigned long dummy)
126 istat = GET(ISTAT); /* side effect: clears all interrupt status bits */ 126 istat = GET(ISTAT); /* side effect: clears all interrupt status bits */
127 if (istat & IDT77105_ISTAT_GOODSIG) { 127 if (istat & IDT77105_ISTAT_GOODSIG) {
128 /* Found signal again */ 128 /* Found signal again */
129 dev->signal = ATM_PHY_SIG_FOUND; 129 atm_dev_signal_change(dev, ATM_PHY_SIG_FOUND);
130 printk(KERN_NOTICE "%s(itf %d): signal detected again\n", 130 printk(KERN_NOTICE "%s(itf %d): signal detected again\n",
131 dev->type,dev->number); 131 dev->type,dev->number);
132 /* flush the receive FIFO */ 132 /* flush the receive FIFO */
@@ -222,7 +222,7 @@ static void idt77105_int(struct atm_dev *dev)
222 /* Rx Signal Condition Change - line went up or down */ 222 /* Rx Signal Condition Change - line went up or down */
223 if (istat & IDT77105_ISTAT_GOODSIG) { /* signal detected again */ 223 if (istat & IDT77105_ISTAT_GOODSIG) { /* signal detected again */
224 /* This should not happen (restart timer does it) but JIC */ 224 /* This should not happen (restart timer does it) but JIC */
225 dev->signal = ATM_PHY_SIG_FOUND; 225 atm_dev_signal_change(dev, ATM_PHY_SIG_FOUND);
226 } else { /* signal lost */ 226 } else { /* signal lost */
227 /* 227 /*
228 * Disable interrupts and stop all transmission and 228 * Disable interrupts and stop all transmission and
@@ -235,7 +235,7 @@ static void idt77105_int(struct atm_dev *dev)
235 IDT77105_MCR_DRIC| 235 IDT77105_MCR_DRIC|
236 IDT77105_MCR_HALTTX 236 IDT77105_MCR_HALTTX
237 ) & ~IDT77105_MCR_EIP, MCR); 237 ) & ~IDT77105_MCR_EIP, MCR);
238 dev->signal = ATM_PHY_SIG_LOST; 238 atm_dev_signal_change(dev, ATM_PHY_SIG_LOST);
239 printk(KERN_NOTICE "%s(itf %d): signal lost\n", 239 printk(KERN_NOTICE "%s(itf %d): signal lost\n",
240 dev->type,dev->number); 240 dev->type,dev->number);
241 } 241 }
@@ -272,8 +272,9 @@ static int idt77105_start(struct atm_dev *dev)
272 memset(&PRIV(dev)->stats,0,sizeof(struct idt77105_stats)); 272 memset(&PRIV(dev)->stats,0,sizeof(struct idt77105_stats));
273 273
274 /* initialise dev->signal from Good Signal Bit */ 274 /* initialise dev->signal from Good Signal Bit */
275 dev->signal = GET(ISTAT) & IDT77105_ISTAT_GOODSIG ? ATM_PHY_SIG_FOUND : 275 atm_dev_signal_change(dev,
276 ATM_PHY_SIG_LOST; 276 GET(ISTAT) & IDT77105_ISTAT_GOODSIG ?
277 ATM_PHY_SIG_FOUND : ATM_PHY_SIG_LOST);
277 if (dev->signal == ATM_PHY_SIG_LOST) 278 if (dev->signal == ATM_PHY_SIG_LOST)
278 printk(KERN_WARNING "%s(itf %d): no signal\n",dev->type, 279 printk(KERN_WARNING "%s(itf %d): no signal\n",dev->type,
279 dev->number); 280 dev->number);
diff --git a/drivers/atm/idt77252.c b/drivers/atm/idt77252.c
index 98657a6a330d..1679cbf0c584 100644
--- a/drivers/atm/idt77252.c
+++ b/drivers/atm/idt77252.c
@@ -3364,7 +3364,7 @@ init_card(struct atm_dev *dev)
3364 writel(SAR_STAT_TMROF, SAR_REG_STAT); 3364 writel(SAR_STAT_TMROF, SAR_REG_STAT);
3365 } 3365 }
3366 IPRINTK("%s: Request IRQ ... ", card->name); 3366 IPRINTK("%s: Request IRQ ... ", card->name);
3367 if (request_irq(pcidev->irq, idt77252_interrupt, IRQF_DISABLED|IRQF_SHARED, 3367 if (request_irq(pcidev->irq, idt77252_interrupt, IRQF_SHARED,
3368 card->name, card) != 0) { 3368 card->name, card) != 0) {
3369 printk("%s: can't allocate IRQ.\n", card->name); 3369 printk("%s: can't allocate IRQ.\n", card->name);
3370 deinit_card(card); 3370 deinit_card(card);
@@ -3779,8 +3779,7 @@ err_out_disable_pdev:
3779 3779
3780static struct pci_device_id idt77252_pci_tbl[] = 3780static struct pci_device_id idt77252_pci_tbl[] =
3781{ 3781{
3782 { PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77252, 3782 { PCI_VDEVICE(IDT, PCI_DEVICE_ID_IDT_IDT77252), 0 },
3783 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
3784 { 0, } 3783 { 0, }
3785}; 3784};
3786 3785
diff --git a/drivers/atm/nicstar.c b/drivers/atm/nicstar.c
index b7473a6110a7..2f3516b7f118 100644
--- a/drivers/atm/nicstar.c
+++ b/drivers/atm/nicstar.c
@@ -1,5 +1,4 @@
1/****************************************************************************** 1/*
2 *
3 * nicstar.c 2 * nicstar.c
4 * 3 *
5 * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards. 4 * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
@@ -16,12 +15,10 @@
16 * 15 *
17 * 16 *
18 * (C) INESC 1999 17 * (C) INESC 1999
19 * 18 */
20 *
21 ******************************************************************************/
22
23 19
24/**** IMPORTANT INFORMATION *************************************************** 20/*
21 * IMPORTANT INFORMATION
25 * 22 *
26 * There are currently three types of spinlocks: 23 * There are currently three types of spinlocks:
27 * 24 *
@@ -31,9 +28,9 @@
31 * 28 *
32 * These must NEVER be grabbed in reverse order. 29 * These must NEVER be grabbed in reverse order.
33 * 30 *
34 ******************************************************************************/ 31 */
35 32
36/* Header files ***************************************************************/ 33/* Header files */
37 34
38#include <linux/module.h> 35#include <linux/module.h>
39#include <linux/kernel.h> 36#include <linux/kernel.h>
@@ -41,6 +38,7 @@
41#include <linux/atmdev.h> 38#include <linux/atmdev.h>
42#include <linux/atm.h> 39#include <linux/atm.h>
43#include <linux/pci.h> 40#include <linux/pci.h>
41#include <linux/dma-mapping.h>
44#include <linux/types.h> 42#include <linux/types.h>
45#include <linux/string.h> 43#include <linux/string.h>
46#include <linux/delay.h> 44#include <linux/delay.h>
@@ -50,6 +48,7 @@
50#include <linux/interrupt.h> 48#include <linux/interrupt.h>
51#include <linux/bitops.h> 49#include <linux/bitops.h>
52#include <linux/slab.h> 50#include <linux/slab.h>
51#include <linux/idr.h>
53#include <asm/io.h> 52#include <asm/io.h>
54#include <asm/uaccess.h> 53#include <asm/uaccess.h>
55#include <asm/atomic.h> 54#include <asm/atomic.h>
@@ -61,16 +60,11 @@
61#include "idt77105.h" 60#include "idt77105.h"
62#endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */ 61#endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
63 62
64#if BITS_PER_LONG != 32 63/* Additional code */
65# error FIXME: this driver requires a 32-bit platform
66#endif
67
68/* Additional code ************************************************************/
69 64
70#include "nicstarmac.c" 65#include "nicstarmac.c"
71 66
72 67/* Configurable parameters */
73/* Configurable parameters ****************************************************/
74 68
75#undef PHY_LOOPBACK 69#undef PHY_LOOPBACK
76#undef TX_DEBUG 70#undef TX_DEBUG
@@ -78,11 +72,10 @@
78#undef GENERAL_DEBUG 72#undef GENERAL_DEBUG
79#undef EXTRA_DEBUG 73#undef EXTRA_DEBUG
80 74
81#undef NS_USE_DESTRUCTORS /* For now keep this undefined unless you know 75#undef NS_USE_DESTRUCTORS /* For now keep this undefined unless you know
82 you're going to use only raw ATM */ 76 you're going to use only raw ATM */
83 77
84 78/* Do not touch these */
85/* Do not touch these *********************************************************/
86 79
87#ifdef TX_DEBUG 80#ifdef TX_DEBUG
88#define TXPRINTK(args...) printk(args) 81#define TXPRINTK(args...) printk(args)
@@ -108,2908 +101,2773 @@
108#define XPRINTK(args...) 101#define XPRINTK(args...)
109#endif /* EXTRA_DEBUG */ 102#endif /* EXTRA_DEBUG */
110 103
111 104/* Macros */
112/* Macros *********************************************************************/
113 105
114#define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ) 106#define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
115 107
116#define NS_DELAY mdelay(1) 108#define NS_DELAY mdelay(1)
117 109
118#define ALIGN_BUS_ADDR(addr, alignment) \ 110#define PTR_DIFF(a, b) ((u32)((unsigned long)(a) - (unsigned long)(b)))
119 ((((u32) (addr)) + (((u32) (alignment)) - 1)) & ~(((u32) (alignment)) - 1))
120#define ALIGN_ADDRESS(addr, alignment) \
121 bus_to_virt(ALIGN_BUS_ADDR(virt_to_bus(addr), alignment))
122
123#undef CEIL
124 111
125#ifndef ATM_SKB 112#ifndef ATM_SKB
126#define ATM_SKB(s) (&(s)->atm) 113#define ATM_SKB(s) (&(s)->atm)
127#endif 114#endif
128 115
116#define scq_virt_to_bus(scq, p) \
117 (scq->dma + ((unsigned long)(p) - (unsigned long)(scq)->org))
129 118
130/* Function declarations ******************************************************/ 119/* Function declarations */
131 120
132static u32 ns_read_sram(ns_dev *card, u32 sram_address); 121static u32 ns_read_sram(ns_dev * card, u32 sram_address);
133static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count); 122static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
123 int count);
134static int __devinit ns_init_card(int i, struct pci_dev *pcidev); 124static int __devinit ns_init_card(int i, struct pci_dev *pcidev);
135static void __devinit ns_init_card_error(ns_dev *card, int error); 125static void __devinit ns_init_card_error(ns_dev * card, int error);
136static scq_info *get_scq(int size, u32 scd); 126static scq_info *get_scq(ns_dev *card, int size, u32 scd);
137static void free_scq(scq_info *scq, struct atm_vcc *vcc); 127static void free_scq(ns_dev *card, scq_info * scq, struct atm_vcc *vcc);
138static void push_rxbufs(ns_dev *, struct sk_buff *); 128static void push_rxbufs(ns_dev *, struct sk_buff *);
139static irqreturn_t ns_irq_handler(int irq, void *dev_id); 129static irqreturn_t ns_irq_handler(int irq, void *dev_id);
140static int ns_open(struct atm_vcc *vcc); 130static int ns_open(struct atm_vcc *vcc);
141static void ns_close(struct atm_vcc *vcc); 131static void ns_close(struct atm_vcc *vcc);
142static void fill_tst(ns_dev *card, int n, vc_map *vc); 132static void fill_tst(ns_dev * card, int n, vc_map * vc);
143static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb); 133static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
144static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd, 134static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
145 struct sk_buff *skb); 135 struct sk_buff *skb);
146static void process_tsq(ns_dev *card); 136static void process_tsq(ns_dev * card);
147static void drain_scq(ns_dev *card, scq_info *scq, int pos); 137static void drain_scq(ns_dev * card, scq_info * scq, int pos);
148static void process_rsq(ns_dev *card); 138static void process_rsq(ns_dev * card);
149static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe); 139static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe);
150#ifdef NS_USE_DESTRUCTORS 140#ifdef NS_USE_DESTRUCTORS
151static void ns_sb_destructor(struct sk_buff *sb); 141static void ns_sb_destructor(struct sk_buff *sb);
152static void ns_lb_destructor(struct sk_buff *lb); 142static void ns_lb_destructor(struct sk_buff *lb);
153static void ns_hb_destructor(struct sk_buff *hb); 143static void ns_hb_destructor(struct sk_buff *hb);
154#endif /* NS_USE_DESTRUCTORS */ 144#endif /* NS_USE_DESTRUCTORS */
155static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb); 145static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb);
156static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count); 146static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count);
157static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb); 147static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb);
158static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb); 148static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb);
159static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb); 149static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb);
160static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page); 150static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page);
161static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg); 151static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg);
162static void which_list(ns_dev *card, struct sk_buff *skb); 152#ifdef EXTRA_DEBUG
153static void which_list(ns_dev * card, struct sk_buff *skb);
154#endif
163static void ns_poll(unsigned long arg); 155static void ns_poll(unsigned long arg);
164static int ns_parse_mac(char *mac, unsigned char *esi); 156static int ns_parse_mac(char *mac, unsigned char *esi);
165static short ns_h2i(char c);
166static void ns_phy_put(struct atm_dev *dev, unsigned char value, 157static void ns_phy_put(struct atm_dev *dev, unsigned char value,
167 unsigned long addr); 158 unsigned long addr);
168static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr); 159static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
169 160
170 161/* Global variables */
171
172/* Global variables ***********************************************************/
173 162
174static struct ns_dev *cards[NS_MAX_CARDS]; 163static struct ns_dev *cards[NS_MAX_CARDS];
175static unsigned num_cards; 164static unsigned num_cards;
176static struct atmdev_ops atm_ops = 165static struct atmdev_ops atm_ops = {
177{ 166 .open = ns_open,
178 .open = ns_open, 167 .close = ns_close,
179 .close = ns_close, 168 .ioctl = ns_ioctl,
180 .ioctl = ns_ioctl, 169 .send = ns_send,
181 .send = ns_send, 170 .phy_put = ns_phy_put,
182 .phy_put = ns_phy_put, 171 .phy_get = ns_phy_get,
183 .phy_get = ns_phy_get, 172 .proc_read = ns_proc_read,
184 .proc_read = ns_proc_read, 173 .owner = THIS_MODULE,
185 .owner = THIS_MODULE,
186}; 174};
175
187static struct timer_list ns_timer; 176static struct timer_list ns_timer;
188static char *mac[NS_MAX_CARDS]; 177static char *mac[NS_MAX_CARDS];
189module_param_array(mac, charp, NULL, 0); 178module_param_array(mac, charp, NULL, 0);
190MODULE_LICENSE("GPL"); 179MODULE_LICENSE("GPL");
191 180
192 181/* Functions */
193/* Functions*******************************************************************/
194 182
195static int __devinit nicstar_init_one(struct pci_dev *pcidev, 183static int __devinit nicstar_init_one(struct pci_dev *pcidev,
196 const struct pci_device_id *ent) 184 const struct pci_device_id *ent)
197{ 185{
198 static int index = -1; 186 static int index = -1;
199 unsigned int error; 187 unsigned int error;
200 188
201 index++; 189 index++;
202 cards[index] = NULL; 190 cards[index] = NULL;
203 191
204 error = ns_init_card(index, pcidev); 192 error = ns_init_card(index, pcidev);
205 if (error) { 193 if (error) {
206 cards[index--] = NULL; /* don't increment index */ 194 cards[index--] = NULL; /* don't increment index */
207 goto err_out; 195 goto err_out;
208 } 196 }
209 197
210 return 0; 198 return 0;
211err_out: 199err_out:
212 return -ENODEV; 200 return -ENODEV;
213} 201}
214 202
215
216
217static void __devexit nicstar_remove_one(struct pci_dev *pcidev) 203static void __devexit nicstar_remove_one(struct pci_dev *pcidev)
218{ 204{
219 int i, j; 205 int i, j;
220 ns_dev *card = pci_get_drvdata(pcidev); 206 ns_dev *card = pci_get_drvdata(pcidev);
221 struct sk_buff *hb; 207 struct sk_buff *hb;
222 struct sk_buff *iovb; 208 struct sk_buff *iovb;
223 struct sk_buff *lb; 209 struct sk_buff *lb;
224 struct sk_buff *sb; 210 struct sk_buff *sb;
225 211
226 i = card->index; 212 i = card->index;
227 213
228 if (cards[i] == NULL) 214 if (cards[i] == NULL)
229 return; 215 return;
230 216
231 if (card->atmdev->phy && card->atmdev->phy->stop) 217 if (card->atmdev->phy && card->atmdev->phy->stop)
232 card->atmdev->phy->stop(card->atmdev); 218 card->atmdev->phy->stop(card->atmdev);
233 219
234 /* Stop everything */ 220 /* Stop everything */
235 writel(0x00000000, card->membase + CFG); 221 writel(0x00000000, card->membase + CFG);
236 222
237 /* De-register device */ 223 /* De-register device */
238 atm_dev_deregister(card->atmdev); 224 atm_dev_deregister(card->atmdev);
239 225
240 /* Disable PCI device */ 226 /* Disable PCI device */
241 pci_disable_device(pcidev); 227 pci_disable_device(pcidev);
242 228
243 /* Free up resources */ 229 /* Free up resources */
244 j = 0; 230 j = 0;
245 PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count); 231 PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
246 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL) 232 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL) {
247 { 233 dev_kfree_skb_any(hb);
248 dev_kfree_skb_any(hb); 234 j++;
249 j++; 235 }
250 } 236 PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
251 PRINTK("nicstar%d: %d huge buffers freed.\n", i, j); 237 j = 0;
252 j = 0; 238 PRINTK("nicstar%d: freeing %d iovec buffers.\n", i,
253 PRINTK("nicstar%d: freeing %d iovec buffers.\n", i, card->iovpool.count); 239 card->iovpool.count);
254 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL) 240 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL) {
255 { 241 dev_kfree_skb_any(iovb);
256 dev_kfree_skb_any(iovb); 242 j++;
257 j++; 243 }
258 } 244 PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
259 PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j); 245 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
260 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL) 246 dev_kfree_skb_any(lb);
261 dev_kfree_skb_any(lb); 247 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
262 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL) 248 dev_kfree_skb_any(sb);
263 dev_kfree_skb_any(sb); 249 free_scq(card, card->scq0, NULL);
264 free_scq(card->scq0, NULL); 250 for (j = 0; j < NS_FRSCD_NUM; j++) {
265 for (j = 0; j < NS_FRSCD_NUM; j++) 251 if (card->scd2vc[j] != NULL)
266 { 252 free_scq(card, card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
267 if (card->scd2vc[j] != NULL) 253 }
268 free_scq(card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc); 254 idr_remove_all(&card->idr);
269 } 255 idr_destroy(&card->idr);
270 kfree(card->rsq.org); 256 pci_free_consistent(card->pcidev, NS_RSQSIZE + NS_RSQ_ALIGNMENT,
271 kfree(card->tsq.org); 257 card->rsq.org, card->rsq.dma);
272 free_irq(card->pcidev->irq, card); 258 pci_free_consistent(card->pcidev, NS_TSQSIZE + NS_TSQ_ALIGNMENT,
273 iounmap(card->membase); 259 card->tsq.org, card->tsq.dma);
274 kfree(card); 260 free_irq(card->pcidev->irq, card);
261 iounmap(card->membase);
262 kfree(card);
275} 263}
276 264
277 265static struct pci_device_id nicstar_pci_tbl[] __devinitdata = {
278 266 { PCI_VDEVICE(IDT, PCI_DEVICE_ID_IDT_IDT77201), 0 },
279static struct pci_device_id nicstar_pci_tbl[] __devinitdata =
280{
281 {PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77201,
282 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
283 {0,} /* terminate list */ 267 {0,} /* terminate list */
284}; 268};
285MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
286
287 269
270MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
288 271
289static struct pci_driver nicstar_driver = { 272static struct pci_driver nicstar_driver = {
290 .name = "nicstar", 273 .name = "nicstar",
291 .id_table = nicstar_pci_tbl, 274 .id_table = nicstar_pci_tbl,
292 .probe = nicstar_init_one, 275 .probe = nicstar_init_one,
293 .remove = __devexit_p(nicstar_remove_one), 276 .remove = __devexit_p(nicstar_remove_one),
294}; 277};
295 278
296
297
298static int __init nicstar_init(void) 279static int __init nicstar_init(void)
299{ 280{
300 unsigned error = 0; /* Initialized to remove compile warning */ 281 unsigned error = 0; /* Initialized to remove compile warning */
282
283 XPRINTK("nicstar: nicstar_init() called.\n");
301 284
302 XPRINTK("nicstar: nicstar_init() called.\n"); 285 error = pci_register_driver(&nicstar_driver);
303 286
304 error = pci_register_driver(&nicstar_driver); 287 TXPRINTK("nicstar: TX debug enabled.\n");
305 288 RXPRINTK("nicstar: RX debug enabled.\n");
306 TXPRINTK("nicstar: TX debug enabled.\n"); 289 PRINTK("nicstar: General debug enabled.\n");
307 RXPRINTK("nicstar: RX debug enabled.\n");
308 PRINTK("nicstar: General debug enabled.\n");
309#ifdef PHY_LOOPBACK 290#ifdef PHY_LOOPBACK
310 printk("nicstar: using PHY loopback.\n"); 291 printk("nicstar: using PHY loopback.\n");
311#endif /* PHY_LOOPBACK */ 292#endif /* PHY_LOOPBACK */
312 XPRINTK("nicstar: nicstar_init() returned.\n"); 293 XPRINTK("nicstar: nicstar_init() returned.\n");
313
314 if (!error) {
315 init_timer(&ns_timer);
316 ns_timer.expires = jiffies + NS_POLL_PERIOD;
317 ns_timer.data = 0UL;
318 ns_timer.function = ns_poll;
319 add_timer(&ns_timer);
320 }
321
322 return error;
323}
324 294
295 if (!error) {
296 init_timer(&ns_timer);
297 ns_timer.expires = jiffies + NS_POLL_PERIOD;
298 ns_timer.data = 0UL;
299 ns_timer.function = ns_poll;
300 add_timer(&ns_timer);
301 }
325 302
303 return error;
304}
326 305
327static void __exit nicstar_cleanup(void) 306static void __exit nicstar_cleanup(void)
328{ 307{
329 XPRINTK("nicstar: nicstar_cleanup() called.\n"); 308 XPRINTK("nicstar: nicstar_cleanup() called.\n");
330 309
331 del_timer(&ns_timer); 310 del_timer(&ns_timer);
332 311
333 pci_unregister_driver(&nicstar_driver); 312 pci_unregister_driver(&nicstar_driver);
334 313
335 XPRINTK("nicstar: nicstar_cleanup() returned.\n"); 314 XPRINTK("nicstar: nicstar_cleanup() returned.\n");
336} 315}
337 316
338 317static u32 ns_read_sram(ns_dev * card, u32 sram_address)
339
340static u32 ns_read_sram(ns_dev *card, u32 sram_address)
341{ 318{
342 unsigned long flags; 319 unsigned long flags;
343 u32 data; 320 u32 data;
344 sram_address <<= 2; 321 sram_address <<= 2;
345 sram_address &= 0x0007FFFC; /* address must be dword aligned */ 322 sram_address &= 0x0007FFFC; /* address must be dword aligned */
346 sram_address |= 0x50000000; /* SRAM read command */ 323 sram_address |= 0x50000000; /* SRAM read command */
347 spin_lock_irqsave(&card->res_lock, flags); 324 spin_lock_irqsave(&card->res_lock, flags);
348 while (CMD_BUSY(card)); 325 while (CMD_BUSY(card)) ;
349 writel(sram_address, card->membase + CMD); 326 writel(sram_address, card->membase + CMD);
350 while (CMD_BUSY(card)); 327 while (CMD_BUSY(card)) ;
351 data = readl(card->membase + DR0); 328 data = readl(card->membase + DR0);
352 spin_unlock_irqrestore(&card->res_lock, flags); 329 spin_unlock_irqrestore(&card->res_lock, flags);
353 return data; 330 return data;
354} 331}
355 332
356 333static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
357 334 int count)
358static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count)
359{ 335{
360 unsigned long flags; 336 unsigned long flags;
361 int i, c; 337 int i, c;
362 count--; /* count range now is 0..3 instead of 1..4 */ 338 count--; /* count range now is 0..3 instead of 1..4 */
363 c = count; 339 c = count;
364 c <<= 2; /* to use increments of 4 */ 340 c <<= 2; /* to use increments of 4 */
365 spin_lock_irqsave(&card->res_lock, flags); 341 spin_lock_irqsave(&card->res_lock, flags);
366 while (CMD_BUSY(card)); 342 while (CMD_BUSY(card)) ;
367 for (i = 0; i <= c; i += 4) 343 for (i = 0; i <= c; i += 4)
368 writel(*(value++), card->membase + i); 344 writel(*(value++), card->membase + i);
369 /* Note: DR# registers are the first 4 dwords in nicstar's memspace, 345 /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
370 so card->membase + DR0 == card->membase */ 346 so card->membase + DR0 == card->membase */
371 sram_address <<= 2; 347 sram_address <<= 2;
372 sram_address &= 0x0007FFFC; 348 sram_address &= 0x0007FFFC;
373 sram_address |= (0x40000000 | count); 349 sram_address |= (0x40000000 | count);
374 writel(sram_address, card->membase + CMD); 350 writel(sram_address, card->membase + CMD);
375 spin_unlock_irqrestore(&card->res_lock, flags); 351 spin_unlock_irqrestore(&card->res_lock, flags);
376} 352}
377 353
378
379static int __devinit ns_init_card(int i, struct pci_dev *pcidev) 354static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
380{ 355{
381 int j; 356 int j;
382 struct ns_dev *card = NULL; 357 struct ns_dev *card = NULL;
383 unsigned char pci_latency; 358 unsigned char pci_latency;
384 unsigned error; 359 unsigned error;
385 u32 data; 360 u32 data;
386 u32 u32d[4]; 361 u32 u32d[4];
387 u32 ns_cfg_rctsize; 362 u32 ns_cfg_rctsize;
388 int bcount; 363 int bcount;
389 unsigned long membase; 364 unsigned long membase;
390 365
391 error = 0; 366 error = 0;
392 367
393 if (pci_enable_device(pcidev)) 368 if (pci_enable_device(pcidev)) {
394 { 369 printk("nicstar%d: can't enable PCI device\n", i);
395 printk("nicstar%d: can't enable PCI device\n", i); 370 error = 2;
396 error = 2; 371 ns_init_card_error(card, error);
397 ns_init_card_error(card, error); 372 return error;
398 return error; 373 }
399 } 374 if ((pci_set_dma_mask(pcidev, DMA_BIT_MASK(32)) != 0) ||
400 375 (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32)) != 0)) {
401 if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL) 376 printk(KERN_WARNING
402 { 377 "nicstar%d: No suitable DMA available.\n", i);
403 printk("nicstar%d: can't allocate memory for device structure.\n", i); 378 error = 2;
404 error = 2; 379 ns_init_card_error(card, error);
405 ns_init_card_error(card, error); 380 return error;
406 return error; 381 }
407 } 382
408 cards[i] = card; 383 if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL) {
409 spin_lock_init(&card->int_lock); 384 printk
410 spin_lock_init(&card->res_lock); 385 ("nicstar%d: can't allocate memory for device structure.\n",
411 386 i);
412 pci_set_drvdata(pcidev, card); 387 error = 2;
413 388 ns_init_card_error(card, error);
414 card->index = i; 389 return error;
415 card->atmdev = NULL; 390 }
416 card->pcidev = pcidev; 391 cards[i] = card;
417 membase = pci_resource_start(pcidev, 1); 392 spin_lock_init(&card->int_lock);
418 card->membase = ioremap(membase, NS_IOREMAP_SIZE); 393 spin_lock_init(&card->res_lock);
419 if (!card->membase) 394
420 { 395 pci_set_drvdata(pcidev, card);
421 printk("nicstar%d: can't ioremap() membase.\n",i); 396
422 error = 3; 397 card->index = i;
423 ns_init_card_error(card, error); 398 card->atmdev = NULL;
424 return error; 399 card->pcidev = pcidev;
425 } 400 membase = pci_resource_start(pcidev, 1);
426 PRINTK("nicstar%d: membase at 0x%x.\n", i, card->membase); 401 card->membase = ioremap(membase, NS_IOREMAP_SIZE);
427 402 if (!card->membase) {
428 pci_set_master(pcidev); 403 printk("nicstar%d: can't ioremap() membase.\n", i);
429 404 error = 3;
430 if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0) 405 ns_init_card_error(card, error);
431 { 406 return error;
432 printk("nicstar%d: can't read PCI latency timer.\n", i); 407 }
433 error = 6; 408 PRINTK("nicstar%d: membase at 0x%p.\n", i, card->membase);
434 ns_init_card_error(card, error); 409
435 return error; 410 pci_set_master(pcidev);
436 } 411
412 if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0) {
413 printk("nicstar%d: can't read PCI latency timer.\n", i);
414 error = 6;
415 ns_init_card_error(card, error);
416 return error;
417 }
437#ifdef NS_PCI_LATENCY 418#ifdef NS_PCI_LATENCY
438 if (pci_latency < NS_PCI_LATENCY) 419 if (pci_latency < NS_PCI_LATENCY) {
439 { 420 PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i,
440 PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i, NS_PCI_LATENCY); 421 NS_PCI_LATENCY);
441 for (j = 1; j < 4; j++) 422 for (j = 1; j < 4; j++) {
442 { 423 if (pci_write_config_byte
443 if (pci_write_config_byte(pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0) 424 (pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
444 break; 425 break;
445 } 426 }
446 if (j == 4) 427 if (j == 4) {
447 { 428 printk
448 printk("nicstar%d: can't set PCI latency timer to %d.\n", i, NS_PCI_LATENCY); 429 ("nicstar%d: can't set PCI latency timer to %d.\n",
449 error = 7; 430 i, NS_PCI_LATENCY);
450 ns_init_card_error(card, error); 431 error = 7;
451 return error; 432 ns_init_card_error(card, error);
452 } 433 return error;
453 } 434 }
435 }
454#endif /* NS_PCI_LATENCY */ 436#endif /* NS_PCI_LATENCY */
455 437
456 /* Clear timer overflow */ 438 /* Clear timer overflow */
457 data = readl(card->membase + STAT); 439 data = readl(card->membase + STAT);
458 if (data & NS_STAT_TMROF) 440 if (data & NS_STAT_TMROF)
459 writel(NS_STAT_TMROF, card->membase + STAT); 441 writel(NS_STAT_TMROF, card->membase + STAT);
460 442
461 /* Software reset */ 443 /* Software reset */
462 writel(NS_CFG_SWRST, card->membase + CFG); 444 writel(NS_CFG_SWRST, card->membase + CFG);
463 NS_DELAY; 445 NS_DELAY;
464 writel(0x00000000, card->membase + CFG); 446 writel(0x00000000, card->membase + CFG);
465 447
466 /* PHY reset */ 448 /* PHY reset */
467 writel(0x00000008, card->membase + GP); 449 writel(0x00000008, card->membase + GP);
468 NS_DELAY; 450 NS_DELAY;
469 writel(0x00000001, card->membase + GP); 451 writel(0x00000001, card->membase + GP);
470 NS_DELAY; 452 NS_DELAY;
471 while (CMD_BUSY(card)); 453 while (CMD_BUSY(card)) ;
472 writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */ 454 writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
473 NS_DELAY; 455 NS_DELAY;
474 456
475 /* Detect PHY type */ 457 /* Detect PHY type */
476 while (CMD_BUSY(card)); 458 while (CMD_BUSY(card)) ;
477 writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD); 459 writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
478 while (CMD_BUSY(card)); 460 while (CMD_BUSY(card)) ;
479 data = readl(card->membase + DR0); 461 data = readl(card->membase + DR0);
480 switch(data) { 462 switch (data) {
481 case 0x00000009: 463 case 0x00000009:
482 printk("nicstar%d: PHY seems to be 25 Mbps.\n", i); 464 printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
483 card->max_pcr = ATM_25_PCR; 465 card->max_pcr = ATM_25_PCR;
484 while(CMD_BUSY(card)); 466 while (CMD_BUSY(card)) ;
485 writel(0x00000008, card->membase + DR0); 467 writel(0x00000008, card->membase + DR0);
486 writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD); 468 writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
487 /* Clear an eventual pending interrupt */ 469 /* Clear an eventual pending interrupt */
488 writel(NS_STAT_SFBQF, card->membase + STAT); 470 writel(NS_STAT_SFBQF, card->membase + STAT);
489#ifdef PHY_LOOPBACK 471#ifdef PHY_LOOPBACK
490 while(CMD_BUSY(card)); 472 while (CMD_BUSY(card)) ;
491 writel(0x00000022, card->membase + DR0); 473 writel(0x00000022, card->membase + DR0);
492 writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD); 474 writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
493#endif /* PHY_LOOPBACK */ 475#endif /* PHY_LOOPBACK */
494 break; 476 break;
495 case 0x00000030: 477 case 0x00000030:
496 case 0x00000031: 478 case 0x00000031:
497 printk("nicstar%d: PHY seems to be 155 Mbps.\n", i); 479 printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
498 card->max_pcr = ATM_OC3_PCR; 480 card->max_pcr = ATM_OC3_PCR;
499#ifdef PHY_LOOPBACK 481#ifdef PHY_LOOPBACK
500 while(CMD_BUSY(card)); 482 while (CMD_BUSY(card)) ;
501 writel(0x00000002, card->membase + DR0); 483 writel(0x00000002, card->membase + DR0);
502 writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD); 484 writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
503#endif /* PHY_LOOPBACK */ 485#endif /* PHY_LOOPBACK */
504 break; 486 break;
505 default: 487 default:
506 printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data); 488 printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
507 error = 8; 489 error = 8;
508 ns_init_card_error(card, error); 490 ns_init_card_error(card, error);
509 return error; 491 return error;
510 } 492 }
511 writel(0x00000000, card->membase + GP); 493 writel(0x00000000, card->membase + GP);
512 494
513 /* Determine SRAM size */ 495 /* Determine SRAM size */
514 data = 0x76543210; 496 data = 0x76543210;
515 ns_write_sram(card, 0x1C003, &data, 1); 497 ns_write_sram(card, 0x1C003, &data, 1);
516 data = 0x89ABCDEF; 498 data = 0x89ABCDEF;
517 ns_write_sram(card, 0x14003, &data, 1); 499 ns_write_sram(card, 0x14003, &data, 1);
518 if (ns_read_sram(card, 0x14003) == 0x89ABCDEF && 500 if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
519 ns_read_sram(card, 0x1C003) == 0x76543210) 501 ns_read_sram(card, 0x1C003) == 0x76543210)
520 card->sram_size = 128; 502 card->sram_size = 128;
521 else 503 else
522 card->sram_size = 32; 504 card->sram_size = 32;
523 PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size); 505 PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
524 506
525 card->rct_size = NS_MAX_RCTSIZE; 507 card->rct_size = NS_MAX_RCTSIZE;
526 508
527#if (NS_MAX_RCTSIZE == 4096) 509#if (NS_MAX_RCTSIZE == 4096)
528 if (card->sram_size == 128) 510 if (card->sram_size == 128)
529 printk("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n", i); 511 printk
512 ("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n",
513 i);
530#elif (NS_MAX_RCTSIZE == 16384) 514#elif (NS_MAX_RCTSIZE == 16384)
531 if (card->sram_size == 32) 515 if (card->sram_size == 32) {
532 { 516 printk
533 printk("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n", i); 517 ("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n",
534 card->rct_size = 4096; 518 i);
535 } 519 card->rct_size = 4096;
520 }
536#else 521#else
537#error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c 522#error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
538#endif 523#endif
539 524
540 card->vpibits = NS_VPIBITS; 525 card->vpibits = NS_VPIBITS;
541 if (card->rct_size == 4096) 526 if (card->rct_size == 4096)
542 card->vcibits = 12 - NS_VPIBITS; 527 card->vcibits = 12 - NS_VPIBITS;
543 else /* card->rct_size == 16384 */ 528 else /* card->rct_size == 16384 */
544 card->vcibits = 14 - NS_VPIBITS; 529 card->vcibits = 14 - NS_VPIBITS;
545 530
546 /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */ 531 /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
547 if (mac[i] == NULL) 532 if (mac[i] == NULL)
548 nicstar_init_eprom(card->membase); 533 nicstar_init_eprom(card->membase);
549 534
550 /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */ 535 /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
551 writel(0x00000000, card->membase + VPM); 536 writel(0x00000000, card->membase + VPM);
552 537
553 /* Initialize TSQ */ 538 /* Initialize TSQ */
554 card->tsq.org = kmalloc(NS_TSQSIZE + NS_TSQ_ALIGNMENT, GFP_KERNEL); 539 card->tsq.org = pci_alloc_consistent(card->pcidev,
555 if (card->tsq.org == NULL) 540 NS_TSQSIZE + NS_TSQ_ALIGNMENT,
556 { 541 &card->tsq.dma);
557 printk("nicstar%d: can't allocate TSQ.\n", i); 542 if (card->tsq.org == NULL) {
558 error = 10; 543 printk("nicstar%d: can't allocate TSQ.\n", i);
559 ns_init_card_error(card, error); 544 error = 10;
560 return error; 545 ns_init_card_error(card, error);
561 } 546 return error;
562 card->tsq.base = (ns_tsi *) ALIGN_ADDRESS(card->tsq.org, NS_TSQ_ALIGNMENT); 547 }
563 card->tsq.next = card->tsq.base; 548 card->tsq.base = PTR_ALIGN(card->tsq.org, NS_TSQ_ALIGNMENT);
564 card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1); 549 card->tsq.next = card->tsq.base;
565 for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++) 550 card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
566 ns_tsi_init(card->tsq.base + j); 551 for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
567 writel(0x00000000, card->membase + TSQH); 552 ns_tsi_init(card->tsq.base + j);
568 writel((u32) virt_to_bus(card->tsq.base), card->membase + TSQB); 553 writel(0x00000000, card->membase + TSQH);
569 PRINTK("nicstar%d: TSQ base at 0x%x 0x%x 0x%x.\n", i, (u32) card->tsq.base, 554 writel(ALIGN(card->tsq.dma, NS_TSQ_ALIGNMENT), card->membase + TSQB);
570 (u32) virt_to_bus(card->tsq.base), readl(card->membase + TSQB)); 555 PRINTK("nicstar%d: TSQ base at 0x%p.\n", i, card->tsq.base);
571 556
572 /* Initialize RSQ */ 557 /* Initialize RSQ */
573 card->rsq.org = kmalloc(NS_RSQSIZE + NS_RSQ_ALIGNMENT, GFP_KERNEL); 558 card->rsq.org = pci_alloc_consistent(card->pcidev,
574 if (card->rsq.org == NULL) 559 NS_RSQSIZE + NS_RSQ_ALIGNMENT,
575 { 560 &card->rsq.dma);
576 printk("nicstar%d: can't allocate RSQ.\n", i); 561 if (card->rsq.org == NULL) {
577 error = 11; 562 printk("nicstar%d: can't allocate RSQ.\n", i);
578 ns_init_card_error(card, error); 563 error = 11;
579 return error; 564 ns_init_card_error(card, error);
580 } 565 return error;
581 card->rsq.base = (ns_rsqe *) ALIGN_ADDRESS(card->rsq.org, NS_RSQ_ALIGNMENT); 566 }
582 card->rsq.next = card->rsq.base; 567 card->rsq.base = PTR_ALIGN(card->rsq.org, NS_RSQ_ALIGNMENT);
583 card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1); 568 card->rsq.next = card->rsq.base;
584 for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++) 569 card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
585 ns_rsqe_init(card->rsq.base + j); 570 for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
586 writel(0x00000000, card->membase + RSQH); 571 ns_rsqe_init(card->rsq.base + j);
587 writel((u32) virt_to_bus(card->rsq.base), card->membase + RSQB); 572 writel(0x00000000, card->membase + RSQH);
588 PRINTK("nicstar%d: RSQ base at 0x%x.\n", i, (u32) card->rsq.base); 573 writel(ALIGN(card->rsq.dma, NS_RSQ_ALIGNMENT), card->membase + RSQB);
589 574 PRINTK("nicstar%d: RSQ base at 0x%p.\n", i, card->rsq.base);
590 /* Initialize SCQ0, the only VBR SCQ used */ 575
591 card->scq1 = NULL; 576 /* Initialize SCQ0, the only VBR SCQ used */
592 card->scq2 = NULL; 577 card->scq1 = NULL;
593 card->scq0 = get_scq(VBR_SCQSIZE, NS_VRSCD0); 578 card->scq2 = NULL;
594 if (card->scq0 == NULL) 579 card->scq0 = get_scq(card, VBR_SCQSIZE, NS_VRSCD0);
595 { 580 if (card->scq0 == NULL) {
596 printk("nicstar%d: can't get SCQ0.\n", i); 581 printk("nicstar%d: can't get SCQ0.\n", i);
597 error = 12; 582 error = 12;
598 ns_init_card_error(card, error); 583 ns_init_card_error(card, error);
599 return error; 584 return error;
600 } 585 }
601 u32d[0] = (u32) virt_to_bus(card->scq0->base); 586 u32d[0] = scq_virt_to_bus(card->scq0, card->scq0->base);
602 u32d[1] = (u32) 0x00000000; 587 u32d[1] = (u32) 0x00000000;
603 u32d[2] = (u32) 0xffffffff; 588 u32d[2] = (u32) 0xffffffff;
604 u32d[3] = (u32) 0x00000000; 589 u32d[3] = (u32) 0x00000000;
605 ns_write_sram(card, NS_VRSCD0, u32d, 4); 590 ns_write_sram(card, NS_VRSCD0, u32d, 4);
606 ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */ 591 ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
607 ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */ 592 ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
608 card->scq0->scd = NS_VRSCD0; 593 card->scq0->scd = NS_VRSCD0;
609 PRINTK("nicstar%d: VBR-SCQ0 base at 0x%x.\n", i, (u32) card->scq0->base); 594 PRINTK("nicstar%d: VBR-SCQ0 base at 0x%p.\n", i, card->scq0->base);
610 595
611 /* Initialize TSTs */ 596 /* Initialize TSTs */
612 card->tst_addr = NS_TST0; 597 card->tst_addr = NS_TST0;
613 card->tst_free_entries = NS_TST_NUM_ENTRIES; 598 card->tst_free_entries = NS_TST_NUM_ENTRIES;
614 data = NS_TST_OPCODE_VARIABLE; 599 data = NS_TST_OPCODE_VARIABLE;
615 for (j = 0; j < NS_TST_NUM_ENTRIES; j++) 600 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
616 ns_write_sram(card, NS_TST0 + j, &data, 1); 601 ns_write_sram(card, NS_TST0 + j, &data, 1);
617 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0); 602 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
618 ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1); 603 ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
619 for (j = 0; j < NS_TST_NUM_ENTRIES; j++) 604 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
620 ns_write_sram(card, NS_TST1 + j, &data, 1); 605 ns_write_sram(card, NS_TST1 + j, &data, 1);
621 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1); 606 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
622 ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1); 607 ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
623 for (j = 0; j < NS_TST_NUM_ENTRIES; j++) 608 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
624 card->tste2vc[j] = NULL; 609 card->tste2vc[j] = NULL;
625 writel(NS_TST0 << 2, card->membase + TSTB); 610 writel(NS_TST0 << 2, card->membase + TSTB);
626 611
627 612 /* Initialize RCT. AAL type is set on opening the VC. */
628 /* Initialize RCT. AAL type is set on opening the VC. */
629#ifdef RCQ_SUPPORT 613#ifdef RCQ_SUPPORT
630 u32d[0] = NS_RCTE_RAWCELLINTEN; 614 u32d[0] = NS_RCTE_RAWCELLINTEN;
631#else 615#else
632 u32d[0] = 0x00000000; 616 u32d[0] = 0x00000000;
633#endif /* RCQ_SUPPORT */ 617#endif /* RCQ_SUPPORT */
634 u32d[1] = 0x00000000; 618 u32d[1] = 0x00000000;
635 u32d[2] = 0x00000000; 619 u32d[2] = 0x00000000;
636 u32d[3] = 0xFFFFFFFF; 620 u32d[3] = 0xFFFFFFFF;
637 for (j = 0; j < card->rct_size; j++) 621 for (j = 0; j < card->rct_size; j++)
638 ns_write_sram(card, j * 4, u32d, 4); 622 ns_write_sram(card, j * 4, u32d, 4);
639 623
640 memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map)); 624 memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map));
641 625
642 for (j = 0; j < NS_FRSCD_NUM; j++) 626 for (j = 0; j < NS_FRSCD_NUM; j++)
643 card->scd2vc[j] = NULL; 627 card->scd2vc[j] = NULL;
644 628
645 /* Initialize buffer levels */ 629 /* Initialize buffer levels */
646 card->sbnr.min = MIN_SB; 630 card->sbnr.min = MIN_SB;
647 card->sbnr.init = NUM_SB; 631 card->sbnr.init = NUM_SB;
648 card->sbnr.max = MAX_SB; 632 card->sbnr.max = MAX_SB;
649 card->lbnr.min = MIN_LB; 633 card->lbnr.min = MIN_LB;
650 card->lbnr.init = NUM_LB; 634 card->lbnr.init = NUM_LB;
651 card->lbnr.max = MAX_LB; 635 card->lbnr.max = MAX_LB;
652 card->iovnr.min = MIN_IOVB; 636 card->iovnr.min = MIN_IOVB;
653 card->iovnr.init = NUM_IOVB; 637 card->iovnr.init = NUM_IOVB;
654 card->iovnr.max = MAX_IOVB; 638 card->iovnr.max = MAX_IOVB;
655 card->hbnr.min = MIN_HB; 639 card->hbnr.min = MIN_HB;
656 card->hbnr.init = NUM_HB; 640 card->hbnr.init = NUM_HB;
657 card->hbnr.max = MAX_HB; 641 card->hbnr.max = MAX_HB;
658 642
659 card->sm_handle = 0x00000000; 643 card->sm_handle = 0x00000000;
660 card->sm_addr = 0x00000000; 644 card->sm_addr = 0x00000000;
661 card->lg_handle = 0x00000000; 645 card->lg_handle = 0x00000000;
662 card->lg_addr = 0x00000000; 646 card->lg_addr = 0x00000000;
663 647
664 card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */ 648 card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
665 649
666 /* Pre-allocate some huge buffers */ 650 idr_init(&card->idr);
667 skb_queue_head_init(&card->hbpool.queue); 651
668 card->hbpool.count = 0; 652 /* Pre-allocate some huge buffers */
669 for (j = 0; j < NUM_HB; j++) 653 skb_queue_head_init(&card->hbpool.queue);
670 { 654 card->hbpool.count = 0;
671 struct sk_buff *hb; 655 for (j = 0; j < NUM_HB; j++) {
672 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL); 656 struct sk_buff *hb;
673 if (hb == NULL) 657 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
674 { 658 if (hb == NULL) {
675 printk("nicstar%d: can't allocate %dth of %d huge buffers.\n", 659 printk
676 i, j, NUM_HB); 660 ("nicstar%d: can't allocate %dth of %d huge buffers.\n",
677 error = 13; 661 i, j, NUM_HB);
678 ns_init_card_error(card, error); 662 error = 13;
679 return error; 663 ns_init_card_error(card, error);
680 } 664 return error;
681 NS_SKB_CB(hb)->buf_type = BUF_NONE; 665 }
682 skb_queue_tail(&card->hbpool.queue, hb); 666 NS_PRV_BUFTYPE(hb) = BUF_NONE;
683 card->hbpool.count++; 667 skb_queue_tail(&card->hbpool.queue, hb);
684 } 668 card->hbpool.count++;
685 669 }
686 670
687 /* Allocate large buffers */ 671 /* Allocate large buffers */
688 skb_queue_head_init(&card->lbpool.queue); 672 skb_queue_head_init(&card->lbpool.queue);
689 card->lbpool.count = 0; /* Not used */ 673 card->lbpool.count = 0; /* Not used */
690 for (j = 0; j < NUM_LB; j++) 674 for (j = 0; j < NUM_LB; j++) {
691 { 675 struct sk_buff *lb;
692 struct sk_buff *lb; 676 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
693 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL); 677 if (lb == NULL) {
694 if (lb == NULL) 678 printk
695 { 679 ("nicstar%d: can't allocate %dth of %d large buffers.\n",
696 printk("nicstar%d: can't allocate %dth of %d large buffers.\n", 680 i, j, NUM_LB);
697 i, j, NUM_LB); 681 error = 14;
698 error = 14; 682 ns_init_card_error(card, error);
699 ns_init_card_error(card, error); 683 return error;
700 return error; 684 }
701 } 685 NS_PRV_BUFTYPE(lb) = BUF_LG;
702 NS_SKB_CB(lb)->buf_type = BUF_LG; 686 skb_queue_tail(&card->lbpool.queue, lb);
703 skb_queue_tail(&card->lbpool.queue, lb); 687 skb_reserve(lb, NS_SMBUFSIZE);
704 skb_reserve(lb, NS_SMBUFSIZE); 688 push_rxbufs(card, lb);
705 push_rxbufs(card, lb); 689 /* Due to the implementation of push_rxbufs() this is 1, not 0 */
706 /* Due to the implementation of push_rxbufs() this is 1, not 0 */ 690 if (j == 1) {
707 if (j == 1) 691 card->rcbuf = lb;
708 { 692 card->rawcell = (struct ns_rcqe *) lb->data;
709 card->rcbuf = lb; 693 card->rawch = NS_PRV_DMA(lb);
710 card->rawch = (u32) virt_to_bus(lb->data); 694 }
711 } 695 }
712 } 696 /* Test for strange behaviour which leads to crashes */
713 /* Test for strange behaviour which leads to crashes */ 697 if ((bcount =
714 if ((bcount = ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min) 698 ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min) {
715 { 699 printk
716 printk("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n", 700 ("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
717 i, j, bcount); 701 i, j, bcount);
718 error = 14; 702 error = 14;
719 ns_init_card_error(card, error); 703 ns_init_card_error(card, error);
720 return error; 704 return error;
721 } 705 }
722 706
723 707 /* Allocate small buffers */
724 /* Allocate small buffers */ 708 skb_queue_head_init(&card->sbpool.queue);
725 skb_queue_head_init(&card->sbpool.queue); 709 card->sbpool.count = 0; /* Not used */
726 card->sbpool.count = 0; /* Not used */ 710 for (j = 0; j < NUM_SB; j++) {
727 for (j = 0; j < NUM_SB; j++) 711 struct sk_buff *sb;
728 { 712 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
729 struct sk_buff *sb; 713 if (sb == NULL) {
730 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL); 714 printk
731 if (sb == NULL) 715 ("nicstar%d: can't allocate %dth of %d small buffers.\n",
732 { 716 i, j, NUM_SB);
733 printk("nicstar%d: can't allocate %dth of %d small buffers.\n", 717 error = 15;
734 i, j, NUM_SB); 718 ns_init_card_error(card, error);
735 error = 15; 719 return error;
736 ns_init_card_error(card, error); 720 }
737 return error; 721 NS_PRV_BUFTYPE(sb) = BUF_SM;
738 } 722 skb_queue_tail(&card->sbpool.queue, sb);
739 NS_SKB_CB(sb)->buf_type = BUF_SM; 723 skb_reserve(sb, NS_AAL0_HEADER);
740 skb_queue_tail(&card->sbpool.queue, sb); 724 push_rxbufs(card, sb);
741 skb_reserve(sb, NS_AAL0_HEADER); 725 }
742 push_rxbufs(card, sb); 726 /* Test for strange behaviour which leads to crashes */
743 } 727 if ((bcount =
744 /* Test for strange behaviour which leads to crashes */ 728 ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min) {
745 if ((bcount = ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min) 729 printk
746 { 730 ("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
747 printk("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n", 731 i, j, bcount);
748 i, j, bcount); 732 error = 15;
749 error = 15; 733 ns_init_card_error(card, error);
750 ns_init_card_error(card, error); 734 return error;
751 return error; 735 }
752 } 736
753 737 /* Allocate iovec buffers */
754 738 skb_queue_head_init(&card->iovpool.queue);
755 /* Allocate iovec buffers */ 739 card->iovpool.count = 0;
756 skb_queue_head_init(&card->iovpool.queue); 740 for (j = 0; j < NUM_IOVB; j++) {
757 card->iovpool.count = 0; 741 struct sk_buff *iovb;
758 for (j = 0; j < NUM_IOVB; j++) 742 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
759 { 743 if (iovb == NULL) {
760 struct sk_buff *iovb; 744 printk
761 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL); 745 ("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
762 if (iovb == NULL) 746 i, j, NUM_IOVB);
763 { 747 error = 16;
764 printk("nicstar%d: can't allocate %dth of %d iovec buffers.\n", 748 ns_init_card_error(card, error);
765 i, j, NUM_IOVB); 749 return error;
766 error = 16; 750 }
767 ns_init_card_error(card, error); 751 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
768 return error; 752 skb_queue_tail(&card->iovpool.queue, iovb);
769 } 753 card->iovpool.count++;
770 NS_SKB_CB(iovb)->buf_type = BUF_NONE; 754 }
771 skb_queue_tail(&card->iovpool.queue, iovb); 755
772 card->iovpool.count++; 756 /* Configure NICStAR */
773 } 757 if (card->rct_size == 4096)
774 758 ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
775 /* Configure NICStAR */ 759 else /* (card->rct_size == 16384) */
776 if (card->rct_size == 4096) 760 ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
777 ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES; 761
778 else /* (card->rct_size == 16384) */ 762 card->efbie = 1;
779 ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES; 763
780 764 card->intcnt = 0;
781 card->efbie = 1; 765 if (request_irq
782 766 (pcidev->irq, &ns_irq_handler, IRQF_SHARED, "nicstar", card) != 0) {
783 card->intcnt = 0; 767 printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
784 if (request_irq(pcidev->irq, &ns_irq_handler, IRQF_DISABLED | IRQF_SHARED, "nicstar", card) != 0) 768 error = 9;
785 { 769 ns_init_card_error(card, error);
786 printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq); 770 return error;
787 error = 9; 771 }
788 ns_init_card_error(card, error); 772
789 return error; 773 /* Register device */
790 } 774 card->atmdev = atm_dev_register("nicstar", &atm_ops, -1, NULL);
791 775 if (card->atmdev == NULL) {
792 /* Register device */ 776 printk("nicstar%d: can't register device.\n", i);
793 card->atmdev = atm_dev_register("nicstar", &atm_ops, -1, NULL); 777 error = 17;
794 if (card->atmdev == NULL) 778 ns_init_card_error(card, error);
795 { 779 return error;
796 printk("nicstar%d: can't register device.\n", i); 780 }
797 error = 17; 781
798 ns_init_card_error(card, error); 782 if (ns_parse_mac(mac[i], card->atmdev->esi)) {
799 return error; 783 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
800 } 784 card->atmdev->esi, 6);
801 785 if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) ==
802 if (ns_parse_mac(mac[i], card->atmdev->esi)) { 786 0) {
803 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET, 787 nicstar_read_eprom(card->membase,
804 card->atmdev->esi, 6); 788 NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
805 if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) == 0) { 789 card->atmdev->esi, 6);
806 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT, 790 }
807 card->atmdev->esi, 6); 791 }
808 } 792
809 } 793 printk("nicstar%d: MAC address %pM\n", i, card->atmdev->esi);
810 794
811 printk("nicstar%d: MAC address %pM\n", i, card->atmdev->esi); 795 card->atmdev->dev_data = card;
812 796 card->atmdev->ci_range.vpi_bits = card->vpibits;
813 card->atmdev->dev_data = card; 797 card->atmdev->ci_range.vci_bits = card->vcibits;
814 card->atmdev->ci_range.vpi_bits = card->vpibits; 798 card->atmdev->link_rate = card->max_pcr;
815 card->atmdev->ci_range.vci_bits = card->vcibits; 799 card->atmdev->phy = NULL;
816 card->atmdev->link_rate = card->max_pcr;
817 card->atmdev->phy = NULL;
818 800
819#ifdef CONFIG_ATM_NICSTAR_USE_SUNI 801#ifdef CONFIG_ATM_NICSTAR_USE_SUNI
820 if (card->max_pcr == ATM_OC3_PCR) 802 if (card->max_pcr == ATM_OC3_PCR)
821 suni_init(card->atmdev); 803 suni_init(card->atmdev);
822#endif /* CONFIG_ATM_NICSTAR_USE_SUNI */ 804#endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
823 805
824#ifdef CONFIG_ATM_NICSTAR_USE_IDT77105 806#ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
825 if (card->max_pcr == ATM_25_PCR) 807 if (card->max_pcr == ATM_25_PCR)
826 idt77105_init(card->atmdev); 808 idt77105_init(card->atmdev);
827#endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */ 809#endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
828 810
829 if (card->atmdev->phy && card->atmdev->phy->start) 811 if (card->atmdev->phy && card->atmdev->phy->start)
830 card->atmdev->phy->start(card->atmdev); 812 card->atmdev->phy->start(card->atmdev);
831
832 writel(NS_CFG_RXPATH |
833 NS_CFG_SMBUFSIZE |
834 NS_CFG_LGBUFSIZE |
835 NS_CFG_EFBIE |
836 NS_CFG_RSQSIZE |
837 NS_CFG_VPIBITS |
838 ns_cfg_rctsize |
839 NS_CFG_RXINT_NODELAY |
840 NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
841 NS_CFG_RSQAFIE |
842 NS_CFG_TXEN |
843 NS_CFG_TXIE |
844 NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
845 NS_CFG_PHYIE,
846 card->membase + CFG);
847
848 num_cards++;
849
850 return error;
851}
852 813
814 writel(NS_CFG_RXPATH | NS_CFG_SMBUFSIZE | NS_CFG_LGBUFSIZE | NS_CFG_EFBIE | NS_CFG_RSQSIZE | NS_CFG_VPIBITS | ns_cfg_rctsize | NS_CFG_RXINT_NODELAY | NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
815 NS_CFG_RSQAFIE | NS_CFG_TXEN | NS_CFG_TXIE | NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
816 NS_CFG_PHYIE, card->membase + CFG);
853 817
818 num_cards++;
854 819
855static void __devinit ns_init_card_error(ns_dev *card, int error) 820 return error;
856{
857 if (error >= 17)
858 {
859 writel(0x00000000, card->membase + CFG);
860 }
861 if (error >= 16)
862 {
863 struct sk_buff *iovb;
864 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
865 dev_kfree_skb_any(iovb);
866 }
867 if (error >= 15)
868 {
869 struct sk_buff *sb;
870 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
871 dev_kfree_skb_any(sb);
872 free_scq(card->scq0, NULL);
873 }
874 if (error >= 14)
875 {
876 struct sk_buff *lb;
877 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
878 dev_kfree_skb_any(lb);
879 }
880 if (error >= 13)
881 {
882 struct sk_buff *hb;
883 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
884 dev_kfree_skb_any(hb);
885 }
886 if (error >= 12)
887 {
888 kfree(card->rsq.org);
889 }
890 if (error >= 11)
891 {
892 kfree(card->tsq.org);
893 }
894 if (error >= 10)
895 {
896 free_irq(card->pcidev->irq, card);
897 }
898 if (error >= 4)
899 {
900 iounmap(card->membase);
901 }
902 if (error >= 3)
903 {
904 pci_disable_device(card->pcidev);
905 kfree(card);
906 }
907} 821}
908 822
909 823static void __devinit ns_init_card_error(ns_dev * card, int error)
910
911static scq_info *get_scq(int size, u32 scd)
912{ 824{
913 scq_info *scq; 825 if (error >= 17) {
914 int i; 826 writel(0x00000000, card->membase + CFG);
915 827 }
916 if (size != VBR_SCQSIZE && size != CBR_SCQSIZE) 828 if (error >= 16) {
917 return NULL; 829 struct sk_buff *iovb;
918 830 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
919 scq = kmalloc(sizeof(scq_info), GFP_KERNEL); 831 dev_kfree_skb_any(iovb);
920 if (scq == NULL) 832 }
921 return NULL; 833 if (error >= 15) {
922 scq->org = kmalloc(2 * size, GFP_KERNEL); 834 struct sk_buff *sb;
923 if (scq->org == NULL) 835 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
924 { 836 dev_kfree_skb_any(sb);
925 kfree(scq); 837 free_scq(card, card->scq0, NULL);
926 return NULL; 838 }
927 } 839 if (error >= 14) {
928 scq->skb = kmalloc(sizeof(struct sk_buff *) * 840 struct sk_buff *lb;
929 (size / NS_SCQE_SIZE), GFP_KERNEL); 841 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
930 if (scq->skb == NULL) 842 dev_kfree_skb_any(lb);
931 { 843 }
932 kfree(scq->org); 844 if (error >= 13) {
933 kfree(scq); 845 struct sk_buff *hb;
934 return NULL; 846 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
935 } 847 dev_kfree_skb_any(hb);
936 scq->num_entries = size / NS_SCQE_SIZE; 848 }
937 scq->base = (ns_scqe *) ALIGN_ADDRESS(scq->org, size); 849 if (error >= 12) {
938 scq->next = scq->base; 850 kfree(card->rsq.org);
939 scq->last = scq->base + (scq->num_entries - 1); 851 }
940 scq->tail = scq->last; 852 if (error >= 11) {
941 scq->scd = scd; 853 kfree(card->tsq.org);
942 scq->num_entries = size / NS_SCQE_SIZE; 854 }
943 scq->tbd_count = 0; 855 if (error >= 10) {
944 init_waitqueue_head(&scq->scqfull_waitq); 856 free_irq(card->pcidev->irq, card);
945 scq->full = 0; 857 }
946 spin_lock_init(&scq->lock); 858 if (error >= 4) {
947 859 iounmap(card->membase);
948 for (i = 0; i < scq->num_entries; i++) 860 }
949 scq->skb[i] = NULL; 861 if (error >= 3) {
950 862 pci_disable_device(card->pcidev);
951 return scq; 863 kfree(card);
864 }
952} 865}
953 866
954 867static scq_info *get_scq(ns_dev *card, int size, u32 scd)
868{
869 scq_info *scq;
870 int i;
871
872 if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
873 return NULL;
874
875 scq = kmalloc(sizeof(scq_info), GFP_KERNEL);
876 if (!scq)
877 return NULL;
878 scq->org = pci_alloc_consistent(card->pcidev, 2 * size, &scq->dma);
879 if (!scq->org) {
880 kfree(scq);
881 return NULL;
882 }
883 scq->skb = kmalloc(sizeof(struct sk_buff *) *
884 (size / NS_SCQE_SIZE), GFP_KERNEL);
885 if (!scq->skb) {
886 kfree(scq->org);
887 kfree(scq);
888 return NULL;
889 }
890 scq->num_entries = size / NS_SCQE_SIZE;
891 scq->base = PTR_ALIGN(scq->org, size);
892 scq->next = scq->base;
893 scq->last = scq->base + (scq->num_entries - 1);
894 scq->tail = scq->last;
895 scq->scd = scd;
896 scq->num_entries = size / NS_SCQE_SIZE;
897 scq->tbd_count = 0;
898 init_waitqueue_head(&scq->scqfull_waitq);
899 scq->full = 0;
900 spin_lock_init(&scq->lock);
901
902 for (i = 0; i < scq->num_entries; i++)
903 scq->skb[i] = NULL;
904
905 return scq;
906}
955 907
956/* For variable rate SCQ vcc must be NULL */ 908/* For variable rate SCQ vcc must be NULL */
957static void free_scq(scq_info *scq, struct atm_vcc *vcc) 909static void free_scq(ns_dev *card, scq_info *scq, struct atm_vcc *vcc)
958{ 910{
959 int i; 911 int i;
960 912
961 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES) 913 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
962 for (i = 0; i < scq->num_entries; i++) 914 for (i = 0; i < scq->num_entries; i++) {
963 { 915 if (scq->skb[i] != NULL) {
964 if (scq->skb[i] != NULL) 916 vcc = ATM_SKB(scq->skb[i])->vcc;
965 { 917 if (vcc->pop != NULL)
966 vcc = ATM_SKB(scq->skb[i])->vcc; 918 vcc->pop(vcc, scq->skb[i]);
967 if (vcc->pop != NULL) 919 else
968 vcc->pop(vcc, scq->skb[i]); 920 dev_kfree_skb_any(scq->skb[i]);
969 else 921 }
970 dev_kfree_skb_any(scq->skb[i]); 922 } else { /* vcc must be != NULL */
971 } 923
972 } 924 if (vcc == NULL) {
973 else /* vcc must be != NULL */ 925 printk
974 { 926 ("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
975 if (vcc == NULL) 927 for (i = 0; i < scq->num_entries; i++)
976 { 928 dev_kfree_skb_any(scq->skb[i]);
977 printk("nicstar: free_scq() called with vcc == NULL for fixed rate scq."); 929 } else
978 for (i = 0; i < scq->num_entries; i++) 930 for (i = 0; i < scq->num_entries; i++) {
979 dev_kfree_skb_any(scq->skb[i]); 931 if (scq->skb[i] != NULL) {
980 } 932 if (vcc->pop != NULL)
981 else 933 vcc->pop(vcc, scq->skb[i]);
982 for (i = 0; i < scq->num_entries; i++) 934 else
983 { 935 dev_kfree_skb_any(scq->skb[i]);
984 if (scq->skb[i] != NULL) 936 }
985 { 937 }
986 if (vcc->pop != NULL) 938 }
987 vcc->pop(vcc, scq->skb[i]); 939 kfree(scq->skb);
988 else 940 pci_free_consistent(card->pcidev,
989 dev_kfree_skb_any(scq->skb[i]); 941 2 * (scq->num_entries == VBR_SCQ_NUM_ENTRIES ?
990 } 942 VBR_SCQSIZE : CBR_SCQSIZE),
991 } 943 scq->org, scq->dma);
992 } 944 kfree(scq);
993 kfree(scq->skb);
994 kfree(scq->org);
995 kfree(scq);
996} 945}
997 946
998
999
1000/* The handles passed must be pointers to the sk_buff containing the small 947/* The handles passed must be pointers to the sk_buff containing the small
1001 or large buffer(s) cast to u32. */ 948 or large buffer(s) cast to u32. */
1002static void push_rxbufs(ns_dev *card, struct sk_buff *skb) 949static void push_rxbufs(ns_dev * card, struct sk_buff *skb)
1003{ 950{
1004 struct ns_skb_cb *cb = NS_SKB_CB(skb); 951 struct sk_buff *handle1, *handle2;
1005 u32 handle1, addr1; 952 u32 id1 = 0, id2 = 0;
1006 u32 handle2, addr2; 953 u32 addr1, addr2;
1007 u32 stat; 954 u32 stat;
1008 unsigned long flags; 955 unsigned long flags;
1009 956 int err;
1010 /* *BARF* */ 957
1011 handle2 = addr2 = 0; 958 /* *BARF* */
1012 handle1 = (u32)skb; 959 handle2 = NULL;
1013 addr1 = (u32)virt_to_bus(skb->data); 960 addr2 = 0;
961 handle1 = skb;
962 addr1 = pci_map_single(card->pcidev,
963 skb->data,
964 (NS_PRV_BUFTYPE(skb) == BUF_SM
965 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
966 PCI_DMA_TODEVICE);
967 NS_PRV_DMA(skb) = addr1; /* save so we can unmap later */
1014 968
1015#ifdef GENERAL_DEBUG 969#ifdef GENERAL_DEBUG
1016 if (!addr1) 970 if (!addr1)
1017 printk("nicstar%d: push_rxbufs called with addr1 = 0.\n", card->index); 971 printk("nicstar%d: push_rxbufs called with addr1 = 0.\n",
972 card->index);
1018#endif /* GENERAL_DEBUG */ 973#endif /* GENERAL_DEBUG */
1019 974
1020 stat = readl(card->membase + STAT); 975 stat = readl(card->membase + STAT);
1021 card->sbfqc = ns_stat_sfbqc_get(stat); 976 card->sbfqc = ns_stat_sfbqc_get(stat);
1022 card->lbfqc = ns_stat_lfbqc_get(stat); 977 card->lbfqc = ns_stat_lfbqc_get(stat);
1023 if (cb->buf_type == BUF_SM) 978 if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
1024 { 979 if (!addr2) {
1025 if (!addr2) 980 if (card->sm_addr) {
1026 { 981 addr2 = card->sm_addr;
1027 if (card->sm_addr) 982 handle2 = card->sm_handle;
1028 { 983 card->sm_addr = 0x00000000;
1029 addr2 = card->sm_addr; 984 card->sm_handle = 0x00000000;
1030 handle2 = card->sm_handle; 985 } else { /* (!sm_addr) */
1031 card->sm_addr = 0x00000000; 986
1032 card->sm_handle = 0x00000000; 987 card->sm_addr = addr1;
1033 } 988 card->sm_handle = handle1;
1034 else /* (!sm_addr) */ 989 }
1035 { 990 }
1036 card->sm_addr = addr1; 991 } else { /* buf_type == BUF_LG */
1037 card->sm_handle = handle1; 992
1038 } 993 if (!addr2) {
1039 } 994 if (card->lg_addr) {
1040 } 995 addr2 = card->lg_addr;
1041 else /* buf_type == BUF_LG */ 996 handle2 = card->lg_handle;
1042 { 997 card->lg_addr = 0x00000000;
1043 if (!addr2) 998 card->lg_handle = 0x00000000;
1044 { 999 } else { /* (!lg_addr) */
1045 if (card->lg_addr) 1000
1046 { 1001 card->lg_addr = addr1;
1047 addr2 = card->lg_addr; 1002 card->lg_handle = handle1;
1048 handle2 = card->lg_handle; 1003 }
1049 card->lg_addr = 0x00000000; 1004 }
1050 card->lg_handle = 0x00000000; 1005 }
1051 } 1006
1052 else /* (!lg_addr) */ 1007 if (addr2) {
1053 { 1008 if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
1054 card->lg_addr = addr1; 1009 if (card->sbfqc >= card->sbnr.max) {
1055 card->lg_handle = handle1; 1010 skb_unlink(handle1, &card->sbpool.queue);
1056 } 1011 dev_kfree_skb_any(handle1);
1057 } 1012 skb_unlink(handle2, &card->sbpool.queue);
1058 } 1013 dev_kfree_skb_any(handle2);
1059 1014 return;
1060 if (addr2) 1015 } else
1061 { 1016 card->sbfqc += 2;
1062 if (cb->buf_type == BUF_SM) 1017 } else { /* (buf_type == BUF_LG) */
1063 { 1018
1064 if (card->sbfqc >= card->sbnr.max) 1019 if (card->lbfqc >= card->lbnr.max) {
1065 { 1020 skb_unlink(handle1, &card->lbpool.queue);
1066 skb_unlink((struct sk_buff *) handle1, &card->sbpool.queue); 1021 dev_kfree_skb_any(handle1);
1067 dev_kfree_skb_any((struct sk_buff *) handle1); 1022 skb_unlink(handle2, &card->lbpool.queue);
1068 skb_unlink((struct sk_buff *) handle2, &card->sbpool.queue); 1023 dev_kfree_skb_any(handle2);
1069 dev_kfree_skb_any((struct sk_buff *) handle2); 1024 return;
1070 return; 1025 } else
1071 } 1026 card->lbfqc += 2;
1072 else 1027 }
1073 card->sbfqc += 2; 1028
1074 } 1029 do {
1075 else /* (buf_type == BUF_LG) */ 1030 if (!idr_pre_get(&card->idr, GFP_ATOMIC)) {
1076 { 1031 printk(KERN_ERR
1077 if (card->lbfqc >= card->lbnr.max) 1032 "nicstar%d: no free memory for idr\n",
1078 { 1033 card->index);
1079 skb_unlink((struct sk_buff *) handle1, &card->lbpool.queue); 1034 goto out;
1080 dev_kfree_skb_any((struct sk_buff *) handle1); 1035 }
1081 skb_unlink((struct sk_buff *) handle2, &card->lbpool.queue); 1036
1082 dev_kfree_skb_any((struct sk_buff *) handle2); 1037 if (!id1)
1083 return; 1038 err = idr_get_new_above(&card->idr, handle1, 0, &id1);
1084 } 1039
1085 else 1040 if (!id2 && err == 0)
1086 card->lbfqc += 2; 1041 err = idr_get_new_above(&card->idr, handle2, 0, &id2);
1087 } 1042
1088 1043 } while (err == -EAGAIN);
1089 spin_lock_irqsave(&card->res_lock, flags); 1044
1090 1045 if (err)
1091 while (CMD_BUSY(card)); 1046 goto out;
1092 writel(addr2, card->membase + DR3); 1047
1093 writel(handle2, card->membase + DR2); 1048 spin_lock_irqsave(&card->res_lock, flags);
1094 writel(addr1, card->membase + DR1); 1049 while (CMD_BUSY(card)) ;
1095 writel(handle1, card->membase + DR0); 1050 writel(addr2, card->membase + DR3);
1096 writel(NS_CMD_WRITE_FREEBUFQ | cb->buf_type, card->membase + CMD); 1051 writel(id2, card->membase + DR2);
1097 1052 writel(addr1, card->membase + DR1);
1098 spin_unlock_irqrestore(&card->res_lock, flags); 1053 writel(id1, card->membase + DR0);
1099 1054 writel(NS_CMD_WRITE_FREEBUFQ | NS_PRV_BUFTYPE(skb),
1100 XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n", card->index, 1055 card->membase + CMD);
1101 (cb->buf_type == BUF_SM ? "small" : "large"), addr1, addr2); 1056 spin_unlock_irqrestore(&card->res_lock, flags);
1102 } 1057
1103 1058 XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n",
1104 if (!card->efbie && card->sbfqc >= card->sbnr.min && 1059 card->index,
1105 card->lbfqc >= card->lbnr.min) 1060 (NS_PRV_BUFTYPE(skb) == BUF_SM ? "small" : "large"),
1106 { 1061 addr1, addr2);
1107 card->efbie = 1; 1062 }
1108 writel((readl(card->membase + CFG) | NS_CFG_EFBIE), card->membase + CFG); 1063
1109 } 1064 if (!card->efbie && card->sbfqc >= card->sbnr.min &&
1110 1065 card->lbfqc >= card->lbnr.min) {
1111 return; 1066 card->efbie = 1;
1067 writel((readl(card->membase + CFG) | NS_CFG_EFBIE),
1068 card->membase + CFG);
1069 }
1070
1071out:
1072 return;
1112} 1073}
1113 1074
1114
1115
1116static irqreturn_t ns_irq_handler(int irq, void *dev_id) 1075static irqreturn_t ns_irq_handler(int irq, void *dev_id)
1117{ 1076{
1118 u32 stat_r; 1077 u32 stat_r;
1119 ns_dev *card; 1078 ns_dev *card;
1120 struct atm_dev *dev; 1079 struct atm_dev *dev;
1121 unsigned long flags; 1080 unsigned long flags;
1122 1081
1123 card = (ns_dev *) dev_id; 1082 card = (ns_dev *) dev_id;
1124 dev = card->atmdev; 1083 dev = card->atmdev;
1125 card->intcnt++; 1084 card->intcnt++;
1126 1085
1127 PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index); 1086 PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
1128 1087
1129 spin_lock_irqsave(&card->int_lock, flags); 1088 spin_lock_irqsave(&card->int_lock, flags);
1130 1089
1131 stat_r = readl(card->membase + STAT); 1090 stat_r = readl(card->membase + STAT);
1132 1091
1133 /* Transmit Status Indicator has been written to T. S. Queue */ 1092 /* Transmit Status Indicator has been written to T. S. Queue */
1134 if (stat_r & NS_STAT_TSIF) 1093 if (stat_r & NS_STAT_TSIF) {
1135 { 1094 TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
1136 TXPRINTK("nicstar%d: TSI interrupt\n", card->index); 1095 process_tsq(card);
1137 process_tsq(card); 1096 writel(NS_STAT_TSIF, card->membase + STAT);
1138 writel(NS_STAT_TSIF, card->membase + STAT); 1097 }
1139 } 1098
1140 1099 /* Incomplete CS-PDU has been transmitted */
1141 /* Incomplete CS-PDU has been transmitted */ 1100 if (stat_r & NS_STAT_TXICP) {
1142 if (stat_r & NS_STAT_TXICP) 1101 writel(NS_STAT_TXICP, card->membase + STAT);
1143 { 1102 TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
1144 writel(NS_STAT_TXICP, card->membase + STAT); 1103 card->index);
1145 TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n", 1104 }
1146 card->index); 1105
1147 } 1106 /* Transmit Status Queue 7/8 full */
1148 1107 if (stat_r & NS_STAT_TSQF) {
1149 /* Transmit Status Queue 7/8 full */ 1108 writel(NS_STAT_TSQF, card->membase + STAT);
1150 if (stat_r & NS_STAT_TSQF) 1109 PRINTK("nicstar%d: TSQ full.\n", card->index);
1151 { 1110 process_tsq(card);
1152 writel(NS_STAT_TSQF, card->membase + STAT); 1111 }
1153 PRINTK("nicstar%d: TSQ full.\n", card->index); 1112
1154 process_tsq(card); 1113 /* Timer overflow */
1155 } 1114 if (stat_r & NS_STAT_TMROF) {
1156 1115 writel(NS_STAT_TMROF, card->membase + STAT);
1157 /* Timer overflow */ 1116 PRINTK("nicstar%d: Timer overflow.\n", card->index);
1158 if (stat_r & NS_STAT_TMROF) 1117 }
1159 { 1118
1160 writel(NS_STAT_TMROF, card->membase + STAT); 1119 /* PHY device interrupt signal active */
1161 PRINTK("nicstar%d: Timer overflow.\n", card->index); 1120 if (stat_r & NS_STAT_PHYI) {
1162 } 1121 writel(NS_STAT_PHYI, card->membase + STAT);
1163 1122 PRINTK("nicstar%d: PHY interrupt.\n", card->index);
1164 /* PHY device interrupt signal active */ 1123 if (dev->phy && dev->phy->interrupt) {
1165 if (stat_r & NS_STAT_PHYI) 1124 dev->phy->interrupt(dev);
1166 { 1125 }
1167 writel(NS_STAT_PHYI, card->membase + STAT); 1126 }
1168 PRINTK("nicstar%d: PHY interrupt.\n", card->index); 1127
1169 if (dev->phy && dev->phy->interrupt) { 1128 /* Small Buffer Queue is full */
1170 dev->phy->interrupt(dev); 1129 if (stat_r & NS_STAT_SFBQF) {
1171 } 1130 writel(NS_STAT_SFBQF, card->membase + STAT);
1172 } 1131 printk("nicstar%d: Small free buffer queue is full.\n",
1173 1132 card->index);
1174 /* Small Buffer Queue is full */ 1133 }
1175 if (stat_r & NS_STAT_SFBQF) 1134
1176 { 1135 /* Large Buffer Queue is full */
1177 writel(NS_STAT_SFBQF, card->membase + STAT); 1136 if (stat_r & NS_STAT_LFBQF) {
1178 printk("nicstar%d: Small free buffer queue is full.\n", card->index); 1137 writel(NS_STAT_LFBQF, card->membase + STAT);
1179 } 1138 printk("nicstar%d: Large free buffer queue is full.\n",
1180 1139 card->index);
1181 /* Large Buffer Queue is full */ 1140 }
1182 if (stat_r & NS_STAT_LFBQF) 1141
1183 { 1142 /* Receive Status Queue is full */
1184 writel(NS_STAT_LFBQF, card->membase + STAT); 1143 if (stat_r & NS_STAT_RSQF) {
1185 printk("nicstar%d: Large free buffer queue is full.\n", card->index); 1144 writel(NS_STAT_RSQF, card->membase + STAT);
1186 } 1145 printk("nicstar%d: RSQ full.\n", card->index);
1187 1146 process_rsq(card);
1188 /* Receive Status Queue is full */ 1147 }
1189 if (stat_r & NS_STAT_RSQF) 1148
1190 { 1149 /* Complete CS-PDU received */
1191 writel(NS_STAT_RSQF, card->membase + STAT); 1150 if (stat_r & NS_STAT_EOPDU) {
1192 printk("nicstar%d: RSQ full.\n", card->index); 1151 RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
1193 process_rsq(card); 1152 process_rsq(card);
1194 } 1153 writel(NS_STAT_EOPDU, card->membase + STAT);
1195 1154 }
1196 /* Complete CS-PDU received */ 1155
1197 if (stat_r & NS_STAT_EOPDU) 1156 /* Raw cell received */
1198 { 1157 if (stat_r & NS_STAT_RAWCF) {
1199 RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index); 1158 writel(NS_STAT_RAWCF, card->membase + STAT);
1200 process_rsq(card);
1201 writel(NS_STAT_EOPDU, card->membase + STAT);
1202 }
1203
1204 /* Raw cell received */
1205 if (stat_r & NS_STAT_RAWCF)
1206 {
1207 writel(NS_STAT_RAWCF, card->membase + STAT);
1208#ifndef RCQ_SUPPORT 1159#ifndef RCQ_SUPPORT
1209 printk("nicstar%d: Raw cell received and no support yet...\n", 1160 printk("nicstar%d: Raw cell received and no support yet...\n",
1210 card->index); 1161 card->index);
1211#endif /* RCQ_SUPPORT */ 1162#endif /* RCQ_SUPPORT */
1212 /* NOTE: the following procedure may keep a raw cell pending until the 1163 /* NOTE: the following procedure may keep a raw cell pending until the
1213 next interrupt. As this preliminary support is only meant to 1164 next interrupt. As this preliminary support is only meant to
1214 avoid buffer leakage, this is not an issue. */ 1165 avoid buffer leakage, this is not an issue. */
1215 while (readl(card->membase + RAWCT) != card->rawch) 1166 while (readl(card->membase + RAWCT) != card->rawch) {
1216 { 1167
1217 ns_rcqe *rawcell; 1168 if (ns_rcqe_islast(card->rawcell)) {
1218 1169 struct sk_buff *oldbuf;
1219 rawcell = (ns_rcqe *) bus_to_virt(card->rawch); 1170
1220 if (ns_rcqe_islast(rawcell)) 1171 oldbuf = card->rcbuf;
1221 { 1172 card->rcbuf = idr_find(&card->idr,
1222 struct sk_buff *oldbuf; 1173 ns_rcqe_nextbufhandle(card->rawcell));
1223 1174 card->rawch = NS_PRV_DMA(card->rcbuf);
1224 oldbuf = card->rcbuf; 1175 card->rawcell = (struct ns_rcqe *)
1225 card->rcbuf = (struct sk_buff *) ns_rcqe_nextbufhandle(rawcell); 1176 card->rcbuf->data;
1226 card->rawch = (u32) virt_to_bus(card->rcbuf->data); 1177 recycle_rx_buf(card, oldbuf);
1227 recycle_rx_buf(card, oldbuf); 1178 } else {
1228 } 1179 card->rawch += NS_RCQE_SIZE;
1229 else 1180 card->rawcell++;
1230 card->rawch += NS_RCQE_SIZE; 1181 }
1231 } 1182 }
1232 } 1183 }
1233 1184
1234 /* Small buffer queue is empty */ 1185 /* Small buffer queue is empty */
1235 if (stat_r & NS_STAT_SFBQE) 1186 if (stat_r & NS_STAT_SFBQE) {
1236 { 1187 int i;
1237 int i; 1188 struct sk_buff *sb;
1238 struct sk_buff *sb; 1189
1239 1190 writel(NS_STAT_SFBQE, card->membase + STAT);
1240 writel(NS_STAT_SFBQE, card->membase + STAT); 1191 printk("nicstar%d: Small free buffer queue empty.\n",
1241 printk("nicstar%d: Small free buffer queue empty.\n", 1192 card->index);
1242 card->index); 1193 for (i = 0; i < card->sbnr.min; i++) {
1243 for (i = 0; i < card->sbnr.min; i++) 1194 sb = dev_alloc_skb(NS_SMSKBSIZE);
1244 { 1195 if (sb == NULL) {
1245 sb = dev_alloc_skb(NS_SMSKBSIZE); 1196 writel(readl(card->membase + CFG) &
1246 if (sb == NULL) 1197 ~NS_CFG_EFBIE, card->membase + CFG);
1247 { 1198 card->efbie = 0;
1248 writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG); 1199 break;
1249 card->efbie = 0; 1200 }
1250 break; 1201 NS_PRV_BUFTYPE(sb) = BUF_SM;
1251 } 1202 skb_queue_tail(&card->sbpool.queue, sb);
1252 NS_SKB_CB(sb)->buf_type = BUF_SM; 1203 skb_reserve(sb, NS_AAL0_HEADER);
1253 skb_queue_tail(&card->sbpool.queue, sb); 1204 push_rxbufs(card, sb);
1254 skb_reserve(sb, NS_AAL0_HEADER); 1205 }
1255 push_rxbufs(card, sb); 1206 card->sbfqc = i;
1256 } 1207 process_rsq(card);
1257 card->sbfqc = i; 1208 }
1258 process_rsq(card); 1209
1259 } 1210 /* Large buffer queue empty */
1260 1211 if (stat_r & NS_STAT_LFBQE) {
1261 /* Large buffer queue empty */ 1212 int i;
1262 if (stat_r & NS_STAT_LFBQE) 1213 struct sk_buff *lb;
1263 { 1214
1264 int i; 1215 writel(NS_STAT_LFBQE, card->membase + STAT);
1265 struct sk_buff *lb; 1216 printk("nicstar%d: Large free buffer queue empty.\n",
1266 1217 card->index);
1267 writel(NS_STAT_LFBQE, card->membase + STAT); 1218 for (i = 0; i < card->lbnr.min; i++) {
1268 printk("nicstar%d: Large free buffer queue empty.\n", 1219 lb = dev_alloc_skb(NS_LGSKBSIZE);
1269 card->index); 1220 if (lb == NULL) {
1270 for (i = 0; i < card->lbnr.min; i++) 1221 writel(readl(card->membase + CFG) &
1271 { 1222 ~NS_CFG_EFBIE, card->membase + CFG);
1272 lb = dev_alloc_skb(NS_LGSKBSIZE); 1223 card->efbie = 0;
1273 if (lb == NULL) 1224 break;
1274 { 1225 }
1275 writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG); 1226 NS_PRV_BUFTYPE(lb) = BUF_LG;
1276 card->efbie = 0; 1227 skb_queue_tail(&card->lbpool.queue, lb);
1277 break; 1228 skb_reserve(lb, NS_SMBUFSIZE);
1278 } 1229 push_rxbufs(card, lb);
1279 NS_SKB_CB(lb)->buf_type = BUF_LG; 1230 }
1280 skb_queue_tail(&card->lbpool.queue, lb); 1231 card->lbfqc = i;
1281 skb_reserve(lb, NS_SMBUFSIZE); 1232 process_rsq(card);
1282 push_rxbufs(card, lb); 1233 }
1283 } 1234
1284 card->lbfqc = i; 1235 /* Receive Status Queue is 7/8 full */
1285 process_rsq(card); 1236 if (stat_r & NS_STAT_RSQAF) {
1286 } 1237 writel(NS_STAT_RSQAF, card->membase + STAT);
1287 1238 RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
1288 /* Receive Status Queue is 7/8 full */ 1239 process_rsq(card);
1289 if (stat_r & NS_STAT_RSQAF) 1240 }
1290 { 1241
1291 writel(NS_STAT_RSQAF, card->membase + STAT); 1242 spin_unlock_irqrestore(&card->int_lock, flags);
1292 RXPRINTK("nicstar%d: RSQ almost full.\n", card->index); 1243 PRINTK("nicstar%d: end of interrupt service\n", card->index);
1293 process_rsq(card); 1244 return IRQ_HANDLED;
1294 }
1295
1296 spin_unlock_irqrestore(&card->int_lock, flags);
1297 PRINTK("nicstar%d: end of interrupt service\n", card->index);
1298 return IRQ_HANDLED;
1299} 1245}
1300 1246
1301
1302
1303static int ns_open(struct atm_vcc *vcc) 1247static int ns_open(struct atm_vcc *vcc)
1304{ 1248{
1305 ns_dev *card; 1249 ns_dev *card;
1306 vc_map *vc; 1250 vc_map *vc;
1307 unsigned long tmpl, modl; 1251 unsigned long tmpl, modl;
1308 int tcr, tcra; /* target cell rate, and absolute value */ 1252 int tcr, tcra; /* target cell rate, and absolute value */
1309 int n = 0; /* Number of entries in the TST. Initialized to remove 1253 int n = 0; /* Number of entries in the TST. Initialized to remove
1310 the compiler warning. */ 1254 the compiler warning. */
1311 u32 u32d[4]; 1255 u32 u32d[4];
1312 int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler 1256 int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
1313 warning. How I wish compilers were clever enough to 1257 warning. How I wish compilers were clever enough to
1314 tell which variables can truly be used 1258 tell which variables can truly be used
1315 uninitialized... */ 1259 uninitialized... */
1316 int inuse; /* tx or rx vc already in use by another vcc */ 1260 int inuse; /* tx or rx vc already in use by another vcc */
1317 short vpi = vcc->vpi; 1261 short vpi = vcc->vpi;
1318 int vci = vcc->vci; 1262 int vci = vcc->vci;
1319 1263
1320 card = (ns_dev *) vcc->dev->dev_data; 1264 card = (ns_dev *) vcc->dev->dev_data;
1321 PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int) vpi, vci); 1265 PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int)vpi,
1322 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) 1266 vci);
1323 { 1267 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1324 PRINTK("nicstar%d: unsupported AAL.\n", card->index); 1268 PRINTK("nicstar%d: unsupported AAL.\n", card->index);
1325 return -EINVAL; 1269 return -EINVAL;
1326 } 1270 }
1327 1271
1328 vc = &(card->vcmap[vpi << card->vcibits | vci]); 1272 vc = &(card->vcmap[vpi << card->vcibits | vci]);
1329 vcc->dev_data = vc; 1273 vcc->dev_data = vc;
1330 1274
1331 inuse = 0; 1275 inuse = 0;
1332 if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx) 1276 if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
1333 inuse = 1; 1277 inuse = 1;
1334 if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx) 1278 if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
1335 inuse += 2; 1279 inuse += 2;
1336 if (inuse) 1280 if (inuse) {
1337 { 1281 printk("nicstar%d: %s vci already in use.\n", card->index,
1338 printk("nicstar%d: %s vci already in use.\n", card->index, 1282 inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
1339 inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx"); 1283 return -EINVAL;
1340 return -EINVAL; 1284 }
1341 } 1285
1342 1286 set_bit(ATM_VF_ADDR, &vcc->flags);
1343 set_bit(ATM_VF_ADDR,&vcc->flags); 1287
1344 1288 /* NOTE: You are not allowed to modify an open connection's QOS. To change
1345 /* NOTE: You are not allowed to modify an open connection's QOS. To change 1289 that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
1346 that, remove the ATM_VF_PARTIAL flag checking. There may be other changes 1290 needed to do that. */
1347 needed to do that. */ 1291 if (!test_bit(ATM_VF_PARTIAL, &vcc->flags)) {
1348 if (!test_bit(ATM_VF_PARTIAL,&vcc->flags)) 1292 scq_info *scq;
1349 { 1293
1350 scq_info *scq; 1294 set_bit(ATM_VF_PARTIAL, &vcc->flags);
1351 1295 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1352 set_bit(ATM_VF_PARTIAL,&vcc->flags); 1296 /* Check requested cell rate and availability of SCD */
1353 if (vcc->qos.txtp.traffic_class == ATM_CBR) 1297 if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0
1354 { 1298 && vcc->qos.txtp.min_pcr == 0) {
1355 /* Check requested cell rate and availability of SCD */ 1299 PRINTK
1356 if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0 && 1300 ("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
1357 vcc->qos.txtp.min_pcr == 0) 1301 card->index);
1358 { 1302 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1359 PRINTK("nicstar%d: trying to open a CBR vc with cell rate = 0 \n", 1303 clear_bit(ATM_VF_ADDR, &vcc->flags);
1360 card->index); 1304 return -EINVAL;
1361 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1305 }
1362 clear_bit(ATM_VF_ADDR,&vcc->flags); 1306
1363 return -EINVAL; 1307 tcr = atm_pcr_goal(&(vcc->qos.txtp));
1364 } 1308 tcra = tcr >= 0 ? tcr : -tcr;
1365 1309
1366 tcr = atm_pcr_goal(&(vcc->qos.txtp)); 1310 PRINTK("nicstar%d: target cell rate = %d.\n",
1367 tcra = tcr >= 0 ? tcr : -tcr; 1311 card->index, vcc->qos.txtp.max_pcr);
1368 1312
1369 PRINTK("nicstar%d: target cell rate = %d.\n", card->index, 1313 tmpl =
1370 vcc->qos.txtp.max_pcr); 1314 (unsigned long)tcra *(unsigned long)
1371 1315 NS_TST_NUM_ENTRIES;
1372 tmpl = (unsigned long)tcra * (unsigned long)NS_TST_NUM_ENTRIES; 1316 modl = tmpl % card->max_pcr;
1373 modl = tmpl % card->max_pcr; 1317
1374 1318 n = (int)(tmpl / card->max_pcr);
1375 n = (int)(tmpl / card->max_pcr); 1319 if (tcr > 0) {
1376 if (tcr > 0) 1320 if (modl > 0)
1377 { 1321 n++;
1378 if (modl > 0) n++; 1322 } else if (tcr == 0) {
1379 } 1323 if ((n =
1380 else if (tcr == 0) 1324 (card->tst_free_entries -
1381 { 1325 NS_TST_RESERVED)) <= 0) {
1382 if ((n = (card->tst_free_entries - NS_TST_RESERVED)) <= 0) 1326 PRINTK
1383 { 1327 ("nicstar%d: no CBR bandwidth free.\n",
1384 PRINTK("nicstar%d: no CBR bandwidth free.\n", card->index); 1328 card->index);
1385 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1329 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1386 clear_bit(ATM_VF_ADDR,&vcc->flags); 1330 clear_bit(ATM_VF_ADDR, &vcc->flags);
1387 return -EINVAL; 1331 return -EINVAL;
1388 } 1332 }
1389 } 1333 }
1390 1334
1391 if (n == 0) 1335 if (n == 0) {
1392 { 1336 printk
1393 printk("nicstar%d: selected bandwidth < granularity.\n", card->index); 1337 ("nicstar%d: selected bandwidth < granularity.\n",
1394 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1338 card->index);
1395 clear_bit(ATM_VF_ADDR,&vcc->flags); 1339 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1396 return -EINVAL; 1340 clear_bit(ATM_VF_ADDR, &vcc->flags);
1397 } 1341 return -EINVAL;
1398 1342 }
1399 if (n > (card->tst_free_entries - NS_TST_RESERVED)) 1343
1400 { 1344 if (n > (card->tst_free_entries - NS_TST_RESERVED)) {
1401 PRINTK("nicstar%d: not enough free CBR bandwidth.\n", card->index); 1345 PRINTK
1402 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1346 ("nicstar%d: not enough free CBR bandwidth.\n",
1403 clear_bit(ATM_VF_ADDR,&vcc->flags); 1347 card->index);
1404 return -EINVAL; 1348 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1405 } 1349 clear_bit(ATM_VF_ADDR, &vcc->flags);
1406 else 1350 return -EINVAL;
1407 card->tst_free_entries -= n; 1351 } else
1408 1352 card->tst_free_entries -= n;
1409 XPRINTK("nicstar%d: writing %d tst entries.\n", card->index, n); 1353
1410 for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++) 1354 XPRINTK("nicstar%d: writing %d tst entries.\n",
1411 { 1355 card->index, n);
1412 if (card->scd2vc[frscdi] == NULL) 1356 for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++) {
1413 { 1357 if (card->scd2vc[frscdi] == NULL) {
1414 card->scd2vc[frscdi] = vc; 1358 card->scd2vc[frscdi] = vc;
1415 break; 1359 break;
1416 } 1360 }
1417 } 1361 }
1418 if (frscdi == NS_FRSCD_NUM) 1362 if (frscdi == NS_FRSCD_NUM) {
1419 { 1363 PRINTK
1420 PRINTK("nicstar%d: no SCD available for CBR channel.\n", card->index); 1364 ("nicstar%d: no SCD available for CBR channel.\n",
1421 card->tst_free_entries += n; 1365 card->index);
1422 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1366 card->tst_free_entries += n;
1423 clear_bit(ATM_VF_ADDR,&vcc->flags); 1367 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1424 return -EBUSY; 1368 clear_bit(ATM_VF_ADDR, &vcc->flags);
1425 } 1369 return -EBUSY;
1426 1370 }
1427 vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE; 1371
1428 1372 vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
1429 scq = get_scq(CBR_SCQSIZE, vc->cbr_scd); 1373
1430 if (scq == NULL) 1374 scq = get_scq(card, CBR_SCQSIZE, vc->cbr_scd);
1431 { 1375 if (scq == NULL) {
1432 PRINTK("nicstar%d: can't get fixed rate SCQ.\n", card->index); 1376 PRINTK("nicstar%d: can't get fixed rate SCQ.\n",
1433 card->scd2vc[frscdi] = NULL; 1377 card->index);
1434 card->tst_free_entries += n; 1378 card->scd2vc[frscdi] = NULL;
1435 clear_bit(ATM_VF_PARTIAL,&vcc->flags); 1379 card->tst_free_entries += n;
1436 clear_bit(ATM_VF_ADDR,&vcc->flags); 1380 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1437 return -ENOMEM; 1381 clear_bit(ATM_VF_ADDR, &vcc->flags);
1438 } 1382 return -ENOMEM;
1439 vc->scq = scq; 1383 }
1440 u32d[0] = (u32) virt_to_bus(scq->base); 1384 vc->scq = scq;
1441 u32d[1] = (u32) 0x00000000; 1385 u32d[0] = scq_virt_to_bus(scq, scq->base);
1442 u32d[2] = (u32) 0xffffffff; 1386 u32d[1] = (u32) 0x00000000;
1443 u32d[3] = (u32) 0x00000000; 1387 u32d[2] = (u32) 0xffffffff;
1444 ns_write_sram(card, vc->cbr_scd, u32d, 4); 1388 u32d[3] = (u32) 0x00000000;
1445 1389 ns_write_sram(card, vc->cbr_scd, u32d, 4);
1446 fill_tst(card, n, vc); 1390
1447 } 1391 fill_tst(card, n, vc);
1448 else if (vcc->qos.txtp.traffic_class == ATM_UBR) 1392 } else if (vcc->qos.txtp.traffic_class == ATM_UBR) {
1449 { 1393 vc->cbr_scd = 0x00000000;
1450 vc->cbr_scd = 0x00000000; 1394 vc->scq = card->scq0;
1451 vc->scq = card->scq0; 1395 }
1452 } 1396
1453 1397 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1454 if (vcc->qos.txtp.traffic_class != ATM_NONE) 1398 vc->tx = 1;
1455 { 1399 vc->tx_vcc = vcc;
1456 vc->tx = 1; 1400 vc->tbd_count = 0;
1457 vc->tx_vcc = vcc; 1401 }
1458 vc->tbd_count = 0; 1402 if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1459 } 1403 u32 status;
1460 if (vcc->qos.rxtp.traffic_class != ATM_NONE) 1404
1461 { 1405 vc->rx = 1;
1462 u32 status; 1406 vc->rx_vcc = vcc;
1463 1407 vc->rx_iov = NULL;
1464 vc->rx = 1; 1408
1465 vc->rx_vcc = vcc; 1409 /* Open the connection in hardware */
1466 vc->rx_iov = NULL; 1410 if (vcc->qos.aal == ATM_AAL5)
1467 1411 status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
1468 /* Open the connection in hardware */ 1412 else /* vcc->qos.aal == ATM_AAL0 */
1469 if (vcc->qos.aal == ATM_AAL5) 1413 status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
1470 status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
1471 else /* vcc->qos.aal == ATM_AAL0 */
1472 status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
1473#ifdef RCQ_SUPPORT 1414#ifdef RCQ_SUPPORT
1474 status |= NS_RCTE_RAWCELLINTEN; 1415 status |= NS_RCTE_RAWCELLINTEN;
1475#endif /* RCQ_SUPPORT */ 1416#endif /* RCQ_SUPPORT */
1476 ns_write_sram(card, NS_RCT + (vpi << card->vcibits | vci) * 1417 ns_write_sram(card,
1477 NS_RCT_ENTRY_SIZE, &status, 1); 1418 NS_RCT +
1478 } 1419 (vpi << card->vcibits | vci) *
1479 1420 NS_RCT_ENTRY_SIZE, &status, 1);
1480 } 1421 }
1481
1482 set_bit(ATM_VF_READY,&vcc->flags);
1483 return 0;
1484}
1485 1422
1423 }
1486 1424
1425 set_bit(ATM_VF_READY, &vcc->flags);
1426 return 0;
1427}
1487 1428
1488static void ns_close(struct atm_vcc *vcc) 1429static void ns_close(struct atm_vcc *vcc)
1489{ 1430{
1490 vc_map *vc; 1431 vc_map *vc;
1491 ns_dev *card; 1432 ns_dev *card;
1492 u32 data; 1433 u32 data;
1493 int i; 1434 int i;
1494 1435
1495 vc = vcc->dev_data; 1436 vc = vcc->dev_data;
1496 card = vcc->dev->dev_data; 1437 card = vcc->dev->dev_data;
1497 PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index, 1438 PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
1498 (int) vcc->vpi, vcc->vci); 1439 (int)vcc->vpi, vcc->vci);
1499 1440
1500 clear_bit(ATM_VF_READY,&vcc->flags); 1441 clear_bit(ATM_VF_READY, &vcc->flags);
1501 1442
1502 if (vcc->qos.rxtp.traffic_class != ATM_NONE) 1443 if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1503 { 1444 u32 addr;
1504 u32 addr; 1445 unsigned long flags;
1505 unsigned long flags; 1446
1506 1447 addr =
1507 addr = NS_RCT + (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE; 1448 NS_RCT +
1508 spin_lock_irqsave(&card->res_lock, flags); 1449 (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
1509 while(CMD_BUSY(card)); 1450 spin_lock_irqsave(&card->res_lock, flags);
1510 writel(NS_CMD_CLOSE_CONNECTION | addr << 2, card->membase + CMD); 1451 while (CMD_BUSY(card)) ;
1511 spin_unlock_irqrestore(&card->res_lock, flags); 1452 writel(NS_CMD_CLOSE_CONNECTION | addr << 2,
1512 1453 card->membase + CMD);
1513 vc->rx = 0; 1454 spin_unlock_irqrestore(&card->res_lock, flags);
1514 if (vc->rx_iov != NULL) 1455
1515 { 1456 vc->rx = 0;
1516 struct sk_buff *iovb; 1457 if (vc->rx_iov != NULL) {
1517 u32 stat; 1458 struct sk_buff *iovb;
1518 1459 u32 stat;
1519 stat = readl(card->membase + STAT); 1460
1520 card->sbfqc = ns_stat_sfbqc_get(stat); 1461 stat = readl(card->membase + STAT);
1521 card->lbfqc = ns_stat_lfbqc_get(stat); 1462 card->sbfqc = ns_stat_sfbqc_get(stat);
1522 1463 card->lbfqc = ns_stat_lfbqc_get(stat);
1523 PRINTK("nicstar%d: closing a VC with pending rx buffers.\n", 1464
1524 card->index); 1465 PRINTK
1525 iovb = vc->rx_iov; 1466 ("nicstar%d: closing a VC with pending rx buffers.\n",
1526 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, 1467 card->index);
1527 NS_SKB(iovb)->iovcnt); 1468 iovb = vc->rx_iov;
1528 NS_SKB(iovb)->iovcnt = 0; 1469 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
1529 NS_SKB(iovb)->vcc = NULL; 1470 NS_PRV_IOVCNT(iovb));
1530 spin_lock_irqsave(&card->int_lock, flags); 1471 NS_PRV_IOVCNT(iovb) = 0;
1531 recycle_iov_buf(card, iovb); 1472 spin_lock_irqsave(&card->int_lock, flags);
1532 spin_unlock_irqrestore(&card->int_lock, flags); 1473 recycle_iov_buf(card, iovb);
1533 vc->rx_iov = NULL; 1474 spin_unlock_irqrestore(&card->int_lock, flags);
1534 } 1475 vc->rx_iov = NULL;
1535 } 1476 }
1536 1477 }
1537 if (vcc->qos.txtp.traffic_class != ATM_NONE) 1478
1538 { 1479 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1539 vc->tx = 0; 1480 vc->tx = 0;
1540 } 1481 }
1541 1482
1542 if (vcc->qos.txtp.traffic_class == ATM_CBR) 1483 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1543 { 1484 unsigned long flags;
1544 unsigned long flags; 1485 ns_scqe *scqep;
1545 ns_scqe *scqep; 1486 scq_info *scq;
1546 scq_info *scq; 1487
1547 1488 scq = vc->scq;
1548 scq = vc->scq; 1489
1549 1490 for (;;) {
1550 for (;;) 1491 spin_lock_irqsave(&scq->lock, flags);
1551 { 1492 scqep = scq->next;
1552 spin_lock_irqsave(&scq->lock, flags); 1493 if (scqep == scq->base)
1553 scqep = scq->next; 1494 scqep = scq->last;
1554 if (scqep == scq->base) 1495 else
1555 scqep = scq->last; 1496 scqep--;
1556 else 1497 if (scqep == scq->tail) {
1557 scqep--; 1498 spin_unlock_irqrestore(&scq->lock, flags);
1558 if (scqep == scq->tail) 1499 break;
1559 { 1500 }
1560 spin_unlock_irqrestore(&scq->lock, flags); 1501 /* If the last entry is not a TSR, place one in the SCQ in order to
1561 break; 1502 be able to completely drain it and then close. */
1562 } 1503 if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next) {
1563 /* If the last entry is not a TSR, place one in the SCQ in order to 1504 ns_scqe tsr;
1564 be able to completely drain it and then close. */ 1505 u32 scdi, scqi;
1565 if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next) 1506 u32 data;
1566 { 1507 int index;
1567 ns_scqe tsr; 1508
1568 u32 scdi, scqi; 1509 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1569 u32 data; 1510 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1570 int index; 1511 scqi = scq->next - scq->base;
1571 1512 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1572 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE); 1513 tsr.word_3 = 0x00000000;
1573 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE; 1514 tsr.word_4 = 0x00000000;
1574 scqi = scq->next - scq->base; 1515 *scq->next = tsr;
1575 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi); 1516 index = (int)scqi;
1576 tsr.word_3 = 0x00000000; 1517 scq->skb[index] = NULL;
1577 tsr.word_4 = 0x00000000; 1518 if (scq->next == scq->last)
1578 *scq->next = tsr; 1519 scq->next = scq->base;
1579 index = (int) scqi; 1520 else
1580 scq->skb[index] = NULL; 1521 scq->next++;
1581 if (scq->next == scq->last) 1522 data = scq_virt_to_bus(scq, scq->next);
1582 scq->next = scq->base; 1523 ns_write_sram(card, scq->scd, &data, 1);
1583 else 1524 }
1584 scq->next++; 1525 spin_unlock_irqrestore(&scq->lock, flags);
1585 data = (u32) virt_to_bus(scq->next); 1526 schedule();
1586 ns_write_sram(card, scq->scd, &data, 1); 1527 }
1587 } 1528
1588 spin_unlock_irqrestore(&scq->lock, flags); 1529 /* Free all TST entries */
1589 schedule(); 1530 data = NS_TST_OPCODE_VARIABLE;
1590 } 1531 for (i = 0; i < NS_TST_NUM_ENTRIES; i++) {
1591 1532 if (card->tste2vc[i] == vc) {
1592 /* Free all TST entries */ 1533 ns_write_sram(card, card->tst_addr + i, &data,
1593 data = NS_TST_OPCODE_VARIABLE; 1534 1);
1594 for (i = 0; i < NS_TST_NUM_ENTRIES; i++) 1535 card->tste2vc[i] = NULL;
1595 { 1536 card->tst_free_entries++;
1596 if (card->tste2vc[i] == vc) 1537 }
1597 { 1538 }
1598 ns_write_sram(card, card->tst_addr + i, &data, 1); 1539
1599 card->tste2vc[i] = NULL; 1540 card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
1600 card->tst_free_entries++; 1541 free_scq(card, vc->scq, vcc);
1601 } 1542 }
1602 } 1543
1603 1544 /* remove all references to vcc before deleting it */
1604 card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL; 1545 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1605 free_scq(vc->scq, vcc); 1546 unsigned long flags;
1606 } 1547 scq_info *scq = card->scq0;
1607 1548
1608 /* remove all references to vcc before deleting it */ 1549 spin_lock_irqsave(&scq->lock, flags);
1609 if (vcc->qos.txtp.traffic_class != ATM_NONE) 1550
1610 { 1551 for (i = 0; i < scq->num_entries; i++) {
1611 unsigned long flags; 1552 if (scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
1612 scq_info *scq = card->scq0; 1553 ATM_SKB(scq->skb[i])->vcc = NULL;
1613 1554 atm_return(vcc, scq->skb[i]->truesize);
1614 spin_lock_irqsave(&scq->lock, flags); 1555 PRINTK
1615 1556 ("nicstar: deleted pending vcc mapping\n");
1616 for(i = 0; i < scq->num_entries; i++) { 1557 }
1617 if(scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) { 1558 }
1618 ATM_SKB(scq->skb[i])->vcc = NULL; 1559
1619 atm_return(vcc, scq->skb[i]->truesize); 1560 spin_unlock_irqrestore(&scq->lock, flags);
1620 PRINTK("nicstar: deleted pending vcc mapping\n"); 1561 }
1621 } 1562
1622 } 1563 vcc->dev_data = NULL;
1623 1564 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1624 spin_unlock_irqrestore(&scq->lock, flags); 1565 clear_bit(ATM_VF_ADDR, &vcc->flags);
1625 }
1626
1627 vcc->dev_data = NULL;
1628 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1629 clear_bit(ATM_VF_ADDR,&vcc->flags);
1630 1566
1631#ifdef RX_DEBUG 1567#ifdef RX_DEBUG
1632 { 1568 {
1633 u32 stat, cfg; 1569 u32 stat, cfg;
1634 stat = readl(card->membase + STAT); 1570 stat = readl(card->membase + STAT);
1635 cfg = readl(card->membase + CFG); 1571 cfg = readl(card->membase + CFG);
1636 printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg); 1572 printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
1637 printk("TSQ: base = 0x%08X next = 0x%08X last = 0x%08X TSQT = 0x%08X \n", 1573 printk
1638 (u32) card->tsq.base, (u32) card->tsq.next,(u32) card->tsq.last, 1574 ("TSQ: base = 0x%p next = 0x%p last = 0x%p TSQT = 0x%08X \n",
1639 readl(card->membase + TSQT)); 1575 card->tsq.base, card->tsq.next,
1640 printk("RSQ: base = 0x%08X next = 0x%08X last = 0x%08X RSQT = 0x%08X \n", 1576 card->tsq.last, readl(card->membase + TSQT));
1641 (u32) card->rsq.base, (u32) card->rsq.next,(u32) card->rsq.last, 1577 printk
1642 readl(card->membase + RSQT)); 1578 ("RSQ: base = 0x%p next = 0x%p last = 0x%p RSQT = 0x%08X \n",
1643 printk("Empty free buffer queue interrupt %s \n", 1579 card->rsq.base, card->rsq.next,
1644 card->efbie ? "enabled" : "disabled"); 1580 card->rsq.last, readl(card->membase + RSQT));
1645 printk("SBCNT = %d count = %d LBCNT = %d count = %d \n", 1581 printk("Empty free buffer queue interrupt %s \n",
1646 ns_stat_sfbqc_get(stat), card->sbpool.count, 1582 card->efbie ? "enabled" : "disabled");
1647 ns_stat_lfbqc_get(stat), card->lbpool.count); 1583 printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
1648 printk("hbpool.count = %d iovpool.count = %d \n", 1584 ns_stat_sfbqc_get(stat), card->sbpool.count,
1649 card->hbpool.count, card->iovpool.count); 1585 ns_stat_lfbqc_get(stat), card->lbpool.count);
1650 } 1586 printk("hbpool.count = %d iovpool.count = %d \n",
1587 card->hbpool.count, card->iovpool.count);
1588 }
1651#endif /* RX_DEBUG */ 1589#endif /* RX_DEBUG */
1652} 1590}
1653 1591
1654 1592static void fill_tst(ns_dev * card, int n, vc_map * vc)
1655
1656static void fill_tst(ns_dev *card, int n, vc_map *vc)
1657{ 1593{
1658 u32 new_tst; 1594 u32 new_tst;
1659 unsigned long cl; 1595 unsigned long cl;
1660 int e, r; 1596 int e, r;
1661 u32 data; 1597 u32 data;
1662 1598
1663 /* It would be very complicated to keep the two TSTs synchronized while 1599 /* It would be very complicated to keep the two TSTs synchronized while
1664 assuring that writes are only made to the inactive TST. So, for now I 1600 assuring that writes are only made to the inactive TST. So, for now I
1665 will use only one TST. If problems occur, I will change this again */ 1601 will use only one TST. If problems occur, I will change this again */
1666 1602
1667 new_tst = card->tst_addr; 1603 new_tst = card->tst_addr;
1668 1604
1669 /* Fill procedure */ 1605 /* Fill procedure */
1670 1606
1671 for (e = 0; e < NS_TST_NUM_ENTRIES; e++) 1607 for (e = 0; e < NS_TST_NUM_ENTRIES; e++) {
1672 { 1608 if (card->tste2vc[e] == NULL)
1673 if (card->tste2vc[e] == NULL) 1609 break;
1674 break; 1610 }
1675 } 1611 if (e == NS_TST_NUM_ENTRIES) {
1676 if (e == NS_TST_NUM_ENTRIES) { 1612 printk("nicstar%d: No free TST entries found. \n", card->index);
1677 printk("nicstar%d: No free TST entries found. \n", card->index); 1613 return;
1678 return; 1614 }
1679 } 1615
1680 1616 r = n;
1681 r = n; 1617 cl = NS_TST_NUM_ENTRIES;
1682 cl = NS_TST_NUM_ENTRIES; 1618 data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
1683 data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd); 1619
1684 1620 while (r > 0) {
1685 while (r > 0) 1621 if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL) {
1686 { 1622 card->tste2vc[e] = vc;
1687 if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL) 1623 ns_write_sram(card, new_tst + e, &data, 1);
1688 { 1624 cl -= NS_TST_NUM_ENTRIES;
1689 card->tste2vc[e] = vc; 1625 r--;
1690 ns_write_sram(card, new_tst + e, &data, 1); 1626 }
1691 cl -= NS_TST_NUM_ENTRIES; 1627
1692 r--; 1628 if (++e == NS_TST_NUM_ENTRIES) {
1693 } 1629 e = 0;
1694 1630 }
1695 if (++e == NS_TST_NUM_ENTRIES) { 1631 cl += n;
1696 e = 0; 1632 }
1697 } 1633
1698 cl += n; 1634 /* End of fill procedure */
1699 } 1635
1700 1636 data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
1701 /* End of fill procedure */ 1637 ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
1702 1638 ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
1703 data = ns_tste_make(NS_TST_OPCODE_END, new_tst); 1639 card->tst_addr = new_tst;
1704 ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
1705 ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
1706 card->tst_addr = new_tst;
1707} 1640}
1708 1641
1709
1710
1711static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb) 1642static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
1712{ 1643{
1713 ns_dev *card; 1644 ns_dev *card;
1714 vc_map *vc; 1645 vc_map *vc;
1715 scq_info *scq; 1646 scq_info *scq;
1716 unsigned long buflen; 1647 unsigned long buflen;
1717 ns_scqe scqe; 1648 ns_scqe scqe;
1718 u32 flags; /* TBD flags, not CPU flags */ 1649 u32 flags; /* TBD flags, not CPU flags */
1719 1650
1720 card = vcc->dev->dev_data; 1651 card = vcc->dev->dev_data;
1721 TXPRINTK("nicstar%d: ns_send() called.\n", card->index); 1652 TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
1722 if ((vc = (vc_map *) vcc->dev_data) == NULL) 1653 if ((vc = (vc_map *) vcc->dev_data) == NULL) {
1723 { 1654 printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n",
1724 printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n", card->index); 1655 card->index);
1725 atomic_inc(&vcc->stats->tx_err); 1656 atomic_inc(&vcc->stats->tx_err);
1726 dev_kfree_skb_any(skb); 1657 dev_kfree_skb_any(skb);
1727 return -EINVAL; 1658 return -EINVAL;
1728 } 1659 }
1729
1730 if (!vc->tx)
1731 {
1732 printk("nicstar%d: Trying to transmit on a non-tx VC.\n", card->index);
1733 atomic_inc(&vcc->stats->tx_err);
1734 dev_kfree_skb_any(skb);
1735 return -EINVAL;
1736 }
1737
1738 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
1739 {
1740 printk("nicstar%d: Only AAL0 and AAL5 are supported.\n", card->index);
1741 atomic_inc(&vcc->stats->tx_err);
1742 dev_kfree_skb_any(skb);
1743 return -EINVAL;
1744 }
1745
1746 if (skb_shinfo(skb)->nr_frags != 0)
1747 {
1748 printk("nicstar%d: No scatter-gather yet.\n", card->index);
1749 atomic_inc(&vcc->stats->tx_err);
1750 dev_kfree_skb_any(skb);
1751 return -EINVAL;
1752 }
1753
1754 ATM_SKB(skb)->vcc = vcc;
1755
1756 if (vcc->qos.aal == ATM_AAL5)
1757 {
1758 buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
1759 flags = NS_TBD_AAL5;
1760 scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data));
1761 scqe.word_3 = cpu_to_le32((u32) skb->len);
1762 scqe.word_4 = ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
1763 ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ? 1 : 0);
1764 flags |= NS_TBD_EOPDU;
1765 }
1766 else /* (vcc->qos.aal == ATM_AAL0) */
1767 {
1768 buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
1769 flags = NS_TBD_AAL0;
1770 scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data) + NS_AAL0_HEADER);
1771 scqe.word_3 = cpu_to_le32(0x00000000);
1772 if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
1773 flags |= NS_TBD_EOPDU;
1774 scqe.word_4 = cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
1775 /* Force the VPI/VCI to be the same as in VCC struct */
1776 scqe.word_4 |= cpu_to_le32((((u32) vcc->vpi) << NS_TBD_VPI_SHIFT |
1777 ((u32) vcc->vci) << NS_TBD_VCI_SHIFT) &
1778 NS_TBD_VC_MASK);
1779 }
1780
1781 if (vcc->qos.txtp.traffic_class == ATM_CBR)
1782 {
1783 scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
1784 scq = ((vc_map *) vcc->dev_data)->scq;
1785 }
1786 else
1787 {
1788 scqe.word_1 = ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
1789 scq = card->scq0;
1790 }
1791
1792 if (push_scqe(card, vc, scq, &scqe, skb) != 0)
1793 {
1794 atomic_inc(&vcc->stats->tx_err);
1795 dev_kfree_skb_any(skb);
1796 return -EIO;
1797 }
1798 atomic_inc(&vcc->stats->tx);
1799
1800 return 0;
1801}
1802
1803 1660
1661 if (!vc->tx) {
1662 printk("nicstar%d: Trying to transmit on a non-tx VC.\n",
1663 card->index);
1664 atomic_inc(&vcc->stats->tx_err);
1665 dev_kfree_skb_any(skb);
1666 return -EINVAL;
1667 }
1804 1668
1805static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd, 1669 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1806 struct sk_buff *skb) 1670 printk("nicstar%d: Only AAL0 and AAL5 are supported.\n",
1807{ 1671 card->index);
1808 unsigned long flags; 1672 atomic_inc(&vcc->stats->tx_err);
1809 ns_scqe tsr; 1673 dev_kfree_skb_any(skb);
1810 u32 scdi, scqi; 1674 return -EINVAL;
1811 int scq_is_vbr; 1675 }
1812 u32 data;
1813 int index;
1814
1815 spin_lock_irqsave(&scq->lock, flags);
1816 while (scq->tail == scq->next)
1817 {
1818 if (in_interrupt()) {
1819 spin_unlock_irqrestore(&scq->lock, flags);
1820 printk("nicstar%d: Error pushing TBD.\n", card->index);
1821 return 1;
1822 }
1823
1824 scq->full = 1;
1825 spin_unlock_irqrestore(&scq->lock, flags);
1826 interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
1827 spin_lock_irqsave(&scq->lock, flags);
1828
1829 if (scq->full) {
1830 spin_unlock_irqrestore(&scq->lock, flags);
1831 printk("nicstar%d: Timeout pushing TBD.\n", card->index);
1832 return 1;
1833 }
1834 }
1835 *scq->next = *tbd;
1836 index = (int) (scq->next - scq->base);
1837 scq->skb[index] = skb;
1838 XPRINTK("nicstar%d: sending skb at 0x%x (pos %d).\n",
1839 card->index, (u32) skb, index);
1840 XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
1841 card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
1842 le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
1843 (u32) scq->next);
1844 if (scq->next == scq->last)
1845 scq->next = scq->base;
1846 else
1847 scq->next++;
1848
1849 vc->tbd_count++;
1850 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
1851 {
1852 scq->tbd_count++;
1853 scq_is_vbr = 1;
1854 }
1855 else
1856 scq_is_vbr = 0;
1857
1858 if (vc->tbd_count >= MAX_TBD_PER_VC || scq->tbd_count >= MAX_TBD_PER_SCQ)
1859 {
1860 int has_run = 0;
1861
1862 while (scq->tail == scq->next)
1863 {
1864 if (in_interrupt()) {
1865 data = (u32) virt_to_bus(scq->next);
1866 ns_write_sram(card, scq->scd, &data, 1);
1867 spin_unlock_irqrestore(&scq->lock, flags);
1868 printk("nicstar%d: Error pushing TSR.\n", card->index);
1869 return 0;
1870 }
1871
1872 scq->full = 1;
1873 if (has_run++) break;
1874 spin_unlock_irqrestore(&scq->lock, flags);
1875 interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
1876 spin_lock_irqsave(&scq->lock, flags);
1877 }
1878
1879 if (!scq->full)
1880 {
1881 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1882 if (scq_is_vbr)
1883 scdi = NS_TSR_SCDISVBR;
1884 else
1885 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1886 scqi = scq->next - scq->base;
1887 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1888 tsr.word_3 = 0x00000000;
1889 tsr.word_4 = 0x00000000;
1890
1891 *scq->next = tsr;
1892 index = (int) scqi;
1893 scq->skb[index] = NULL;
1894 XPRINTK("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
1895 card->index, le32_to_cpu(tsr.word_1), le32_to_cpu(tsr.word_2),
1896 le32_to_cpu(tsr.word_3), le32_to_cpu(tsr.word_4),
1897 (u32) scq->next);
1898 if (scq->next == scq->last)
1899 scq->next = scq->base;
1900 else
1901 scq->next++;
1902 vc->tbd_count = 0;
1903 scq->tbd_count = 0;
1904 }
1905 else
1906 PRINTK("nicstar%d: Timeout pushing TSR.\n", card->index);
1907 }
1908 data = (u32) virt_to_bus(scq->next);
1909 ns_write_sram(card, scq->scd, &data, 1);
1910
1911 spin_unlock_irqrestore(&scq->lock, flags);
1912
1913 return 0;
1914}
1915 1676
1677 if (skb_shinfo(skb)->nr_frags != 0) {
1678 printk("nicstar%d: No scatter-gather yet.\n", card->index);
1679 atomic_inc(&vcc->stats->tx_err);
1680 dev_kfree_skb_any(skb);
1681 return -EINVAL;
1682 }
1683
1684 ATM_SKB(skb)->vcc = vcc;
1685
1686 NS_PRV_DMA(skb) = pci_map_single(card->pcidev, skb->data,
1687 skb->len, PCI_DMA_TODEVICE);
1688
1689 if (vcc->qos.aal == ATM_AAL5) {
1690 buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
1691 flags = NS_TBD_AAL5;
1692 scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb));
1693 scqe.word_3 = cpu_to_le32(skb->len);
1694 scqe.word_4 =
1695 ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
1696 ATM_SKB(skb)->
1697 atm_options & ATM_ATMOPT_CLP ? 1 : 0);
1698 flags |= NS_TBD_EOPDU;
1699 } else { /* (vcc->qos.aal == ATM_AAL0) */
1700
1701 buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
1702 flags = NS_TBD_AAL0;
1703 scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb) + NS_AAL0_HEADER);
1704 scqe.word_3 = cpu_to_le32(0x00000000);
1705 if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
1706 flags |= NS_TBD_EOPDU;
1707 scqe.word_4 =
1708 cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
1709 /* Force the VPI/VCI to be the same as in VCC struct */
1710 scqe.word_4 |=
1711 cpu_to_le32((((u32) vcc->
1712 vpi) << NS_TBD_VPI_SHIFT | ((u32) vcc->
1713 vci) <<
1714 NS_TBD_VCI_SHIFT) & NS_TBD_VC_MASK);
1715 }
1716
1717 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1718 scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
1719 scq = ((vc_map *) vcc->dev_data)->scq;
1720 } else {
1721 scqe.word_1 =
1722 ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
1723 scq = card->scq0;
1724 }
1725
1726 if (push_scqe(card, vc, scq, &scqe, skb) != 0) {
1727 atomic_inc(&vcc->stats->tx_err);
1728 dev_kfree_skb_any(skb);
1729 return -EIO;
1730 }
1731 atomic_inc(&vcc->stats->tx);
1916 1732
1733 return 0;
1734}
1917 1735
1918static void process_tsq(ns_dev *card) 1736static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
1737 struct sk_buff *skb)
1919{ 1738{
1920 u32 scdi; 1739 unsigned long flags;
1921 scq_info *scq; 1740 ns_scqe tsr;
1922 ns_tsi *previous = NULL, *one_ahead, *two_ahead; 1741 u32 scdi, scqi;
1923 int serviced_entries; /* flag indicating at least on entry was serviced */ 1742 int scq_is_vbr;
1924 1743 u32 data;
1925 serviced_entries = 0; 1744 int index;
1926 1745
1927 if (card->tsq.next == card->tsq.last) 1746 spin_lock_irqsave(&scq->lock, flags);
1928 one_ahead = card->tsq.base; 1747 while (scq->tail == scq->next) {
1929 else 1748 if (in_interrupt()) {
1930 one_ahead = card->tsq.next + 1; 1749 spin_unlock_irqrestore(&scq->lock, flags);
1931 1750 printk("nicstar%d: Error pushing TBD.\n", card->index);
1932 if (one_ahead == card->tsq.last) 1751 return 1;
1933 two_ahead = card->tsq.base; 1752 }
1934 else 1753
1935 two_ahead = one_ahead + 1; 1754 scq->full = 1;
1936 1755 spin_unlock_irqrestore(&scq->lock, flags);
1937 while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) || 1756 interruptible_sleep_on_timeout(&scq->scqfull_waitq,
1938 !ns_tsi_isempty(two_ahead)) 1757 SCQFULL_TIMEOUT);
1939 /* At most two empty, as stated in the 77201 errata */ 1758 spin_lock_irqsave(&scq->lock, flags);
1940 { 1759
1941 serviced_entries = 1; 1760 if (scq->full) {
1942 1761 spin_unlock_irqrestore(&scq->lock, flags);
1943 /* Skip the one or two possible empty entries */ 1762 printk("nicstar%d: Timeout pushing TBD.\n",
1944 while (ns_tsi_isempty(card->tsq.next)) { 1763 card->index);
1945 if (card->tsq.next == card->tsq.last) 1764 return 1;
1946 card->tsq.next = card->tsq.base; 1765 }
1947 else 1766 }
1948 card->tsq.next++; 1767 *scq->next = *tbd;
1949 } 1768 index = (int)(scq->next - scq->base);
1950 1769 scq->skb[index] = skb;
1951 if (!ns_tsi_tmrof(card->tsq.next)) 1770 XPRINTK("nicstar%d: sending skb at 0x%p (pos %d).\n",
1952 { 1771 card->index, skb, index);
1953 scdi = ns_tsi_getscdindex(card->tsq.next); 1772 XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
1954 if (scdi == NS_TSI_SCDISVBR) 1773 card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
1955 scq = card->scq0; 1774 le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
1956 else 1775 scq->next);
1957 { 1776 if (scq->next == scq->last)
1958 if (card->scd2vc[scdi] == NULL) 1777 scq->next = scq->base;
1959 { 1778 else
1960 printk("nicstar%d: could not find VC from SCD index.\n", 1779 scq->next++;
1961 card->index); 1780
1962 ns_tsi_init(card->tsq.next); 1781 vc->tbd_count++;
1963 return; 1782 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES) {
1964 } 1783 scq->tbd_count++;
1965 scq = card->scd2vc[scdi]->scq; 1784 scq_is_vbr = 1;
1966 } 1785 } else
1967 drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next)); 1786 scq_is_vbr = 0;
1968 scq->full = 0; 1787
1969 wake_up_interruptible(&(scq->scqfull_waitq)); 1788 if (vc->tbd_count >= MAX_TBD_PER_VC
1970 } 1789 || scq->tbd_count >= MAX_TBD_PER_SCQ) {
1971 1790 int has_run = 0;
1972 ns_tsi_init(card->tsq.next); 1791
1973 previous = card->tsq.next; 1792 while (scq->tail == scq->next) {
1974 if (card->tsq.next == card->tsq.last) 1793 if (in_interrupt()) {
1975 card->tsq.next = card->tsq.base; 1794 data = scq_virt_to_bus(scq, scq->next);
1976 else 1795 ns_write_sram(card, scq->scd, &data, 1);
1977 card->tsq.next++; 1796 spin_unlock_irqrestore(&scq->lock, flags);
1978 1797 printk("nicstar%d: Error pushing TSR.\n",
1979 if (card->tsq.next == card->tsq.last) 1798 card->index);
1980 one_ahead = card->tsq.base; 1799 return 0;
1981 else 1800 }
1982 one_ahead = card->tsq.next + 1; 1801
1983 1802 scq->full = 1;
1984 if (one_ahead == card->tsq.last) 1803 if (has_run++)
1985 two_ahead = card->tsq.base; 1804 break;
1986 else 1805 spin_unlock_irqrestore(&scq->lock, flags);
1987 two_ahead = one_ahead + 1; 1806 interruptible_sleep_on_timeout(&scq->scqfull_waitq,
1988 } 1807 SCQFULL_TIMEOUT);
1989 1808 spin_lock_irqsave(&scq->lock, flags);
1990 if (serviced_entries) { 1809 }
1991 writel((((u32) previous) - ((u32) card->tsq.base)), 1810
1992 card->membase + TSQH); 1811 if (!scq->full) {
1993 } 1812 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1813 if (scq_is_vbr)
1814 scdi = NS_TSR_SCDISVBR;
1815 else
1816 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1817 scqi = scq->next - scq->base;
1818 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1819 tsr.word_3 = 0x00000000;
1820 tsr.word_4 = 0x00000000;
1821
1822 *scq->next = tsr;
1823 index = (int)scqi;
1824 scq->skb[index] = NULL;
1825 XPRINTK
1826 ("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
1827 card->index, le32_to_cpu(tsr.word_1),
1828 le32_to_cpu(tsr.word_2), le32_to_cpu(tsr.word_3),
1829 le32_to_cpu(tsr.word_4), scq->next);
1830 if (scq->next == scq->last)
1831 scq->next = scq->base;
1832 else
1833 scq->next++;
1834 vc->tbd_count = 0;
1835 scq->tbd_count = 0;
1836 } else
1837 PRINTK("nicstar%d: Timeout pushing TSR.\n",
1838 card->index);
1839 }
1840 data = scq_virt_to_bus(scq, scq->next);
1841 ns_write_sram(card, scq->scd, &data, 1);
1842
1843 spin_unlock_irqrestore(&scq->lock, flags);
1844
1845 return 0;
1994} 1846}
1995 1847
1996 1848static void process_tsq(ns_dev * card)
1997
1998static void drain_scq(ns_dev *card, scq_info *scq, int pos)
1999{ 1849{
2000 struct atm_vcc *vcc; 1850 u32 scdi;
2001 struct sk_buff *skb; 1851 scq_info *scq;
2002 int i; 1852 ns_tsi *previous = NULL, *one_ahead, *two_ahead;
2003 unsigned long flags; 1853 int serviced_entries; /* flag indicating at least on entry was serviced */
2004 1854
2005 XPRINTK("nicstar%d: drain_scq() called, scq at 0x%x, pos %d.\n", 1855 serviced_entries = 0;
2006 card->index, (u32) scq, pos); 1856
2007 if (pos >= scq->num_entries) 1857 if (card->tsq.next == card->tsq.last)
2008 { 1858 one_ahead = card->tsq.base;
2009 printk("nicstar%d: Bad index on drain_scq().\n", card->index); 1859 else
2010 return; 1860 one_ahead = card->tsq.next + 1;
2011 } 1861
2012 1862 if (one_ahead == card->tsq.last)
2013 spin_lock_irqsave(&scq->lock, flags); 1863 two_ahead = card->tsq.base;
2014 i = (int) (scq->tail - scq->base); 1864 else
2015 if (++i == scq->num_entries) 1865 two_ahead = one_ahead + 1;
2016 i = 0; 1866
2017 while (i != pos) 1867 while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
2018 { 1868 !ns_tsi_isempty(two_ahead))
2019 skb = scq->skb[i]; 1869 /* At most two empty, as stated in the 77201 errata */
2020 XPRINTK("nicstar%d: freeing skb at 0x%x (index %d).\n", 1870 {
2021 card->index, (u32) skb, i); 1871 serviced_entries = 1;
2022 if (skb != NULL) 1872
2023 { 1873 /* Skip the one or two possible empty entries */
2024 vcc = ATM_SKB(skb)->vcc; 1874 while (ns_tsi_isempty(card->tsq.next)) {
2025 if (vcc && vcc->pop != NULL) { 1875 if (card->tsq.next == card->tsq.last)
2026 vcc->pop(vcc, skb); 1876 card->tsq.next = card->tsq.base;
2027 } else { 1877 else
2028 dev_kfree_skb_irq(skb); 1878 card->tsq.next++;
2029 } 1879 }
2030 scq->skb[i] = NULL; 1880
2031 } 1881 if (!ns_tsi_tmrof(card->tsq.next)) {
2032 if (++i == scq->num_entries) 1882 scdi = ns_tsi_getscdindex(card->tsq.next);
2033 i = 0; 1883 if (scdi == NS_TSI_SCDISVBR)
2034 } 1884 scq = card->scq0;
2035 scq->tail = scq->base + pos; 1885 else {
2036 spin_unlock_irqrestore(&scq->lock, flags); 1886 if (card->scd2vc[scdi] == NULL) {
1887 printk
1888 ("nicstar%d: could not find VC from SCD index.\n",
1889 card->index);
1890 ns_tsi_init(card->tsq.next);
1891 return;
1892 }
1893 scq = card->scd2vc[scdi]->scq;
1894 }
1895 drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
1896 scq->full = 0;
1897 wake_up_interruptible(&(scq->scqfull_waitq));
1898 }
1899
1900 ns_tsi_init(card->tsq.next);
1901 previous = card->tsq.next;
1902 if (card->tsq.next == card->tsq.last)
1903 card->tsq.next = card->tsq.base;
1904 else
1905 card->tsq.next++;
1906
1907 if (card->tsq.next == card->tsq.last)
1908 one_ahead = card->tsq.base;
1909 else
1910 one_ahead = card->tsq.next + 1;
1911
1912 if (one_ahead == card->tsq.last)
1913 two_ahead = card->tsq.base;
1914 else
1915 two_ahead = one_ahead + 1;
1916 }
1917
1918 if (serviced_entries)
1919 writel(PTR_DIFF(previous, card->tsq.base),
1920 card->membase + TSQH);
2037} 1921}
2038 1922
1923static void drain_scq(ns_dev * card, scq_info * scq, int pos)
1924{
1925 struct atm_vcc *vcc;
1926 struct sk_buff *skb;
1927 int i;
1928 unsigned long flags;
1929
1930 XPRINTK("nicstar%d: drain_scq() called, scq at 0x%p, pos %d.\n",
1931 card->index, scq, pos);
1932 if (pos >= scq->num_entries) {
1933 printk("nicstar%d: Bad index on drain_scq().\n", card->index);
1934 return;
1935 }
1936
1937 spin_lock_irqsave(&scq->lock, flags);
1938 i = (int)(scq->tail - scq->base);
1939 if (++i == scq->num_entries)
1940 i = 0;
1941 while (i != pos) {
1942 skb = scq->skb[i];
1943 XPRINTK("nicstar%d: freeing skb at 0x%p (index %d).\n",
1944 card->index, skb, i);
1945 if (skb != NULL) {
1946 pci_unmap_single(card->pcidev,
1947 NS_PRV_DMA(skb),
1948 skb->len,
1949 PCI_DMA_TODEVICE);
1950 vcc = ATM_SKB(skb)->vcc;
1951 if (vcc && vcc->pop != NULL) {
1952 vcc->pop(vcc, skb);
1953 } else {
1954 dev_kfree_skb_irq(skb);
1955 }
1956 scq->skb[i] = NULL;
1957 }
1958 if (++i == scq->num_entries)
1959 i = 0;
1960 }
1961 scq->tail = scq->base + pos;
1962 spin_unlock_irqrestore(&scq->lock, flags);
1963}
2039 1964
2040 1965static void process_rsq(ns_dev * card)
2041static void process_rsq(ns_dev *card)
2042{ 1966{
2043 ns_rsqe *previous; 1967 ns_rsqe *previous;
2044 1968
2045 if (!ns_rsqe_valid(card->rsq.next)) 1969 if (!ns_rsqe_valid(card->rsq.next))
2046 return; 1970 return;
2047 do { 1971 do {
2048 dequeue_rx(card, card->rsq.next); 1972 dequeue_rx(card, card->rsq.next);
2049 ns_rsqe_init(card->rsq.next); 1973 ns_rsqe_init(card->rsq.next);
2050 previous = card->rsq.next; 1974 previous = card->rsq.next;
2051 if (card->rsq.next == card->rsq.last) 1975 if (card->rsq.next == card->rsq.last)
2052 card->rsq.next = card->rsq.base; 1976 card->rsq.next = card->rsq.base;
2053 else 1977 else
2054 card->rsq.next++; 1978 card->rsq.next++;
2055 } while (ns_rsqe_valid(card->rsq.next)); 1979 } while (ns_rsqe_valid(card->rsq.next));
2056 writel((((u32) previous) - ((u32) card->rsq.base)), 1980 writel(PTR_DIFF(previous, card->rsq.base), card->membase + RSQH);
2057 card->membase + RSQH);
2058} 1981}
2059 1982
1983static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe)
1984{
1985 u32 vpi, vci;
1986 vc_map *vc;
1987 struct sk_buff *iovb;
1988 struct iovec *iov;
1989 struct atm_vcc *vcc;
1990 struct sk_buff *skb;
1991 unsigned short aal5_len;
1992 int len;
1993 u32 stat;
1994 u32 id;
1995
1996 stat = readl(card->membase + STAT);
1997 card->sbfqc = ns_stat_sfbqc_get(stat);
1998 card->lbfqc = ns_stat_lfbqc_get(stat);
1999
2000 id = le32_to_cpu(rsqe->buffer_handle);
2001 skb = idr_find(&card->idr, id);
2002 if (!skb) {
2003 RXPRINTK(KERN_ERR
2004 "nicstar%d: idr_find() failed!\n", card->index);
2005 return;
2006 }
2007 idr_remove(&card->idr, id);
2008 pci_dma_sync_single_for_cpu(card->pcidev,
2009 NS_PRV_DMA(skb),
2010 (NS_PRV_BUFTYPE(skb) == BUF_SM
2011 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
2012 PCI_DMA_FROMDEVICE);
2013 pci_unmap_single(card->pcidev,
2014 NS_PRV_DMA(skb),
2015 (NS_PRV_BUFTYPE(skb) == BUF_SM
2016 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
2017 PCI_DMA_FROMDEVICE);
2018 vpi = ns_rsqe_vpi(rsqe);
2019 vci = ns_rsqe_vci(rsqe);
2020 if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits) {
2021 printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
2022 card->index, vpi, vci);
2023 recycle_rx_buf(card, skb);
2024 return;
2025 }
2026
2027 vc = &(card->vcmap[vpi << card->vcibits | vci]);
2028 if (!vc->rx) {
2029 RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
2030 card->index, vpi, vci);
2031 recycle_rx_buf(card, skb);
2032 return;
2033 }
2034
2035 vcc = vc->rx_vcc;
2036
2037 if (vcc->qos.aal == ATM_AAL0) {
2038 struct sk_buff *sb;
2039 unsigned char *cell;
2040 int i;
2041
2042 cell = skb->data;
2043 for (i = ns_rsqe_cellcount(rsqe); i; i--) {
2044 if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL) {
2045 printk
2046 ("nicstar%d: Can't allocate buffers for aal0.\n",
2047 card->index);
2048 atomic_add(i, &vcc->stats->rx_drop);
2049 break;
2050 }
2051 if (!atm_charge(vcc, sb->truesize)) {
2052 RXPRINTK
2053 ("nicstar%d: atm_charge() dropped aal0 packets.\n",
2054 card->index);
2055 atomic_add(i - 1, &vcc->stats->rx_drop); /* already increased by 1 */
2056 dev_kfree_skb_any(sb);
2057 break;
2058 }
2059 /* Rebuild the header */
2060 *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
2061 (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
2062 if (i == 1 && ns_rsqe_eopdu(rsqe))
2063 *((u32 *) sb->data) |= 0x00000002;
2064 skb_put(sb, NS_AAL0_HEADER);
2065 memcpy(skb_tail_pointer(sb), cell, ATM_CELL_PAYLOAD);
2066 skb_put(sb, ATM_CELL_PAYLOAD);
2067 ATM_SKB(sb)->vcc = vcc;
2068 __net_timestamp(sb);
2069 vcc->push(vcc, sb);
2070 atomic_inc(&vcc->stats->rx);
2071 cell += ATM_CELL_PAYLOAD;
2072 }
2073
2074 recycle_rx_buf(card, skb);
2075 return;
2076 }
2077
2078 /* To reach this point, the AAL layer can only be AAL5 */
2079
2080 if ((iovb = vc->rx_iov) == NULL) {
2081 iovb = skb_dequeue(&(card->iovpool.queue));
2082 if (iovb == NULL) { /* No buffers in the queue */
2083 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
2084 if (iovb == NULL) {
2085 printk("nicstar%d: Out of iovec buffers.\n",
2086 card->index);
2087 atomic_inc(&vcc->stats->rx_drop);
2088 recycle_rx_buf(card, skb);
2089 return;
2090 }
2091 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2092 } else if (--card->iovpool.count < card->iovnr.min) {
2093 struct sk_buff *new_iovb;
2094 if ((new_iovb =
2095 alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL) {
2096 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2097 skb_queue_tail(&card->iovpool.queue, new_iovb);
2098 card->iovpool.count++;
2099 }
2100 }
2101 vc->rx_iov = iovb;
2102 NS_PRV_IOVCNT(iovb) = 0;
2103 iovb->len = 0;
2104 iovb->data = iovb->head;
2105 skb_reset_tail_pointer(iovb);
2106 /* IMPORTANT: a pointer to the sk_buff containing the small or large
2107 buffer is stored as iovec base, NOT a pointer to the
2108 small or large buffer itself. */
2109 } else if (NS_PRV_IOVCNT(iovb) >= NS_MAX_IOVECS) {
2110 printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
2111 atomic_inc(&vcc->stats->rx_err);
2112 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2113 NS_MAX_IOVECS);
2114 NS_PRV_IOVCNT(iovb) = 0;
2115 iovb->len = 0;
2116 iovb->data = iovb->head;
2117 skb_reset_tail_pointer(iovb);
2118 }
2119 iov = &((struct iovec *)iovb->data)[NS_PRV_IOVCNT(iovb)++];
2120 iov->iov_base = (void *)skb;
2121 iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
2122 iovb->len += iov->iov_len;
2060 2123
2124#ifdef EXTRA_DEBUG
2125 if (NS_PRV_IOVCNT(iovb) == 1) {
2126 if (NS_PRV_BUFTYPE(skb) != BUF_SM) {
2127 printk
2128 ("nicstar%d: Expected a small buffer, and this is not one.\n",
2129 card->index);
2130 which_list(card, skb);
2131 atomic_inc(&vcc->stats->rx_err);
2132 recycle_rx_buf(card, skb);
2133 vc->rx_iov = NULL;
2134 recycle_iov_buf(card, iovb);
2135 return;
2136 }
2137 } else { /* NS_PRV_IOVCNT(iovb) >= 2 */
2138
2139 if (NS_PRV_BUFTYPE(skb) != BUF_LG) {
2140 printk
2141 ("nicstar%d: Expected a large buffer, and this is not one.\n",
2142 card->index);
2143 which_list(card, skb);
2144 atomic_inc(&vcc->stats->rx_err);
2145 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2146 NS_PRV_IOVCNT(iovb));
2147 vc->rx_iov = NULL;
2148 recycle_iov_buf(card, iovb);
2149 return;
2150 }
2151 }
2152#endif /* EXTRA_DEBUG */
2061 2153
2062static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe) 2154 if (ns_rsqe_eopdu(rsqe)) {
2063{ 2155 /* This works correctly regardless of the endianness of the host */
2064 u32 vpi, vci; 2156 unsigned char *L1L2 = (unsigned char *)
2065 vc_map *vc; 2157 (skb->data + iov->iov_len - 6);
2066 struct sk_buff *iovb; 2158 aal5_len = L1L2[0] << 8 | L1L2[1];
2067 struct iovec *iov; 2159 len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
2068 struct atm_vcc *vcc; 2160 if (ns_rsqe_crcerr(rsqe) ||
2069 struct sk_buff *skb; 2161 len + 8 > iovb->len || len + (47 + 8) < iovb->len) {
2070 unsigned short aal5_len; 2162 printk("nicstar%d: AAL5 CRC error", card->index);
2071 int len; 2163 if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2072 u32 stat; 2164 printk(" - PDU size mismatch.\n");
2073 2165 else
2074 stat = readl(card->membase + STAT); 2166 printk(".\n");
2075 card->sbfqc = ns_stat_sfbqc_get(stat); 2167 atomic_inc(&vcc->stats->rx_err);
2076 card->lbfqc = ns_stat_lfbqc_get(stat); 2168 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2077 2169 NS_PRV_IOVCNT(iovb));
2078 skb = (struct sk_buff *) le32_to_cpu(rsqe->buffer_handle); 2170 vc->rx_iov = NULL;
2079 vpi = ns_rsqe_vpi(rsqe); 2171 recycle_iov_buf(card, iovb);
2080 vci = ns_rsqe_vci(rsqe); 2172 return;
2081 if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits) 2173 }
2082 { 2174
2083 printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n", 2175 /* By this point we (hopefully) have a complete SDU without errors. */
2084 card->index, vpi, vci); 2176
2085 recycle_rx_buf(card, skb); 2177 if (NS_PRV_IOVCNT(iovb) == 1) { /* Just a small buffer */
2086 return; 2178 /* skb points to a small buffer */
2087 } 2179 if (!atm_charge(vcc, skb->truesize)) {
2088 2180 push_rxbufs(card, skb);
2089 vc = &(card->vcmap[vpi << card->vcibits | vci]); 2181 atomic_inc(&vcc->stats->rx_drop);
2090 if (!vc->rx) 2182 } else {
2091 { 2183 skb_put(skb, len);
2092 RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n", 2184 dequeue_sm_buf(card, skb);
2093 card->index, vpi, vci);
2094 recycle_rx_buf(card, skb);
2095 return;
2096 }
2097
2098 vcc = vc->rx_vcc;
2099
2100 if (vcc->qos.aal == ATM_AAL0)
2101 {
2102 struct sk_buff *sb;
2103 unsigned char *cell;
2104 int i;
2105
2106 cell = skb->data;
2107 for (i = ns_rsqe_cellcount(rsqe); i; i--)
2108 {
2109 if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL)
2110 {
2111 printk("nicstar%d: Can't allocate buffers for aal0.\n",
2112 card->index);
2113 atomic_add(i,&vcc->stats->rx_drop);
2114 break;
2115 }
2116 if (!atm_charge(vcc, sb->truesize))
2117 {
2118 RXPRINTK("nicstar%d: atm_charge() dropped aal0 packets.\n",
2119 card->index);
2120 atomic_add(i-1,&vcc->stats->rx_drop); /* already increased by 1 */
2121 dev_kfree_skb_any(sb);
2122 break;
2123 }
2124 /* Rebuild the header */
2125 *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
2126 (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
2127 if (i == 1 && ns_rsqe_eopdu(rsqe))
2128 *((u32 *) sb->data) |= 0x00000002;
2129 skb_put(sb, NS_AAL0_HEADER);
2130 memcpy(skb_tail_pointer(sb), cell, ATM_CELL_PAYLOAD);
2131 skb_put(sb, ATM_CELL_PAYLOAD);
2132 ATM_SKB(sb)->vcc = vcc;
2133 __net_timestamp(sb);
2134 vcc->push(vcc, sb);
2135 atomic_inc(&vcc->stats->rx);
2136 cell += ATM_CELL_PAYLOAD;
2137 }
2138
2139 recycle_rx_buf(card, skb);
2140 return;
2141 }
2142
2143 /* To reach this point, the AAL layer can only be AAL5 */
2144
2145 if ((iovb = vc->rx_iov) == NULL)
2146 {
2147 iovb = skb_dequeue(&(card->iovpool.queue));
2148 if (iovb == NULL) /* No buffers in the queue */
2149 {
2150 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
2151 if (iovb == NULL)
2152 {
2153 printk("nicstar%d: Out of iovec buffers.\n", card->index);
2154 atomic_inc(&vcc->stats->rx_drop);
2155 recycle_rx_buf(card, skb);
2156 return;
2157 }
2158 NS_SKB_CB(iovb)->buf_type = BUF_NONE;
2159 }
2160 else
2161 if (--card->iovpool.count < card->iovnr.min)
2162 {
2163 struct sk_buff *new_iovb;
2164 if ((new_iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL)
2165 {
2166 NS_SKB_CB(iovb)->buf_type = BUF_NONE;
2167 skb_queue_tail(&card->iovpool.queue, new_iovb);
2168 card->iovpool.count++;
2169 }
2170 }
2171 vc->rx_iov = iovb;
2172 NS_SKB(iovb)->iovcnt = 0;
2173 iovb->len = 0;
2174 iovb->data = iovb->head;
2175 skb_reset_tail_pointer(iovb);
2176 NS_SKB(iovb)->vcc = vcc;
2177 /* IMPORTANT: a pointer to the sk_buff containing the small or large
2178 buffer is stored as iovec base, NOT a pointer to the
2179 small or large buffer itself. */
2180 }
2181 else if (NS_SKB(iovb)->iovcnt >= NS_MAX_IOVECS)
2182 {
2183 printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
2184 atomic_inc(&vcc->stats->rx_err);
2185 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, NS_MAX_IOVECS);
2186 NS_SKB(iovb)->iovcnt = 0;
2187 iovb->len = 0;
2188 iovb->data = iovb->head;
2189 skb_reset_tail_pointer(iovb);
2190 NS_SKB(iovb)->vcc = vcc;
2191 }
2192 iov = &((struct iovec *) iovb->data)[NS_SKB(iovb)->iovcnt++];
2193 iov->iov_base = (void *) skb;
2194 iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
2195 iovb->len += iov->iov_len;
2196
2197 if (NS_SKB(iovb)->iovcnt == 1)
2198 {
2199 if (NS_SKB_CB(skb)->buf_type != BUF_SM)
2200 {
2201 printk("nicstar%d: Expected a small buffer, and this is not one.\n",
2202 card->index);
2203 which_list(card, skb);
2204 atomic_inc(&vcc->stats->rx_err);
2205 recycle_rx_buf(card, skb);
2206 vc->rx_iov = NULL;
2207 recycle_iov_buf(card, iovb);
2208 return;
2209 }
2210 }
2211 else /* NS_SKB(iovb)->iovcnt >= 2 */
2212 {
2213 if (NS_SKB_CB(skb)->buf_type != BUF_LG)
2214 {
2215 printk("nicstar%d: Expected a large buffer, and this is not one.\n",
2216 card->index);
2217 which_list(card, skb);
2218 atomic_inc(&vcc->stats->rx_err);
2219 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2220 NS_SKB(iovb)->iovcnt);
2221 vc->rx_iov = NULL;
2222 recycle_iov_buf(card, iovb);
2223 return;
2224 }
2225 }
2226
2227 if (ns_rsqe_eopdu(rsqe))
2228 {
2229 /* This works correctly regardless of the endianness of the host */
2230 unsigned char *L1L2 = (unsigned char *)((u32)skb->data +
2231 iov->iov_len - 6);
2232 aal5_len = L1L2[0] << 8 | L1L2[1];
2233 len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
2234 if (ns_rsqe_crcerr(rsqe) ||
2235 len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2236 {
2237 printk("nicstar%d: AAL5 CRC error", card->index);
2238 if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2239 printk(" - PDU size mismatch.\n");
2240 else
2241 printk(".\n");
2242 atomic_inc(&vcc->stats->rx_err);
2243 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2244 NS_SKB(iovb)->iovcnt);
2245 vc->rx_iov = NULL;
2246 recycle_iov_buf(card, iovb);
2247 return;
2248 }
2249
2250 /* By this point we (hopefully) have a complete SDU without errors. */
2251
2252 if (NS_SKB(iovb)->iovcnt == 1) /* Just a small buffer */
2253 {
2254 /* skb points to a small buffer */
2255 if (!atm_charge(vcc, skb->truesize))
2256 {
2257 push_rxbufs(card, skb);
2258 atomic_inc(&vcc->stats->rx_drop);
2259 }
2260 else
2261 {
2262 skb_put(skb, len);
2263 dequeue_sm_buf(card, skb);
2264#ifdef NS_USE_DESTRUCTORS 2185#ifdef NS_USE_DESTRUCTORS
2265 skb->destructor = ns_sb_destructor; 2186 skb->destructor = ns_sb_destructor;
2266#endif /* NS_USE_DESTRUCTORS */ 2187#endif /* NS_USE_DESTRUCTORS */
2267 ATM_SKB(skb)->vcc = vcc; 2188 ATM_SKB(skb)->vcc = vcc;
2268 __net_timestamp(skb); 2189 __net_timestamp(skb);
2269 vcc->push(vcc, skb); 2190 vcc->push(vcc, skb);
2270 atomic_inc(&vcc->stats->rx); 2191 atomic_inc(&vcc->stats->rx);
2271 } 2192 }
2272 } 2193 } else if (NS_PRV_IOVCNT(iovb) == 2) { /* One small plus one large buffer */
2273 else if (NS_SKB(iovb)->iovcnt == 2) /* One small plus one large buffer */ 2194 struct sk_buff *sb;
2274 { 2195
2275 struct sk_buff *sb; 2196 sb = (struct sk_buff *)(iov - 1)->iov_base;
2276 2197 /* skb points to a large buffer */
2277 sb = (struct sk_buff *) (iov - 1)->iov_base; 2198
2278 /* skb points to a large buffer */ 2199 if (len <= NS_SMBUFSIZE) {
2279 2200 if (!atm_charge(vcc, sb->truesize)) {
2280 if (len <= NS_SMBUFSIZE) 2201 push_rxbufs(card, sb);
2281 { 2202 atomic_inc(&vcc->stats->rx_drop);
2282 if (!atm_charge(vcc, sb->truesize)) 2203 } else {
2283 { 2204 skb_put(sb, len);
2284 push_rxbufs(card, sb); 2205 dequeue_sm_buf(card, sb);
2285 atomic_inc(&vcc->stats->rx_drop);
2286 }
2287 else
2288 {
2289 skb_put(sb, len);
2290 dequeue_sm_buf(card, sb);
2291#ifdef NS_USE_DESTRUCTORS 2206#ifdef NS_USE_DESTRUCTORS
2292 sb->destructor = ns_sb_destructor; 2207 sb->destructor = ns_sb_destructor;
2293#endif /* NS_USE_DESTRUCTORS */ 2208#endif /* NS_USE_DESTRUCTORS */
2294 ATM_SKB(sb)->vcc = vcc; 2209 ATM_SKB(sb)->vcc = vcc;
2295 __net_timestamp(sb); 2210 __net_timestamp(sb);
2296 vcc->push(vcc, sb); 2211 vcc->push(vcc, sb);
2297 atomic_inc(&vcc->stats->rx); 2212 atomic_inc(&vcc->stats->rx);
2298 } 2213 }
2299 2214
2300 push_rxbufs(card, skb); 2215 push_rxbufs(card, skb);
2301 2216
2302 } 2217 } else { /* len > NS_SMBUFSIZE, the usual case */
2303 else /* len > NS_SMBUFSIZE, the usual case */ 2218
2304 { 2219 if (!atm_charge(vcc, skb->truesize)) {
2305 if (!atm_charge(vcc, skb->truesize)) 2220 push_rxbufs(card, skb);
2306 { 2221 atomic_inc(&vcc->stats->rx_drop);
2307 push_rxbufs(card, skb); 2222 } else {
2308 atomic_inc(&vcc->stats->rx_drop); 2223 dequeue_lg_buf(card, skb);
2309 }
2310 else
2311 {
2312 dequeue_lg_buf(card, skb);
2313#ifdef NS_USE_DESTRUCTORS 2224#ifdef NS_USE_DESTRUCTORS
2314 skb->destructor = ns_lb_destructor; 2225 skb->destructor = ns_lb_destructor;
2315#endif /* NS_USE_DESTRUCTORS */ 2226#endif /* NS_USE_DESTRUCTORS */
2316 skb_push(skb, NS_SMBUFSIZE); 2227 skb_push(skb, NS_SMBUFSIZE);
2317 skb_copy_from_linear_data(sb, skb->data, NS_SMBUFSIZE); 2228 skb_copy_from_linear_data(sb, skb->data,
2318 skb_put(skb, len - NS_SMBUFSIZE); 2229 NS_SMBUFSIZE);
2319 ATM_SKB(skb)->vcc = vcc; 2230 skb_put(skb, len - NS_SMBUFSIZE);
2320 __net_timestamp(skb); 2231 ATM_SKB(skb)->vcc = vcc;
2321 vcc->push(vcc, skb); 2232 __net_timestamp(skb);
2322 atomic_inc(&vcc->stats->rx); 2233 vcc->push(vcc, skb);
2323 } 2234 atomic_inc(&vcc->stats->rx);
2324 2235 }
2325 push_rxbufs(card, sb); 2236
2326 2237 push_rxbufs(card, sb);
2327 } 2238
2328 2239 }
2329 } 2240
2330 else /* Must push a huge buffer */ 2241 } else { /* Must push a huge buffer */
2331 { 2242
2332 struct sk_buff *hb, *sb, *lb; 2243 struct sk_buff *hb, *sb, *lb;
2333 int remaining, tocopy; 2244 int remaining, tocopy;
2334 int j; 2245 int j;
2335 2246
2336 hb = skb_dequeue(&(card->hbpool.queue)); 2247 hb = skb_dequeue(&(card->hbpool.queue));
2337 if (hb == NULL) /* No buffers in the queue */ 2248 if (hb == NULL) { /* No buffers in the queue */
2338 { 2249
2339 2250 hb = dev_alloc_skb(NS_HBUFSIZE);
2340 hb = dev_alloc_skb(NS_HBUFSIZE); 2251 if (hb == NULL) {
2341 if (hb == NULL) 2252 printk
2342 { 2253 ("nicstar%d: Out of huge buffers.\n",
2343 printk("nicstar%d: Out of huge buffers.\n", card->index); 2254 card->index);
2344 atomic_inc(&vcc->stats->rx_drop); 2255 atomic_inc(&vcc->stats->rx_drop);
2345 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, 2256 recycle_iovec_rx_bufs(card,
2346 NS_SKB(iovb)->iovcnt); 2257 (struct iovec *)
2347 vc->rx_iov = NULL; 2258 iovb->data,
2348 recycle_iov_buf(card, iovb); 2259 NS_PRV_IOVCNT(iovb));
2349 return; 2260 vc->rx_iov = NULL;
2350 } 2261 recycle_iov_buf(card, iovb);
2351 else if (card->hbpool.count < card->hbnr.min) 2262 return;
2352 { 2263 } else if (card->hbpool.count < card->hbnr.min) {
2353 struct sk_buff *new_hb; 2264 struct sk_buff *new_hb;
2354 if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL) 2265 if ((new_hb =
2355 { 2266 dev_alloc_skb(NS_HBUFSIZE)) !=
2356 skb_queue_tail(&card->hbpool.queue, new_hb); 2267 NULL) {
2357 card->hbpool.count++; 2268 skb_queue_tail(&card->hbpool.
2358 } 2269 queue, new_hb);
2359 } 2270 card->hbpool.count++;
2360 NS_SKB_CB(hb)->buf_type = BUF_NONE; 2271 }
2361 } 2272 }
2362 else 2273 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2363 if (--card->hbpool.count < card->hbnr.min) 2274 } else if (--card->hbpool.count < card->hbnr.min) {
2364 { 2275 struct sk_buff *new_hb;
2365 struct sk_buff *new_hb; 2276 if ((new_hb =
2366 if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL) 2277 dev_alloc_skb(NS_HBUFSIZE)) != NULL) {
2367 { 2278 NS_PRV_BUFTYPE(new_hb) = BUF_NONE;
2368 NS_SKB_CB(new_hb)->buf_type = BUF_NONE; 2279 skb_queue_tail(&card->hbpool.queue,
2369 skb_queue_tail(&card->hbpool.queue, new_hb); 2280 new_hb);
2370 card->hbpool.count++; 2281 card->hbpool.count++;
2371 } 2282 }
2372 if (card->hbpool.count < card->hbnr.min) 2283 if (card->hbpool.count < card->hbnr.min) {
2373 { 2284 if ((new_hb =
2374 if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL) 2285 dev_alloc_skb(NS_HBUFSIZE)) !=
2375 { 2286 NULL) {
2376 NS_SKB_CB(new_hb)->buf_type = BUF_NONE; 2287 NS_PRV_BUFTYPE(new_hb) =
2377 skb_queue_tail(&card->hbpool.queue, new_hb); 2288 BUF_NONE;
2378 card->hbpool.count++; 2289 skb_queue_tail(&card->hbpool.
2379 } 2290 queue, new_hb);
2380 } 2291 card->hbpool.count++;
2381 } 2292 }
2382 2293 }
2383 iov = (struct iovec *) iovb->data; 2294 }
2384 2295
2385 if (!atm_charge(vcc, hb->truesize)) 2296 iov = (struct iovec *)iovb->data;
2386 { 2297
2387 recycle_iovec_rx_bufs(card, iov, NS_SKB(iovb)->iovcnt); 2298 if (!atm_charge(vcc, hb->truesize)) {
2388 if (card->hbpool.count < card->hbnr.max) 2299 recycle_iovec_rx_bufs(card, iov,
2389 { 2300 NS_PRV_IOVCNT(iovb));
2390 skb_queue_tail(&card->hbpool.queue, hb); 2301 if (card->hbpool.count < card->hbnr.max) {
2391 card->hbpool.count++; 2302 skb_queue_tail(&card->hbpool.queue, hb);
2392 } 2303 card->hbpool.count++;
2393 else 2304 } else
2394 dev_kfree_skb_any(hb); 2305 dev_kfree_skb_any(hb);
2395 atomic_inc(&vcc->stats->rx_drop); 2306 atomic_inc(&vcc->stats->rx_drop);
2396 } 2307 } else {
2397 else 2308 /* Copy the small buffer to the huge buffer */
2398 { 2309 sb = (struct sk_buff *)iov->iov_base;
2399 /* Copy the small buffer to the huge buffer */ 2310 skb_copy_from_linear_data(sb, hb->data,
2400 sb = (struct sk_buff *) iov->iov_base; 2311 iov->iov_len);
2401 skb_copy_from_linear_data(sb, hb->data, iov->iov_len); 2312 skb_put(hb, iov->iov_len);
2402 skb_put(hb, iov->iov_len); 2313 remaining = len - iov->iov_len;
2403 remaining = len - iov->iov_len; 2314 iov++;
2404 iov++; 2315 /* Free the small buffer */
2405 /* Free the small buffer */ 2316 push_rxbufs(card, sb);
2406 push_rxbufs(card, sb); 2317
2407 2318 /* Copy all large buffers to the huge buffer and free them */
2408 /* Copy all large buffers to the huge buffer and free them */ 2319 for (j = 1; j < NS_PRV_IOVCNT(iovb); j++) {
2409 for (j = 1; j < NS_SKB(iovb)->iovcnt; j++) 2320 lb = (struct sk_buff *)iov->iov_base;
2410 { 2321 tocopy =
2411 lb = (struct sk_buff *) iov->iov_base; 2322 min_t(int, remaining, iov->iov_len);
2412 tocopy = min_t(int, remaining, iov->iov_len); 2323 skb_copy_from_linear_data(lb,
2413 skb_copy_from_linear_data(lb, skb_tail_pointer(hb), tocopy); 2324 skb_tail_pointer
2414 skb_put(hb, tocopy); 2325 (hb), tocopy);
2415 iov++; 2326 skb_put(hb, tocopy);
2416 remaining -= tocopy; 2327 iov++;
2417 push_rxbufs(card, lb); 2328 remaining -= tocopy;
2418 } 2329 push_rxbufs(card, lb);
2330 }
2419#ifdef EXTRA_DEBUG 2331#ifdef EXTRA_DEBUG
2420 if (remaining != 0 || hb->len != len) 2332 if (remaining != 0 || hb->len != len)
2421 printk("nicstar%d: Huge buffer len mismatch.\n", card->index); 2333 printk
2334 ("nicstar%d: Huge buffer len mismatch.\n",
2335 card->index);
2422#endif /* EXTRA_DEBUG */ 2336#endif /* EXTRA_DEBUG */
2423 ATM_SKB(hb)->vcc = vcc; 2337 ATM_SKB(hb)->vcc = vcc;
2424#ifdef NS_USE_DESTRUCTORS 2338#ifdef NS_USE_DESTRUCTORS
2425 hb->destructor = ns_hb_destructor; 2339 hb->destructor = ns_hb_destructor;
2426#endif /* NS_USE_DESTRUCTORS */ 2340#endif /* NS_USE_DESTRUCTORS */
2427 __net_timestamp(hb); 2341 __net_timestamp(hb);
2428 vcc->push(vcc, hb); 2342 vcc->push(vcc, hb);
2429 atomic_inc(&vcc->stats->rx); 2343 atomic_inc(&vcc->stats->rx);
2430 } 2344 }
2431 } 2345 }
2432 2346
2433 vc->rx_iov = NULL; 2347 vc->rx_iov = NULL;
2434 recycle_iov_buf(card, iovb); 2348 recycle_iov_buf(card, iovb);
2435 } 2349 }
2436 2350
2437} 2351}
2438 2352
2439
2440
2441#ifdef NS_USE_DESTRUCTORS 2353#ifdef NS_USE_DESTRUCTORS
2442 2354
2443static void ns_sb_destructor(struct sk_buff *sb) 2355static void ns_sb_destructor(struct sk_buff *sb)
2444{ 2356{
2445 ns_dev *card; 2357 ns_dev *card;
2446 u32 stat; 2358 u32 stat;
2447 2359
2448 card = (ns_dev *) ATM_SKB(sb)->vcc->dev->dev_data; 2360 card = (ns_dev *) ATM_SKB(sb)->vcc->dev->dev_data;
2449 stat = readl(card->membase + STAT); 2361 stat = readl(card->membase + STAT);
2450 card->sbfqc = ns_stat_sfbqc_get(stat); 2362 card->sbfqc = ns_stat_sfbqc_get(stat);
2451 card->lbfqc = ns_stat_lfbqc_get(stat); 2363 card->lbfqc = ns_stat_lfbqc_get(stat);
2452 2364
2453 do 2365 do {
2454 { 2366 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2455 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL); 2367 if (sb == NULL)
2456 if (sb == NULL) 2368 break;
2457 break; 2369 NS_PRV_BUFTYPE(sb) = BUF_SM;
2458 NS_SKB_CB(sb)->buf_type = BUF_SM; 2370 skb_queue_tail(&card->sbpool.queue, sb);
2459 skb_queue_tail(&card->sbpool.queue, sb); 2371 skb_reserve(sb, NS_AAL0_HEADER);
2460 skb_reserve(sb, NS_AAL0_HEADER); 2372 push_rxbufs(card, sb);
2461 push_rxbufs(card, sb); 2373 } while (card->sbfqc < card->sbnr.min);
2462 } while (card->sbfqc < card->sbnr.min);
2463} 2374}
2464 2375
2465
2466
2467static void ns_lb_destructor(struct sk_buff *lb) 2376static void ns_lb_destructor(struct sk_buff *lb)
2468{ 2377{
2469 ns_dev *card; 2378 ns_dev *card;
2470 u32 stat; 2379 u32 stat;
2471 2380
2472 card = (ns_dev *) ATM_SKB(lb)->vcc->dev->dev_data; 2381 card = (ns_dev *) ATM_SKB(lb)->vcc->dev->dev_data;
2473 stat = readl(card->membase + STAT); 2382 stat = readl(card->membase + STAT);
2474 card->sbfqc = ns_stat_sfbqc_get(stat); 2383 card->sbfqc = ns_stat_sfbqc_get(stat);
2475 card->lbfqc = ns_stat_lfbqc_get(stat); 2384 card->lbfqc = ns_stat_lfbqc_get(stat);
2476 2385
2477 do 2386 do {
2478 { 2387 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2479 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL); 2388 if (lb == NULL)
2480 if (lb == NULL) 2389 break;
2481 break; 2390 NS_PRV_BUFTYPE(lb) = BUF_LG;
2482 NS_SKB_CB(lb)->buf_type = BUF_LG; 2391 skb_queue_tail(&card->lbpool.queue, lb);
2483 skb_queue_tail(&card->lbpool.queue, lb); 2392 skb_reserve(lb, NS_SMBUFSIZE);
2484 skb_reserve(lb, NS_SMBUFSIZE); 2393 push_rxbufs(card, lb);
2485 push_rxbufs(card, lb); 2394 } while (card->lbfqc < card->lbnr.min);
2486 } while (card->lbfqc < card->lbnr.min);
2487} 2395}
2488 2396
2489
2490
2491static void ns_hb_destructor(struct sk_buff *hb) 2397static void ns_hb_destructor(struct sk_buff *hb)
2492{ 2398{
2493 ns_dev *card; 2399 ns_dev *card;
2494 2400
2495 card = (ns_dev *) ATM_SKB(hb)->vcc->dev->dev_data; 2401 card = (ns_dev *) ATM_SKB(hb)->vcc->dev->dev_data;
2496 2402
2497 while (card->hbpool.count < card->hbnr.init) 2403 while (card->hbpool.count < card->hbnr.init) {
2498 { 2404 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2499 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL); 2405 if (hb == NULL)
2500 if (hb == NULL) 2406 break;
2501 break; 2407 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2502 NS_SKB_CB(hb)->buf_type = BUF_NONE; 2408 skb_queue_tail(&card->hbpool.queue, hb);
2503 skb_queue_tail(&card->hbpool.queue, hb); 2409 card->hbpool.count++;
2504 card->hbpool.count++; 2410 }
2505 }
2506} 2411}
2507 2412
2508#endif /* NS_USE_DESTRUCTORS */ 2413#endif /* NS_USE_DESTRUCTORS */
2509 2414
2510 2415static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb)
2511static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb)
2512{ 2416{
2513 struct ns_skb_cb *cb = NS_SKB_CB(skb); 2417 if (unlikely(NS_PRV_BUFTYPE(skb) == BUF_NONE)) {
2514 2418 printk("nicstar%d: What kind of rx buffer is this?\n",
2515 if (unlikely(cb->buf_type == BUF_NONE)) { 2419 card->index);
2516 printk("nicstar%d: What kind of rx buffer is this?\n", card->index);
2517 dev_kfree_skb_any(skb); 2420 dev_kfree_skb_any(skb);
2518 } else 2421 } else
2519 push_rxbufs(card, skb); 2422 push_rxbufs(card, skb);
2520} 2423}
2521 2424
2522 2425static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count)
2523static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count)
2524{ 2426{
2525 while (count-- > 0) 2427 while (count-- > 0)
2526 recycle_rx_buf(card, (struct sk_buff *) (iov++)->iov_base); 2428 recycle_rx_buf(card, (struct sk_buff *)(iov++)->iov_base);
2527} 2429}
2528 2430
2529 2431static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb)
2530static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb)
2531{ 2432{
2532 if (card->iovpool.count < card->iovnr.max) 2433 if (card->iovpool.count < card->iovnr.max) {
2533 { 2434 skb_queue_tail(&card->iovpool.queue, iovb);
2534 skb_queue_tail(&card->iovpool.queue, iovb); 2435 card->iovpool.count++;
2535 card->iovpool.count++; 2436 } else
2536 } 2437 dev_kfree_skb_any(iovb);
2537 else
2538 dev_kfree_skb_any(iovb);
2539} 2438}
2540 2439
2541 2440static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb)
2542
2543static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb)
2544{ 2441{
2545 skb_unlink(sb, &card->sbpool.queue); 2442 skb_unlink(sb, &card->sbpool.queue);
2546#ifdef NS_USE_DESTRUCTORS 2443#ifdef NS_USE_DESTRUCTORS
2547 if (card->sbfqc < card->sbnr.min) 2444 if (card->sbfqc < card->sbnr.min)
2548#else 2445#else
2549 if (card->sbfqc < card->sbnr.init) 2446 if (card->sbfqc < card->sbnr.init) {
2550 { 2447 struct sk_buff *new_sb;
2551 struct sk_buff *new_sb; 2448 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
2552 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) 2449 NS_PRV_BUFTYPE(new_sb) = BUF_SM;
2553 { 2450 skb_queue_tail(&card->sbpool.queue, new_sb);
2554 NS_SKB_CB(new_sb)->buf_type = BUF_SM; 2451 skb_reserve(new_sb, NS_AAL0_HEADER);
2555 skb_queue_tail(&card->sbpool.queue, new_sb); 2452 push_rxbufs(card, new_sb);
2556 skb_reserve(new_sb, NS_AAL0_HEADER); 2453 }
2557 push_rxbufs(card, new_sb); 2454 }
2558 } 2455 if (card->sbfqc < card->sbnr.init)
2559 }
2560 if (card->sbfqc < card->sbnr.init)
2561#endif /* NS_USE_DESTRUCTORS */ 2456#endif /* NS_USE_DESTRUCTORS */
2562 { 2457 {
2563 struct sk_buff *new_sb; 2458 struct sk_buff *new_sb;
2564 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) 2459 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
2565 { 2460 NS_PRV_BUFTYPE(new_sb) = BUF_SM;
2566 NS_SKB_CB(new_sb)->buf_type = BUF_SM; 2461 skb_queue_tail(&card->sbpool.queue, new_sb);
2567 skb_queue_tail(&card->sbpool.queue, new_sb); 2462 skb_reserve(new_sb, NS_AAL0_HEADER);
2568 skb_reserve(new_sb, NS_AAL0_HEADER); 2463 push_rxbufs(card, new_sb);
2569 push_rxbufs(card, new_sb); 2464 }
2570 } 2465 }
2571 }
2572} 2466}
2573 2467
2574 2468static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb)
2575
2576static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb)
2577{ 2469{
2578 skb_unlink(lb, &card->lbpool.queue); 2470 skb_unlink(lb, &card->lbpool.queue);
2579#ifdef NS_USE_DESTRUCTORS 2471#ifdef NS_USE_DESTRUCTORS
2580 if (card->lbfqc < card->lbnr.min) 2472 if (card->lbfqc < card->lbnr.min)
2581#else 2473#else
2582 if (card->lbfqc < card->lbnr.init) 2474 if (card->lbfqc < card->lbnr.init) {
2583 { 2475 struct sk_buff *new_lb;
2584 struct sk_buff *new_lb; 2476 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
2585 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) 2477 NS_PRV_BUFTYPE(new_lb) = BUF_LG;
2586 { 2478 skb_queue_tail(&card->lbpool.queue, new_lb);
2587 NS_SKB_CB(new_lb)->buf_type = BUF_LG; 2479 skb_reserve(new_lb, NS_SMBUFSIZE);
2588 skb_queue_tail(&card->lbpool.queue, new_lb); 2480 push_rxbufs(card, new_lb);
2589 skb_reserve(new_lb, NS_SMBUFSIZE); 2481 }
2590 push_rxbufs(card, new_lb); 2482 }
2591 } 2483 if (card->lbfqc < card->lbnr.init)
2592 }
2593 if (card->lbfqc < card->lbnr.init)
2594#endif /* NS_USE_DESTRUCTORS */ 2484#endif /* NS_USE_DESTRUCTORS */
2595 { 2485 {
2596 struct sk_buff *new_lb; 2486 struct sk_buff *new_lb;
2597 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) 2487 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
2598 { 2488 NS_PRV_BUFTYPE(new_lb) = BUF_LG;
2599 NS_SKB_CB(new_lb)->buf_type = BUF_LG; 2489 skb_queue_tail(&card->lbpool.queue, new_lb);
2600 skb_queue_tail(&card->lbpool.queue, new_lb); 2490 skb_reserve(new_lb, NS_SMBUFSIZE);
2601 skb_reserve(new_lb, NS_SMBUFSIZE); 2491 push_rxbufs(card, new_lb);
2602 push_rxbufs(card, new_lb); 2492 }
2603 } 2493 }
2604 }
2605} 2494}
2606 2495
2607 2496static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page)
2608
2609static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page)
2610{ 2497{
2611 u32 stat; 2498 u32 stat;
2612 ns_dev *card; 2499 ns_dev *card;
2613 int left; 2500 int left;
2614 2501
2615 left = (int) *pos; 2502 left = (int)*pos;
2616 card = (ns_dev *) dev->dev_data; 2503 card = (ns_dev *) dev->dev_data;
2617 stat = readl(card->membase + STAT); 2504 stat = readl(card->membase + STAT);
2618 if (!left--) 2505 if (!left--)
2619 return sprintf(page, "Pool count min init max \n"); 2506 return sprintf(page, "Pool count min init max \n");
2620 if (!left--) 2507 if (!left--)
2621 return sprintf(page, "Small %5d %5d %5d %5d \n", 2508 return sprintf(page, "Small %5d %5d %5d %5d \n",
2622 ns_stat_sfbqc_get(stat), card->sbnr.min, card->sbnr.init, 2509 ns_stat_sfbqc_get(stat), card->sbnr.min,
2623 card->sbnr.max); 2510 card->sbnr.init, card->sbnr.max);
2624 if (!left--) 2511 if (!left--)
2625 return sprintf(page, "Large %5d %5d %5d %5d \n", 2512 return sprintf(page, "Large %5d %5d %5d %5d \n",
2626 ns_stat_lfbqc_get(stat), card->lbnr.min, card->lbnr.init, 2513 ns_stat_lfbqc_get(stat), card->lbnr.min,
2627 card->lbnr.max); 2514 card->lbnr.init, card->lbnr.max);
2628 if (!left--) 2515 if (!left--)
2629 return sprintf(page, "Huge %5d %5d %5d %5d \n", card->hbpool.count, 2516 return sprintf(page, "Huge %5d %5d %5d %5d \n",
2630 card->hbnr.min, card->hbnr.init, card->hbnr.max); 2517 card->hbpool.count, card->hbnr.min,
2631 if (!left--) 2518 card->hbnr.init, card->hbnr.max);
2632 return sprintf(page, "Iovec %5d %5d %5d %5d \n", card->iovpool.count, 2519 if (!left--)
2633 card->iovnr.min, card->iovnr.init, card->iovnr.max); 2520 return sprintf(page, "Iovec %5d %5d %5d %5d \n",
2634 if (!left--) 2521 card->iovpool.count, card->iovnr.min,
2635 { 2522 card->iovnr.init, card->iovnr.max);
2636 int retval; 2523 if (!left--) {
2637 retval = sprintf(page, "Interrupt counter: %u \n", card->intcnt); 2524 int retval;
2638 card->intcnt = 0; 2525 retval =
2639 return retval; 2526 sprintf(page, "Interrupt counter: %u \n", card->intcnt);
2640 } 2527 card->intcnt = 0;
2528 return retval;
2529 }
2641#if 0 2530#if 0
2642 /* Dump 25.6 Mbps PHY registers */ 2531 /* Dump 25.6 Mbps PHY registers */
2643 /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it 2532 /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
2644 here just in case it's needed for debugging. */ 2533 here just in case it's needed for debugging. */
2645 if (card->max_pcr == ATM_25_PCR && !left--) 2534 if (card->max_pcr == ATM_25_PCR && !left--) {
2646 { 2535 u32 phy_regs[4];
2647 u32 phy_regs[4]; 2536 u32 i;
2648 u32 i; 2537
2649 2538 for (i = 0; i < 4; i++) {
2650 for (i = 0; i < 4; i++) 2539 while (CMD_BUSY(card)) ;
2651 { 2540 writel(NS_CMD_READ_UTILITY | 0x00000200 | i,
2652 while (CMD_BUSY(card)); 2541 card->membase + CMD);
2653 writel(NS_CMD_READ_UTILITY | 0x00000200 | i, card->membase + CMD); 2542 while (CMD_BUSY(card)) ;
2654 while (CMD_BUSY(card)); 2543 phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
2655 phy_regs[i] = readl(card->membase + DR0) & 0x000000FF; 2544 }
2656 } 2545
2657 2546 return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
2658 return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n", 2547 phy_regs[0], phy_regs[1], phy_regs[2],
2659 phy_regs[0], phy_regs[1], phy_regs[2], phy_regs[3]); 2548 phy_regs[3]);
2660 } 2549 }
2661#endif /* 0 - Dump 25.6 Mbps PHY registers */ 2550#endif /* 0 - Dump 25.6 Mbps PHY registers */
2662#if 0 2551#if 0
2663 /* Dump TST */ 2552 /* Dump TST */
2664 if (left-- < NS_TST_NUM_ENTRIES) 2553 if (left-- < NS_TST_NUM_ENTRIES) {
2665 { 2554 if (card->tste2vc[left + 1] == NULL)
2666 if (card->tste2vc[left + 1] == NULL) 2555 return sprintf(page, "%5d - VBR/UBR \n", left + 1);
2667 return sprintf(page, "%5d - VBR/UBR \n", left + 1); 2556 else
2668 else 2557 return sprintf(page, "%5d - %d %d \n", left + 1,
2669 return sprintf(page, "%5d - %d %d \n", left + 1, 2558 card->tste2vc[left + 1]->tx_vcc->vpi,
2670 card->tste2vc[left + 1]->tx_vcc->vpi, 2559 card->tste2vc[left + 1]->tx_vcc->vci);
2671 card->tste2vc[left + 1]->tx_vcc->vci); 2560 }
2672 }
2673#endif /* 0 */ 2561#endif /* 0 */
2674 return 0; 2562 return 0;
2675} 2563}
2676 2564
2677 2565static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg)
2678
2679static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
2680{ 2566{
2681 ns_dev *card; 2567 ns_dev *card;
2682 pool_levels pl; 2568 pool_levels pl;
2683 long btype; 2569 long btype;
2684 unsigned long flags; 2570 unsigned long flags;
2685 2571
2686 card = dev->dev_data; 2572 card = dev->dev_data;
2687 switch (cmd) 2573 switch (cmd) {
2688 { 2574 case NS_GETPSTAT:
2689 case NS_GETPSTAT: 2575 if (get_user
2690 if (get_user(pl.buftype, &((pool_levels __user *) arg)->buftype)) 2576 (pl.buftype, &((pool_levels __user *) arg)->buftype))
2691 return -EFAULT; 2577 return -EFAULT;
2692 switch (pl.buftype) 2578 switch (pl.buftype) {
2693 { 2579 case NS_BUFTYPE_SMALL:
2694 case NS_BUFTYPE_SMALL: 2580 pl.count =
2695 pl.count = ns_stat_sfbqc_get(readl(card->membase + STAT)); 2581 ns_stat_sfbqc_get(readl(card->membase + STAT));
2696 pl.level.min = card->sbnr.min; 2582 pl.level.min = card->sbnr.min;
2697 pl.level.init = card->sbnr.init; 2583 pl.level.init = card->sbnr.init;
2698 pl.level.max = card->sbnr.max; 2584 pl.level.max = card->sbnr.max;
2699 break; 2585 break;
2700 2586
2701 case NS_BUFTYPE_LARGE: 2587 case NS_BUFTYPE_LARGE:
2702 pl.count = ns_stat_lfbqc_get(readl(card->membase + STAT)); 2588 pl.count =
2703 pl.level.min = card->lbnr.min; 2589 ns_stat_lfbqc_get(readl(card->membase + STAT));
2704 pl.level.init = card->lbnr.init; 2590 pl.level.min = card->lbnr.min;
2705 pl.level.max = card->lbnr.max; 2591 pl.level.init = card->lbnr.init;
2706 break; 2592 pl.level.max = card->lbnr.max;
2707 2593 break;
2708 case NS_BUFTYPE_HUGE: 2594
2709 pl.count = card->hbpool.count; 2595 case NS_BUFTYPE_HUGE:
2710 pl.level.min = card->hbnr.min; 2596 pl.count = card->hbpool.count;
2711 pl.level.init = card->hbnr.init; 2597 pl.level.min = card->hbnr.min;
2712 pl.level.max = card->hbnr.max; 2598 pl.level.init = card->hbnr.init;
2713 break; 2599 pl.level.max = card->hbnr.max;
2714 2600 break;
2715 case NS_BUFTYPE_IOVEC: 2601
2716 pl.count = card->iovpool.count; 2602 case NS_BUFTYPE_IOVEC:
2717 pl.level.min = card->iovnr.min; 2603 pl.count = card->iovpool.count;
2718 pl.level.init = card->iovnr.init; 2604 pl.level.min = card->iovnr.min;
2719 pl.level.max = card->iovnr.max; 2605 pl.level.init = card->iovnr.init;
2720 break; 2606 pl.level.max = card->iovnr.max;
2721 2607 break;
2722 default: 2608
2723 return -ENOIOCTLCMD; 2609 default:
2724 2610 return -ENOIOCTLCMD;
2725 } 2611
2726 if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl))) 2612 }
2727 return (sizeof(pl)); 2613 if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
2728 else 2614 return (sizeof(pl));
2729 return -EFAULT; 2615 else
2730 2616 return -EFAULT;
2731 case NS_SETBUFLEV: 2617
2732 if (!capable(CAP_NET_ADMIN)) 2618 case NS_SETBUFLEV:
2733 return -EPERM; 2619 if (!capable(CAP_NET_ADMIN))
2734 if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl))) 2620 return -EPERM;
2735 return -EFAULT; 2621 if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
2736 if (pl.level.min >= pl.level.init || pl.level.init >= pl.level.max) 2622 return -EFAULT;
2737 return -EINVAL; 2623 if (pl.level.min >= pl.level.init
2738 if (pl.level.min == 0) 2624 || pl.level.init >= pl.level.max)
2739 return -EINVAL; 2625 return -EINVAL;
2740 switch (pl.buftype) 2626 if (pl.level.min == 0)
2741 { 2627 return -EINVAL;
2742 case NS_BUFTYPE_SMALL: 2628 switch (pl.buftype) {
2743 if (pl.level.max > TOP_SB) 2629 case NS_BUFTYPE_SMALL:
2744 return -EINVAL; 2630 if (pl.level.max > TOP_SB)
2745 card->sbnr.min = pl.level.min; 2631 return -EINVAL;
2746 card->sbnr.init = pl.level.init; 2632 card->sbnr.min = pl.level.min;
2747 card->sbnr.max = pl.level.max; 2633 card->sbnr.init = pl.level.init;
2748 break; 2634 card->sbnr.max = pl.level.max;
2749 2635 break;
2750 case NS_BUFTYPE_LARGE: 2636
2751 if (pl.level.max > TOP_LB) 2637 case NS_BUFTYPE_LARGE:
2752 return -EINVAL; 2638 if (pl.level.max > TOP_LB)
2753 card->lbnr.min = pl.level.min; 2639 return -EINVAL;
2754 card->lbnr.init = pl.level.init; 2640 card->lbnr.min = pl.level.min;
2755 card->lbnr.max = pl.level.max; 2641 card->lbnr.init = pl.level.init;
2756 break; 2642 card->lbnr.max = pl.level.max;
2757 2643 break;
2758 case NS_BUFTYPE_HUGE: 2644
2759 if (pl.level.max > TOP_HB) 2645 case NS_BUFTYPE_HUGE:
2760 return -EINVAL; 2646 if (pl.level.max > TOP_HB)
2761 card->hbnr.min = pl.level.min; 2647 return -EINVAL;
2762 card->hbnr.init = pl.level.init; 2648 card->hbnr.min = pl.level.min;
2763 card->hbnr.max = pl.level.max; 2649 card->hbnr.init = pl.level.init;
2764 break; 2650 card->hbnr.max = pl.level.max;
2765 2651 break;
2766 case NS_BUFTYPE_IOVEC: 2652
2767 if (pl.level.max > TOP_IOVB) 2653 case NS_BUFTYPE_IOVEC:
2768 return -EINVAL; 2654 if (pl.level.max > TOP_IOVB)
2769 card->iovnr.min = pl.level.min; 2655 return -EINVAL;
2770 card->iovnr.init = pl.level.init; 2656 card->iovnr.min = pl.level.min;
2771 card->iovnr.max = pl.level.max; 2657 card->iovnr.init = pl.level.init;
2772 break; 2658 card->iovnr.max = pl.level.max;
2773 2659 break;
2774 default: 2660
2775 return -EINVAL; 2661 default:
2776 2662 return -EINVAL;
2777 } 2663
2778 return 0; 2664 }
2779 2665 return 0;
2780 case NS_ADJBUFLEV: 2666
2781 if (!capable(CAP_NET_ADMIN)) 2667 case NS_ADJBUFLEV:
2782 return -EPERM; 2668 if (!capable(CAP_NET_ADMIN))
2783 btype = (long) arg; /* a long is the same size as a pointer or bigger */ 2669 return -EPERM;
2784 switch (btype) 2670 btype = (long)arg; /* a long is the same size as a pointer or bigger */
2785 { 2671 switch (btype) {
2786 case NS_BUFTYPE_SMALL: 2672 case NS_BUFTYPE_SMALL:
2787 while (card->sbfqc < card->sbnr.init) 2673 while (card->sbfqc < card->sbnr.init) {
2788 { 2674 struct sk_buff *sb;
2789 struct sk_buff *sb; 2675
2790 2676 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2791 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL); 2677 if (sb == NULL)
2792 if (sb == NULL) 2678 return -ENOMEM;
2793 return -ENOMEM; 2679 NS_PRV_BUFTYPE(sb) = BUF_SM;
2794 NS_SKB_CB(sb)->buf_type = BUF_SM; 2680 skb_queue_tail(&card->sbpool.queue, sb);
2795 skb_queue_tail(&card->sbpool.queue, sb); 2681 skb_reserve(sb, NS_AAL0_HEADER);
2796 skb_reserve(sb, NS_AAL0_HEADER); 2682 push_rxbufs(card, sb);
2797 push_rxbufs(card, sb); 2683 }
2798 } 2684 break;
2799 break; 2685
2800 2686 case NS_BUFTYPE_LARGE:
2801 case NS_BUFTYPE_LARGE: 2687 while (card->lbfqc < card->lbnr.init) {
2802 while (card->lbfqc < card->lbnr.init) 2688 struct sk_buff *lb;
2803 { 2689
2804 struct sk_buff *lb; 2690 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2805 2691 if (lb == NULL)
2806 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL); 2692 return -ENOMEM;
2807 if (lb == NULL) 2693 NS_PRV_BUFTYPE(lb) = BUF_LG;
2808 return -ENOMEM; 2694 skb_queue_tail(&card->lbpool.queue, lb);
2809 NS_SKB_CB(lb)->buf_type = BUF_LG; 2695 skb_reserve(lb, NS_SMBUFSIZE);
2810 skb_queue_tail(&card->lbpool.queue, lb); 2696 push_rxbufs(card, lb);
2811 skb_reserve(lb, NS_SMBUFSIZE); 2697 }
2812 push_rxbufs(card, lb); 2698 break;
2813 } 2699
2814 break; 2700 case NS_BUFTYPE_HUGE:
2815 2701 while (card->hbpool.count > card->hbnr.init) {
2816 case NS_BUFTYPE_HUGE: 2702 struct sk_buff *hb;
2817 while (card->hbpool.count > card->hbnr.init) 2703
2818 { 2704 spin_lock_irqsave(&card->int_lock, flags);
2819 struct sk_buff *hb; 2705 hb = skb_dequeue(&card->hbpool.queue);
2820 2706 card->hbpool.count--;
2821 spin_lock_irqsave(&card->int_lock, flags); 2707 spin_unlock_irqrestore(&card->int_lock, flags);
2822 hb = skb_dequeue(&card->hbpool.queue); 2708 if (hb == NULL)
2823 card->hbpool.count--; 2709 printk
2824 spin_unlock_irqrestore(&card->int_lock, flags); 2710 ("nicstar%d: huge buffer count inconsistent.\n",
2825 if (hb == NULL) 2711 card->index);
2826 printk("nicstar%d: huge buffer count inconsistent.\n", 2712 else
2827 card->index); 2713 dev_kfree_skb_any(hb);
2828 else 2714
2829 dev_kfree_skb_any(hb); 2715 }
2830 2716 while (card->hbpool.count < card->hbnr.init) {
2831 } 2717 struct sk_buff *hb;
2832 while (card->hbpool.count < card->hbnr.init) 2718
2833 { 2719 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2834 struct sk_buff *hb; 2720 if (hb == NULL)
2835 2721 return -ENOMEM;
2836 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL); 2722 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2837 if (hb == NULL) 2723 spin_lock_irqsave(&card->int_lock, flags);
2838 return -ENOMEM; 2724 skb_queue_tail(&card->hbpool.queue, hb);
2839 NS_SKB_CB(hb)->buf_type = BUF_NONE; 2725 card->hbpool.count++;
2840 spin_lock_irqsave(&card->int_lock, flags); 2726 spin_unlock_irqrestore(&card->int_lock, flags);
2841 skb_queue_tail(&card->hbpool.queue, hb); 2727 }
2842 card->hbpool.count++; 2728 break;
2843 spin_unlock_irqrestore(&card->int_lock, flags); 2729
2844 } 2730 case NS_BUFTYPE_IOVEC:
2845 break; 2731 while (card->iovpool.count > card->iovnr.init) {
2846 2732 struct sk_buff *iovb;
2847 case NS_BUFTYPE_IOVEC: 2733
2848 while (card->iovpool.count > card->iovnr.init) 2734 spin_lock_irqsave(&card->int_lock, flags);
2849 { 2735 iovb = skb_dequeue(&card->iovpool.queue);
2850 struct sk_buff *iovb; 2736 card->iovpool.count--;
2851 2737 spin_unlock_irqrestore(&card->int_lock, flags);
2852 spin_lock_irqsave(&card->int_lock, flags); 2738 if (iovb == NULL)
2853 iovb = skb_dequeue(&card->iovpool.queue); 2739 printk
2854 card->iovpool.count--; 2740 ("nicstar%d: iovec buffer count inconsistent.\n",
2855 spin_unlock_irqrestore(&card->int_lock, flags); 2741 card->index);
2856 if (iovb == NULL) 2742 else
2857 printk("nicstar%d: iovec buffer count inconsistent.\n", 2743 dev_kfree_skb_any(iovb);
2858 card->index); 2744
2859 else 2745 }
2860 dev_kfree_skb_any(iovb); 2746 while (card->iovpool.count < card->iovnr.init) {
2861 2747 struct sk_buff *iovb;
2862 } 2748
2863 while (card->iovpool.count < card->iovnr.init) 2749 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
2864 { 2750 if (iovb == NULL)
2865 struct sk_buff *iovb; 2751 return -ENOMEM;
2866 2752 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2867 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL); 2753 spin_lock_irqsave(&card->int_lock, flags);
2868 if (iovb == NULL) 2754 skb_queue_tail(&card->iovpool.queue, iovb);
2869 return -ENOMEM; 2755 card->iovpool.count++;
2870 NS_SKB_CB(iovb)->buf_type = BUF_NONE; 2756 spin_unlock_irqrestore(&card->int_lock, flags);
2871 spin_lock_irqsave(&card->int_lock, flags); 2757 }
2872 skb_queue_tail(&card->iovpool.queue, iovb); 2758 break;
2873 card->iovpool.count++; 2759
2874 spin_unlock_irqrestore(&card->int_lock, flags); 2760 default:
2875 } 2761 return -EINVAL;
2876 break; 2762
2877 2763 }
2878 default: 2764 return 0;
2879 return -EINVAL; 2765
2880 2766 default:
2881 } 2767 if (dev->phy && dev->phy->ioctl) {
2882 return 0; 2768 return dev->phy->ioctl(dev, cmd, arg);
2883 2769 } else {
2884 default: 2770 printk("nicstar%d: %s == NULL \n", card->index,
2885 if (dev->phy && dev->phy->ioctl) { 2771 dev->phy ? "dev->phy->ioctl" : "dev->phy");
2886 return dev->phy->ioctl(dev, cmd, arg); 2772 return -ENOIOCTLCMD;
2887 } 2773 }
2888 else { 2774 }
2889 printk("nicstar%d: %s == NULL \n", card->index,
2890 dev->phy ? "dev->phy->ioctl" : "dev->phy");
2891 return -ENOIOCTLCMD;
2892 }
2893 }
2894} 2775}
2895 2776
2896 2777#ifdef EXTRA_DEBUG
2897static void which_list(ns_dev *card, struct sk_buff *skb) 2778static void which_list(ns_dev * card, struct sk_buff *skb)
2898{ 2779{
2899 printk("skb buf_type: 0x%08x\n", NS_SKB_CB(skb)->buf_type); 2780 printk("skb buf_type: 0x%08x\n", NS_PRV_BUFTYPE(skb));
2900} 2781}
2901 2782#endif /* EXTRA_DEBUG */
2902 2783
2903static void ns_poll(unsigned long arg) 2784static void ns_poll(unsigned long arg)
2904{ 2785{
2905 int i; 2786 int i;
2906 ns_dev *card; 2787 ns_dev *card;
2907 unsigned long flags; 2788 unsigned long flags;
2908 u32 stat_r, stat_w; 2789 u32 stat_r, stat_w;
2909 2790
2910 PRINTK("nicstar: Entering ns_poll().\n"); 2791 PRINTK("nicstar: Entering ns_poll().\n");
2911 for (i = 0; i < num_cards; i++) 2792 for (i = 0; i < num_cards; i++) {
2912 { 2793 card = cards[i];
2913 card = cards[i]; 2794 if (spin_is_locked(&card->int_lock)) {
2914 if (spin_is_locked(&card->int_lock)) { 2795 /* Probably it isn't worth spinning */
2915 /* Probably it isn't worth spinning */ 2796 continue;
2916 continue; 2797 }
2917 } 2798 spin_lock_irqsave(&card->int_lock, flags);
2918 spin_lock_irqsave(&card->int_lock, flags); 2799
2919 2800 stat_w = 0;
2920 stat_w = 0; 2801 stat_r = readl(card->membase + STAT);
2921 stat_r = readl(card->membase + STAT); 2802 if (stat_r & NS_STAT_TSIF)
2922 if (stat_r & NS_STAT_TSIF) 2803 stat_w |= NS_STAT_TSIF;
2923 stat_w |= NS_STAT_TSIF; 2804 if (stat_r & NS_STAT_EOPDU)
2924 if (stat_r & NS_STAT_EOPDU) 2805 stat_w |= NS_STAT_EOPDU;
2925 stat_w |= NS_STAT_EOPDU; 2806
2926 2807 process_tsq(card);
2927 process_tsq(card); 2808 process_rsq(card);
2928 process_rsq(card); 2809
2929 2810 writel(stat_w, card->membase + STAT);
2930 writel(stat_w, card->membase + STAT); 2811 spin_unlock_irqrestore(&card->int_lock, flags);
2931 spin_unlock_irqrestore(&card->int_lock, flags); 2812 }
2932 } 2813 mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
2933 mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD); 2814 PRINTK("nicstar: Leaving ns_poll().\n");
2934 PRINTK("nicstar: Leaving ns_poll().\n");
2935} 2815}
2936 2816
2937
2938
2939static int ns_parse_mac(char *mac, unsigned char *esi) 2817static int ns_parse_mac(char *mac, unsigned char *esi)
2940{ 2818{
2941 int i, j; 2819 int i, j;
2942 short byte1, byte0; 2820 short byte1, byte0;
2943 2821
2944 if (mac == NULL || esi == NULL) 2822 if (mac == NULL || esi == NULL)
2945 return -1; 2823 return -1;
2946 j = 0; 2824 j = 0;
2947 for (i = 0; i < 6; i++) 2825 for (i = 0; i < 6; i++) {
2948 { 2826 if ((byte1 = hex_to_bin(mac[j++])) < 0)
2949 if ((byte1 = ns_h2i(mac[j++])) < 0) 2827 return -1;
2950 return -1; 2828 if ((byte0 = hex_to_bin(mac[j++])) < 0)
2951 if ((byte0 = ns_h2i(mac[j++])) < 0) 2829 return -1;
2952 return -1; 2830 esi[i] = (unsigned char)(byte1 * 16 + byte0);
2953 esi[i] = (unsigned char) (byte1 * 16 + byte0); 2831 if (i < 5) {
2954 if (i < 5) 2832 if (mac[j++] != ':')
2955 { 2833 return -1;
2956 if (mac[j++] != ':') 2834 }
2957 return -1; 2835 }
2958 } 2836 return 0;
2959 }
2960 return 0;
2961}
2962
2963
2964
2965static short ns_h2i(char c)
2966{
2967 if (c >= '0' && c <= '9')
2968 return (short) (c - '0');
2969 if (c >= 'A' && c <= 'F')
2970 return (short) (c - 'A' + 10);
2971 if (c >= 'a' && c <= 'f')
2972 return (short) (c - 'a' + 10);
2973 return -1;
2974} 2837}
2975 2838
2976 2839
2977
2978static void ns_phy_put(struct atm_dev *dev, unsigned char value, 2840static void ns_phy_put(struct atm_dev *dev, unsigned char value,
2979 unsigned long addr) 2841 unsigned long addr)
2980{ 2842{
2981 ns_dev *card; 2843 ns_dev *card;
2982 unsigned long flags; 2844 unsigned long flags;
2983 2845
2984 card = dev->dev_data; 2846 card = dev->dev_data;
2985 spin_lock_irqsave(&card->res_lock, flags); 2847 spin_lock_irqsave(&card->res_lock, flags);
2986 while(CMD_BUSY(card)); 2848 while (CMD_BUSY(card)) ;
2987 writel((unsigned long) value, card->membase + DR0); 2849 writel((u32) value, card->membase + DR0);
2988 writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF), 2850 writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
2989 card->membase + CMD); 2851 card->membase + CMD);
2990 spin_unlock_irqrestore(&card->res_lock, flags); 2852 spin_unlock_irqrestore(&card->res_lock, flags);
2991} 2853}
2992 2854
2993
2994
2995static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr) 2855static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
2996{ 2856{
2997 ns_dev *card; 2857 ns_dev *card;
2998 unsigned long flags; 2858 unsigned long flags;
2999 unsigned long data; 2859 u32 data;
3000 2860
3001 card = dev->dev_data; 2861 card = dev->dev_data;
3002 spin_lock_irqsave(&card->res_lock, flags); 2862 spin_lock_irqsave(&card->res_lock, flags);
3003 while(CMD_BUSY(card)); 2863 while (CMD_BUSY(card)) ;
3004 writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF), 2864 writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
3005 card->membase + CMD); 2865 card->membase + CMD);
3006 while(CMD_BUSY(card)); 2866 while (CMD_BUSY(card)) ;
3007 data = readl(card->membase + DR0) & 0x000000FF; 2867 data = readl(card->membase + DR0) & 0x000000FF;
3008 spin_unlock_irqrestore(&card->res_lock, flags); 2868 spin_unlock_irqrestore(&card->res_lock, flags);
3009 return (unsigned char) data; 2869 return (unsigned char)data;
3010} 2870}
3011 2871
3012
3013
3014module_init(nicstar_init); 2872module_init(nicstar_init);
3015module_exit(nicstar_cleanup); 2873module_exit(nicstar_cleanup);
diff --git a/drivers/atm/nicstar.h b/drivers/atm/nicstar.h
index 6010e3daa6a2..9bc27ea5088e 100644
--- a/drivers/atm/nicstar.h
+++ b/drivers/atm/nicstar.h
@@ -1,5 +1,4 @@
1/****************************************************************************** 1/*
2 *
3 * nicstar.h 2 * nicstar.h
4 * 3 *
5 * Header file for the nicstar device driver. 4 * Header file for the nicstar device driver.
@@ -8,29 +7,26 @@
8 * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999 7 * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
9 * 8 *
10 * (C) INESC 1998 9 * (C) INESC 1998
11 * 10 */
12 ******************************************************************************/
13
14 11
15#ifndef _LINUX_NICSTAR_H_ 12#ifndef _LINUX_NICSTAR_H_
16#define _LINUX_NICSTAR_H_ 13#define _LINUX_NICSTAR_H_
17 14
18 15/* Includes */
19/* Includes *******************************************************************/
20 16
21#include <linux/types.h> 17#include <linux/types.h>
22#include <linux/pci.h> 18#include <linux/pci.h>
19#include <linux/idr.h>
23#include <linux/uio.h> 20#include <linux/uio.h>
24#include <linux/skbuff.h> 21#include <linux/skbuff.h>
25#include <linux/atmdev.h> 22#include <linux/atmdev.h>
26#include <linux/atm_nicstar.h> 23#include <linux/atm_nicstar.h>
27 24
28 25/* Options */
29/* Options ********************************************************************/
30 26
31#define NS_MAX_CARDS 4 /* Maximum number of NICStAR based cards 27#define NS_MAX_CARDS 4 /* Maximum number of NICStAR based cards
32 controlled by the device driver. Must 28 controlled by the device driver. Must
33 be <= 5 */ 29 be <= 5 */
34 30
35#undef RCQ_SUPPORT /* Do not define this for now */ 31#undef RCQ_SUPPORT /* Do not define this for now */
36 32
@@ -43,7 +39,7 @@
43#define NS_VPIBITS 2 /* 0, 1, 2, or 8 */ 39#define NS_VPIBITS 2 /* 0, 1, 2, or 8 */
44 40
45#define NS_MAX_RCTSIZE 4096 /* Number of entries. 4096 or 16384. 41#define NS_MAX_RCTSIZE 4096 /* Number of entries. 4096 or 16384.
46 Define 4096 only if (all) your card(s) 42 Define 4096 only if (all) your card(s)
47 have 32K x 32bit SRAM, in which case 43 have 32K x 32bit SRAM, in which case
48 setting this to 16384 will just waste a 44 setting this to 16384 will just waste a
49 lot of memory. 45 lot of memory.
@@ -51,33 +47,32 @@
51 128K x 32bit SRAM will limit the maximum 47 128K x 32bit SRAM will limit the maximum
52 VCI. */ 48 VCI. */
53 49
54/*#define NS_PCI_LATENCY 64*/ /* Must be a multiple of 32 */ 50 /*#define NS_PCI_LATENCY 64*//* Must be a multiple of 32 */
55 51
56 /* Number of buffers initially allocated */ 52 /* Number of buffers initially allocated */
57#define NUM_SB 32 /* Must be even */ 53#define NUM_SB 32 /* Must be even */
58#define NUM_LB 24 /* Must be even */ 54#define NUM_LB 24 /* Must be even */
59#define NUM_HB 8 /* Pre-allocated huge buffers */ 55#define NUM_HB 8 /* Pre-allocated huge buffers */
60#define NUM_IOVB 48 /* Iovec buffers */ 56#define NUM_IOVB 48 /* Iovec buffers */
61 57
62 /* Lower level for count of buffers */ 58 /* Lower level for count of buffers */
63#define MIN_SB 8 /* Must be even */ 59#define MIN_SB 8 /* Must be even */
64#define MIN_LB 8 /* Must be even */ 60#define MIN_LB 8 /* Must be even */
65#define MIN_HB 6 61#define MIN_HB 6
66#define MIN_IOVB 8 62#define MIN_IOVB 8
67 63
68 /* Upper level for count of buffers */ 64 /* Upper level for count of buffers */
69#define MAX_SB 64 /* Must be even, <= 508 */ 65#define MAX_SB 64 /* Must be even, <= 508 */
70#define MAX_LB 48 /* Must be even, <= 508 */ 66#define MAX_LB 48 /* Must be even, <= 508 */
71#define MAX_HB 10 67#define MAX_HB 10
72#define MAX_IOVB 80 68#define MAX_IOVB 80
73 69
74 /* These are the absolute maximum allowed for the ioctl() */ 70 /* These are the absolute maximum allowed for the ioctl() */
75#define TOP_SB 256 /* Must be even, <= 508 */ 71#define TOP_SB 256 /* Must be even, <= 508 */
76#define TOP_LB 128 /* Must be even, <= 508 */ 72#define TOP_LB 128 /* Must be even, <= 508 */
77#define TOP_HB 64 73#define TOP_HB 64
78#define TOP_IOVB 256 74#define TOP_IOVB 256
79 75
80
81#define MAX_TBD_PER_VC 1 /* Number of TBDs before a TSR */ 76#define MAX_TBD_PER_VC 1 /* Number of TBDs before a TSR */
82#define MAX_TBD_PER_SCQ 10 /* Only meaningful for variable rate SCQs */ 77#define MAX_TBD_PER_SCQ 10 /* Only meaningful for variable rate SCQs */
83 78
@@ -89,15 +84,12 @@
89 84
90#define PCR_TOLERANCE (1.0001) 85#define PCR_TOLERANCE (1.0001)
91 86
92 87/* ESI stuff */
93
94/* ESI stuff ******************************************************************/
95 88
96#define NICSTAR_EPROM_MAC_ADDR_OFFSET 0x6C 89#define NICSTAR_EPROM_MAC_ADDR_OFFSET 0x6C
97#define NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT 0xF6 90#define NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT 0xF6
98 91
99 92/* #defines */
100/* #defines *******************************************************************/
101 93
102#define NS_IOREMAP_SIZE 4096 94#define NS_IOREMAP_SIZE 4096
103 95
@@ -123,22 +115,19 @@
123#define NS_SMSKBSIZE (NS_SMBUFSIZE + NS_AAL0_HEADER) 115#define NS_SMSKBSIZE (NS_SMBUFSIZE + NS_AAL0_HEADER)
124#define NS_LGSKBSIZE (NS_SMBUFSIZE + NS_LGBUFSIZE) 116#define NS_LGSKBSIZE (NS_SMBUFSIZE + NS_LGBUFSIZE)
125 117
118/* NICStAR structures located in host memory */
126 119
127/* NICStAR structures located in host memory **********************************/ 120/*
128 121 * RSQ - Receive Status Queue
129
130
131/* RSQ - Receive Status Queue
132 * 122 *
133 * Written by the NICStAR, read by the device driver. 123 * Written by the NICStAR, read by the device driver.
134 */ 124 */
135 125
136typedef struct ns_rsqe 126typedef struct ns_rsqe {
137{ 127 u32 word_1;
138 u32 word_1; 128 u32 buffer_handle;
139 u32 buffer_handle; 129 u32 final_aal5_crc32;
140 u32 final_aal5_crc32; 130 u32 word_4;
141 u32 word_4;
142} ns_rsqe; 131} ns_rsqe;
143 132
144#define ns_rsqe_vpi(ns_rsqep) \ 133#define ns_rsqe_vpi(ns_rsqep) \
@@ -175,30 +164,27 @@ typedef struct ns_rsqe
175#define ns_rsqe_cellcount(ns_rsqep) \ 164#define ns_rsqe_cellcount(ns_rsqep) \
176 (le32_to_cpu((ns_rsqep)->word_4) & 0x000001FF) 165 (le32_to_cpu((ns_rsqep)->word_4) & 0x000001FF)
177#define ns_rsqe_init(ns_rsqep) \ 166#define ns_rsqe_init(ns_rsqep) \
178 ((ns_rsqep)->word_4 = cpu_to_le32(0x00000000)) 167 ((ns_rsqep)->word_4 = cpu_to_le32(0x00000000))
179 168
180#define NS_RSQ_NUM_ENTRIES (NS_RSQSIZE / 16) 169#define NS_RSQ_NUM_ENTRIES (NS_RSQSIZE / 16)
181#define NS_RSQ_ALIGNMENT NS_RSQSIZE 170#define NS_RSQ_ALIGNMENT NS_RSQSIZE
182 171
183 172/*
184 173 * RCQ - Raw Cell Queue
185/* RCQ - Raw Cell Queue
186 * 174 *
187 * Written by the NICStAR, read by the device driver. 175 * Written by the NICStAR, read by the device driver.
188 */ 176 */
189 177
190typedef struct cell_payload 178typedef struct cell_payload {
191{ 179 u32 word[12];
192 u32 word[12];
193} cell_payload; 180} cell_payload;
194 181
195typedef struct ns_rcqe 182typedef struct ns_rcqe {
196{ 183 u32 word_1;
197 u32 word_1; 184 u32 word_2;
198 u32 word_2; 185 u32 word_3;
199 u32 word_3; 186 u32 word_4;
200 u32 word_4; 187 cell_payload payload;
201 cell_payload payload;
202} ns_rcqe; 188} ns_rcqe;
203 189
204#define NS_RCQE_SIZE 64 /* bytes */ 190#define NS_RCQE_SIZE 64 /* bytes */
@@ -210,28 +196,25 @@ typedef struct ns_rcqe
210#define ns_rcqe_nextbufhandle(ns_rcqep) \ 196#define ns_rcqe_nextbufhandle(ns_rcqep) \
211 (le32_to_cpu((ns_rcqep)->word_2)) 197 (le32_to_cpu((ns_rcqep)->word_2))
212 198
213 199/*
214 200 * SCQ - Segmentation Channel Queue
215/* SCQ - Segmentation Channel Queue
216 * 201 *
217 * Written by the device driver, read by the NICStAR. 202 * Written by the device driver, read by the NICStAR.
218 */ 203 */
219 204
220typedef struct ns_scqe 205typedef struct ns_scqe {
221{ 206 u32 word_1;
222 u32 word_1; 207 u32 word_2;
223 u32 word_2; 208 u32 word_3;
224 u32 word_3; 209 u32 word_4;
225 u32 word_4;
226} ns_scqe; 210} ns_scqe;
227 211
228 /* NOTE: SCQ entries can be either a TBD (Transmit Buffer Descriptors) 212 /* NOTE: SCQ entries can be either a TBD (Transmit Buffer Descriptors)
229 or TSR (Transmit Status Requests) */ 213 or TSR (Transmit Status Requests) */
230 214
231#define NS_SCQE_TYPE_TBD 0x00000000 215#define NS_SCQE_TYPE_TBD 0x00000000
232#define NS_SCQE_TYPE_TSR 0x80000000 216#define NS_SCQE_TYPE_TSR 0x80000000
233 217
234
235#define NS_TBD_EOPDU 0x40000000 218#define NS_TBD_EOPDU 0x40000000
236#define NS_TBD_AAL0 0x00000000 219#define NS_TBD_AAL0 0x00000000
237#define NS_TBD_AAL34 0x04000000 220#define NS_TBD_AAL34 0x04000000
@@ -253,10 +236,9 @@ typedef struct ns_scqe
253#define ns_tbd_mkword_4(gfc, vpi, vci, pt, clp) \ 236#define ns_tbd_mkword_4(gfc, vpi, vci, pt, clp) \
254 (cpu_to_le32((gfc) << 28 | (vpi) << 20 | (vci) << 4 | (pt) << 1 | (clp))) 237 (cpu_to_le32((gfc) << 28 | (vpi) << 20 | (vci) << 4 | (pt) << 1 | (clp)))
255 238
256
257#define NS_TSR_INTENABLE 0x20000000 239#define NS_TSR_INTENABLE 0x20000000
258 240
259#define NS_TSR_SCDISVBR 0xFFFF /* Use as scdi for VBR SCD */ 241#define NS_TSR_SCDISVBR 0xFFFF /* Use as scdi for VBR SCD */
260 242
261#define ns_tsr_mkword_1(flags) \ 243#define ns_tsr_mkword_1(flags) \
262 (cpu_to_le32(NS_SCQE_TYPE_TSR | (flags))) 244 (cpu_to_le32(NS_SCQE_TYPE_TSR | (flags)))
@@ -273,22 +255,20 @@ typedef struct ns_scqe
273 255
274#define NS_SCQE_SIZE 16 256#define NS_SCQE_SIZE 16
275 257
276 258/*
277 259 * TSQ - Transmit Status Queue
278/* TSQ - Transmit Status Queue
279 * 260 *
280 * Written by the NICStAR, read by the device driver. 261 * Written by the NICStAR, read by the device driver.
281 */ 262 */
282 263
283typedef struct ns_tsi 264typedef struct ns_tsi {
284{ 265 u32 word_1;
285 u32 word_1; 266 u32 word_2;
286 u32 word_2;
287} ns_tsi; 267} ns_tsi;
288 268
289 /* NOTE: The first word can be a status word copied from the TSR which 269 /* NOTE: The first word can be a status word copied from the TSR which
290 originated the TSI, or a timer overflow indicator. In this last 270 originated the TSI, or a timer overflow indicator. In this last
291 case, the value of the first word is all zeroes. */ 271 case, the value of the first word is all zeroes. */
292 272
293#define NS_TSI_EMPTY 0x80000000 273#define NS_TSI_EMPTY 0x80000000
294#define NS_TSI_TIMESTAMP_MASK 0x00FFFFFF 274#define NS_TSI_TIMESTAMP_MASK 0x00FFFFFF
@@ -301,12 +281,10 @@ typedef struct ns_tsi
301#define ns_tsi_init(ns_tsip) \ 281#define ns_tsi_init(ns_tsip) \
302 ((ns_tsip)->word_2 = cpu_to_le32(NS_TSI_EMPTY)) 282 ((ns_tsip)->word_2 = cpu_to_le32(NS_TSI_EMPTY))
303 283
304
305#define NS_TSQSIZE 8192 284#define NS_TSQSIZE 8192
306#define NS_TSQ_NUM_ENTRIES 1024 285#define NS_TSQ_NUM_ENTRIES 1024
307#define NS_TSQ_ALIGNMENT 8192 286#define NS_TSQ_ALIGNMENT 8192
308 287
309
310#define NS_TSI_SCDISVBR NS_TSR_SCDISVBR 288#define NS_TSI_SCDISVBR NS_TSR_SCDISVBR
311 289
312#define ns_tsi_tmrof(ns_tsip) \ 290#define ns_tsi_tmrof(ns_tsip) \
@@ -316,26 +294,22 @@ typedef struct ns_tsi
316#define ns_tsi_getscqpos(ns_tsip) \ 294#define ns_tsi_getscqpos(ns_tsip) \
317 (le32_to_cpu((ns_tsip)->word_1) & 0x00007FFF) 295 (le32_to_cpu((ns_tsip)->word_1) & 0x00007FFF)
318 296
297/* NICStAR structures located in local SRAM */
319 298
320 299/*
321/* NICStAR structures located in local SRAM ***********************************/ 300 * RCT - Receive Connection Table
322
323
324
325/* RCT - Receive Connection Table
326 * 301 *
327 * Written by both the NICStAR and the device driver. 302 * Written by both the NICStAR and the device driver.
328 */ 303 */
329 304
330typedef struct ns_rcte 305typedef struct ns_rcte {
331{ 306 u32 word_1;
332 u32 word_1; 307 u32 buffer_handle;
333 u32 buffer_handle; 308 u32 dma_address;
334 u32 dma_address; 309 u32 aal5_crc32;
335 u32 aal5_crc32;
336} ns_rcte; 310} ns_rcte;
337 311
338#define NS_RCTE_BSFB 0x00200000 /* Rev. D only */ 312#define NS_RCTE_BSFB 0x00200000 /* Rev. D only */
339#define NS_RCTE_NZGFC 0x00100000 313#define NS_RCTE_NZGFC 0x00100000
340#define NS_RCTE_CONNECTOPEN 0x00080000 314#define NS_RCTE_CONNECTOPEN 0x00080000
341#define NS_RCTE_AALMASK 0x00070000 315#define NS_RCTE_AALMASK 0x00070000
@@ -358,25 +332,21 @@ typedef struct ns_rcte
358#define NS_RCT_ENTRY_SIZE 4 /* Number of dwords */ 332#define NS_RCT_ENTRY_SIZE 4 /* Number of dwords */
359 333
360 /* NOTE: We could make macros to contruct the first word of the RCTE, 334 /* NOTE: We could make macros to contruct the first word of the RCTE,
361 but that doesn't seem to make much sense... */ 335 but that doesn't seem to make much sense... */
362 336
363 337/*
364 338 * FBD - Free Buffer Descriptor
365/* FBD - Free Buffer Descriptor
366 * 339 *
367 * Written by the device driver using via the command register. 340 * Written by the device driver using via the command register.
368 */ 341 */
369 342
370typedef struct ns_fbd 343typedef struct ns_fbd {
371{ 344 u32 buffer_handle;
372 u32 buffer_handle; 345 u32 dma_address;
373 u32 dma_address;
374} ns_fbd; 346} ns_fbd;
375 347
376 348/*
377 349 * TST - Transmit Schedule Table
378
379/* TST - Transmit Schedule Table
380 * 350 *
381 * Written by the device driver. 351 * Written by the device driver.
382 */ 352 */
@@ -385,40 +355,38 @@ typedef u32 ns_tste;
385 355
386#define NS_TST_OPCODE_MASK 0x60000000 356#define NS_TST_OPCODE_MASK 0x60000000
387 357
388#define NS_TST_OPCODE_NULL 0x00000000 /* Insert null cell */ 358#define NS_TST_OPCODE_NULL 0x00000000 /* Insert null cell */
389#define NS_TST_OPCODE_FIXED 0x20000000 /* Cell from a fixed rate channel */ 359#define NS_TST_OPCODE_FIXED 0x20000000 /* Cell from a fixed rate channel */
390#define NS_TST_OPCODE_VARIABLE 0x40000000 360#define NS_TST_OPCODE_VARIABLE 0x40000000
391#define NS_TST_OPCODE_END 0x60000000 /* Jump */ 361#define NS_TST_OPCODE_END 0x60000000 /* Jump */
392 362
393#define ns_tste_make(opcode, sramad) (opcode | sramad) 363#define ns_tste_make(opcode, sramad) (opcode | sramad)
394 364
395 /* NOTE: 365 /* NOTE:
396 366
397 - When the opcode is FIXED, sramad specifies the SRAM address of the 367 - When the opcode is FIXED, sramad specifies the SRAM address of the
398 SCD for that fixed rate channel. 368 SCD for that fixed rate channel.
399 - When the opcode is END, sramad specifies the SRAM address of the 369 - When the opcode is END, sramad specifies the SRAM address of the
400 location of the next TST entry to read. 370 location of the next TST entry to read.
401 */ 371 */
402 372
403 373/*
404 374 * SCD - Segmentation Channel Descriptor
405/* SCD - Segmentation Channel Descriptor
406 * 375 *
407 * Written by both the device driver and the NICStAR 376 * Written by both the device driver and the NICStAR
408 */ 377 */
409 378
410typedef struct ns_scd 379typedef struct ns_scd {
411{ 380 u32 word_1;
412 u32 word_1; 381 u32 word_2;
413 u32 word_2; 382 u32 partial_aal5_crc;
414 u32 partial_aal5_crc; 383 u32 reserved;
415 u32 reserved; 384 ns_scqe cache_a;
416 ns_scqe cache_a; 385 ns_scqe cache_b;
417 ns_scqe cache_b;
418} ns_scd; 386} ns_scd;
419 387
420#define NS_SCD_BASE_MASK_VAR 0xFFFFE000 /* Variable rate */ 388#define NS_SCD_BASE_MASK_VAR 0xFFFFE000 /* Variable rate */
421#define NS_SCD_BASE_MASK_FIX 0xFFFFFC00 /* Fixed rate */ 389#define NS_SCD_BASE_MASK_FIX 0xFFFFFC00 /* Fixed rate */
422#define NS_SCD_TAIL_MASK_VAR 0x00001FF0 390#define NS_SCD_TAIL_MASK_VAR 0x00001FF0
423#define NS_SCD_TAIL_MASK_FIX 0x000003F0 391#define NS_SCD_TAIL_MASK_FIX 0x000003F0
424#define NS_SCD_HEAD_MASK_VAR 0x00001FF0 392#define NS_SCD_HEAD_MASK_VAR 0x00001FF0
@@ -426,13 +394,9 @@ typedef struct ns_scd
426#define NS_SCD_XMITFOREVER 0x02000000 394#define NS_SCD_XMITFOREVER 0x02000000
427 395
428 /* NOTE: There are other fields in word 2 of the SCD, but as they should 396 /* NOTE: There are other fields in word 2 of the SCD, but as they should
429 not be needed in the device driver they are not defined here. */ 397 not be needed in the device driver they are not defined here. */
430
431
432
433
434/* NICStAR local SRAM memory map **********************************************/
435 398
399/* NICStAR local SRAM memory map */
436 400
437#define NS_RCT 0x00000 401#define NS_RCT 0x00000
438#define NS_RCT_32_END 0x03FFF 402#define NS_RCT_32_END 0x03FFF
@@ -455,100 +419,93 @@ typedef struct ns_scd
455#define NS_LGFBQ 0x1FC00 419#define NS_LGFBQ 0x1FC00
456#define NS_LGFBQ_END 0x1FFFF 420#define NS_LGFBQ_END 0x1FFFF
457 421
458 422/* NISCtAR operation registers */
459
460/* NISCtAR operation registers ************************************************/
461
462 423
463/* See Section 3.4 of `IDT77211 NICStAR User Manual' from www.idt.com */ 424/* See Section 3.4 of `IDT77211 NICStAR User Manual' from www.idt.com */
464 425
465enum ns_regs 426enum ns_regs {
466{ 427 DR0 = 0x00, /* Data Register 0 R/W */
467 DR0 = 0x00, /* Data Register 0 R/W*/ 428 DR1 = 0x04, /* Data Register 1 W */
468 DR1 = 0x04, /* Data Register 1 W */ 429 DR2 = 0x08, /* Data Register 2 W */
469 DR2 = 0x08, /* Data Register 2 W */ 430 DR3 = 0x0C, /* Data Register 3 W */
470 DR3 = 0x0C, /* Data Register 3 W */ 431 CMD = 0x10, /* Command W */
471 CMD = 0x10, /* Command W */ 432 CFG = 0x14, /* Configuration R/W */
472 CFG = 0x14, /* Configuration R/W */ 433 STAT = 0x18, /* Status R/W */
473 STAT = 0x18, /* Status R/W */ 434 RSQB = 0x1C, /* Receive Status Queue Base W */
474 RSQB = 0x1C, /* Receive Status Queue Base W */ 435 RSQT = 0x20, /* Receive Status Queue Tail R */
475 RSQT = 0x20, /* Receive Status Queue Tail R */ 436 RSQH = 0x24, /* Receive Status Queue Head W */
476 RSQH = 0x24, /* Receive Status Queue Head W */ 437 CDC = 0x28, /* Cell Drop Counter R/clear */
477 CDC = 0x28, /* Cell Drop Counter R/clear */ 438 VPEC = 0x2C, /* VPI/VCI Lookup Error Count R/clear */
478 VPEC = 0x2C, /* VPI/VCI Lookup Error Count R/clear */ 439 ICC = 0x30, /* Invalid Cell Count R/clear */
479 ICC = 0x30, /* Invalid Cell Count R/clear */ 440 RAWCT = 0x34, /* Raw Cell Tail R */
480 RAWCT = 0x34, /* Raw Cell Tail R */ 441 TMR = 0x38, /* Timer R */
481 TMR = 0x38, /* Timer R */ 442 TSTB = 0x3C, /* Transmit Schedule Table Base R/W */
482 TSTB = 0x3C, /* Transmit Schedule Table Base R/W */ 443 TSQB = 0x40, /* Transmit Status Queue Base W */
483 TSQB = 0x40, /* Transmit Status Queue Base W */ 444 TSQT = 0x44, /* Transmit Status Queue Tail R */
484 TSQT = 0x44, /* Transmit Status Queue Tail R */ 445 TSQH = 0x48, /* Transmit Status Queue Head W */
485 TSQH = 0x48, /* Transmit Status Queue Head W */ 446 GP = 0x4C, /* General Purpose R/W */
486 GP = 0x4C, /* General Purpose R/W */ 447 VPM = 0x50 /* VPI/VCI Mask W */
487 VPM = 0x50 /* VPI/VCI Mask W */
488}; 448};
489 449
490 450/* NICStAR commands issued to the CMD register */
491/* NICStAR commands issued to the CMD register ********************************/
492
493 451
494/* Top 4 bits are command opcode, lower 28 are parameters. */ 452/* Top 4 bits are command opcode, lower 28 are parameters. */
495 453
496#define NS_CMD_NO_OPERATION 0x00000000 454#define NS_CMD_NO_OPERATION 0x00000000
497 /* params always 0 */ 455 /* params always 0 */
498 456
499#define NS_CMD_OPENCLOSE_CONNECTION 0x20000000 457#define NS_CMD_OPENCLOSE_CONNECTION 0x20000000
500 /* b19{1=open,0=close} b18-2{SRAM addr} */ 458 /* b19{1=open,0=close} b18-2{SRAM addr} */
501 459
502#define NS_CMD_WRITE_SRAM 0x40000000 460#define NS_CMD_WRITE_SRAM 0x40000000
503 /* b18-2{SRAM addr} b1-0{burst size} */ 461 /* b18-2{SRAM addr} b1-0{burst size} */
504 462
505#define NS_CMD_READ_SRAM 0x50000000 463#define NS_CMD_READ_SRAM 0x50000000
506 /* b18-2{SRAM addr} */ 464 /* b18-2{SRAM addr} */
507 465
508#define NS_CMD_WRITE_FREEBUFQ 0x60000000 466#define NS_CMD_WRITE_FREEBUFQ 0x60000000
509 /* b0{large buf indicator} */ 467 /* b0{large buf indicator} */
510 468
511#define NS_CMD_READ_UTILITY 0x80000000 469#define NS_CMD_READ_UTILITY 0x80000000
512 /* b8{1=select UTL_CS1} b9{1=select UTL_CS0} b7-0{bus addr} */ 470 /* b8{1=select UTL_CS1} b9{1=select UTL_CS0} b7-0{bus addr} */
513 471
514#define NS_CMD_WRITE_UTILITY 0x90000000 472#define NS_CMD_WRITE_UTILITY 0x90000000
515 /* b8{1=select UTL_CS1} b9{1=select UTL_CS0} b7-0{bus addr} */ 473 /* b8{1=select UTL_CS1} b9{1=select UTL_CS0} b7-0{bus addr} */
516 474
517#define NS_CMD_OPEN_CONNECTION (NS_CMD_OPENCLOSE_CONNECTION | 0x00080000) 475#define NS_CMD_OPEN_CONNECTION (NS_CMD_OPENCLOSE_CONNECTION | 0x00080000)
518#define NS_CMD_CLOSE_CONNECTION NS_CMD_OPENCLOSE_CONNECTION 476#define NS_CMD_CLOSE_CONNECTION NS_CMD_OPENCLOSE_CONNECTION
519 477
520 478/* NICStAR configuration bits */
521/* NICStAR configuration bits *************************************************/ 479
522 480#define NS_CFG_SWRST 0x80000000 /* Software Reset */
523#define NS_CFG_SWRST 0x80000000 /* Software Reset */ 481#define NS_CFG_RXPATH 0x20000000 /* Receive Path Enable */
524#define NS_CFG_RXPATH 0x20000000 /* Receive Path Enable */ 482#define NS_CFG_SMBUFSIZE_MASK 0x18000000 /* Small Receive Buffer Size */
525#define NS_CFG_SMBUFSIZE_MASK 0x18000000 /* Small Receive Buffer Size */ 483#define NS_CFG_LGBUFSIZE_MASK 0x06000000 /* Large Receive Buffer Size */
526#define NS_CFG_LGBUFSIZE_MASK 0x06000000 /* Large Receive Buffer Size */ 484#define NS_CFG_EFBIE 0x01000000 /* Empty Free Buffer Queue
527#define NS_CFG_EFBIE 0x01000000 /* Empty Free Buffer Queue 485 Interrupt Enable */
528 Interrupt Enable */ 486#define NS_CFG_RSQSIZE_MASK 0x00C00000 /* Receive Status Queue Size */
529#define NS_CFG_RSQSIZE_MASK 0x00C00000 /* Receive Status Queue Size */ 487#define NS_CFG_ICACCEPT 0x00200000 /* Invalid Cell Accept */
530#define NS_CFG_ICACCEPT 0x00200000 /* Invalid Cell Accept */ 488#define NS_CFG_IGNOREGFC 0x00100000 /* Ignore General Flow Control */
531#define NS_CFG_IGNOREGFC 0x00100000 /* Ignore General Flow Control */ 489#define NS_CFG_VPIBITS_MASK 0x000C0000 /* VPI/VCI Bits Size Select */
532#define NS_CFG_VPIBITS_MASK 0x000C0000 /* VPI/VCI Bits Size Select */ 490#define NS_CFG_RCTSIZE_MASK 0x00030000 /* Receive Connection Table Size */
533#define NS_CFG_RCTSIZE_MASK 0x00030000 /* Receive Connection Table Size */ 491#define NS_CFG_VCERRACCEPT 0x00008000 /* VPI/VCI Error Cell Accept */
534#define NS_CFG_VCERRACCEPT 0x00008000 /* VPI/VCI Error Cell Accept */ 492#define NS_CFG_RXINT_MASK 0x00007000 /* End of Receive PDU Interrupt
535#define NS_CFG_RXINT_MASK 0x00007000 /* End of Receive PDU Interrupt 493 Handling */
536 Handling */ 494#define NS_CFG_RAWIE 0x00000800 /* Raw Cell Qu' Interrupt Enable */
537#define NS_CFG_RAWIE 0x00000800 /* Raw Cell Qu' Interrupt Enable */ 495#define NS_CFG_RSQAFIE 0x00000400 /* Receive Queue Almost Full
538#define NS_CFG_RSQAFIE 0x00000400 /* Receive Queue Almost Full 496 Interrupt Enable */
539 Interrupt Enable */ 497#define NS_CFG_RXRM 0x00000200 /* Receive RM Cells */
540#define NS_CFG_RXRM 0x00000200 /* Receive RM Cells */ 498#define NS_CFG_TMRROIE 0x00000080 /* Timer Roll Over Interrupt
541#define NS_CFG_TMRROIE 0x00000080 /* Timer Roll Over Interrupt 499 Enable */
542 Enable */ 500#define NS_CFG_TXEN 0x00000020 /* Transmit Operation Enable */
543#define NS_CFG_TXEN 0x00000020 /* Transmit Operation Enable */ 501#define NS_CFG_TXIE 0x00000010 /* Transmit Status Interrupt
544#define NS_CFG_TXIE 0x00000010 /* Transmit Status Interrupt 502 Enable */
545 Enable */ 503#define NS_CFG_TXURIE 0x00000008 /* Transmit Under-run Interrupt
546#define NS_CFG_TXURIE 0x00000008 /* Transmit Under-run Interrupt 504 Enable */
547 Enable */ 505#define NS_CFG_UMODE 0x00000004 /* Utopia Mode (cell/byte) Select */
548#define NS_CFG_UMODE 0x00000004 /* Utopia Mode (cell/byte) Select */ 506#define NS_CFG_TSQFIE 0x00000002 /* Transmit Status Queue Full
549#define NS_CFG_TSQFIE 0x00000002 /* Transmit Status Queue Full 507 Interrupt Enable */
550 Interrupt Enable */ 508#define NS_CFG_PHYIE 0x00000001 /* PHY Interrupt Enable */
551#define NS_CFG_PHYIE 0x00000001 /* PHY Interrupt Enable */
552 509
553#define NS_CFG_SMBUFSIZE_48 0x00000000 510#define NS_CFG_SMBUFSIZE_48 0x00000000
554#define NS_CFG_SMBUFSIZE_96 0x08000000 511#define NS_CFG_SMBUFSIZE_96 0x08000000
@@ -579,33 +536,29 @@ enum ns_regs
579#define NS_CFG_RXINT_624US 0x00003000 536#define NS_CFG_RXINT_624US 0x00003000
580#define NS_CFG_RXINT_899US 0x00004000 537#define NS_CFG_RXINT_899US 0x00004000
581 538
582 539/* NICStAR STATus bits */
583/* NICStAR STATus bits ********************************************************/ 540
584 541#define NS_STAT_SFBQC_MASK 0xFF000000 /* hi 8 bits Small Buffer Queue Count */
585#define NS_STAT_SFBQC_MASK 0xFF000000 /* hi 8 bits Small Buffer Queue Count */ 542#define NS_STAT_LFBQC_MASK 0x00FF0000 /* hi 8 bits Large Buffer Queue Count */
586#define NS_STAT_LFBQC_MASK 0x00FF0000 /* hi 8 bits Large Buffer Queue Count */ 543#define NS_STAT_TSIF 0x00008000 /* Transmit Status Queue Indicator */
587#define NS_STAT_TSIF 0x00008000 /* Transmit Status Queue Indicator */ 544#define NS_STAT_TXICP 0x00004000 /* Transmit Incomplete PDU */
588#define NS_STAT_TXICP 0x00004000 /* Transmit Incomplete PDU */ 545#define NS_STAT_TSQF 0x00001000 /* Transmit Status Queue Full */
589#define NS_STAT_TSQF 0x00001000 /* Transmit Status Queue Full */ 546#define NS_STAT_TMROF 0x00000800 /* Timer Overflow */
590#define NS_STAT_TMROF 0x00000800 /* Timer Overflow */ 547#define NS_STAT_PHYI 0x00000400 /* PHY Device Interrupt */
591#define NS_STAT_PHYI 0x00000400 /* PHY Device Interrupt */ 548#define NS_STAT_CMDBZ 0x00000200 /* Command Busy */
592#define NS_STAT_CMDBZ 0x00000200 /* Command Busy */ 549#define NS_STAT_SFBQF 0x00000100 /* Small Buffer Queue Full */
593#define NS_STAT_SFBQF 0x00000100 /* Small Buffer Queue Full */ 550#define NS_STAT_LFBQF 0x00000080 /* Large Buffer Queue Full */
594#define NS_STAT_LFBQF 0x00000080 /* Large Buffer Queue Full */ 551#define NS_STAT_RSQF 0x00000040 /* Receive Status Queue Full */
595#define NS_STAT_RSQF 0x00000040 /* Receive Status Queue Full */ 552#define NS_STAT_EOPDU 0x00000020 /* End of PDU */
596#define NS_STAT_EOPDU 0x00000020 /* End of PDU */ 553#define NS_STAT_RAWCF 0x00000010 /* Raw Cell Flag */
597#define NS_STAT_RAWCF 0x00000010 /* Raw Cell Flag */ 554#define NS_STAT_SFBQE 0x00000008 /* Small Buffer Queue Empty */
598#define NS_STAT_SFBQE 0x00000008 /* Small Buffer Queue Empty */ 555#define NS_STAT_LFBQE 0x00000004 /* Large Buffer Queue Empty */
599#define NS_STAT_LFBQE 0x00000004 /* Large Buffer Queue Empty */ 556#define NS_STAT_RSQAF 0x00000002 /* Receive Status Queue Almost Full */
600#define NS_STAT_RSQAF 0x00000002 /* Receive Status Queue Almost Full */
601 557
602#define ns_stat_sfbqc_get(stat) (((stat) & NS_STAT_SFBQC_MASK) >> 23) 558#define ns_stat_sfbqc_get(stat) (((stat) & NS_STAT_SFBQC_MASK) >> 23)
603#define ns_stat_lfbqc_get(stat) (((stat) & NS_STAT_LFBQC_MASK) >> 15) 559#define ns_stat_lfbqc_get(stat) (((stat) & NS_STAT_LFBQC_MASK) >> 15)
604 560
605 561/* #defines which depend on other #defines */
606
607/* #defines which depend on other #defines ************************************/
608
609 562
610#define NS_TST0 NS_TST_FRSCD 563#define NS_TST0 NS_TST_FRSCD
611#define NS_TST1 (NS_TST_FRSCD + NS_TST_NUM_ENTRIES + 1) 564#define NS_TST1 (NS_TST_FRSCD + NS_TST_NUM_ENTRIES + 1)
@@ -672,8 +625,7 @@ enum ns_regs
672#define NS_CFG_TSQFIE_OPT 0x00000000 625#define NS_CFG_TSQFIE_OPT 0x00000000
673#endif /* ENABLE_TSQFIE */ 626#endif /* ENABLE_TSQFIE */
674 627
675 628/* PCI stuff */
676/* PCI stuff ******************************************************************/
677 629
678#ifndef PCI_VENDOR_ID_IDT 630#ifndef PCI_VENDOR_ID_IDT
679#define PCI_VENDOR_ID_IDT 0x111D 631#define PCI_VENDOR_ID_IDT 0x111D
@@ -683,138 +635,124 @@ enum ns_regs
683#define PCI_DEVICE_ID_IDT_IDT77201 0x0001 635#define PCI_DEVICE_ID_IDT_IDT77201 0x0001
684#endif /* PCI_DEVICE_ID_IDT_IDT77201 */ 636#endif /* PCI_DEVICE_ID_IDT_IDT77201 */
685 637
638/* Device driver structures */
686 639
687 640struct ns_skb_prv {
688/* Device driver structures ***************************************************/ 641 u32 buf_type; /* BUF_SM/BUF_LG/BUF_NONE */
689 642 u32 dma;
690 643 int iovcnt;
691struct ns_skb_cb {
692 u32 buf_type; /* BUF_SM/BUF_LG/BUF_NONE */
693}; 644};
694 645
695#define NS_SKB_CB(skb) ((struct ns_skb_cb *)((skb)->cb)) 646#define NS_PRV_BUFTYPE(skb) \
696 647 (((struct ns_skb_prv *)(ATM_SKB(skb)+1))->buf_type)
697typedef struct tsq_info 648#define NS_PRV_DMA(skb) \
698{ 649 (((struct ns_skb_prv *)(ATM_SKB(skb)+1))->dma)
699 void *org; 650#define NS_PRV_IOVCNT(skb) \
700 ns_tsi *base; 651 (((struct ns_skb_prv *)(ATM_SKB(skb)+1))->iovcnt)
701 ns_tsi *next; 652
702 ns_tsi *last; 653typedef struct tsq_info {
654 void *org;
655 dma_addr_t dma;
656 ns_tsi *base;
657 ns_tsi *next;
658 ns_tsi *last;
703} tsq_info; 659} tsq_info;
704 660
705 661typedef struct scq_info {
706typedef struct scq_info 662 void *org;
707{ 663 dma_addr_t dma;
708 void *org; 664 ns_scqe *base;
709 ns_scqe *base; 665 ns_scqe *last;
710 ns_scqe *last; 666 ns_scqe *next;
711 ns_scqe *next; 667 volatile ns_scqe *tail; /* Not related to the nicstar register */
712 volatile ns_scqe *tail; /* Not related to the nicstar register */ 668 unsigned num_entries;
713 unsigned num_entries; 669 struct sk_buff **skb; /* Pointer to an array of pointers
714 struct sk_buff **skb; /* Pointer to an array of pointers 670 to the sk_buffs used for tx */
715 to the sk_buffs used for tx */ 671 u32 scd; /* SRAM address of the corresponding
716 u32 scd; /* SRAM address of the corresponding 672 SCD */
717 SCD */ 673 int tbd_count; /* Only meaningful on variable rate */
718 int tbd_count; /* Only meaningful on variable rate */ 674 wait_queue_head_t scqfull_waitq;
719 wait_queue_head_t scqfull_waitq; 675 volatile char full; /* SCQ full indicator */
720 volatile char full; /* SCQ full indicator */ 676 spinlock_t lock; /* SCQ spinlock */
721 spinlock_t lock; /* SCQ spinlock */
722} scq_info; 677} scq_info;
723 678
724 679typedef struct rsq_info {
725 680 void *org;
726typedef struct rsq_info 681 dma_addr_t dma;
727{ 682 ns_rsqe *base;
728 void *org; 683 ns_rsqe *next;
729 ns_rsqe *base; 684 ns_rsqe *last;
730 ns_rsqe *next;
731 ns_rsqe *last;
732} rsq_info; 685} rsq_info;
733 686
734 687typedef struct skb_pool {
735typedef struct skb_pool 688 volatile int count; /* number of buffers in the queue */
736{ 689 struct sk_buff_head queue;
737 volatile int count; /* number of buffers in the queue */
738 struct sk_buff_head queue;
739} skb_pool; 690} skb_pool;
740 691
741/* NOTE: for small and large buffer pools, the count is not used, as the 692/* NOTE: for small and large buffer pools, the count is not used, as the
742 actual value used for buffer management is the one read from the 693 actual value used for buffer management is the one read from the
743 card. */ 694 card. */
744 695
745 696typedef struct vc_map {
746typedef struct vc_map 697 volatile unsigned int tx:1; /* TX vc? */
747{ 698 volatile unsigned int rx:1; /* RX vc? */
748 volatile unsigned int tx:1; /* TX vc? */ 699 struct atm_vcc *tx_vcc, *rx_vcc;
749 volatile unsigned int rx:1; /* RX vc? */ 700 struct sk_buff *rx_iov; /* RX iovector skb */
750 struct atm_vcc *tx_vcc, *rx_vcc; 701 scq_info *scq; /* To keep track of the SCQ */
751 struct sk_buff *rx_iov; /* RX iovector skb */ 702 u32 cbr_scd; /* SRAM address of the corresponding
752 scq_info *scq; /* To keep track of the SCQ */ 703 SCD. 0x00000000 for UBR/VBR/ABR */
753 u32 cbr_scd; /* SRAM address of the corresponding 704 int tbd_count;
754 SCD. 0x00000000 for UBR/VBR/ABR */
755 int tbd_count;
756} vc_map; 705} vc_map;
757 706
758 707typedef struct ns_dev {
759struct ns_skb_data 708 int index; /* Card ID to the device driver */
760{ 709 int sram_size; /* In k x 32bit words. 32 or 128 */
761 struct atm_vcc *vcc; 710 void __iomem *membase; /* Card's memory base address */
762 int iovcnt; 711 unsigned long max_pcr;
763}; 712 int rct_size; /* Number of entries */
764 713 int vpibits;
765#define NS_SKB(skb) (((struct ns_skb_data *) (skb)->cb)) 714 int vcibits;
766 715 struct pci_dev *pcidev;
767 716 struct idr idr;
768typedef struct ns_dev 717 struct atm_dev *atmdev;
769{ 718 tsq_info tsq;
770 int index; /* Card ID to the device driver */ 719 rsq_info rsq;
771 int sram_size; /* In k x 32bit words. 32 or 128 */ 720 scq_info *scq0, *scq1, *scq2; /* VBR SCQs */
772 void __iomem *membase; /* Card's memory base address */ 721 skb_pool sbpool; /* Small buffers */
773 unsigned long max_pcr; 722 skb_pool lbpool; /* Large buffers */
774 int rct_size; /* Number of entries */ 723 skb_pool hbpool; /* Pre-allocated huge buffers */
775 int vpibits; 724 skb_pool iovpool; /* iovector buffers */
776 int vcibits; 725 volatile int efbie; /* Empty free buf. queue int. enabled */
777 struct pci_dev *pcidev; 726 volatile u32 tst_addr; /* SRAM address of the TST in use */
778 struct atm_dev *atmdev; 727 volatile int tst_free_entries;
779 tsq_info tsq; 728 vc_map vcmap[NS_MAX_RCTSIZE];
780 rsq_info rsq; 729 vc_map *tste2vc[NS_TST_NUM_ENTRIES];
781 scq_info *scq0, *scq1, *scq2; /* VBR SCQs */ 730 vc_map *scd2vc[NS_FRSCD_NUM];
782 skb_pool sbpool; /* Small buffers */ 731 buf_nr sbnr;
783 skb_pool lbpool; /* Large buffers */ 732 buf_nr lbnr;
784 skb_pool hbpool; /* Pre-allocated huge buffers */ 733 buf_nr hbnr;
785 skb_pool iovpool; /* iovector buffers */ 734 buf_nr iovnr;
786 volatile int efbie; /* Empty free buf. queue int. enabled */ 735 int sbfqc;
787 volatile u32 tst_addr; /* SRAM address of the TST in use */ 736 int lbfqc;
788 volatile int tst_free_entries; 737 struct sk_buff *sm_handle;
789 vc_map vcmap[NS_MAX_RCTSIZE]; 738 u32 sm_addr;
790 vc_map *tste2vc[NS_TST_NUM_ENTRIES]; 739 struct sk_buff *lg_handle;
791 vc_map *scd2vc[NS_FRSCD_NUM]; 740 u32 lg_addr;
792 buf_nr sbnr; 741 struct sk_buff *rcbuf; /* Current raw cell buffer */
793 buf_nr lbnr; 742 struct ns_rcqe *rawcell;
794 buf_nr hbnr; 743 u32 rawch; /* Raw cell queue head */
795 buf_nr iovnr; 744 unsigned intcnt; /* Interrupt counter */
796 int sbfqc; 745 spinlock_t int_lock; /* Interrupt lock */
797 int lbfqc; 746 spinlock_t res_lock; /* Card resource lock */
798 u32 sm_handle;
799 u32 sm_addr;
800 u32 lg_handle;
801 u32 lg_addr;
802 struct sk_buff *rcbuf; /* Current raw cell buffer */
803 u32 rawch; /* Raw cell queue head */
804 unsigned intcnt; /* Interrupt counter */
805 spinlock_t int_lock; /* Interrupt lock */
806 spinlock_t res_lock; /* Card resource lock */
807} ns_dev; 747} ns_dev;
808 748
809
810 /* NOTE: Each tste2vc entry relates a given TST entry to the corresponding 749 /* NOTE: Each tste2vc entry relates a given TST entry to the corresponding
811 CBR vc. If the entry is not allocated, it must be NULL. 750 CBR vc. If the entry is not allocated, it must be NULL.
812 751
813 There are two TSTs so the driver can modify them on the fly 752 There are two TSTs so the driver can modify them on the fly
814 without stopping the transmission. 753 without stopping the transmission.
815
816 scd2vc allows us to find out unused fixed rate SCDs, because
817 they must have a NULL pointer here. */
818 754
755 scd2vc allows us to find out unused fixed rate SCDs, because
756 they must have a NULL pointer here. */
819 757
820#endif /* _LINUX_NICSTAR_H_ */ 758#endif /* _LINUX_NICSTAR_H_ */
diff --git a/drivers/atm/nicstarmac.c b/drivers/atm/nicstarmac.c
index 842e26c45557..f594526f8c6d 100644
--- a/drivers/atm/nicstarmac.c
+++ b/drivers/atm/nicstarmac.c
@@ -13,15 +13,15 @@ typedef void __iomem *virt_addr_t;
13 13
14#define CYCLE_DELAY 5 14#define CYCLE_DELAY 5
15 15
16/* This was the original definition 16/*
17 This was the original definition
17#define osp_MicroDelay(microsec) \ 18#define osp_MicroDelay(microsec) \
18 do { int _i = 4*microsec; while (--_i > 0) { __SLOW_DOWN_IO; }} while (0) 19 do { int _i = 4*microsec; while (--_i > 0) { __SLOW_DOWN_IO; }} while (0)
19*/ 20*/
20#define osp_MicroDelay(microsec) {unsigned long useconds = (microsec); \ 21#define osp_MicroDelay(microsec) {unsigned long useconds = (microsec); \
21 udelay((useconds));} 22 udelay((useconds));}
22 23/*
23 24 * The following tables represent the timing diagrams found in
24/* The following tables represent the timing diagrams found in
25 * the Data Sheet for the Xicor X25020 EEProm. The #defines below 25 * the Data Sheet for the Xicor X25020 EEProm. The #defines below
26 * represent the bits in the NICStAR's General Purpose register 26 * represent the bits in the NICStAR's General Purpose register
27 * that must be toggled for the corresponding actions on the EEProm 27 * that must be toggled for the corresponding actions on the EEProm
@@ -31,86 +31,80 @@ typedef void __iomem *virt_addr_t;
31/* Write Data To EEProm from SI line on rising edge of CLK */ 31/* Write Data To EEProm from SI line on rising edge of CLK */
32/* Read Data From EEProm on falling edge of CLK */ 32/* Read Data From EEProm on falling edge of CLK */
33 33
34#define CS_HIGH 0x0002 /* Chip select high */ 34#define CS_HIGH 0x0002 /* Chip select high */
35#define CS_LOW 0x0000 /* Chip select low (active low)*/ 35#define CS_LOW 0x0000 /* Chip select low (active low) */
36#define CLK_HIGH 0x0004 /* Clock high */ 36#define CLK_HIGH 0x0004 /* Clock high */
37#define CLK_LOW 0x0000 /* Clock low */ 37#define CLK_LOW 0x0000 /* Clock low */
38#define SI_HIGH 0x0001 /* Serial input data high */ 38#define SI_HIGH 0x0001 /* Serial input data high */
39#define SI_LOW 0x0000 /* Serial input data low */ 39#define SI_LOW 0x0000 /* Serial input data low */
40 40
41/* Read Status Register = 0000 0101b */ 41/* Read Status Register = 0000 0101b */
42#if 0 42#if 0
43static u_int32_t rdsrtab[] = 43static u_int32_t rdsrtab[] = {
44{ 44 CS_HIGH | CLK_HIGH,
45 CS_HIGH | CLK_HIGH, 45 CS_LOW | CLK_LOW,
46 CS_LOW | CLK_LOW, 46 CLK_HIGH, /* 0 */
47 CLK_HIGH, /* 0 */ 47 CLK_LOW,
48 CLK_LOW, 48 CLK_HIGH, /* 0 */
49 CLK_HIGH, /* 0 */ 49 CLK_LOW,
50 CLK_LOW, 50 CLK_HIGH, /* 0 */
51 CLK_HIGH, /* 0 */ 51 CLK_LOW,
52 CLK_LOW, 52 CLK_HIGH, /* 0 */
53 CLK_HIGH, /* 0 */ 53 CLK_LOW,
54 CLK_LOW, 54 CLK_HIGH, /* 0 */
55 CLK_HIGH, /* 0 */ 55 CLK_LOW | SI_HIGH,
56 CLK_LOW | SI_HIGH, 56 CLK_HIGH | SI_HIGH, /* 1 */
57 CLK_HIGH | SI_HIGH, /* 1 */ 57 CLK_LOW | SI_LOW,
58 CLK_LOW | SI_LOW, 58 CLK_HIGH, /* 0 */
59 CLK_HIGH, /* 0 */ 59 CLK_LOW | SI_HIGH,
60 CLK_LOW | SI_HIGH, 60 CLK_HIGH | SI_HIGH /* 1 */
61 CLK_HIGH | SI_HIGH /* 1 */
62}; 61};
63#endif /* 0 */ 62#endif /* 0 */
64
65 63
66/* Read from EEPROM = 0000 0011b */ 64/* Read from EEPROM = 0000 0011b */
67static u_int32_t readtab[] = 65static u_int32_t readtab[] = {
68{ 66 /*
69 /* 67 CS_HIGH | CLK_HIGH,
70 CS_HIGH | CLK_HIGH, 68 */
71 */ 69 CS_LOW | CLK_LOW,
72 CS_LOW | CLK_LOW, 70 CLK_HIGH, /* 0 */
73 CLK_HIGH, /* 0 */ 71 CLK_LOW,
74 CLK_LOW, 72 CLK_HIGH, /* 0 */
75 CLK_HIGH, /* 0 */ 73 CLK_LOW,
76 CLK_LOW, 74 CLK_HIGH, /* 0 */
77 CLK_HIGH, /* 0 */ 75 CLK_LOW,
78 CLK_LOW, 76 CLK_HIGH, /* 0 */
79 CLK_HIGH, /* 0 */ 77 CLK_LOW,
80 CLK_LOW, 78 CLK_HIGH, /* 0 */
81 CLK_HIGH, /* 0 */ 79 CLK_LOW,
82 CLK_LOW, 80 CLK_HIGH, /* 0 */
83 CLK_HIGH, /* 0 */ 81 CLK_LOW | SI_HIGH,
84 CLK_LOW | SI_HIGH, 82 CLK_HIGH | SI_HIGH, /* 1 */
85 CLK_HIGH | SI_HIGH, /* 1 */ 83 CLK_LOW | SI_HIGH,
86 CLK_LOW | SI_HIGH, 84 CLK_HIGH | SI_HIGH /* 1 */
87 CLK_HIGH | SI_HIGH /* 1 */
88}; 85};
89 86
90
91/* Clock to read from/write to the eeprom */ 87/* Clock to read from/write to the eeprom */
92static u_int32_t clocktab[] = 88static u_int32_t clocktab[] = {
93{ 89 CLK_LOW,
94 CLK_LOW, 90 CLK_HIGH,
95 CLK_HIGH, 91 CLK_LOW,
96 CLK_LOW, 92 CLK_HIGH,
97 CLK_HIGH, 93 CLK_LOW,
98 CLK_LOW, 94 CLK_HIGH,
99 CLK_HIGH, 95 CLK_LOW,
100 CLK_LOW, 96 CLK_HIGH,
101 CLK_HIGH, 97 CLK_LOW,
102 CLK_LOW, 98 CLK_HIGH,
103 CLK_HIGH, 99 CLK_LOW,
104 CLK_LOW, 100 CLK_HIGH,
105 CLK_HIGH, 101 CLK_LOW,
106 CLK_LOW, 102 CLK_HIGH,
107 CLK_HIGH, 103 CLK_LOW,
108 CLK_LOW, 104 CLK_HIGH,
109 CLK_HIGH, 105 CLK_LOW
110 CLK_LOW
111}; 106};
112 107
113
114#define NICSTAR_REG_WRITE(bs, reg, val) \ 108#define NICSTAR_REG_WRITE(bs, reg, val) \
115 while ( readl(bs + STAT) & 0x0200 ) ; \ 109 while ( readl(bs + STAT) & 0x0200 ) ; \
116 writel((val),(base)+(reg)) 110 writel((val),(base)+(reg))
@@ -124,153 +118,131 @@ static u_int32_t clocktab[] =
124 * register. 118 * register.
125 */ 119 */
126#if 0 120#if 0
127u_int32_t 121u_int32_t nicstar_read_eprom_status(virt_addr_t base)
128nicstar_read_eprom_status( virt_addr_t base )
129{ 122{
130 u_int32_t val; 123 u_int32_t val;
131 u_int32_t rbyte; 124 u_int32_t rbyte;
132 int32_t i, j; 125 int32_t i, j;
133 126
134 /* Send read instruction */ 127 /* Send read instruction */
135 val = NICSTAR_REG_READ( base, NICSTAR_REG_GENERAL_PURPOSE ) & 0xFFFFFFF0; 128 val = NICSTAR_REG_READ(base, NICSTAR_REG_GENERAL_PURPOSE) & 0xFFFFFFF0;
136 129
137 for (i=0; i<ARRAY_SIZE(rdsrtab); i++) 130 for (i = 0; i < ARRAY_SIZE(rdsrtab); i++) {
138 { 131 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
139 NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE, 132 (val | rdsrtab[i]));
140 (val | rdsrtab[i]) ); 133 osp_MicroDelay(CYCLE_DELAY);
141 osp_MicroDelay( CYCLE_DELAY ); 134 }
142 } 135
143 136 /* Done sending instruction - now pull data off of bit 16, MSB first */
144 /* Done sending instruction - now pull data off of bit 16, MSB first */ 137 /* Data clocked out of eeprom on falling edge of clock */
145 /* Data clocked out of eeprom on falling edge of clock */ 138
146 139 rbyte = 0;
147 rbyte = 0; 140 for (i = 7, j = 0; i >= 0; i--) {
148 for (i=7, j=0; i>=0; i--) 141 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
149 { 142 (val | clocktab[j++]));
150 NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE, 143 rbyte |= (((NICSTAR_REG_READ(base, NICSTAR_REG_GENERAL_PURPOSE)
151 (val | clocktab[j++]) ); 144 & 0x00010000) >> 16) << i);
152 rbyte |= (((NICSTAR_REG_READ( base, NICSTAR_REG_GENERAL_PURPOSE) 145 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
153 & 0x00010000) >> 16) << i); 146 (val | clocktab[j++]));
154 NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE, 147 osp_MicroDelay(CYCLE_DELAY);
155 (val | clocktab[j++]) ); 148 }
156 osp_MicroDelay( CYCLE_DELAY ); 149 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE, 2);
157 } 150 osp_MicroDelay(CYCLE_DELAY);
158 NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE, 2 ); 151 return rbyte;
159 osp_MicroDelay( CYCLE_DELAY );
160 return rbyte;
161} 152}
162#endif /* 0 */ 153#endif /* 0 */
163
164 154
165/* 155/*
166 * This routine will clock the Read_data function into the X2520 156 * This routine will clock the Read_data function into the X2520
167 * eeprom, followed by the address to read from, through the NicSTaR's General 157 * eeprom, followed by the address to read from, through the NicSTaR's General
168 * Purpose register. 158 * Purpose register.
169 */ 159 */
170 160
171static u_int8_t 161static u_int8_t read_eprom_byte(virt_addr_t base, u_int8_t offset)
172read_eprom_byte(virt_addr_t base, u_int8_t offset)
173{ 162{
174 u_int32_t val = 0; 163 u_int32_t val = 0;
175 int i,j=0; 164 int i, j = 0;
176 u_int8_t tempread = 0; 165 u_int8_t tempread = 0;
177 166
178 val = NICSTAR_REG_READ( base, NICSTAR_REG_GENERAL_PURPOSE ) & 0xFFFFFFF0; 167 val = NICSTAR_REG_READ(base, NICSTAR_REG_GENERAL_PURPOSE) & 0xFFFFFFF0;
179 168
180 /* Send READ instruction */ 169 /* Send READ instruction */
181 for (i=0; i<ARRAY_SIZE(readtab); i++) 170 for (i = 0; i < ARRAY_SIZE(readtab); i++) {
182 { 171 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
183 NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE, 172 (val | readtab[i]));
184 (val | readtab[i]) ); 173 osp_MicroDelay(CYCLE_DELAY);
185 osp_MicroDelay( CYCLE_DELAY ); 174 }
186 } 175
187 176 /* Next, we need to send the byte address to read from */
188 /* Next, we need to send the byte address to read from */ 177 for (i = 7; i >= 0; i--) {
189 for (i=7; i>=0; i--) 178 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
190 { 179 (val | clocktab[j++] | ((offset >> i) & 1)));
191 NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE, 180 osp_MicroDelay(CYCLE_DELAY);
192 (val | clocktab[j++] | ((offset >> i) & 1) ) ); 181 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
193 osp_MicroDelay(CYCLE_DELAY); 182 (val | clocktab[j++] | ((offset >> i) & 1)));
194 NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE, 183 osp_MicroDelay(CYCLE_DELAY);
195 (val | clocktab[j++] | ((offset >> i) & 1) ) ); 184 }
196 osp_MicroDelay( CYCLE_DELAY ); 185
197 } 186 j = 0;
198 187
199 j = 0; 188 /* Now, we can read data from the eeprom by clocking it in */
200 189 for (i = 7; i >= 0; i--) {
201 /* Now, we can read data from the eeprom by clocking it in */ 190 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
202 for (i=7; i>=0; i--) 191 (val | clocktab[j++]));
203 { 192 osp_MicroDelay(CYCLE_DELAY);
204 NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE, 193 tempread |=
205 (val | clocktab[j++]) ); 194 (((NICSTAR_REG_READ(base, NICSTAR_REG_GENERAL_PURPOSE)
206 osp_MicroDelay( CYCLE_DELAY ); 195 & 0x00010000) >> 16) << i);
207 tempread |= (((NICSTAR_REG_READ( base, NICSTAR_REG_GENERAL_PURPOSE ) 196 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
208 & 0x00010000) >> 16) << i); 197 (val | clocktab[j++]));
209 NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE, 198 osp_MicroDelay(CYCLE_DELAY);
210 (val | clocktab[j++]) ); 199 }
211 osp_MicroDelay( CYCLE_DELAY ); 200
212 } 201 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE, 2);
213 202 osp_MicroDelay(CYCLE_DELAY);
214 NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE, 2 ); 203 return tempread;
215 osp_MicroDelay( CYCLE_DELAY );
216 return tempread;
217} 204}
218 205
219 206static void nicstar_init_eprom(virt_addr_t base)
220static void
221nicstar_init_eprom( virt_addr_t base )
222{ 207{
223 u_int32_t val; 208 u_int32_t val;
224 209
225 /* 210 /*
226 * turn chip select off 211 * turn chip select off
227 */ 212 */
228 val = NICSTAR_REG_READ(base, NICSTAR_REG_GENERAL_PURPOSE) & 0xFFFFFFF0; 213 val = NICSTAR_REG_READ(base, NICSTAR_REG_GENERAL_PURPOSE) & 0xFFFFFFF0;
229 214
230 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE, 215 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
231 (val | CS_HIGH | CLK_HIGH)); 216 (val | CS_HIGH | CLK_HIGH));
232 osp_MicroDelay( CYCLE_DELAY ); 217 osp_MicroDelay(CYCLE_DELAY);
233 218
234 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE, 219 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
235 (val | CS_HIGH | CLK_LOW)); 220 (val | CS_HIGH | CLK_LOW));
236 osp_MicroDelay( CYCLE_DELAY ); 221 osp_MicroDelay(CYCLE_DELAY);
237 222
238 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE, 223 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
239 (val | CS_HIGH | CLK_HIGH)); 224 (val | CS_HIGH | CLK_HIGH));
240 osp_MicroDelay( CYCLE_DELAY ); 225 osp_MicroDelay(CYCLE_DELAY);
241 226
242 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE, 227 NICSTAR_REG_WRITE(base, NICSTAR_REG_GENERAL_PURPOSE,
243 (val | CS_HIGH | CLK_LOW)); 228 (val | CS_HIGH | CLK_LOW));
244 osp_MicroDelay( CYCLE_DELAY ); 229 osp_MicroDelay(CYCLE_DELAY);
245} 230}
246 231
247
248/* 232/*
249 * This routine will be the interface to the ReadPromByte function 233 * This routine will be the interface to the ReadPromByte function
250 * above. 234 * above.
251 */ 235 */
252 236
253static void 237static void
254nicstar_read_eprom( 238nicstar_read_eprom(virt_addr_t base,
255 virt_addr_t base, 239 u_int8_t prom_offset, u_int8_t * buffer, u_int32_t nbytes)
256 u_int8_t prom_offset,
257 u_int8_t *buffer,
258 u_int32_t nbytes )
259{ 240{
260 u_int i; 241 u_int i;
261
262 for (i=0; i<nbytes; i++)
263 {
264 buffer[i] = read_eprom_byte( base, prom_offset );
265 ++prom_offset;
266 osp_MicroDelay( CYCLE_DELAY );
267 }
268}
269
270 242
271/* 243 for (i = 0; i < nbytes; i++) {
272void osp_MicroDelay(int x) { 244 buffer[i] = read_eprom_byte(base, prom_offset);
273 245 ++prom_offset;
246 osp_MicroDelay(CYCLE_DELAY);
247 }
274} 248}
275*/
276
diff --git a/drivers/atm/solos-pci.c b/drivers/atm/solos-pci.c
index ded76c4c9f4f..6174965d9a4d 100644
--- a/drivers/atm/solos-pci.c
+++ b/drivers/atm/solos-pci.c
@@ -383,7 +383,7 @@ static int process_status(struct solos_card *card, int port, struct sk_buff *skb
383 383
384 /* Anything but 'Showtime' is down */ 384 /* Anything but 'Showtime' is down */
385 if (strcmp(state_str, "Showtime")) { 385 if (strcmp(state_str, "Showtime")) {
386 card->atmdev[port]->signal = ATM_PHY_SIG_LOST; 386 atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_LOST);
387 release_vccs(card->atmdev[port]); 387 release_vccs(card->atmdev[port]);
388 dev_info(&card->dev->dev, "Port %d: %s\n", port, state_str); 388 dev_info(&card->dev->dev, "Port %d: %s\n", port, state_str);
389 return 0; 389 return 0;
@@ -401,7 +401,7 @@ static int process_status(struct solos_card *card, int port, struct sk_buff *skb
401 snr[0]?", SNR ":"", snr, attn[0]?", Attn ":"", attn); 401 snr[0]?", SNR ":"", snr, attn[0]?", Attn ":"", attn);
402 402
403 card->atmdev[port]->link_rate = rate_down / 424; 403 card->atmdev[port]->link_rate = rate_down / 424;
404 card->atmdev[port]->signal = ATM_PHY_SIG_FOUND; 404 atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_FOUND);
405 405
406 return 0; 406 return 0;
407} 407}
@@ -1246,7 +1246,7 @@ static int atm_init(struct solos_card *card)
1246 card->atmdev[i]->ci_range.vci_bits = 16; 1246 card->atmdev[i]->ci_range.vci_bits = 16;
1247 card->atmdev[i]->dev_data = card; 1247 card->atmdev[i]->dev_data = card;
1248 card->atmdev[i]->phy_data = (void *)(unsigned long)i; 1248 card->atmdev[i]->phy_data = (void *)(unsigned long)i;
1249 card->atmdev[i]->signal = ATM_PHY_SIG_UNKNOWN; 1249 atm_dev_signal_change(card->atmdev[i], ATM_PHY_SIG_UNKNOWN);
1250 1250
1251 skb = alloc_skb(sizeof(*header), GFP_ATOMIC); 1251 skb = alloc_skb(sizeof(*header), GFP_ATOMIC);
1252 if (!skb) { 1252 if (!skb) {
diff --git a/drivers/atm/suni.c b/drivers/atm/suni.c
index da4b91ffa53e..41c56eae4c81 100644
--- a/drivers/atm/suni.c
+++ b/drivers/atm/suni.c
@@ -291,8 +291,9 @@ static int suni_ioctl(struct atm_dev *dev,unsigned int cmd,void __user *arg)
291 291
292static void poll_los(struct atm_dev *dev) 292static void poll_los(struct atm_dev *dev)
293{ 293{
294 dev->signal = GET(RSOP_SIS) & SUNI_RSOP_SIS_LOSV ? ATM_PHY_SIG_LOST : 294 atm_dev_signal_change(dev,
295 ATM_PHY_SIG_FOUND; 295 GET(RSOP_SIS) & SUNI_RSOP_SIS_LOSV ?
296 ATM_PHY_SIG_LOST : ATM_PHY_SIG_FOUND);
296} 297}
297 298
298 299
diff --git a/drivers/atm/zatm.c b/drivers/atm/zatm.c
index 702accec89e9..4e885d2da49c 100644
--- a/drivers/atm/zatm.c
+++ b/drivers/atm/zatm.c
@@ -1637,10 +1637,8 @@ out_free:
1637MODULE_LICENSE("GPL"); 1637MODULE_LICENSE("GPL");
1638 1638
1639static struct pci_device_id zatm_pci_tbl[] __devinitdata = { 1639static struct pci_device_id zatm_pci_tbl[] __devinitdata = {
1640 { PCI_VENDOR_ID_ZEITNET, PCI_DEVICE_ID_ZEITNET_1221, 1640 { PCI_VDEVICE(ZEITNET, PCI_DEVICE_ID_ZEITNET_1221), ZATM_COPPER },
1641 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ZATM_COPPER }, 1641 { PCI_VDEVICE(ZEITNET, PCI_DEVICE_ID_ZEITNET_1225), 0 },
1642 { PCI_VENDOR_ID_ZEITNET, PCI_DEVICE_ID_ZEITNET_1225,
1643 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
1644 { 0, } 1642 { 0, }
1645}; 1643};
1646MODULE_DEVICE_TABLE(pci, zatm_pci_tbl); 1644MODULE_DEVICE_TABLE(pci, zatm_pci_tbl);
diff --git a/drivers/base/core.c b/drivers/base/core.c
index 9630fbdf4e6c..f8e72724dd4b 100644
--- a/drivers/base/core.c
+++ b/drivers/base/core.c
@@ -673,7 +673,7 @@ static struct kobject *get_device_parent(struct device *dev,
673 */ 673 */
674 if (parent == NULL) 674 if (parent == NULL)
675 parent_kobj = virtual_device_parent(dev); 675 parent_kobj = virtual_device_parent(dev);
676 else if (parent->class) 676 else if (parent->class && !dev->class->ns_type)
677 return &parent->kobj; 677 return &parent->kobj;
678 else 678 else
679 parent_kobj = &parent->kobj; 679 parent_kobj = &parent->kobj;
@@ -1819,3 +1819,67 @@ void device_shutdown(void)
1819 spin_unlock(&devices_kset->list_lock); 1819 spin_unlock(&devices_kset->list_lock);
1820 async_synchronize_full(); 1820 async_synchronize_full();
1821} 1821}
1822
1823/*
1824 * Device logging functions
1825 */
1826
1827#ifdef CONFIG_PRINTK
1828
1829static int __dev_printk(const char *level, const struct device *dev,
1830 struct va_format *vaf)
1831{
1832 if (!dev)
1833 return printk("%s(NULL device *): %pV", level, vaf);
1834
1835 return printk("%s%s %s: %pV",
1836 level, dev_driver_string(dev), dev_name(dev), vaf);
1837}
1838
1839int dev_printk(const char *level, const struct device *dev,
1840 const char *fmt, ...)
1841{
1842 struct va_format vaf;
1843 va_list args;
1844 int r;
1845
1846 va_start(args, fmt);
1847
1848 vaf.fmt = fmt;
1849 vaf.va = &args;
1850
1851 r = __dev_printk(level, dev, &vaf);
1852 va_end(args);
1853
1854 return r;
1855}
1856EXPORT_SYMBOL(dev_printk);
1857
1858#define define_dev_printk_level(func, kern_level) \
1859int func(const struct device *dev, const char *fmt, ...) \
1860{ \
1861 struct va_format vaf; \
1862 va_list args; \
1863 int r; \
1864 \
1865 va_start(args, fmt); \
1866 \
1867 vaf.fmt = fmt; \
1868 vaf.va = &args; \
1869 \
1870 r = __dev_printk(kern_level, dev, &vaf); \
1871 va_end(args); \
1872 \
1873 return r; \
1874} \
1875EXPORT_SYMBOL(func);
1876
1877define_dev_printk_level(dev_emerg, KERN_EMERG);
1878define_dev_printk_level(dev_alert, KERN_ALERT);
1879define_dev_printk_level(dev_crit, KERN_CRIT);
1880define_dev_printk_level(dev_err, KERN_ERR);
1881define_dev_printk_level(dev_warn, KERN_WARNING);
1882define_dev_printk_level(dev_notice, KERN_NOTICE);
1883define_dev_printk_level(_dev_info, KERN_INFO);
1884
1885#endif
diff --git a/drivers/base/platform.c b/drivers/base/platform.c
index 4d99c8bdfedc..f699fabf403b 100644
--- a/drivers/base/platform.c
+++ b/drivers/base/platform.c
@@ -12,6 +12,7 @@
12 12
13#include <linux/string.h> 13#include <linux/string.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/of_device.h>
15#include <linux/module.h> 16#include <linux/module.h>
16#include <linux/init.h> 17#include <linux/init.h>
17#include <linux/dma-mapping.h> 18#include <linux/dma-mapping.h>
@@ -635,6 +636,12 @@ static struct device_attribute platform_dev_attrs[] = {
635static int platform_uevent(struct device *dev, struct kobj_uevent_env *env) 636static int platform_uevent(struct device *dev, struct kobj_uevent_env *env)
636{ 637{
637 struct platform_device *pdev = to_platform_device(dev); 638 struct platform_device *pdev = to_platform_device(dev);
639 int rc;
640
641 /* Some devices have extra OF data and an OF-style MODALIAS */
642 rc = of_device_uevent(dev,env);
643 if (rc != -ENODEV)
644 return rc;
638 645
639 add_uevent_var(env, "MODALIAS=%s%s", PLATFORM_MODULE_PREFIX, 646 add_uevent_var(env, "MODALIAS=%s%s", PLATFORM_MODULE_PREFIX,
640 (pdev->id_entry) ? pdev->id_entry->name : pdev->name); 647 (pdev->id_entry) ? pdev->id_entry->name : pdev->name);
@@ -673,7 +680,11 @@ static int platform_match(struct device *dev, struct device_driver *drv)
673 struct platform_device *pdev = to_platform_device(dev); 680 struct platform_device *pdev = to_platform_device(dev);
674 struct platform_driver *pdrv = to_platform_driver(drv); 681 struct platform_driver *pdrv = to_platform_driver(drv);
675 682
676 /* match against the id table first */ 683 /* Attempt an OF style match first */
684 if (of_driver_match_device(dev, drv))
685 return 1;
686
687 /* Then try to match against the id table */
677 if (pdrv->id_table) 688 if (pdrv->id_table)
678 return platform_match_id(pdrv->id_table, pdev) != NULL; 689 return platform_match_id(pdrv->id_table, pdev) != NULL;
679 690
diff --git a/drivers/base/power/Makefile b/drivers/base/power/Makefile
index 89de75325cea..cbccf9a3cee4 100644
--- a/drivers/base/power/Makefile
+++ b/drivers/base/power/Makefile
@@ -1,5 +1,5 @@
1obj-$(CONFIG_PM) += sysfs.o 1obj-$(CONFIG_PM) += sysfs.o
2obj-$(CONFIG_PM_SLEEP) += main.o 2obj-$(CONFIG_PM_SLEEP) += main.o wakeup.o
3obj-$(CONFIG_PM_RUNTIME) += runtime.o 3obj-$(CONFIG_PM_RUNTIME) += runtime.o
4obj-$(CONFIG_PM_OPS) += generic_ops.o 4obj-$(CONFIG_PM_OPS) += generic_ops.o
5obj-$(CONFIG_PM_TRACE_RTC) += trace.o 5obj-$(CONFIG_PM_TRACE_RTC) += trace.o
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
index 941fcb87e52a..5419a49ff135 100644
--- a/drivers/base/power/main.c
+++ b/drivers/base/power/main.c
@@ -59,6 +59,7 @@ void device_pm_init(struct device *dev)
59{ 59{
60 dev->power.status = DPM_ON; 60 dev->power.status = DPM_ON;
61 init_completion(&dev->power.completion); 61 init_completion(&dev->power.completion);
62 dev->power.wakeup_count = 0;
62 pm_runtime_init(dev); 63 pm_runtime_init(dev);
63} 64}
64 65
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
index b0ec0e9f27e9..b78c401ffa73 100644
--- a/drivers/base/power/runtime.c
+++ b/drivers/base/power/runtime.c
@@ -123,6 +123,45 @@ int pm_runtime_idle(struct device *dev)
123} 123}
124EXPORT_SYMBOL_GPL(pm_runtime_idle); 124EXPORT_SYMBOL_GPL(pm_runtime_idle);
125 125
126
127/**
128 * update_pm_runtime_accounting - Update the time accounting of power states
129 * @dev: Device to update the accounting for
130 *
131 * In order to be able to have time accounting of the various power states
132 * (as used by programs such as PowerTOP to show the effectiveness of runtime
133 * PM), we need to track the time spent in each state.
134 * update_pm_runtime_accounting must be called each time before the
135 * runtime_status field is updated, to account the time in the old state
136 * correctly.
137 */
138void update_pm_runtime_accounting(struct device *dev)
139{
140 unsigned long now = jiffies;
141 int delta;
142
143 delta = now - dev->power.accounting_timestamp;
144
145 if (delta < 0)
146 delta = 0;
147
148 dev->power.accounting_timestamp = now;
149
150 if (dev->power.disable_depth > 0)
151 return;
152
153 if (dev->power.runtime_status == RPM_SUSPENDED)
154 dev->power.suspended_jiffies += delta;
155 else
156 dev->power.active_jiffies += delta;
157}
158
159static void __update_runtime_status(struct device *dev, enum rpm_status status)
160{
161 update_pm_runtime_accounting(dev);
162 dev->power.runtime_status = status;
163}
164
126/** 165/**
127 * __pm_runtime_suspend - Carry out run-time suspend of given device. 166 * __pm_runtime_suspend - Carry out run-time suspend of given device.
128 * @dev: Device to suspend. 167 * @dev: Device to suspend.
@@ -197,7 +236,7 @@ int __pm_runtime_suspend(struct device *dev, bool from_wq)
197 goto repeat; 236 goto repeat;
198 } 237 }
199 238
200 dev->power.runtime_status = RPM_SUSPENDING; 239 __update_runtime_status(dev, RPM_SUSPENDING);
201 dev->power.deferred_resume = false; 240 dev->power.deferred_resume = false;
202 241
203 if (dev->bus && dev->bus->pm && dev->bus->pm->runtime_suspend) { 242 if (dev->bus && dev->bus->pm && dev->bus->pm->runtime_suspend) {
@@ -228,7 +267,7 @@ int __pm_runtime_suspend(struct device *dev, bool from_wq)
228 } 267 }
229 268
230 if (retval) { 269 if (retval) {
231 dev->power.runtime_status = RPM_ACTIVE; 270 __update_runtime_status(dev, RPM_ACTIVE);
232 if (retval == -EAGAIN || retval == -EBUSY) { 271 if (retval == -EAGAIN || retval == -EBUSY) {
233 if (dev->power.timer_expires == 0) 272 if (dev->power.timer_expires == 0)
234 notify = true; 273 notify = true;
@@ -237,7 +276,7 @@ int __pm_runtime_suspend(struct device *dev, bool from_wq)
237 pm_runtime_cancel_pending(dev); 276 pm_runtime_cancel_pending(dev);
238 } 277 }
239 } else { 278 } else {
240 dev->power.runtime_status = RPM_SUSPENDED; 279 __update_runtime_status(dev, RPM_SUSPENDED);
241 pm_runtime_deactivate_timer(dev); 280 pm_runtime_deactivate_timer(dev);
242 281
243 if (dev->parent) { 282 if (dev->parent) {
@@ -381,7 +420,7 @@ int __pm_runtime_resume(struct device *dev, bool from_wq)
381 goto repeat; 420 goto repeat;
382 } 421 }
383 422
384 dev->power.runtime_status = RPM_RESUMING; 423 __update_runtime_status(dev, RPM_RESUMING);
385 424
386 if (dev->bus && dev->bus->pm && dev->bus->pm->runtime_resume) { 425 if (dev->bus && dev->bus->pm && dev->bus->pm->runtime_resume) {
387 spin_unlock_irq(&dev->power.lock); 426 spin_unlock_irq(&dev->power.lock);
@@ -411,10 +450,10 @@ int __pm_runtime_resume(struct device *dev, bool from_wq)
411 } 450 }
412 451
413 if (retval) { 452 if (retval) {
414 dev->power.runtime_status = RPM_SUSPENDED; 453 __update_runtime_status(dev, RPM_SUSPENDED);
415 pm_runtime_cancel_pending(dev); 454 pm_runtime_cancel_pending(dev);
416 } else { 455 } else {
417 dev->power.runtime_status = RPM_ACTIVE; 456 __update_runtime_status(dev, RPM_ACTIVE);
418 if (parent) 457 if (parent)
419 atomic_inc(&parent->power.child_count); 458 atomic_inc(&parent->power.child_count);
420 } 459 }
@@ -848,7 +887,7 @@ int __pm_runtime_set_status(struct device *dev, unsigned int status)
848 } 887 }
849 888
850 out_set: 889 out_set:
851 dev->power.runtime_status = status; 890 __update_runtime_status(dev, status);
852 dev->power.runtime_error = 0; 891 dev->power.runtime_error = 0;
853 out: 892 out:
854 spin_unlock_irqrestore(&dev->power.lock, flags); 893 spin_unlock_irqrestore(&dev->power.lock, flags);
@@ -1077,6 +1116,7 @@ void pm_runtime_init(struct device *dev)
1077 dev->power.request_pending = false; 1116 dev->power.request_pending = false;
1078 dev->power.request = RPM_REQ_NONE; 1117 dev->power.request = RPM_REQ_NONE;
1079 dev->power.deferred_resume = false; 1118 dev->power.deferred_resume = false;
1119 dev->power.accounting_timestamp = jiffies;
1080 INIT_WORK(&dev->power.work, pm_runtime_work); 1120 INIT_WORK(&dev->power.work, pm_runtime_work);
1081 1121
1082 dev->power.timer_expires = 0; 1122 dev->power.timer_expires = 0;
diff --git a/drivers/base/power/sysfs.c b/drivers/base/power/sysfs.c
index a4c33bc51257..e56b4388fe61 100644
--- a/drivers/base/power/sysfs.c
+++ b/drivers/base/power/sysfs.c
@@ -6,6 +6,7 @@
6#include <linux/string.h> 6#include <linux/string.h>
7#include <linux/pm_runtime.h> 7#include <linux/pm_runtime.h>
8#include <asm/atomic.h> 8#include <asm/atomic.h>
9#include <linux/jiffies.h>
9#include "power.h" 10#include "power.h"
10 11
11/* 12/*
@@ -73,6 +74,8 @@
73 * device are known to the PM core. However, for some devices this 74 * device are known to the PM core. However, for some devices this
74 * attribute is set to "enabled" by bus type code or device drivers and in 75 * attribute is set to "enabled" by bus type code or device drivers and in
75 * that cases it should be safe to leave the default value. 76 * that cases it should be safe to leave the default value.
77 *
78 * wakeup_count - Report the number of wakeup events related to the device
76 */ 79 */
77 80
78static const char enabled[] = "enabled"; 81static const char enabled[] = "enabled";
@@ -108,6 +111,65 @@ static ssize_t control_store(struct device * dev, struct device_attribute *attr,
108} 111}
109 112
110static DEVICE_ATTR(control, 0644, control_show, control_store); 113static DEVICE_ATTR(control, 0644, control_show, control_store);
114
115static ssize_t rtpm_active_time_show(struct device *dev,
116 struct device_attribute *attr, char *buf)
117{
118 int ret;
119 spin_lock_irq(&dev->power.lock);
120 update_pm_runtime_accounting(dev);
121 ret = sprintf(buf, "%i\n", jiffies_to_msecs(dev->power.active_jiffies));
122 spin_unlock_irq(&dev->power.lock);
123 return ret;
124}
125
126static DEVICE_ATTR(runtime_active_time, 0444, rtpm_active_time_show, NULL);
127
128static ssize_t rtpm_suspended_time_show(struct device *dev,
129 struct device_attribute *attr, char *buf)
130{
131 int ret;
132 spin_lock_irq(&dev->power.lock);
133 update_pm_runtime_accounting(dev);
134 ret = sprintf(buf, "%i\n",
135 jiffies_to_msecs(dev->power.suspended_jiffies));
136 spin_unlock_irq(&dev->power.lock);
137 return ret;
138}
139
140static DEVICE_ATTR(runtime_suspended_time, 0444, rtpm_suspended_time_show, NULL);
141
142static ssize_t rtpm_status_show(struct device *dev,
143 struct device_attribute *attr, char *buf)
144{
145 const char *p;
146
147 if (dev->power.runtime_error) {
148 p = "error\n";
149 } else if (dev->power.disable_depth) {
150 p = "unsupported\n";
151 } else {
152 switch (dev->power.runtime_status) {
153 case RPM_SUSPENDED:
154 p = "suspended\n";
155 break;
156 case RPM_SUSPENDING:
157 p = "suspending\n";
158 break;
159 case RPM_RESUMING:
160 p = "resuming\n";
161 break;
162 case RPM_ACTIVE:
163 p = "active\n";
164 break;
165 default:
166 return -EIO;
167 }
168 }
169 return sprintf(buf, p);
170}
171
172static DEVICE_ATTR(runtime_status, 0444, rtpm_status_show, NULL);
111#endif 173#endif
112 174
113static ssize_t 175static ssize_t
@@ -144,6 +206,16 @@ wake_store(struct device * dev, struct device_attribute *attr,
144 206
145static DEVICE_ATTR(wakeup, 0644, wake_show, wake_store); 207static DEVICE_ATTR(wakeup, 0644, wake_show, wake_store);
146 208
209#ifdef CONFIG_PM_SLEEP
210static ssize_t wakeup_count_show(struct device *dev,
211 struct device_attribute *attr, char *buf)
212{
213 return sprintf(buf, "%lu\n", dev->power.wakeup_count);
214}
215
216static DEVICE_ATTR(wakeup_count, 0444, wakeup_count_show, NULL);
217#endif
218
147#ifdef CONFIG_PM_ADVANCED_DEBUG 219#ifdef CONFIG_PM_ADVANCED_DEBUG
148#ifdef CONFIG_PM_RUNTIME 220#ifdef CONFIG_PM_RUNTIME
149 221
@@ -172,27 +244,8 @@ static ssize_t rtpm_enabled_show(struct device *dev,
172 return sprintf(buf, "enabled\n"); 244 return sprintf(buf, "enabled\n");
173} 245}
174 246
175static ssize_t rtpm_status_show(struct device *dev,
176 struct device_attribute *attr, char *buf)
177{
178 if (dev->power.runtime_error)
179 return sprintf(buf, "error\n");
180 switch (dev->power.runtime_status) {
181 case RPM_SUSPENDED:
182 return sprintf(buf, "suspended\n");
183 case RPM_SUSPENDING:
184 return sprintf(buf, "suspending\n");
185 case RPM_RESUMING:
186 return sprintf(buf, "resuming\n");
187 case RPM_ACTIVE:
188 return sprintf(buf, "active\n");
189 }
190 return -EIO;
191}
192
193static DEVICE_ATTR(runtime_usage, 0444, rtpm_usagecount_show, NULL); 247static DEVICE_ATTR(runtime_usage, 0444, rtpm_usagecount_show, NULL);
194static DEVICE_ATTR(runtime_active_kids, 0444, rtpm_children_show, NULL); 248static DEVICE_ATTR(runtime_active_kids, 0444, rtpm_children_show, NULL);
195static DEVICE_ATTR(runtime_status, 0444, rtpm_status_show, NULL);
196static DEVICE_ATTR(runtime_enabled, 0444, rtpm_enabled_show, NULL); 249static DEVICE_ATTR(runtime_enabled, 0444, rtpm_enabled_show, NULL);
197 250
198#endif 251#endif
@@ -228,14 +281,19 @@ static DEVICE_ATTR(async, 0644, async_show, async_store);
228static struct attribute * power_attrs[] = { 281static struct attribute * power_attrs[] = {
229#ifdef CONFIG_PM_RUNTIME 282#ifdef CONFIG_PM_RUNTIME
230 &dev_attr_control.attr, 283 &dev_attr_control.attr,
284 &dev_attr_runtime_status.attr,
285 &dev_attr_runtime_suspended_time.attr,
286 &dev_attr_runtime_active_time.attr,
231#endif 287#endif
232 &dev_attr_wakeup.attr, 288 &dev_attr_wakeup.attr,
289#ifdef CONFIG_PM_SLEEP
290 &dev_attr_wakeup_count.attr,
291#endif
233#ifdef CONFIG_PM_ADVANCED_DEBUG 292#ifdef CONFIG_PM_ADVANCED_DEBUG
234 &dev_attr_async.attr, 293 &dev_attr_async.attr,
235#ifdef CONFIG_PM_RUNTIME 294#ifdef CONFIG_PM_RUNTIME
236 &dev_attr_runtime_usage.attr, 295 &dev_attr_runtime_usage.attr,
237 &dev_attr_runtime_active_kids.attr, 296 &dev_attr_runtime_active_kids.attr,
238 &dev_attr_runtime_status.attr,
239 &dev_attr_runtime_enabled.attr, 297 &dev_attr_runtime_enabled.attr,
240#endif 298#endif
241#endif 299#endif
diff --git a/drivers/base/power/wakeup.c b/drivers/base/power/wakeup.c
new file mode 100644
index 000000000000..eb594facfc3f
--- /dev/null
+++ b/drivers/base/power/wakeup.c
@@ -0,0 +1,247 @@
1/*
2 * drivers/base/power/wakeup.c - System wakeup events framework
3 *
4 * Copyright (c) 2010 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
5 *
6 * This file is released under the GPLv2.
7 */
8
9#include <linux/device.h>
10#include <linux/slab.h>
11#include <linux/sched.h>
12#include <linux/capability.h>
13#include <linux/suspend.h>
14#include <linux/pm.h>
15
16/*
17 * If set, the suspend/hibernate code will abort transitions to a sleep state
18 * if wakeup events are registered during or immediately before the transition.
19 */
20bool events_check_enabled;
21
22/* The counter of registered wakeup events. */
23static unsigned long event_count;
24/* A preserved old value of event_count. */
25static unsigned long saved_event_count;
26/* The counter of wakeup events being processed. */
27static unsigned long events_in_progress;
28
29static DEFINE_SPINLOCK(events_lock);
30
31static void pm_wakeup_timer_fn(unsigned long data);
32
33static DEFINE_TIMER(events_timer, pm_wakeup_timer_fn, 0, 0);
34static unsigned long events_timer_expires;
35
36/*
37 * The functions below use the observation that each wakeup event starts a
38 * period in which the system should not be suspended. The moment this period
39 * will end depends on how the wakeup event is going to be processed after being
40 * detected and all of the possible cases can be divided into two distinct
41 * groups.
42 *
43 * First, a wakeup event may be detected by the same functional unit that will
44 * carry out the entire processing of it and possibly will pass it to user space
45 * for further processing. In that case the functional unit that has detected
46 * the event may later "close" the "no suspend" period associated with it
47 * directly as soon as it has been dealt with. The pair of pm_stay_awake() and
48 * pm_relax(), balanced with each other, is supposed to be used in such
49 * situations.
50 *
51 * Second, a wakeup event may be detected by one functional unit and processed
52 * by another one. In that case the unit that has detected it cannot really
53 * "close" the "no suspend" period associated with it, unless it knows in
54 * advance what's going to happen to the event during processing. This
55 * knowledge, however, may not be available to it, so it can simply specify time
56 * to wait before the system can be suspended and pass it as the second
57 * argument of pm_wakeup_event().
58 */
59
60/**
61 * pm_stay_awake - Notify the PM core that a wakeup event is being processed.
62 * @dev: Device the wakeup event is related to.
63 *
64 * Notify the PM core of a wakeup event (signaled by @dev) by incrementing the
65 * counter of wakeup events being processed. If @dev is not NULL, the counter
66 * of wakeup events related to @dev is incremented too.
67 *
68 * Call this function after detecting of a wakeup event if pm_relax() is going
69 * to be called directly after processing the event (and possibly passing it to
70 * user space for further processing).
71 *
72 * It is safe to call this function from interrupt context.
73 */
74void pm_stay_awake(struct device *dev)
75{
76 unsigned long flags;
77
78 spin_lock_irqsave(&events_lock, flags);
79 if (dev)
80 dev->power.wakeup_count++;
81
82 events_in_progress++;
83 spin_unlock_irqrestore(&events_lock, flags);
84}
85
86/**
87 * pm_relax - Notify the PM core that processing of a wakeup event has ended.
88 *
89 * Notify the PM core that a wakeup event has been processed by decrementing
90 * the counter of wakeup events being processed and incrementing the counter
91 * of registered wakeup events.
92 *
93 * Call this function for wakeup events whose processing started with calling
94 * pm_stay_awake().
95 *
96 * It is safe to call it from interrupt context.
97 */
98void pm_relax(void)
99{
100 unsigned long flags;
101
102 spin_lock_irqsave(&events_lock, flags);
103 if (events_in_progress) {
104 events_in_progress--;
105 event_count++;
106 }
107 spin_unlock_irqrestore(&events_lock, flags);
108}
109
110/**
111 * pm_wakeup_timer_fn - Delayed finalization of a wakeup event.
112 *
113 * Decrease the counter of wakeup events being processed after it was increased
114 * by pm_wakeup_event().
115 */
116static void pm_wakeup_timer_fn(unsigned long data)
117{
118 unsigned long flags;
119
120 spin_lock_irqsave(&events_lock, flags);
121 if (events_timer_expires
122 && time_before_eq(events_timer_expires, jiffies)) {
123 events_in_progress--;
124 events_timer_expires = 0;
125 }
126 spin_unlock_irqrestore(&events_lock, flags);
127}
128
129/**
130 * pm_wakeup_event - Notify the PM core of a wakeup event.
131 * @dev: Device the wakeup event is related to.
132 * @msec: Anticipated event processing time (in milliseconds).
133 *
134 * Notify the PM core of a wakeup event (signaled by @dev) that will take
135 * approximately @msec milliseconds to be processed by the kernel. Increment
136 * the counter of registered wakeup events and (if @msec is nonzero) set up
137 * the wakeup events timer to execute pm_wakeup_timer_fn() in future (if the
138 * timer has not been set up already, increment the counter of wakeup events
139 * being processed). If @dev is not NULL, the counter of wakeup events related
140 * to @dev is incremented too.
141 *
142 * It is safe to call this function from interrupt context.
143 */
144void pm_wakeup_event(struct device *dev, unsigned int msec)
145{
146 unsigned long flags;
147
148 spin_lock_irqsave(&events_lock, flags);
149 event_count++;
150 if (dev)
151 dev->power.wakeup_count++;
152
153 if (msec) {
154 unsigned long expires;
155
156 expires = jiffies + msecs_to_jiffies(msec);
157 if (!expires)
158 expires = 1;
159
160 if (!events_timer_expires
161 || time_after(expires, events_timer_expires)) {
162 if (!events_timer_expires)
163 events_in_progress++;
164
165 mod_timer(&events_timer, expires);
166 events_timer_expires = expires;
167 }
168 }
169 spin_unlock_irqrestore(&events_lock, flags);
170}
171
172/**
173 * pm_check_wakeup_events - Check for new wakeup events.
174 *
175 * Compare the current number of registered wakeup events with its preserved
176 * value from the past to check if new wakeup events have been registered since
177 * the old value was stored. Check if the current number of wakeup events being
178 * processed is zero.
179 */
180bool pm_check_wakeup_events(void)
181{
182 unsigned long flags;
183 bool ret = true;
184
185 spin_lock_irqsave(&events_lock, flags);
186 if (events_check_enabled) {
187 ret = (event_count == saved_event_count) && !events_in_progress;
188 events_check_enabled = ret;
189 }
190 spin_unlock_irqrestore(&events_lock, flags);
191 return ret;
192}
193
194/**
195 * pm_get_wakeup_count - Read the number of registered wakeup events.
196 * @count: Address to store the value at.
197 *
198 * Store the number of registered wakeup events at the address in @count. Block
199 * if the current number of wakeup events being processed is nonzero.
200 *
201 * Return false if the wait for the number of wakeup events being processed to
202 * drop down to zero has been interrupted by a signal (and the current number
203 * of wakeup events being processed is still nonzero). Otherwise return true.
204 */
205bool pm_get_wakeup_count(unsigned long *count)
206{
207 bool ret;
208
209 spin_lock_irq(&events_lock);
210 if (capable(CAP_SYS_ADMIN))
211 events_check_enabled = false;
212
213 while (events_in_progress && !signal_pending(current)) {
214 spin_unlock_irq(&events_lock);
215
216 schedule_timeout_interruptible(msecs_to_jiffies(100));
217
218 spin_lock_irq(&events_lock);
219 }
220 *count = event_count;
221 ret = !events_in_progress;
222 spin_unlock_irq(&events_lock);
223 return ret;
224}
225
226/**
227 * pm_save_wakeup_count - Save the current number of registered wakeup events.
228 * @count: Value to compare with the current number of registered wakeup events.
229 *
230 * If @count is equal to the current number of registered wakeup events and the
231 * current number of wakeup events being processed is zero, store @count as the
232 * old number of registered wakeup events to be used by pm_check_wakeup_events()
233 * and return true. Otherwise return false.
234 */
235bool pm_save_wakeup_count(unsigned long count)
236{
237 bool ret = false;
238
239 spin_lock_irq(&events_lock);
240 if (count == event_count && !events_in_progress) {
241 saved_event_count = count;
242 events_check_enabled = true;
243 ret = true;
244 }
245 spin_unlock_irq(&events_lock);
246 return ret;
247}
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c
index 51ceaee98f9f..e1e7143ca1e3 100644
--- a/drivers/block/cciss.c
+++ b/drivers/block/cciss.c
@@ -335,7 +335,7 @@ static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
335static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG", 335static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
336 "UNKNOWN" 336 "UNKNOWN"
337}; 337};
338#define RAID_UNKNOWN (sizeof(raid_label) / sizeof(raid_label[0])-1) 338#define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
339 339
340#ifdef CONFIG_PROC_FS 340#ifdef CONFIG_PROC_FS
341 341
diff --git a/drivers/block/drbd/drbd_receiver.c b/drivers/block/drbd/drbd_receiver.c
index dff48701b84d..ec1711f7c5c5 100644
--- a/drivers/block/drbd/drbd_receiver.c
+++ b/drivers/block/drbd/drbd_receiver.c
@@ -1087,7 +1087,7 @@ static enum finish_epoch drbd_may_finish_epoch(struct drbd_conf *mdev,
1087 } else { 1087 } else {
1088 epoch->flags = 0; 1088 epoch->flags = 0;
1089 atomic_set(&epoch->epoch_size, 0); 1089 atomic_set(&epoch->epoch_size, 0);
1090 /* atomic_set(&epoch->active, 0); is alrady zero */ 1090 /* atomic_set(&epoch->active, 0); is already zero */
1091 if (rv == FE_STILL_LIVE) 1091 if (rv == FE_STILL_LIVE)
1092 rv = FE_RECYCLED; 1092 rv = FE_RECYCLED;
1093 } 1093 }
diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c
index 218d091f3c52..16c3c8613cd3 100644
--- a/drivers/block/nbd.c
+++ b/drivers/block/nbd.c
@@ -4,7 +4,7 @@
4 * Note that you can not swap over this thing, yet. Seems to work but 4 * Note that you can not swap over this thing, yet. Seems to work but
5 * deadlocks sometimes - you can not swap over TCP in general. 5 * deadlocks sometimes - you can not swap over TCP in general.
6 * 6 *
7 * Copyright 1997-2000, 2008 Pavel Machek <pavel@suse.cz> 7 * Copyright 1997-2000, 2008 Pavel Machek <pavel@ucw.cz>
8 * Parts copyright 2001 Steven Whitehouse <steve@chygwyn.com> 8 * Parts copyright 2001 Steven Whitehouse <steve@chygwyn.com>
9 * 9 *
10 * This file is released under GPLv2 or later. 10 * This file is released under GPLv2 or later.
diff --git a/drivers/block/virtio_blk.c b/drivers/block/virtio_blk.c
index 258bc2ae2885..23b7c48df843 100644
--- a/drivers/block/virtio_blk.c
+++ b/drivers/block/virtio_blk.c
@@ -225,16 +225,6 @@ static int virtblk_ioctl(struct block_device *bdev, fmode_t mode,
225 struct gendisk *disk = bdev->bd_disk; 225 struct gendisk *disk = bdev->bd_disk;
226 struct virtio_blk *vblk = disk->private_data; 226 struct virtio_blk *vblk = disk->private_data;
227 227
228 if (cmd == 0x56424944) { /* 'VBID' */
229 void __user *usr_data = (void __user *)data;
230 char id_str[VIRTIO_BLK_ID_BYTES];
231 int err;
232
233 err = virtblk_get_id(disk, id_str);
234 if (!err && copy_to_user(usr_data, id_str, VIRTIO_BLK_ID_BYTES))
235 err = -EFAULT;
236 return err;
237 }
238 /* 228 /*
239 * Only allow the generic SCSI ioctls if the host can support it. 229 * Only allow the generic SCSI ioctls if the host can support it.
240 */ 230 */
@@ -281,6 +271,27 @@ static int index_to_minor(int index)
281 return index << PART_BITS; 271 return index << PART_BITS;
282} 272}
283 273
274static ssize_t virtblk_serial_show(struct device *dev,
275 struct device_attribute *attr, char *buf)
276{
277 struct gendisk *disk = dev_to_disk(dev);
278 int err;
279
280 /* sysfs gives us a PAGE_SIZE buffer */
281 BUILD_BUG_ON(PAGE_SIZE < VIRTIO_BLK_ID_BYTES);
282
283 buf[VIRTIO_BLK_ID_BYTES] = '\0';
284 err = virtblk_get_id(disk, buf);
285 if (!err)
286 return strlen(buf);
287
288 if (err == -EIO) /* Unsupported? Make it empty. */
289 return 0;
290
291 return err;
292}
293DEVICE_ATTR(serial, S_IRUGO, virtblk_serial_show, NULL);
294
284static int __devinit virtblk_probe(struct virtio_device *vdev) 295static int __devinit virtblk_probe(struct virtio_device *vdev)
285{ 296{
286 struct virtio_blk *vblk; 297 struct virtio_blk *vblk;
@@ -366,12 +377,32 @@ static int __devinit virtblk_probe(struct virtio_device *vdev)
366 vblk->disk->driverfs_dev = &vdev->dev; 377 vblk->disk->driverfs_dev = &vdev->dev;
367 index++; 378 index++;
368 379
369 /* If barriers are supported, tell block layer that queue is ordered */ 380 if (virtio_has_feature(vdev, VIRTIO_BLK_F_FLUSH)) {
370 if (virtio_has_feature(vdev, VIRTIO_BLK_F_FLUSH)) 381 /*
382 * If the FLUSH feature is supported we do have support for
383 * flushing a volatile write cache on the host. Use that
384 * to implement write barrier support.
385 */
371 blk_queue_ordered(q, QUEUE_ORDERED_DRAIN_FLUSH, 386 blk_queue_ordered(q, QUEUE_ORDERED_DRAIN_FLUSH,
372 virtblk_prepare_flush); 387 virtblk_prepare_flush);
373 else if (virtio_has_feature(vdev, VIRTIO_BLK_F_BARRIER)) 388 } else if (virtio_has_feature(vdev, VIRTIO_BLK_F_BARRIER)) {
389 /*
390 * If the BARRIER feature is supported the host expects us
391 * to order request by tags. This implies there is not
392 * volatile write cache on the host, and that the host
393 * never re-orders outstanding I/O. This feature is not
394 * useful for real life scenarious and deprecated.
395 */
374 blk_queue_ordered(q, QUEUE_ORDERED_TAG, NULL); 396 blk_queue_ordered(q, QUEUE_ORDERED_TAG, NULL);
397 } else {
398 /*
399 * If the FLUSH feature is not supported we must assume that
400 * the host does not perform any kind of volatile write
401 * caching. We still need to drain the queue to provider
402 * proper barrier semantics.
403 */
404 blk_queue_ordered(q, QUEUE_ORDERED_DRAIN, NULL);
405 }
375 406
376 /* If disk is read-only in the host, the guest should obey */ 407 /* If disk is read-only in the host, the guest should obey */
377 if (virtio_has_feature(vdev, VIRTIO_BLK_F_RO)) 408 if (virtio_has_feature(vdev, VIRTIO_BLK_F_RO))
@@ -445,8 +476,15 @@ static int __devinit virtblk_probe(struct virtio_device *vdev)
445 476
446 477
447 add_disk(vblk->disk); 478 add_disk(vblk->disk);
479 err = device_create_file(disk_to_dev(vblk->disk), &dev_attr_serial);
480 if (err)
481 goto out_del_disk;
482
448 return 0; 483 return 0;
449 484
485out_del_disk:
486 del_gendisk(vblk->disk);
487 blk_cleanup_queue(vblk->disk->queue);
450out_put_disk: 488out_put_disk:
451 put_disk(vblk->disk); 489 put_disk(vblk->disk);
452out_mempool: 490out_mempool:
diff --git a/drivers/block/xen-blkfront.c b/drivers/block/xen-blkfront.c
index 82ed403147c0..f63ac3d1f8a4 100644
--- a/drivers/block/xen-blkfront.c
+++ b/drivers/block/xen-blkfront.c
@@ -48,6 +48,7 @@
48#include <xen/grant_table.h> 48#include <xen/grant_table.h>
49#include <xen/events.h> 49#include <xen/events.h>
50#include <xen/page.h> 50#include <xen/page.h>
51#include <xen/platform_pci.h>
51 52
52#include <xen/interface/grant_table.h> 53#include <xen/interface/grant_table.h>
53#include <xen/interface/io/blkif.h> 54#include <xen/interface/io/blkif.h>
@@ -737,6 +738,35 @@ static int blkfront_probe(struct xenbus_device *dev,
737 } 738 }
738 } 739 }
739 740
741 if (xen_hvm_domain()) {
742 char *type;
743 int len;
744 /* no unplug has been done: do not hook devices != xen vbds */
745 if (xen_platform_pci_unplug & XEN_UNPLUG_IGNORE) {
746 int major;
747
748 if (!VDEV_IS_EXTENDED(vdevice))
749 major = BLKIF_MAJOR(vdevice);
750 else
751 major = XENVBD_MAJOR;
752
753 if (major != XENVBD_MAJOR) {
754 printk(KERN_INFO
755 "%s: HVM does not support vbd %d as xen block device\n",
756 __FUNCTION__, vdevice);
757 return -ENODEV;
758 }
759 }
760 /* do not create a PV cdrom device if we are an HVM guest */
761 type = xenbus_read(XBT_NIL, dev->nodename, "device-type", &len);
762 if (IS_ERR(type))
763 return -ENODEV;
764 if (strncmp(type, "cdrom", 5) == 0) {
765 kfree(type);
766 return -ENODEV;
767 }
768 kfree(type);
769 }
740 info = kzalloc(sizeof(*info), GFP_KERNEL); 770 info = kzalloc(sizeof(*info), GFP_KERNEL);
741 if (!info) { 771 if (!info) {
742 xenbus_dev_fatal(dev, -ENOMEM, "allocating info structure"); 772 xenbus_dev_fatal(dev, -ENOMEM, "allocating info structure");
diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig
index 058fbccf2f52..02deef424926 100644
--- a/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig
@@ -58,6 +58,18 @@ config BT_HCIUART_BCSP
58 58
59 Say Y here to compile support for HCI BCSP protocol. 59 Say Y here to compile support for HCI BCSP protocol.
60 60
61config BT_HCIUART_ATH3K
62 bool "Atheros AR300x serial support"
63 depends on BT_HCIUART
64 help
65 HCIATH3K (HCI Atheros AR300x) is a serial protocol for
66 communication between host and Atheros AR300x Bluetooth devices.
67 This protocol enables AR300x chips to be enabled with
68 power management support.
69 Enable this if you have Atheros AR300x serial Bluetooth device.
70
71 Say Y here to compile support for HCI UART ATH3K protocol.
72
61config BT_HCIUART_LL 73config BT_HCIUART_LL
62 bool "HCILL protocol support" 74 bool "HCILL protocol support"
63 depends on BT_HCIUART 75 depends on BT_HCIUART
diff --git a/drivers/bluetooth/Makefile b/drivers/bluetooth/Makefile
index 7e5aed598121..71bdf13287c4 100644
--- a/drivers/bluetooth/Makefile
+++ b/drivers/bluetooth/Makefile
@@ -26,4 +26,5 @@ hci_uart-y := hci_ldisc.o
26hci_uart-$(CONFIG_BT_HCIUART_H4) += hci_h4.o 26hci_uart-$(CONFIG_BT_HCIUART_H4) += hci_h4.o
27hci_uart-$(CONFIG_BT_HCIUART_BCSP) += hci_bcsp.o 27hci_uart-$(CONFIG_BT_HCIUART_BCSP) += hci_bcsp.o
28hci_uart-$(CONFIG_BT_HCIUART_LL) += hci_ll.o 28hci_uart-$(CONFIG_BT_HCIUART_LL) += hci_ll.o
29hci_uart-$(CONFIG_BT_HCIUART_ATH3K) += hci_ath.o
29hci_uart-objs := $(hci_uart-y) 30hci_uart-objs := $(hci_uart-y)
diff --git a/drivers/bluetooth/bcm203x.c b/drivers/bluetooth/bcm203x.c
index b0c84c19f442..8b1b643a519b 100644
--- a/drivers/bluetooth/bcm203x.c
+++ b/drivers/bluetooth/bcm203x.c
@@ -224,7 +224,7 @@ static int bcm203x_probe(struct usb_interface *intf, const struct usb_device_id
224 224
225 BT_DBG("firmware data %p size %zu", firmware->data, firmware->size); 225 BT_DBG("firmware data %p size %zu", firmware->data, firmware->size);
226 226
227 data->fw_data = kmalloc(firmware->size, GFP_KERNEL); 227 data->fw_data = kmemdup(firmware->data, firmware->size, GFP_KERNEL);
228 if (!data->fw_data) { 228 if (!data->fw_data) {
229 BT_ERR("Can't allocate memory for firmware image"); 229 BT_ERR("Can't allocate memory for firmware image");
230 release_firmware(firmware); 230 release_firmware(firmware);
@@ -234,7 +234,6 @@ static int bcm203x_probe(struct usb_interface *intf, const struct usb_device_id
234 return -ENOMEM; 234 return -ENOMEM;
235 } 235 }
236 236
237 memcpy(data->fw_data, firmware->data, firmware->size);
238 data->fw_size = firmware->size; 237 data->fw_size = firmware->size;
239 data->fw_sent = 0; 238 data->fw_sent = 0;
240 239
diff --git a/drivers/bluetooth/bluecard_cs.c b/drivers/bluetooth/bluecard_cs.c
index 6f907ebed2d5..6d34f405a2f3 100644
--- a/drivers/bluetooth/bluecard_cs.c
+++ b/drivers/bluetooth/bluecard_cs.c
@@ -37,7 +37,7 @@
37#include <linux/wait.h> 37#include <linux/wait.h>
38 38
39#include <linux/skbuff.h> 39#include <linux/skbuff.h>
40#include <asm/io.h> 40#include <linux/io.h>
41 41
42#include <pcmcia/cs_types.h> 42#include <pcmcia/cs_types.h>
43#include <pcmcia/cs.h> 43#include <pcmcia/cs.h>
diff --git a/drivers/bluetooth/bpa10x.c b/drivers/bluetooth/bpa10x.c
index d945cd12433a..751b338d904a 100644
--- a/drivers/bluetooth/bpa10x.c
+++ b/drivers/bluetooth/bpa10x.c
@@ -62,7 +62,7 @@ struct hci_vendor_hdr {
62 __u8 type; 62 __u8 type;
63 __le16 snum; 63 __le16 snum;
64 __le16 dlen; 64 __le16 dlen;
65} __attribute__ ((packed)); 65} __packed;
66 66
67static int bpa10x_recv(struct hci_dev *hdev, int queue, void *buf, int count) 67static int bpa10x_recv(struct hci_dev *hdev, int queue, void *buf, int count)
68{ 68{
diff --git a/drivers/bluetooth/btmrvl_debugfs.c b/drivers/bluetooth/btmrvl_debugfs.c
index b50b41d97a7f..54739b08c308 100644
--- a/drivers/bluetooth/btmrvl_debugfs.c
+++ b/drivers/bluetooth/btmrvl_debugfs.c
@@ -216,7 +216,7 @@ static const struct file_operations btmrvl_gpiogap_fops = {
216static ssize_t btmrvl_hscmd_write(struct file *file, const char __user *ubuf, 216static ssize_t btmrvl_hscmd_write(struct file *file, const char __user *ubuf,
217 size_t count, loff_t *ppos) 217 size_t count, loff_t *ppos)
218{ 218{
219 struct btmrvl_private *priv = (struct btmrvl_private *) file->private_data; 219 struct btmrvl_private *priv = file->private_data;
220 char buf[16]; 220 char buf[16];
221 long result, ret; 221 long result, ret;
222 222
diff --git a/drivers/bluetooth/btmrvl_drv.h b/drivers/bluetooth/btmrvl_drv.h
index bed0ba630235..90bda50dc446 100644
--- a/drivers/bluetooth/btmrvl_drv.h
+++ b/drivers/bluetooth/btmrvl_drv.h
@@ -76,6 +76,7 @@ struct btmrvl_private {
76 int (*hw_host_to_card) (struct btmrvl_private *priv, 76 int (*hw_host_to_card) (struct btmrvl_private *priv,
77 u8 *payload, u16 nb); 77 u8 *payload, u16 nb);
78 int (*hw_wakeup_firmware) (struct btmrvl_private *priv); 78 int (*hw_wakeup_firmware) (struct btmrvl_private *priv);
79 int (*hw_process_int_status) (struct btmrvl_private *priv);
79 spinlock_t driver_lock; /* spinlock used by driver */ 80 spinlock_t driver_lock; /* spinlock used by driver */
80#ifdef CONFIG_DEBUG_FS 81#ifdef CONFIG_DEBUG_FS
81 void *debugfs_data; 82 void *debugfs_data;
@@ -118,13 +119,13 @@ struct btmrvl_cmd {
118 __le16 ocf_ogf; 119 __le16 ocf_ogf;
119 u8 length; 120 u8 length;
120 u8 data[4]; 121 u8 data[4];
121} __attribute__ ((packed)); 122} __packed;
122 123
123struct btmrvl_event { 124struct btmrvl_event {
124 u8 ec; /* event counter */ 125 u8 ec; /* event counter */
125 u8 length; 126 u8 length;
126 u8 data[4]; 127 u8 data[4];
127} __attribute__ ((packed)); 128} __packed;
128 129
129/* Prototype of global function */ 130/* Prototype of global function */
130 131
diff --git a/drivers/bluetooth/btmrvl_main.c b/drivers/bluetooth/btmrvl_main.c
index ee37ef0caee2..0d32ec82e9bf 100644
--- a/drivers/bluetooth/btmrvl_main.c
+++ b/drivers/bluetooth/btmrvl_main.c
@@ -502,14 +502,17 @@ static int btmrvl_service_main_thread(void *data)
502 spin_lock_irqsave(&priv->driver_lock, flags); 502 spin_lock_irqsave(&priv->driver_lock, flags);
503 if (adapter->int_count) { 503 if (adapter->int_count) {
504 adapter->int_count = 0; 504 adapter->int_count = 0;
505 spin_unlock_irqrestore(&priv->driver_lock, flags);
506 priv->hw_process_int_status(priv);
505 } else if (adapter->ps_state == PS_SLEEP && 507 } else if (adapter->ps_state == PS_SLEEP &&
506 !skb_queue_empty(&adapter->tx_queue)) { 508 !skb_queue_empty(&adapter->tx_queue)) {
507 spin_unlock_irqrestore(&priv->driver_lock, flags); 509 spin_unlock_irqrestore(&priv->driver_lock, flags);
508 adapter->wakeup_tries++; 510 adapter->wakeup_tries++;
509 priv->hw_wakeup_firmware(priv); 511 priv->hw_wakeup_firmware(priv);
510 continue; 512 continue;
513 } else {
514 spin_unlock_irqrestore(&priv->driver_lock, flags);
511 } 515 }
512 spin_unlock_irqrestore(&priv->driver_lock, flags);
513 516
514 if (adapter->ps_state == PS_SLEEP) 517 if (adapter->ps_state == PS_SLEEP)
515 continue; 518 continue;
diff --git a/drivers/bluetooth/btmrvl_sdio.c b/drivers/bluetooth/btmrvl_sdio.c
index df0773ebd9e4..dcc2a6ec23f0 100644
--- a/drivers/bluetooth/btmrvl_sdio.c
+++ b/drivers/bluetooth/btmrvl_sdio.c
@@ -47,6 +47,7 @@
47 * module_exit function is called. 47 * module_exit function is called.
48 */ 48 */
49static u8 user_rmmod; 49static u8 user_rmmod;
50static u8 sdio_ireg;
50 51
51static const struct btmrvl_sdio_device btmrvl_sdio_sd6888 = { 52static const struct btmrvl_sdio_device btmrvl_sdio_sd6888 = {
52 .helper = "sd8688_helper.bin", 53 .helper = "sd8688_helper.bin",
@@ -83,10 +84,10 @@ static int btmrvl_sdio_read_fw_status(struct btmrvl_sdio_card *card, u16 *dat)
83 *dat = 0; 84 *dat = 0;
84 85
85 fws0 = sdio_readb(card->func, CARD_FW_STATUS0_REG, &ret); 86 fws0 = sdio_readb(card->func, CARD_FW_STATUS0_REG, &ret);
87 if (ret)
88 return -EIO;
86 89
87 if (!ret) 90 fws1 = sdio_readb(card->func, CARD_FW_STATUS1_REG, &ret);
88 fws1 = sdio_readb(card->func, CARD_FW_STATUS1_REG, &ret);
89
90 if (ret) 91 if (ret)
91 return -EIO; 92 return -EIO;
92 93
@@ -216,7 +217,7 @@ static int btmrvl_sdio_download_helper(struct btmrvl_sdio_card *card)
216 217
217 tmphlprbufsz = ALIGN_SZ(BTM_UPLD_SIZE, BTSDIO_DMA_ALIGN); 218 tmphlprbufsz = ALIGN_SZ(BTM_UPLD_SIZE, BTSDIO_DMA_ALIGN);
218 219
219 tmphlprbuf = kmalloc(tmphlprbufsz, GFP_KERNEL); 220 tmphlprbuf = kzalloc(tmphlprbufsz, GFP_KERNEL);
220 if (!tmphlprbuf) { 221 if (!tmphlprbuf) {
221 BT_ERR("Unable to allocate buffer for helper." 222 BT_ERR("Unable to allocate buffer for helper."
222 " Terminating download"); 223 " Terminating download");
@@ -224,8 +225,6 @@ static int btmrvl_sdio_download_helper(struct btmrvl_sdio_card *card)
224 goto done; 225 goto done;
225 } 226 }
226 227
227 memset(tmphlprbuf, 0, tmphlprbufsz);
228
229 helperbuf = (u8 *) ALIGN_ADDR(tmphlprbuf, BTSDIO_DMA_ALIGN); 228 helperbuf = (u8 *) ALIGN_ADDR(tmphlprbuf, BTSDIO_DMA_ALIGN);
230 229
231 /* Perform helper data transfer */ 230 /* Perform helper data transfer */
@@ -318,7 +317,7 @@ static int btmrvl_sdio_download_fw_w_helper(struct btmrvl_sdio_card *card)
318 BT_DBG("Downloading FW image (%d bytes)", firmwarelen); 317 BT_DBG("Downloading FW image (%d bytes)", firmwarelen);
319 318
320 tmpfwbufsz = ALIGN_SZ(BTM_UPLD_SIZE, BTSDIO_DMA_ALIGN); 319 tmpfwbufsz = ALIGN_SZ(BTM_UPLD_SIZE, BTSDIO_DMA_ALIGN);
321 tmpfwbuf = kmalloc(tmpfwbufsz, GFP_KERNEL); 320 tmpfwbuf = kzalloc(tmpfwbufsz, GFP_KERNEL);
322 if (!tmpfwbuf) { 321 if (!tmpfwbuf) {
323 BT_ERR("Unable to allocate buffer for firmware." 322 BT_ERR("Unable to allocate buffer for firmware."
324 " Terminating download"); 323 " Terminating download");
@@ -326,8 +325,6 @@ static int btmrvl_sdio_download_fw_w_helper(struct btmrvl_sdio_card *card)
326 goto done; 325 goto done;
327 } 326 }
328 327
329 memset(tmpfwbuf, 0, tmpfwbufsz);
330
331 /* Ensure aligned firmware buffer */ 328 /* Ensure aligned firmware buffer */
332 fwbuf = (u8 *) ALIGN_ADDR(tmpfwbuf, BTSDIO_DMA_ALIGN); 329 fwbuf = (u8 *) ALIGN_ADDR(tmpfwbuf, BTSDIO_DMA_ALIGN);
333 330
@@ -555,78 +552,79 @@ exit:
555 return ret; 552 return ret;
556} 553}
557 554
558static int btmrvl_sdio_get_int_status(struct btmrvl_private *priv, u8 * ireg) 555static int btmrvl_sdio_process_int_status(struct btmrvl_private *priv)
559{ 556{
560 int ret; 557 ulong flags;
561 u8 sdio_ireg = 0; 558 u8 ireg;
562 struct btmrvl_sdio_card *card = priv->btmrvl_dev.card; 559 struct btmrvl_sdio_card *card = priv->btmrvl_dev.card;
563 560
564 *ireg = 0; 561 spin_lock_irqsave(&priv->driver_lock, flags);
565 562 ireg = sdio_ireg;
566 sdio_ireg = sdio_readb(card->func, HOST_INTSTATUS_REG, &ret); 563 sdio_ireg = 0;
567 if (ret) { 564 spin_unlock_irqrestore(&priv->driver_lock, flags);
568 BT_ERR("sdio_readb: read int status register failed");
569 ret = -EIO;
570 goto done;
571 }
572
573 if (sdio_ireg != 0) {
574 /*
575 * DN_LD_HOST_INT_STATUS and/or UP_LD_HOST_INT_STATUS
576 * Clear the interrupt status register and re-enable the
577 * interrupt.
578 */
579 BT_DBG("sdio_ireg = 0x%x", sdio_ireg);
580
581 sdio_writeb(card->func, ~(sdio_ireg) & (DN_LD_HOST_INT_STATUS |
582 UP_LD_HOST_INT_STATUS),
583 HOST_INTSTATUS_REG, &ret);
584 if (ret) {
585 BT_ERR("sdio_writeb: clear int status register "
586 "failed");
587 ret = -EIO;
588 goto done;
589 }
590 }
591 565
592 if (sdio_ireg & DN_LD_HOST_INT_STATUS) { 566 sdio_claim_host(card->func);
567 if (ireg & DN_LD_HOST_INT_STATUS) {
593 if (priv->btmrvl_dev.tx_dnld_rdy) 568 if (priv->btmrvl_dev.tx_dnld_rdy)
594 BT_DBG("tx_done already received: " 569 BT_DBG("tx_done already received: "
595 " int_status=0x%x", sdio_ireg); 570 " int_status=0x%x", ireg);
596 else 571 else
597 priv->btmrvl_dev.tx_dnld_rdy = true; 572 priv->btmrvl_dev.tx_dnld_rdy = true;
598 } 573 }
599 574
600 if (sdio_ireg & UP_LD_HOST_INT_STATUS) 575 if (ireg & UP_LD_HOST_INT_STATUS)
601 btmrvl_sdio_card_to_host(priv); 576 btmrvl_sdio_card_to_host(priv);
602 577
603 *ireg = sdio_ireg; 578 sdio_release_host(card->func);
604
605 ret = 0;
606 579
607done: 580 return 0;
608 return ret;
609} 581}
610 582
611static void btmrvl_sdio_interrupt(struct sdio_func *func) 583static void btmrvl_sdio_interrupt(struct sdio_func *func)
612{ 584{
613 struct btmrvl_private *priv; 585 struct btmrvl_private *priv;
614 struct hci_dev *hcidev;
615 struct btmrvl_sdio_card *card; 586 struct btmrvl_sdio_card *card;
587 ulong flags;
616 u8 ireg = 0; 588 u8 ireg = 0;
589 int ret;
617 590
618 card = sdio_get_drvdata(func); 591 card = sdio_get_drvdata(func);
619 if (card && card->priv) { 592 if (!card || !card->priv) {
620 priv = card->priv; 593 BT_ERR("sbi_interrupt(%p) card or priv is "
621 hcidev = priv->btmrvl_dev.hcidev; 594 "NULL, card=%p\n", func, card);
595 return;
596 }
622 597
623 if (btmrvl_sdio_get_int_status(priv, &ireg)) 598 priv = card->priv;
624 BT_ERR("reading HOST_INT_STATUS_REG failed"); 599
625 else 600 ireg = sdio_readb(card->func, HOST_INTSTATUS_REG, &ret);
626 BT_DBG("HOST_INT_STATUS_REG %#x", ireg); 601 if (ret) {
602 BT_ERR("sdio_readb: read int status register failed");
603 return;
604 }
605
606 if (ireg != 0) {
607 /*
608 * DN_LD_HOST_INT_STATUS and/or UP_LD_HOST_INT_STATUS
609 * Clear the interrupt status register and re-enable the
610 * interrupt.
611 */
612 BT_DBG("ireg = 0x%x", ireg);
627 613
628 btmrvl_interrupt(priv); 614 sdio_writeb(card->func, ~(ireg) & (DN_LD_HOST_INT_STATUS |
615 UP_LD_HOST_INT_STATUS),
616 HOST_INTSTATUS_REG, &ret);
617 if (ret) {
618 BT_ERR("sdio_writeb: clear int status register failed");
619 return;
620 }
629 } 621 }
622
623 spin_lock_irqsave(&priv->driver_lock, flags);
624 sdio_ireg |= ireg;
625 spin_unlock_irqrestore(&priv->driver_lock, flags);
626
627 btmrvl_interrupt(priv);
630} 628}
631 629
632static int btmrvl_sdio_register_dev(struct btmrvl_sdio_card *card) 630static int btmrvl_sdio_register_dev(struct btmrvl_sdio_card *card)
@@ -930,6 +928,7 @@ static int btmrvl_sdio_probe(struct sdio_func *func,
930 /* Initialize the interface specific function pointers */ 928 /* Initialize the interface specific function pointers */
931 priv->hw_host_to_card = btmrvl_sdio_host_to_card; 929 priv->hw_host_to_card = btmrvl_sdio_host_to_card;
932 priv->hw_wakeup_firmware = btmrvl_sdio_wakeup_fw; 930 priv->hw_wakeup_firmware = btmrvl_sdio_wakeup_fw;
931 priv->hw_process_int_status = btmrvl_sdio_process_int_status;
933 932
934 if (btmrvl_register_hdev(priv)) { 933 if (btmrvl_register_hdev(priv)) {
935 BT_ERR("Register hdev failed!"); 934 BT_ERR("Register hdev failed!");
diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c
index 5d9cc53bd643..d22ce3cc611e 100644
--- a/drivers/bluetooth/btusb.c
+++ b/drivers/bluetooth/btusb.c
@@ -59,6 +59,9 @@ static struct usb_device_id btusb_table[] = {
59 /* Generic Bluetooth USB device */ 59 /* Generic Bluetooth USB device */
60 { USB_DEVICE_INFO(0xe0, 0x01, 0x01) }, 60 { USB_DEVICE_INFO(0xe0, 0x01, 0x01) },
61 61
62 /* Apple iMac11,1 */
63 { USB_DEVICE(0x05ac, 0x8215) },
64
62 /* AVM BlueFRITZ! USB v2.0 */ 65 /* AVM BlueFRITZ! USB v2.0 */
63 { USB_DEVICE(0x057c, 0x3800) }, 66 { USB_DEVICE(0x057c, 0x3800) },
64 67
@@ -146,6 +149,7 @@ static struct usb_device_id blacklist_table[] = {
146#define BTUSB_BULK_RUNNING 1 149#define BTUSB_BULK_RUNNING 1
147#define BTUSB_ISOC_RUNNING 2 150#define BTUSB_ISOC_RUNNING 2
148#define BTUSB_SUSPENDING 3 151#define BTUSB_SUSPENDING 3
152#define BTUSB_DID_ISO_RESUME 4
149 153
150struct btusb_data { 154struct btusb_data {
151 struct hci_dev *hdev; 155 struct hci_dev *hdev;
@@ -179,7 +183,6 @@ struct btusb_data {
179 unsigned int sco_num; 183 unsigned int sco_num;
180 int isoc_altsetting; 184 int isoc_altsetting;
181 int suspend_count; 185 int suspend_count;
182 int did_iso_resume:1;
183}; 186};
184 187
185static int inc_tx(struct btusb_data *data) 188static int inc_tx(struct btusb_data *data)
@@ -807,7 +810,7 @@ static void btusb_work(struct work_struct *work)
807 int err; 810 int err;
808 811
809 if (hdev->conn_hash.sco_num > 0) { 812 if (hdev->conn_hash.sco_num > 0) {
810 if (!data->did_iso_resume) { 813 if (!test_bit(BTUSB_DID_ISO_RESUME, &data->flags)) {
811 err = usb_autopm_get_interface(data->isoc); 814 err = usb_autopm_get_interface(data->isoc);
812 if (err < 0) { 815 if (err < 0) {
813 clear_bit(BTUSB_ISOC_RUNNING, &data->flags); 816 clear_bit(BTUSB_ISOC_RUNNING, &data->flags);
@@ -815,7 +818,7 @@ static void btusb_work(struct work_struct *work)
815 return; 818 return;
816 } 819 }
817 820
818 data->did_iso_resume = 1; 821 set_bit(BTUSB_DID_ISO_RESUME, &data->flags);
819 } 822 }
820 if (data->isoc_altsetting != 2) { 823 if (data->isoc_altsetting != 2) {
821 clear_bit(BTUSB_ISOC_RUNNING, &data->flags); 824 clear_bit(BTUSB_ISOC_RUNNING, &data->flags);
@@ -836,10 +839,8 @@ static void btusb_work(struct work_struct *work)
836 usb_kill_anchored_urbs(&data->isoc_anchor); 839 usb_kill_anchored_urbs(&data->isoc_anchor);
837 840
838 __set_isoc_interface(hdev, 0); 841 __set_isoc_interface(hdev, 0);
839 if (data->did_iso_resume) { 842 if (test_and_clear_bit(BTUSB_DID_ISO_RESUME, &data->flags))
840 data->did_iso_resume = 0;
841 usb_autopm_put_interface(data->isoc); 843 usb_autopm_put_interface(data->isoc);
842 }
843 } 844 }
844} 845}
845 846
diff --git a/drivers/bluetooth/dtl1_cs.c b/drivers/bluetooth/dtl1_cs.c
index ef044d55cb25..cbe9e44a42e9 100644
--- a/drivers/bluetooth/dtl1_cs.c
+++ b/drivers/bluetooth/dtl1_cs.c
@@ -104,7 +104,7 @@ typedef struct {
104 u8 type; 104 u8 type;
105 u8 zero; 105 u8 zero;
106 u16 len; 106 u16 len;
107} __attribute__ ((packed)) nsh_t; /* Nokia Specific Header */ 107} __packed nsh_t; /* Nokia Specific Header */
108 108
109#define NSHL 4 /* Nokia Specific Header Length */ 109#define NSHL 4 /* Nokia Specific Header Length */
110 110
diff --git a/drivers/bluetooth/hci_ath.c b/drivers/bluetooth/hci_ath.c
new file mode 100644
index 000000000000..6a160c17ea94
--- /dev/null
+++ b/drivers/bluetooth/hci_ath.c
@@ -0,0 +1,235 @@
1/*
2 * Atheros Communication Bluetooth HCIATH3K UART protocol
3 *
4 * HCIATH3K (HCI Atheros AR300x Protocol) is a Atheros Communication's
5 * power management protocol extension to H4 to support AR300x Bluetooth Chip.
6 *
7 * Copyright (c) 2009-2010 Atheros Communications Inc.
8 *
9 * Acknowledgements:
10 * This file is based on hci_h4.c, which was written
11 * by Maxim Krasnyansky and Marcel Holtmann.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 *
27 */
28
29#include <linux/module.h>
30#include <linux/kernel.h>
31
32#include <linux/init.h>
33#include <linux/slab.h>
34#include <linux/tty.h>
35#include <linux/errno.h>
36#include <linux/ioctl.h>
37#include <linux/skbuff.h>
38
39#include <net/bluetooth/bluetooth.h>
40#include <net/bluetooth/hci_core.h>
41
42#include "hci_uart.h"
43
44struct ath_struct {
45 struct hci_uart *hu;
46 unsigned int cur_sleep;
47
48 struct sk_buff_head txq;
49 struct work_struct ctxtsw;
50};
51
52static int ath_wakeup_ar3k(struct tty_struct *tty)
53{
54 struct termios settings;
55 int status = tty->driver->ops->tiocmget(tty, NULL);
56
57 if (status & TIOCM_CTS)
58 return status;
59
60 /* Disable Automatic RTSCTS */
61 n_tty_ioctl_helper(tty, NULL, TCGETS, (unsigned long)&settings);
62 settings.c_cflag &= ~CRTSCTS;
63 n_tty_ioctl_helper(tty, NULL, TCSETS, (unsigned long)&settings);
64
65 /* Clear RTS first */
66 status = tty->driver->ops->tiocmget(tty, NULL);
67 tty->driver->ops->tiocmset(tty, NULL, 0x00, TIOCM_RTS);
68 mdelay(20);
69
70 /* Set RTS, wake up board */
71 status = tty->driver->ops->tiocmget(tty, NULL);
72 tty->driver->ops->tiocmset(tty, NULL, TIOCM_RTS, 0x00);
73 mdelay(20);
74
75 status = tty->driver->ops->tiocmget(tty, NULL);
76
77 n_tty_ioctl_helper(tty, NULL, TCGETS, (unsigned long)&settings);
78 settings.c_cflag |= CRTSCTS;
79 n_tty_ioctl_helper(tty, NULL, TCSETS, (unsigned long)&settings);
80
81 return status;
82}
83
84static void ath_hci_uart_work(struct work_struct *work)
85{
86 int status;
87 struct ath_struct *ath;
88 struct hci_uart *hu;
89 struct tty_struct *tty;
90
91 ath = container_of(work, struct ath_struct, ctxtsw);
92
93 hu = ath->hu;
94 tty = hu->tty;
95
96 /* verify and wake up controller */
97 if (ath->cur_sleep) {
98 status = ath_wakeup_ar3k(tty);
99 if (!(status & TIOCM_CTS))
100 return;
101 }
102
103 /* Ready to send Data */
104 clear_bit(HCI_UART_SENDING, &hu->tx_state);
105 hci_uart_tx_wakeup(hu);
106}
107
108/* Initialize protocol */
109static int ath_open(struct hci_uart *hu)
110{
111 struct ath_struct *ath;
112
113 BT_DBG("hu %p", hu);
114
115 ath = kzalloc(sizeof(*ath), GFP_ATOMIC);
116 if (!ath)
117 return -ENOMEM;
118
119 skb_queue_head_init(&ath->txq);
120
121 hu->priv = ath;
122 ath->hu = hu;
123
124 INIT_WORK(&ath->ctxtsw, ath_hci_uart_work);
125
126 return 0;
127}
128
129/* Flush protocol data */
130static int ath_flush(struct hci_uart *hu)
131{
132 struct ath_struct *ath = hu->priv;
133
134 BT_DBG("hu %p", hu);
135
136 skb_queue_purge(&ath->txq);
137
138 return 0;
139}
140
141/* Close protocol */
142static int ath_close(struct hci_uart *hu)
143{
144 struct ath_struct *ath = hu->priv;
145
146 BT_DBG("hu %p", hu);
147
148 skb_queue_purge(&ath->txq);
149
150 cancel_work_sync(&ath->ctxtsw);
151
152 hu->priv = NULL;
153 kfree(ath);
154
155 return 0;
156}
157
158#define HCI_OP_ATH_SLEEP 0xFC04
159
160/* Enqueue frame for transmittion */
161static int ath_enqueue(struct hci_uart *hu, struct sk_buff *skb)
162{
163 struct ath_struct *ath = hu->priv;
164
165 if (bt_cb(skb)->pkt_type == HCI_SCODATA_PKT) {
166 kfree_skb(skb);
167 return 0;
168 }
169
170 /*
171 * Update power management enable flag with parameters of
172 * HCI sleep enable vendor specific HCI command.
173 */
174 if (bt_cb(skb)->pkt_type == HCI_COMMAND_PKT) {
175 struct hci_command_hdr *hdr = (void *)skb->data;
176
177 if (__le16_to_cpu(hdr->opcode) == HCI_OP_ATH_SLEEP)
178 ath->cur_sleep = skb->data[HCI_COMMAND_HDR_SIZE];
179 }
180
181 BT_DBG("hu %p skb %p", hu, skb);
182
183 /* Prepend skb with frame type */
184 memcpy(skb_push(skb, 1), &bt_cb(skb)->pkt_type, 1);
185
186 skb_queue_tail(&ath->txq, skb);
187 set_bit(HCI_UART_SENDING, &hu->tx_state);
188
189 schedule_work(&ath->ctxtsw);
190
191 return 0;
192}
193
194static struct sk_buff *ath_dequeue(struct hci_uart *hu)
195{
196 struct ath_struct *ath = hu->priv;
197
198 return skb_dequeue(&ath->txq);
199}
200
201/* Recv data */
202static int ath_recv(struct hci_uart *hu, void *data, int count)
203{
204 if (hci_recv_stream_fragment(hu->hdev, data, count) < 0)
205 BT_ERR("Frame Reassembly Failed");
206
207 return count;
208}
209
210static struct hci_uart_proto athp = {
211 .id = HCI_UART_ATH3K,
212 .open = ath_open,
213 .close = ath_close,
214 .recv = ath_recv,
215 .enqueue = ath_enqueue,
216 .dequeue = ath_dequeue,
217 .flush = ath_flush,
218};
219
220int __init ath_init(void)
221{
222 int err = hci_uart_register_proto(&athp);
223
224 if (!err)
225 BT_INFO("HCIATH3K protocol initialized");
226 else
227 BT_ERR("HCIATH3K protocol registration failed");
228
229 return err;
230}
231
232int __exit ath_deinit(void)
233{
234 return hci_uart_unregister_proto(&athp);
235}
diff --git a/drivers/bluetooth/hci_bcsp.c b/drivers/bluetooth/hci_bcsp.c
index 40aec0fb8596..9c5b2dc38e29 100644
--- a/drivers/bluetooth/hci_bcsp.c
+++ b/drivers/bluetooth/hci_bcsp.c
@@ -244,7 +244,7 @@ static struct sk_buff *bcsp_prepare_pkt(struct bcsp_struct *bcsp, u8 *data,
244 if (rel) { 244 if (rel) {
245 hdr[0] |= 0x80 + bcsp->msgq_txseq; 245 hdr[0] |= 0x80 + bcsp->msgq_txseq;
246 BT_DBG("Sending packet with seqno %u", bcsp->msgq_txseq); 246 BT_DBG("Sending packet with seqno %u", bcsp->msgq_txseq);
247 bcsp->msgq_txseq = ++(bcsp->msgq_txseq) & 0x07; 247 bcsp->msgq_txseq = (bcsp->msgq_txseq + 1) & 0x07;
248 } 248 }
249 249
250 if (bcsp->use_crc) 250 if (bcsp->use_crc)
@@ -739,7 +739,7 @@ static struct hci_uart_proto bcsp = {
739 .flush = bcsp_flush 739 .flush = bcsp_flush
740}; 740};
741 741
742int bcsp_init(void) 742int __init bcsp_init(void)
743{ 743{
744 int err = hci_uart_register_proto(&bcsp); 744 int err = hci_uart_register_proto(&bcsp);
745 745
@@ -751,7 +751,7 @@ int bcsp_init(void)
751 return err; 751 return err;
752} 752}
753 753
754int bcsp_deinit(void) 754int __exit bcsp_deinit(void)
755{ 755{
756 return hci_uart_unregister_proto(&bcsp); 756 return hci_uart_unregister_proto(&bcsp);
757} 757}
diff --git a/drivers/bluetooth/hci_h4.c b/drivers/bluetooth/hci_h4.c
index 3f038f5308a4..7b8ad93e2c36 100644
--- a/drivers/bluetooth/hci_h4.c
+++ b/drivers/bluetooth/hci_h4.c
@@ -151,107 +151,8 @@ static inline int h4_check_data_len(struct h4_struct *h4, int len)
151/* Recv data */ 151/* Recv data */
152static int h4_recv(struct hci_uart *hu, void *data, int count) 152static int h4_recv(struct hci_uart *hu, void *data, int count)
153{ 153{
154 struct h4_struct *h4 = hu->priv; 154 if (hci_recv_stream_fragment(hu->hdev, data, count) < 0)
155 register char *ptr; 155 BT_ERR("Frame Reassembly Failed");
156 struct hci_event_hdr *eh;
157 struct hci_acl_hdr *ah;
158 struct hci_sco_hdr *sh;
159 register int len, type, dlen;
160
161 BT_DBG("hu %p count %d rx_state %ld rx_count %ld",
162 hu, count, h4->rx_state, h4->rx_count);
163
164 ptr = data;
165 while (count) {
166 if (h4->rx_count) {
167 len = min_t(unsigned int, h4->rx_count, count);
168 memcpy(skb_put(h4->rx_skb, len), ptr, len);
169 h4->rx_count -= len; count -= len; ptr += len;
170
171 if (h4->rx_count)
172 continue;
173
174 switch (h4->rx_state) {
175 case H4_W4_DATA:
176 BT_DBG("Complete data");
177
178 hci_recv_frame(h4->rx_skb);
179
180 h4->rx_state = H4_W4_PACKET_TYPE;
181 h4->rx_skb = NULL;
182 continue;
183
184 case H4_W4_EVENT_HDR:
185 eh = hci_event_hdr(h4->rx_skb);
186
187 BT_DBG("Event header: evt 0x%2.2x plen %d", eh->evt, eh->plen);
188
189 h4_check_data_len(h4, eh->plen);
190 continue;
191
192 case H4_W4_ACL_HDR:
193 ah = hci_acl_hdr(h4->rx_skb);
194 dlen = __le16_to_cpu(ah->dlen);
195
196 BT_DBG("ACL header: dlen %d", dlen);
197
198 h4_check_data_len(h4, dlen);
199 continue;
200
201 case H4_W4_SCO_HDR:
202 sh = hci_sco_hdr(h4->rx_skb);
203
204 BT_DBG("SCO header: dlen %d", sh->dlen);
205
206 h4_check_data_len(h4, sh->dlen);
207 continue;
208 }
209 }
210
211 /* H4_W4_PACKET_TYPE */
212 switch (*ptr) {
213 case HCI_EVENT_PKT:
214 BT_DBG("Event packet");
215 h4->rx_state = H4_W4_EVENT_HDR;
216 h4->rx_count = HCI_EVENT_HDR_SIZE;
217 type = HCI_EVENT_PKT;
218 break;
219
220 case HCI_ACLDATA_PKT:
221 BT_DBG("ACL packet");
222 h4->rx_state = H4_W4_ACL_HDR;
223 h4->rx_count = HCI_ACL_HDR_SIZE;
224 type = HCI_ACLDATA_PKT;
225 break;
226
227 case HCI_SCODATA_PKT:
228 BT_DBG("SCO packet");
229 h4->rx_state = H4_W4_SCO_HDR;
230 h4->rx_count = HCI_SCO_HDR_SIZE;
231 type = HCI_SCODATA_PKT;
232 break;
233
234 default:
235 BT_ERR("Unknown HCI packet type %2.2x", (__u8)*ptr);
236 hu->hdev->stat.err_rx++;
237 ptr++; count--;
238 continue;
239 };
240
241 ptr++; count--;
242
243 /* Allocate packet */
244 h4->rx_skb = bt_skb_alloc(HCI_MAX_FRAME_SIZE, GFP_ATOMIC);
245 if (!h4->rx_skb) {
246 BT_ERR("Can't allocate mem for new packet");
247 h4->rx_state = H4_W4_PACKET_TYPE;
248 h4->rx_count = 0;
249 return -ENOMEM;
250 }
251
252 h4->rx_skb->dev = (void *) hu->hdev;
253 bt_cb(h4->rx_skb)->pkt_type = type;
254 }
255 156
256 return count; 157 return count;
257} 158}
@@ -272,7 +173,7 @@ static struct hci_uart_proto h4p = {
272 .flush = h4_flush, 173 .flush = h4_flush,
273}; 174};
274 175
275int h4_init(void) 176int __init h4_init(void)
276{ 177{
277 int err = hci_uart_register_proto(&h4p); 178 int err = hci_uart_register_proto(&h4p);
278 179
@@ -284,7 +185,7 @@ int h4_init(void)
284 return err; 185 return err;
285} 186}
286 187
287int h4_deinit(void) 188int __exit h4_deinit(void)
288{ 189{
289 return hci_uart_unregister_proto(&h4p); 190 return hci_uart_unregister_proto(&h4p);
290} 191}
diff --git a/drivers/bluetooth/hci_ldisc.c b/drivers/bluetooth/hci_ldisc.c
index 76a1abb8f214..998833d93c13 100644
--- a/drivers/bluetooth/hci_ldisc.c
+++ b/drivers/bluetooth/hci_ldisc.c
@@ -210,7 +210,6 @@ static int hci_uart_close(struct hci_dev *hdev)
210static int hci_uart_send_frame(struct sk_buff *skb) 210static int hci_uart_send_frame(struct sk_buff *skb)
211{ 211{
212 struct hci_dev* hdev = (struct hci_dev *) skb->dev; 212 struct hci_dev* hdev = (struct hci_dev *) skb->dev;
213 struct tty_struct *tty;
214 struct hci_uart *hu; 213 struct hci_uart *hu;
215 214
216 if (!hdev) { 215 if (!hdev) {
@@ -222,7 +221,6 @@ static int hci_uart_send_frame(struct sk_buff *skb)
222 return -EBUSY; 221 return -EBUSY;
223 222
224 hu = (struct hci_uart *) hdev->driver_data; 223 hu = (struct hci_uart *) hdev->driver_data;
225 tty = hu->tty;
226 224
227 BT_DBG("%s: type %d len %d", hdev->name, bt_cb(skb)->pkt_type, skb->len); 225 BT_DBG("%s: type %d len %d", hdev->name, bt_cb(skb)->pkt_type, skb->len);
228 226
@@ -397,6 +395,9 @@ static int hci_uart_register_dev(struct hci_uart *hu)
397 if (!reset) 395 if (!reset)
398 set_bit(HCI_QUIRK_NO_RESET, &hdev->quirks); 396 set_bit(HCI_QUIRK_NO_RESET, &hdev->quirks);
399 397
398 if (test_bit(HCI_UART_RAW_DEVICE, &hu->hdev_flags))
399 set_bit(HCI_QUIRK_RAW_DEVICE, &hdev->quirks);
400
400 if (hci_register_dev(hdev) < 0) { 401 if (hci_register_dev(hdev) < 0) {
401 BT_ERR("Can't register HCI device"); 402 BT_ERR("Can't register HCI device");
402 hci_free_dev(hdev); 403 hci_free_dev(hdev);
@@ -477,6 +478,15 @@ static int hci_uart_tty_ioctl(struct tty_struct *tty, struct file * file,
477 return hu->hdev->id; 478 return hu->hdev->id;
478 return -EUNATCH; 479 return -EUNATCH;
479 480
481 case HCIUARTSETFLAGS:
482 if (test_bit(HCI_UART_PROTO_SET, &hu->flags))
483 return -EBUSY;
484 hu->hdev_flags = arg;
485 break;
486
487 case HCIUARTGETFLAGS:
488 return hu->hdev_flags;
489
480 default: 490 default:
481 err = n_tty_ioctl_helper(tty, file, cmd, arg); 491 err = n_tty_ioctl_helper(tty, file, cmd, arg);
482 break; 492 break;
@@ -542,6 +552,9 @@ static int __init hci_uart_init(void)
542#ifdef CONFIG_BT_HCIUART_LL 552#ifdef CONFIG_BT_HCIUART_LL
543 ll_init(); 553 ll_init();
544#endif 554#endif
555#ifdef CONFIG_BT_HCIUART_ATH3K
556 ath_init();
557#endif
545 558
546 return 0; 559 return 0;
547} 560}
@@ -559,6 +572,9 @@ static void __exit hci_uart_exit(void)
559#ifdef CONFIG_BT_HCIUART_LL 572#ifdef CONFIG_BT_HCIUART_LL
560 ll_deinit(); 573 ll_deinit();
561#endif 574#endif
575#ifdef CONFIG_BT_HCIUART_ATH3K
576 ath_deinit();
577#endif
562 578
563 /* Release tty registration of line discipline */ 579 /* Release tty registration of line discipline */
564 if ((err = tty_unregister_ldisc(N_HCI))) 580 if ((err = tty_unregister_ldisc(N_HCI)))
diff --git a/drivers/bluetooth/hci_ll.c b/drivers/bluetooth/hci_ll.c
index fb8445c7365e..38595e782d02 100644
--- a/drivers/bluetooth/hci_ll.c
+++ b/drivers/bluetooth/hci_ll.c
@@ -74,7 +74,7 @@ enum hcill_states_e {
74 74
75struct hcill_cmd { 75struct hcill_cmd {
76 u8 cmd; 76 u8 cmd;
77} __attribute__((packed)); 77} __packed;
78 78
79struct ll_struct { 79struct ll_struct {
80 unsigned long rx_state; 80 unsigned long rx_state;
@@ -517,7 +517,7 @@ static struct hci_uart_proto llp = {
517 .flush = ll_flush, 517 .flush = ll_flush,
518}; 518};
519 519
520int ll_init(void) 520int __init ll_init(void)
521{ 521{
522 int err = hci_uart_register_proto(&llp); 522 int err = hci_uart_register_proto(&llp);
523 523
@@ -529,7 +529,7 @@ int ll_init(void)
529 return err; 529 return err;
530} 530}
531 531
532int ll_deinit(void) 532int __exit ll_deinit(void)
533{ 533{
534 return hci_uart_unregister_proto(&llp); 534 return hci_uart_unregister_proto(&llp);
535} 535}
diff --git a/drivers/bluetooth/hci_uart.h b/drivers/bluetooth/hci_uart.h
index 50113db06b9f..99fb35239d1f 100644
--- a/drivers/bluetooth/hci_uart.h
+++ b/drivers/bluetooth/hci_uart.h
@@ -31,15 +31,20 @@
31#define HCIUARTSETPROTO _IOW('U', 200, int) 31#define HCIUARTSETPROTO _IOW('U', 200, int)
32#define HCIUARTGETPROTO _IOR('U', 201, int) 32#define HCIUARTGETPROTO _IOR('U', 201, int)
33#define HCIUARTGETDEVICE _IOR('U', 202, int) 33#define HCIUARTGETDEVICE _IOR('U', 202, int)
34#define HCIUARTSETFLAGS _IOW('U', 203, int)
35#define HCIUARTGETFLAGS _IOR('U', 204, int)
34 36
35/* UART protocols */ 37/* UART protocols */
36#define HCI_UART_MAX_PROTO 5 38#define HCI_UART_MAX_PROTO 6
37 39
38#define HCI_UART_H4 0 40#define HCI_UART_H4 0
39#define HCI_UART_BCSP 1 41#define HCI_UART_BCSP 1
40#define HCI_UART_3WIRE 2 42#define HCI_UART_3WIRE 2
41#define HCI_UART_H4DS 3 43#define HCI_UART_H4DS 3
42#define HCI_UART_LL 4 44#define HCI_UART_LL 4
45#define HCI_UART_ATH3K 5
46
47#define HCI_UART_RAW_DEVICE 0
43 48
44struct hci_uart; 49struct hci_uart;
45 50
@@ -57,6 +62,7 @@ struct hci_uart {
57 struct tty_struct *tty; 62 struct tty_struct *tty;
58 struct hci_dev *hdev; 63 struct hci_dev *hdev;
59 unsigned long flags; 64 unsigned long flags;
65 unsigned long hdev_flags;
60 66
61 struct hci_uart_proto *proto; 67 struct hci_uart_proto *proto;
62 void *priv; 68 void *priv;
@@ -66,7 +72,7 @@ struct hci_uart {
66 spinlock_t rx_lock; 72 spinlock_t rx_lock;
67}; 73};
68 74
69/* HCI_UART flag bits */ 75/* HCI_UART proto flag bits */
70#define HCI_UART_PROTO_SET 0 76#define HCI_UART_PROTO_SET 0
71 77
72/* TX states */ 78/* TX states */
@@ -91,3 +97,8 @@ int bcsp_deinit(void);
91int ll_init(void); 97int ll_init(void);
92int ll_deinit(void); 98int ll_deinit(void);
93#endif 99#endif
100
101#ifdef CONFIG_BT_HCIUART_ATH3K
102int ath_init(void);
103int ath_deinit(void);
104#endif
diff --git a/drivers/char/agp/efficeon-agp.c b/drivers/char/agp/efficeon-agp.c
index aa109cbe0e6e..d607f53d8afc 100644
--- a/drivers/char/agp/efficeon-agp.c
+++ b/drivers/char/agp/efficeon-agp.c
@@ -372,6 +372,17 @@ static int __devinit agp_efficeon_probe(struct pci_dev *pdev,
372 bridge->capndx = cap_ptr; 372 bridge->capndx = cap_ptr;
373 373
374 /* 374 /*
375 * If the device has not been properly setup, the following will catch
376 * the problem and should stop the system from crashing.
377 * 20030610 - hamish@zot.org
378 */
379 if (pci_enable_device(pdev)) {
380 printk(KERN_ERR PFX "Unable to Enable PCI device\n");
381 agp_put_bridge(bridge);
382 return -ENODEV;
383 }
384
385 /*
375 * The following fixes the case where the BIOS has "forgotten" to 386 * The following fixes the case where the BIOS has "forgotten" to
376 * provide an address range for the GART. 387 * provide an address range for the GART.
377 * 20030610 - hamish@zot.org 388 * 20030610 - hamish@zot.org
@@ -385,17 +396,6 @@ static int __devinit agp_efficeon_probe(struct pci_dev *pdev,
385 } 396 }
386 } 397 }
387 398
388 /*
389 * If the device has not been properly setup, the following will catch
390 * the problem and should stop the system from crashing.
391 * 20030610 - hamish@zot.org
392 */
393 if (pci_enable_device(pdev)) {
394 printk(KERN_ERR PFX "Unable to Enable PCI device\n");
395 agp_put_bridge(bridge);
396 return -ENODEV;
397 }
398
399 /* Fill in the mode register */ 399 /* Fill in the mode register */
400 if (cap_ptr) { 400 if (cap_ptr) {
401 pci_read_config_dword(pdev, 401 pci_read_config_dword(pdev,
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index d836a71bf06d..ddf5def1b0da 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -816,9 +816,9 @@ static const struct intel_driver_description {
816 { PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG, 816 { PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG,
817 "HD Graphics", NULL, &intel_i965_driver }, 817 "HD Graphics", NULL, &intel_i965_driver },
818 { PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB, PCI_DEVICE_ID_INTEL_SANDYBRIDGE_IG, 818 { PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB, PCI_DEVICE_ID_INTEL_SANDYBRIDGE_IG,
819 "Sandybridge", NULL, &intel_i965_driver }, 819 "Sandybridge", NULL, &intel_gen6_driver },
820 { PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB, PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_IG, 820 { PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB, PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_IG,
821 "Sandybridge", NULL, &intel_i965_driver }, 821 "Sandybridge", NULL, &intel_gen6_driver },
822 { 0, 0, NULL, NULL, NULL } 822 { 0, 0, NULL, NULL, NULL }
823}; 823};
824 824
@@ -908,6 +908,17 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
908 dev_info(&pdev->dev, "Intel %s Chipset\n", intel_agp_chipsets[i].name); 908 dev_info(&pdev->dev, "Intel %s Chipset\n", intel_agp_chipsets[i].name);
909 909
910 /* 910 /*
911 * If the device has not been properly setup, the following will catch
912 * the problem and should stop the system from crashing.
913 * 20030610 - hamish@zot.org
914 */
915 if (pci_enable_device(pdev)) {
916 dev_err(&pdev->dev, "can't enable PCI device\n");
917 agp_put_bridge(bridge);
918 return -ENODEV;
919 }
920
921 /*
911 * The following fixes the case where the BIOS has "forgotten" to 922 * The following fixes the case where the BIOS has "forgotten" to
912 * provide an address range for the GART. 923 * provide an address range for the GART.
913 * 20030610 - hamish@zot.org 924 * 20030610 - hamish@zot.org
@@ -921,17 +932,6 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
921 } 932 }
922 } 933 }
923 934
924 /*
925 * If the device has not been properly setup, the following will catch
926 * the problem and should stop the system from crashing.
927 * 20030610 - hamish@zot.org
928 */
929 if (pci_enable_device(pdev)) {
930 dev_err(&pdev->dev, "can't enable PCI device\n");
931 agp_put_bridge(bridge);
932 return -ENODEV;
933 }
934
935 /* Fill in the mode register */ 935 /* Fill in the mode register */
936 if (cap_ptr) { 936 if (cap_ptr) {
937 pci_read_config_dword(pdev, 937 pci_read_config_dword(pdev,
diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h
index 2547465d4658..c05e3e518268 100644
--- a/drivers/char/agp/intel-agp.h
+++ b/drivers/char/agp/intel-agp.h
@@ -60,6 +60,12 @@
60#define I810_PTE_LOCAL 0x00000002 60#define I810_PTE_LOCAL 0x00000002
61#define I810_PTE_VALID 0x00000001 61#define I810_PTE_VALID 0x00000001
62#define I830_PTE_SYSTEM_CACHED 0x00000006 62#define I830_PTE_SYSTEM_CACHED 0x00000006
63/* GT PTE cache control fields */
64#define GEN6_PTE_UNCACHED 0x00000002
65#define GEN6_PTE_LLC 0x00000004
66#define GEN6_PTE_LLC_MLC 0x00000006
67#define GEN6_PTE_GFDT 0x00000008
68
63#define I810_SMRAM_MISCC 0x70 69#define I810_SMRAM_MISCC 0x70
64#define I810_GFX_MEM_WIN_SIZE 0x00010000 70#define I810_GFX_MEM_WIN_SIZE 0x00010000
65#define I810_GFX_MEM_WIN_32M 0x00010000 71#define I810_GFX_MEM_WIN_32M 0x00010000
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 9344216183a4..d22ffb811bf2 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -25,6 +25,10 @@
25#define USE_PCI_DMA_API 1 25#define USE_PCI_DMA_API 1
26#endif 26#endif
27 27
28/* Max amount of stolen space, anything above will be returned to Linux */
29int intel_max_stolen = 32 * 1024 * 1024;
30EXPORT_SYMBOL(intel_max_stolen);
31
28static const struct aper_size_info_fixed intel_i810_sizes[] = 32static const struct aper_size_info_fixed intel_i810_sizes[] =
29{ 33{
30 {64, 16384, 4}, 34 {64, 16384, 4},
@@ -104,7 +108,7 @@ static int intel_agp_map_memory(struct agp_memory *mem)
104 DBG("try mapping %lu pages\n", (unsigned long)mem->page_count); 108 DBG("try mapping %lu pages\n", (unsigned long)mem->page_count);
105 109
106 if (sg_alloc_table(&st, mem->page_count, GFP_KERNEL)) 110 if (sg_alloc_table(&st, mem->page_count, GFP_KERNEL))
107 return -ENOMEM; 111 goto err;
108 112
109 mem->sg_list = sg = st.sgl; 113 mem->sg_list = sg = st.sgl;
110 114
@@ -113,11 +117,14 @@ static int intel_agp_map_memory(struct agp_memory *mem)
113 117
114 mem->num_sg = pci_map_sg(intel_private.pcidev, mem->sg_list, 118 mem->num_sg = pci_map_sg(intel_private.pcidev, mem->sg_list,
115 mem->page_count, PCI_DMA_BIDIRECTIONAL); 119 mem->page_count, PCI_DMA_BIDIRECTIONAL);
116 if (unlikely(!mem->num_sg)) { 120 if (unlikely(!mem->num_sg))
117 intel_agp_free_sglist(mem); 121 goto err;
118 return -ENOMEM; 122
119 }
120 return 0; 123 return 0;
124
125err:
126 sg_free_table(&st);
127 return -ENOMEM;
121} 128}
122 129
123static void intel_agp_unmap_memory(struct agp_memory *mem) 130static void intel_agp_unmap_memory(struct agp_memory *mem)
@@ -176,7 +183,7 @@ static void intel_agp_insert_sg_entries(struct agp_memory *mem,
176 if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB || 183 if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB ||
177 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB) 184 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB)
178 { 185 {
179 cache_bits = I830_PTE_SYSTEM_CACHED; 186 cache_bits = GEN6_PTE_LLC_MLC;
180 } 187 }
181 188
182 for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { 189 for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
@@ -710,7 +717,12 @@ static void intel_i830_init_gtt_entries(void)
710 break; 717 break;
711 } 718 }
712 } 719 }
713 if (gtt_entries > 0) { 720 if (!local && gtt_entries > intel_max_stolen) {
721 dev_info(&agp_bridge->dev->dev,
722 "detected %dK stolen memory, trimming to %dK\n",
723 gtt_entries / KB(1), intel_max_stolen / KB(1));
724 gtt_entries = intel_max_stolen / KB(4);
725 } else if (gtt_entries > 0) {
714 dev_info(&agp_bridge->dev->dev, "detected %dK %s memory\n", 726 dev_info(&agp_bridge->dev->dev, "detected %dK %s memory\n",
715 gtt_entries / KB(1), local ? "local" : "stolen"); 727 gtt_entries / KB(1), local ? "local" : "stolen");
716 gtt_entries /= KB(4); 728 gtt_entries /= KB(4);
@@ -797,6 +809,10 @@ static int intel_i830_create_gatt_table(struct agp_bridge_data *bridge)
797 809
798 /* we have to call this as early as possible after the MMIO base address is known */ 810 /* we have to call this as early as possible after the MMIO base address is known */
799 intel_i830_init_gtt_entries(); 811 intel_i830_init_gtt_entries();
812 if (intel_private.gtt_entries == 0) {
813 iounmap(intel_private.registers);
814 return -ENOMEM;
815 }
800 816
801 agp_bridge->gatt_table = NULL; 817 agp_bridge->gatt_table = NULL;
802 818
@@ -1216,17 +1232,20 @@ static int intel_i915_get_gtt_size(void)
1216 1232
1217 /* G33's GTT size defined in gmch_ctrl */ 1233 /* G33's GTT size defined in gmch_ctrl */
1218 pci_read_config_word(agp_bridge->dev, I830_GMCH_CTRL, &gmch_ctrl); 1234 pci_read_config_word(agp_bridge->dev, I830_GMCH_CTRL, &gmch_ctrl);
1219 switch (gmch_ctrl & G33_PGETBL_SIZE_MASK) { 1235 switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
1220 case G33_PGETBL_SIZE_1M: 1236 case I830_GMCH_GMS_STOLEN_512:
1237 size = 512;
1238 break;
1239 case I830_GMCH_GMS_STOLEN_1024:
1221 size = 1024; 1240 size = 1024;
1222 break; 1241 break;
1223 case G33_PGETBL_SIZE_2M: 1242 case I830_GMCH_GMS_STOLEN_8192:
1224 size = 2048; 1243 size = 8*1024;
1225 break; 1244 break;
1226 default: 1245 default:
1227 dev_info(&agp_bridge->dev->dev, 1246 dev_info(&agp_bridge->dev->dev,
1228 "unknown page table size 0x%x, assuming 512KB\n", 1247 "unknown page table size 0x%x, assuming 512KB\n",
1229 (gmch_ctrl & G33_PGETBL_SIZE_MASK)); 1248 (gmch_ctrl & I830_GMCH_GMS_MASK));
1230 size = 512; 1249 size = 512;
1231 } 1250 }
1232 } else { 1251 } else {
@@ -1279,6 +1298,11 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge)
1279 1298
1280 /* we have to call this as early as possible after the MMIO base address is known */ 1299 /* we have to call this as early as possible after the MMIO base address is known */
1281 intel_i830_init_gtt_entries(); 1300 intel_i830_init_gtt_entries();
1301 if (intel_private.gtt_entries == 0) {
1302 iounmap(intel_private.gtt);
1303 iounmap(intel_private.registers);
1304 return -ENOMEM;
1305 }
1282 1306
1283 agp_bridge->gatt_table = NULL; 1307 agp_bridge->gatt_table = NULL;
1284 1308
@@ -1306,6 +1330,16 @@ static unsigned long intel_i965_mask_memory(struct agp_bridge_data *bridge,
1306 return addr | bridge->driver->masks[type].mask; 1330 return addr | bridge->driver->masks[type].mask;
1307} 1331}
1308 1332
1333static unsigned long intel_gen6_mask_memory(struct agp_bridge_data *bridge,
1334 dma_addr_t addr, int type)
1335{
1336 /* Shift high bits down */
1337 addr |= (addr >> 28) & 0xff;
1338
1339 /* Type checking must be done elsewhere */
1340 return addr | bridge->driver->masks[type].mask;
1341}
1342
1309static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size) 1343static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size)
1310{ 1344{
1311 u16 snb_gmch_ctl; 1345 u16 snb_gmch_ctl;
@@ -1387,6 +1421,11 @@ static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge)
1387 1421
1388 /* we have to call this as early as possible after the MMIO base address is known */ 1422 /* we have to call this as early as possible after the MMIO base address is known */
1389 intel_i830_init_gtt_entries(); 1423 intel_i830_init_gtt_entries();
1424 if (intel_private.gtt_entries == 0) {
1425 iounmap(intel_private.gtt);
1426 iounmap(intel_private.registers);
1427 return -ENOMEM;
1428 }
1390 1429
1391 agp_bridge->gatt_table = NULL; 1430 agp_bridge->gatt_table = NULL;
1392 1431
@@ -1514,6 +1553,39 @@ static const struct agp_bridge_driver intel_i965_driver = {
1514#endif 1553#endif
1515}; 1554};
1516 1555
1556static const struct agp_bridge_driver intel_gen6_driver = {
1557 .owner = THIS_MODULE,
1558 .aperture_sizes = intel_i830_sizes,
1559 .size_type = FIXED_APER_SIZE,
1560 .num_aperture_sizes = 4,
1561 .needs_scratch_page = true,
1562 .configure = intel_i9xx_configure,
1563 .fetch_size = intel_i9xx_fetch_size,
1564 .cleanup = intel_i915_cleanup,
1565 .mask_memory = intel_gen6_mask_memory,
1566 .masks = intel_i810_masks,
1567 .agp_enable = intel_i810_agp_enable,
1568 .cache_flush = global_cache_flush,
1569 .create_gatt_table = intel_i965_create_gatt_table,
1570 .free_gatt_table = intel_i830_free_gatt_table,
1571 .insert_memory = intel_i915_insert_entries,
1572 .remove_memory = intel_i915_remove_entries,
1573 .alloc_by_type = intel_i830_alloc_by_type,
1574 .free_by_type = intel_i810_free_by_type,
1575 .agp_alloc_page = agp_generic_alloc_page,
1576 .agp_alloc_pages = agp_generic_alloc_pages,
1577 .agp_destroy_page = agp_generic_destroy_page,
1578 .agp_destroy_pages = agp_generic_destroy_pages,
1579 .agp_type_to_mask_type = intel_i830_type_to_mask_type,
1580 .chipset_flush = intel_i915_chipset_flush,
1581#ifdef USE_PCI_DMA_API
1582 .agp_map_page = intel_agp_map_page,
1583 .agp_unmap_page = intel_agp_unmap_page,
1584 .agp_map_memory = intel_agp_map_memory,
1585 .agp_unmap_memory = intel_agp_unmap_memory,
1586#endif
1587};
1588
1517static const struct agp_bridge_driver intel_g33_driver = { 1589static const struct agp_bridge_driver intel_g33_driver = {
1518 .owner = THIS_MODULE, 1590 .owner = THIS_MODULE,
1519 .aperture_sizes = intel_i830_sizes, 1591 .aperture_sizes = intel_i830_sizes,
diff --git a/drivers/char/bsr.c b/drivers/char/bsr.c
index 89d871ef8c2f..91917133ae0a 100644
--- a/drivers/char/bsr.c
+++ b/drivers/char/bsr.c
@@ -23,6 +23,7 @@
23#include <linux/of.h> 23#include <linux/of.h>
24#include <linux/of_device.h> 24#include <linux/of_device.h>
25#include <linux/of_platform.h> 25#include <linux/of_platform.h>
26#include <linux/fs.h>
26#include <linux/module.h> 27#include <linux/module.h>
27#include <linux/cdev.h> 28#include <linux/cdev.h>
28#include <linux/list.h> 29#include <linux/list.h>
diff --git a/drivers/char/hvc_console.c b/drivers/char/hvc_console.c
index 35cca4c7fb18..fa27d1676ee5 100644
--- a/drivers/char/hvc_console.c
+++ b/drivers/char/hvc_console.c
@@ -194,7 +194,7 @@ static int __init hvc_console_setup(struct console *co, char *options)
194 return 0; 194 return 0;
195} 195}
196 196
197static struct console hvc_con_driver = { 197static struct console hvc_console = {
198 .name = "hvc", 198 .name = "hvc",
199 .write = hvc_console_print, 199 .write = hvc_console_print,
200 .device = hvc_console_device, 200 .device = hvc_console_device,
@@ -220,7 +220,7 @@ static struct console hvc_con_driver = {
220 */ 220 */
221static int __init hvc_console_init(void) 221static int __init hvc_console_init(void)
222{ 222{
223 register_console(&hvc_con_driver); 223 register_console(&hvc_console);
224 return 0; 224 return 0;
225} 225}
226console_initcall(hvc_console_init); 226console_initcall(hvc_console_init);
@@ -276,8 +276,8 @@ int hvc_instantiate(uint32_t vtermno, int index, const struct hv_ops *ops)
276 * now (setup won't fail at this point). It's ok to just 276 * now (setup won't fail at this point). It's ok to just
277 * call register again if previously .setup failed. 277 * call register again if previously .setup failed.
278 */ 278 */
279 if (index == hvc_con_driver.index) 279 if (index == hvc_console.index)
280 register_console(&hvc_con_driver); 280 register_console(&hvc_console);
281 281
282 return 0; 282 return 0;
283} 283}
@@ -641,7 +641,7 @@ int hvc_poll(struct hvc_struct *hp)
641 } 641 }
642 for (i = 0; i < n; ++i) { 642 for (i = 0; i < n; ++i) {
643#ifdef CONFIG_MAGIC_SYSRQ 643#ifdef CONFIG_MAGIC_SYSRQ
644 if (hp->index == hvc_con_driver.index) { 644 if (hp->index == hvc_console.index) {
645 /* Handle the SysRq Hack */ 645 /* Handle the SysRq Hack */
646 /* XXX should support a sequence */ 646 /* XXX should support a sequence */
647 if (buf[i] == '\x0f') { /* ^O */ 647 if (buf[i] == '\x0f') { /* ^O */
@@ -909,7 +909,7 @@ static void __exit hvc_exit(void)
909 tty_unregister_driver(hvc_driver); 909 tty_unregister_driver(hvc_driver);
910 /* return tty_struct instances allocated in hvc_init(). */ 910 /* return tty_struct instances allocated in hvc_init(). */
911 put_tty_driver(hvc_driver); 911 put_tty_driver(hvc_driver);
912 unregister_console(&hvc_con_driver); 912 unregister_console(&hvc_console);
913 } 913 }
914} 914}
915module_exit(hvc_exit); 915module_exit(hvc_exit);
diff --git a/drivers/char/hvsi.c b/drivers/char/hvsi.c
index d4b14ff1c4c1..1f4b6de65a2d 100644
--- a/drivers/char/hvsi.c
+++ b/drivers/char/hvsi.c
@@ -1255,7 +1255,7 @@ static int __init hvsi_console_setup(struct console *console, char *options)
1255 return 0; 1255 return 0;
1256} 1256}
1257 1257
1258static struct console hvsi_con_driver = { 1258static struct console hvsi_console = {
1259 .name = "hvsi", 1259 .name = "hvsi",
1260 .write = hvsi_console_print, 1260 .write = hvsi_console_print,
1261 .device = hvsi_console_device, 1261 .device = hvsi_console_device,
@@ -1308,7 +1308,7 @@ static int __init hvsi_console_init(void)
1308 } 1308 }
1309 1309
1310 if (hvsi_count) 1310 if (hvsi_count)
1311 register_console(&hvsi_con_driver); 1311 register_console(&hvsi_console);
1312 return 0; 1312 return 0;
1313} 1313}
1314console_initcall(hvsi_console_init); 1314console_initcall(hvsi_console_init);
diff --git a/drivers/char/hw_random/n2-drv.c b/drivers/char/hw_random/n2-drv.c
index 0f9cbf1aaf15..7a4f080f8356 100644
--- a/drivers/char/hw_random/n2-drv.c
+++ b/drivers/char/hw_random/n2-drv.c
@@ -387,7 +387,7 @@ static int n2rng_init_control(struct n2rng *np)
387 387
388static int n2rng_data_read(struct hwrng *rng, u32 *data) 388static int n2rng_data_read(struct hwrng *rng, u32 *data)
389{ 389{
390 struct n2rng *np = (struct n2rng *) rng->priv; 390 struct n2rng *np = rng->priv;
391 unsigned long ra = __pa(&np->test_data); 391 unsigned long ra = __pa(&np->test_data);
392 int len; 392 int len;
393 393
@@ -762,12 +762,12 @@ static struct of_platform_driver n2rng_driver = {
762 762
763static int __init n2rng_init(void) 763static int __init n2rng_init(void)
764{ 764{
765 return of_register_driver(&n2rng_driver, &of_bus_type); 765 return of_register_platform_driver(&n2rng_driver);
766} 766}
767 767
768static void __exit n2rng_exit(void) 768static void __exit n2rng_exit(void)
769{ 769{
770 of_unregister_driver(&n2rng_driver); 770 of_unregister_platform_driver(&n2rng_driver);
771} 771}
772 772
773module_init(n2rng_init); 773module_init(n2rng_init);
diff --git a/drivers/char/keyboard.c b/drivers/char/keyboard.c
index 54109dc9240c..25be2102a60a 100644
--- a/drivers/char/keyboard.c
+++ b/drivers/char/keyboard.c
@@ -1315,10 +1315,14 @@ static bool kbd_match(struct input_handler *handler, struct input_dev *dev)
1315 if (test_bit(EV_SND, dev->evbit)) 1315 if (test_bit(EV_SND, dev->evbit))
1316 return true; 1316 return true;
1317 1317
1318 if (test_bit(EV_KEY, dev->evbit)) 1318 if (test_bit(EV_KEY, dev->evbit)) {
1319 for (i = KEY_RESERVED; i < BTN_MISC; i++) 1319 for (i = KEY_RESERVED; i < BTN_MISC; i++)
1320 if (test_bit(i, dev->keybit)) 1320 if (test_bit(i, dev->keybit))
1321 return true; 1321 return true;
1322 for (i = KEY_BRL_DOT1; i <= KEY_BRL_DOT10; i++)
1323 if (test_bit(i, dev->keybit))
1324 return true;
1325 }
1322 1326
1323 return false; 1327 return false;
1324} 1328}
diff --git a/drivers/char/random.c b/drivers/char/random.c
index 8d85587b6d4f..caef35a46890 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c
@@ -407,8 +407,8 @@ struct entropy_store {
407 struct poolinfo *poolinfo; 407 struct poolinfo *poolinfo;
408 __u32 *pool; 408 __u32 *pool;
409 const char *name; 409 const char *name;
410 int limit;
411 struct entropy_store *pull; 410 struct entropy_store *pull;
411 int limit;
412 412
413 /* read-write data: */ 413 /* read-write data: */
414 spinlock_t lock; 414 spinlock_t lock;
diff --git a/drivers/char/synclink_gt.c b/drivers/char/synclink_gt.c
index 4561ce2fba6d..334cf5c8c8b6 100644
--- a/drivers/char/synclink_gt.c
+++ b/drivers/char/synclink_gt.c
@@ -4845,7 +4845,7 @@ static int register_test(struct slgt_info *info)
4845{ 4845{
4846 static unsigned short patterns[] = 4846 static unsigned short patterns[] =
4847 {0x0000, 0xffff, 0xaaaa, 0x5555, 0x6969, 0x9696}; 4847 {0x0000, 0xffff, 0xaaaa, 0x5555, 0x6969, 0x9696};
4848 static unsigned int count = sizeof(patterns)/sizeof(patterns[0]); 4848 static unsigned int count = ARRAY_SIZE(patterns);
4849 unsigned int i; 4849 unsigned int i;
4850 int rc = 0; 4850 int rc = 0;
4851 4851
diff --git a/drivers/char/sysrq.c b/drivers/char/sysrq.c
index 5d64e3acb000..878ac0c2cc68 100644
--- a/drivers/char/sysrq.c
+++ b/drivers/char/sysrq.c
@@ -493,7 +493,7 @@ static void __sysrq_put_key_op(int key, struct sysrq_key_op *op_p)
493 sysrq_key_table[i] = op_p; 493 sysrq_key_table[i] = op_p;
494} 494}
495 495
496static void __handle_sysrq(int key, struct tty_struct *tty, int check_mask) 496void __handle_sysrq(int key, struct tty_struct *tty, int check_mask)
497{ 497{
498 struct sysrq_key_op *op_p; 498 struct sysrq_key_op *op_p;
499 int orig_log_level; 499 int orig_log_level;
diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c
index 24314a9cffe8..1030f8420137 100644
--- a/drivers/char/tpm/tpm_tis.c
+++ b/drivers/char/tpm/tpm_tis.c
@@ -623,7 +623,14 @@ static int tpm_tis_pnp_suspend(struct pnp_dev *dev, pm_message_t msg)
623 623
624static int tpm_tis_pnp_resume(struct pnp_dev *dev) 624static int tpm_tis_pnp_resume(struct pnp_dev *dev)
625{ 625{
626 return tpm_pm_resume(&dev->dev); 626 struct tpm_chip *chip = pnp_get_drvdata(dev);
627 int ret;
628
629 ret = tpm_pm_resume(&dev->dev);
630 if (!ret)
631 tpm_continue_selftest(chip);
632
633 return ret;
627} 634}
628 635
629static struct pnp_device_id tpm_pnp_tbl[] __devinitdata = { 636static struct pnp_device_id tpm_pnp_tbl[] __devinitdata = {
diff --git a/drivers/char/vt.c b/drivers/char/vt.c
index 7cdb6ee569cd..4a9eb3044e52 100644
--- a/drivers/char/vt.c
+++ b/drivers/char/vt.c
@@ -104,6 +104,7 @@
104#include <linux/io.h> 104#include <linux/io.h>
105#include <asm/system.h> 105#include <asm/system.h>
106#include <linux/uaccess.h> 106#include <linux/uaccess.h>
107#include <linux/kdb.h>
107 108
108#define MAX_NR_CON_DRIVER 16 109#define MAX_NR_CON_DRIVER 16
109 110
@@ -187,10 +188,15 @@ static DECLARE_WORK(console_work, console_callback);
187 * fg_console is the current virtual console, 188 * fg_console is the current virtual console,
188 * last_console is the last used one, 189 * last_console is the last used one,
189 * want_console is the console we want to switch to, 190 * want_console is the console we want to switch to,
191 * saved_* variants are for save/restore around kernel debugger enter/leave
190 */ 192 */
191int fg_console; 193int fg_console;
192int last_console; 194int last_console;
193int want_console = -1; 195int want_console = -1;
196int saved_fg_console;
197int saved_last_console;
198int saved_want_console;
199int saved_vc_mode;
194 200
195/* 201/*
196 * For each existing display, we have a pointer to console currently visible 202 * For each existing display, we have a pointer to console currently visible
@@ -3414,6 +3420,78 @@ int con_is_bound(const struct consw *csw)
3414EXPORT_SYMBOL(con_is_bound); 3420EXPORT_SYMBOL(con_is_bound);
3415 3421
3416/** 3422/**
3423 * con_debug_enter - prepare the console for the kernel debugger
3424 * @sw: console driver
3425 *
3426 * Called when the console is taken over by the kernel debugger, this
3427 * function needs to save the current console state, then put the console
3428 * into a state suitable for the kernel debugger.
3429 *
3430 * RETURNS:
3431 * Zero on success, nonzero if a failure occurred when trying to prepare
3432 * the console for the debugger.
3433 */
3434int con_debug_enter(struct vc_data *vc)
3435{
3436 int ret = 0;
3437
3438 saved_fg_console = fg_console;
3439 saved_last_console = last_console;
3440 saved_want_console = want_console;
3441 saved_vc_mode = vc->vc_mode;
3442 vc->vc_mode = KD_TEXT;
3443 console_blanked = 0;
3444 if (vc->vc_sw->con_debug_enter)
3445 ret = vc->vc_sw->con_debug_enter(vc);
3446#ifdef CONFIG_KGDB_KDB
3447 /* Set the initial LINES variable if it is not already set */
3448 if (vc->vc_rows < 999) {
3449 int linecount;
3450 char lns[4];
3451 const char *setargs[3] = {
3452 "set",
3453 "LINES",
3454 lns,
3455 };
3456 if (kdbgetintenv(setargs[0], &linecount)) {
3457 snprintf(lns, 4, "%i", vc->vc_rows);
3458 kdb_set(2, setargs);
3459 }
3460 }
3461#endif /* CONFIG_KGDB_KDB */
3462 return ret;
3463}
3464EXPORT_SYMBOL_GPL(con_debug_enter);
3465
3466/**
3467 * con_debug_leave - restore console state
3468 * @sw: console driver
3469 *
3470 * Restore the console state to what it was before the kernel debugger
3471 * was invoked.
3472 *
3473 * RETURNS:
3474 * Zero on success, nonzero if a failure occurred when trying to restore
3475 * the console.
3476 */
3477int con_debug_leave(void)
3478{
3479 struct vc_data *vc;
3480 int ret = 0;
3481
3482 fg_console = saved_fg_console;
3483 last_console = saved_last_console;
3484 want_console = saved_want_console;
3485 vc_cons[fg_console].d->vc_mode = saved_vc_mode;
3486
3487 vc = vc_cons[fg_console].d;
3488 if (vc->vc_sw->con_debug_leave)
3489 ret = vc->vc_sw->con_debug_leave(vc);
3490 return ret;
3491}
3492EXPORT_SYMBOL_GPL(con_debug_leave);
3493
3494/**
3417 * register_con_driver - register console driver to console layer 3495 * register_con_driver - register console driver to console layer
3418 * @csw: console driver 3496 * @csw: console driver
3419 * @first: the first console to take over, minimum value is 0 3497 * @first: the first console to take over, minimum value is 0
diff --git a/drivers/clocksource/cs5535-clockevt.c b/drivers/clocksource/cs5535-clockevt.c
index d7be69f13154..b7dab32ce63c 100644
--- a/drivers/clocksource/cs5535-clockevt.c
+++ b/drivers/clocksource/cs5535-clockevt.c
@@ -194,6 +194,6 @@ err_timer:
194 194
195module_init(cs5535_mfgpt_init); 195module_init(cs5535_mfgpt_init);
196 196
197MODULE_AUTHOR("Andres Salomon <dilinger@collabora.co.uk>"); 197MODULE_AUTHOR("Andres Salomon <dilinger@queued.net>");
198MODULE_DESCRIPTION("CS5535/CS5536 MFGPT clock event driver"); 198MODULE_DESCRIPTION("CS5535/CS5536 MFGPT clock event driver");
199MODULE_LICENSE("GPL"); 199MODULE_LICENSE("GPL");
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 063b2184caf5..199dcb9f0b83 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -29,6 +29,8 @@
29#include <linux/completion.h> 29#include <linux/completion.h>
30#include <linux/mutex.h> 30#include <linux/mutex.h>
31 31
32#include <trace/events/power.h>
33
32#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_CORE, \ 34#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_CORE, \
33 "cpufreq-core", msg) 35 "cpufreq-core", msg)
34 36
@@ -68,7 +70,7 @@ static DEFINE_PER_CPU(int, cpufreq_policy_cpu);
68static DEFINE_PER_CPU(struct rw_semaphore, cpu_policy_rwsem); 70static DEFINE_PER_CPU(struct rw_semaphore, cpu_policy_rwsem);
69 71
70#define lock_policy_rwsem(mode, cpu) \ 72#define lock_policy_rwsem(mode, cpu) \
71int lock_policy_rwsem_##mode \ 73static int lock_policy_rwsem_##mode \
72(int cpu) \ 74(int cpu) \
73{ \ 75{ \
74 int policy_cpu = per_cpu(cpufreq_policy_cpu, cpu); \ 76 int policy_cpu = per_cpu(cpufreq_policy_cpu, cpu); \
@@ -83,26 +85,22 @@ int lock_policy_rwsem_##mode \
83} 85}
84 86
85lock_policy_rwsem(read, cpu); 87lock_policy_rwsem(read, cpu);
86EXPORT_SYMBOL_GPL(lock_policy_rwsem_read);
87 88
88lock_policy_rwsem(write, cpu); 89lock_policy_rwsem(write, cpu);
89EXPORT_SYMBOL_GPL(lock_policy_rwsem_write);
90 90
91void unlock_policy_rwsem_read(int cpu) 91static void unlock_policy_rwsem_read(int cpu)
92{ 92{
93 int policy_cpu = per_cpu(cpufreq_policy_cpu, cpu); 93 int policy_cpu = per_cpu(cpufreq_policy_cpu, cpu);
94 BUG_ON(policy_cpu == -1); 94 BUG_ON(policy_cpu == -1);
95 up_read(&per_cpu(cpu_policy_rwsem, policy_cpu)); 95 up_read(&per_cpu(cpu_policy_rwsem, policy_cpu));
96} 96}
97EXPORT_SYMBOL_GPL(unlock_policy_rwsem_read);
98 97
99void unlock_policy_rwsem_write(int cpu) 98static void unlock_policy_rwsem_write(int cpu)
100{ 99{
101 int policy_cpu = per_cpu(cpufreq_policy_cpu, cpu); 100 int policy_cpu = per_cpu(cpufreq_policy_cpu, cpu);
102 BUG_ON(policy_cpu == -1); 101 BUG_ON(policy_cpu == -1);
103 up_write(&per_cpu(cpu_policy_rwsem, policy_cpu)); 102 up_write(&per_cpu(cpu_policy_rwsem, policy_cpu));
104} 103}
105EXPORT_SYMBOL_GPL(unlock_policy_rwsem_write);
106 104
107 105
108/* internal prototypes */ 106/* internal prototypes */
@@ -354,6 +352,9 @@ void cpufreq_notify_transition(struct cpufreq_freqs *freqs, unsigned int state)
354 352
355 case CPUFREQ_POSTCHANGE: 353 case CPUFREQ_POSTCHANGE:
356 adjust_jiffies(CPUFREQ_POSTCHANGE, freqs); 354 adjust_jiffies(CPUFREQ_POSTCHANGE, freqs);
355 dprintk("FREQ: %lu - CPU: %lu", (unsigned long)freqs->new,
356 (unsigned long)freqs->cpu);
357 trace_power_frequency(POWER_PSTATE, freqs->new, freqs->cpu);
357 srcu_notifier_call_chain(&cpufreq_transition_notifier_list, 358 srcu_notifier_call_chain(&cpufreq_transition_notifier_list,
358 CPUFREQ_POSTCHANGE, freqs); 359 CPUFREQ_POSTCHANGE, freqs);
359 if (likely(policy) && likely(policy->cpu == freqs->cpu)) 360 if (likely(policy) && likely(policy->cpu == freqs->cpu))
@@ -1077,6 +1078,7 @@ err_out_unregister:
1077 1078
1078err_unlock_policy: 1079err_unlock_policy:
1079 unlock_policy_rwsem_write(cpu); 1080 unlock_policy_rwsem_write(cpu);
1081 free_cpumask_var(policy->related_cpus);
1080err_free_cpumask: 1082err_free_cpumask:
1081 free_cpumask_var(policy->cpus); 1083 free_cpumask_var(policy->cpus);
1082err_free_policy: 1084err_free_policy:
@@ -1762,17 +1764,8 @@ static int __cpufreq_set_policy(struct cpufreq_policy *data,
1762 dprintk("governor switch\n"); 1764 dprintk("governor switch\n");
1763 1765
1764 /* end old governor */ 1766 /* end old governor */
1765 if (data->governor) { 1767 if (data->governor)
1766 /*
1767 * Need to release the rwsem around governor
1768 * stop due to lock dependency between
1769 * cancel_delayed_work_sync and the read lock
1770 * taken in the delayed work handler.
1771 */
1772 unlock_policy_rwsem_write(data->cpu);
1773 __cpufreq_governor(data, CPUFREQ_GOV_STOP); 1768 __cpufreq_governor(data, CPUFREQ_GOV_STOP);
1774 lock_policy_rwsem_write(data->cpu);
1775 }
1776 1769
1777 /* start new governor */ 1770 /* start new governor */
1778 data->governor = policy->governor; 1771 data->governor = policy->governor;
@@ -1883,8 +1876,7 @@ static int __cpuinit cpufreq_cpu_callback(struct notifier_block *nfb,
1883 return NOTIFY_OK; 1876 return NOTIFY_OK;
1884} 1877}
1885 1878
1886static struct notifier_block __refdata cpufreq_cpu_notifier = 1879static struct notifier_block __refdata cpufreq_cpu_notifier = {
1887{
1888 .notifier_call = cpufreq_cpu_callback, 1880 .notifier_call = cpufreq_cpu_callback,
1889}; 1881};
1890 1882
diff --git a/drivers/cpufreq/cpufreq_ondemand.c b/drivers/cpufreq/cpufreq_ondemand.c
index e1314212d8d4..7b5093664e49 100644
--- a/drivers/cpufreq/cpufreq_ondemand.c
+++ b/drivers/cpufreq/cpufreq_ondemand.c
@@ -459,6 +459,17 @@ static struct attribute_group dbs_attr_group_old = {
459 459
460/************************** sysfs end ************************/ 460/************************** sysfs end ************************/
461 461
462static void dbs_freq_increase(struct cpufreq_policy *p, unsigned int freq)
463{
464 if (dbs_tuners_ins.powersave_bias)
465 freq = powersave_bias_target(p, freq, CPUFREQ_RELATION_H);
466 else if (p->cur == p->max)
467 return;
468
469 __cpufreq_driver_target(p, freq, dbs_tuners_ins.powersave_bias ?
470 CPUFREQ_RELATION_L : CPUFREQ_RELATION_H);
471}
472
462static void dbs_check_cpu(struct cpu_dbs_info_s *this_dbs_info) 473static void dbs_check_cpu(struct cpu_dbs_info_s *this_dbs_info)
463{ 474{
464 unsigned int max_load_freq; 475 unsigned int max_load_freq;
@@ -551,19 +562,7 @@ static void dbs_check_cpu(struct cpu_dbs_info_s *this_dbs_info)
551 562
552 /* Check for frequency increase */ 563 /* Check for frequency increase */
553 if (max_load_freq > dbs_tuners_ins.up_threshold * policy->cur) { 564 if (max_load_freq > dbs_tuners_ins.up_threshold * policy->cur) {
554 /* if we are already at full speed then break out early */ 565 dbs_freq_increase(policy, policy->max);
555 if (!dbs_tuners_ins.powersave_bias) {
556 if (policy->cur == policy->max)
557 return;
558
559 __cpufreq_driver_target(policy, policy->max,
560 CPUFREQ_RELATION_H);
561 } else {
562 int freq = powersave_bias_target(policy, policy->max,
563 CPUFREQ_RELATION_H);
564 __cpufreq_driver_target(policy, freq,
565 CPUFREQ_RELATION_L);
566 }
567 return; 566 return;
568 } 567 }
569 568
@@ -610,7 +609,9 @@ static void do_dbs_timer(struct work_struct *work)
610 /* We want all CPUs to do sampling nearly on same jiffy */ 609 /* We want all CPUs to do sampling nearly on same jiffy */
611 int delay = usecs_to_jiffies(dbs_tuners_ins.sampling_rate); 610 int delay = usecs_to_jiffies(dbs_tuners_ins.sampling_rate);
612 611
613 delay -= jiffies % delay; 612 if (num_online_cpus() > 1)
613 delay -= jiffies % delay;
614
614 mutex_lock(&dbs_info->timer_mutex); 615 mutex_lock(&dbs_info->timer_mutex);
615 616
616 /* Common NORMAL_SAMPLE setup */ 617 /* Common NORMAL_SAMPLE setup */
@@ -635,7 +636,9 @@ static inline void dbs_timer_init(struct cpu_dbs_info_s *dbs_info)
635{ 636{
636 /* We want all CPUs to do sampling nearly on same jiffy */ 637 /* We want all CPUs to do sampling nearly on same jiffy */
637 int delay = usecs_to_jiffies(dbs_tuners_ins.sampling_rate); 638 int delay = usecs_to_jiffies(dbs_tuners_ins.sampling_rate);
638 delay -= jiffies % delay; 639
640 if (num_online_cpus() > 1)
641 delay -= jiffies % delay;
639 642
640 dbs_info->sample_type = DBS_NORMAL_SAMPLE; 643 dbs_info->sample_type = DBS_NORMAL_SAMPLE;
641 INIT_DELAYED_WORK_DEFERRABLE(&dbs_info->work, do_dbs_timer); 644 INIT_DELAYED_WORK_DEFERRABLE(&dbs_info->work, do_dbs_timer);
diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c
index 199488576a05..dbefe15bd582 100644
--- a/drivers/cpuidle/cpuidle.c
+++ b/drivers/cpuidle/cpuidle.c
@@ -95,7 +95,7 @@ static void cpuidle_idle_call(void)
95 /* give the governor an opportunity to reflect on the outcome */ 95 /* give the governor an opportunity to reflect on the outcome */
96 if (cpuidle_curr_governor->reflect) 96 if (cpuidle_curr_governor->reflect)
97 cpuidle_curr_governor->reflect(dev); 97 cpuidle_curr_governor->reflect(dev);
98 trace_power_end(0); 98 trace_power_end(smp_processor_id());
99} 99}
100 100
101/** 101/**
diff --git a/drivers/crypto/amcc/crypto4xx_reg_def.h b/drivers/crypto/amcc/crypto4xx_reg_def.h
index 7d4edb002619..5f5fbc0716ff 100644
--- a/drivers/crypto/amcc/crypto4xx_reg_def.h
+++ b/drivers/crypto/amcc/crypto4xx_reg_def.h
@@ -113,7 +113,7 @@
113#define CRYPTO4XX_PRNG_LFSR_H 0x00070034 113#define CRYPTO4XX_PRNG_LFSR_H 0x00070034
114 114
115/** 115/**
116 * Initilize CRYPTO ENGINE registers, and memory bases. 116 * Initialize CRYPTO ENGINE registers, and memory bases.
117 */ 117 */
118#define PPC4XX_PDR_POLL 0x3ff 118#define PPC4XX_PDR_POLL 0x3ff
119#define PPC4XX_OUTPUT_THRESHOLD 2 119#define PPC4XX_OUTPUT_THRESHOLD 2
diff --git a/drivers/crypto/geode-aes.c b/drivers/crypto/geode-aes.c
index 09389dd2f96b..219d09cbb0d1 100644
--- a/drivers/crypto/geode-aes.c
+++ b/drivers/crypto/geode-aes.c
@@ -573,7 +573,7 @@ geode_aes_probe(struct pci_dev *dev, const struct pci_device_id *id)
573} 573}
574 574
575static struct pci_device_id geode_aes_tbl[] = { 575static struct pci_device_id geode_aes_tbl[] = {
576 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LX_AES, PCI_ANY_ID, PCI_ANY_ID} , 576 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_LX_AES), } ,
577 { 0, } 577 { 0, }
578}; 578};
579 579
diff --git a/drivers/crypto/hifn_795x.c b/drivers/crypto/hifn_795x.c
index 16fce3aadf4d..e449ac5627a5 100644
--- a/drivers/crypto/hifn_795x.c
+++ b/drivers/crypto/hifn_795x.c
@@ -2018,7 +2018,6 @@ static void hifn_flush(struct hifn_device *dev)
2018{ 2018{
2019 unsigned long flags; 2019 unsigned long flags;
2020 struct crypto_async_request *async_req; 2020 struct crypto_async_request *async_req;
2021 struct hifn_context *ctx;
2022 struct ablkcipher_request *req; 2021 struct ablkcipher_request *req;
2023 struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt; 2022 struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
2024 int i; 2023 int i;
@@ -2035,7 +2034,6 @@ static void hifn_flush(struct hifn_device *dev)
2035 2034
2036 spin_lock_irqsave(&dev->lock, flags); 2035 spin_lock_irqsave(&dev->lock, flags);
2037 while ((async_req = crypto_dequeue_request(&dev->queue))) { 2036 while ((async_req = crypto_dequeue_request(&dev->queue))) {
2038 ctx = crypto_tfm_ctx(async_req->tfm);
2039 req = container_of(async_req, struct ablkcipher_request, base); 2037 req = container_of(async_req, struct ablkcipher_request, base);
2040 spin_unlock_irqrestore(&dev->lock, flags); 2038 spin_unlock_irqrestore(&dev->lock, flags);
2041 2039
@@ -2139,7 +2137,6 @@ static int hifn_setup_crypto_req(struct ablkcipher_request *req, u8 op,
2139static int hifn_process_queue(struct hifn_device *dev) 2137static int hifn_process_queue(struct hifn_device *dev)
2140{ 2138{
2141 struct crypto_async_request *async_req, *backlog; 2139 struct crypto_async_request *async_req, *backlog;
2142 struct hifn_context *ctx;
2143 struct ablkcipher_request *req; 2140 struct ablkcipher_request *req;
2144 unsigned long flags; 2141 unsigned long flags;
2145 int err = 0; 2142 int err = 0;
@@ -2156,7 +2153,6 @@ static int hifn_process_queue(struct hifn_device *dev)
2156 if (backlog) 2153 if (backlog)
2157 backlog->complete(backlog, -EINPROGRESS); 2154 backlog->complete(backlog, -EINPROGRESS);
2158 2155
2159 ctx = crypto_tfm_ctx(async_req->tfm);
2160 req = container_of(async_req, struct ablkcipher_request, base); 2156 req = container_of(async_req, struct ablkcipher_request, base);
2161 2157
2162 err = hifn_handle_req(req); 2158 err = hifn_handle_req(req);
diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c
index e095422b58dd..7d279e578df5 100644
--- a/drivers/crypto/mv_cesa.c
+++ b/drivers/crypto/mv_cesa.c
@@ -1055,20 +1055,20 @@ static int mv_probe(struct platform_device *pdev)
1055 cp->queue_th = kthread_run(queue_manag, cp, "mv_crypto"); 1055 cp->queue_th = kthread_run(queue_manag, cp, "mv_crypto");
1056 if (IS_ERR(cp->queue_th)) { 1056 if (IS_ERR(cp->queue_th)) {
1057 ret = PTR_ERR(cp->queue_th); 1057 ret = PTR_ERR(cp->queue_th);
1058 goto err_thread; 1058 goto err_unmap_sram;
1059 } 1059 }
1060 1060
1061 ret = request_irq(irq, crypto_int, IRQF_DISABLED, dev_name(&pdev->dev), 1061 ret = request_irq(irq, crypto_int, IRQF_DISABLED, dev_name(&pdev->dev),
1062 cp); 1062 cp);
1063 if (ret) 1063 if (ret)
1064 goto err_unmap_sram; 1064 goto err_thread;
1065 1065
1066 writel(SEC_INT_ACCEL0_DONE, cpg->reg + SEC_ACCEL_INT_MASK); 1066 writel(SEC_INT_ACCEL0_DONE, cpg->reg + SEC_ACCEL_INT_MASK);
1067 writel(SEC_CFG_STOP_DIG_ERR, cpg->reg + SEC_ACCEL_CFG); 1067 writel(SEC_CFG_STOP_DIG_ERR, cpg->reg + SEC_ACCEL_CFG);
1068 1068
1069 ret = crypto_register_alg(&mv_aes_alg_ecb); 1069 ret = crypto_register_alg(&mv_aes_alg_ecb);
1070 if (ret) 1070 if (ret)
1071 goto err_reg; 1071 goto err_irq;
1072 1072
1073 ret = crypto_register_alg(&mv_aes_alg_cbc); 1073 ret = crypto_register_alg(&mv_aes_alg_cbc);
1074 if (ret) 1074 if (ret)
@@ -1091,9 +1091,9 @@ static int mv_probe(struct platform_device *pdev)
1091 return 0; 1091 return 0;
1092err_unreg_ecb: 1092err_unreg_ecb:
1093 crypto_unregister_alg(&mv_aes_alg_ecb); 1093 crypto_unregister_alg(&mv_aes_alg_ecb);
1094err_thread: 1094err_irq:
1095 free_irq(irq, cp); 1095 free_irq(irq, cp);
1096err_reg: 1096err_thread:
1097 kthread_stop(cp->queue_th); 1097 kthread_stop(cp->queue_th);
1098err_unmap_sram: 1098err_unmap_sram:
1099 iounmap(cp->sram); 1099 iounmap(cp->sram);
diff --git a/drivers/crypto/n2_core.c b/drivers/crypto/n2_core.c
index 23163fda5035..26af2dd5d831 100644
--- a/drivers/crypto/n2_core.c
+++ b/drivers/crypto/n2_core.c
@@ -239,21 +239,57 @@ static inline bool n2_should_run_async(struct spu_queue *qp, int this_len)
239} 239}
240#endif 240#endif
241 241
242struct n2_base_ctx { 242struct n2_ahash_alg {
243 struct list_head list; 243 struct list_head entry;
244 const char *hash_zero;
245 const u32 *hash_init;
246 u8 hw_op_hashsz;
247 u8 digest_size;
248 u8 auth_type;
249 u8 hmac_type;
250 struct ahash_alg alg;
244}; 251};
245 252
246static void n2_base_ctx_init(struct n2_base_ctx *ctx) 253static inline struct n2_ahash_alg *n2_ahash_alg(struct crypto_tfm *tfm)
247{ 254{
248 INIT_LIST_HEAD(&ctx->list); 255 struct crypto_alg *alg = tfm->__crt_alg;
256 struct ahash_alg *ahash_alg;
257
258 ahash_alg = container_of(alg, struct ahash_alg, halg.base);
259
260 return container_of(ahash_alg, struct n2_ahash_alg, alg);
249} 261}
250 262
251struct n2_hash_ctx { 263struct n2_hmac_alg {
252 struct n2_base_ctx base; 264 const char *child_alg;
265 struct n2_ahash_alg derived;
266};
267
268static inline struct n2_hmac_alg *n2_hmac_alg(struct crypto_tfm *tfm)
269{
270 struct crypto_alg *alg = tfm->__crt_alg;
271 struct ahash_alg *ahash_alg;
272
273 ahash_alg = container_of(alg, struct ahash_alg, halg.base);
274
275 return container_of(ahash_alg, struct n2_hmac_alg, derived.alg);
276}
253 277
278struct n2_hash_ctx {
254 struct crypto_ahash *fallback_tfm; 279 struct crypto_ahash *fallback_tfm;
255}; 280};
256 281
282#define N2_HASH_KEY_MAX 32 /* HW limit for all HMAC requests */
283
284struct n2_hmac_ctx {
285 struct n2_hash_ctx base;
286
287 struct crypto_shash *child_shash;
288
289 int hash_key_len;
290 unsigned char hash_key[N2_HASH_KEY_MAX];
291};
292
257struct n2_hash_req_ctx { 293struct n2_hash_req_ctx {
258 union { 294 union {
259 struct md5_state md5; 295 struct md5_state md5;
@@ -261,9 +297,6 @@ struct n2_hash_req_ctx {
261 struct sha256_state sha256; 297 struct sha256_state sha256;
262 } u; 298 } u;
263 299
264 unsigned char hash_key[64];
265 unsigned char keyed_zero_hash[32];
266
267 struct ahash_request fallback_req; 300 struct ahash_request fallback_req;
268}; 301};
269 302
@@ -356,6 +389,94 @@ static void n2_hash_cra_exit(struct crypto_tfm *tfm)
356 crypto_free_ahash(ctx->fallback_tfm); 389 crypto_free_ahash(ctx->fallback_tfm);
357} 390}
358 391
392static int n2_hmac_cra_init(struct crypto_tfm *tfm)
393{
394 const char *fallback_driver_name = tfm->__crt_alg->cra_name;
395 struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);
396 struct n2_hmac_ctx *ctx = crypto_ahash_ctx(ahash);
397 struct n2_hmac_alg *n2alg = n2_hmac_alg(tfm);
398 struct crypto_ahash *fallback_tfm;
399 struct crypto_shash *child_shash;
400 int err;
401
402 fallback_tfm = crypto_alloc_ahash(fallback_driver_name, 0,
403 CRYPTO_ALG_NEED_FALLBACK);
404 if (IS_ERR(fallback_tfm)) {
405 pr_warning("Fallback driver '%s' could not be loaded!\n",
406 fallback_driver_name);
407 err = PTR_ERR(fallback_tfm);
408 goto out;
409 }
410
411 child_shash = crypto_alloc_shash(n2alg->child_alg, 0, 0);
412 if (IS_ERR(child_shash)) {
413 pr_warning("Child shash '%s' could not be loaded!\n",
414 n2alg->child_alg);
415 err = PTR_ERR(child_shash);
416 goto out_free_fallback;
417 }
418
419 crypto_ahash_set_reqsize(ahash, (sizeof(struct n2_hash_req_ctx) +
420 crypto_ahash_reqsize(fallback_tfm)));
421
422 ctx->child_shash = child_shash;
423 ctx->base.fallback_tfm = fallback_tfm;
424 return 0;
425
426out_free_fallback:
427 crypto_free_ahash(fallback_tfm);
428
429out:
430 return err;
431}
432
433static void n2_hmac_cra_exit(struct crypto_tfm *tfm)
434{
435 struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);
436 struct n2_hmac_ctx *ctx = crypto_ahash_ctx(ahash);
437
438 crypto_free_ahash(ctx->base.fallback_tfm);
439 crypto_free_shash(ctx->child_shash);
440}
441
442static int n2_hmac_async_setkey(struct crypto_ahash *tfm, const u8 *key,
443 unsigned int keylen)
444{
445 struct n2_hmac_ctx *ctx = crypto_ahash_ctx(tfm);
446 struct crypto_shash *child_shash = ctx->child_shash;
447 struct crypto_ahash *fallback_tfm;
448 struct {
449 struct shash_desc shash;
450 char ctx[crypto_shash_descsize(child_shash)];
451 } desc;
452 int err, bs, ds;
453
454 fallback_tfm = ctx->base.fallback_tfm;
455 err = crypto_ahash_setkey(fallback_tfm, key, keylen);
456 if (err)
457 return err;
458
459 desc.shash.tfm = child_shash;
460 desc.shash.flags = crypto_ahash_get_flags(tfm) &
461 CRYPTO_TFM_REQ_MAY_SLEEP;
462
463 bs = crypto_shash_blocksize(child_shash);
464 ds = crypto_shash_digestsize(child_shash);
465 BUG_ON(ds > N2_HASH_KEY_MAX);
466 if (keylen > bs) {
467 err = crypto_shash_digest(&desc.shash, key, keylen,
468 ctx->hash_key);
469 if (err)
470 return err;
471 keylen = ds;
472 } else if (keylen <= N2_HASH_KEY_MAX)
473 memcpy(ctx->hash_key, key, keylen);
474
475 ctx->hash_key_len = keylen;
476
477 return err;
478}
479
359static unsigned long wait_for_tail(struct spu_queue *qp) 480static unsigned long wait_for_tail(struct spu_queue *qp)
360{ 481{
361 unsigned long head, hv_ret; 482 unsigned long head, hv_ret;
@@ -385,12 +506,12 @@ static unsigned long submit_and_wait_for_tail(struct spu_queue *qp,
385 return hv_ret; 506 return hv_ret;
386} 507}
387 508
388static int n2_hash_async_digest(struct ahash_request *req, 509static int n2_do_async_digest(struct ahash_request *req,
389 unsigned int auth_type, unsigned int digest_size, 510 unsigned int auth_type, unsigned int digest_size,
390 unsigned int result_size, void *hash_loc) 511 unsigned int result_size, void *hash_loc,
512 unsigned long auth_key, unsigned int auth_key_len)
391{ 513{
392 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); 514 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
393 struct n2_hash_ctx *ctx = crypto_ahash_ctx(tfm);
394 struct cwq_initial_entry *ent; 515 struct cwq_initial_entry *ent;
395 struct crypto_hash_walk walk; 516 struct crypto_hash_walk walk;
396 struct spu_queue *qp; 517 struct spu_queue *qp;
@@ -403,6 +524,7 @@ static int n2_hash_async_digest(struct ahash_request *req,
403 */ 524 */
404 if (unlikely(req->nbytes > (1 << 16))) { 525 if (unlikely(req->nbytes > (1 << 16))) {
405 struct n2_hash_req_ctx *rctx = ahash_request_ctx(req); 526 struct n2_hash_req_ctx *rctx = ahash_request_ctx(req);
527 struct n2_hash_ctx *ctx = crypto_ahash_ctx(tfm);
406 528
407 ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm); 529 ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
408 rctx->fallback_req.base.flags = 530 rctx->fallback_req.base.flags =
@@ -414,8 +536,6 @@ static int n2_hash_async_digest(struct ahash_request *req,
414 return crypto_ahash_digest(&rctx->fallback_req); 536 return crypto_ahash_digest(&rctx->fallback_req);
415 } 537 }
416 538
417 n2_base_ctx_init(&ctx->base);
418
419 nbytes = crypto_hash_walk_first(req, &walk); 539 nbytes = crypto_hash_walk_first(req, &walk);
420 540
421 cpu = get_cpu(); 541 cpu = get_cpu();
@@ -430,13 +550,13 @@ static int n2_hash_async_digest(struct ahash_request *req,
430 */ 550 */
431 ent = qp->q + qp->tail; 551 ent = qp->q + qp->tail;
432 552
433 ent->control = control_word_base(nbytes, 0, 0, 553 ent->control = control_word_base(nbytes, auth_key_len, 0,
434 auth_type, digest_size, 554 auth_type, digest_size,
435 false, true, false, false, 555 false, true, false, false,
436 OPCODE_INPLACE_BIT | 556 OPCODE_INPLACE_BIT |
437 OPCODE_AUTH_MAC); 557 OPCODE_AUTH_MAC);
438 ent->src_addr = __pa(walk.data); 558 ent->src_addr = __pa(walk.data);
439 ent->auth_key_addr = 0UL; 559 ent->auth_key_addr = auth_key;
440 ent->auth_iv_addr = __pa(hash_loc); 560 ent->auth_iv_addr = __pa(hash_loc);
441 ent->final_auth_state_addr = 0UL; 561 ent->final_auth_state_addr = 0UL;
442 ent->enc_key_addr = 0UL; 562 ent->enc_key_addr = 0UL;
@@ -475,114 +595,55 @@ out:
475 return err; 595 return err;
476} 596}
477 597
478static int n2_md5_async_digest(struct ahash_request *req) 598static int n2_hash_async_digest(struct ahash_request *req)
479{ 599{
600 struct n2_ahash_alg *n2alg = n2_ahash_alg(req->base.tfm);
480 struct n2_hash_req_ctx *rctx = ahash_request_ctx(req); 601 struct n2_hash_req_ctx *rctx = ahash_request_ctx(req);
481 struct md5_state *m = &rctx->u.md5; 602 int ds;
482 603
604 ds = n2alg->digest_size;
483 if (unlikely(req->nbytes == 0)) { 605 if (unlikely(req->nbytes == 0)) {
484 static const char md5_zero[MD5_DIGEST_SIZE] = { 606 memcpy(req->result, n2alg->hash_zero, ds);
485 0xd4, 0x1d, 0x8c, 0xd9, 0x8f, 0x00, 0xb2, 0x04,
486 0xe9, 0x80, 0x09, 0x98, 0xec, 0xf8, 0x42, 0x7e,
487 };
488
489 memcpy(req->result, md5_zero, MD5_DIGEST_SIZE);
490 return 0; 607 return 0;
491 } 608 }
492 m->hash[0] = cpu_to_le32(0x67452301); 609 memcpy(&rctx->u, n2alg->hash_init, n2alg->hw_op_hashsz);
493 m->hash[1] = cpu_to_le32(0xefcdab89);
494 m->hash[2] = cpu_to_le32(0x98badcfe);
495 m->hash[3] = cpu_to_le32(0x10325476);
496 610
497 return n2_hash_async_digest(req, AUTH_TYPE_MD5, 611 return n2_do_async_digest(req, n2alg->auth_type,
498 MD5_DIGEST_SIZE, MD5_DIGEST_SIZE, 612 n2alg->hw_op_hashsz, ds,
499 m->hash); 613 &rctx->u, 0UL, 0);
500} 614}
501 615
502static int n2_sha1_async_digest(struct ahash_request *req) 616static int n2_hmac_async_digest(struct ahash_request *req)
503{ 617{
618 struct n2_hmac_alg *n2alg = n2_hmac_alg(req->base.tfm);
504 struct n2_hash_req_ctx *rctx = ahash_request_ctx(req); 619 struct n2_hash_req_ctx *rctx = ahash_request_ctx(req);
505 struct sha1_state *s = &rctx->u.sha1; 620 struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
506 621 struct n2_hmac_ctx *ctx = crypto_ahash_ctx(tfm);
507 if (unlikely(req->nbytes == 0)) { 622 int ds;
508 static const char sha1_zero[SHA1_DIGEST_SIZE] = {
509 0xda, 0x39, 0xa3, 0xee, 0x5e, 0x6b, 0x4b, 0x0d, 0x32,
510 0x55, 0xbf, 0xef, 0x95, 0x60, 0x18, 0x90, 0xaf, 0xd8,
511 0x07, 0x09
512 };
513
514 memcpy(req->result, sha1_zero, SHA1_DIGEST_SIZE);
515 return 0;
516 }
517 s->state[0] = SHA1_H0;
518 s->state[1] = SHA1_H1;
519 s->state[2] = SHA1_H2;
520 s->state[3] = SHA1_H3;
521 s->state[4] = SHA1_H4;
522
523 return n2_hash_async_digest(req, AUTH_TYPE_SHA1,
524 SHA1_DIGEST_SIZE, SHA1_DIGEST_SIZE,
525 s->state);
526}
527
528static int n2_sha256_async_digest(struct ahash_request *req)
529{
530 struct n2_hash_req_ctx *rctx = ahash_request_ctx(req);
531 struct sha256_state *s = &rctx->u.sha256;
532
533 if (req->nbytes == 0) {
534 static const char sha256_zero[SHA256_DIGEST_SIZE] = {
535 0xe3, 0xb0, 0xc4, 0x42, 0x98, 0xfc, 0x1c, 0x14, 0x9a,
536 0xfb, 0xf4, 0xc8, 0x99, 0x6f, 0xb9, 0x24, 0x27, 0xae,
537 0x41, 0xe4, 0x64, 0x9b, 0x93, 0x4c, 0xa4, 0x95, 0x99,
538 0x1b, 0x78, 0x52, 0xb8, 0x55
539 };
540
541 memcpy(req->result, sha256_zero, SHA256_DIGEST_SIZE);
542 return 0;
543 }
544 s->state[0] = SHA256_H0;
545 s->state[1] = SHA256_H1;
546 s->state[2] = SHA256_H2;
547 s->state[3] = SHA256_H3;
548 s->state[4] = SHA256_H4;
549 s->state[5] = SHA256_H5;
550 s->state[6] = SHA256_H6;
551 s->state[7] = SHA256_H7;
552
553 return n2_hash_async_digest(req, AUTH_TYPE_SHA256,
554 SHA256_DIGEST_SIZE, SHA256_DIGEST_SIZE,
555 s->state);
556}
557 623
558static int n2_sha224_async_digest(struct ahash_request *req) 624 ds = n2alg->derived.digest_size;
559{ 625 if (unlikely(req->nbytes == 0) ||
560 struct n2_hash_req_ctx *rctx = ahash_request_ctx(req); 626 unlikely(ctx->hash_key_len > N2_HASH_KEY_MAX)) {
561 struct sha256_state *s = &rctx->u.sha256; 627 struct n2_hash_req_ctx *rctx = ahash_request_ctx(req);
628 struct n2_hash_ctx *ctx = crypto_ahash_ctx(tfm);
562 629
563 if (req->nbytes == 0) { 630 ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
564 static const char sha224_zero[SHA224_DIGEST_SIZE] = { 631 rctx->fallback_req.base.flags =
565 0xd1, 0x4a, 0x02, 0x8c, 0x2a, 0x3a, 0x2b, 0xc9, 0x47, 632 req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP;
566 0x61, 0x02, 0xbb, 0x28, 0x82, 0x34, 0xc4, 0x15, 0xa2, 633 rctx->fallback_req.nbytes = req->nbytes;
567 0xb0, 0x1f, 0x82, 0x8e, 0xa6, 0x2a, 0xc5, 0xb3, 0xe4, 634 rctx->fallback_req.src = req->src;
568 0x2f 635 rctx->fallback_req.result = req->result;
569 };
570 636
571 memcpy(req->result, sha224_zero, SHA224_DIGEST_SIZE); 637 return crypto_ahash_digest(&rctx->fallback_req);
572 return 0;
573 } 638 }
574 s->state[0] = SHA224_H0; 639 memcpy(&rctx->u, n2alg->derived.hash_init,
575 s->state[1] = SHA224_H1; 640 n2alg->derived.hw_op_hashsz);
576 s->state[2] = SHA224_H2;
577 s->state[3] = SHA224_H3;
578 s->state[4] = SHA224_H4;
579 s->state[5] = SHA224_H5;
580 s->state[6] = SHA224_H6;
581 s->state[7] = SHA224_H7;
582 641
583 return n2_hash_async_digest(req, AUTH_TYPE_SHA256, 642 return n2_do_async_digest(req, n2alg->derived.hmac_type,
584 SHA256_DIGEST_SIZE, SHA224_DIGEST_SIZE, 643 n2alg->derived.hw_op_hashsz, ds,
585 s->state); 644 &rctx->u,
645 __pa(&ctx->hash_key),
646 ctx->hash_key_len);
586} 647}
587 648
588struct n2_cipher_context { 649struct n2_cipher_context {
@@ -1209,35 +1270,92 @@ static LIST_HEAD(cipher_algs);
1209 1270
1210struct n2_hash_tmpl { 1271struct n2_hash_tmpl {
1211 const char *name; 1272 const char *name;
1212 int (*digest)(struct ahash_request *req); 1273 const char *hash_zero;
1274 const u32 *hash_init;
1275 u8 hw_op_hashsz;
1213 u8 digest_size; 1276 u8 digest_size;
1214 u8 block_size; 1277 u8 block_size;
1278 u8 auth_type;
1279 u8 hmac_type;
1280};
1281
1282static const char md5_zero[MD5_DIGEST_SIZE] = {
1283 0xd4, 0x1d, 0x8c, 0xd9, 0x8f, 0x00, 0xb2, 0x04,
1284 0xe9, 0x80, 0x09, 0x98, 0xec, 0xf8, 0x42, 0x7e,
1285};
1286static const u32 md5_init[MD5_HASH_WORDS] = {
1287 cpu_to_le32(0x67452301),
1288 cpu_to_le32(0xefcdab89),
1289 cpu_to_le32(0x98badcfe),
1290 cpu_to_le32(0x10325476),
1291};
1292static const char sha1_zero[SHA1_DIGEST_SIZE] = {
1293 0xda, 0x39, 0xa3, 0xee, 0x5e, 0x6b, 0x4b, 0x0d, 0x32,
1294 0x55, 0xbf, 0xef, 0x95, 0x60, 0x18, 0x90, 0xaf, 0xd8,
1295 0x07, 0x09
1215}; 1296};
1297static const u32 sha1_init[SHA1_DIGEST_SIZE / 4] = {
1298 SHA1_H0, SHA1_H1, SHA1_H2, SHA1_H3, SHA1_H4,
1299};
1300static const char sha256_zero[SHA256_DIGEST_SIZE] = {
1301 0xe3, 0xb0, 0xc4, 0x42, 0x98, 0xfc, 0x1c, 0x14, 0x9a,
1302 0xfb, 0xf4, 0xc8, 0x99, 0x6f, 0xb9, 0x24, 0x27, 0xae,
1303 0x41, 0xe4, 0x64, 0x9b, 0x93, 0x4c, 0xa4, 0x95, 0x99,
1304 0x1b, 0x78, 0x52, 0xb8, 0x55
1305};
1306static const u32 sha256_init[SHA256_DIGEST_SIZE / 4] = {
1307 SHA256_H0, SHA256_H1, SHA256_H2, SHA256_H3,
1308 SHA256_H4, SHA256_H5, SHA256_H6, SHA256_H7,
1309};
1310static const char sha224_zero[SHA224_DIGEST_SIZE] = {
1311 0xd1, 0x4a, 0x02, 0x8c, 0x2a, 0x3a, 0x2b, 0xc9, 0x47,
1312 0x61, 0x02, 0xbb, 0x28, 0x82, 0x34, 0xc4, 0x15, 0xa2,
1313 0xb0, 0x1f, 0x82, 0x8e, 0xa6, 0x2a, 0xc5, 0xb3, 0xe4,
1314 0x2f
1315};
1316static const u32 sha224_init[SHA256_DIGEST_SIZE / 4] = {
1317 SHA224_H0, SHA224_H1, SHA224_H2, SHA224_H3,
1318 SHA224_H4, SHA224_H5, SHA224_H6, SHA224_H7,
1319};
1320
1216static const struct n2_hash_tmpl hash_tmpls[] = { 1321static const struct n2_hash_tmpl hash_tmpls[] = {
1217 { .name = "md5", 1322 { .name = "md5",
1218 .digest = n2_md5_async_digest, 1323 .hash_zero = md5_zero,
1324 .hash_init = md5_init,
1325 .auth_type = AUTH_TYPE_MD5,
1326 .hmac_type = AUTH_TYPE_HMAC_MD5,
1327 .hw_op_hashsz = MD5_DIGEST_SIZE,
1219 .digest_size = MD5_DIGEST_SIZE, 1328 .digest_size = MD5_DIGEST_SIZE,
1220 .block_size = MD5_HMAC_BLOCK_SIZE }, 1329 .block_size = MD5_HMAC_BLOCK_SIZE },
1221 { .name = "sha1", 1330 { .name = "sha1",
1222 .digest = n2_sha1_async_digest, 1331 .hash_zero = sha1_zero,
1332 .hash_init = sha1_init,
1333 .auth_type = AUTH_TYPE_SHA1,
1334 .hmac_type = AUTH_TYPE_HMAC_SHA1,
1335 .hw_op_hashsz = SHA1_DIGEST_SIZE,
1223 .digest_size = SHA1_DIGEST_SIZE, 1336 .digest_size = SHA1_DIGEST_SIZE,
1224 .block_size = SHA1_BLOCK_SIZE }, 1337 .block_size = SHA1_BLOCK_SIZE },
1225 { .name = "sha256", 1338 { .name = "sha256",
1226 .digest = n2_sha256_async_digest, 1339 .hash_zero = sha256_zero,
1340 .hash_init = sha256_init,
1341 .auth_type = AUTH_TYPE_SHA256,
1342 .hmac_type = AUTH_TYPE_HMAC_SHA256,
1343 .hw_op_hashsz = SHA256_DIGEST_SIZE,
1227 .digest_size = SHA256_DIGEST_SIZE, 1344 .digest_size = SHA256_DIGEST_SIZE,
1228 .block_size = SHA256_BLOCK_SIZE }, 1345 .block_size = SHA256_BLOCK_SIZE },
1229 { .name = "sha224", 1346 { .name = "sha224",
1230 .digest = n2_sha224_async_digest, 1347 .hash_zero = sha224_zero,
1348 .hash_init = sha224_init,
1349 .auth_type = AUTH_TYPE_SHA256,
1350 .hmac_type = AUTH_TYPE_RESERVED,
1351 .hw_op_hashsz = SHA256_DIGEST_SIZE,
1231 .digest_size = SHA224_DIGEST_SIZE, 1352 .digest_size = SHA224_DIGEST_SIZE,
1232 .block_size = SHA224_BLOCK_SIZE }, 1353 .block_size = SHA224_BLOCK_SIZE },
1233}; 1354};
1234#define NUM_HASH_TMPLS ARRAY_SIZE(hash_tmpls) 1355#define NUM_HASH_TMPLS ARRAY_SIZE(hash_tmpls)
1235 1356
1236struct n2_ahash_alg {
1237 struct list_head entry;
1238 struct ahash_alg alg;
1239};
1240static LIST_HEAD(ahash_algs); 1357static LIST_HEAD(ahash_algs);
1358static LIST_HEAD(hmac_algs);
1241 1359
1242static int algs_registered; 1360static int algs_registered;
1243 1361
@@ -1245,12 +1363,18 @@ static void __n2_unregister_algs(void)
1245{ 1363{
1246 struct n2_cipher_alg *cipher, *cipher_tmp; 1364 struct n2_cipher_alg *cipher, *cipher_tmp;
1247 struct n2_ahash_alg *alg, *alg_tmp; 1365 struct n2_ahash_alg *alg, *alg_tmp;
1366 struct n2_hmac_alg *hmac, *hmac_tmp;
1248 1367
1249 list_for_each_entry_safe(cipher, cipher_tmp, &cipher_algs, entry) { 1368 list_for_each_entry_safe(cipher, cipher_tmp, &cipher_algs, entry) {
1250 crypto_unregister_alg(&cipher->alg); 1369 crypto_unregister_alg(&cipher->alg);
1251 list_del(&cipher->entry); 1370 list_del(&cipher->entry);
1252 kfree(cipher); 1371 kfree(cipher);
1253 } 1372 }
1373 list_for_each_entry_safe(hmac, hmac_tmp, &hmac_algs, derived.entry) {
1374 crypto_unregister_ahash(&hmac->derived.alg);
1375 list_del(&hmac->derived.entry);
1376 kfree(hmac);
1377 }
1254 list_for_each_entry_safe(alg, alg_tmp, &ahash_algs, entry) { 1378 list_for_each_entry_safe(alg, alg_tmp, &ahash_algs, entry) {
1255 crypto_unregister_ahash(&alg->alg); 1379 crypto_unregister_ahash(&alg->alg);
1256 list_del(&alg->entry); 1380 list_del(&alg->entry);
@@ -1290,8 +1414,49 @@ static int __devinit __n2_register_one_cipher(const struct n2_cipher_tmpl *tmpl)
1290 list_add(&p->entry, &cipher_algs); 1414 list_add(&p->entry, &cipher_algs);
1291 err = crypto_register_alg(alg); 1415 err = crypto_register_alg(alg);
1292 if (err) { 1416 if (err) {
1417 pr_err("%s alg registration failed\n", alg->cra_name);
1293 list_del(&p->entry); 1418 list_del(&p->entry);
1294 kfree(p); 1419 kfree(p);
1420 } else {
1421 pr_info("%s alg registered\n", alg->cra_name);
1422 }
1423 return err;
1424}
1425
1426static int __devinit __n2_register_one_hmac(struct n2_ahash_alg *n2ahash)
1427{
1428 struct n2_hmac_alg *p = kzalloc(sizeof(*p), GFP_KERNEL);
1429 struct ahash_alg *ahash;
1430 struct crypto_alg *base;
1431 int err;
1432
1433 if (!p)
1434 return -ENOMEM;
1435
1436 p->child_alg = n2ahash->alg.halg.base.cra_name;
1437 memcpy(&p->derived, n2ahash, sizeof(struct n2_ahash_alg));
1438 INIT_LIST_HEAD(&p->derived.entry);
1439
1440 ahash = &p->derived.alg;
1441 ahash->digest = n2_hmac_async_digest;
1442 ahash->setkey = n2_hmac_async_setkey;
1443
1444 base = &ahash->halg.base;
1445 snprintf(base->cra_name, CRYPTO_MAX_ALG_NAME, "hmac(%s)", p->child_alg);
1446 snprintf(base->cra_driver_name, CRYPTO_MAX_ALG_NAME, "hmac-%s-n2", p->child_alg);
1447
1448 base->cra_ctxsize = sizeof(struct n2_hmac_ctx);
1449 base->cra_init = n2_hmac_cra_init;
1450 base->cra_exit = n2_hmac_cra_exit;
1451
1452 list_add(&p->derived.entry, &hmac_algs);
1453 err = crypto_register_ahash(ahash);
1454 if (err) {
1455 pr_err("%s alg registration failed\n", base->cra_name);
1456 list_del(&p->derived.entry);
1457 kfree(p);
1458 } else {
1459 pr_info("%s alg registered\n", base->cra_name);
1295 } 1460 }
1296 return err; 1461 return err;
1297} 1462}
@@ -1307,12 +1472,19 @@ static int __devinit __n2_register_one_ahash(const struct n2_hash_tmpl *tmpl)
1307 if (!p) 1472 if (!p)
1308 return -ENOMEM; 1473 return -ENOMEM;
1309 1474
1475 p->hash_zero = tmpl->hash_zero;
1476 p->hash_init = tmpl->hash_init;
1477 p->auth_type = tmpl->auth_type;
1478 p->hmac_type = tmpl->hmac_type;
1479 p->hw_op_hashsz = tmpl->hw_op_hashsz;
1480 p->digest_size = tmpl->digest_size;
1481
1310 ahash = &p->alg; 1482 ahash = &p->alg;
1311 ahash->init = n2_hash_async_init; 1483 ahash->init = n2_hash_async_init;
1312 ahash->update = n2_hash_async_update; 1484 ahash->update = n2_hash_async_update;
1313 ahash->final = n2_hash_async_final; 1485 ahash->final = n2_hash_async_final;
1314 ahash->finup = n2_hash_async_finup; 1486 ahash->finup = n2_hash_async_finup;
1315 ahash->digest = tmpl->digest; 1487 ahash->digest = n2_hash_async_digest;
1316 1488
1317 halg = &ahash->halg; 1489 halg = &ahash->halg;
1318 halg->digestsize = tmpl->digest_size; 1490 halg->digestsize = tmpl->digest_size;
@@ -1331,9 +1503,14 @@ static int __devinit __n2_register_one_ahash(const struct n2_hash_tmpl *tmpl)
1331 list_add(&p->entry, &ahash_algs); 1503 list_add(&p->entry, &ahash_algs);
1332 err = crypto_register_ahash(ahash); 1504 err = crypto_register_ahash(ahash);
1333 if (err) { 1505 if (err) {
1506 pr_err("%s alg registration failed\n", base->cra_name);
1334 list_del(&p->entry); 1507 list_del(&p->entry);
1335 kfree(p); 1508 kfree(p);
1509 } else {
1510 pr_info("%s alg registered\n", base->cra_name);
1336 } 1511 }
1512 if (!err && p->hmac_type != AUTH_TYPE_RESERVED)
1513 err = __n2_register_one_hmac(p);
1337 return err; 1514 return err;
1338} 1515}
1339 1516
@@ -2070,20 +2247,20 @@ static struct of_platform_driver n2_mau_driver = {
2070 2247
2071static int __init n2_init(void) 2248static int __init n2_init(void)
2072{ 2249{
2073 int err = of_register_driver(&n2_crypto_driver, &of_bus_type); 2250 int err = of_register_platform_driver(&n2_crypto_driver);
2074 2251
2075 if (!err) { 2252 if (!err) {
2076 err = of_register_driver(&n2_mau_driver, &of_bus_type); 2253 err = of_register_platform_driver(&n2_mau_driver);
2077 if (err) 2254 if (err)
2078 of_unregister_driver(&n2_crypto_driver); 2255 of_unregister_platform_driver(&n2_crypto_driver);
2079 } 2256 }
2080 return err; 2257 return err;
2081} 2258}
2082 2259
2083static void __exit n2_exit(void) 2260static void __exit n2_exit(void)
2084{ 2261{
2085 of_unregister_driver(&n2_mau_driver); 2262 of_unregister_platform_driver(&n2_mau_driver);
2086 of_unregister_driver(&n2_crypto_driver); 2263 of_unregister_platform_driver(&n2_crypto_driver);
2087} 2264}
2088 2265
2089module_init(n2_init); 2266module_init(n2_init);
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index 8b034337793f..7d1485676886 100644
--- a/drivers/crypto/omap-sham.c
+++ b/drivers/crypto/omap-sham.c
@@ -15,7 +15,6 @@
15 15
16#define pr_fmt(fmt) "%s: " fmt, __func__ 16#define pr_fmt(fmt) "%s: " fmt, __func__
17 17
18#include <linux/version.h>
19#include <linux/err.h> 18#include <linux/err.h>
20#include <linux/device.h> 19#include <linux/device.h>
21#include <linux/module.h> 20#include <linux/module.h>
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
index 637c105f53d2..97f4af1d8a64 100644
--- a/drivers/crypto/talitos.c
+++ b/drivers/crypto/talitos.c
@@ -720,7 +720,6 @@ struct talitos_ctx {
720#define TALITOS_MDEU_MAX_CONTEXT_SIZE TALITOS_MDEU_CONTEXT_SIZE_SHA384_SHA512 720#define TALITOS_MDEU_MAX_CONTEXT_SIZE TALITOS_MDEU_CONTEXT_SIZE_SHA384_SHA512
721 721
722struct talitos_ahash_req_ctx { 722struct talitos_ahash_req_ctx {
723 u64 count;
724 u32 hw_context[TALITOS_MDEU_MAX_CONTEXT_SIZE / sizeof(u32)]; 723 u32 hw_context[TALITOS_MDEU_MAX_CONTEXT_SIZE / sizeof(u32)];
725 unsigned int hw_context_size; 724 unsigned int hw_context_size;
726 u8 buf[HASH_MAX_BLOCK_SIZE]; 725 u8 buf[HASH_MAX_BLOCK_SIZE];
@@ -729,6 +728,7 @@ struct talitos_ahash_req_ctx {
729 unsigned int first; 728 unsigned int first;
730 unsigned int last; 729 unsigned int last;
731 unsigned int to_hash_later; 730 unsigned int to_hash_later;
731 u64 nbuf;
732 struct scatterlist bufsl[2]; 732 struct scatterlist bufsl[2];
733 struct scatterlist *psrc; 733 struct scatterlist *psrc;
734}; 734};
@@ -1183,10 +1183,14 @@ static size_t sg_copy_end_to_buffer(struct scatterlist *sgl, unsigned int nents,
1183 /* Copy part of this segment */ 1183 /* Copy part of this segment */
1184 ignore = skip - offset; 1184 ignore = skip - offset;
1185 len = miter.length - ignore; 1185 len = miter.length - ignore;
1186 if (boffset + len > buflen)
1187 len = buflen - boffset;
1186 memcpy(buf + boffset, miter.addr + ignore, len); 1188 memcpy(buf + boffset, miter.addr + ignore, len);
1187 } else { 1189 } else {
1188 /* Copy all of this segment */ 1190 /* Copy all of this segment (up to buflen) */
1189 len = miter.length; 1191 len = miter.length;
1192 if (boffset + len > buflen)
1193 len = buflen - boffset;
1190 memcpy(buf + boffset, miter.addr, len); 1194 memcpy(buf + boffset, miter.addr, len);
1191 } 1195 }
1192 boffset += len; 1196 boffset += len;
@@ -1609,6 +1613,7 @@ static void ahash_done(struct device *dev,
1609 if (!req_ctx->last && req_ctx->to_hash_later) { 1613 if (!req_ctx->last && req_ctx->to_hash_later) {
1610 /* Position any partial block for next update/final/finup */ 1614 /* Position any partial block for next update/final/finup */
1611 memcpy(req_ctx->buf, req_ctx->bufnext, req_ctx->to_hash_later); 1615 memcpy(req_ctx->buf, req_ctx->bufnext, req_ctx->to_hash_later);
1616 req_ctx->nbuf = req_ctx->to_hash_later;
1612 } 1617 }
1613 common_nonsnoop_hash_unmap(dev, edesc, areq); 1618 common_nonsnoop_hash_unmap(dev, edesc, areq);
1614 1619
@@ -1724,7 +1729,7 @@ static int ahash_init(struct ahash_request *areq)
1724 struct talitos_ahash_req_ctx *req_ctx = ahash_request_ctx(areq); 1729 struct talitos_ahash_req_ctx *req_ctx = ahash_request_ctx(areq);
1725 1730
1726 /* Initialize the context */ 1731 /* Initialize the context */
1727 req_ctx->count = 0; 1732 req_ctx->nbuf = 0;
1728 req_ctx->first = 1; /* first indicates h/w must init its context */ 1733 req_ctx->first = 1; /* first indicates h/w must init its context */
1729 req_ctx->swinit = 0; /* assume h/w init of context */ 1734 req_ctx->swinit = 0; /* assume h/w init of context */
1730 req_ctx->hw_context_size = 1735 req_ctx->hw_context_size =
@@ -1772,52 +1777,54 @@ static int ahash_process_req(struct ahash_request *areq, unsigned int nbytes)
1772 crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm)); 1777 crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
1773 unsigned int nbytes_to_hash; 1778 unsigned int nbytes_to_hash;
1774 unsigned int to_hash_later; 1779 unsigned int to_hash_later;
1775 unsigned int index; 1780 unsigned int nsg;
1776 int chained; 1781 int chained;
1777 1782
1778 index = req_ctx->count & (blocksize - 1); 1783 if (!req_ctx->last && (nbytes + req_ctx->nbuf <= blocksize)) {
1779 req_ctx->count += nbytes; 1784 /* Buffer up to one whole block */
1780
1781 if (!req_ctx->last && (index + nbytes) < blocksize) {
1782 /* Buffer the partial block */
1783 sg_copy_to_buffer(areq->src, 1785 sg_copy_to_buffer(areq->src,
1784 sg_count(areq->src, nbytes, &chained), 1786 sg_count(areq->src, nbytes, &chained),
1785 req_ctx->buf + index, nbytes); 1787 req_ctx->buf + req_ctx->nbuf, nbytes);
1788 req_ctx->nbuf += nbytes;
1786 return 0; 1789 return 0;
1787 } 1790 }
1788 1791
1789 if (index) { 1792 /* At least (blocksize + 1) bytes are available to hash */
1790 /* partial block from previous update; chain it in. */ 1793 nbytes_to_hash = nbytes + req_ctx->nbuf;
1791 sg_init_table(req_ctx->bufsl, (nbytes) ? 2 : 1); 1794 to_hash_later = nbytes_to_hash & (blocksize - 1);
1792 sg_set_buf(req_ctx->bufsl, req_ctx->buf, index); 1795
1793 if (nbytes) 1796 if (req_ctx->last)
1794 scatterwalk_sg_chain(req_ctx->bufsl, 2, 1797 to_hash_later = 0;
1795 areq->src); 1798 else if (to_hash_later)
1799 /* There is a partial block. Hash the full block(s) now */
1800 nbytes_to_hash -= to_hash_later;
1801 else {
1802 /* Keep one block buffered */
1803 nbytes_to_hash -= blocksize;
1804 to_hash_later = blocksize;
1805 }
1806
1807 /* Chain in any previously buffered data */
1808 if (req_ctx->nbuf) {
1809 nsg = (req_ctx->nbuf < nbytes_to_hash) ? 2 : 1;
1810 sg_init_table(req_ctx->bufsl, nsg);
1811 sg_set_buf(req_ctx->bufsl, req_ctx->buf, req_ctx->nbuf);
1812 if (nsg > 1)
1813 scatterwalk_sg_chain(req_ctx->bufsl, 2, areq->src);
1796 req_ctx->psrc = req_ctx->bufsl; 1814 req_ctx->psrc = req_ctx->bufsl;
1797 } else { 1815 } else
1798 req_ctx->psrc = areq->src; 1816 req_ctx->psrc = areq->src;
1817
1818 if (to_hash_later) {
1819 int nents = sg_count(areq->src, nbytes, &chained);
1820 sg_copy_end_to_buffer(areq->src, nents,
1821 req_ctx->bufnext,
1822 to_hash_later,
1823 nbytes - to_hash_later);
1799 } 1824 }
1800 nbytes_to_hash = index + nbytes; 1825 req_ctx->to_hash_later = to_hash_later;
1801 if (!req_ctx->last) {
1802 to_hash_later = (nbytes_to_hash & (blocksize - 1));
1803 if (to_hash_later) {
1804 int nents;
1805 /* Must copy to_hash_later bytes from the end
1806 * to bufnext (a partial block) for later.
1807 */
1808 nents = sg_count(areq->src, nbytes, &chained);
1809 sg_copy_end_to_buffer(areq->src, nents,
1810 req_ctx->bufnext,
1811 to_hash_later,
1812 nbytes - to_hash_later);
1813
1814 /* Adjust count for what will be hashed now */
1815 nbytes_to_hash -= to_hash_later;
1816 }
1817 req_ctx->to_hash_later = to_hash_later;
1818 }
1819 1826
1820 /* allocate extended descriptor */ 1827 /* Allocate extended descriptor */
1821 edesc = ahash_edesc_alloc(areq, nbytes_to_hash); 1828 edesc = ahash_edesc_alloc(areq, nbytes_to_hash);
1822 if (IS_ERR(edesc)) 1829 if (IS_ERR(edesc))
1823 return PTR_ERR(edesc); 1830 return PTR_ERR(edesc);
diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
index bd5250e8c00c..e88076022a7a 100644
--- a/drivers/dma/at_hdmac.c
+++ b/drivers/dma/at_hdmac.c
@@ -69,7 +69,7 @@ static struct at_desc *atc_first_queued(struct at_dma_chan *atchan)
69} 69}
70 70
71/** 71/**
72 * atc_alloc_descriptor - allocate and return an initilized descriptor 72 * atc_alloc_descriptor - allocate and return an initialized descriptor
73 * @chan: the channel to allocate descriptors for 73 * @chan: the channel to allocate descriptors for
74 * @gfp_flags: GFP allocation flags 74 * @gfp_flags: GFP allocation flags
75 * 75 *
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 8088b14ba5f7..f0fd6db6063c 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -10,7 +10,7 @@
10 * Description: 10 * Description:
11 * DMA engine driver for Freescale MPC8540 DMA controller, which is 11 * DMA engine driver for Freescale MPC8540 DMA controller, which is
12 * also fit for MPC8560, MPC8555, MPC8548, MPC8641, and etc. 12 * also fit for MPC8560, MPC8555, MPC8548, MPC8641, and etc.
13 * The support for MPC8349 DMA contorller is also added. 13 * The support for MPC8349 DMA controller is also added.
14 * 14 *
15 * This driver instructs the DMA controller to issue the PCI Read Multiple 15 * This driver instructs the DMA controller to issue the PCI Read Multiple
16 * command for PCI read operations, instead of using the default PCI Read Line 16 * command for PCI read operations, instead of using the default PCI Read Line
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index aedef7941b22..70bb350de996 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -39,14 +39,6 @@ config EDAC_DEBUG
39 there're four debug levels (x=0,1,2,3 from low to high). 39 there're four debug levels (x=0,1,2,3 from low to high).
40 Usually you should select 'N'. 40 Usually you should select 'N'.
41 41
42config EDAC_DEBUG_VERBOSE
43 bool "More verbose debugging"
44 depends on EDAC_DEBUG
45 help
46 This option makes debugging information more verbose.
47 Source file name and line number where debugging message
48 printed will be added to debugging message.
49
50 config EDAC_DECODE_MCE 42 config EDAC_DECODE_MCE
51 tristate "Decode MCEs in human-readable form (only on AMD for now)" 43 tristate "Decode MCEs in human-readable form (only on AMD for now)"
52 depends on CPU_SUP_AMD && X86_MCE 44 depends on CPU_SUP_AMD && X86_MCE
@@ -209,7 +201,7 @@ config EDAC_I5100
209 201
210config EDAC_MPC85XX 202config EDAC_MPC85XX
211 tristate "Freescale MPC83xx / MPC85xx" 203 tristate "Freescale MPC83xx / MPC85xx"
212 depends on EDAC_MM_EDAC && FSL_SOC && (PPC_83xx || MPC85xx) 204 depends on EDAC_MM_EDAC && FSL_SOC && (PPC_83xx || PPC_85xx)
213 help 205 help
214 Support for error detection and correction on the Freescale 206 Support for error detection and correction on the Freescale
215 MPC8349, MPC8560, MPC8540, MPC8548 207 MPC8349, MPC8560, MPC8540, MPC8548
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index ac9f7985096d..670239ab7511 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -160,7 +160,7 @@ static int amd64_search_set_scrub_rate(struct pci_dev *ctl, u32 new_bw,
160 return 0; 160 return 0;
161} 161}
162 162
163static int amd64_set_scrub_rate(struct mem_ctl_info *mci, u32 *bandwidth) 163static int amd64_set_scrub_rate(struct mem_ctl_info *mci, u32 bandwidth)
164{ 164{
165 struct amd64_pvt *pvt = mci->pvt_info; 165 struct amd64_pvt *pvt = mci->pvt_info;
166 u32 min_scrubrate = 0x0; 166 u32 min_scrubrate = 0x0;
@@ -178,10 +178,10 @@ static int amd64_set_scrub_rate(struct mem_ctl_info *mci, u32 *bandwidth)
178 178
179 default: 179 default:
180 amd64_printk(KERN_ERR, "Unsupported family!\n"); 180 amd64_printk(KERN_ERR, "Unsupported family!\n");
181 break; 181 return -EINVAL;
182 } 182 }
183 return amd64_search_set_scrub_rate(pvt->misc_f3_ctl, *bandwidth, 183 return amd64_search_set_scrub_rate(pvt->misc_f3_ctl, bandwidth,
184 min_scrubrate); 184 min_scrubrate);
185} 185}
186 186
187static int amd64_get_scrub_rate(struct mem_ctl_info *mci, u32 *bw) 187static int amd64_get_scrub_rate(struct mem_ctl_info *mci, u32 *bw)
@@ -796,6 +796,11 @@ static int sys_addr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr)
796 796
797static int get_channel_from_ecc_syndrome(struct mem_ctl_info *, u16); 797static int get_channel_from_ecc_syndrome(struct mem_ctl_info *, u16);
798 798
799static u16 extract_syndrome(struct err_regs *err)
800{
801 return ((err->nbsh >> 15) & 0xff) | ((err->nbsl >> 16) & 0xff00);
802}
803
799static void amd64_cpu_display_info(struct amd64_pvt *pvt) 804static void amd64_cpu_display_info(struct amd64_pvt *pvt)
800{ 805{
801 if (boot_cpu_data.x86 == 0x11) 806 if (boot_cpu_data.x86 == 0x11)
@@ -888,6 +893,9 @@ static void amd64_dump_misc_regs(struct amd64_pvt *pvt)
888 return; 893 return;
889 } 894 }
890 895
896 amd64_printk(KERN_INFO, "using %s syndromes.\n",
897 ((pvt->syn_type == 8) ? "x8" : "x4"));
898
891 /* Only if NOT ganged does dclr1 have valid info */ 899 /* Only if NOT ganged does dclr1 have valid info */
892 if (!dct_ganging_enabled(pvt)) 900 if (!dct_ganging_enabled(pvt))
893 amd64_dump_dramcfg_low(pvt->dclr1, 1); 901 amd64_dump_dramcfg_low(pvt->dclr1, 1);
@@ -1101,20 +1109,17 @@ static void k8_read_dram_base_limit(struct amd64_pvt *pvt, int dram)
1101} 1109}
1102 1110
1103static void k8_map_sysaddr_to_csrow(struct mem_ctl_info *mci, 1111static void k8_map_sysaddr_to_csrow(struct mem_ctl_info *mci,
1104 struct err_regs *info, 1112 struct err_regs *err_info, u64 sys_addr)
1105 u64 sys_addr)
1106{ 1113{
1107 struct mem_ctl_info *src_mci; 1114 struct mem_ctl_info *src_mci;
1108 unsigned short syndrome;
1109 int channel, csrow; 1115 int channel, csrow;
1110 u32 page, offset; 1116 u32 page, offset;
1117 u16 syndrome;
1111 1118
1112 /* Extract the syndrome parts and form a 16-bit syndrome */ 1119 syndrome = extract_syndrome(err_info);
1113 syndrome = HIGH_SYNDROME(info->nbsl) << 8;
1114 syndrome |= LOW_SYNDROME(info->nbsh);
1115 1120
1116 /* CHIPKILL enabled */ 1121 /* CHIPKILL enabled */
1117 if (info->nbcfg & K8_NBCFG_CHIPKILL) { 1122 if (err_info->nbcfg & K8_NBCFG_CHIPKILL) {
1118 channel = get_channel_from_ecc_syndrome(mci, syndrome); 1123 channel = get_channel_from_ecc_syndrome(mci, syndrome);
1119 if (channel < 0) { 1124 if (channel < 0) {
1120 /* 1125 /*
@@ -1123,8 +1128,8 @@ static void k8_map_sysaddr_to_csrow(struct mem_ctl_info *mci,
1123 * as suspect. 1128 * as suspect.
1124 */ 1129 */
1125 amd64_mc_printk(mci, KERN_WARNING, 1130 amd64_mc_printk(mci, KERN_WARNING,
1126 "unknown syndrome 0x%x - possible error " 1131 "unknown syndrome 0x%04x - possible "
1127 "reporting race\n", syndrome); 1132 "error reporting race\n", syndrome);
1128 edac_mc_handle_ce_no_info(mci, EDAC_MOD_STR); 1133 edac_mc_handle_ce_no_info(mci, EDAC_MOD_STR);
1129 return; 1134 return;
1130 } 1135 }
@@ -1430,7 +1435,7 @@ static inline u64 f10_get_base_addr_offset(u64 sys_addr, int hi_range_sel,
1430 u64 chan_off; 1435 u64 chan_off;
1431 1436
1432 if (hi_range_sel) { 1437 if (hi_range_sel) {
1433 if (!(dct_sel_base_addr & 0xFFFFF800) && 1438 if (!(dct_sel_base_addr & 0xFFFF0000) &&
1434 hole_valid && (sys_addr >= 0x100000000ULL)) 1439 hole_valid && (sys_addr >= 0x100000000ULL))
1435 chan_off = hole_off << 16; 1440 chan_off = hole_off << 16;
1436 else 1441 else
@@ -1654,13 +1659,13 @@ static int f10_translate_sysaddr_to_cs(struct amd64_pvt *pvt, u64 sys_addr,
1654 * (MCX_ADDR). 1659 * (MCX_ADDR).
1655 */ 1660 */
1656static void f10_map_sysaddr_to_csrow(struct mem_ctl_info *mci, 1661static void f10_map_sysaddr_to_csrow(struct mem_ctl_info *mci,
1657 struct err_regs *info, 1662 struct err_regs *err_info,
1658 u64 sys_addr) 1663 u64 sys_addr)
1659{ 1664{
1660 struct amd64_pvt *pvt = mci->pvt_info; 1665 struct amd64_pvt *pvt = mci->pvt_info;
1661 u32 page, offset; 1666 u32 page, offset;
1662 unsigned short syndrome;
1663 int nid, csrow, chan = 0; 1667 int nid, csrow, chan = 0;
1668 u16 syndrome;
1664 1669
1665 csrow = f10_translate_sysaddr_to_cs(pvt, sys_addr, &nid, &chan); 1670 csrow = f10_translate_sysaddr_to_cs(pvt, sys_addr, &nid, &chan);
1666 1671
@@ -1671,15 +1676,14 @@ static void f10_map_sysaddr_to_csrow(struct mem_ctl_info *mci,
1671 1676
1672 error_address_to_page_and_offset(sys_addr, &page, &offset); 1677 error_address_to_page_and_offset(sys_addr, &page, &offset);
1673 1678
1674 syndrome = HIGH_SYNDROME(info->nbsl) << 8; 1679 syndrome = extract_syndrome(err_info);
1675 syndrome |= LOW_SYNDROME(info->nbsh);
1676 1680
1677 /* 1681 /*
1678 * We need the syndromes for channel detection only when we're 1682 * We need the syndromes for channel detection only when we're
1679 * ganged. Otherwise @chan should already contain the channel at 1683 * ganged. Otherwise @chan should already contain the channel at
1680 * this point. 1684 * this point.
1681 */ 1685 */
1682 if (dct_ganging_enabled(pvt) && pvt->nbcfg & K8_NBCFG_CHIPKILL) 1686 if (dct_ganging_enabled(pvt) && (pvt->nbcfg & K8_NBCFG_CHIPKILL))
1683 chan = get_channel_from_ecc_syndrome(mci, syndrome); 1687 chan = get_channel_from_ecc_syndrome(mci, syndrome);
1684 1688
1685 if (chan >= 0) 1689 if (chan >= 0)
@@ -1878,7 +1882,7 @@ static u16 x8_vectors[] = {
1878}; 1882};
1879 1883
1880static int decode_syndrome(u16 syndrome, u16 *vectors, int num_vecs, 1884static int decode_syndrome(u16 syndrome, u16 *vectors, int num_vecs,
1881 int v_dim) 1885 int v_dim)
1882{ 1886{
1883 unsigned int i, err_sym; 1887 unsigned int i, err_sym;
1884 1888
@@ -1955,124 +1959,23 @@ static int map_err_sym_to_channel(int err_sym, int sym_size)
1955static int get_channel_from_ecc_syndrome(struct mem_ctl_info *mci, u16 syndrome) 1959static int get_channel_from_ecc_syndrome(struct mem_ctl_info *mci, u16 syndrome)
1956{ 1960{
1957 struct amd64_pvt *pvt = mci->pvt_info; 1961 struct amd64_pvt *pvt = mci->pvt_info;
1958 u32 value = 0; 1962 int err_sym = -1;
1959 int err_sym = 0; 1963
1960 1964 if (pvt->syn_type == 8)
1961 if (boot_cpu_data.x86 == 0x10) { 1965 err_sym = decode_syndrome(syndrome, x8_vectors,
1962 1966 ARRAY_SIZE(x8_vectors),
1963 amd64_read_pci_cfg(pvt->misc_f3_ctl, 0x180, &value); 1967 pvt->syn_type);
1964 1968 else if (pvt->syn_type == 4)
1965 /* F3x180[EccSymbolSize]=1 => x8 symbols */ 1969 err_sym = decode_syndrome(syndrome, x4_vectors,
1966 if (boot_cpu_data.x86_model > 7 && 1970 ARRAY_SIZE(x4_vectors),
1967 value & BIT(25)) { 1971 pvt->syn_type);
1968 err_sym = decode_syndrome(syndrome, x8_vectors, 1972 else {
1969 ARRAY_SIZE(x8_vectors), 8); 1973 amd64_printk(KERN_WARNING, "%s: Illegal syndrome type: %u\n",
1970 return map_err_sym_to_channel(err_sym, 8); 1974 __func__, pvt->syn_type);
1971 } 1975 return err_sym;
1972 } 1976 }
1973 err_sym = decode_syndrome(syndrome, x4_vectors, ARRAY_SIZE(x4_vectors), 4);
1974 return map_err_sym_to_channel(err_sym, 4);
1975}
1976
1977/*
1978 * Check for valid error in the NB Status High register. If so, proceed to read
1979 * NB Status Low, NB Address Low and NB Address High registers and store data
1980 * into error structure.
1981 *
1982 * Returns:
1983 * - 1: if hardware regs contains valid error info
1984 * - 0: if no valid error is indicated
1985 */
1986static int amd64_get_error_info_regs(struct mem_ctl_info *mci,
1987 struct err_regs *regs)
1988{
1989 struct amd64_pvt *pvt;
1990 struct pci_dev *misc_f3_ctl;
1991
1992 pvt = mci->pvt_info;
1993 misc_f3_ctl = pvt->misc_f3_ctl;
1994
1995 if (amd64_read_pci_cfg(misc_f3_ctl, K8_NBSH, &regs->nbsh))
1996 return 0;
1997
1998 if (!(regs->nbsh & K8_NBSH_VALID_BIT))
1999 return 0;
2000
2001 /* valid error, read remaining error information registers */
2002 if (amd64_read_pci_cfg(misc_f3_ctl, K8_NBSL, &regs->nbsl) ||
2003 amd64_read_pci_cfg(misc_f3_ctl, K8_NBEAL, &regs->nbeal) ||
2004 amd64_read_pci_cfg(misc_f3_ctl, K8_NBEAH, &regs->nbeah) ||
2005 amd64_read_pci_cfg(misc_f3_ctl, K8_NBCFG, &regs->nbcfg))
2006 return 0;
2007
2008 return 1;
2009}
2010
2011/*
2012 * This function is called to retrieve the error data from hardware and store it
2013 * in the info structure.
2014 *
2015 * Returns:
2016 * - 1: if a valid error is found
2017 * - 0: if no error is found
2018 */
2019static int amd64_get_error_info(struct mem_ctl_info *mci,
2020 struct err_regs *info)
2021{
2022 struct amd64_pvt *pvt;
2023 struct err_regs regs;
2024
2025 pvt = mci->pvt_info;
2026
2027 if (!amd64_get_error_info_regs(mci, info))
2028 return 0;
2029
2030 /*
2031 * Here's the problem with the K8's EDAC reporting: There are four
2032 * registers which report pieces of error information. They are shared
2033 * between CEs and UEs. Furthermore, contrary to what is stated in the
2034 * BKDG, the overflow bit is never used! Every error always updates the
2035 * reporting registers.
2036 *
2037 * Can you see the race condition? All four error reporting registers
2038 * must be read before a new error updates them! There is no way to read
2039 * all four registers atomically. The best than can be done is to detect
2040 * that a race has occured and then report the error without any kind of
2041 * precision.
2042 *
2043 * What is still positive is that errors are still reported and thus
2044 * problems can still be detected - just not localized because the
2045 * syndrome and address are spread out across registers.
2046 *
2047 * Grrrrr!!!!! Here's hoping that AMD fixes this in some future K8 rev.
2048 * UEs and CEs should have separate register sets with proper overflow
2049 * bits that are used! At very least the problem can be fixed by
2050 * honoring the ErrValid bit in 'nbsh' and not updating registers - just
2051 * set the overflow bit - unless the current error is CE and the new
2052 * error is UE which would be the only situation for overwriting the
2053 * current values.
2054 */
2055
2056 regs = *info;
2057
2058 /* Use info from the second read - most current */
2059 if (unlikely(!amd64_get_error_info_regs(mci, info)))
2060 return 0;
2061 1977
2062 /* clear the error bits in hardware */ 1978 return map_err_sym_to_channel(err_sym, pvt->syn_type);
2063 pci_write_bits32(pvt->misc_f3_ctl, K8_NBSH, 0, K8_NBSH_VALID_BIT);
2064
2065 /* Check for the possible race condition */
2066 if ((regs.nbsh != info->nbsh) ||
2067 (regs.nbsl != info->nbsl) ||
2068 (regs.nbeah != info->nbeah) ||
2069 (regs.nbeal != info->nbeal)) {
2070 amd64_mc_printk(mci, KERN_WARNING,
2071 "hardware STATUS read access race condition "
2072 "detected!\n");
2073 return 0;
2074 }
2075 return 1;
2076} 1979}
2077 1980
2078/* 1981/*
@@ -2177,7 +2080,7 @@ static inline void __amd64_decode_bus_error(struct mem_ctl_info *mci,
2177 * catastrophic. 2080 * catastrophic.
2178 */ 2081 */
2179 if (info->nbsh & K8_NBSH_OVERFLOW) 2082 if (info->nbsh & K8_NBSH_OVERFLOW)
2180 edac_mc_handle_ce_no_info(mci, EDAC_MOD_STR "Error Overflow"); 2083 edac_mc_handle_ce_no_info(mci, EDAC_MOD_STR " Error Overflow");
2181} 2084}
2182 2085
2183void amd64_decode_bus_error(int node_id, struct err_regs *regs) 2086void amd64_decode_bus_error(int node_id, struct err_regs *regs)
@@ -2199,20 +2102,6 @@ void amd64_decode_bus_error(int node_id, struct err_regs *regs)
2199} 2102}
2200 2103
2201/* 2104/*
2202 * The main polling 'check' function, called FROM the edac core to perform the
2203 * error checking and if an error is encountered, error processing.
2204 */
2205static void amd64_check(struct mem_ctl_info *mci)
2206{
2207 struct err_regs regs;
2208
2209 if (amd64_get_error_info(mci, &regs)) {
2210 struct amd64_pvt *pvt = mci->pvt_info;
2211 amd_decode_nb_mce(pvt->mc_node_id, &regs, 1);
2212 }
2213}
2214
2215/*
2216 * Input: 2105 * Input:
2217 * 1) struct amd64_pvt which contains pvt->dram_f2_ctl pointer 2106 * 1) struct amd64_pvt which contains pvt->dram_f2_ctl pointer
2218 * 2) AMD Family index value 2107 * 2) AMD Family index value
@@ -2284,6 +2173,7 @@ static void amd64_free_mc_sibling_devices(struct amd64_pvt *pvt)
2284static void amd64_read_mc_registers(struct amd64_pvt *pvt) 2173static void amd64_read_mc_registers(struct amd64_pvt *pvt)
2285{ 2174{
2286 u64 msr_val; 2175 u64 msr_val;
2176 u32 tmp;
2287 int dram; 2177 int dram;
2288 2178
2289 /* 2179 /*
@@ -2349,10 +2239,22 @@ static void amd64_read_mc_registers(struct amd64_pvt *pvt)
2349 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_0, &pvt->dclr0); 2239 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_0, &pvt->dclr0);
2350 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_0, &pvt->dchr0); 2240 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_0, &pvt->dchr0);
2351 2241
2352 if (!dct_ganging_enabled(pvt) && boot_cpu_data.x86 >= 0x10) { 2242 if (boot_cpu_data.x86 >= 0x10) {
2353 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_1, &pvt->dclr1); 2243 if (!dct_ganging_enabled(pvt)) {
2354 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_1, &pvt->dchr1); 2244 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_1, &pvt->dclr1);
2245 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_1, &pvt->dchr1);
2246 }
2247 amd64_read_pci_cfg(pvt->misc_f3_ctl, EXT_NB_MCA_CFG, &tmp);
2355 } 2248 }
2249
2250 if (boot_cpu_data.x86 == 0x10 &&
2251 boot_cpu_data.x86_model > 7 &&
2252 /* F3x180[EccSymbolSize]=1 => x8 symbols */
2253 tmp & BIT(25))
2254 pvt->syn_type = 8;
2255 else
2256 pvt->syn_type = 4;
2257
2356 amd64_dump_misc_regs(pvt); 2258 amd64_dump_misc_regs(pvt);
2357} 2259}
2358 2260
@@ -2739,9 +2641,6 @@ static void amd64_setup_mci_misc_attributes(struct mem_ctl_info *mci)
2739 mci->dev_name = pci_name(pvt->dram_f2_ctl); 2641 mci->dev_name = pci_name(pvt->dram_f2_ctl);
2740 mci->ctl_page_to_phys = NULL; 2642 mci->ctl_page_to_phys = NULL;
2741 2643
2742 /* IMPORTANT: Set the polling 'check' function in this module */
2743 mci->edac_check = amd64_check;
2744
2745 /* memory scrubber interface */ 2644 /* memory scrubber interface */
2746 mci->set_sdram_scrub_rate = amd64_set_scrub_rate; 2645 mci->set_sdram_scrub_rate = amd64_set_scrub_rate;
2747 mci->get_sdram_scrub_rate = amd64_get_scrub_rate; 2646 mci->get_sdram_scrub_rate = amd64_get_scrub_rate;
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index 0d4bf5638243..613b9381e71a 100644
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -244,44 +244,17 @@
244 244
245 245
246#define F10_DCTL_SEL_LOW 0x110 246#define F10_DCTL_SEL_LOW 0x110
247 247#define dct_sel_baseaddr(pvt) ((pvt->dram_ctl_select_low) & 0xFFFFF800)
248#define dct_sel_baseaddr(pvt) \ 248#define dct_sel_interleave_addr(pvt) (((pvt->dram_ctl_select_low) >> 6) & 0x3)
249 ((pvt->dram_ctl_select_low) & 0xFFFFF800) 249#define dct_high_range_enabled(pvt) (pvt->dram_ctl_select_low & BIT(0))
250 250#define dct_interleave_enabled(pvt) (pvt->dram_ctl_select_low & BIT(2))
251#define dct_sel_interleave_addr(pvt) \ 251#define dct_ganging_enabled(pvt) (pvt->dram_ctl_select_low & BIT(4))
252 (((pvt->dram_ctl_select_low) >> 6) & 0x3) 252#define dct_data_intlv_enabled(pvt) (pvt->dram_ctl_select_low & BIT(5))
253 253#define dct_dram_enabled(pvt) (pvt->dram_ctl_select_low & BIT(8))
254enum { 254#define dct_memory_cleared(pvt) (pvt->dram_ctl_select_low & BIT(10))
255 F10_DCTL_SEL_LOW_DctSelHiRngEn = BIT(0),
256 F10_DCTL_SEL_LOW_DctSelIntLvEn = BIT(2),
257 F10_DCTL_SEL_LOW_DctGangEn = BIT(4),
258 F10_DCTL_SEL_LOW_DctDatIntLv = BIT(5),
259 F10_DCTL_SEL_LOW_DramEnable = BIT(8),
260 F10_DCTL_SEL_LOW_MemCleared = BIT(10),
261};
262
263#define dct_high_range_enabled(pvt) \
264 (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DctSelHiRngEn)
265
266#define dct_interleave_enabled(pvt) \
267 (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DctSelIntLvEn)
268
269#define dct_ganging_enabled(pvt) \
270 (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DctGangEn)
271
272#define dct_data_intlv_enabled(pvt) \
273 (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DctDatIntLv)
274
275#define dct_dram_enabled(pvt) \
276 (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DramEnable)
277
278#define dct_memory_cleared(pvt) \
279 (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_MemCleared)
280
281 255
282#define F10_DCTL_SEL_HIGH 0x114 256#define F10_DCTL_SEL_HIGH 0x114
283 257
284
285/* 258/*
286 * Function 3 - Misc Control 259 * Function 3 - Misc Control
287 */ 260 */
@@ -382,6 +355,8 @@ enum {
382#define K8_NBCAP_SECDED BIT(3) 355#define K8_NBCAP_SECDED BIT(3)
383#define K8_NBCAP_DCT_DUAL BIT(0) 356#define K8_NBCAP_DCT_DUAL BIT(0)
384 357
358#define EXT_NB_MCA_CFG 0x180
359
385/* MSRs */ 360/* MSRs */
386#define K8_MSR_MCGCTL_NBE BIT(4) 361#define K8_MSR_MCGCTL_NBE BIT(4)
387 362
@@ -471,6 +446,9 @@ struct amd64_pvt {
471 u32 dram_ctl_select_high; /* DRAM Controller Select High Reg */ 446 u32 dram_ctl_select_high; /* DRAM Controller Select High Reg */
472 u32 online_spare; /* On-Line spare Reg */ 447 u32 online_spare; /* On-Line spare Reg */
473 448
449 /* x4 or x8 syndromes in use */
450 u8 syn_type;
451
474 /* temp storage for when input is received from sysfs */ 452 /* temp storage for when input is received from sysfs */
475 struct err_regs ctl_error_info; 453 struct err_regs ctl_error_info;
476 454
diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c
index ae3f80c54198..073f5a06d238 100644
--- a/drivers/edac/e752x_edac.c
+++ b/drivers/edac/e752x_edac.c
@@ -958,7 +958,7 @@ static void e752x_check(struct mem_ctl_info *mci)
958} 958}
959 959
960/* Program byte/sec bandwidth scrub rate to hardware */ 960/* Program byte/sec bandwidth scrub rate to hardware */
961static int set_sdram_scrub_rate(struct mem_ctl_info *mci, u32 *new_bw) 961static int set_sdram_scrub_rate(struct mem_ctl_info *mci, u32 new_bw)
962{ 962{
963 const struct scrubrate *scrubrates; 963 const struct scrubrate *scrubrates;
964 struct e752x_pvt *pvt = (struct e752x_pvt *) mci->pvt_info; 964 struct e752x_pvt *pvt = (struct e752x_pvt *) mci->pvt_info;
@@ -975,7 +975,7 @@ static int set_sdram_scrub_rate(struct mem_ctl_info *mci, u32 *new_bw)
975 * desired rate and program the cooresponding register value. 975 * desired rate and program the cooresponding register value.
976 */ 976 */
977 for (i = 0; scrubrates[i].bandwidth != SDRATE_EOT; i++) 977 for (i = 0; scrubrates[i].bandwidth != SDRATE_EOT; i++)
978 if (scrubrates[i].bandwidth >= *new_bw) 978 if (scrubrates[i].bandwidth >= new_bw)
979 break; 979 break;
980 980
981 if (scrubrates[i].bandwidth == SDRATE_EOT) 981 if (scrubrates[i].bandwidth == SDRATE_EOT)
diff --git a/drivers/edac/edac_core.h b/drivers/edac/edac_core.h
index efca9343d26a..ce7146677e9b 100644
--- a/drivers/edac/edac_core.h
+++ b/drivers/edac/edac_core.h
@@ -49,21 +49,15 @@
49#define edac_printk(level, prefix, fmt, arg...) \ 49#define edac_printk(level, prefix, fmt, arg...) \
50 printk(level "EDAC " prefix ": " fmt, ##arg) 50 printk(level "EDAC " prefix ": " fmt, ##arg)
51 51
52#define edac_printk_verbose(level, prefix, fmt, arg...) \
53 printk(level "EDAC " prefix ": " "in %s, line at %d: " fmt, \
54 __FILE__, __LINE__, ##arg)
55
56#define edac_mc_printk(mci, level, fmt, arg...) \ 52#define edac_mc_printk(mci, level, fmt, arg...) \
57 printk(level "EDAC MC%d: " fmt, mci->mc_idx, ##arg) 53 printk(level "EDAC MC%d: " fmt, mci->mc_idx, ##arg)
58 54
59#define edac_mc_chipset_printk(mci, level, prefix, fmt, arg...) \ 55#define edac_mc_chipset_printk(mci, level, prefix, fmt, arg...) \
60 printk(level "EDAC " prefix " MC%d: " fmt, mci->mc_idx, ##arg) 56 printk(level "EDAC " prefix " MC%d: " fmt, mci->mc_idx, ##arg)
61 57
62/* edac_device printk */
63#define edac_device_printk(ctl, level, fmt, arg...) \ 58#define edac_device_printk(ctl, level, fmt, arg...) \
64 printk(level "EDAC DEVICE%d: " fmt, ctl->dev_idx, ##arg) 59 printk(level "EDAC DEVICE%d: " fmt, ctl->dev_idx, ##arg)
65 60
66/* edac_pci printk */
67#define edac_pci_printk(ctl, level, fmt, arg...) \ 61#define edac_pci_printk(ctl, level, fmt, arg...) \
68 printk(level "EDAC PCI%d: " fmt, ctl->pci_idx, ##arg) 62 printk(level "EDAC PCI%d: " fmt, ctl->pci_idx, ##arg)
69 63
@@ -76,21 +70,12 @@
76extern int edac_debug_level; 70extern int edac_debug_level;
77extern const char *edac_mem_types[]; 71extern const char *edac_mem_types[];
78 72
79#ifndef CONFIG_EDAC_DEBUG_VERBOSE
80#define edac_debug_printk(level, fmt, arg...) \ 73#define edac_debug_printk(level, fmt, arg...) \
81 do { \ 74 do { \
82 if (level <= edac_debug_level) \ 75 if (level <= edac_debug_level) \
83 edac_printk(KERN_DEBUG, EDAC_DEBUG, \ 76 edac_printk(KERN_DEBUG, EDAC_DEBUG, \
84 "%s: " fmt, __func__, ##arg); \ 77 "%s: " fmt, __func__, ##arg); \
85 } while (0) 78 } while (0)
86#else /* CONFIG_EDAC_DEBUG_VERBOSE */
87#define edac_debug_printk(level, fmt, arg...) \
88 do { \
89 if (level <= edac_debug_level) \
90 edac_printk_verbose(KERN_DEBUG, EDAC_DEBUG, fmt, \
91 ##arg); \
92 } while (0)
93#endif
94 79
95#define debugf0( ... ) edac_debug_printk(0, __VA_ARGS__ ) 80#define debugf0( ... ) edac_debug_printk(0, __VA_ARGS__ )
96#define debugf1( ... ) edac_debug_printk(1, __VA_ARGS__ ) 81#define debugf1( ... ) edac_debug_printk(1, __VA_ARGS__ )
@@ -393,7 +378,7 @@ struct mem_ctl_info {
393 internal representation and configures whatever else needs 378 internal representation and configures whatever else needs
394 to be configured. 379 to be configured.
395 */ 380 */
396 int (*set_sdram_scrub_rate) (struct mem_ctl_info * mci, u32 * bw); 381 int (*set_sdram_scrub_rate) (struct mem_ctl_info * mci, u32 bw);
397 382
398 /* Get the current sdram memory scrub rate from the internal 383 /* Get the current sdram memory scrub rate from the internal
399 representation and converts it to the closest matching 384 representation and converts it to the closest matching
diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c
index c200c2fd43ea..8aad94d10c0c 100644
--- a/drivers/edac/edac_mc_sysfs.c
+++ b/drivers/edac/edac_mc_sysfs.c
@@ -124,19 +124,6 @@ static const char *edac_caps[] = {
124 [EDAC_S16ECD16ED] = "S16ECD16ED" 124 [EDAC_S16ECD16ED] = "S16ECD16ED"
125}; 125};
126 126
127
128
129static ssize_t memctrl_int_store(void *ptr, const char *buffer, size_t count)
130{
131 int *value = (int *)ptr;
132
133 if (isdigit(*buffer))
134 *value = simple_strtoul(buffer, NULL, 0);
135
136 return count;
137}
138
139
140/* EDAC sysfs CSROW data structures and methods 127/* EDAC sysfs CSROW data structures and methods
141 */ 128 */
142 129
@@ -450,53 +437,54 @@ static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci,
450 437
451/* memory scrubbing */ 438/* memory scrubbing */
452static ssize_t mci_sdram_scrub_rate_store(struct mem_ctl_info *mci, 439static ssize_t mci_sdram_scrub_rate_store(struct mem_ctl_info *mci,
453 const char *data, size_t count) 440 const char *data, size_t count)
454{ 441{
455 u32 bandwidth = -1; 442 unsigned long bandwidth = 0;
443 int err;
456 444
457 if (mci->set_sdram_scrub_rate) { 445 if (!mci->set_sdram_scrub_rate) {
446 edac_printk(KERN_WARNING, EDAC_MC,
447 "Memory scrub rate setting not implemented!\n");
448 return -EINVAL;
449 }
458 450
459 memctrl_int_store(&bandwidth, data, count); 451 if (strict_strtoul(data, 10, &bandwidth) < 0)
452 return -EINVAL;
460 453
461 if (!(*mci->set_sdram_scrub_rate) (mci, &bandwidth)) { 454 err = mci->set_sdram_scrub_rate(mci, (u32)bandwidth);
462 edac_printk(KERN_DEBUG, EDAC_MC, 455 if (err) {
463 "Scrub rate set successfully, applied: %d\n", 456 edac_printk(KERN_DEBUG, EDAC_MC,
464 bandwidth); 457 "Failed setting scrub rate to %lu\n", bandwidth);
465 } else { 458 return -EINVAL;
466 /* FIXME: error codes maybe? */ 459 }
467 edac_printk(KERN_DEBUG, EDAC_MC, 460 else {
468 "Scrub rate set FAILED, could not apply: %d\n", 461 edac_printk(KERN_DEBUG, EDAC_MC,
469 bandwidth); 462 "Scrub rate set to: %lu\n", bandwidth);
470 } 463 return count;
471 } else {
472 /* FIXME: produce "not implemented" ERROR for user-side. */
473 edac_printk(KERN_WARNING, EDAC_MC,
474 "Memory scrubbing 'set'control is not implemented!\n");
475 } 464 }
476 return count;
477} 465}
478 466
479static ssize_t mci_sdram_scrub_rate_show(struct mem_ctl_info *mci, char *data) 467static ssize_t mci_sdram_scrub_rate_show(struct mem_ctl_info *mci, char *data)
480{ 468{
481 u32 bandwidth = -1; 469 u32 bandwidth = 0;
482 470 int err;
483 if (mci->get_sdram_scrub_rate) { 471
484 if (!(*mci->get_sdram_scrub_rate) (mci, &bandwidth)) { 472 if (!mci->get_sdram_scrub_rate) {
485 edac_printk(KERN_DEBUG, EDAC_MC,
486 "Scrub rate successfully, fetched: %d\n",
487 bandwidth);
488 } else {
489 /* FIXME: error codes maybe? */
490 edac_printk(KERN_DEBUG, EDAC_MC,
491 "Scrub rate fetch FAILED, got: %d\n",
492 bandwidth);
493 }
494 } else {
495 /* FIXME: produce "not implemented" ERROR for user-side. */
496 edac_printk(KERN_WARNING, EDAC_MC, 473 edac_printk(KERN_WARNING, EDAC_MC,
497 "Memory scrubbing 'get' control is not implemented\n"); 474 "Memory scrub rate reading not implemented\n");
475 return -EINVAL;
476 }
477
478 err = mci->get_sdram_scrub_rate(mci, &bandwidth);
479 if (err) {
480 edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n");
481 return err;
482 }
483 else {
484 edac_printk(KERN_DEBUG, EDAC_MC,
485 "Read scrub rate: %d\n", bandwidth);
486 return sprintf(data, "%d\n", bandwidth);
498 } 487 }
499 return sprintf(data, "%d\n", bandwidth);
500} 488}
501 489
502/* default attribute files for the MCI object */ 490/* default attribute files for the MCI object */
diff --git a/drivers/edac/edac_mce_amd.c b/drivers/edac/edac_mce_amd.c
index 97e64bcdbc06..bae9351e9473 100644
--- a/drivers/edac/edac_mce_amd.c
+++ b/drivers/edac/edac_mce_amd.c
@@ -133,7 +133,7 @@ static void amd_decode_dc_mce(u64 mc0_status)
133 u32 ec = mc0_status & 0xffff; 133 u32 ec = mc0_status & 0xffff;
134 u32 xec = (mc0_status >> 16) & 0xf; 134 u32 xec = (mc0_status >> 16) & 0xf;
135 135
136 pr_emerg(" Data Cache Error"); 136 pr_emerg("Data Cache Error");
137 137
138 if (xec == 1 && TLB_ERROR(ec)) 138 if (xec == 1 && TLB_ERROR(ec))
139 pr_cont(": %s TLB multimatch.\n", LL_MSG(ec)); 139 pr_cont(": %s TLB multimatch.\n", LL_MSG(ec));
@@ -176,7 +176,7 @@ static void amd_decode_ic_mce(u64 mc1_status)
176 u32 ec = mc1_status & 0xffff; 176 u32 ec = mc1_status & 0xffff;
177 u32 xec = (mc1_status >> 16) & 0xf; 177 u32 xec = (mc1_status >> 16) & 0xf;
178 178
179 pr_emerg(" Instruction Cache Error"); 179 pr_emerg("Instruction Cache Error");
180 180
181 if (xec == 1 && TLB_ERROR(ec)) 181 if (xec == 1 && TLB_ERROR(ec))
182 pr_cont(": %s TLB multimatch.\n", LL_MSG(ec)); 182 pr_cont(": %s TLB multimatch.\n", LL_MSG(ec));
@@ -233,7 +233,7 @@ static void amd_decode_bu_mce(u64 mc2_status)
233 u32 ec = mc2_status & 0xffff; 233 u32 ec = mc2_status & 0xffff;
234 u32 xec = (mc2_status >> 16) & 0xf; 234 u32 xec = (mc2_status >> 16) & 0xf;
235 235
236 pr_emerg(" Bus Unit Error"); 236 pr_emerg("Bus Unit Error");
237 237
238 if (xec == 0x1) 238 if (xec == 0x1)
239 pr_cont(" in the write data buffers.\n"); 239 pr_cont(" in the write data buffers.\n");
@@ -275,7 +275,7 @@ static void amd_decode_ls_mce(u64 mc3_status)
275 u32 ec = mc3_status & 0xffff; 275 u32 ec = mc3_status & 0xffff;
276 u32 xec = (mc3_status >> 16) & 0xf; 276 u32 xec = (mc3_status >> 16) & 0xf;
277 277
278 pr_emerg(" Load Store Error"); 278 pr_emerg("Load Store Error");
279 279
280 if (xec == 0x0) { 280 if (xec == 0x0) {
281 u8 rrrr = (ec >> 4) & 0xf; 281 u8 rrrr = (ec >> 4) & 0xf;
@@ -304,7 +304,7 @@ void amd_decode_nb_mce(int node_id, struct err_regs *regs, int handle_errors)
304 if (TLB_ERROR(ec) && !report_gart_errors) 304 if (TLB_ERROR(ec) && !report_gart_errors)
305 return; 305 return;
306 306
307 pr_emerg(" Northbridge Error, node %d", node_id); 307 pr_emerg("Northbridge Error, node %d", node_id);
308 308
309 /* 309 /*
310 * F10h, revD can disable ErrCpu[3:0] so check that first and also the 310 * F10h, revD can disable ErrCpu[3:0] so check that first and also the
@@ -342,13 +342,13 @@ static void amd_decode_fr_mce(u64 mc5_status)
342static inline void amd_decode_err_code(unsigned int ec) 342static inline void amd_decode_err_code(unsigned int ec)
343{ 343{
344 if (TLB_ERROR(ec)) { 344 if (TLB_ERROR(ec)) {
345 pr_emerg(" Transaction: %s, Cache Level %s\n", 345 pr_emerg("Transaction: %s, Cache Level %s\n",
346 TT_MSG(ec), LL_MSG(ec)); 346 TT_MSG(ec), LL_MSG(ec));
347 } else if (MEM_ERROR(ec)) { 347 } else if (MEM_ERROR(ec)) {
348 pr_emerg(" Transaction: %s, Type: %s, Cache Level: %s", 348 pr_emerg("Transaction: %s, Type: %s, Cache Level: %s",
349 RRRR_MSG(ec), TT_MSG(ec), LL_MSG(ec)); 349 RRRR_MSG(ec), TT_MSG(ec), LL_MSG(ec));
350 } else if (BUS_ERROR(ec)) { 350 } else if (BUS_ERROR(ec)) {
351 pr_emerg(" Transaction type: %s(%s), %s, Cache Level: %s, " 351 pr_emerg("Transaction type: %s(%s), %s, Cache Level: %s, "
352 "Participating Processor: %s\n", 352 "Participating Processor: %s\n",
353 RRRR_MSG(ec), II_MSG(ec), TO_MSG(ec), LL_MSG(ec), 353 RRRR_MSG(ec), II_MSG(ec), TO_MSG(ec), LL_MSG(ec),
354 PP_MSG(ec)); 354 PP_MSG(ec));
diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c
index ee9753cf362c..f459a6c0886b 100644
--- a/drivers/edac/i5100_edac.c
+++ b/drivers/edac/i5100_edac.c
@@ -589,14 +589,13 @@ static void i5100_refresh_scrubbing(struct work_struct *work)
589/* 589/*
590 * The bandwidth is based on experimentation, feel free to refine it. 590 * The bandwidth is based on experimentation, feel free to refine it.
591 */ 591 */
592static int i5100_set_scrub_rate(struct mem_ctl_info *mci, 592static int i5100_set_scrub_rate(struct mem_ctl_info *mci, u32 bandwidth)
593 u32 *bandwidth)
594{ 593{
595 struct i5100_priv *priv = mci->pvt_info; 594 struct i5100_priv *priv = mci->pvt_info;
596 u32 dw; 595 u32 dw;
597 596
598 pci_read_config_dword(priv->mc, I5100_MC, &dw); 597 pci_read_config_dword(priv->mc, I5100_MC, &dw);
599 if (*bandwidth) { 598 if (bandwidth) {
600 priv->scrub_enable = 1; 599 priv->scrub_enable = 1;
601 dw |= I5100_MC_SCRBEN_MASK; 600 dw |= I5100_MC_SCRBEN_MASK;
602 schedule_delayed_work(&(priv->i5100_scrubbing), 601 schedule_delayed_work(&(priv->i5100_scrubbing),
@@ -610,7 +609,7 @@ static int i5100_set_scrub_rate(struct mem_ctl_info *mci,
610 609
611 pci_read_config_dword(priv->mc, I5100_MC, &dw); 610 pci_read_config_dword(priv->mc, I5100_MC, &dw);
612 611
613 *bandwidth = 5900000 * i5100_mc_scrben(dw); 612 bandwidth = 5900000 * i5100_mc_scrben(dw);
614 613
615 return 0; 614 return 0;
616} 615}
diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c
index cc9357da0e34..e0187d16dd7c 100644
--- a/drivers/edac/i7core_edac.c
+++ b/drivers/edac/i7core_edac.c
@@ -1300,7 +1300,7 @@ int i7core_get_onedevice(struct pci_dev **prev, int devno,
1300 if (devno == 0) 1300 if (devno == 0)
1301 return -ENODEV; 1301 return -ENODEV;
1302 1302
1303 i7core_printk(KERN_ERR, 1303 i7core_printk(KERN_INFO,
1304 "Device not found: dev %02x.%d PCI ID %04x:%04x\n", 1304 "Device not found: dev %02x.%d PCI ID %04x:%04x\n",
1305 dev_descr->dev, dev_descr->func, 1305 dev_descr->dev, dev_descr->func,
1306 PCI_VENDOR_ID_INTEL, dev_descr->dev_id); 1306 PCI_VENDOR_ID_INTEL, dev_descr->dev_id);
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index 52ca09bf4726..1052340e6802 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -336,6 +336,7 @@ static struct of_device_id mpc85xx_pci_err_of_match[] = {
336 }, 336 },
337 {}, 337 {},
338}; 338};
339MODULE_DEVICE_TABLE(of, mpc85xx_pci_err_of_match);
339 340
340static struct of_platform_driver mpc85xx_pci_err_driver = { 341static struct of_platform_driver mpc85xx_pci_err_driver = {
341 .probe = mpc85xx_pci_err_probe, 342 .probe = mpc85xx_pci_err_probe,
@@ -650,6 +651,7 @@ static struct of_device_id mpc85xx_l2_err_of_match[] = {
650 { .compatible = "fsl,p2020-l2-cache-controller", }, 651 { .compatible = "fsl,p2020-l2-cache-controller", },
651 {}, 652 {},
652}; 653};
654MODULE_DEVICE_TABLE(of, mpc85xx_l2_err_of_match);
653 655
654static struct of_platform_driver mpc85xx_l2_err_driver = { 656static struct of_platform_driver mpc85xx_l2_err_driver = {
655 .probe = mpc85xx_l2_err_probe, 657 .probe = mpc85xx_l2_err_probe,
@@ -1120,11 +1122,13 @@ static struct of_device_id mpc85xx_mc_err_of_match[] = {
1120 { .compatible = "fsl,mpc8555-memory-controller", }, 1122 { .compatible = "fsl,mpc8555-memory-controller", },
1121 { .compatible = "fsl,mpc8560-memory-controller", }, 1123 { .compatible = "fsl,mpc8560-memory-controller", },
1122 { .compatible = "fsl,mpc8568-memory-controller", }, 1124 { .compatible = "fsl,mpc8568-memory-controller", },
1125 { .compatible = "fsl,mpc8569-memory-controller", },
1123 { .compatible = "fsl,mpc8572-memory-controller", }, 1126 { .compatible = "fsl,mpc8572-memory-controller", },
1124 { .compatible = "fsl,mpc8349-memory-controller", }, 1127 { .compatible = "fsl,mpc8349-memory-controller", },
1125 { .compatible = "fsl,p2020-memory-controller", }, 1128 { .compatible = "fsl,p2020-memory-controller", },
1126 {}, 1129 {},
1127}; 1130};
1131MODULE_DEVICE_TABLE(of, mpc85xx_mc_err_of_match);
1128 1132
1129static struct of_platform_driver mpc85xx_mc_err_driver = { 1133static struct of_platform_driver mpc85xx_mc_err_driver = {
1130 .probe = mpc85xx_mc_err_probe, 1134 .probe = mpc85xx_mc_err_probe,
diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig
index 1b03ba1d0834..a6c670b8ce52 100644
--- a/drivers/firmware/Kconfig
+++ b/drivers/firmware/Kconfig
@@ -122,8 +122,17 @@ config ISCSI_IBFT_FIND
122 is necessary for iSCSI Boot Firmware Table Attributes module to work 122 is necessary for iSCSI Boot Firmware Table Attributes module to work
123 properly. 123 properly.
124 124
125config ISCSI_BOOT_SYSFS
126 tristate "iSCSI Boot Sysfs Interface"
127 default n
128 help
129 This option enables support for exposing iSCSI boot information
130 via sysfs to userspace. If you wish to export this information,
131 say Y. Otherwise, say N.
132
125config ISCSI_IBFT 133config ISCSI_IBFT
126 tristate "iSCSI Boot Firmware Table Attributes module" 134 tristate "iSCSI Boot Firmware Table Attributes module"
135 select ISCSI_BOOT_SYSFS
127 depends on ISCSI_IBFT_FIND 136 depends on ISCSI_IBFT_FIND
128 default n 137 default n
129 help 138 help
diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile
index 1c3c17343dbe..5fe7e1662922 100644
--- a/drivers/firmware/Makefile
+++ b/drivers/firmware/Makefile
@@ -10,4 +10,5 @@ obj-$(CONFIG_DCDBAS) += dcdbas.o
10obj-$(CONFIG_DMIID) += dmi-id.o 10obj-$(CONFIG_DMIID) += dmi-id.o
11obj-$(CONFIG_ISCSI_IBFT_FIND) += iscsi_ibft_find.o 11obj-$(CONFIG_ISCSI_IBFT_FIND) += iscsi_ibft_find.o
12obj-$(CONFIG_ISCSI_IBFT) += iscsi_ibft.o 12obj-$(CONFIG_ISCSI_IBFT) += iscsi_ibft.o
13obj-$(CONFIG_ISCSI_BOOT_SYSFS) += iscsi_boot_sysfs.o
13obj-$(CONFIG_FIRMWARE_MEMMAP) += memmap.o 14obj-$(CONFIG_FIRMWARE_MEMMAP) += memmap.o
diff --git a/drivers/firmware/iscsi_boot_sysfs.c b/drivers/firmware/iscsi_boot_sysfs.c
new file mode 100644
index 000000000000..df6bff7366cf
--- /dev/null
+++ b/drivers/firmware/iscsi_boot_sysfs.c
@@ -0,0 +1,481 @@
1/*
2 * Export the iSCSI boot info to userland via sysfs.
3 *
4 * Copyright (C) 2010 Red Hat, Inc. All rights reserved.
5 * Copyright (C) 2010 Mike Christie
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License v2.0 as published by
9 * the Free Software Foundation
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <linux/module.h>
18#include <linux/string.h>
19#include <linux/slab.h>
20#include <linux/sysfs.h>
21#include <linux/capability.h>
22#include <linux/iscsi_boot_sysfs.h>
23
24
25MODULE_AUTHOR("Mike Christie <michaelc@cs.wisc.edu>");
26MODULE_DESCRIPTION("sysfs interface and helpers to export iSCSI boot information");
27MODULE_LICENSE("GPL");
28/*
29 * The kobject and attribute structures.
30 */
31struct iscsi_boot_attr {
32 struct attribute attr;
33 int type;
34 ssize_t (*show) (void *data, int type, char *buf);
35};
36
37/*
38 * The routine called for all sysfs attributes.
39 */
40static ssize_t iscsi_boot_show_attribute(struct kobject *kobj,
41 struct attribute *attr, char *buf)
42{
43 struct iscsi_boot_kobj *boot_kobj =
44 container_of(kobj, struct iscsi_boot_kobj, kobj);
45 struct iscsi_boot_attr *boot_attr =
46 container_of(attr, struct iscsi_boot_attr, attr);
47 ssize_t ret = -EIO;
48 char *str = buf;
49
50 if (!capable(CAP_SYS_ADMIN))
51 return -EACCES;
52
53 if (boot_kobj->show)
54 ret = boot_kobj->show(boot_kobj->data, boot_attr->type, str);
55 return ret;
56}
57
58static const struct sysfs_ops iscsi_boot_attr_ops = {
59 .show = iscsi_boot_show_attribute,
60};
61
62static void iscsi_boot_kobj_release(struct kobject *kobj)
63{
64 struct iscsi_boot_kobj *boot_kobj =
65 container_of(kobj, struct iscsi_boot_kobj, kobj);
66
67 kfree(boot_kobj->data);
68 kfree(boot_kobj);
69}
70
71static struct kobj_type iscsi_boot_ktype = {
72 .release = iscsi_boot_kobj_release,
73 .sysfs_ops = &iscsi_boot_attr_ops,
74};
75
76#define iscsi_boot_rd_attr(fnname, sysfs_name, attr_type) \
77static struct iscsi_boot_attr iscsi_boot_attr_##fnname = { \
78 .attr = { .name = __stringify(sysfs_name), .mode = 0444 }, \
79 .type = attr_type, \
80}
81
82/* Target attrs */
83iscsi_boot_rd_attr(tgt_index, index, ISCSI_BOOT_TGT_INDEX);
84iscsi_boot_rd_attr(tgt_flags, flags, ISCSI_BOOT_TGT_FLAGS);
85iscsi_boot_rd_attr(tgt_ip, ip-addr, ISCSI_BOOT_TGT_IP_ADDR);
86iscsi_boot_rd_attr(tgt_port, port, ISCSI_BOOT_TGT_PORT);
87iscsi_boot_rd_attr(tgt_lun, lun, ISCSI_BOOT_TGT_LUN);
88iscsi_boot_rd_attr(tgt_chap, chap-type, ISCSI_BOOT_TGT_CHAP_TYPE);
89iscsi_boot_rd_attr(tgt_nic, nic-assoc, ISCSI_BOOT_TGT_NIC_ASSOC);
90iscsi_boot_rd_attr(tgt_name, target-name, ISCSI_BOOT_TGT_NAME);
91iscsi_boot_rd_attr(tgt_chap_name, chap-name, ISCSI_BOOT_TGT_CHAP_NAME);
92iscsi_boot_rd_attr(tgt_chap_secret, chap-secret, ISCSI_BOOT_TGT_CHAP_SECRET);
93iscsi_boot_rd_attr(tgt_chap_rev_name, rev-chap-name,
94 ISCSI_BOOT_TGT_REV_CHAP_NAME);
95iscsi_boot_rd_attr(tgt_chap_rev_secret, rev-chap-name-secret,
96 ISCSI_BOOT_TGT_REV_CHAP_SECRET);
97
98static struct attribute *target_attrs[] = {
99 &iscsi_boot_attr_tgt_index.attr,
100 &iscsi_boot_attr_tgt_flags.attr,
101 &iscsi_boot_attr_tgt_ip.attr,
102 &iscsi_boot_attr_tgt_port.attr,
103 &iscsi_boot_attr_tgt_lun.attr,
104 &iscsi_boot_attr_tgt_chap.attr,
105 &iscsi_boot_attr_tgt_nic.attr,
106 &iscsi_boot_attr_tgt_name.attr,
107 &iscsi_boot_attr_tgt_chap_name.attr,
108 &iscsi_boot_attr_tgt_chap_secret.attr,
109 &iscsi_boot_attr_tgt_chap_rev_name.attr,
110 &iscsi_boot_attr_tgt_chap_rev_secret.attr,
111 NULL
112};
113
114static mode_t iscsi_boot_tgt_attr_is_visible(struct kobject *kobj,
115 struct attribute *attr, int i)
116{
117 struct iscsi_boot_kobj *boot_kobj =
118 container_of(kobj, struct iscsi_boot_kobj, kobj);
119
120 if (attr == &iscsi_boot_attr_tgt_index.attr)
121 return boot_kobj->is_visible(boot_kobj->data,
122 ISCSI_BOOT_TGT_INDEX);
123 else if (attr == &iscsi_boot_attr_tgt_flags.attr)
124 return boot_kobj->is_visible(boot_kobj->data,
125 ISCSI_BOOT_TGT_FLAGS);
126 else if (attr == &iscsi_boot_attr_tgt_ip.attr)
127 return boot_kobj->is_visible(boot_kobj->data,
128 ISCSI_BOOT_TGT_IP_ADDR);
129 else if (attr == &iscsi_boot_attr_tgt_port.attr)
130 return boot_kobj->is_visible(boot_kobj->data,
131 ISCSI_BOOT_TGT_PORT);
132 else if (attr == &iscsi_boot_attr_tgt_lun.attr)
133 return boot_kobj->is_visible(boot_kobj->data,
134 ISCSI_BOOT_TGT_LUN);
135 else if (attr == &iscsi_boot_attr_tgt_chap.attr)
136 return boot_kobj->is_visible(boot_kobj->data,
137 ISCSI_BOOT_TGT_CHAP_TYPE);
138 else if (attr == &iscsi_boot_attr_tgt_nic.attr)
139 return boot_kobj->is_visible(boot_kobj->data,
140 ISCSI_BOOT_TGT_NIC_ASSOC);
141 else if (attr == &iscsi_boot_attr_tgt_name.attr)
142 return boot_kobj->is_visible(boot_kobj->data,
143 ISCSI_BOOT_TGT_NAME);
144 else if (attr == &iscsi_boot_attr_tgt_chap_name.attr)
145 return boot_kobj->is_visible(boot_kobj->data,
146 ISCSI_BOOT_TGT_CHAP_NAME);
147 else if (attr == &iscsi_boot_attr_tgt_chap_secret.attr)
148 return boot_kobj->is_visible(boot_kobj->data,
149 ISCSI_BOOT_TGT_CHAP_SECRET);
150 else if (attr == &iscsi_boot_attr_tgt_chap_rev_name.attr)
151 return boot_kobj->is_visible(boot_kobj->data,
152 ISCSI_BOOT_TGT_REV_CHAP_NAME);
153 else if (attr == &iscsi_boot_attr_tgt_chap_rev_secret.attr)
154 return boot_kobj->is_visible(boot_kobj->data,
155 ISCSI_BOOT_TGT_REV_CHAP_SECRET);
156 return 0;
157}
158
159static struct attribute_group iscsi_boot_target_attr_group = {
160 .attrs = target_attrs,
161 .is_visible = iscsi_boot_tgt_attr_is_visible,
162};
163
164/* Ethernet attrs */
165iscsi_boot_rd_attr(eth_index, index, ISCSI_BOOT_ETH_INDEX);
166iscsi_boot_rd_attr(eth_flags, flags, ISCSI_BOOT_ETH_FLAGS);
167iscsi_boot_rd_attr(eth_ip, ip-addr, ISCSI_BOOT_ETH_IP_ADDR);
168iscsi_boot_rd_attr(eth_subnet, subnet-mask, ISCSI_BOOT_ETH_SUBNET_MASK);
169iscsi_boot_rd_attr(eth_origin, origin, ISCSI_BOOT_ETH_ORIGIN);
170iscsi_boot_rd_attr(eth_gateway, gateway, ISCSI_BOOT_ETH_GATEWAY);
171iscsi_boot_rd_attr(eth_primary_dns, primary-dns, ISCSI_BOOT_ETH_PRIMARY_DNS);
172iscsi_boot_rd_attr(eth_secondary_dns, secondary-dns,
173 ISCSI_BOOT_ETH_SECONDARY_DNS);
174iscsi_boot_rd_attr(eth_dhcp, dhcp, ISCSI_BOOT_ETH_DHCP);
175iscsi_boot_rd_attr(eth_vlan, vlan, ISCSI_BOOT_ETH_VLAN);
176iscsi_boot_rd_attr(eth_mac, mac, ISCSI_BOOT_ETH_MAC);
177iscsi_boot_rd_attr(eth_hostname, hostname, ISCSI_BOOT_ETH_HOSTNAME);
178
179static struct attribute *ethernet_attrs[] = {
180 &iscsi_boot_attr_eth_index.attr,
181 &iscsi_boot_attr_eth_flags.attr,
182 &iscsi_boot_attr_eth_ip.attr,
183 &iscsi_boot_attr_eth_subnet.attr,
184 &iscsi_boot_attr_eth_origin.attr,
185 &iscsi_boot_attr_eth_gateway.attr,
186 &iscsi_boot_attr_eth_primary_dns.attr,
187 &iscsi_boot_attr_eth_secondary_dns.attr,
188 &iscsi_boot_attr_eth_dhcp.attr,
189 &iscsi_boot_attr_eth_vlan.attr,
190 &iscsi_boot_attr_eth_mac.attr,
191 &iscsi_boot_attr_eth_hostname.attr,
192 NULL
193};
194
195static mode_t iscsi_boot_eth_attr_is_visible(struct kobject *kobj,
196 struct attribute *attr, int i)
197{
198 struct iscsi_boot_kobj *boot_kobj =
199 container_of(kobj, struct iscsi_boot_kobj, kobj);
200
201 if (attr == &iscsi_boot_attr_eth_index.attr)
202 return boot_kobj->is_visible(boot_kobj->data,
203 ISCSI_BOOT_ETH_INDEX);
204 else if (attr == &iscsi_boot_attr_eth_flags.attr)
205 return boot_kobj->is_visible(boot_kobj->data,
206 ISCSI_BOOT_ETH_FLAGS);
207 else if (attr == &iscsi_boot_attr_eth_ip.attr)
208 return boot_kobj->is_visible(boot_kobj->data,
209 ISCSI_BOOT_ETH_IP_ADDR);
210 else if (attr == &iscsi_boot_attr_eth_subnet.attr)
211 return boot_kobj->is_visible(boot_kobj->data,
212 ISCSI_BOOT_ETH_SUBNET_MASK);
213 else if (attr == &iscsi_boot_attr_eth_origin.attr)
214 return boot_kobj->is_visible(boot_kobj->data,
215 ISCSI_BOOT_ETH_ORIGIN);
216 else if (attr == &iscsi_boot_attr_eth_gateway.attr)
217 return boot_kobj->is_visible(boot_kobj->data,
218 ISCSI_BOOT_ETH_GATEWAY);
219 else if (attr == &iscsi_boot_attr_eth_primary_dns.attr)
220 return boot_kobj->is_visible(boot_kobj->data,
221 ISCSI_BOOT_ETH_PRIMARY_DNS);
222 else if (attr == &iscsi_boot_attr_eth_secondary_dns.attr)
223 return boot_kobj->is_visible(boot_kobj->data,
224 ISCSI_BOOT_ETH_SECONDARY_DNS);
225 else if (attr == &iscsi_boot_attr_eth_dhcp.attr)
226 return boot_kobj->is_visible(boot_kobj->data,
227 ISCSI_BOOT_ETH_DHCP);
228 else if (attr == &iscsi_boot_attr_eth_vlan.attr)
229 return boot_kobj->is_visible(boot_kobj->data,
230 ISCSI_BOOT_ETH_VLAN);
231 else if (attr == &iscsi_boot_attr_eth_mac.attr)
232 return boot_kobj->is_visible(boot_kobj->data,
233 ISCSI_BOOT_ETH_MAC);
234 else if (attr == &iscsi_boot_attr_eth_hostname.attr)
235 return boot_kobj->is_visible(boot_kobj->data,
236 ISCSI_BOOT_ETH_HOSTNAME);
237 return 0;
238}
239
240static struct attribute_group iscsi_boot_ethernet_attr_group = {
241 .attrs = ethernet_attrs,
242 .is_visible = iscsi_boot_eth_attr_is_visible,
243};
244
245/* Initiator attrs */
246iscsi_boot_rd_attr(ini_index, index, ISCSI_BOOT_INI_INDEX);
247iscsi_boot_rd_attr(ini_flags, flags, ISCSI_BOOT_INI_FLAGS);
248iscsi_boot_rd_attr(ini_isns, isns-server, ISCSI_BOOT_INI_ISNS_SERVER);
249iscsi_boot_rd_attr(ini_slp, slp-server, ISCSI_BOOT_INI_SLP_SERVER);
250iscsi_boot_rd_attr(ini_primary_radius, pri-radius-server,
251 ISCSI_BOOT_INI_PRI_RADIUS_SERVER);
252iscsi_boot_rd_attr(ini_secondary_radius, sec-radius-server,
253 ISCSI_BOOT_INI_SEC_RADIUS_SERVER);
254iscsi_boot_rd_attr(ini_name, initiator-name, ISCSI_BOOT_INI_INITIATOR_NAME);
255
256static struct attribute *initiator_attrs[] = {
257 &iscsi_boot_attr_ini_index.attr,
258 &iscsi_boot_attr_ini_flags.attr,
259 &iscsi_boot_attr_ini_isns.attr,
260 &iscsi_boot_attr_ini_slp.attr,
261 &iscsi_boot_attr_ini_primary_radius.attr,
262 &iscsi_boot_attr_ini_secondary_radius.attr,
263 &iscsi_boot_attr_ini_name.attr,
264 NULL
265};
266
267static mode_t iscsi_boot_ini_attr_is_visible(struct kobject *kobj,
268 struct attribute *attr, int i)
269{
270 struct iscsi_boot_kobj *boot_kobj =
271 container_of(kobj, struct iscsi_boot_kobj, kobj);
272
273 if (attr == &iscsi_boot_attr_ini_index.attr)
274 return boot_kobj->is_visible(boot_kobj->data,
275 ISCSI_BOOT_INI_INDEX);
276 if (attr == &iscsi_boot_attr_ini_flags.attr)
277 return boot_kobj->is_visible(boot_kobj->data,
278 ISCSI_BOOT_INI_FLAGS);
279 if (attr == &iscsi_boot_attr_ini_isns.attr)
280 return boot_kobj->is_visible(boot_kobj->data,
281 ISCSI_BOOT_INI_ISNS_SERVER);
282 if (attr == &iscsi_boot_attr_ini_slp.attr)
283 return boot_kobj->is_visible(boot_kobj->data,
284 ISCSI_BOOT_INI_SLP_SERVER);
285 if (attr == &iscsi_boot_attr_ini_primary_radius.attr)
286 return boot_kobj->is_visible(boot_kobj->data,
287 ISCSI_BOOT_INI_PRI_RADIUS_SERVER);
288 if (attr == &iscsi_boot_attr_ini_secondary_radius.attr)
289 return boot_kobj->is_visible(boot_kobj->data,
290 ISCSI_BOOT_INI_SEC_RADIUS_SERVER);
291 if (attr == &iscsi_boot_attr_ini_name.attr)
292 return boot_kobj->is_visible(boot_kobj->data,
293 ISCSI_BOOT_INI_INITIATOR_NAME);
294
295 return 0;
296}
297
298static struct attribute_group iscsi_boot_initiator_attr_group = {
299 .attrs = initiator_attrs,
300 .is_visible = iscsi_boot_ini_attr_is_visible,
301};
302
303static struct iscsi_boot_kobj *
304iscsi_boot_create_kobj(struct iscsi_boot_kset *boot_kset,
305 struct attribute_group *attr_group,
306 const char *name, int index, void *data,
307 ssize_t (*show) (void *data, int type, char *buf),
308 mode_t (*is_visible) (void *data, int type))
309{
310 struct iscsi_boot_kobj *boot_kobj;
311
312 boot_kobj = kzalloc(sizeof(*boot_kobj), GFP_KERNEL);
313 if (!boot_kobj)
314 return NULL;
315 INIT_LIST_HEAD(&boot_kobj->list);
316
317 boot_kobj->kobj.kset = boot_kset->kset;
318 if (kobject_init_and_add(&boot_kobj->kobj, &iscsi_boot_ktype,
319 NULL, name, index)) {
320 kfree(boot_kobj);
321 return NULL;
322 }
323 boot_kobj->data = data;
324 boot_kobj->show = show;
325 boot_kobj->is_visible = is_visible;
326
327 if (sysfs_create_group(&boot_kobj->kobj, attr_group)) {
328 /*
329 * We do not want to free this because the caller
330 * will assume that since the creation call failed
331 * the boot kobj was not setup and the normal release
332 * path is not being run.
333 */
334 boot_kobj->data = NULL;
335 kobject_put(&boot_kobj->kobj);
336 return NULL;
337 }
338 boot_kobj->attr_group = attr_group;
339
340 kobject_uevent(&boot_kobj->kobj, KOBJ_ADD);
341 /* Nothing broke so lets add it to the list. */
342 list_add_tail(&boot_kobj->list, &boot_kset->kobj_list);
343 return boot_kobj;
344}
345
346static void iscsi_boot_remove_kobj(struct iscsi_boot_kobj *boot_kobj)
347{
348 list_del(&boot_kobj->list);
349 sysfs_remove_group(&boot_kobj->kobj, boot_kobj->attr_group);
350 kobject_put(&boot_kobj->kobj);
351}
352
353/**
354 * iscsi_boot_create_target() - create boot target sysfs dir
355 * @boot_kset: boot kset
356 * @index: the target id
357 * @data: driver specific data for target
358 * @show: attr show function
359 * @is_visible: attr visibility function
360 *
361 * Note: The boot sysfs lib will free the data passed in for the caller
362 * when all refs to the target kobject have been released.
363 */
364struct iscsi_boot_kobj *
365iscsi_boot_create_target(struct iscsi_boot_kset *boot_kset, int index,
366 void *data,
367 ssize_t (*show) (void *data, int type, char *buf),
368 mode_t (*is_visible) (void *data, int type))
369{
370 return iscsi_boot_create_kobj(boot_kset, &iscsi_boot_target_attr_group,
371 "target%d", index, data, show, is_visible);
372}
373EXPORT_SYMBOL_GPL(iscsi_boot_create_target);
374
375/**
376 * iscsi_boot_create_initiator() - create boot initiator sysfs dir
377 * @boot_kset: boot kset
378 * @index: the initiator id
379 * @data: driver specific data
380 * @show: attr show function
381 * @is_visible: attr visibility function
382 *
383 * Note: The boot sysfs lib will free the data passed in for the caller
384 * when all refs to the initiator kobject have been released.
385 */
386struct iscsi_boot_kobj *
387iscsi_boot_create_initiator(struct iscsi_boot_kset *boot_kset, int index,
388 void *data,
389 ssize_t (*show) (void *data, int type, char *buf),
390 mode_t (*is_visible) (void *data, int type))
391{
392 return iscsi_boot_create_kobj(boot_kset,
393 &iscsi_boot_initiator_attr_group,
394 "initiator", index, data, show,
395 is_visible);
396}
397EXPORT_SYMBOL_GPL(iscsi_boot_create_initiator);
398
399/**
400 * iscsi_boot_create_ethernet() - create boot ethernet sysfs dir
401 * @boot_kset: boot kset
402 * @index: the ethernet device id
403 * @data: driver specific data
404 * @show: attr show function
405 * @is_visible: attr visibility function
406 *
407 * Note: The boot sysfs lib will free the data passed in for the caller
408 * when all refs to the ethernet kobject have been released.
409 */
410struct iscsi_boot_kobj *
411iscsi_boot_create_ethernet(struct iscsi_boot_kset *boot_kset, int index,
412 void *data,
413 ssize_t (*show) (void *data, int type, char *buf),
414 mode_t (*is_visible) (void *data, int type))
415{
416 return iscsi_boot_create_kobj(boot_kset,
417 &iscsi_boot_ethernet_attr_group,
418 "ethernet%d", index, data, show,
419 is_visible);
420}
421EXPORT_SYMBOL_GPL(iscsi_boot_create_ethernet);
422
423/**
424 * iscsi_boot_create_kset() - creates root sysfs tree
425 * @set_name: name of root dir
426 */
427struct iscsi_boot_kset *iscsi_boot_create_kset(const char *set_name)
428{
429 struct iscsi_boot_kset *boot_kset;
430
431 boot_kset = kzalloc(sizeof(*boot_kset), GFP_KERNEL);
432 if (!boot_kset)
433 return NULL;
434
435 boot_kset->kset = kset_create_and_add(set_name, NULL, firmware_kobj);
436 if (!boot_kset->kset) {
437 kfree(boot_kset);
438 return NULL;
439 }
440
441 INIT_LIST_HEAD(&boot_kset->kobj_list);
442 return boot_kset;
443}
444EXPORT_SYMBOL_GPL(iscsi_boot_create_kset);
445
446/**
447 * iscsi_boot_create_host_kset() - creates root sysfs tree for a scsi host
448 * @hostno: host number of scsi host
449 */
450struct iscsi_boot_kset *iscsi_boot_create_host_kset(unsigned int hostno)
451{
452 struct iscsi_boot_kset *boot_kset;
453 char *set_name;
454
455 set_name = kasprintf(GFP_KERNEL, "iscsi_boot%u", hostno);
456 if (!set_name)
457 return NULL;
458
459 boot_kset = iscsi_boot_create_kset(set_name);
460 kfree(set_name);
461 return boot_kset;
462}
463EXPORT_SYMBOL_GPL(iscsi_boot_create_host_kset);
464
465/**
466 * iscsi_boot_destroy_kset() - destroy kset and kobjects under it
467 * @boot_kset: boot kset
468 *
469 * This will remove the kset and kobjects and attrs under it.
470 */
471void iscsi_boot_destroy_kset(struct iscsi_boot_kset *boot_kset)
472{
473 struct iscsi_boot_kobj *boot_kobj, *tmp_kobj;
474
475 list_for_each_entry_safe(boot_kobj, tmp_kobj,
476 &boot_kset->kobj_list, list)
477 iscsi_boot_remove_kobj(boot_kobj);
478
479 kset_unregister(boot_kset->kset);
480}
481EXPORT_SYMBOL_GPL(iscsi_boot_destroy_kset);
diff --git a/drivers/firmware/iscsi_ibft.c b/drivers/firmware/iscsi_ibft.c
index ed2801c378de..4f04ec0410a0 100644
--- a/drivers/firmware/iscsi_ibft.c
+++ b/drivers/firmware/iscsi_ibft.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright 2007 Red Hat, Inc. 2 * Copyright 2007-2010 Red Hat, Inc.
3 * by Peter Jones <pjones@redhat.com> 3 * by Peter Jones <pjones@redhat.com>
4 * Copyright 2008 IBM, Inc. 4 * Copyright 2008 IBM, Inc.
5 * by Konrad Rzeszutek <konradr@linux.vnet.ibm.com> 5 * by Konrad Rzeszutek <konradr@linux.vnet.ibm.com>
@@ -19,6 +19,9 @@
19 * 19 *
20 * Changelog: 20 * Changelog:
21 * 21 *
22 * 06 Jan 2010 - Peter Jones <pjones@redhat.com>
23 * New changelog entries are in the git log from now on. Not here.
24 *
22 * 14 Mar 2008 - Konrad Rzeszutek <ketuzsezr@darnok.org> 25 * 14 Mar 2008 - Konrad Rzeszutek <ketuzsezr@darnok.org>
23 * Updated comments and copyrights. (v0.4.9) 26 * Updated comments and copyrights. (v0.4.9)
24 * 27 *
@@ -78,9 +81,11 @@
78#include <linux/stat.h> 81#include <linux/stat.h>
79#include <linux/string.h> 82#include <linux/string.h>
80#include <linux/types.h> 83#include <linux/types.h>
84#include <linux/acpi.h>
85#include <linux/iscsi_boot_sysfs.h>
81 86
82#define IBFT_ISCSI_VERSION "0.4.9" 87#define IBFT_ISCSI_VERSION "0.5.0"
83#define IBFT_ISCSI_DATE "2008-Mar-14" 88#define IBFT_ISCSI_DATE "2010-Feb-25"
84 89
85MODULE_AUTHOR("Peter Jones <pjones@redhat.com> and \ 90MODULE_AUTHOR("Peter Jones <pjones@redhat.com> and \
86Konrad Rzeszutek <ketuzsezr@darnok.org>"); 91Konrad Rzeszutek <ketuzsezr@darnok.org>");
@@ -166,108 +171,20 @@ enum ibft_id {
166}; 171};
167 172
168/* 173/*
169 * We do not support the other types, hence the usage of NULL.
170 * This maps to the enum ibft_id.
171 */
172static const char *ibft_id_names[] =
173 {NULL, NULL, "initiator", "ethernet%d", "target%d", NULL, NULL};
174
175/*
176 * The text attributes names for each of the kobjects.
177*/
178enum ibft_eth_properties_enum {
179 ibft_eth_index,
180 ibft_eth_flags,
181 ibft_eth_ip_addr,
182 ibft_eth_subnet_mask,
183 ibft_eth_origin,
184 ibft_eth_gateway,
185 ibft_eth_primary_dns,
186 ibft_eth_secondary_dns,
187 ibft_eth_dhcp,
188 ibft_eth_vlan,
189 ibft_eth_mac,
190 /* ibft_eth_pci_bdf - this is replaced by link to the device itself. */
191 ibft_eth_hostname,
192 ibft_eth_end_marker,
193};
194
195static const char *ibft_eth_properties[] =
196 {"index", "flags", "ip-addr", "subnet-mask", "origin", "gateway",
197 "primary-dns", "secondary-dns", "dhcp", "vlan", "mac", "hostname",
198 NULL};
199
200enum ibft_tgt_properties_enum {
201 ibft_tgt_index,
202 ibft_tgt_flags,
203 ibft_tgt_ip_addr,
204 ibft_tgt_port,
205 ibft_tgt_lun,
206 ibft_tgt_chap_type,
207 ibft_tgt_nic_assoc,
208 ibft_tgt_name,
209 ibft_tgt_chap_name,
210 ibft_tgt_chap_secret,
211 ibft_tgt_rev_chap_name,
212 ibft_tgt_rev_chap_secret,
213 ibft_tgt_end_marker,
214};
215
216static const char *ibft_tgt_properties[] =
217 {"index", "flags", "ip-addr", "port", "lun", "chap-type", "nic-assoc",
218 "target-name", "chap-name", "chap-secret", "rev-chap-name",
219 "rev-chap-name-secret", NULL};
220
221enum ibft_initiator_properties_enum {
222 ibft_init_index,
223 ibft_init_flags,
224 ibft_init_isns_server,
225 ibft_init_slp_server,
226 ibft_init_pri_radius_server,
227 ibft_init_sec_radius_server,
228 ibft_init_initiator_name,
229 ibft_init_end_marker,
230};
231
232static const char *ibft_initiator_properties[] =
233 {"index", "flags", "isns-server", "slp-server", "pri-radius-server",
234 "sec-radius-server", "initiator-name", NULL};
235
236/*
237 * The kobject and attribute structures. 174 * The kobject and attribute structures.
238 */ 175 */
239 176
240struct ibft_kobject { 177struct ibft_kobject {
241 struct ibft_table_header *header; 178 struct acpi_table_ibft *header;
242 union { 179 union {
243 struct ibft_initiator *initiator; 180 struct ibft_initiator *initiator;
244 struct ibft_nic *nic; 181 struct ibft_nic *nic;
245 struct ibft_tgt *tgt; 182 struct ibft_tgt *tgt;
246 struct ibft_hdr *hdr; 183 struct ibft_hdr *hdr;
247 }; 184 };
248 struct kobject kobj;
249 struct list_head node;
250}; 185};
251 186
252struct ibft_attribute { 187static struct iscsi_boot_kset *boot_kset;
253 struct attribute attr;
254 ssize_t (*show) (struct ibft_kobject *entry,
255 struct ibft_attribute *attr, char *buf);
256 union {
257 struct ibft_initiator *initiator;
258 struct ibft_nic *nic;
259 struct ibft_tgt *tgt;
260 struct ibft_hdr *hdr;
261 };
262 struct kobject *kobj;
263 int type; /* The enum of the type. This can be any value of:
264 ibft_eth_properties_enum, ibft_tgt_properties_enum,
265 or ibft_initiator_properties_enum. */
266 struct list_head node;
267};
268
269static LIST_HEAD(ibft_attr_list);
270static LIST_HEAD(ibft_kobject_list);
271 188
272static const char nulls[16]; 189static const char nulls[16];
273 190
@@ -306,35 +223,27 @@ static ssize_t sprintf_string(char *str, int len, char *buf)
306static int ibft_verify_hdr(char *t, struct ibft_hdr *hdr, int id, int length) 223static int ibft_verify_hdr(char *t, struct ibft_hdr *hdr, int id, int length)
307{ 224{
308 if (hdr->id != id) { 225 if (hdr->id != id) {
309 printk(KERN_ERR "iBFT error: We expected the " \ 226 printk(KERN_ERR "iBFT error: We expected the %s " \
310 "field header.id to have %d but " \ 227 "field header.id to have %d but " \
311 "found %d instead!\n", id, hdr->id); 228 "found %d instead!\n", t, id, hdr->id);
312 return -ENODEV; 229 return -ENODEV;
313 } 230 }
314 if (hdr->length != length) { 231 if (hdr->length != length) {
315 printk(KERN_ERR "iBFT error: We expected the " \ 232 printk(KERN_ERR "iBFT error: We expected the %s " \
316 "field header.length to have %d but " \ 233 "field header.length to have %d but " \
317 "found %d instead!\n", length, hdr->length); 234 "found %d instead!\n", t, length, hdr->length);
318 return -ENODEV; 235 return -ENODEV;
319 } 236 }
320 237
321 return 0; 238 return 0;
322} 239}
323 240
324static void ibft_release(struct kobject *kobj)
325{
326 struct ibft_kobject *ibft =
327 container_of(kobj, struct ibft_kobject, kobj);
328 kfree(ibft);
329}
330
331/* 241/*
332 * Routines for parsing the iBFT data to be human readable. 242 * Routines for parsing the iBFT data to be human readable.
333 */ 243 */
334static ssize_t ibft_attr_show_initiator(struct ibft_kobject *entry, 244static ssize_t ibft_attr_show_initiator(void *data, int type, char *buf)
335 struct ibft_attribute *attr,
336 char *buf)
337{ 245{
246 struct ibft_kobject *entry = data;
338 struct ibft_initiator *initiator = entry->initiator; 247 struct ibft_initiator *initiator = entry->initiator;
339 void *ibft_loc = entry->header; 248 void *ibft_loc = entry->header;
340 char *str = buf; 249 char *str = buf;
@@ -342,26 +251,26 @@ static ssize_t ibft_attr_show_initiator(struct ibft_kobject *entry,
342 if (!initiator) 251 if (!initiator)
343 return 0; 252 return 0;
344 253
345 switch (attr->type) { 254 switch (type) {
346 case ibft_init_index: 255 case ISCSI_BOOT_INI_INDEX:
347 str += sprintf(str, "%d\n", initiator->hdr.index); 256 str += sprintf(str, "%d\n", initiator->hdr.index);
348 break; 257 break;
349 case ibft_init_flags: 258 case ISCSI_BOOT_INI_FLAGS:
350 str += sprintf(str, "%d\n", initiator->hdr.flags); 259 str += sprintf(str, "%d\n", initiator->hdr.flags);
351 break; 260 break;
352 case ibft_init_isns_server: 261 case ISCSI_BOOT_INI_ISNS_SERVER:
353 str += sprintf_ipaddr(str, initiator->isns_server); 262 str += sprintf_ipaddr(str, initiator->isns_server);
354 break; 263 break;
355 case ibft_init_slp_server: 264 case ISCSI_BOOT_INI_SLP_SERVER:
356 str += sprintf_ipaddr(str, initiator->slp_server); 265 str += sprintf_ipaddr(str, initiator->slp_server);
357 break; 266 break;
358 case ibft_init_pri_radius_server: 267 case ISCSI_BOOT_INI_PRI_RADIUS_SERVER:
359 str += sprintf_ipaddr(str, initiator->pri_radius_server); 268 str += sprintf_ipaddr(str, initiator->pri_radius_server);
360 break; 269 break;
361 case ibft_init_sec_radius_server: 270 case ISCSI_BOOT_INI_SEC_RADIUS_SERVER:
362 str += sprintf_ipaddr(str, initiator->sec_radius_server); 271 str += sprintf_ipaddr(str, initiator->sec_radius_server);
363 break; 272 break;
364 case ibft_init_initiator_name: 273 case ISCSI_BOOT_INI_INITIATOR_NAME:
365 str += sprintf_string(str, initiator->initiator_name_len, 274 str += sprintf_string(str, initiator->initiator_name_len,
366 (char *)ibft_loc + 275 (char *)ibft_loc +
367 initiator->initiator_name_off); 276 initiator->initiator_name_off);
@@ -373,10 +282,9 @@ static ssize_t ibft_attr_show_initiator(struct ibft_kobject *entry,
373 return str - buf; 282 return str - buf;
374} 283}
375 284
376static ssize_t ibft_attr_show_nic(struct ibft_kobject *entry, 285static ssize_t ibft_attr_show_nic(void *data, int type, char *buf)
377 struct ibft_attribute *attr,
378 char *buf)
379{ 286{
287 struct ibft_kobject *entry = data;
380 struct ibft_nic *nic = entry->nic; 288 struct ibft_nic *nic = entry->nic;
381 void *ibft_loc = entry->header; 289 void *ibft_loc = entry->header;
382 char *str = buf; 290 char *str = buf;
@@ -385,42 +293,42 @@ static ssize_t ibft_attr_show_nic(struct ibft_kobject *entry,
385 if (!nic) 293 if (!nic)
386 return 0; 294 return 0;
387 295
388 switch (attr->type) { 296 switch (type) {
389 case ibft_eth_index: 297 case ISCSI_BOOT_ETH_INDEX:
390 str += sprintf(str, "%d\n", nic->hdr.index); 298 str += sprintf(str, "%d\n", nic->hdr.index);
391 break; 299 break;
392 case ibft_eth_flags: 300 case ISCSI_BOOT_ETH_FLAGS:
393 str += sprintf(str, "%d\n", nic->hdr.flags); 301 str += sprintf(str, "%d\n", nic->hdr.flags);
394 break; 302 break;
395 case ibft_eth_ip_addr: 303 case ISCSI_BOOT_ETH_IP_ADDR:
396 str += sprintf_ipaddr(str, nic->ip_addr); 304 str += sprintf_ipaddr(str, nic->ip_addr);
397 break; 305 break;
398 case ibft_eth_subnet_mask: 306 case ISCSI_BOOT_ETH_SUBNET_MASK:
399 val = cpu_to_be32(~((1 << (32-nic->subnet_mask_prefix))-1)); 307 val = cpu_to_be32(~((1 << (32-nic->subnet_mask_prefix))-1));
400 str += sprintf(str, "%pI4", &val); 308 str += sprintf(str, "%pI4", &val);
401 break; 309 break;
402 case ibft_eth_origin: 310 case ISCSI_BOOT_ETH_ORIGIN:
403 str += sprintf(str, "%d\n", nic->origin); 311 str += sprintf(str, "%d\n", nic->origin);
404 break; 312 break;
405 case ibft_eth_gateway: 313 case ISCSI_BOOT_ETH_GATEWAY:
406 str += sprintf_ipaddr(str, nic->gateway); 314 str += sprintf_ipaddr(str, nic->gateway);
407 break; 315 break;
408 case ibft_eth_primary_dns: 316 case ISCSI_BOOT_ETH_PRIMARY_DNS:
409 str += sprintf_ipaddr(str, nic->primary_dns); 317 str += sprintf_ipaddr(str, nic->primary_dns);
410 break; 318 break;
411 case ibft_eth_secondary_dns: 319 case ISCSI_BOOT_ETH_SECONDARY_DNS:
412 str += sprintf_ipaddr(str, nic->secondary_dns); 320 str += sprintf_ipaddr(str, nic->secondary_dns);
413 break; 321 break;
414 case ibft_eth_dhcp: 322 case ISCSI_BOOT_ETH_DHCP:
415 str += sprintf_ipaddr(str, nic->dhcp); 323 str += sprintf_ipaddr(str, nic->dhcp);
416 break; 324 break;
417 case ibft_eth_vlan: 325 case ISCSI_BOOT_ETH_VLAN:
418 str += sprintf(str, "%d\n", nic->vlan); 326 str += sprintf(str, "%d\n", nic->vlan);
419 break; 327 break;
420 case ibft_eth_mac: 328 case ISCSI_BOOT_ETH_MAC:
421 str += sprintf(str, "%pM\n", nic->mac); 329 str += sprintf(str, "%pM\n", nic->mac);
422 break; 330 break;
423 case ibft_eth_hostname: 331 case ISCSI_BOOT_ETH_HOSTNAME:
424 str += sprintf_string(str, nic->hostname_len, 332 str += sprintf_string(str, nic->hostname_len,
425 (char *)ibft_loc + nic->hostname_off); 333 (char *)ibft_loc + nic->hostname_off);
426 break; 334 break;
@@ -431,10 +339,9 @@ static ssize_t ibft_attr_show_nic(struct ibft_kobject *entry,
431 return str - buf; 339 return str - buf;
432}; 340};
433 341
434static ssize_t ibft_attr_show_target(struct ibft_kobject *entry, 342static ssize_t ibft_attr_show_target(void *data, int type, char *buf)
435 struct ibft_attribute *attr,
436 char *buf)
437{ 343{
344 struct ibft_kobject *entry = data;
438 struct ibft_tgt *tgt = entry->tgt; 345 struct ibft_tgt *tgt = entry->tgt;
439 void *ibft_loc = entry->header; 346 void *ibft_loc = entry->header;
440 char *str = buf; 347 char *str = buf;
@@ -443,48 +350,48 @@ static ssize_t ibft_attr_show_target(struct ibft_kobject *entry,
443 if (!tgt) 350 if (!tgt)
444 return 0; 351 return 0;
445 352
446 switch (attr->type) { 353 switch (type) {
447 case ibft_tgt_index: 354 case ISCSI_BOOT_TGT_INDEX:
448 str += sprintf(str, "%d\n", tgt->hdr.index); 355 str += sprintf(str, "%d\n", tgt->hdr.index);
449 break; 356 break;
450 case ibft_tgt_flags: 357 case ISCSI_BOOT_TGT_FLAGS:
451 str += sprintf(str, "%d\n", tgt->hdr.flags); 358 str += sprintf(str, "%d\n", tgt->hdr.flags);
452 break; 359 break;
453 case ibft_tgt_ip_addr: 360 case ISCSI_BOOT_TGT_IP_ADDR:
454 str += sprintf_ipaddr(str, tgt->ip_addr); 361 str += sprintf_ipaddr(str, tgt->ip_addr);
455 break; 362 break;
456 case ibft_tgt_port: 363 case ISCSI_BOOT_TGT_PORT:
457 str += sprintf(str, "%d\n", tgt->port); 364 str += sprintf(str, "%d\n", tgt->port);
458 break; 365 break;
459 case ibft_tgt_lun: 366 case ISCSI_BOOT_TGT_LUN:
460 for (i = 0; i < 8; i++) 367 for (i = 0; i < 8; i++)
461 str += sprintf(str, "%x", (u8)tgt->lun[i]); 368 str += sprintf(str, "%x", (u8)tgt->lun[i]);
462 str += sprintf(str, "\n"); 369 str += sprintf(str, "\n");
463 break; 370 break;
464 case ibft_tgt_nic_assoc: 371 case ISCSI_BOOT_TGT_NIC_ASSOC:
465 str += sprintf(str, "%d\n", tgt->nic_assoc); 372 str += sprintf(str, "%d\n", tgt->nic_assoc);
466 break; 373 break;
467 case ibft_tgt_chap_type: 374 case ISCSI_BOOT_TGT_CHAP_TYPE:
468 str += sprintf(str, "%d\n", tgt->chap_type); 375 str += sprintf(str, "%d\n", tgt->chap_type);
469 break; 376 break;
470 case ibft_tgt_name: 377 case ISCSI_BOOT_TGT_NAME:
471 str += sprintf_string(str, tgt->tgt_name_len, 378 str += sprintf_string(str, tgt->tgt_name_len,
472 (char *)ibft_loc + tgt->tgt_name_off); 379 (char *)ibft_loc + tgt->tgt_name_off);
473 break; 380 break;
474 case ibft_tgt_chap_name: 381 case ISCSI_BOOT_TGT_CHAP_NAME:
475 str += sprintf_string(str, tgt->chap_name_len, 382 str += sprintf_string(str, tgt->chap_name_len,
476 (char *)ibft_loc + tgt->chap_name_off); 383 (char *)ibft_loc + tgt->chap_name_off);
477 break; 384 break;
478 case ibft_tgt_chap_secret: 385 case ISCSI_BOOT_TGT_CHAP_SECRET:
479 str += sprintf_string(str, tgt->chap_secret_len, 386 str += sprintf_string(str, tgt->chap_secret_len,
480 (char *)ibft_loc + tgt->chap_secret_off); 387 (char *)ibft_loc + tgt->chap_secret_off);
481 break; 388 break;
482 case ibft_tgt_rev_chap_name: 389 case ISCSI_BOOT_TGT_REV_CHAP_NAME:
483 str += sprintf_string(str, tgt->rev_chap_name_len, 390 str += sprintf_string(str, tgt->rev_chap_name_len,
484 (char *)ibft_loc + 391 (char *)ibft_loc +
485 tgt->rev_chap_name_off); 392 tgt->rev_chap_name_off);
486 break; 393 break;
487 case ibft_tgt_rev_chap_secret: 394 case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
488 str += sprintf_string(str, tgt->rev_chap_secret_len, 395 str += sprintf_string(str, tgt->rev_chap_secret_len,
489 (char *)ibft_loc + 396 (char *)ibft_loc +
490 tgt->rev_chap_secret_off); 397 tgt->rev_chap_secret_off);
@@ -496,52 +403,19 @@ static ssize_t ibft_attr_show_target(struct ibft_kobject *entry,
496 return str - buf; 403 return str - buf;
497} 404}
498 405
499/*
500 * The routine called for all sysfs attributes.
501 */
502static ssize_t ibft_show_attribute(struct kobject *kobj,
503 struct attribute *attr,
504 char *buf)
505{
506 struct ibft_kobject *dev =
507 container_of(kobj, struct ibft_kobject, kobj);
508 struct ibft_attribute *ibft_attr =
509 container_of(attr, struct ibft_attribute, attr);
510 ssize_t ret = -EIO;
511 char *str = buf;
512
513 if (!capable(CAP_SYS_ADMIN))
514 return -EACCES;
515
516 if (ibft_attr->show)
517 ret = ibft_attr->show(dev, ibft_attr, str);
518
519 return ret;
520}
521
522static const struct sysfs_ops ibft_attr_ops = {
523 .show = ibft_show_attribute,
524};
525
526static struct kobj_type ibft_ktype = {
527 .release = ibft_release,
528 .sysfs_ops = &ibft_attr_ops,
529};
530
531static struct kset *ibft_kset;
532
533static int __init ibft_check_device(void) 406static int __init ibft_check_device(void)
534{ 407{
535 int len; 408 int len;
536 u8 *pos; 409 u8 *pos;
537 u8 csum = 0; 410 u8 csum = 0;
538 411
539 len = ibft_addr->length; 412 len = ibft_addr->header.length;
540 413
541 /* Sanity checking of iBFT. */ 414 /* Sanity checking of iBFT. */
542 if (ibft_addr->revision != 1) { 415 if (ibft_addr->header.revision != 1) {
543 printk(KERN_ERR "iBFT module supports only revision 1, " \ 416 printk(KERN_ERR "iBFT module supports only revision 1, " \
544 "while this is %d.\n", ibft_addr->revision); 417 "while this is %d.\n",
418 ibft_addr->header.revision);
545 return -ENOENT; 419 return -ENOENT;
546 } 420 }
547 for (pos = (u8 *)ibft_addr; pos < (u8 *)ibft_addr + len; pos++) 421 for (pos = (u8 *)ibft_addr; pos < (u8 *)ibft_addr + len; pos++)
@@ -556,12 +430,149 @@ static int __init ibft_check_device(void)
556} 430}
557 431
558/* 432/*
433 * Helper routiners to check to determine if the entry is valid
434 * in the proper iBFT structure.
435 */
436static mode_t ibft_check_nic_for(void *data, int type)
437{
438 struct ibft_kobject *entry = data;
439 struct ibft_nic *nic = entry->nic;
440 mode_t rc = 0;
441
442 switch (type) {
443 case ISCSI_BOOT_ETH_INDEX:
444 case ISCSI_BOOT_ETH_FLAGS:
445 rc = S_IRUGO;
446 break;
447 case ISCSI_BOOT_ETH_IP_ADDR:
448 if (memcmp(nic->ip_addr, nulls, sizeof(nic->ip_addr)))
449 rc = S_IRUGO;
450 break;
451 case ISCSI_BOOT_ETH_SUBNET_MASK:
452 if (nic->subnet_mask_prefix)
453 rc = S_IRUGO;
454 break;
455 case ISCSI_BOOT_ETH_ORIGIN:
456 rc = S_IRUGO;
457 break;
458 case ISCSI_BOOT_ETH_GATEWAY:
459 if (memcmp(nic->gateway, nulls, sizeof(nic->gateway)))
460 rc = S_IRUGO;
461 break;
462 case ISCSI_BOOT_ETH_PRIMARY_DNS:
463 if (memcmp(nic->primary_dns, nulls,
464 sizeof(nic->primary_dns)))
465 rc = S_IRUGO;
466 break;
467 case ISCSI_BOOT_ETH_SECONDARY_DNS:
468 if (memcmp(nic->secondary_dns, nulls,
469 sizeof(nic->secondary_dns)))
470 rc = S_IRUGO;
471 break;
472 case ISCSI_BOOT_ETH_DHCP:
473 if (memcmp(nic->dhcp, nulls, sizeof(nic->dhcp)))
474 rc = S_IRUGO;
475 break;
476 case ISCSI_BOOT_ETH_VLAN:
477 case ISCSI_BOOT_ETH_MAC:
478 rc = S_IRUGO;
479 break;
480 case ISCSI_BOOT_ETH_HOSTNAME:
481 if (nic->hostname_off)
482 rc = S_IRUGO;
483 break;
484 default:
485 break;
486 }
487
488 return rc;
489}
490
491static mode_t __init ibft_check_tgt_for(void *data, int type)
492{
493 struct ibft_kobject *entry = data;
494 struct ibft_tgt *tgt = entry->tgt;
495 mode_t rc = 0;
496
497 switch (type) {
498 case ISCSI_BOOT_TGT_INDEX:
499 case ISCSI_BOOT_TGT_FLAGS:
500 case ISCSI_BOOT_TGT_IP_ADDR:
501 case ISCSI_BOOT_TGT_PORT:
502 case ISCSI_BOOT_TGT_LUN:
503 case ISCSI_BOOT_TGT_NIC_ASSOC:
504 case ISCSI_BOOT_TGT_CHAP_TYPE:
505 rc = S_IRUGO;
506 case ISCSI_BOOT_TGT_NAME:
507 if (tgt->tgt_name_len)
508 rc = S_IRUGO;
509 break;
510 case ISCSI_BOOT_TGT_CHAP_NAME:
511 case ISCSI_BOOT_TGT_CHAP_SECRET:
512 if (tgt->chap_name_len)
513 rc = S_IRUGO;
514 break;
515 case ISCSI_BOOT_TGT_REV_CHAP_NAME:
516 case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
517 if (tgt->rev_chap_name_len)
518 rc = S_IRUGO;
519 break;
520 default:
521 break;
522 }
523
524 return rc;
525}
526
527static mode_t __init ibft_check_initiator_for(void *data, int type)
528{
529 struct ibft_kobject *entry = data;
530 struct ibft_initiator *init = entry->initiator;
531 mode_t rc = 0;
532
533 switch (type) {
534 case ISCSI_BOOT_INI_INDEX:
535 case ISCSI_BOOT_INI_FLAGS:
536 rc = S_IRUGO;
537 break;
538 case ISCSI_BOOT_INI_ISNS_SERVER:
539 if (memcmp(init->isns_server, nulls,
540 sizeof(init->isns_server)))
541 rc = S_IRUGO;
542 break;
543 case ISCSI_BOOT_INI_SLP_SERVER:
544 if (memcmp(init->slp_server, nulls,
545 sizeof(init->slp_server)))
546 rc = S_IRUGO;
547 break;
548 case ISCSI_BOOT_INI_PRI_RADIUS_SERVER:
549 if (memcmp(init->pri_radius_server, nulls,
550 sizeof(init->pri_radius_server)))
551 rc = S_IRUGO;
552 break;
553 case ISCSI_BOOT_INI_SEC_RADIUS_SERVER:
554 if (memcmp(init->sec_radius_server, nulls,
555 sizeof(init->sec_radius_server)))
556 rc = S_IRUGO;
557 break;
558 case ISCSI_BOOT_INI_INITIATOR_NAME:
559 if (init->initiator_name_len)
560 rc = S_IRUGO;
561 break;
562 default:
563 break;
564 }
565
566 return rc;
567}
568
569/*
559 * Helper function for ibft_register_kobjects. 570 * Helper function for ibft_register_kobjects.
560 */ 571 */
561static int __init ibft_create_kobject(struct ibft_table_header *header, 572static int __init ibft_create_kobject(struct acpi_table_ibft *header,
562 struct ibft_hdr *hdr, 573 struct ibft_hdr *hdr)
563 struct list_head *list)
564{ 574{
575 struct iscsi_boot_kobj *boot_kobj = NULL;
565 struct ibft_kobject *ibft_kobj = NULL; 576 struct ibft_kobject *ibft_kobj = NULL;
566 struct ibft_nic *nic = (struct ibft_nic *)hdr; 577 struct ibft_nic *nic = (struct ibft_nic *)hdr;
567 struct pci_dev *pci_dev; 578 struct pci_dev *pci_dev;
@@ -578,14 +589,47 @@ static int __init ibft_create_kobject(struct ibft_table_header *header,
578 case id_initiator: 589 case id_initiator:
579 rc = ibft_verify_hdr("initiator", hdr, id_initiator, 590 rc = ibft_verify_hdr("initiator", hdr, id_initiator,
580 sizeof(*ibft_kobj->initiator)); 591 sizeof(*ibft_kobj->initiator));
592 if (rc)
593 break;
594
595 boot_kobj = iscsi_boot_create_initiator(boot_kset, hdr->index,
596 ibft_kobj,
597 ibft_attr_show_initiator,
598 ibft_check_initiator_for);
599 if (!boot_kobj) {
600 rc = -ENOMEM;
601 goto free_ibft_obj;
602 }
581 break; 603 break;
582 case id_nic: 604 case id_nic:
583 rc = ibft_verify_hdr("ethernet", hdr, id_nic, 605 rc = ibft_verify_hdr("ethernet", hdr, id_nic,
584 sizeof(*ibft_kobj->nic)); 606 sizeof(*ibft_kobj->nic));
607 if (rc)
608 break;
609
610 boot_kobj = iscsi_boot_create_ethernet(boot_kset, hdr->index,
611 ibft_kobj,
612 ibft_attr_show_nic,
613 ibft_check_nic_for);
614 if (!boot_kobj) {
615 rc = -ENOMEM;
616 goto free_ibft_obj;
617 }
585 break; 618 break;
586 case id_target: 619 case id_target:
587 rc = ibft_verify_hdr("target", hdr, id_target, 620 rc = ibft_verify_hdr("target", hdr, id_target,
588 sizeof(*ibft_kobj->tgt)); 621 sizeof(*ibft_kobj->tgt));
622 if (rc)
623 break;
624
625 boot_kobj = iscsi_boot_create_target(boot_kset, hdr->index,
626 ibft_kobj,
627 ibft_attr_show_target,
628 ibft_check_tgt_for);
629 if (!boot_kobj) {
630 rc = -ENOMEM;
631 goto free_ibft_obj;
632 }
589 break; 633 break;
590 case id_reserved: 634 case id_reserved:
591 case id_control: 635 case id_control:
@@ -596,29 +640,17 @@ static int __init ibft_create_kobject(struct ibft_table_header *header,
596 default: 640 default:
597 printk(KERN_ERR "iBFT has unknown structure type (%d). " \ 641 printk(KERN_ERR "iBFT has unknown structure type (%d). " \
598 "Report this bug to %.6s!\n", hdr->id, 642 "Report this bug to %.6s!\n", hdr->id,
599 header->oem_id); 643 header->header.oem_id);
600 rc = 1; 644 rc = 1;
601 break; 645 break;
602 } 646 }
603 647
604 if (rc) { 648 if (rc) {
605 /* Skip adding this kobject, but exit with non-fatal error. */ 649 /* Skip adding this kobject, but exit with non-fatal error. */
606 kfree(ibft_kobj); 650 rc = 0;
607 goto out_invalid_struct; 651 goto free_ibft_obj;
608 } 652 }
609 653
610 ibft_kobj->kobj.kset = ibft_kset;
611
612 rc = kobject_init_and_add(&ibft_kobj->kobj, &ibft_ktype,
613 NULL, ibft_id_names[hdr->id], hdr->index);
614
615 if (rc) {
616 kfree(ibft_kobj);
617 goto out;
618 }
619
620 kobject_uevent(&ibft_kobj->kobj, KOBJ_ADD);
621
622 if (hdr->id == id_nic) { 654 if (hdr->id == id_nic) {
623 /* 655 /*
624 * We don't search for the device in other domains than 656 * We don't search for the device in other domains than
@@ -629,19 +661,16 @@ static int __init ibft_create_kobject(struct ibft_table_header *header,
629 pci_dev = pci_get_bus_and_slot((nic->pci_bdf & 0xff00) >> 8, 661 pci_dev = pci_get_bus_and_slot((nic->pci_bdf & 0xff00) >> 8,
630 (nic->pci_bdf & 0xff)); 662 (nic->pci_bdf & 0xff));
631 if (pci_dev) { 663 if (pci_dev) {
632 rc = sysfs_create_link(&ibft_kobj->kobj, 664 rc = sysfs_create_link(&boot_kobj->kobj,
633 &pci_dev->dev.kobj, "device"); 665 &pci_dev->dev.kobj, "device");
634 pci_dev_put(pci_dev); 666 pci_dev_put(pci_dev);
635 } 667 }
636 } 668 }
669 return 0;
637 670
638 /* Nothing broke so lets add it to the list. */ 671free_ibft_obj:
639 list_add_tail(&ibft_kobj->node, list); 672 kfree(ibft_kobj);
640out:
641 return rc; 673 return rc;
642out_invalid_struct:
643 /* Unsupported structs are skipped. */
644 return 0;
645} 674}
646 675
647/* 676/*
@@ -649,8 +678,7 @@ out_invalid_struct:
649 * found add them on the passed-in list. We do not support the other 678 * found add them on the passed-in list. We do not support the other
650 * fields at this point, so they are skipped. 679 * fields at this point, so they are skipped.
651 */ 680 */
652static int __init ibft_register_kobjects(struct ibft_table_header *header, 681static int __init ibft_register_kobjects(struct acpi_table_ibft *header)
653 struct list_head *list)
654{ 682{
655 struct ibft_control *control = NULL; 683 struct ibft_control *control = NULL;
656 void *ptr, *end; 684 void *ptr, *end;
@@ -660,7 +688,7 @@ static int __init ibft_register_kobjects(struct ibft_table_header *header,
660 688
661 control = (void *)header + sizeof(*header); 689 control = (void *)header + sizeof(*header);
662 end = (void *)control + control->hdr.length; 690 end = (void *)control + control->hdr.length;
663 eot_offset = (void *)header + header->length - (void *)control; 691 eot_offset = (void *)header + header->header.length - (void *)control;
664 rc = ibft_verify_hdr("control", (struct ibft_hdr *)control, id_control, 692 rc = ibft_verify_hdr("control", (struct ibft_hdr *)control, id_control,
665 sizeof(*control)); 693 sizeof(*control));
666 694
@@ -672,10 +700,10 @@ static int __init ibft_register_kobjects(struct ibft_table_header *header,
672 } 700 }
673 for (ptr = &control->initiator_off; ptr < end; ptr += sizeof(u16)) { 701 for (ptr = &control->initiator_off; ptr < end; ptr += sizeof(u16)) {
674 offset = *(u16 *)ptr; 702 offset = *(u16 *)ptr;
675 if (offset && offset < header->length && offset < eot_offset) { 703 if (offset && offset < header->header.length &&
704 offset < eot_offset) {
676 rc = ibft_create_kobject(header, 705 rc = ibft_create_kobject(header,
677 (void *)header + offset, 706 (void *)header + offset);
678 list);
679 if (rc) 707 if (rc)
680 break; 708 break;
681 } 709 }
@@ -684,240 +712,28 @@ static int __init ibft_register_kobjects(struct ibft_table_header *header,
684 return rc; 712 return rc;
685} 713}
686 714
687static void ibft_unregister(struct list_head *attr_list, 715static void ibft_unregister(void)
688 struct list_head *kobj_list)
689{ 716{
690 struct ibft_kobject *data = NULL, *n; 717 struct iscsi_boot_kobj *boot_kobj, *tmp_kobj;
691 struct ibft_attribute *attr = NULL, *m; 718 struct ibft_kobject *ibft_kobj;
692 719
693 list_for_each_entry_safe(attr, m, attr_list, node) { 720 list_for_each_entry_safe(boot_kobj, tmp_kobj,
694 sysfs_remove_file(attr->kobj, &attr->attr); 721 &boot_kset->kobj_list, list) {
695 list_del(&attr->node); 722 ibft_kobj = boot_kobj->data;
696 kfree(attr); 723 if (ibft_kobj->hdr->id == id_nic)
724 sysfs_remove_link(&boot_kobj->kobj, "device");
697 }; 725 };
698 list_del_init(attr_list);
699
700 list_for_each_entry_safe(data, n, kobj_list, node) {
701 list_del(&data->node);
702 if (data->hdr->id == id_nic)
703 sysfs_remove_link(&data->kobj, "device");
704 kobject_put(&data->kobj);
705 };
706 list_del_init(kobj_list);
707} 726}
708 727
709static int __init ibft_create_attribute(struct ibft_kobject *kobj_data, 728static void ibft_cleanup(void)
710 int type,
711 const char *name,
712 ssize_t (*show)(struct ibft_kobject *,
713 struct ibft_attribute*,
714 char *buf),
715 struct list_head *list)
716{ 729{
717 struct ibft_attribute *attr = NULL; 730 ibft_unregister();
718 struct ibft_hdr *hdr = kobj_data->hdr; 731 iscsi_boot_destroy_kset(boot_kset);
719
720 attr = kmalloc(sizeof(*attr), GFP_KERNEL);
721 if (!attr)
722 return -ENOMEM;
723
724 attr->attr.name = name;
725 attr->attr.mode = S_IRUSR;
726
727 attr->hdr = hdr;
728 attr->show = show;
729 attr->kobj = &kobj_data->kobj;
730 attr->type = type;
731
732 list_add_tail(&attr->node, list);
733
734 return 0;
735}
736
737/*
738 * Helper routiners to check to determine if the entry is valid
739 * in the proper iBFT structure.
740 */
741static int __init ibft_check_nic_for(struct ibft_nic *nic, int entry)
742{
743 int rc = 0;
744
745 switch (entry) {
746 case ibft_eth_index:
747 case ibft_eth_flags:
748 rc = 1;
749 break;
750 case ibft_eth_ip_addr:
751 if (memcmp(nic->ip_addr, nulls, sizeof(nic->ip_addr)))
752 rc = 1;
753 break;
754 case ibft_eth_subnet_mask:
755 if (nic->subnet_mask_prefix)
756 rc = 1;
757 break;
758 case ibft_eth_origin:
759 rc = 1;
760 break;
761 case ibft_eth_gateway:
762 if (memcmp(nic->gateway, nulls, sizeof(nic->gateway)))
763 rc = 1;
764 break;
765 case ibft_eth_primary_dns:
766 if (memcmp(nic->primary_dns, nulls,
767 sizeof(nic->primary_dns)))
768 rc = 1;
769 break;
770 case ibft_eth_secondary_dns:
771 if (memcmp(nic->secondary_dns, nulls,
772 sizeof(nic->secondary_dns)))
773 rc = 1;
774 break;
775 case ibft_eth_dhcp:
776 if (memcmp(nic->dhcp, nulls, sizeof(nic->dhcp)))
777 rc = 1;
778 break;
779 case ibft_eth_vlan:
780 case ibft_eth_mac:
781 rc = 1;
782 break;
783 case ibft_eth_hostname:
784 if (nic->hostname_off)
785 rc = 1;
786 break;
787 default:
788 break;
789 }
790
791 return rc;
792} 732}
793 733
794static int __init ibft_check_tgt_for(struct ibft_tgt *tgt, int entry) 734static void __exit ibft_exit(void)
795{
796 int rc = 0;
797
798 switch (entry) {
799 case ibft_tgt_index:
800 case ibft_tgt_flags:
801 case ibft_tgt_ip_addr:
802 case ibft_tgt_port:
803 case ibft_tgt_lun:
804 case ibft_tgt_nic_assoc:
805 case ibft_tgt_chap_type:
806 rc = 1;
807 case ibft_tgt_name:
808 if (tgt->tgt_name_len)
809 rc = 1;
810 break;
811 case ibft_tgt_chap_name:
812 case ibft_tgt_chap_secret:
813 if (tgt->chap_name_len)
814 rc = 1;
815 break;
816 case ibft_tgt_rev_chap_name:
817 case ibft_tgt_rev_chap_secret:
818 if (tgt->rev_chap_name_len)
819 rc = 1;
820 break;
821 default:
822 break;
823 }
824
825 return rc;
826}
827
828static int __init ibft_check_initiator_for(struct ibft_initiator *init,
829 int entry)
830{
831 int rc = 0;
832
833 switch (entry) {
834 case ibft_init_index:
835 case ibft_init_flags:
836 rc = 1;
837 break;
838 case ibft_init_isns_server:
839 if (memcmp(init->isns_server, nulls,
840 sizeof(init->isns_server)))
841 rc = 1;
842 break;
843 case ibft_init_slp_server:
844 if (memcmp(init->slp_server, nulls,
845 sizeof(init->slp_server)))
846 rc = 1;
847 break;
848 case ibft_init_pri_radius_server:
849 if (memcmp(init->pri_radius_server, nulls,
850 sizeof(init->pri_radius_server)))
851 rc = 1;
852 break;
853 case ibft_init_sec_radius_server:
854 if (memcmp(init->sec_radius_server, nulls,
855 sizeof(init->sec_radius_server)))
856 rc = 1;
857 break;
858 case ibft_init_initiator_name:
859 if (init->initiator_name_len)
860 rc = 1;
861 break;
862 default:
863 break;
864 }
865
866 return rc;
867}
868
869/*
870 * Register the attributes for all of the kobjects.
871 */
872static int __init ibft_register_attributes(struct list_head *kobject_list,
873 struct list_head *attr_list)
874{ 735{
875 int rc = 0, i = 0; 736 ibft_cleanup();
876 struct ibft_kobject *data = NULL;
877 struct ibft_attribute *attr = NULL, *m;
878
879 list_for_each_entry(data, kobject_list, node) {
880 switch (data->hdr->id) {
881 case id_nic:
882 for (i = 0; i < ibft_eth_end_marker && !rc; i++)
883 if (ibft_check_nic_for(data->nic, i))
884 rc = ibft_create_attribute(data, i,
885 ibft_eth_properties[i],
886 ibft_attr_show_nic, attr_list);
887 break;
888 case id_target:
889 for (i = 0; i < ibft_tgt_end_marker && !rc; i++)
890 if (ibft_check_tgt_for(data->tgt, i))
891 rc = ibft_create_attribute(data, i,
892 ibft_tgt_properties[i],
893 ibft_attr_show_target,
894 attr_list);
895 break;
896 case id_initiator:
897 for (i = 0; i < ibft_init_end_marker && !rc; i++)
898 if (ibft_check_initiator_for(
899 data->initiator, i))
900 rc = ibft_create_attribute(data, i,
901 ibft_initiator_properties[i],
902 ibft_attr_show_initiator,
903 attr_list);
904 break;
905 default:
906 break;
907 }
908 if (rc)
909 break;
910 }
911 list_for_each_entry_safe(attr, m, attr_list, node) {
912 rc = sysfs_create_file(attr->kobj, &attr->attr);
913 if (rc) {
914 list_del(&attr->node);
915 kfree(attr);
916 break;
917 }
918 }
919
920 return rc;
921} 737}
922 738
923/* 739/*
@@ -927,26 +743,20 @@ static int __init ibft_init(void)
927{ 743{
928 int rc = 0; 744 int rc = 0;
929 745
930 ibft_kset = kset_create_and_add("ibft", NULL, firmware_kobj);
931 if (!ibft_kset)
932 return -ENOMEM;
933
934 if (ibft_addr) { 746 if (ibft_addr) {
935 printk(KERN_INFO "iBFT detected at 0x%llx.\n", 747 printk(KERN_INFO "iBFT detected at 0x%llx.\n",
936 (u64)isa_virt_to_bus(ibft_addr)); 748 (u64)isa_virt_to_bus(ibft_addr));
937 749
938 rc = ibft_check_device(); 750 rc = ibft_check_device();
939 if (rc) 751 if (rc)
940 goto out_firmware_unregister; 752 return rc;
941 753
942 /* Scan the IBFT for data and register the kobjects. */ 754 boot_kset = iscsi_boot_create_kset("ibft");
943 rc = ibft_register_kobjects(ibft_addr, &ibft_kobject_list); 755 if (!boot_kset)
944 if (rc) 756 return -ENOMEM;
945 goto out_free;
946 757
947 /* Register the attributes */ 758 /* Scan the IBFT for data and register the kobjects. */
948 rc = ibft_register_attributes(&ibft_kobject_list, 759 rc = ibft_register_kobjects(ibft_addr);
949 &ibft_attr_list);
950 if (rc) 760 if (rc)
951 goto out_free; 761 goto out_free;
952 } else 762 } else
@@ -955,17 +765,9 @@ static int __init ibft_init(void)
955 return 0; 765 return 0;
956 766
957out_free: 767out_free:
958 ibft_unregister(&ibft_attr_list, &ibft_kobject_list); 768 ibft_cleanup();
959out_firmware_unregister:
960 kset_unregister(ibft_kset);
961 return rc; 769 return rc;
962} 770}
963 771
964static void __exit ibft_exit(void)
965{
966 ibft_unregister(&ibft_attr_list, &ibft_kobject_list);
967 kset_unregister(ibft_kset);
968}
969
970module_init(ibft_init); 772module_init(ibft_init);
971module_exit(ibft_exit); 773module_exit(ibft_exit);
diff --git a/drivers/firmware/iscsi_ibft_find.c b/drivers/firmware/iscsi_ibft_find.c
index d6470ef36e4a..2192456dfd68 100644
--- a/drivers/firmware/iscsi_ibft_find.c
+++ b/drivers/firmware/iscsi_ibft_find.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright 2007 Red Hat, Inc. 2 * Copyright 2007-2010 Red Hat, Inc.
3 * by Peter Jones <pjones@redhat.com> 3 * by Peter Jones <pjones@redhat.com>
4 * Copyright 2007 IBM, Inc. 4 * Copyright 2007 IBM, Inc.
5 * by Konrad Rzeszutek <konradr@linux.vnet.ibm.com> 5 * by Konrad Rzeszutek <konradr@linux.vnet.ibm.com>
@@ -22,6 +22,7 @@
22#include <linux/blkdev.h> 22#include <linux/blkdev.h>
23#include <linux/ctype.h> 23#include <linux/ctype.h>
24#include <linux/device.h> 24#include <linux/device.h>
25#include <linux/efi.h>
25#include <linux/err.h> 26#include <linux/err.h>
26#include <linux/init.h> 27#include <linux/init.h>
27#include <linux/limits.h> 28#include <linux/limits.h>
@@ -30,13 +31,15 @@
30#include <linux/stat.h> 31#include <linux/stat.h>
31#include <linux/string.h> 32#include <linux/string.h>
32#include <linux/types.h> 33#include <linux/types.h>
34#include <linux/acpi.h>
35#include <linux/iscsi_ibft.h>
33 36
34#include <asm/mmzone.h> 37#include <asm/mmzone.h>
35 38
36/* 39/*
37 * Physical location of iSCSI Boot Format Table. 40 * Physical location of iSCSI Boot Format Table.
38 */ 41 */
39struct ibft_table_header *ibft_addr; 42struct acpi_table_ibft *ibft_addr;
40EXPORT_SYMBOL_GPL(ibft_addr); 43EXPORT_SYMBOL_GPL(ibft_addr);
41 44
42#define IBFT_SIGN "iBFT" 45#define IBFT_SIGN "iBFT"
@@ -46,19 +49,20 @@ EXPORT_SYMBOL_GPL(ibft_addr);
46#define VGA_MEM 0xA0000 /* VGA buffer */ 49#define VGA_MEM 0xA0000 /* VGA buffer */
47#define VGA_SIZE 0x20000 /* 128kB */ 50#define VGA_SIZE 0x20000 /* 128kB */
48 51
52#ifdef CONFIG_ACPI
53static int __init acpi_find_ibft(struct acpi_table_header *header)
54{
55 ibft_addr = (struct acpi_table_ibft *)header;
56 return 0;
57}
58#endif /* CONFIG_ACPI */
49 59
50/* 60static int __init find_ibft_in_mem(void)
51 * Routine used to find the iSCSI Boot Format Table. The logical
52 * kernel address is set in the ibft_addr global variable.
53 */
54unsigned long __init find_ibft_region(unsigned long *sizep)
55{ 61{
56 unsigned long pos; 62 unsigned long pos;
57 unsigned int len = 0; 63 unsigned int len = 0;
58 void *virt; 64 void *virt;
59 65
60 ibft_addr = NULL;
61
62 for (pos = IBFT_START; pos < IBFT_END; pos += 16) { 66 for (pos = IBFT_START; pos < IBFT_END; pos += 16) {
63 /* The table can't be inside the VGA BIOS reserved space, 67 /* The table can't be inside the VGA BIOS reserved space,
64 * so skip that area */ 68 * so skip that area */
@@ -72,14 +76,42 @@ unsigned long __init find_ibft_region(unsigned long *sizep)
72 /* if the length of the table extends past 1M, 76 /* if the length of the table extends past 1M,
73 * the table cannot be valid. */ 77 * the table cannot be valid. */
74 if (pos + len <= (IBFT_END-1)) { 78 if (pos + len <= (IBFT_END-1)) {
75 ibft_addr = (struct ibft_table_header *)virt; 79 ibft_addr = (struct acpi_table_ibft *)virt;
76 break; 80 break;
77 } 81 }
78 } 82 }
79 } 83 }
84 return len;
85}
86/*
87 * Routine used to find the iSCSI Boot Format Table. The logical
88 * kernel address is set in the ibft_addr global variable.
89 */
90unsigned long __init find_ibft_region(unsigned long *sizep)
91{
92
93 ibft_addr = NULL;
94
95#ifdef CONFIG_ACPI
96 /*
97 * One spec says "IBFT", the other says "iBFT". We have to check
98 * for both.
99 */
100 if (!ibft_addr)
101 acpi_table_parse(ACPI_SIG_IBFT, acpi_find_ibft);
102 if (!ibft_addr)
103 acpi_table_parse(IBFT_SIGN, acpi_find_ibft);
104#endif /* CONFIG_ACPI */
105
106 /* iBFT 1.03 section 1.4.3.1 mandates that UEFI machines will
107 * only use ACPI for this */
108
109 if (!ibft_addr && !efi_enabled)
110 find_ibft_in_mem();
111
80 if (ibft_addr) { 112 if (ibft_addr) {
81 *sizep = PAGE_ALIGN(len); 113 *sizep = PAGE_ALIGN(ibft_addr->header.length);
82 return pos; 114 return (u64)isa_virt_to_bus(ibft_addr);
83 } 115 }
84 116
85 *sizep = 0; 117 *sizep = 0;
diff --git a/drivers/gpio/cs5535-gpio.c b/drivers/gpio/cs5535-gpio.c
index f73a1555e49d..e23c06893d19 100644
--- a/drivers/gpio/cs5535-gpio.c
+++ b/drivers/gpio/cs5535-gpio.c
@@ -352,6 +352,6 @@ static void __exit cs5535_gpio_exit(void)
352module_init(cs5535_gpio_init); 352module_init(cs5535_gpio_init);
353module_exit(cs5535_gpio_exit); 353module_exit(cs5535_gpio_exit);
354 354
355MODULE_AUTHOR("Andres Salomon <dilinger@collabora.co.uk>"); 355MODULE_AUTHOR("Andres Salomon <dilinger@queued.net>");
356MODULE_DESCRIPTION("AMD CS5535/CS5536 GPIO driver"); 356MODULE_DESCRIPTION("AMD CS5535/CS5536 GPIO driver");
357MODULE_LICENSE("GPL"); 357MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 3ca36542e338..6a6bd569e1f8 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -8,6 +8,7 @@
8#include <linux/debugfs.h> 8#include <linux/debugfs.h>
9#include <linux/seq_file.h> 9#include <linux/seq_file.h>
10#include <linux/gpio.h> 10#include <linux/gpio.h>
11#include <linux/of_gpio.h>
11#include <linux/idr.h> 12#include <linux/idr.h>
12#include <linux/slab.h> 13#include <linux/slab.h>
13 14
@@ -893,10 +894,12 @@ EXPORT_SYMBOL_GPL(gpio_sysfs_set_active_low);
893void gpio_unexport(unsigned gpio) 894void gpio_unexport(unsigned gpio)
894{ 895{
895 struct gpio_desc *desc; 896 struct gpio_desc *desc;
896 int status = -EINVAL; 897 int status = 0;
897 898
898 if (!gpio_is_valid(gpio)) 899 if (!gpio_is_valid(gpio)) {
900 status = -EINVAL;
899 goto done; 901 goto done;
902 }
900 903
901 mutex_lock(&sysfs_lock); 904 mutex_lock(&sysfs_lock);
902 905
@@ -911,7 +914,6 @@ void gpio_unexport(unsigned gpio)
911 clear_bit(FLAG_EXPORT, &desc->flags); 914 clear_bit(FLAG_EXPORT, &desc->flags);
912 put_device(dev); 915 put_device(dev);
913 device_unregister(dev); 916 device_unregister(dev);
914 status = 0;
915 } else 917 } else
916 status = -ENODEV; 918 status = -ENODEV;
917 } 919 }
@@ -1099,16 +1101,24 @@ int gpiochip_add(struct gpio_chip *chip)
1099 } 1101 }
1100 } 1102 }
1101 1103
1104 of_gpiochip_add(chip);
1105
1102unlock: 1106unlock:
1103 spin_unlock_irqrestore(&gpio_lock, flags); 1107 spin_unlock_irqrestore(&gpio_lock, flags);
1104 if (status == 0) 1108
1105 status = gpiochip_export(chip); 1109 if (status)
1110 goto fail;
1111
1112 status = gpiochip_export(chip);
1113 if (status)
1114 goto fail;
1115
1116 return 0;
1106fail: 1117fail:
1107 /* failures here can mean systems won't boot... */ 1118 /* failures here can mean systems won't boot... */
1108 if (status) 1119 pr_err("gpiochip_add: gpios %d..%d (%s) failed to register\n",
1109 pr_err("gpiochip_add: gpios %d..%d (%s) failed to register\n", 1120 chip->base, chip->base + chip->ngpio - 1,
1110 chip->base, chip->base + chip->ngpio - 1, 1121 chip->label ? : "generic");
1111 chip->label ? : "generic");
1112 return status; 1122 return status;
1113} 1123}
1114EXPORT_SYMBOL_GPL(gpiochip_add); 1124EXPORT_SYMBOL_GPL(gpiochip_add);
@@ -1127,6 +1137,8 @@ int gpiochip_remove(struct gpio_chip *chip)
1127 1137
1128 spin_lock_irqsave(&gpio_lock, flags); 1138 spin_lock_irqsave(&gpio_lock, flags);
1129 1139
1140 of_gpiochip_remove(chip);
1141
1130 for (id = chip->base; id < chip->base + chip->ngpio; id++) { 1142 for (id = chip->base; id < chip->base + chip->ngpio; id++) {
1131 if (test_bit(FLAG_REQUESTED, &gpio_desc[id].flags)) { 1143 if (test_bit(FLAG_REQUESTED, &gpio_desc[id].flags)) {
1132 status = -EBUSY; 1144 status = -EBUSY;
@@ -1147,6 +1159,38 @@ int gpiochip_remove(struct gpio_chip *chip)
1147} 1159}
1148EXPORT_SYMBOL_GPL(gpiochip_remove); 1160EXPORT_SYMBOL_GPL(gpiochip_remove);
1149 1161
1162/**
1163 * gpiochip_find() - iterator for locating a specific gpio_chip
1164 * @data: data to pass to match function
1165 * @callback: Callback function to check gpio_chip
1166 *
1167 * Similar to bus_find_device. It returns a reference to a gpio_chip as
1168 * determined by a user supplied @match callback. The callback should return
1169 * 0 if the device doesn't match and non-zero if it does. If the callback is
1170 * non-zero, this function will return to the caller and not iterate over any
1171 * more gpio_chips.
1172 */
1173struct gpio_chip *gpiochip_find(void *data,
1174 int (*match)(struct gpio_chip *chip, void *data))
1175{
1176 struct gpio_chip *chip = NULL;
1177 unsigned long flags;
1178 int i;
1179
1180 spin_lock_irqsave(&gpio_lock, flags);
1181 for (i = 0; i < ARCH_NR_GPIOS; i++) {
1182 if (!gpio_desc[i].chip)
1183 continue;
1184
1185 if (match(gpio_desc[i].chip, data)) {
1186 chip = gpio_desc[i].chip;
1187 break;
1188 }
1189 }
1190 spin_unlock_irqrestore(&gpio_lock, flags);
1191
1192 return chip;
1193}
1150 1194
1151/* These "optional" allocation calls help prevent drivers from stomping 1195/* These "optional" allocation calls help prevent drivers from stomping
1152 * on each other, and help provide better diagnostics in debugfs. 1196 * on each other, and help provide better diagnostics in debugfs.
diff --git a/drivers/gpio/pl061.c b/drivers/gpio/pl061.c
index ee568c8fcbd0..5005990f751f 100644
--- a/drivers/gpio/pl061.c
+++ b/drivers/gpio/pl061.c
@@ -232,7 +232,7 @@ static void pl061_irq_handler(unsigned irq, struct irq_desc *desc)
232 desc->chip->unmask(irq); 232 desc->chip->unmask(irq);
233} 233}
234 234
235static int __init pl061_probe(struct amba_device *dev, struct amba_id *id) 235static int pl061_probe(struct amba_device *dev, struct amba_id *id)
236{ 236{
237 struct pl061_platform_data *pdata; 237 struct pl061_platform_data *pdata;
238 struct pl061_gpio *chip; 238 struct pl061_gpio *chip;
@@ -333,7 +333,7 @@ free_mem:
333 return ret; 333 return ret;
334} 334}
335 335
336static struct amba_id pl061_ids[] __initdata = { 336static struct amba_id pl061_ids[] = {
337 { 337 {
338 .id = 0x00041061, 338 .id = 0x00041061,
339 .mask = 0x000fffff, 339 .mask = 0x000fffff,
diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
index b8fa65b5bfca..709690995d0d 100644
--- a/drivers/gpio/xilinx_gpio.c
+++ b/drivers/gpio/xilinx_gpio.c
@@ -161,14 +161,12 @@ static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc)
161static int __devinit xgpio_of_probe(struct device_node *np) 161static int __devinit xgpio_of_probe(struct device_node *np)
162{ 162{
163 struct xgpio_instance *chip; 163 struct xgpio_instance *chip;
164 struct of_gpio_chip *ofchip;
165 int status = 0; 164 int status = 0;
166 const u32 *tree_info; 165 const u32 *tree_info;
167 166
168 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 167 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
169 if (!chip) 168 if (!chip)
170 return -ENOMEM; 169 return -ENOMEM;
171 ofchip = &chip->mmchip.of_gc;
172 170
173 /* Update GPIO state shadow register with default value */ 171 /* Update GPIO state shadow register with default value */
174 tree_info = of_get_property(np, "xlnx,dout-default", NULL); 172 tree_info = of_get_property(np, "xlnx,dout-default", NULL);
@@ -182,21 +180,20 @@ static int __devinit xgpio_of_probe(struct device_node *np)
182 chip->gpio_dir = *tree_info; 180 chip->gpio_dir = *tree_info;
183 181
184 /* Check device node and parent device node for device width */ 182 /* Check device node and parent device node for device width */
185 ofchip->gc.ngpio = 32; /* By default assume full GPIO controller */ 183 chip->mmchip.gc.ngpio = 32; /* By default assume full GPIO controller */
186 tree_info = of_get_property(np, "xlnx,gpio-width", NULL); 184 tree_info = of_get_property(np, "xlnx,gpio-width", NULL);
187 if (!tree_info) 185 if (!tree_info)
188 tree_info = of_get_property(np->parent, 186 tree_info = of_get_property(np->parent,
189 "xlnx,gpio-width", NULL); 187 "xlnx,gpio-width", NULL);
190 if (tree_info) 188 if (tree_info)
191 ofchip->gc.ngpio = *tree_info; 189 chip->mmchip.gc.ngpio = *tree_info;
192 190
193 spin_lock_init(&chip->gpio_lock); 191 spin_lock_init(&chip->gpio_lock);
194 192
195 ofchip->gpio_cells = 2; 193 chip->mmchip.gc.direction_input = xgpio_dir_in;
196 ofchip->gc.direction_input = xgpio_dir_in; 194 chip->mmchip.gc.direction_output = xgpio_dir_out;
197 ofchip->gc.direction_output = xgpio_dir_out; 195 chip->mmchip.gc.get = xgpio_get;
198 ofchip->gc.get = xgpio_get; 196 chip->mmchip.gc.set = xgpio_set;
199 ofchip->gc.set = xgpio_set;
200 197
201 chip->mmchip.save_regs = xgpio_save_regs; 198 chip->mmchip.save_regs = xgpio_save_regs;
202 199
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 88910e5a2c77..4cab0c6397e3 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -6,7 +6,7 @@
6# 6#
7menuconfig DRM 7menuconfig DRM
8 tristate "Direct Rendering Manager (XFree86 4.1.0 and higher DRI support)" 8 tristate "Direct Rendering Manager (XFree86 4.1.0 and higher DRI support)"
9 depends on (AGP || AGP=n) && PCI && !EMULATED_CMPXCHG && MMU 9 depends on (AGP || AGP=n) && !EMULATED_CMPXCHG && MMU
10 select I2C 10 select I2C
11 select I2C_ALGOBIT 11 select I2C_ALGOBIT
12 select SLOW_WORK 12 select SLOW_WORK
@@ -17,7 +17,7 @@ menuconfig DRM
17 These modules provide support for synchronization, security, and 17 These modules provide support for synchronization, security, and
18 DMA transfers. Please see <http://dri.sourceforge.net/> for more 18 DMA transfers. Please see <http://dri.sourceforge.net/> for more
19 details. You should also select and configure AGP 19 details. You should also select and configure AGP
20 (/dev/agpgart) support. 20 (/dev/agpgart) support if it is available for your platform.
21 21
22config DRM_KMS_HELPER 22config DRM_KMS_HELPER
23 tristate 23 tristate
@@ -61,6 +61,7 @@ config DRM_RADEON
61 select DRM_KMS_HELPER 61 select DRM_KMS_HELPER
62 select DRM_TTM 62 select DRM_TTM
63 select POWER_SUPPLY 63 select POWER_SUPPLY
64 select HWMON
64 help 65 help
65 Choose this option if you have an ATI Radeon graphics card. There 66 Choose this option if you have an ATI Radeon graphics card. There
66 are both PCI and AGP versions. You don't need to choose this to 67 are both PCI and AGP versions. You don't need to choose this to
@@ -130,7 +131,7 @@ endchoice
130 131
131config DRM_MGA 132config DRM_MGA
132 tristate "Matrox g200/g400" 133 tristate "Matrox g200/g400"
133 depends on DRM 134 depends on DRM && PCI
134 select FW_LOADER 135 select FW_LOADER
135 help 136 help
136 Choose this option if you have a Matrox G200, G400 or G450 graphics 137 Choose this option if you have a Matrox G200, G400 or G450 graphics
@@ -148,14 +149,14 @@ config DRM_SIS
148 149
149config DRM_VIA 150config DRM_VIA
150 tristate "Via unichrome video cards" 151 tristate "Via unichrome video cards"
151 depends on DRM 152 depends on DRM && PCI
152 help 153 help
153 Choose this option if you have a Via unichrome or compatible video 154 Choose this option if you have a Via unichrome or compatible video
154 chipset. If M is selected the module will be called via. 155 chipset. If M is selected the module will be called via.
155 156
156config DRM_SAVAGE 157config DRM_SAVAGE
157 tristate "Savage video cards" 158 tristate "Savage video cards"
158 depends on DRM 159 depends on DRM && PCI
159 help 160 help
160 Choose this option if you have a Savage3D/4/SuperSavage/Pro/Twister 161 Choose this option if you have a Savage3D/4/SuperSavage/Pro/Twister
161 chipset. If M is selected the module will be called savage. 162 chipset. If M is selected the module will be called savage.
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index abe3f446ca48..f3a23a329f4e 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -9,9 +9,10 @@ drm-y := drm_auth.o drm_buffer.o drm_bufs.o drm_cache.o \
9 drm_drv.o drm_fops.o drm_gem.o drm_ioctl.o drm_irq.o \ 9 drm_drv.o drm_fops.o drm_gem.o drm_ioctl.o drm_irq.o \
10 drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \ 10 drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \
11 drm_agpsupport.o drm_scatter.o ati_pcigart.o drm_pci.o \ 11 drm_agpsupport.o drm_scatter.o ati_pcigart.o drm_pci.o \
12 drm_sysfs.o drm_hashtab.o drm_sman.o drm_mm.o \ 12 drm_platform.o drm_sysfs.o drm_hashtab.o drm_sman.o drm_mm.o \
13 drm_crtc.o drm_modes.o drm_edid.o \ 13 drm_crtc.o drm_modes.o drm_edid.o \
14 drm_info.o drm_debugfs.o drm_encoder_slave.o 14 drm_info.o drm_debugfs.o drm_encoder_slave.o \
15 drm_trace_points.o drm_global.o
15 16
16drm-$(CONFIG_COMPAT) += drm_ioc32.o 17drm-$(CONFIG_COMPAT) += drm_ioc32.o
17 18
@@ -19,6 +20,8 @@ drm_kms_helper-y := drm_fb_helper.o drm_crtc_helper.o drm_dp_i2c_helper.o
19 20
20obj-$(CONFIG_DRM_KMS_HELPER) += drm_kms_helper.o 21obj-$(CONFIG_DRM_KMS_HELPER) += drm_kms_helper.o
21 22
23CFLAGS_drm_trace_points.o := -I$(src)
24
22obj-$(CONFIG_DRM) += drm.o 25obj-$(CONFIG_DRM) += drm.o
23obj-$(CONFIG_DRM_TTM) += ttm/ 26obj-$(CONFIG_DRM_TTM) += ttm/
24obj-$(CONFIG_DRM_TDFX) += tdfx/ 27obj-$(CONFIG_DRM_TDFX) += tdfx/
diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c
index 2092e7bb788f..a5c9ce93bbcb 100644
--- a/drivers/gpu/drm/drm_bufs.c
+++ b/drivers/gpu/drm/drm_bufs.c
@@ -39,19 +39,6 @@
39#include <asm/shmparam.h> 39#include <asm/shmparam.h>
40#include "drmP.h" 40#include "drmP.h"
41 41
42resource_size_t drm_get_resource_start(struct drm_device *dev, unsigned int resource)
43{
44 return pci_resource_start(dev->pdev, resource);
45}
46EXPORT_SYMBOL(drm_get_resource_start);
47
48resource_size_t drm_get_resource_len(struct drm_device *dev, unsigned int resource)
49{
50 return pci_resource_len(dev->pdev, resource);
51}
52
53EXPORT_SYMBOL(drm_get_resource_len);
54
55static struct drm_map_list *drm_find_matching_map(struct drm_device *dev, 42static struct drm_map_list *drm_find_matching_map(struct drm_device *dev,
56 struct drm_local_map *map) 43 struct drm_local_map *map)
57{ 44{
@@ -189,7 +176,7 @@ static int drm_addmap_core(struct drm_device * dev, resource_size_t offset,
189 switch (map->type) { 176 switch (map->type) {
190 case _DRM_REGISTERS: 177 case _DRM_REGISTERS:
191 case _DRM_FRAME_BUFFER: 178 case _DRM_FRAME_BUFFER:
192#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) && !defined(__powerpc64__) && !defined(__x86_64__) 179#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) && !defined(__powerpc64__) && !defined(__x86_64__) && !defined(__arm__)
193 if (map->offset + (map->size-1) < map->offset || 180 if (map->offset + (map->size-1) < map->offset ||
194 map->offset < virt_to_phys(high_memory)) { 181 map->offset < virt_to_phys(high_memory)) {
195 kfree(map); 182 kfree(map);
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 57cea01c4ffb..4c68f76993d8 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -80,6 +80,7 @@ static struct drm_prop_enum_list drm_dithering_mode_enum_list[] =
80{ 80{
81 { DRM_MODE_DITHERING_OFF, "Off" }, 81 { DRM_MODE_DITHERING_OFF, "Off" },
82 { DRM_MODE_DITHERING_ON, "On" }, 82 { DRM_MODE_DITHERING_ON, "On" },
83 { DRM_MODE_DITHERING_AUTO, "Automatic" },
83}; 84};
84 85
85/* 86/*
@@ -1126,7 +1127,7 @@ int drm_mode_getresources(struct drm_device *dev, void *data,
1126 if (file_priv->master->minor->type == DRM_MINOR_CONTROL) { 1127 if (file_priv->master->minor->type == DRM_MINOR_CONTROL) {
1127 list_for_each_entry(crtc, &dev->mode_config.crtc_list, 1128 list_for_each_entry(crtc, &dev->mode_config.crtc_list,
1128 head) { 1129 head) {
1129 DRM_DEBUG_KMS("CRTC ID is %d\n", crtc->base.id); 1130 DRM_DEBUG_KMS("[CRTC:%d]\n", crtc->base.id);
1130 if (put_user(crtc->base.id, crtc_id + copied)) { 1131 if (put_user(crtc->base.id, crtc_id + copied)) {
1131 ret = -EFAULT; 1132 ret = -EFAULT;
1132 goto out; 1133 goto out;
@@ -1154,8 +1155,8 @@ int drm_mode_getresources(struct drm_device *dev, void *data,
1154 list_for_each_entry(encoder, 1155 list_for_each_entry(encoder,
1155 &dev->mode_config.encoder_list, 1156 &dev->mode_config.encoder_list,
1156 head) { 1157 head) {
1157 DRM_DEBUG_KMS("ENCODER ID is %d\n", 1158 DRM_DEBUG_KMS("[ENCODER:%d:%s]\n", encoder->base.id,
1158 encoder->base.id); 1159 drm_get_encoder_name(encoder));
1159 if (put_user(encoder->base.id, encoder_id + 1160 if (put_user(encoder->base.id, encoder_id +
1160 copied)) { 1161 copied)) {
1161 ret = -EFAULT; 1162 ret = -EFAULT;
@@ -1185,8 +1186,9 @@ int drm_mode_getresources(struct drm_device *dev, void *data,
1185 list_for_each_entry(connector, 1186 list_for_each_entry(connector,
1186 &dev->mode_config.connector_list, 1187 &dev->mode_config.connector_list,
1187 head) { 1188 head) {
1188 DRM_DEBUG_KMS("CONNECTOR ID is %d\n", 1189 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1189 connector->base.id); 1190 connector->base.id,
1191 drm_get_connector_name(connector));
1190 if (put_user(connector->base.id, 1192 if (put_user(connector->base.id,
1191 connector_id + copied)) { 1193 connector_id + copied)) {
1192 ret = -EFAULT; 1194 ret = -EFAULT;
@@ -1209,7 +1211,7 @@ int drm_mode_getresources(struct drm_device *dev, void *data,
1209 } 1211 }
1210 card_res->count_connectors = connector_count; 1212 card_res->count_connectors = connector_count;
1211 1213
1212 DRM_DEBUG_KMS("Counted %d %d %d\n", card_res->count_crtcs, 1214 DRM_DEBUG_KMS("CRTC[%d] CONNECTORS[%d] ENCODERS[%d]\n", card_res->count_crtcs,
1213 card_res->count_connectors, card_res->count_encoders); 1215 card_res->count_connectors, card_res->count_encoders);
1214 1216
1215out: 1217out:
@@ -1312,7 +1314,7 @@ int drm_mode_getconnector(struct drm_device *dev, void *data,
1312 1314
1313 memset(&u_mode, 0, sizeof(struct drm_mode_modeinfo)); 1315 memset(&u_mode, 0, sizeof(struct drm_mode_modeinfo));
1314 1316
1315 DRM_DEBUG_KMS("connector id %d:\n", out_resp->connector_id); 1317 DRM_DEBUG_KMS("[CONNECTOR:%d:?]\n", out_resp->connector_id);
1316 1318
1317 mutex_lock(&dev->mode_config.mutex); 1319 mutex_lock(&dev->mode_config.mutex);
1318 1320
@@ -1493,6 +1495,7 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
1493 goto out; 1495 goto out;
1494 } 1496 }
1495 crtc = obj_to_crtc(obj); 1497 crtc = obj_to_crtc(obj);
1498 DRM_DEBUG_KMS("[CRTC:%d]\n", crtc->base.id);
1496 1499
1497 if (crtc_req->mode_valid) { 1500 if (crtc_req->mode_valid) {
1498 /* If we have a mode we need a framebuffer. */ 1501 /* If we have a mode we need a framebuffer. */
@@ -1569,6 +1572,9 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
1569 goto out; 1572 goto out;
1570 } 1573 }
1571 connector = obj_to_connector(obj); 1574 connector = obj_to_connector(obj);
1575 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1576 connector->base.id,
1577 drm_get_connector_name(connector));
1572 1578
1573 connector_set[i] = connector; 1579 connector_set[i] = connector;
1574 } 1580 }
@@ -1684,6 +1690,7 @@ int drm_mode_addfb(struct drm_device *dev,
1684 1690
1685 r->fb_id = fb->base.id; 1691 r->fb_id = fb->base.id;
1686 list_add(&fb->filp_head, &file_priv->fbs); 1692 list_add(&fb->filp_head, &file_priv->fbs);
1693 DRM_DEBUG_KMS("[FB:%d]\n", fb->base.id);
1687 1694
1688out: 1695out:
1689 mutex_unlock(&dev->mode_config.mutex); 1696 mutex_unlock(&dev->mode_config.mutex);
@@ -2610,6 +2617,15 @@ int drm_mode_page_flip_ioctl(struct drm_device *dev,
2610 goto out; 2617 goto out;
2611 crtc = obj_to_crtc(obj); 2618 crtc = obj_to_crtc(obj);
2612 2619
2620 if (crtc->fb == NULL) {
2621 /* The framebuffer is currently unbound, presumably
2622 * due to a hotplug event, that userspace has not
2623 * yet discovered.
2624 */
2625 ret = -EBUSY;
2626 goto out;
2627 }
2628
2613 if (crtc->funcs->page_flip == NULL) 2629 if (crtc->funcs->page_flip == NULL)
2614 goto out; 2630 goto out;
2615 2631
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index 9b2a54117c91..11fe9c870d17 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -86,7 +86,8 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
86 int count = 0; 86 int count = 0;
87 int mode_flags = 0; 87 int mode_flags = 0;
88 88
89 DRM_DEBUG_KMS("%s\n", drm_get_connector_name(connector)); 89 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id,
90 drm_get_connector_name(connector));
90 /* set all modes to the unverified state */ 91 /* set all modes to the unverified state */
91 list_for_each_entry_safe(mode, t, &connector->modes, head) 92 list_for_each_entry_safe(mode, t, &connector->modes, head)
92 mode->status = MODE_UNVERIFIED; 93 mode->status = MODE_UNVERIFIED;
@@ -102,8 +103,8 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
102 connector->status = connector->funcs->detect(connector); 103 connector->status = connector->funcs->detect(connector);
103 104
104 if (connector->status == connector_status_disconnected) { 105 if (connector->status == connector_status_disconnected) {
105 DRM_DEBUG_KMS("%s is disconnected\n", 106 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n",
106 drm_get_connector_name(connector)); 107 connector->base.id, drm_get_connector_name(connector));
107 drm_mode_connector_update_edid_property(connector, NULL); 108 drm_mode_connector_update_edid_property(connector, NULL);
108 goto prune; 109 goto prune;
109 } 110 }
@@ -141,8 +142,8 @@ prune:
141 142
142 drm_mode_sort(&connector->modes); 143 drm_mode_sort(&connector->modes);
143 144
144 DRM_DEBUG_KMS("Probed modes for %s\n", 145 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] probed modes :\n", connector->base.id,
145 drm_get_connector_name(connector)); 146 drm_get_connector_name(connector));
146 list_for_each_entry_safe(mode, t, &connector->modes, head) { 147 list_for_each_entry_safe(mode, t, &connector->modes, head) {
147 mode->vrefresh = drm_mode_vrefresh(mode); 148 mode->vrefresh = drm_mode_vrefresh(mode);
148 149
@@ -201,6 +202,17 @@ bool drm_helper_crtc_in_use(struct drm_crtc *crtc)
201} 202}
202EXPORT_SYMBOL(drm_helper_crtc_in_use); 203EXPORT_SYMBOL(drm_helper_crtc_in_use);
203 204
205static void
206drm_encoder_disable(struct drm_encoder *encoder)
207{
208 struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
209
210 if (encoder_funcs->disable)
211 (*encoder_funcs->disable)(encoder);
212 else
213 (*encoder_funcs->dpms)(encoder, DRM_MODE_DPMS_OFF);
214}
215
204/** 216/**
205 * drm_helper_disable_unused_functions - disable unused objects 217 * drm_helper_disable_unused_functions - disable unused objects
206 * @dev: DRM device 218 * @dev: DRM device
@@ -215,7 +227,6 @@ void drm_helper_disable_unused_functions(struct drm_device *dev)
215{ 227{
216 struct drm_encoder *encoder; 228 struct drm_encoder *encoder;
217 struct drm_connector *connector; 229 struct drm_connector *connector;
218 struct drm_encoder_helper_funcs *encoder_funcs;
219 struct drm_crtc *crtc; 230 struct drm_crtc *crtc;
220 231
221 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 232 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
@@ -226,12 +237,8 @@ void drm_helper_disable_unused_functions(struct drm_device *dev)
226 } 237 }
227 238
228 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 239 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
229 encoder_funcs = encoder->helper_private;
230 if (!drm_helper_encoder_in_use(encoder)) { 240 if (!drm_helper_encoder_in_use(encoder)) {
231 if (encoder_funcs->disable) 241 drm_encoder_disable(encoder);
232 (*encoder_funcs->disable)(encoder);
233 else
234 (*encoder_funcs->dpms)(encoder, DRM_MODE_DPMS_OFF);
235 /* disconnector encoder from any connector */ 242 /* disconnector encoder from any connector */
236 encoder->crtc = NULL; 243 encoder->crtc = NULL;
237 } 244 }
@@ -241,7 +248,10 @@ void drm_helper_disable_unused_functions(struct drm_device *dev)
241 struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; 248 struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
242 crtc->enabled = drm_helper_crtc_in_use(crtc); 249 crtc->enabled = drm_helper_crtc_in_use(crtc);
243 if (!crtc->enabled) { 250 if (!crtc->enabled) {
244 crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF); 251 if (crtc_funcs->disable)
252 (*crtc_funcs->disable)(crtc);
253 else
254 (*crtc_funcs->dpms)(crtc, DRM_MODE_DPMS_OFF);
245 crtc->fb = NULL; 255 crtc->fb = NULL;
246 } 256 }
247 } 257 }
@@ -292,11 +302,11 @@ drm_crtc_prepare_encoders(struct drm_device *dev)
292 encoder_funcs = encoder->helper_private; 302 encoder_funcs = encoder->helper_private;
293 /* Disable unused encoders */ 303 /* Disable unused encoders */
294 if (encoder->crtc == NULL) 304 if (encoder->crtc == NULL)
295 (*encoder_funcs->dpms)(encoder, DRM_MODE_DPMS_OFF); 305 drm_encoder_disable(encoder);
296 /* Disable encoders whose CRTC is about to change */ 306 /* Disable encoders whose CRTC is about to change */
297 if (encoder_funcs->get_crtc && 307 if (encoder_funcs->get_crtc &&
298 encoder->crtc != (*encoder_funcs->get_crtc)(encoder)) 308 encoder->crtc != (*encoder_funcs->get_crtc)(encoder))
299 (*encoder_funcs->dpms)(encoder, DRM_MODE_DPMS_OFF); 309 drm_encoder_disable(encoder);
300 } 310 }
301} 311}
302 312
@@ -365,6 +375,7 @@ bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,
365 if (!(ret = crtc_funcs->mode_fixup(crtc, mode, adjusted_mode))) { 375 if (!(ret = crtc_funcs->mode_fixup(crtc, mode, adjusted_mode))) {
366 goto done; 376 goto done;
367 } 377 }
378 DRM_DEBUG_KMS("[CRTC:%d]\n", crtc->base.id);
368 379
369 /* Prepare the encoders and CRTCs before setting the mode. */ 380 /* Prepare the encoders and CRTCs before setting the mode. */
370 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 381 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
@@ -392,8 +403,9 @@ bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,
392 if (encoder->crtc != crtc) 403 if (encoder->crtc != crtc)
393 continue; 404 continue;
394 405
395 DRM_DEBUG("%s: set mode %s %x\n", drm_get_encoder_name(encoder), 406 DRM_DEBUG_KMS("[ENCODER:%d:%s] set [MODE:%d:%s]\n",
396 mode->name, mode->base.id); 407 encoder->base.id, drm_get_encoder_name(encoder),
408 mode->base.id, mode->name);
397 encoder_funcs = encoder->helper_private; 409 encoder_funcs = encoder->helper_private;
398 encoder_funcs->mode_set(encoder, mode, adjusted_mode); 410 encoder_funcs->mode_set(encoder, mode, adjusted_mode);
399 } 411 }
@@ -469,10 +481,15 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
469 481
470 crtc_funcs = set->crtc->helper_private; 482 crtc_funcs = set->crtc->helper_private;
471 483
472 DRM_DEBUG_KMS("crtc: %p %d fb: %p connectors: %p num_connectors:" 484 if (set->fb) {
473 " %d (x, y) (%i, %i)\n", 485 DRM_DEBUG_KMS("[CRTC:%d] [FB:%d] #connectors=%d (x y) (%i %i)\n",
474 set->crtc, set->crtc->base.id, set->fb, set->connectors, 486 set->crtc->base.id, set->fb->base.id,
475 (int)set->num_connectors, set->x, set->y); 487 (int)set->num_connectors, set->x, set->y);
488 } else {
489 DRM_DEBUG_KMS("[CRTC:%d] [NOFB] #connectors=%d (x y) (%i %i)\n",
490 set->crtc->base.id, (int)set->num_connectors,
491 set->x, set->y);
492 }
476 493
477 dev = set->crtc->dev; 494 dev = set->crtc->dev;
478 495
@@ -601,8 +618,14 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
601 mode_changed = true; 618 mode_changed = true;
602 connector->encoder->crtc = new_crtc; 619 connector->encoder->crtc = new_crtc;
603 } 620 }
604 DRM_DEBUG_KMS("setting connector %d crtc to %p\n", 621 if (new_crtc) {
605 connector->base.id, new_crtc); 622 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] to [CRTC:%d]\n",
623 connector->base.id, drm_get_connector_name(connector),
624 new_crtc->base.id);
625 } else {
626 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] to [NOCRTC]\n",
627 connector->base.id, drm_get_connector_name(connector));
628 }
606 } 629 }
607 630
608 /* mode_set_base is not a required function */ 631 /* mode_set_base is not a required function */
@@ -620,8 +643,8 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
620 if (!drm_crtc_helper_set_mode(set->crtc, set->mode, 643 if (!drm_crtc_helper_set_mode(set->crtc, set->mode,
621 set->x, set->y, 644 set->x, set->y,
622 old_fb)) { 645 old_fb)) {
623 DRM_ERROR("failed to set mode on crtc %p\n", 646 DRM_ERROR("failed to set mode on [CRTC:%d]\n",
624 set->crtc); 647 set->crtc->base.id);
625 ret = -EINVAL; 648 ret = -EINVAL;
626 goto fail; 649 goto fail;
627 } 650 }
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 4a66201edaec..90288ec7c284 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -243,47 +243,20 @@ int drm_lastclose(struct drm_device * dev)
243 * 243 *
244 * Initializes an array of drm_device structures, and attempts to 244 * Initializes an array of drm_device structures, and attempts to
245 * initialize all available devices, using consecutive minors, registering the 245 * initialize all available devices, using consecutive minors, registering the
246 * stubs and initializing the AGP device. 246 * stubs and initializing the device.
247 * 247 *
248 * Expands the \c DRIVER_PREINIT and \c DRIVER_POST_INIT macros before and 248 * Expands the \c DRIVER_PREINIT and \c DRIVER_POST_INIT macros before and
249 * after the initialization for driver customization. 249 * after the initialization for driver customization.
250 */ 250 */
251int drm_init(struct drm_driver *driver) 251int drm_init(struct drm_driver *driver)
252{ 252{
253 struct pci_dev *pdev = NULL;
254 const struct pci_device_id *pid;
255 int i;
256
257 DRM_DEBUG("\n"); 253 DRM_DEBUG("\n");
258
259 INIT_LIST_HEAD(&driver->device_list); 254 INIT_LIST_HEAD(&driver->device_list);
260 255
261 if (driver->driver_features & DRIVER_MODESET) 256 if (driver->driver_features & DRIVER_USE_PLATFORM_DEVICE)
262 return pci_register_driver(&driver->pci_driver); 257 return drm_platform_init(driver);
263 258 else
264 /* If not using KMS, fall back to stealth mode manual scanning. */ 259 return drm_pci_init(driver);
265 for (i = 0; driver->pci_driver.id_table[i].vendor != 0; i++) {
266 pid = &driver->pci_driver.id_table[i];
267
268 /* Loop around setting up a DRM device for each PCI device
269 * matching our ID and device class. If we had the internal
270 * function that pci_get_subsys and pci_get_class used, we'd
271 * be able to just pass pid in instead of doing a two-stage
272 * thing.
273 */
274 pdev = NULL;
275 while ((pdev =
276 pci_get_subsys(pid->vendor, pid->device, pid->subvendor,
277 pid->subdevice, pdev)) != NULL) {
278 if ((pdev->class & pid->class_mask) != pid->class)
279 continue;
280
281 /* stealth mode requires a manual probe */
282 pci_dev_get(pdev);
283 drm_get_dev(pdev, pid, driver);
284 }
285 }
286 return 0;
287} 260}
288 261
289EXPORT_SYMBOL(drm_init); 262EXPORT_SYMBOL(drm_init);
@@ -315,6 +288,7 @@ static int __init drm_core_init(void)
315{ 288{
316 int ret = -ENOMEM; 289 int ret = -ENOMEM;
317 290
291 drm_global_init();
318 idr_init(&drm_minors_idr); 292 idr_init(&drm_minors_idr);
319 293
320 if (register_chrdev(DRM_MAJOR, "drm", &drm_stub_fops)) 294 if (register_chrdev(DRM_MAJOR, "drm", &drm_stub_fops))
@@ -362,6 +336,7 @@ static void __exit drm_core_exit(void)
362 336
363 unregister_chrdev(DRM_MAJOR, "drm"); 337 unregister_chrdev(DRM_MAJOR, "drm");
364 338
339 idr_remove_all(&drm_minors_idr);
365 idr_destroy(&drm_minors_idr); 340 idr_destroy(&drm_minors_idr);
366} 341}
367 342
@@ -506,9 +481,9 @@ long drm_ioctl(struct file *filp,
506 if (ioctl->flags & DRM_UNLOCKED) 481 if (ioctl->flags & DRM_UNLOCKED)
507 retcode = func(dev, kdata, file_priv); 482 retcode = func(dev, kdata, file_priv);
508 else { 483 else {
509 lock_kernel(); 484 mutex_lock(&drm_global_mutex);
510 retcode = func(dev, kdata, file_priv); 485 retcode = func(dev, kdata, file_priv);
511 unlock_kernel(); 486 mutex_unlock(&drm_global_mutex);
512 } 487 }
513 488
514 if (cmd & IOC_OUT) { 489 if (cmd & IOC_OUT) {
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index c1981861bbbd..dce5c4a97f8d 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -282,7 +282,7 @@ drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
282 return block; 282 return block;
283 283
284carp: 284carp:
285 dev_warn(&connector->dev->pdev->dev, "%s: EDID block %d invalid.\n", 285 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
286 drm_get_connector_name(connector), j); 286 drm_get_connector_name(connector), j);
287 287
288out: 288out:
@@ -864,8 +864,8 @@ drm_mode_std(struct drm_connector *connector, struct edid *edid,
864 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, 864 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
865 false); 865 false);
866 mode->hdisplay = 1366; 866 mode->hdisplay = 1366;
867 mode->vsync_start = mode->vsync_start - 1; 867 mode->hsync_start = mode->hsync_start - 1;
868 mode->vsync_end = mode->vsync_end - 1; 868 mode->hsync_end = mode->hsync_end - 1;
869 return mode; 869 return mode;
870 } 870 }
871 871
@@ -929,13 +929,11 @@ drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
929 { 1440, 576 }, 929 { 1440, 576 },
930 { 2880, 576 }, 930 { 2880, 576 },
931 }; 931 };
932 static const int n_sizes =
933 sizeof(cea_interlaced)/sizeof(cea_interlaced[0]);
934 932
935 if (!(pt->misc & DRM_EDID_PT_INTERLACED)) 933 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
936 return; 934 return;
937 935
938 for (i = 0; i < n_sizes; i++) { 936 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
939 if ((mode->hdisplay == cea_interlaced[i].w) && 937 if ((mode->hdisplay == cea_interlaced[i].w) &&
940 (mode->vdisplay == cea_interlaced[i].h / 2)) { 938 (mode->vdisplay == cea_interlaced[i].h / 2)) {
941 mode->vdisplay *= 2; 939 mode->vdisplay *= 2;
@@ -1375,7 +1373,6 @@ static const struct {
1375 { 1920, 1440, 60, 0 }, 1373 { 1920, 1440, 60, 0 },
1376 { 1920, 1440, 75, 0 }, 1374 { 1920, 1440, 75, 0 },
1377}; 1375};
1378static const int num_est3_modes = sizeof(est3_modes) / sizeof(est3_modes[0]);
1379 1376
1380static int 1377static int
1381drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) 1378drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
@@ -1387,7 +1384,7 @@ drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1387 for (i = 0; i < 6; i++) { 1384 for (i = 0; i < 6; i++) {
1388 for (j = 7; j > 0; j--) { 1385 for (j = 7; j > 0; j--) {
1389 m = (i * 8) + (7 - j); 1386 m = (i * 8) + (7 - j);
1390 if (m >= num_est3_modes) 1387 if (m >= ARRAY_SIZE(est3_modes))
1391 break; 1388 break;
1392 if (est[i] & (1 << j)) { 1389 if (est[i] & (1 << j)) {
1393 mode = drm_mode_find_dmt(connector->dev, 1390 mode = drm_mode_find_dmt(connector->dev,
@@ -1626,7 +1623,7 @@ int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1626 return 0; 1623 return 0;
1627 } 1624 }
1628 if (!drm_edid_is_valid(edid)) { 1625 if (!drm_edid_is_valid(edid)) {
1629 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n", 1626 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
1630 drm_get_connector_name(connector)); 1627 drm_get_connector_name(connector));
1631 return 0; 1628 return 0;
1632 } 1629 }
diff --git a/drivers/gpu/drm/drm_encoder_slave.c b/drivers/gpu/drm/drm_encoder_slave.c
index f0184696edf3..d62c064fbaa0 100644
--- a/drivers/gpu/drm/drm_encoder_slave.c
+++ b/drivers/gpu/drm/drm_encoder_slave.c
@@ -41,6 +41,9 @@
41 * &drm_encoder_slave. The @slave_funcs field will be initialized with 41 * &drm_encoder_slave. The @slave_funcs field will be initialized with
42 * the hooks provided by the slave driver. 42 * the hooks provided by the slave driver.
43 * 43 *
44 * If @info->platform_data is non-NULL it will be used as the initial
45 * slave config.
46 *
44 * Returns 0 on success or a negative errno on failure, in particular, 47 * Returns 0 on success or a negative errno on failure, in particular,
45 * -ENODEV is returned when no matching driver is found. 48 * -ENODEV is returned when no matching driver is found.
46 */ 49 */
@@ -85,6 +88,10 @@ int drm_i2c_encoder_init(struct drm_device *dev,
85 if (err) 88 if (err)
86 goto fail_unregister; 89 goto fail_unregister;
87 90
91 if (info->platform_data)
92 encoder->slave_funcs->set_config(&encoder->base,
93 info->platform_data);
94
88 return 0; 95 return 0;
89 96
90fail_unregister: 97fail_unregister:
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 1f2cc6b09623..de82e201d682 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -241,6 +241,80 @@ static int drm_fb_helper_parse_command_line(struct drm_fb_helper *fb_helper)
241 return 0; 241 return 0;
242} 242}
243 243
244int drm_fb_helper_debug_enter(struct fb_info *info)
245{
246 struct drm_fb_helper *helper = info->par;
247 struct drm_crtc_helper_funcs *funcs;
248 int i;
249
250 if (list_empty(&kernel_fb_helper_list))
251 return false;
252
253 list_for_each_entry(helper, &kernel_fb_helper_list, kernel_fb_list) {
254 for (i = 0; i < helper->crtc_count; i++) {
255 struct drm_mode_set *mode_set =
256 &helper->crtc_info[i].mode_set;
257
258 if (!mode_set->crtc->enabled)
259 continue;
260
261 funcs = mode_set->crtc->helper_private;
262 funcs->mode_set_base_atomic(mode_set->crtc,
263 mode_set->fb,
264 mode_set->x,
265 mode_set->y);
266
267 }
268 }
269
270 return 0;
271}
272EXPORT_SYMBOL(drm_fb_helper_debug_enter);
273
274/* Find the real fb for a given fb helper CRTC */
275static struct drm_framebuffer *drm_mode_config_fb(struct drm_crtc *crtc)
276{
277 struct drm_device *dev = crtc->dev;
278 struct drm_crtc *c;
279
280 list_for_each_entry(c, &dev->mode_config.crtc_list, head) {
281 if (crtc->base.id == c->base.id)
282 return c->fb;
283 }
284
285 return NULL;
286}
287
288int drm_fb_helper_debug_leave(struct fb_info *info)
289{
290 struct drm_fb_helper *helper = info->par;
291 struct drm_crtc *crtc;
292 struct drm_crtc_helper_funcs *funcs;
293 struct drm_framebuffer *fb;
294 int i;
295
296 for (i = 0; i < helper->crtc_count; i++) {
297 struct drm_mode_set *mode_set = &helper->crtc_info[i].mode_set;
298 crtc = mode_set->crtc;
299 funcs = crtc->helper_private;
300 fb = drm_mode_config_fb(crtc);
301
302 if (!crtc->enabled)
303 continue;
304
305 if (!fb) {
306 DRM_ERROR("no fb to restore??\n");
307 continue;
308 }
309
310 funcs->mode_set_base_atomic(mode_set->crtc, fb, crtc->x,
311 crtc->y);
312 }
313
314 return 0;
315}
316EXPORT_SYMBOL(drm_fb_helper_debug_leave);
317
244bool drm_fb_helper_force_kernel_mode(void) 318bool drm_fb_helper_force_kernel_mode(void)
245{ 319{
246 int i = 0; 320 int i = 0;
@@ -315,8 +389,9 @@ static void drm_fb_helper_on(struct fb_info *info)
315 struct drm_device *dev = fb_helper->dev; 389 struct drm_device *dev = fb_helper->dev;
316 struct drm_crtc *crtc; 390 struct drm_crtc *crtc;
317 struct drm_crtc_helper_funcs *crtc_funcs; 391 struct drm_crtc_helper_funcs *crtc_funcs;
392 struct drm_connector *connector;
318 struct drm_encoder *encoder; 393 struct drm_encoder *encoder;
319 int i; 394 int i, j;
320 395
321 /* 396 /*
322 * For each CRTC in this fb, turn the crtc on then, 397 * For each CRTC in this fb, turn the crtc on then,
@@ -332,7 +407,14 @@ static void drm_fb_helper_on(struct fb_info *info)
332 407
333 crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON); 408 crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON);
334 409
335 410 /* Walk the connectors & encoders on this fb turning them on */
411 for (j = 0; j < fb_helper->connector_count; j++) {
412 connector = fb_helper->connector_info[j]->connector;
413 connector->dpms = DRM_MODE_DPMS_ON;
414 drm_connector_property_set_value(connector,
415 dev->mode_config.dpms_property,
416 DRM_MODE_DPMS_ON);
417 }
336 /* Found a CRTC on this fb, now find encoders */ 418 /* Found a CRTC on this fb, now find encoders */
337 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 419 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
338 if (encoder->crtc == crtc) { 420 if (encoder->crtc == crtc) {
@@ -352,8 +434,9 @@ static void drm_fb_helper_off(struct fb_info *info, int dpms_mode)
352 struct drm_device *dev = fb_helper->dev; 434 struct drm_device *dev = fb_helper->dev;
353 struct drm_crtc *crtc; 435 struct drm_crtc *crtc;
354 struct drm_crtc_helper_funcs *crtc_funcs; 436 struct drm_crtc_helper_funcs *crtc_funcs;
437 struct drm_connector *connector;
355 struct drm_encoder *encoder; 438 struct drm_encoder *encoder;
356 int i; 439 int i, j;
357 440
358 /* 441 /*
359 * For each CRTC in this fb, find all associated encoders 442 * For each CRTC in this fb, find all associated encoders
@@ -367,6 +450,14 @@ static void drm_fb_helper_off(struct fb_info *info, int dpms_mode)
367 if (!crtc->enabled) 450 if (!crtc->enabled)
368 continue; 451 continue;
369 452
453 /* Walk the connectors on this fb and mark them off */
454 for (j = 0; j < fb_helper->connector_count; j++) {
455 connector = fb_helper->connector_info[j]->connector;
456 connector->dpms = dpms_mode;
457 drm_connector_property_set_value(connector,
458 dev->mode_config.dpms_property,
459 dpms_mode);
460 }
370 /* Found a CRTC on this fb, now find encoders */ 461 /* Found a CRTC on this fb, now find encoders */
371 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 462 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
372 if (encoder->crtc == crtc) { 463 if (encoder->crtc == crtc) {
@@ -594,7 +685,7 @@ int drm_fb_helper_check_var(struct fb_var_screeninfo *var,
594 struct drm_framebuffer *fb = fb_helper->fb; 685 struct drm_framebuffer *fb = fb_helper->fb;
595 int depth; 686 int depth;
596 687
597 if (var->pixclock != 0) 688 if (var->pixclock != 0 || in_dbg_master())
598 return -EINVAL; 689 return -EINVAL;
599 690
600 /* Need to resize the fb object !!! */ 691 /* Need to resize the fb object !!! */
diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
index e7aace20981f..2ca8df8b6102 100644
--- a/drivers/gpu/drm/drm_fops.c
+++ b/drivers/gpu/drm/drm_fops.c
@@ -39,6 +39,9 @@
39#include <linux/slab.h> 39#include <linux/slab.h>
40#include <linux/smp_lock.h> 40#include <linux/smp_lock.h>
41 41
42/* from BKL pushdown: note that nothing else serializes idr_find() */
43DEFINE_MUTEX(drm_global_mutex);
44
42static int drm_open_helper(struct inode *inode, struct file *filp, 45static int drm_open_helper(struct inode *inode, struct file *filp,
43 struct drm_device * dev); 46 struct drm_device * dev);
44 47
@@ -175,8 +178,7 @@ int drm_stub_open(struct inode *inode, struct file *filp)
175 178
176 DRM_DEBUG("\n"); 179 DRM_DEBUG("\n");
177 180
178 /* BKL pushdown: note that nothing else serializes idr_find() */ 181 mutex_lock(&drm_global_mutex);
179 lock_kernel();
180 minor = idr_find(&drm_minors_idr, minor_id); 182 minor = idr_find(&drm_minors_idr, minor_id);
181 if (!minor) 183 if (!minor)
182 goto out; 184 goto out;
@@ -197,7 +199,7 @@ int drm_stub_open(struct inode *inode, struct file *filp)
197 fops_put(old_fops); 199 fops_put(old_fops);
198 200
199out: 201out:
200 unlock_kernel(); 202 mutex_unlock(&drm_global_mutex);
201 return err; 203 return err;
202} 204}
203 205
@@ -472,7 +474,7 @@ int drm_release(struct inode *inode, struct file *filp)
472 struct drm_device *dev = file_priv->minor->dev; 474 struct drm_device *dev = file_priv->minor->dev;
473 int retcode = 0; 475 int retcode = 0;
474 476
475 lock_kernel(); 477 mutex_lock(&drm_global_mutex);
476 478
477 DRM_DEBUG("open_count = %d\n", dev->open_count); 479 DRM_DEBUG("open_count = %d\n", dev->open_count);
478 480
@@ -573,17 +575,14 @@ int drm_release(struct inode *inode, struct file *filp)
573 if (atomic_read(&dev->ioctl_count)) { 575 if (atomic_read(&dev->ioctl_count)) {
574 DRM_ERROR("Device busy: %d\n", 576 DRM_ERROR("Device busy: %d\n",
575 atomic_read(&dev->ioctl_count)); 577 atomic_read(&dev->ioctl_count));
576 spin_unlock(&dev->count_lock); 578 retcode = -EBUSY;
577 unlock_kernel(); 579 goto out;
578 return -EBUSY;
579 } 580 }
580 spin_unlock(&dev->count_lock); 581 retcode = drm_lastclose(dev);
581 unlock_kernel();
582 return drm_lastclose(dev);
583 } 582 }
583out:
584 spin_unlock(&dev->count_lock); 584 spin_unlock(&dev->count_lock);
585 585 mutex_unlock(&drm_global_mutex);
586 unlock_kernel();
587 586
588 return retcode; 587 return retcode;
589} 588}
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index 33dad3fa6043..4f1b86714489 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -68,8 +68,18 @@
68 * We make up offsets for buffer objects so we can recognize them at 68 * We make up offsets for buffer objects so we can recognize them at
69 * mmap time. 69 * mmap time.
70 */ 70 */
71
72/* pgoff in mmap is an unsigned long, so we need to make sure that
73 * the faked up offset will fit
74 */
75
76#if BITS_PER_LONG == 64
71#define DRM_FILE_PAGE_OFFSET_START ((0xFFFFFFFFUL >> PAGE_SHIFT) + 1) 77#define DRM_FILE_PAGE_OFFSET_START ((0xFFFFFFFFUL >> PAGE_SHIFT) + 1)
72#define DRM_FILE_PAGE_OFFSET_SIZE ((0xFFFFFFFFUL >> PAGE_SHIFT) * 16) 78#define DRM_FILE_PAGE_OFFSET_SIZE ((0xFFFFFFFFUL >> PAGE_SHIFT) * 16)
79#else
80#define DRM_FILE_PAGE_OFFSET_START ((0xFFFFFFFUL >> PAGE_SHIFT) + 1)
81#define DRM_FILE_PAGE_OFFSET_SIZE ((0xFFFFFFFUL >> PAGE_SHIFT) * 16)
82#endif
73 83
74/** 84/**
75 * Initialize the GEM device fields 85 * Initialize the GEM device fields
@@ -419,6 +429,7 @@ drm_gem_release(struct drm_device *dev, struct drm_file *file_private)
419 idr_for_each(&file_private->object_idr, 429 idr_for_each(&file_private->object_idr,
420 &drm_gem_object_release_handle, NULL); 430 &drm_gem_object_release_handle, NULL);
421 431
432 idr_remove_all(&file_private->object_idr);
422 idr_destroy(&file_private->object_idr); 433 idr_destroy(&file_private->object_idr);
423} 434}
424 435
diff --git a/drivers/gpu/drm/ttm/ttm_global.c b/drivers/gpu/drm/drm_global.c
index b17007178a36..c87dc96444de 100644
--- a/drivers/gpu/drm/ttm/ttm_global.c
+++ b/drivers/gpu/drm/drm_global.c
@@ -28,45 +28,45 @@
28 * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com> 28 * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
29 */ 29 */
30 30
31#include "ttm/ttm_module.h"
32#include <linux/mutex.h> 31#include <linux/mutex.h>
33#include <linux/slab.h> 32#include <linux/slab.h>
34#include <linux/module.h> 33#include <linux/module.h>
34#include "drm_global.h"
35 35
36struct ttm_global_item { 36struct drm_global_item {
37 struct mutex mutex; 37 struct mutex mutex;
38 void *object; 38 void *object;
39 int refcount; 39 int refcount;
40}; 40};
41 41
42static struct ttm_global_item glob[TTM_GLOBAL_NUM]; 42static struct drm_global_item glob[DRM_GLOBAL_NUM];
43 43
44void ttm_global_init(void) 44void drm_global_init(void)
45{ 45{
46 int i; 46 int i;
47 47
48 for (i = 0; i < TTM_GLOBAL_NUM; ++i) { 48 for (i = 0; i < DRM_GLOBAL_NUM; ++i) {
49 struct ttm_global_item *item = &glob[i]; 49 struct drm_global_item *item = &glob[i];
50 mutex_init(&item->mutex); 50 mutex_init(&item->mutex);
51 item->object = NULL; 51 item->object = NULL;
52 item->refcount = 0; 52 item->refcount = 0;
53 } 53 }
54} 54}
55 55
56void ttm_global_release(void) 56void drm_global_release(void)
57{ 57{
58 int i; 58 int i;
59 for (i = 0; i < TTM_GLOBAL_NUM; ++i) { 59 for (i = 0; i < DRM_GLOBAL_NUM; ++i) {
60 struct ttm_global_item *item = &glob[i]; 60 struct drm_global_item *item = &glob[i];
61 BUG_ON(item->object != NULL); 61 BUG_ON(item->object != NULL);
62 BUG_ON(item->refcount != 0); 62 BUG_ON(item->refcount != 0);
63 } 63 }
64} 64}
65 65
66int ttm_global_item_ref(struct ttm_global_reference *ref) 66int drm_global_item_ref(struct drm_global_reference *ref)
67{ 67{
68 int ret; 68 int ret;
69 struct ttm_global_item *item = &glob[ref->global_type]; 69 struct drm_global_item *item = &glob[ref->global_type];
70 void *object; 70 void *object;
71 71
72 mutex_lock(&item->mutex); 72 mutex_lock(&item->mutex);
@@ -93,11 +93,11 @@ out_err:
93 item->object = NULL; 93 item->object = NULL;
94 return ret; 94 return ret;
95} 95}
96EXPORT_SYMBOL(ttm_global_item_ref); 96EXPORT_SYMBOL(drm_global_item_ref);
97 97
98void ttm_global_item_unref(struct ttm_global_reference *ref) 98void drm_global_item_unref(struct drm_global_reference *ref)
99{ 99{
100 struct ttm_global_item *item = &glob[ref->global_type]; 100 struct drm_global_item *item = &glob[ref->global_type];
101 101
102 mutex_lock(&item->mutex); 102 mutex_lock(&item->mutex);
103 BUG_ON(item->refcount == 0); 103 BUG_ON(item->refcount == 0);
@@ -108,5 +108,5 @@ void ttm_global_item_unref(struct ttm_global_reference *ref)
108 } 108 }
109 mutex_unlock(&item->mutex); 109 mutex_unlock(&item->mutex);
110} 110}
111EXPORT_SYMBOL(ttm_global_item_unref); 111EXPORT_SYMBOL(drm_global_item_unref);
112 112
diff --git a/drivers/gpu/drm/drm_info.c b/drivers/gpu/drm/drm_info.c
index f0f6c6b93f3a..2ef2c7827243 100644
--- a/drivers/gpu/drm/drm_info.c
+++ b/drivers/gpu/drm/drm_info.c
@@ -51,13 +51,24 @@ int drm_name_info(struct seq_file *m, void *data)
51 if (!master) 51 if (!master)
52 return 0; 52 return 0;
53 53
54 if (master->unique) { 54 if (drm_core_check_feature(dev, DRIVER_USE_PLATFORM_DEVICE)) {
55 seq_printf(m, "%s %s %s\n", 55 if (master->unique) {
56 dev->driver->pci_driver.name, 56 seq_printf(m, "%s %s %s\n",
57 pci_name(dev->pdev), master->unique); 57 dev->driver->platform_device->name,
58 dev_name(dev->dev), master->unique);
59 } else {
60 seq_printf(m, "%s\n",
61 dev->driver->platform_device->name);
62 }
58 } else { 63 } else {
59 seq_printf(m, "%s %s\n", dev->driver->pci_driver.name, 64 if (master->unique) {
60 pci_name(dev->pdev)); 65 seq_printf(m, "%s %s %s\n",
66 dev->driver->pci_driver.name,
67 dev_name(dev->dev), master->unique);
68 } else {
69 seq_printf(m, "%s %s\n", dev->driver->pci_driver.name,
70 dev_name(dev->dev));
71 }
61 } 72 }
62 73
63 return 0; 74 return 0;
diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
index 9b9ff46c2378..7b03b197fc00 100644
--- a/drivers/gpu/drm/drm_ioctl.c
+++ b/drivers/gpu/drm/drm_ioctl.c
@@ -64,6 +64,19 @@ int drm_getunique(struct drm_device *dev, void *data,
64 return 0; 64 return 0;
65} 65}
66 66
67static void
68drm_unset_busid(struct drm_device *dev,
69 struct drm_master *master)
70{
71 kfree(dev->devname);
72 dev->devname = NULL;
73
74 kfree(master->unique);
75 master->unique = NULL;
76 master->unique_len = 0;
77 master->unique_size = 0;
78}
79
67/** 80/**
68 * Set the bus id. 81 * Set the bus id.
69 * 82 *
@@ -94,17 +107,24 @@ int drm_setunique(struct drm_device *dev, void *data,
94 master->unique_len = u->unique_len; 107 master->unique_len = u->unique_len;
95 master->unique_size = u->unique_len + 1; 108 master->unique_size = u->unique_len + 1;
96 master->unique = kmalloc(master->unique_size, GFP_KERNEL); 109 master->unique = kmalloc(master->unique_size, GFP_KERNEL);
97 if (!master->unique) 110 if (!master->unique) {
98 return -ENOMEM; 111 ret = -ENOMEM;
99 if (copy_from_user(master->unique, u->unique, master->unique_len)) 112 goto err;
100 return -EFAULT; 113 }
114
115 if (copy_from_user(master->unique, u->unique, master->unique_len)) {
116 ret = -EFAULT;
117 goto err;
118 }
101 119
102 master->unique[master->unique_len] = '\0'; 120 master->unique[master->unique_len] = '\0';
103 121
104 dev->devname = kmalloc(strlen(dev->driver->pci_driver.name) + 122 dev->devname = kmalloc(strlen(dev->driver->pci_driver.name) +
105 strlen(master->unique) + 2, GFP_KERNEL); 123 strlen(master->unique) + 2, GFP_KERNEL);
106 if (!dev->devname) 124 if (!dev->devname) {
107 return -ENOMEM; 125 ret = -ENOMEM;
126 goto err;
127 }
108 128
109 sprintf(dev->devname, "%s@%s", dev->driver->pci_driver.name, 129 sprintf(dev->devname, "%s@%s", dev->driver->pci_driver.name,
110 master->unique); 130 master->unique);
@@ -113,53 +133,103 @@ int drm_setunique(struct drm_device *dev, void *data,
113 * busid. 133 * busid.
114 */ 134 */
115 ret = sscanf(master->unique, "PCI:%d:%d:%d", &bus, &slot, &func); 135 ret = sscanf(master->unique, "PCI:%d:%d:%d", &bus, &slot, &func);
116 if (ret != 3) 136 if (ret != 3) {
117 return -EINVAL; 137 ret = -EINVAL;
138 goto err;
139 }
140
118 domain = bus >> 8; 141 domain = bus >> 8;
119 bus &= 0xff; 142 bus &= 0xff;
120 143
121 if ((domain != drm_get_pci_domain(dev)) || 144 if ((domain != drm_get_pci_domain(dev)) ||
122 (bus != dev->pdev->bus->number) || 145 (bus != dev->pdev->bus->number) ||
123 (slot != PCI_SLOT(dev->pdev->devfn)) || 146 (slot != PCI_SLOT(dev->pdev->devfn)) ||
124 (func != PCI_FUNC(dev->pdev->devfn))) 147 (func != PCI_FUNC(dev->pdev->devfn))) {
125 return -EINVAL; 148 ret = -EINVAL;
149 goto err;
150 }
126 151
127 return 0; 152 return 0;
153
154err:
155 drm_unset_busid(dev, master);
156 return ret;
128} 157}
129 158
130static int drm_set_busid(struct drm_device *dev, struct drm_file *file_priv) 159static int drm_set_busid(struct drm_device *dev, struct drm_file *file_priv)
131{ 160{
132 struct drm_master *master = file_priv->master; 161 struct drm_master *master = file_priv->master;
133 int len; 162 int len, ret;
134 163
135 if (master->unique != NULL) 164 if (master->unique != NULL)
136 return -EBUSY; 165 drm_unset_busid(dev, master);
137 166
138 master->unique_len = 40; 167 if (drm_core_check_feature(dev, DRIVER_USE_PLATFORM_DEVICE)) {
139 master->unique_size = master->unique_len; 168 master->unique_len = 10 + strlen(dev->platformdev->name);
140 master->unique = kmalloc(master->unique_size, GFP_KERNEL); 169 master->unique = kmalloc(master->unique_len + 1, GFP_KERNEL);
141 if (master->unique == NULL)
142 return -ENOMEM;
143
144 len = snprintf(master->unique, master->unique_len, "pci:%04x:%02x:%02x.%d",
145 drm_get_pci_domain(dev),
146 dev->pdev->bus->number,
147 PCI_SLOT(dev->pdev->devfn),
148 PCI_FUNC(dev->pdev->devfn));
149 if (len >= master->unique_len)
150 DRM_ERROR("buffer overflow");
151 else
152 master->unique_len = len;
153 170
154 dev->devname = kmalloc(strlen(dev->driver->pci_driver.name) + 171 if (master->unique == NULL)
155 master->unique_len + 2, GFP_KERNEL); 172 return -ENOMEM;
156 if (dev->devname == NULL)
157 return -ENOMEM;
158 173
159 sprintf(dev->devname, "%s@%s", dev->driver->pci_driver.name, 174 len = snprintf(master->unique, master->unique_len,
160 master->unique); 175 "platform:%s", dev->platformdev->name);
176
177 if (len > master->unique_len) {
178 DRM_ERROR("Unique buffer overflowed\n");
179 ret = -EINVAL;
180 goto err;
181 }
182
183 dev->devname =
184 kmalloc(strlen(dev->platformdev->name) +
185 master->unique_len + 2, GFP_KERNEL);
186
187 if (dev->devname == NULL) {
188 ret = -ENOMEM;
189 goto err;
190 }
191
192 sprintf(dev->devname, "%s@%s", dev->platformdev->name,
193 master->unique);
194
195 } else {
196 master->unique_len = 40;
197 master->unique_size = master->unique_len;
198 master->unique = kmalloc(master->unique_size, GFP_KERNEL);
199 if (master->unique == NULL)
200 return -ENOMEM;
201
202 len = snprintf(master->unique, master->unique_len,
203 "pci:%04x:%02x:%02x.%d",
204 drm_get_pci_domain(dev),
205 dev->pdev->bus->number,
206 PCI_SLOT(dev->pdev->devfn),
207 PCI_FUNC(dev->pdev->devfn));
208 if (len >= master->unique_len) {
209 DRM_ERROR("buffer overflow");
210 ret = -EINVAL;
211 goto err;
212 } else
213 master->unique_len = len;
214
215 dev->devname =
216 kmalloc(strlen(dev->driver->pci_driver.name) +
217 master->unique_len + 2, GFP_KERNEL);
218
219 if (dev->devname == NULL) {
220 ret = -ENOMEM;
221 goto err;
222 }
223
224 sprintf(dev->devname, "%s@%s", dev->driver->pci_driver.name,
225 master->unique);
226 }
161 227
162 return 0; 228 return 0;
229
230err:
231 drm_unset_busid(dev, master);
232 return ret;
163} 233}
164 234
165/** 235/**
@@ -323,7 +393,9 @@ int drm_setversion(struct drm_device *dev, void *data, struct drm_file *file_pri
323 /* 393 /*
324 * Version 1.1 includes tying of DRM to specific device 394 * Version 1.1 includes tying of DRM to specific device
325 */ 395 */
326 drm_set_busid(dev, file_priv); 396 retcode = drm_set_busid(dev, file_priv);
397 if (retcode)
398 goto done;
327 } 399 }
328 } 400 }
329 401
diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
index a263b7070fc6..9d3a5030b6e1 100644
--- a/drivers/gpu/drm/drm_irq.c
+++ b/drivers/gpu/drm/drm_irq.c
@@ -34,6 +34,7 @@
34 */ 34 */
35 35
36#include "drmP.h" 36#include "drmP.h"
37#include "drm_trace.h"
37 38
38#include <linux/interrupt.h> /* For task queue support */ 39#include <linux/interrupt.h> /* For task queue support */
39#include <linux/slab.h> 40#include <linux/slab.h>
@@ -57,6 +58,9 @@ int drm_irq_by_busid(struct drm_device *dev, void *data,
57{ 58{
58 struct drm_irq_busid *p = data; 59 struct drm_irq_busid *p = data;
59 60
61 if (drm_core_check_feature(dev, DRIVER_USE_PLATFORM_DEVICE))
62 return -EINVAL;
63
60 if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ)) 64 if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
61 return -EINVAL; 65 return -EINVAL;
62 66
@@ -211,7 +215,7 @@ int drm_irq_install(struct drm_device *dev)
211 if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ)) 215 if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
212 return -EINVAL; 216 return -EINVAL;
213 217
214 if (dev->pdev->irq == 0) 218 if (drm_dev_to_irq(dev) == 0)
215 return -EINVAL; 219 return -EINVAL;
216 220
217 mutex_lock(&dev->struct_mutex); 221 mutex_lock(&dev->struct_mutex);
@@ -229,7 +233,7 @@ int drm_irq_install(struct drm_device *dev)
229 dev->irq_enabled = 1; 233 dev->irq_enabled = 1;
230 mutex_unlock(&dev->struct_mutex); 234 mutex_unlock(&dev->struct_mutex);
231 235
232 DRM_DEBUG("irq=%d\n", dev->pdev->irq); 236 DRM_DEBUG("irq=%d\n", drm_dev_to_irq(dev));
233 237
234 /* Before installing handler */ 238 /* Before installing handler */
235 dev->driver->irq_preinstall(dev); 239 dev->driver->irq_preinstall(dev);
@@ -302,14 +306,14 @@ int drm_irq_uninstall(struct drm_device * dev)
302 if (!irq_enabled) 306 if (!irq_enabled)
303 return -EINVAL; 307 return -EINVAL;
304 308
305 DRM_DEBUG("irq=%d\n", dev->pdev->irq); 309 DRM_DEBUG("irq=%d\n", drm_dev_to_irq(dev));
306 310
307 if (!drm_core_check_feature(dev, DRIVER_MODESET)) 311 if (!drm_core_check_feature(dev, DRIVER_MODESET))
308 vga_client_register(dev->pdev, NULL, NULL, NULL); 312 vga_client_register(dev->pdev, NULL, NULL, NULL);
309 313
310 dev->driver->irq_uninstall(dev); 314 dev->driver->irq_uninstall(dev);
311 315
312 free_irq(dev->pdev->irq, dev); 316 free_irq(drm_dev_to_irq(dev), dev);
313 317
314 return 0; 318 return 0;
315} 319}
@@ -341,7 +345,7 @@ int drm_control(struct drm_device *dev, void *data,
341 if (drm_core_check_feature(dev, DRIVER_MODESET)) 345 if (drm_core_check_feature(dev, DRIVER_MODESET))
342 return 0; 346 return 0;
343 if (dev->if_version < DRM_IF_VERSION(1, 2) && 347 if (dev->if_version < DRM_IF_VERSION(1, 2) &&
344 ctl->irq != dev->pdev->irq) 348 ctl->irq != drm_dev_to_irq(dev))
345 return -EINVAL; 349 return -EINVAL;
346 return drm_irq_install(dev); 350 return drm_irq_install(dev);
347 case DRM_UNINST_HANDLER: 351 case DRM_UNINST_HANDLER:
@@ -587,6 +591,7 @@ static int drm_queue_vblank_event(struct drm_device *dev, int pipe,
587 return -ENOMEM; 591 return -ENOMEM;
588 592
589 e->pipe = pipe; 593 e->pipe = pipe;
594 e->base.pid = current->pid;
590 e->event.base.type = DRM_EVENT_VBLANK; 595 e->event.base.type = DRM_EVENT_VBLANK;
591 e->event.base.length = sizeof e->event; 596 e->event.base.length = sizeof e->event;
592 e->event.user_data = vblwait->request.signal; 597 e->event.user_data = vblwait->request.signal;
@@ -614,6 +619,9 @@ static int drm_queue_vblank_event(struct drm_device *dev, int pipe,
614 DRM_DEBUG("event on vblank count %d, current %d, crtc %d\n", 619 DRM_DEBUG("event on vblank count %d, current %d, crtc %d\n",
615 vblwait->request.sequence, seq, pipe); 620 vblwait->request.sequence, seq, pipe);
616 621
622 trace_drm_vblank_event_queued(current->pid, pipe,
623 vblwait->request.sequence);
624
617 e->event.sequence = vblwait->request.sequence; 625 e->event.sequence = vblwait->request.sequence;
618 if ((seq - vblwait->request.sequence) <= (1 << 23)) { 626 if ((seq - vblwait->request.sequence) <= (1 << 23)) {
619 e->event.tv_sec = now.tv_sec; 627 e->event.tv_sec = now.tv_sec;
@@ -621,6 +629,8 @@ static int drm_queue_vblank_event(struct drm_device *dev, int pipe,
621 drm_vblank_put(dev, e->pipe); 629 drm_vblank_put(dev, e->pipe);
622 list_add_tail(&e->base.link, &e->base.file_priv->event_list); 630 list_add_tail(&e->base.link, &e->base.file_priv->event_list);
623 wake_up_interruptible(&e->base.file_priv->event_wait); 631 wake_up_interruptible(&e->base.file_priv->event_wait);
632 trace_drm_vblank_event_delivered(current->pid, pipe,
633 vblwait->request.sequence);
624 } else { 634 } else {
625 list_add_tail(&e->base.link, &dev->vblank_event_list); 635 list_add_tail(&e->base.link, &dev->vblank_event_list);
626 } 636 }
@@ -651,7 +661,7 @@ int drm_wait_vblank(struct drm_device *dev, void *data,
651 int ret = 0; 661 int ret = 0;
652 unsigned int flags, seq, crtc; 662 unsigned int flags, seq, crtc;
653 663
654 if ((!dev->pdev->irq) || (!dev->irq_enabled)) 664 if ((!drm_dev_to_irq(dev)) || (!dev->irq_enabled))
655 return -EINVAL; 665 return -EINVAL;
656 666
657 if (vblwait->request.type & _DRM_VBLANK_SIGNAL) 667 if (vblwait->request.type & _DRM_VBLANK_SIGNAL)
@@ -751,9 +761,13 @@ void drm_handle_vblank_events(struct drm_device *dev, int crtc)
751 drm_vblank_put(dev, e->pipe); 761 drm_vblank_put(dev, e->pipe);
752 list_move_tail(&e->base.link, &e->base.file_priv->event_list); 762 list_move_tail(&e->base.link, &e->base.file_priv->event_list);
753 wake_up_interruptible(&e->base.file_priv->event_wait); 763 wake_up_interruptible(&e->base.file_priv->event_wait);
764 trace_drm_vblank_event_delivered(e->base.pid, e->pipe,
765 e->event.sequence);
754 } 766 }
755 767
756 spin_unlock_irqrestore(&dev->event_lock, flags); 768 spin_unlock_irqrestore(&dev->event_lock, flags);
769
770 trace_drm_vblank_event(crtc, seq);
757} 771}
758 772
759/** 773/**
diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
index 2ac074c8f5d2..da99edc50888 100644
--- a/drivers/gpu/drm/drm_mm.c
+++ b/drivers/gpu/drm/drm_mm.c
@@ -48,44 +48,14 @@
48 48
49#define MM_UNUSED_TARGET 4 49#define MM_UNUSED_TARGET 4
50 50
51unsigned long drm_mm_tail_space(struct drm_mm *mm)
52{
53 struct list_head *tail_node;
54 struct drm_mm_node *entry;
55
56 tail_node = mm->ml_entry.prev;
57 entry = list_entry(tail_node, struct drm_mm_node, ml_entry);
58 if (!entry->free)
59 return 0;
60
61 return entry->size;
62}
63
64int drm_mm_remove_space_from_tail(struct drm_mm *mm, unsigned long size)
65{
66 struct list_head *tail_node;
67 struct drm_mm_node *entry;
68
69 tail_node = mm->ml_entry.prev;
70 entry = list_entry(tail_node, struct drm_mm_node, ml_entry);
71 if (!entry->free)
72 return -ENOMEM;
73
74 if (entry->size <= size)
75 return -ENOMEM;
76
77 entry->size -= size;
78 return 0;
79}
80
81static struct drm_mm_node *drm_mm_kmalloc(struct drm_mm *mm, int atomic) 51static struct drm_mm_node *drm_mm_kmalloc(struct drm_mm *mm, int atomic)
82{ 52{
83 struct drm_mm_node *child; 53 struct drm_mm_node *child;
84 54
85 if (atomic) 55 if (atomic)
86 child = kmalloc(sizeof(*child), GFP_ATOMIC); 56 child = kzalloc(sizeof(*child), GFP_ATOMIC);
87 else 57 else
88 child = kmalloc(sizeof(*child), GFP_KERNEL); 58 child = kzalloc(sizeof(*child), GFP_KERNEL);
89 59
90 if (unlikely(child == NULL)) { 60 if (unlikely(child == NULL)) {
91 spin_lock(&mm->unused_lock); 61 spin_lock(&mm->unused_lock);
@@ -94,8 +64,8 @@ static struct drm_mm_node *drm_mm_kmalloc(struct drm_mm *mm, int atomic)
94 else { 64 else {
95 child = 65 child =
96 list_entry(mm->unused_nodes.next, 66 list_entry(mm->unused_nodes.next,
97 struct drm_mm_node, fl_entry); 67 struct drm_mm_node, free_stack);
98 list_del(&child->fl_entry); 68 list_del(&child->free_stack);
99 --mm->num_unused; 69 --mm->num_unused;
100 } 70 }
101 spin_unlock(&mm->unused_lock); 71 spin_unlock(&mm->unused_lock);
@@ -115,7 +85,7 @@ int drm_mm_pre_get(struct drm_mm *mm)
115 spin_lock(&mm->unused_lock); 85 spin_lock(&mm->unused_lock);
116 while (mm->num_unused < MM_UNUSED_TARGET) { 86 while (mm->num_unused < MM_UNUSED_TARGET) {
117 spin_unlock(&mm->unused_lock); 87 spin_unlock(&mm->unused_lock);
118 node = kmalloc(sizeof(*node), GFP_KERNEL); 88 node = kzalloc(sizeof(*node), GFP_KERNEL);
119 spin_lock(&mm->unused_lock); 89 spin_lock(&mm->unused_lock);
120 90
121 if (unlikely(node == NULL)) { 91 if (unlikely(node == NULL)) {
@@ -124,7 +94,7 @@ int drm_mm_pre_get(struct drm_mm *mm)
124 return ret; 94 return ret;
125 } 95 }
126 ++mm->num_unused; 96 ++mm->num_unused;
127 list_add_tail(&node->fl_entry, &mm->unused_nodes); 97 list_add_tail(&node->free_stack, &mm->unused_nodes);
128 } 98 }
129 spin_unlock(&mm->unused_lock); 99 spin_unlock(&mm->unused_lock);
130 return 0; 100 return 0;
@@ -146,27 +116,12 @@ static int drm_mm_create_tail_node(struct drm_mm *mm,
146 child->start = start; 116 child->start = start;
147 child->mm = mm; 117 child->mm = mm;
148 118
149 list_add_tail(&child->ml_entry, &mm->ml_entry); 119 list_add_tail(&child->node_list, &mm->node_list);
150 list_add_tail(&child->fl_entry, &mm->fl_entry); 120 list_add_tail(&child->free_stack, &mm->free_stack);
151 121
152 return 0; 122 return 0;
153} 123}
154 124
155int drm_mm_add_space_to_tail(struct drm_mm *mm, unsigned long size, int atomic)
156{
157 struct list_head *tail_node;
158 struct drm_mm_node *entry;
159
160 tail_node = mm->ml_entry.prev;
161 entry = list_entry(tail_node, struct drm_mm_node, ml_entry);
162 if (!entry->free) {
163 return drm_mm_create_tail_node(mm, entry->start + entry->size,
164 size, atomic);
165 }
166 entry->size += size;
167 return 0;
168}
169
170static struct drm_mm_node *drm_mm_split_at_start(struct drm_mm_node *parent, 125static struct drm_mm_node *drm_mm_split_at_start(struct drm_mm_node *parent,
171 unsigned long size, 126 unsigned long size,
172 int atomic) 127 int atomic)
@@ -177,15 +132,14 @@ static struct drm_mm_node *drm_mm_split_at_start(struct drm_mm_node *parent,
177 if (unlikely(child == NULL)) 132 if (unlikely(child == NULL))
178 return NULL; 133 return NULL;
179 134
180 INIT_LIST_HEAD(&child->fl_entry); 135 INIT_LIST_HEAD(&child->free_stack);
181 136
182 child->free = 0;
183 child->size = size; 137 child->size = size;
184 child->start = parent->start; 138 child->start = parent->start;
185 child->mm = parent->mm; 139 child->mm = parent->mm;
186 140
187 list_add_tail(&child->ml_entry, &parent->ml_entry); 141 list_add_tail(&child->node_list, &parent->node_list);
188 INIT_LIST_HEAD(&child->fl_entry); 142 INIT_LIST_HEAD(&child->free_stack);
189 143
190 parent->size -= size; 144 parent->size -= size;
191 parent->start += size; 145 parent->start += size;
@@ -213,7 +167,7 @@ struct drm_mm_node *drm_mm_get_block_generic(struct drm_mm_node *node,
213 } 167 }
214 168
215 if (node->size == size) { 169 if (node->size == size) {
216 list_del_init(&node->fl_entry); 170 list_del_init(&node->free_stack);
217 node->free = 0; 171 node->free = 0;
218 } else { 172 } else {
219 node = drm_mm_split_at_start(node, size, atomic); 173 node = drm_mm_split_at_start(node, size, atomic);
@@ -251,7 +205,7 @@ struct drm_mm_node *drm_mm_get_block_range_generic(struct drm_mm_node *node,
251 } 205 }
252 206
253 if (node->size == size) { 207 if (node->size == size) {
254 list_del_init(&node->fl_entry); 208 list_del_init(&node->free_stack);
255 node->free = 0; 209 node->free = 0;
256 } else { 210 } else {
257 node = drm_mm_split_at_start(node, size, atomic); 211 node = drm_mm_split_at_start(node, size, atomic);
@@ -273,16 +227,19 @@ void drm_mm_put_block(struct drm_mm_node *cur)
273{ 227{
274 228
275 struct drm_mm *mm = cur->mm; 229 struct drm_mm *mm = cur->mm;
276 struct list_head *cur_head = &cur->ml_entry; 230 struct list_head *cur_head = &cur->node_list;
277 struct list_head *root_head = &mm->ml_entry; 231 struct list_head *root_head = &mm->node_list;
278 struct drm_mm_node *prev_node = NULL; 232 struct drm_mm_node *prev_node = NULL;
279 struct drm_mm_node *next_node; 233 struct drm_mm_node *next_node;
280 234
281 int merged = 0; 235 int merged = 0;
282 236
237 BUG_ON(cur->scanned_block || cur->scanned_prev_free
238 || cur->scanned_next_free);
239
283 if (cur_head->prev != root_head) { 240 if (cur_head->prev != root_head) {
284 prev_node = 241 prev_node =
285 list_entry(cur_head->prev, struct drm_mm_node, ml_entry); 242 list_entry(cur_head->prev, struct drm_mm_node, node_list);
286 if (prev_node->free) { 243 if (prev_node->free) {
287 prev_node->size += cur->size; 244 prev_node->size += cur->size;
288 merged = 1; 245 merged = 1;
@@ -290,15 +247,15 @@ void drm_mm_put_block(struct drm_mm_node *cur)
290 } 247 }
291 if (cur_head->next != root_head) { 248 if (cur_head->next != root_head) {
292 next_node = 249 next_node =
293 list_entry(cur_head->next, struct drm_mm_node, ml_entry); 250 list_entry(cur_head->next, struct drm_mm_node, node_list);
294 if (next_node->free) { 251 if (next_node->free) {
295 if (merged) { 252 if (merged) {
296 prev_node->size += next_node->size; 253 prev_node->size += next_node->size;
297 list_del(&next_node->ml_entry); 254 list_del(&next_node->node_list);
298 list_del(&next_node->fl_entry); 255 list_del(&next_node->free_stack);
299 spin_lock(&mm->unused_lock); 256 spin_lock(&mm->unused_lock);
300 if (mm->num_unused < MM_UNUSED_TARGET) { 257 if (mm->num_unused < MM_UNUSED_TARGET) {
301 list_add(&next_node->fl_entry, 258 list_add(&next_node->free_stack,
302 &mm->unused_nodes); 259 &mm->unused_nodes);
303 ++mm->num_unused; 260 ++mm->num_unused;
304 } else 261 } else
@@ -313,12 +270,12 @@ void drm_mm_put_block(struct drm_mm_node *cur)
313 } 270 }
314 if (!merged) { 271 if (!merged) {
315 cur->free = 1; 272 cur->free = 1;
316 list_add(&cur->fl_entry, &mm->fl_entry); 273 list_add(&cur->free_stack, &mm->free_stack);
317 } else { 274 } else {
318 list_del(&cur->ml_entry); 275 list_del(&cur->node_list);
319 spin_lock(&mm->unused_lock); 276 spin_lock(&mm->unused_lock);
320 if (mm->num_unused < MM_UNUSED_TARGET) { 277 if (mm->num_unused < MM_UNUSED_TARGET) {
321 list_add(&cur->fl_entry, &mm->unused_nodes); 278 list_add(&cur->free_stack, &mm->unused_nodes);
322 ++mm->num_unused; 279 ++mm->num_unused;
323 } else 280 } else
324 kfree(cur); 281 kfree(cur);
@@ -328,40 +285,50 @@ void drm_mm_put_block(struct drm_mm_node *cur)
328 285
329EXPORT_SYMBOL(drm_mm_put_block); 286EXPORT_SYMBOL(drm_mm_put_block);
330 287
288static int check_free_mm_node(struct drm_mm_node *entry, unsigned long size,
289 unsigned alignment)
290{
291 unsigned wasted = 0;
292
293 if (entry->size < size)
294 return 0;
295
296 if (alignment) {
297 register unsigned tmp = entry->start % alignment;
298 if (tmp)
299 wasted = alignment - tmp;
300 }
301
302 if (entry->size >= size + wasted) {
303 return 1;
304 }
305
306 return 0;
307}
308
331struct drm_mm_node *drm_mm_search_free(const struct drm_mm *mm, 309struct drm_mm_node *drm_mm_search_free(const struct drm_mm *mm,
332 unsigned long size, 310 unsigned long size,
333 unsigned alignment, int best_match) 311 unsigned alignment, int best_match)
334{ 312{
335 struct list_head *list;
336 const struct list_head *free_stack = &mm->fl_entry;
337 struct drm_mm_node *entry; 313 struct drm_mm_node *entry;
338 struct drm_mm_node *best; 314 struct drm_mm_node *best;
339 unsigned long best_size; 315 unsigned long best_size;
340 unsigned wasted; 316
317 BUG_ON(mm->scanned_blocks);
341 318
342 best = NULL; 319 best = NULL;
343 best_size = ~0UL; 320 best_size = ~0UL;
344 321
345 list_for_each(list, free_stack) { 322 list_for_each_entry(entry, &mm->free_stack, free_stack) {
346 entry = list_entry(list, struct drm_mm_node, fl_entry); 323 if (!check_free_mm_node(entry, size, alignment))
347 wasted = 0;
348
349 if (entry->size < size)
350 continue; 324 continue;
351 325
352 if (alignment) { 326 if (!best_match)
353 register unsigned tmp = entry->start % alignment; 327 return entry;
354 if (tmp)
355 wasted += alignment - tmp;
356 }
357 328
358 if (entry->size >= size + wasted) { 329 if (entry->size < best_size) {
359 if (!best_match) 330 best = entry;
360 return entry; 331 best_size = entry->size;
361 if (entry->size < best_size) {
362 best = entry;
363 best_size = entry->size;
364 }
365 } 332 }
366 } 333 }
367 334
@@ -376,43 +343,28 @@ struct drm_mm_node *drm_mm_search_free_in_range(const struct drm_mm *mm,
376 unsigned long end, 343 unsigned long end,
377 int best_match) 344 int best_match)
378{ 345{
379 struct list_head *list;
380 const struct list_head *free_stack = &mm->fl_entry;
381 struct drm_mm_node *entry; 346 struct drm_mm_node *entry;
382 struct drm_mm_node *best; 347 struct drm_mm_node *best;
383 unsigned long best_size; 348 unsigned long best_size;
384 unsigned wasted; 349
350 BUG_ON(mm->scanned_blocks);
385 351
386 best = NULL; 352 best = NULL;
387 best_size = ~0UL; 353 best_size = ~0UL;
388 354
389 list_for_each(list, free_stack) { 355 list_for_each_entry(entry, &mm->free_stack, free_stack) {
390 entry = list_entry(list, struct drm_mm_node, fl_entry);
391 wasted = 0;
392
393 if (entry->size < size)
394 continue;
395
396 if (entry->start > end || (entry->start+entry->size) < start) 356 if (entry->start > end || (entry->start+entry->size) < start)
397 continue; 357 continue;
398 358
399 if (entry->start < start) 359 if (!check_free_mm_node(entry, size, alignment))
400 wasted += start - entry->start; 360 continue;
401 361
402 if (alignment) { 362 if (!best_match)
403 register unsigned tmp = (entry->start + wasted) % alignment; 363 return entry;
404 if (tmp)
405 wasted += alignment - tmp;
406 }
407 364
408 if (entry->size >= size + wasted && 365 if (entry->size < best_size) {
409 (entry->start + wasted + size) <= end) { 366 best = entry;
410 if (!best_match) 367 best_size = entry->size;
411 return entry;
412 if (entry->size < best_size) {
413 best = entry;
414 best_size = entry->size;
415 }
416 } 368 }
417 } 369 }
418 370
@@ -420,9 +372,161 @@ struct drm_mm_node *drm_mm_search_free_in_range(const struct drm_mm *mm,
420} 372}
421EXPORT_SYMBOL(drm_mm_search_free_in_range); 373EXPORT_SYMBOL(drm_mm_search_free_in_range);
422 374
375/**
376 * Initializa lru scanning.
377 *
378 * This simply sets up the scanning routines with the parameters for the desired
379 * hole.
380 *
381 * Warning: As long as the scan list is non-empty, no other operations than
382 * adding/removing nodes to/from the scan list are allowed.
383 */
384void drm_mm_init_scan(struct drm_mm *mm, unsigned long size,
385 unsigned alignment)
386{
387 mm->scan_alignment = alignment;
388 mm->scan_size = size;
389 mm->scanned_blocks = 0;
390 mm->scan_hit_start = 0;
391 mm->scan_hit_size = 0;
392}
393EXPORT_SYMBOL(drm_mm_init_scan);
394
395/**
396 * Add a node to the scan list that might be freed to make space for the desired
397 * hole.
398 *
399 * Returns non-zero, if a hole has been found, zero otherwise.
400 */
401int drm_mm_scan_add_block(struct drm_mm_node *node)
402{
403 struct drm_mm *mm = node->mm;
404 struct list_head *prev_free, *next_free;
405 struct drm_mm_node *prev_node, *next_node;
406
407 mm->scanned_blocks++;
408
409 prev_free = next_free = NULL;
410
411 BUG_ON(node->free);
412 node->scanned_block = 1;
413 node->free = 1;
414
415 if (node->node_list.prev != &mm->node_list) {
416 prev_node = list_entry(node->node_list.prev, struct drm_mm_node,
417 node_list);
418
419 if (prev_node->free) {
420 list_del(&prev_node->node_list);
421
422 node->start = prev_node->start;
423 node->size += prev_node->size;
424
425 prev_node->scanned_prev_free = 1;
426
427 prev_free = &prev_node->free_stack;
428 }
429 }
430
431 if (node->node_list.next != &mm->node_list) {
432 next_node = list_entry(node->node_list.next, struct drm_mm_node,
433 node_list);
434
435 if (next_node->free) {
436 list_del(&next_node->node_list);
437
438 node->size += next_node->size;
439
440 next_node->scanned_next_free = 1;
441
442 next_free = &next_node->free_stack;
443 }
444 }
445
446 /* The free_stack list is not used for allocated objects, so these two
447 * pointers can be abused (as long as no allocations in this memory
448 * manager happens). */
449 node->free_stack.prev = prev_free;
450 node->free_stack.next = next_free;
451
452 if (check_free_mm_node(node, mm->scan_size, mm->scan_alignment)) {
453 mm->scan_hit_start = node->start;
454 mm->scan_hit_size = node->size;
455
456 return 1;
457 }
458
459 return 0;
460}
461EXPORT_SYMBOL(drm_mm_scan_add_block);
462
463/**
464 * Remove a node from the scan list.
465 *
466 * Nodes _must_ be removed in the exact same order from the scan list as they
467 * have been added, otherwise the internal state of the memory manager will be
468 * corrupted.
469 *
470 * When the scan list is empty, the selected memory nodes can be freed. An
471 * immediatly following drm_mm_search_free with best_match = 0 will then return
472 * the just freed block (because its at the top of the free_stack list).
473 *
474 * Returns one if this block should be evicted, zero otherwise. Will always
475 * return zero when no hole has been found.
476 */
477int drm_mm_scan_remove_block(struct drm_mm_node *node)
478{
479 struct drm_mm *mm = node->mm;
480 struct drm_mm_node *prev_node, *next_node;
481
482 mm->scanned_blocks--;
483
484 BUG_ON(!node->scanned_block);
485 node->scanned_block = 0;
486 node->free = 0;
487
488 prev_node = list_entry(node->free_stack.prev, struct drm_mm_node,
489 free_stack);
490 next_node = list_entry(node->free_stack.next, struct drm_mm_node,
491 free_stack);
492
493 if (prev_node) {
494 BUG_ON(!prev_node->scanned_prev_free);
495 prev_node->scanned_prev_free = 0;
496
497 list_add_tail(&prev_node->node_list, &node->node_list);
498
499 node->start = prev_node->start + prev_node->size;
500 node->size -= prev_node->size;
501 }
502
503 if (next_node) {
504 BUG_ON(!next_node->scanned_next_free);
505 next_node->scanned_next_free = 0;
506
507 list_add(&next_node->node_list, &node->node_list);
508
509 node->size -= next_node->size;
510 }
511
512 INIT_LIST_HEAD(&node->free_stack);
513
514 /* Only need to check for containement because start&size for the
515 * complete resulting free block (not just the desired part) is
516 * stored. */
517 if (node->start >= mm->scan_hit_start &&
518 node->start + node->size
519 <= mm->scan_hit_start + mm->scan_hit_size) {
520 return 1;
521 }
522
523 return 0;
524}
525EXPORT_SYMBOL(drm_mm_scan_remove_block);
526
423int drm_mm_clean(struct drm_mm * mm) 527int drm_mm_clean(struct drm_mm * mm)
424{ 528{
425 struct list_head *head = &mm->ml_entry; 529 struct list_head *head = &mm->node_list;
426 530
427 return (head->next->next == head); 531 return (head->next->next == head);
428} 532}
@@ -430,10 +534,11 @@ EXPORT_SYMBOL(drm_mm_clean);
430 534
431int drm_mm_init(struct drm_mm * mm, unsigned long start, unsigned long size) 535int drm_mm_init(struct drm_mm * mm, unsigned long start, unsigned long size)
432{ 536{
433 INIT_LIST_HEAD(&mm->ml_entry); 537 INIT_LIST_HEAD(&mm->node_list);
434 INIT_LIST_HEAD(&mm->fl_entry); 538 INIT_LIST_HEAD(&mm->free_stack);
435 INIT_LIST_HEAD(&mm->unused_nodes); 539 INIT_LIST_HEAD(&mm->unused_nodes);
436 mm->num_unused = 0; 540 mm->num_unused = 0;
541 mm->scanned_blocks = 0;
437 spin_lock_init(&mm->unused_lock); 542 spin_lock_init(&mm->unused_lock);
438 543
439 return drm_mm_create_tail_node(mm, start, size, 0); 544 return drm_mm_create_tail_node(mm, start, size, 0);
@@ -442,25 +547,25 @@ EXPORT_SYMBOL(drm_mm_init);
442 547
443void drm_mm_takedown(struct drm_mm * mm) 548void drm_mm_takedown(struct drm_mm * mm)
444{ 549{
445 struct list_head *bnode = mm->fl_entry.next; 550 struct list_head *bnode = mm->free_stack.next;
446 struct drm_mm_node *entry; 551 struct drm_mm_node *entry;
447 struct drm_mm_node *next; 552 struct drm_mm_node *next;
448 553
449 entry = list_entry(bnode, struct drm_mm_node, fl_entry); 554 entry = list_entry(bnode, struct drm_mm_node, free_stack);
450 555
451 if (entry->ml_entry.next != &mm->ml_entry || 556 if (entry->node_list.next != &mm->node_list ||
452 entry->fl_entry.next != &mm->fl_entry) { 557 entry->free_stack.next != &mm->free_stack) {
453 DRM_ERROR("Memory manager not clean. Delaying takedown\n"); 558 DRM_ERROR("Memory manager not clean. Delaying takedown\n");
454 return; 559 return;
455 } 560 }
456 561
457 list_del(&entry->fl_entry); 562 list_del(&entry->free_stack);
458 list_del(&entry->ml_entry); 563 list_del(&entry->node_list);
459 kfree(entry); 564 kfree(entry);
460 565
461 spin_lock(&mm->unused_lock); 566 spin_lock(&mm->unused_lock);
462 list_for_each_entry_safe(entry, next, &mm->unused_nodes, fl_entry) { 567 list_for_each_entry_safe(entry, next, &mm->unused_nodes, free_stack) {
463 list_del(&entry->fl_entry); 568 list_del(&entry->free_stack);
464 kfree(entry); 569 kfree(entry);
465 --mm->num_unused; 570 --mm->num_unused;
466 } 571 }
@@ -475,7 +580,7 @@ void drm_mm_debug_table(struct drm_mm *mm, const char *prefix)
475 struct drm_mm_node *entry; 580 struct drm_mm_node *entry;
476 int total_used = 0, total_free = 0, total = 0; 581 int total_used = 0, total_free = 0, total = 0;
477 582
478 list_for_each_entry(entry, &mm->ml_entry, ml_entry) { 583 list_for_each_entry(entry, &mm->node_list, node_list) {
479 printk(KERN_DEBUG "%s 0x%08lx-0x%08lx: %8ld: %s\n", 584 printk(KERN_DEBUG "%s 0x%08lx-0x%08lx: %8ld: %s\n",
480 prefix, entry->start, entry->start + entry->size, 585 prefix, entry->start, entry->start + entry->size,
481 entry->size, entry->free ? "free" : "used"); 586 entry->size, entry->free ? "free" : "used");
@@ -496,7 +601,7 @@ int drm_mm_dump_table(struct seq_file *m, struct drm_mm *mm)
496 struct drm_mm_node *entry; 601 struct drm_mm_node *entry;
497 int total_used = 0, total_free = 0, total = 0; 602 int total_used = 0, total_free = 0, total = 0;
498 603
499 list_for_each_entry(entry, &mm->ml_entry, ml_entry) { 604 list_for_each_entry(entry, &mm->node_list, node_list) {
500 seq_printf(m, "0x%08lx-0x%08lx: 0x%08lx: %s\n", entry->start, entry->start + entry->size, entry->size, entry->free ? "free" : "used"); 605 seq_printf(m, "0x%08lx-0x%08lx: 0x%08lx: %s\n", entry->start, entry->start + entry->size, entry->size, entry->free ? "free" : "used");
501 total += entry->size; 606 total += entry->size;
502 if (entry->free) 607 if (entry->free)
diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c
index 2ea9ad4a8d69..e20f78b542a7 100644
--- a/drivers/gpu/drm/drm_pci.c
+++ b/drivers/gpu/drm/drm_pci.c
@@ -124,4 +124,147 @@ void drm_pci_free(struct drm_device * dev, drm_dma_handle_t * dmah)
124 124
125EXPORT_SYMBOL(drm_pci_free); 125EXPORT_SYMBOL(drm_pci_free);
126 126
127#ifdef CONFIG_PCI
128/**
129 * Register.
130 *
131 * \param pdev - PCI device structure
132 * \param ent entry from the PCI ID table with device type flags
133 * \return zero on success or a negative number on failure.
134 *
135 * Attempt to gets inter module "drm" information. If we are first
136 * then register the character device and inter module information.
137 * Try and register, if we fail to register, backout previous work.
138 */
139int drm_get_pci_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
140 struct drm_driver *driver)
141{
142 struct drm_device *dev;
143 int ret;
144
145 DRM_DEBUG("\n");
146
147 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
148 if (!dev)
149 return -ENOMEM;
150
151 ret = pci_enable_device(pdev);
152 if (ret)
153 goto err_g1;
154
155 pci_set_master(pdev);
156
157 dev->pdev = pdev;
158 dev->dev = &pdev->dev;
159
160 dev->pci_device = pdev->device;
161 dev->pci_vendor = pdev->vendor;
162
163#ifdef __alpha__
164 dev->hose = pdev->sysdata;
165#endif
166
167 if ((ret = drm_fill_in_dev(dev, ent, driver))) {
168 printk(KERN_ERR "DRM: Fill_in_dev failed.\n");
169 goto err_g2;
170 }
171
172 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
173 pci_set_drvdata(pdev, dev);
174 ret = drm_get_minor(dev, &dev->control, DRM_MINOR_CONTROL);
175 if (ret)
176 goto err_g2;
177 }
178
179 if ((ret = drm_get_minor(dev, &dev->primary, DRM_MINOR_LEGACY)))
180 goto err_g3;
181
182 if (dev->driver->load) {
183 ret = dev->driver->load(dev, ent->driver_data);
184 if (ret)
185 goto err_g4;
186 }
187
188 /* setup the grouping for the legacy output */
189 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
190 ret = drm_mode_group_init_legacy_group(dev,
191 &dev->primary->mode_group);
192 if (ret)
193 goto err_g4;
194 }
195
196 list_add_tail(&dev->driver_item, &driver->device_list);
197
198 DRM_INFO("Initialized %s %d.%d.%d %s for %s on minor %d\n",
199 driver->name, driver->major, driver->minor, driver->patchlevel,
200 driver->date, pci_name(pdev), dev->primary->index);
201
202 return 0;
203
204err_g4:
205 drm_put_minor(&dev->primary);
206err_g3:
207 if (drm_core_check_feature(dev, DRIVER_MODESET))
208 drm_put_minor(&dev->control);
209err_g2:
210 pci_disable_device(pdev);
211err_g1:
212 kfree(dev);
213 return ret;
214}
215EXPORT_SYMBOL(drm_get_pci_dev);
216
217/**
218 * PCI device initialization. Called via drm_init at module load time,
219 *
220 * \return zero on success or a negative number on failure.
221 *
222 * Initializes a drm_device structures,registering the
223 * stubs and initializing the AGP device.
224 *
225 * Expands the \c DRIVER_PREINIT and \c DRIVER_POST_INIT macros before and
226 * after the initialization for driver customization.
227 */
228int drm_pci_init(struct drm_driver *driver)
229{
230 struct pci_dev *pdev = NULL;
231 const struct pci_device_id *pid;
232 int i;
233
234 if (driver->driver_features & DRIVER_MODESET)
235 return pci_register_driver(&driver->pci_driver);
236
237 /* If not using KMS, fall back to stealth mode manual scanning. */
238 for (i = 0; driver->pci_driver.id_table[i].vendor != 0; i++) {
239 pid = &driver->pci_driver.id_table[i];
240
241 /* Loop around setting up a DRM device for each PCI device
242 * matching our ID and device class. If we had the internal
243 * function that pci_get_subsys and pci_get_class used, we'd
244 * be able to just pass pid in instead of doing a two-stage
245 * thing.
246 */
247 pdev = NULL;
248 while ((pdev =
249 pci_get_subsys(pid->vendor, pid->device, pid->subvendor,
250 pid->subdevice, pdev)) != NULL) {
251 if ((pdev->class & pid->class_mask) != pid->class)
252 continue;
253
254 /* stealth mode requires a manual probe */
255 pci_dev_get(pdev);
256 drm_get_pci_dev(pdev, pid, driver);
257 }
258 }
259 return 0;
260}
261
262#else
263
264int drm_pci_init(struct drm_driver *driver)
265{
266 return -1;
267}
268
269#endif
127/*@}*/ 270/*@}*/
diff --git a/drivers/gpu/drm/drm_platform.c b/drivers/gpu/drm/drm_platform.c
new file mode 100644
index 000000000000..460e9a3afa8d
--- /dev/null
+++ b/drivers/gpu/drm/drm_platform.c
@@ -0,0 +1,122 @@
1/*
2 * Derived from drm_pci.c
3 *
4 * Copyright 2003 José Fonseca.
5 * Copyright 2003 Leif Delgass.
6 * Copyright (c) 2009, Code Aurora Forum.
7 * All Rights Reserved.
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the next
17 * paragraph) shall be included in all copies or substantial portions of the
18 * Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
23 * AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
24 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 */
27
28#include "drmP.h"
29
30/**
31 * Register.
32 *
33 * \param platdev - Platform device struture
34 * \return zero on success or a negative number on failure.
35 *
36 * Attempt to gets inter module "drm" information. If we are first
37 * then register the character device and inter module information.
38 * Try and register, if we fail to register, backout previous work.
39 */
40
41int drm_get_platform_dev(struct platform_device *platdev,
42 struct drm_driver *driver)
43{
44 struct drm_device *dev;
45 int ret;
46
47 DRM_DEBUG("\n");
48
49 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
50 if (!dev)
51 return -ENOMEM;
52
53 dev->platformdev = platdev;
54 dev->dev = &platdev->dev;
55
56 ret = drm_fill_in_dev(dev, NULL, driver);
57
58 if (ret) {
59 printk(KERN_ERR "DRM: Fill_in_dev failed.\n");
60 goto err_g1;
61 }
62
63 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
64 dev_set_drvdata(&platdev->dev, dev);
65 ret = drm_get_minor(dev, &dev->control, DRM_MINOR_CONTROL);
66 if (ret)
67 goto err_g1;
68 }
69
70 ret = drm_get_minor(dev, &dev->primary, DRM_MINOR_LEGACY);
71 if (ret)
72 goto err_g2;
73
74 if (dev->driver->load) {
75 ret = dev->driver->load(dev, 0);
76 if (ret)
77 goto err_g3;
78 }
79
80 /* setup the grouping for the legacy output */
81 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
82 ret = drm_mode_group_init_legacy_group(dev,
83 &dev->primary->mode_group);
84 if (ret)
85 goto err_g3;
86 }
87
88 list_add_tail(&dev->driver_item, &driver->device_list);
89
90 DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n",
91 driver->name, driver->major, driver->minor, driver->patchlevel,
92 driver->date, dev->primary->index);
93
94 return 0;
95
96err_g3:
97 drm_put_minor(&dev->primary);
98err_g2:
99 if (drm_core_check_feature(dev, DRIVER_MODESET))
100 drm_put_minor(&dev->control);
101err_g1:
102 kfree(dev);
103 return ret;
104}
105EXPORT_SYMBOL(drm_get_platform_dev);
106
107/**
108 * Platform device initialization. Called via drm_init at module load time,
109 *
110 * \return zero on success or a negative number on failure.
111 *
112 * Initializes a drm_device structures,registering the
113 * stubs
114 *
115 * Expands the \c DRIVER_PREINIT and \c DRIVER_POST_INIT macros before and
116 * after the initialization for driver customization.
117 */
118
119int drm_platform_init(struct drm_driver *driver)
120{
121 return drm_get_platform_dev(driver->platform_device, driver);
122}
diff --git a/drivers/gpu/drm/drm_stub.c b/drivers/gpu/drm/drm_stub.c
index a0c365f2e521..d1ad57450df1 100644
--- a/drivers/gpu/drm/drm_stub.c
+++ b/drivers/gpu/drm/drm_stub.c
@@ -156,6 +156,9 @@ static void drm_master_destroy(struct kref *kref)
156 master->unique_len = 0; 156 master->unique_len = 0;
157 } 157 }
158 158
159 kfree(dev->devname);
160 dev->devname = NULL;
161
159 list_for_each_entry_safe(pt, next, &master->magicfree, head) { 162 list_for_each_entry_safe(pt, next, &master->magicfree, head) {
160 list_del(&pt->head); 163 list_del(&pt->head);
161 drm_ht_remove_item(&master->magiclist, &pt->hash_item); 164 drm_ht_remove_item(&master->magiclist, &pt->hash_item);
@@ -224,7 +227,7 @@ int drm_dropmaster_ioctl(struct drm_device *dev, void *data,
224 return 0; 227 return 0;
225} 228}
226 229
227static int drm_fill_in_dev(struct drm_device * dev, struct pci_dev *pdev, 230int drm_fill_in_dev(struct drm_device *dev,
228 const struct pci_device_id *ent, 231 const struct pci_device_id *ent,
229 struct drm_driver *driver) 232 struct drm_driver *driver)
230{ 233{
@@ -245,14 +248,6 @@ static int drm_fill_in_dev(struct drm_device * dev, struct pci_dev *pdev,
245 248
246 idr_init(&dev->drw_idr); 249 idr_init(&dev->drw_idr);
247 250
248 dev->pdev = pdev;
249 dev->pci_device = pdev->device;
250 dev->pci_vendor = pdev->vendor;
251
252#ifdef __alpha__
253 dev->hose = pdev->sysdata;
254#endif
255
256 if (drm_ht_create(&dev->map_hash, 12)) { 251 if (drm_ht_create(&dev->map_hash, 12)) {
257 return -ENOMEM; 252 return -ENOMEM;
258 } 253 }
@@ -321,7 +316,7 @@ static int drm_fill_in_dev(struct drm_device * dev, struct pci_dev *pdev,
321 * create the proc init entry via proc_init(). This routines assigns 316 * create the proc init entry via proc_init(). This routines assigns
322 * minor numbers to secondary heads of multi-headed cards 317 * minor numbers to secondary heads of multi-headed cards
323 */ 318 */
324static int drm_get_minor(struct drm_device *dev, struct drm_minor **minor, int type) 319int drm_get_minor(struct drm_device *dev, struct drm_minor **minor, int type)
325{ 320{
326 struct drm_minor *new_minor; 321 struct drm_minor *new_minor;
327 int ret; 322 int ret;
@@ -388,83 +383,6 @@ err_idr:
388} 383}
389 384
390/** 385/**
391 * Register.
392 *
393 * \param pdev - PCI device structure
394 * \param ent entry from the PCI ID table with device type flags
395 * \return zero on success or a negative number on failure.
396 *
397 * Attempt to gets inter module "drm" information. If we are first
398 * then register the character device and inter module information.
399 * Try and register, if we fail to register, backout previous work.
400 */
401int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
402 struct drm_driver *driver)
403{
404 struct drm_device *dev;
405 int ret;
406
407 DRM_DEBUG("\n");
408
409 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
410 if (!dev)
411 return -ENOMEM;
412
413 ret = pci_enable_device(pdev);
414 if (ret)
415 goto err_g1;
416
417 pci_set_master(pdev);
418 if ((ret = drm_fill_in_dev(dev, pdev, ent, driver))) {
419 printk(KERN_ERR "DRM: Fill_in_dev failed.\n");
420 goto err_g2;
421 }
422
423 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
424 pci_set_drvdata(pdev, dev);
425 ret = drm_get_minor(dev, &dev->control, DRM_MINOR_CONTROL);
426 if (ret)
427 goto err_g2;
428 }
429
430 if ((ret = drm_get_minor(dev, &dev->primary, DRM_MINOR_LEGACY)))
431 goto err_g3;
432
433 if (dev->driver->load) {
434 ret = dev->driver->load(dev, ent->driver_data);
435 if (ret)
436 goto err_g4;
437 }
438
439 /* setup the grouping for the legacy output */
440 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
441 ret = drm_mode_group_init_legacy_group(dev, &dev->primary->mode_group);
442 if (ret)
443 goto err_g4;
444 }
445
446 list_add_tail(&dev->driver_item, &driver->device_list);
447
448 DRM_INFO("Initialized %s %d.%d.%d %s for %s on minor %d\n",
449 driver->name, driver->major, driver->minor, driver->patchlevel,
450 driver->date, pci_name(pdev), dev->primary->index);
451
452 return 0;
453
454err_g4:
455 drm_put_minor(&dev->primary);
456err_g3:
457 if (drm_core_check_feature(dev, DRIVER_MODESET))
458 drm_put_minor(&dev->control);
459err_g2:
460 pci_disable_device(pdev);
461err_g1:
462 kfree(dev);
463 return ret;
464}
465EXPORT_SYMBOL(drm_get_dev);
466
467/**
468 * Put a secondary minor number. 386 * Put a secondary minor number.
469 * 387 *
470 * \param sec_minor - structure to be released 388 * \param sec_minor - structure to be released
diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c
index 101d381e9d86..86118a742231 100644
--- a/drivers/gpu/drm/drm_sysfs.c
+++ b/drivers/gpu/drm/drm_sysfs.c
@@ -489,7 +489,8 @@ int drm_sysfs_device_add(struct drm_minor *minor)
489 int err; 489 int err;
490 char *minor_str; 490 char *minor_str;
491 491
492 minor->kdev.parent = &minor->dev->pdev->dev; 492 minor->kdev.parent = minor->dev->dev;
493
493 minor->kdev.class = drm_class; 494 minor->kdev.class = drm_class;
494 minor->kdev.release = drm_sysfs_device_release; 495 minor->kdev.release = drm_sysfs_device_release;
495 minor->kdev.devt = minor->device; 496 minor->kdev.devt = minor->device;
diff --git a/drivers/gpu/drm/drm_trace.h b/drivers/gpu/drm/drm_trace.h
new file mode 100644
index 000000000000..03ea964aa604
--- /dev/null
+++ b/drivers/gpu/drm/drm_trace.h
@@ -0,0 +1,66 @@
1#if !defined(_DRM_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ)
2#define _DRM_TRACE_H_
3
4#include <linux/stringify.h>
5#include <linux/types.h>
6#include <linux/tracepoint.h>
7
8#undef TRACE_SYSTEM
9#define TRACE_SYSTEM drm
10#define TRACE_SYSTEM_STRING __stringify(TRACE_SYSTEM)
11#define TRACE_INCLUDE_FILE drm_trace
12
13TRACE_EVENT(drm_vblank_event,
14 TP_PROTO(int crtc, unsigned int seq),
15 TP_ARGS(crtc, seq),
16 TP_STRUCT__entry(
17 __field(int, crtc)
18 __field(unsigned int, seq)
19 ),
20 TP_fast_assign(
21 __entry->crtc = crtc;
22 __entry->seq = seq;
23 ),
24 TP_printk("crtc=%d, seq=%d", __entry->crtc, __entry->seq)
25);
26
27TRACE_EVENT(drm_vblank_event_queued,
28 TP_PROTO(pid_t pid, int crtc, unsigned int seq),
29 TP_ARGS(pid, crtc, seq),
30 TP_STRUCT__entry(
31 __field(pid_t, pid)
32 __field(int, crtc)
33 __field(unsigned int, seq)
34 ),
35 TP_fast_assign(
36 __entry->pid = pid;
37 __entry->crtc = crtc;
38 __entry->seq = seq;
39 ),
40 TP_printk("pid=%d, crtc=%d, seq=%d", __entry->pid, __entry->crtc, \
41 __entry->seq)
42);
43
44TRACE_EVENT(drm_vblank_event_delivered,
45 TP_PROTO(pid_t pid, int crtc, unsigned int seq),
46 TP_ARGS(pid, crtc, seq),
47 TP_STRUCT__entry(
48 __field(pid_t, pid)
49 __field(int, crtc)
50 __field(unsigned int, seq)
51 ),
52 TP_fast_assign(
53 __entry->pid = pid;
54 __entry->crtc = crtc;
55 __entry->seq = seq;
56 ),
57 TP_printk("pid=%d, crtc=%d, seq=%d", __entry->pid, __entry->crtc, \
58 __entry->seq)
59);
60
61#endif /* _DRM_TRACE_H_ */
62
63/* This part must be outside protection */
64#undef TRACE_INCLUDE_PATH
65#define TRACE_INCLUDE_PATH .
66#include <trace/define_trace.h>
diff --git a/drivers/gpu/drm/drm_trace_points.c b/drivers/gpu/drm/drm_trace_points.c
new file mode 100644
index 000000000000..0d0eb90864ae
--- /dev/null
+++ b/drivers/gpu/drm/drm_trace_points.c
@@ -0,0 +1,4 @@
1#include "drmP.h"
2
3#define CREATE_TRACE_POINTS
4#include "drm_trace.h"
diff --git a/drivers/gpu/drm/drm_vm.c b/drivers/gpu/drm/drm_vm.c
index c3b13fb41d0c..3778360eceea 100644
--- a/drivers/gpu/drm/drm_vm.c
+++ b/drivers/gpu/drm/drm_vm.c
@@ -61,7 +61,7 @@ static pgprot_t drm_io_prot(uint32_t map_type, struct vm_area_struct *vma)
61 tmp = pgprot_writecombine(tmp); 61 tmp = pgprot_writecombine(tmp);
62 else 62 else
63 tmp = pgprot_noncached(tmp); 63 tmp = pgprot_noncached(tmp);
64#elif defined(__sparc__) 64#elif defined(__sparc__) || defined(__arm__)
65 tmp = pgprot_noncached(tmp); 65 tmp = pgprot_noncached(tmp);
66#endif 66#endif
67 return tmp; 67 return tmp;
@@ -601,6 +601,7 @@ int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma)
601 } 601 }
602 602
603 switch (map->type) { 603 switch (map->type) {
604#if !defined(__arm__)
604 case _DRM_AGP: 605 case _DRM_AGP:
605 if (drm_core_has_AGP(dev) && dev->agp->cant_use_aperture) { 606 if (drm_core_has_AGP(dev) && dev->agp->cant_use_aperture) {
606 /* 607 /*
@@ -615,20 +616,31 @@ int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma)
615 break; 616 break;
616 } 617 }
617 /* fall through to _DRM_FRAME_BUFFER... */ 618 /* fall through to _DRM_FRAME_BUFFER... */
619#endif
618 case _DRM_FRAME_BUFFER: 620 case _DRM_FRAME_BUFFER:
619 case _DRM_REGISTERS: 621 case _DRM_REGISTERS:
620 offset = dev->driver->get_reg_ofs(dev); 622 offset = dev->driver->get_reg_ofs(dev);
621 vma->vm_flags |= VM_IO; /* not in core dump */ 623 vma->vm_flags |= VM_IO; /* not in core dump */
622 vma->vm_page_prot = drm_io_prot(map->type, vma); 624 vma->vm_page_prot = drm_io_prot(map->type, vma);
625#if !defined(__arm__)
623 if (io_remap_pfn_range(vma, vma->vm_start, 626 if (io_remap_pfn_range(vma, vma->vm_start,
624 (map->offset + offset) >> PAGE_SHIFT, 627 (map->offset + offset) >> PAGE_SHIFT,
625 vma->vm_end - vma->vm_start, 628 vma->vm_end - vma->vm_start,
626 vma->vm_page_prot)) 629 vma->vm_page_prot))
627 return -EAGAIN; 630 return -EAGAIN;
631#else
632 if (remap_pfn_range(vma, vma->vm_start,
633 (map->offset + offset) >> PAGE_SHIFT,
634 vma->vm_end - vma->vm_start,
635 vma->vm_page_prot))
636 return -EAGAIN;
637#endif
638
628 DRM_DEBUG(" Type = %d; start = 0x%lx, end = 0x%lx," 639 DRM_DEBUG(" Type = %d; start = 0x%lx, end = 0x%lx,"
629 " offset = 0x%llx\n", 640 " offset = 0x%llx\n",
630 map->type, 641 map->type,
631 vma->vm_start, vma->vm_end, (unsigned long long)(map->offset + offset)); 642 vma->vm_start, vma->vm_end, (unsigned long long)(map->offset + offset));
643
632 vma->vm_ops = &drm_vm_ops; 644 vma->vm_ops = &drm_vm_ops;
633 break; 645 break;
634 case _DRM_CONSISTENT: 646 case _DRM_CONSISTENT:
diff --git a/drivers/gpu/drm/i2c/Makefile b/drivers/gpu/drm/i2c/Makefile
index 6d2abaf35ba2..92862563e7ee 100644
--- a/drivers/gpu/drm/i2c/Makefile
+++ b/drivers/gpu/drm/i2c/Makefile
@@ -2,3 +2,6 @@ ccflags-y := -Iinclude/drm
2 2
3ch7006-y := ch7006_drv.o ch7006_mode.o 3ch7006-y := ch7006_drv.o ch7006_mode.o
4obj-$(CONFIG_DRM_I2C_CH7006) += ch7006.o 4obj-$(CONFIG_DRM_I2C_CH7006) += ch7006.o
5
6sil164-y := sil164_drv.o
7obj-$(CONFIG_DRM_I2C_SIL164) += sil164.o
diff --git a/drivers/gpu/drm/i2c/ch7006_drv.c b/drivers/gpu/drm/i2c/ch7006_drv.c
index 81681a07a806..833b35f44a77 100644
--- a/drivers/gpu/drm/i2c/ch7006_drv.c
+++ b/drivers/gpu/drm/i2c/ch7006_drv.c
@@ -33,7 +33,7 @@ static void ch7006_encoder_set_config(struct drm_encoder *encoder,
33{ 33{
34 struct ch7006_priv *priv = to_ch7006_priv(encoder); 34 struct ch7006_priv *priv = to_ch7006_priv(encoder);
35 35
36 priv->params = params; 36 priv->params = *(struct ch7006_encoder_params *)params;
37} 37}
38 38
39static void ch7006_encoder_destroy(struct drm_encoder *encoder) 39static void ch7006_encoder_destroy(struct drm_encoder *encoder)
@@ -114,7 +114,7 @@ static void ch7006_encoder_mode_set(struct drm_encoder *encoder,
114{ 114{
115 struct i2c_client *client = drm_i2c_encoder_get_client(encoder); 115 struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
116 struct ch7006_priv *priv = to_ch7006_priv(encoder); 116 struct ch7006_priv *priv = to_ch7006_priv(encoder);
117 struct ch7006_encoder_params *params = priv->params; 117 struct ch7006_encoder_params *params = &priv->params;
118 struct ch7006_state *state = &priv->state; 118 struct ch7006_state *state = &priv->state;
119 uint8_t *regs = state->regs; 119 uint8_t *regs = state->regs;
120 struct ch7006_mode *mode = priv->mode; 120 struct ch7006_mode *mode = priv->mode;
@@ -428,6 +428,22 @@ static int ch7006_remove(struct i2c_client *client)
428 return 0; 428 return 0;
429} 429}
430 430
431static int ch7006_suspend(struct i2c_client *client, pm_message_t mesg)
432{
433 ch7006_dbg(client, "\n");
434
435 return 0;
436}
437
438static int ch7006_resume(struct i2c_client *client)
439{
440 ch7006_dbg(client, "\n");
441
442 ch7006_write(client, 0x3d, 0x0);
443
444 return 0;
445}
446
431static int ch7006_encoder_init(struct i2c_client *client, 447static int ch7006_encoder_init(struct i2c_client *client,
432 struct drm_device *dev, 448 struct drm_device *dev,
433 struct drm_encoder_slave *encoder) 449 struct drm_encoder_slave *encoder)
@@ -487,6 +503,8 @@ static struct drm_i2c_encoder_driver ch7006_driver = {
487 .i2c_driver = { 503 .i2c_driver = {
488 .probe = ch7006_probe, 504 .probe = ch7006_probe,
489 .remove = ch7006_remove, 505 .remove = ch7006_remove,
506 .suspend = ch7006_suspend,
507 .resume = ch7006_resume,
490 508
491 .driver = { 509 .driver = {
492 .name = "ch7006", 510 .name = "ch7006",
diff --git a/drivers/gpu/drm/i2c/ch7006_priv.h b/drivers/gpu/drm/i2c/ch7006_priv.h
index b06d3d93d8ac..1c6d2e3bd96f 100644
--- a/drivers/gpu/drm/i2c/ch7006_priv.h
+++ b/drivers/gpu/drm/i2c/ch7006_priv.h
@@ -77,7 +77,7 @@ struct ch7006_state {
77}; 77};
78 78
79struct ch7006_priv { 79struct ch7006_priv {
80 struct ch7006_encoder_params *params; 80 struct ch7006_encoder_params params;
81 struct ch7006_mode *mode; 81 struct ch7006_mode *mode;
82 82
83 struct ch7006_state state; 83 struct ch7006_state state;
diff --git a/drivers/gpu/drm/i2c/sil164_drv.c b/drivers/gpu/drm/i2c/sil164_drv.c
new file mode 100644
index 000000000000..0b6773290c08
--- /dev/null
+++ b/drivers/gpu/drm/i2c/sil164_drv.c
@@ -0,0 +1,462 @@
1/*
2 * Copyright (C) 2010 Francisco Jerez.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
27#include "drmP.h"
28#include "drm_crtc_helper.h"
29#include "drm_encoder_slave.h"
30#include "i2c/sil164.h"
31
32struct sil164_priv {
33 struct sil164_encoder_params config;
34 struct i2c_client *duallink_slave;
35
36 uint8_t saved_state[0x10];
37 uint8_t saved_slave_state[0x10];
38};
39
40#define to_sil164_priv(x) \
41 ((struct sil164_priv *)to_encoder_slave(x)->slave_priv)
42
43#define sil164_dbg(client, format, ...) do { \
44 if (drm_debug & DRM_UT_KMS) \
45 dev_printk(KERN_DEBUG, &client->dev, \
46 "%s: " format, __func__, ## __VA_ARGS__); \
47 } while (0)
48#define sil164_info(client, format, ...) \
49 dev_info(&client->dev, format, __VA_ARGS__)
50#define sil164_err(client, format, ...) \
51 dev_err(&client->dev, format, __VA_ARGS__)
52
53#define SIL164_I2C_ADDR_MASTER 0x38
54#define SIL164_I2C_ADDR_SLAVE 0x39
55
56/* HW register definitions */
57
58#define SIL164_VENDOR_LO 0x0
59#define SIL164_VENDOR_HI 0x1
60#define SIL164_DEVICE_LO 0x2
61#define SIL164_DEVICE_HI 0x3
62#define SIL164_REVISION 0x4
63#define SIL164_FREQ_MIN 0x6
64#define SIL164_FREQ_MAX 0x7
65#define SIL164_CONTROL0 0x8
66# define SIL164_CONTROL0_POWER_ON 0x01
67# define SIL164_CONTROL0_EDGE_RISING 0x02
68# define SIL164_CONTROL0_INPUT_24BIT 0x04
69# define SIL164_CONTROL0_DUAL_EDGE 0x08
70# define SIL164_CONTROL0_HSYNC_ON 0x10
71# define SIL164_CONTROL0_VSYNC_ON 0x20
72#define SIL164_DETECT 0x9
73# define SIL164_DETECT_INTR_STAT 0x01
74# define SIL164_DETECT_HOTPLUG_STAT 0x02
75# define SIL164_DETECT_RECEIVER_STAT 0x04
76# define SIL164_DETECT_INTR_MODE_RECEIVER 0x00
77# define SIL164_DETECT_INTR_MODE_HOTPLUG 0x08
78# define SIL164_DETECT_OUT_MODE_HIGH 0x00
79# define SIL164_DETECT_OUT_MODE_INTR 0x10
80# define SIL164_DETECT_OUT_MODE_RECEIVER 0x20
81# define SIL164_DETECT_OUT_MODE_HOTPLUG 0x30
82# define SIL164_DETECT_VSWING_STAT 0x80
83#define SIL164_CONTROL1 0xa
84# define SIL164_CONTROL1_DESKEW_ENABLE 0x10
85# define SIL164_CONTROL1_DESKEW_INCR_SHIFT 5
86#define SIL164_GPIO 0xb
87#define SIL164_CONTROL2 0xc
88# define SIL164_CONTROL2_FILTER_ENABLE 0x01
89# define SIL164_CONTROL2_FILTER_SETTING_SHIFT 1
90# define SIL164_CONTROL2_DUALLINK_MASTER 0x40
91# define SIL164_CONTROL2_SYNC_CONT 0x80
92#define SIL164_DUALLINK 0xd
93# define SIL164_DUALLINK_ENABLE 0x10
94# define SIL164_DUALLINK_SKEW_SHIFT 5
95#define SIL164_PLLZONE 0xe
96# define SIL164_PLLZONE_STAT 0x08
97# define SIL164_PLLZONE_FORCE_ON 0x10
98# define SIL164_PLLZONE_FORCE_HIGH 0x20
99
100/* HW access functions */
101
102static void
103sil164_write(struct i2c_client *client, uint8_t addr, uint8_t val)
104{
105 uint8_t buf[] = {addr, val};
106 int ret;
107
108 ret = i2c_master_send(client, buf, ARRAY_SIZE(buf));
109 if (ret < 0)
110 sil164_err(client, "Error %d writing to subaddress 0x%x\n",
111 ret, addr);
112}
113
114static uint8_t
115sil164_read(struct i2c_client *client, uint8_t addr)
116{
117 uint8_t val;
118 int ret;
119
120 ret = i2c_master_send(client, &addr, sizeof(addr));
121 if (ret < 0)
122 goto fail;
123
124 ret = i2c_master_recv(client, &val, sizeof(val));
125 if (ret < 0)
126 goto fail;
127
128 return val;
129
130fail:
131 sil164_err(client, "Error %d reading from subaddress 0x%x\n",
132 ret, addr);
133 return 0;
134}
135
136static void
137sil164_save_state(struct i2c_client *client, uint8_t *state)
138{
139 int i;
140
141 for (i = 0x8; i <= 0xe; i++)
142 state[i] = sil164_read(client, i);
143}
144
145static void
146sil164_restore_state(struct i2c_client *client, uint8_t *state)
147{
148 int i;
149
150 for (i = 0x8; i <= 0xe; i++)
151 sil164_write(client, i, state[i]);
152}
153
154static void
155sil164_set_power_state(struct i2c_client *client, bool on)
156{
157 uint8_t control0 = sil164_read(client, SIL164_CONTROL0);
158
159 if (on)
160 control0 |= SIL164_CONTROL0_POWER_ON;
161 else
162 control0 &= ~SIL164_CONTROL0_POWER_ON;
163
164 sil164_write(client, SIL164_CONTROL0, control0);
165}
166
167static void
168sil164_init_state(struct i2c_client *client,
169 struct sil164_encoder_params *config,
170 bool duallink)
171{
172 sil164_write(client, SIL164_CONTROL0,
173 SIL164_CONTROL0_HSYNC_ON |
174 SIL164_CONTROL0_VSYNC_ON |
175 (config->input_edge ? SIL164_CONTROL0_EDGE_RISING : 0) |
176 (config->input_width ? SIL164_CONTROL0_INPUT_24BIT : 0) |
177 (config->input_dual ? SIL164_CONTROL0_DUAL_EDGE : 0));
178
179 sil164_write(client, SIL164_DETECT,
180 SIL164_DETECT_INTR_STAT |
181 SIL164_DETECT_OUT_MODE_RECEIVER);
182
183 sil164_write(client, SIL164_CONTROL1,
184 (config->input_skew ? SIL164_CONTROL1_DESKEW_ENABLE : 0) |
185 (((config->input_skew + 4) & 0x7)
186 << SIL164_CONTROL1_DESKEW_INCR_SHIFT));
187
188 sil164_write(client, SIL164_CONTROL2,
189 SIL164_CONTROL2_SYNC_CONT |
190 (config->pll_filter ? 0 : SIL164_CONTROL2_FILTER_ENABLE) |
191 (4 << SIL164_CONTROL2_FILTER_SETTING_SHIFT));
192
193 sil164_write(client, SIL164_PLLZONE, 0);
194
195 if (duallink)
196 sil164_write(client, SIL164_DUALLINK,
197 SIL164_DUALLINK_ENABLE |
198 (((config->duallink_skew + 4) & 0x7)
199 << SIL164_DUALLINK_SKEW_SHIFT));
200 else
201 sil164_write(client, SIL164_DUALLINK, 0);
202}
203
204/* DRM encoder functions */
205
206static void
207sil164_encoder_set_config(struct drm_encoder *encoder, void *params)
208{
209 struct sil164_priv *priv = to_sil164_priv(encoder);
210
211 priv->config = *(struct sil164_encoder_params *)params;
212}
213
214static void
215sil164_encoder_dpms(struct drm_encoder *encoder, int mode)
216{
217 struct sil164_priv *priv = to_sil164_priv(encoder);
218 bool on = (mode == DRM_MODE_DPMS_ON);
219 bool duallink = (on && encoder->crtc->mode.clock > 165000);
220
221 sil164_set_power_state(drm_i2c_encoder_get_client(encoder), on);
222
223 if (priv->duallink_slave)
224 sil164_set_power_state(priv->duallink_slave, duallink);
225}
226
227static void
228sil164_encoder_save(struct drm_encoder *encoder)
229{
230 struct sil164_priv *priv = to_sil164_priv(encoder);
231
232 sil164_save_state(drm_i2c_encoder_get_client(encoder),
233 priv->saved_state);
234
235 if (priv->duallink_slave)
236 sil164_save_state(priv->duallink_slave,
237 priv->saved_slave_state);
238}
239
240static void
241sil164_encoder_restore(struct drm_encoder *encoder)
242{
243 struct sil164_priv *priv = to_sil164_priv(encoder);
244
245 sil164_restore_state(drm_i2c_encoder_get_client(encoder),
246 priv->saved_state);
247
248 if (priv->duallink_slave)
249 sil164_restore_state(priv->duallink_slave,
250 priv->saved_slave_state);
251}
252
253static bool
254sil164_encoder_mode_fixup(struct drm_encoder *encoder,
255 struct drm_display_mode *mode,
256 struct drm_display_mode *adjusted_mode)
257{
258 return true;
259}
260
261static int
262sil164_encoder_mode_valid(struct drm_encoder *encoder,
263 struct drm_display_mode *mode)
264{
265 struct sil164_priv *priv = to_sil164_priv(encoder);
266
267 if (mode->clock < 32000)
268 return MODE_CLOCK_LOW;
269
270 if (mode->clock > 330000 ||
271 (mode->clock > 165000 && !priv->duallink_slave))
272 return MODE_CLOCK_HIGH;
273
274 return MODE_OK;
275}
276
277static void
278sil164_encoder_mode_set(struct drm_encoder *encoder,
279 struct drm_display_mode *mode,
280 struct drm_display_mode *adjusted_mode)
281{
282 struct sil164_priv *priv = to_sil164_priv(encoder);
283 bool duallink = adjusted_mode->clock > 165000;
284
285 sil164_init_state(drm_i2c_encoder_get_client(encoder),
286 &priv->config, duallink);
287
288 if (priv->duallink_slave)
289 sil164_init_state(priv->duallink_slave,
290 &priv->config, duallink);
291
292 sil164_encoder_dpms(encoder, DRM_MODE_DPMS_ON);
293}
294
295static enum drm_connector_status
296sil164_encoder_detect(struct drm_encoder *encoder,
297 struct drm_connector *connector)
298{
299 struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
300
301 if (sil164_read(client, SIL164_DETECT) & SIL164_DETECT_HOTPLUG_STAT)
302 return connector_status_connected;
303 else
304 return connector_status_disconnected;
305}
306
307static int
308sil164_encoder_get_modes(struct drm_encoder *encoder,
309 struct drm_connector *connector)
310{
311 return 0;
312}
313
314static int
315sil164_encoder_create_resources(struct drm_encoder *encoder,
316 struct drm_connector *connector)
317{
318 return 0;
319}
320
321static int
322sil164_encoder_set_property(struct drm_encoder *encoder,
323 struct drm_connector *connector,
324 struct drm_property *property,
325 uint64_t val)
326{
327 return 0;
328}
329
330static void
331sil164_encoder_destroy(struct drm_encoder *encoder)
332{
333 struct sil164_priv *priv = to_sil164_priv(encoder);
334
335 if (priv->duallink_slave)
336 i2c_unregister_device(priv->duallink_slave);
337
338 kfree(priv);
339 drm_i2c_encoder_destroy(encoder);
340}
341
342static struct drm_encoder_slave_funcs sil164_encoder_funcs = {
343 .set_config = sil164_encoder_set_config,
344 .destroy = sil164_encoder_destroy,
345 .dpms = sil164_encoder_dpms,
346 .save = sil164_encoder_save,
347 .restore = sil164_encoder_restore,
348 .mode_fixup = sil164_encoder_mode_fixup,
349 .mode_valid = sil164_encoder_mode_valid,
350 .mode_set = sil164_encoder_mode_set,
351 .detect = sil164_encoder_detect,
352 .get_modes = sil164_encoder_get_modes,
353 .create_resources = sil164_encoder_create_resources,
354 .set_property = sil164_encoder_set_property,
355};
356
357/* I2C driver functions */
358
359static int
360sil164_probe(struct i2c_client *client, const struct i2c_device_id *id)
361{
362 int vendor = sil164_read(client, SIL164_VENDOR_HI) << 8 |
363 sil164_read(client, SIL164_VENDOR_LO);
364 int device = sil164_read(client, SIL164_DEVICE_HI) << 8 |
365 sil164_read(client, SIL164_DEVICE_LO);
366 int rev = sil164_read(client, SIL164_REVISION);
367
368 if (vendor != 0x1 || device != 0x6) {
369 sil164_dbg(client, "Unknown device %x:%x.%x\n",
370 vendor, device, rev);
371 return -ENODEV;
372 }
373
374 sil164_info(client, "Detected device %x:%x.%x\n",
375 vendor, device, rev);
376
377 return 0;
378}
379
380static int
381sil164_remove(struct i2c_client *client)
382{
383 return 0;
384}
385
386static struct i2c_client *
387sil164_detect_slave(struct i2c_client *client)
388{
389 struct i2c_adapter *adap = client->adapter;
390 struct i2c_msg msg = {
391 .addr = SIL164_I2C_ADDR_SLAVE,
392 .len = 0,
393 };
394 const struct i2c_board_info info = {
395 I2C_BOARD_INFO("sil164", SIL164_I2C_ADDR_SLAVE)
396 };
397
398 if (i2c_transfer(adap, &msg, 1) != 1) {
399 sil164_dbg(adap, "No dual-link slave found.");
400 return NULL;
401 }
402
403 return i2c_new_device(adap, &info);
404}
405
406static int
407sil164_encoder_init(struct i2c_client *client,
408 struct drm_device *dev,
409 struct drm_encoder_slave *encoder)
410{
411 struct sil164_priv *priv;
412
413 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
414 if (!priv)
415 return -ENOMEM;
416
417 encoder->slave_priv = priv;
418 encoder->slave_funcs = &sil164_encoder_funcs;
419
420 priv->duallink_slave = sil164_detect_slave(client);
421
422 return 0;
423}
424
425static struct i2c_device_id sil164_ids[] = {
426 { "sil164", 0 },
427 { }
428};
429MODULE_DEVICE_TABLE(i2c, sil164_ids);
430
431static struct drm_i2c_encoder_driver sil164_driver = {
432 .i2c_driver = {
433 .probe = sil164_probe,
434 .remove = sil164_remove,
435 .driver = {
436 .name = "sil164",
437 },
438 .id_table = sil164_ids,
439 },
440 .encoder_init = sil164_encoder_init,
441};
442
443/* Module initialization */
444
445static int __init
446sil164_init(void)
447{
448 return drm_i2c_encoder_register(THIS_MODULE, &sil164_driver);
449}
450
451static void __exit
452sil164_exit(void)
453{
454 drm_i2c_encoder_unregister(&sil164_driver);
455}
456
457MODULE_AUTHOR("Francisco Jerez <currojerez@riseup.net>");
458MODULE_DESCRIPTION("Silicon Image sil164 TMDS transmitter driver");
459MODULE_LICENSE("GPL and additional rights");
460
461module_init(sil164_init);
462module_exit(sil164_exit);
diff --git a/drivers/gpu/drm/i810/i810_dma.c b/drivers/gpu/drm/i810/i810_dma.c
index 997d91707ad2..0e6c131313d9 100644
--- a/drivers/gpu/drm/i810/i810_dma.c
+++ b/drivers/gpu/drm/i810/i810_dma.c
@@ -37,6 +37,7 @@
37#include <linux/interrupt.h> /* For task queue support */ 37#include <linux/interrupt.h> /* For task queue support */
38#include <linux/delay.h> 38#include <linux/delay.h>
39#include <linux/slab.h> 39#include <linux/slab.h>
40#include <linux/smp_lock.h>
40#include <linux/pagemap.h> 41#include <linux/pagemap.h>
41 42
42#define I810_BUF_FREE 2 43#define I810_BUF_FREE 2
@@ -60,9 +61,8 @@ static struct drm_buf *i810_freelist_get(struct drm_device * dev)
60 /* In use is already a pointer */ 61 /* In use is already a pointer */
61 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE, 62 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
62 I810_BUF_CLIENT); 63 I810_BUF_CLIENT);
63 if (used == I810_BUF_FREE) { 64 if (used == I810_BUF_FREE)
64 return buf; 65 return buf;
65 }
66 } 66 }
67 return NULL; 67 return NULL;
68} 68}
@@ -71,7 +71,7 @@ static struct drm_buf *i810_freelist_get(struct drm_device * dev)
71 * yet, the hardware updates in use for us once its on the ring buffer. 71 * yet, the hardware updates in use for us once its on the ring buffer.
72 */ 72 */
73 73
74static int i810_freelist_put(struct drm_device * dev, struct drm_buf * buf) 74static int i810_freelist_put(struct drm_device *dev, struct drm_buf *buf)
75{ 75{
76 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 76 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
77 int used; 77 int used;
@@ -121,7 +121,7 @@ static const struct file_operations i810_buffer_fops = {
121 .fasync = drm_fasync, 121 .fasync = drm_fasync,
122}; 122};
123 123
124static int i810_map_buffer(struct drm_buf * buf, struct drm_file *file_priv) 124static int i810_map_buffer(struct drm_buf *buf, struct drm_file *file_priv)
125{ 125{
126 struct drm_device *dev = file_priv->minor->dev; 126 struct drm_device *dev = file_priv->minor->dev;
127 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 127 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
@@ -152,7 +152,7 @@ static int i810_map_buffer(struct drm_buf * buf, struct drm_file *file_priv)
152 return retcode; 152 return retcode;
153} 153}
154 154
155static int i810_unmap_buffer(struct drm_buf * buf) 155static int i810_unmap_buffer(struct drm_buf *buf)
156{ 156{
157 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 157 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
158 int retcode = 0; 158 int retcode = 0;
@@ -172,7 +172,7 @@ static int i810_unmap_buffer(struct drm_buf * buf)
172 return retcode; 172 return retcode;
173} 173}
174 174
175static int i810_dma_get_buffer(struct drm_device * dev, drm_i810_dma_t * d, 175static int i810_dma_get_buffer(struct drm_device *dev, drm_i810_dma_t *d,
176 struct drm_file *file_priv) 176 struct drm_file *file_priv)
177{ 177{
178 struct drm_buf *buf; 178 struct drm_buf *buf;
@@ -202,7 +202,7 @@ static int i810_dma_get_buffer(struct drm_device * dev, drm_i810_dma_t * d,
202 return retcode; 202 return retcode;
203} 203}
204 204
205static int i810_dma_cleanup(struct drm_device * dev) 205static int i810_dma_cleanup(struct drm_device *dev)
206{ 206{
207 struct drm_device_dma *dma = dev->dma; 207 struct drm_device_dma *dma = dev->dma;
208 208
@@ -218,9 +218,8 @@ static int i810_dma_cleanup(struct drm_device * dev)
218 drm_i810_private_t *dev_priv = 218 drm_i810_private_t *dev_priv =
219 (drm_i810_private_t *) dev->dev_private; 219 (drm_i810_private_t *) dev->dev_private;
220 220
221 if (dev_priv->ring.virtual_start) { 221 if (dev_priv->ring.virtual_start)
222 drm_core_ioremapfree(&dev_priv->ring.map, dev); 222 drm_core_ioremapfree(&dev_priv->ring.map, dev);
223 }
224 if (dev_priv->hw_status_page) { 223 if (dev_priv->hw_status_page) {
225 pci_free_consistent(dev->pdev, PAGE_SIZE, 224 pci_free_consistent(dev->pdev, PAGE_SIZE,
226 dev_priv->hw_status_page, 225 dev_priv->hw_status_page,
@@ -242,7 +241,7 @@ static int i810_dma_cleanup(struct drm_device * dev)
242 return 0; 241 return 0;
243} 242}
244 243
245static int i810_wait_ring(struct drm_device * dev, int n) 244static int i810_wait_ring(struct drm_device *dev, int n)
246{ 245{
247 drm_i810_private_t *dev_priv = dev->dev_private; 246 drm_i810_private_t *dev_priv = dev->dev_private;
248 drm_i810_ring_buffer_t *ring = &(dev_priv->ring); 247 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
@@ -271,11 +270,11 @@ static int i810_wait_ring(struct drm_device * dev, int n)
271 udelay(1); 270 udelay(1);
272 } 271 }
273 272
274 out_wait_ring: 273out_wait_ring:
275 return iters; 274 return iters;
276} 275}
277 276
278static void i810_kernel_lost_context(struct drm_device * dev) 277static void i810_kernel_lost_context(struct drm_device *dev)
279{ 278{
280 drm_i810_private_t *dev_priv = dev->dev_private; 279 drm_i810_private_t *dev_priv = dev->dev_private;
281 drm_i810_ring_buffer_t *ring = &(dev_priv->ring); 280 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
@@ -287,7 +286,7 @@ static void i810_kernel_lost_context(struct drm_device * dev)
287 ring->space += ring->Size; 286 ring->space += ring->Size;
288} 287}
289 288
290static int i810_freelist_init(struct drm_device * dev, drm_i810_private_t * dev_priv) 289static int i810_freelist_init(struct drm_device *dev, drm_i810_private_t *dev_priv)
291{ 290{
292 struct drm_device_dma *dma = dev->dma; 291 struct drm_device_dma *dma = dev->dma;
293 int my_idx = 24; 292 int my_idx = 24;
@@ -322,9 +321,9 @@ static int i810_freelist_init(struct drm_device * dev, drm_i810_private_t * dev_
322 return 0; 321 return 0;
323} 322}
324 323
325static int i810_dma_initialize(struct drm_device * dev, 324static int i810_dma_initialize(struct drm_device *dev,
326 drm_i810_private_t * dev_priv, 325 drm_i810_private_t *dev_priv,
327 drm_i810_init_t * init) 326 drm_i810_init_t *init)
328{ 327{
329 struct drm_map_list *r_list; 328 struct drm_map_list *r_list;
330 memset(dev_priv, 0, sizeof(drm_i810_private_t)); 329 memset(dev_priv, 0, sizeof(drm_i810_private_t));
@@ -462,7 +461,7 @@ static int i810_dma_init(struct drm_device *dev, void *data,
462 * Use 'volatile' & local var tmp to force the emitted values to be 461 * Use 'volatile' & local var tmp to force the emitted values to be
463 * identical to the verified ones. 462 * identical to the verified ones.
464 */ 463 */
465static void i810EmitContextVerified(struct drm_device * dev, 464static void i810EmitContextVerified(struct drm_device *dev,
466 volatile unsigned int *code) 465 volatile unsigned int *code)
467{ 466{
468 drm_i810_private_t *dev_priv = dev->dev_private; 467 drm_i810_private_t *dev_priv = dev->dev_private;
@@ -495,7 +494,7 @@ static void i810EmitContextVerified(struct drm_device * dev,
495 ADVANCE_LP_RING(); 494 ADVANCE_LP_RING();
496} 495}
497 496
498static void i810EmitTexVerified(struct drm_device * dev, volatile unsigned int *code) 497static void i810EmitTexVerified(struct drm_device *dev, volatile unsigned int *code)
499{ 498{
500 drm_i810_private_t *dev_priv = dev->dev_private; 499 drm_i810_private_t *dev_priv = dev->dev_private;
501 int i, j = 0; 500 int i, j = 0;
@@ -528,7 +527,7 @@ static void i810EmitTexVerified(struct drm_device * dev, volatile unsigned int *
528 527
529/* Need to do some additional checking when setting the dest buffer. 528/* Need to do some additional checking when setting the dest buffer.
530 */ 529 */
531static void i810EmitDestVerified(struct drm_device * dev, 530static void i810EmitDestVerified(struct drm_device *dev,
532 volatile unsigned int *code) 531 volatile unsigned int *code)
533{ 532{
534 drm_i810_private_t *dev_priv = dev->dev_private; 533 drm_i810_private_t *dev_priv = dev->dev_private;
@@ -563,7 +562,7 @@ static void i810EmitDestVerified(struct drm_device * dev,
563 ADVANCE_LP_RING(); 562 ADVANCE_LP_RING();
564} 563}
565 564
566static void i810EmitState(struct drm_device * dev) 565static void i810EmitState(struct drm_device *dev)
567{ 566{
568 drm_i810_private_t *dev_priv = dev->dev_private; 567 drm_i810_private_t *dev_priv = dev->dev_private;
569 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; 568 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -594,7 +593,7 @@ static void i810EmitState(struct drm_device * dev)
594 593
595/* need to verify 594/* need to verify
596 */ 595 */
597static void i810_dma_dispatch_clear(struct drm_device * dev, int flags, 596static void i810_dma_dispatch_clear(struct drm_device *dev, int flags,
598 unsigned int clear_color, 597 unsigned int clear_color,
599 unsigned int clear_zval) 598 unsigned int clear_zval)
600{ 599{
@@ -669,7 +668,7 @@ static void i810_dma_dispatch_clear(struct drm_device * dev, int flags,
669 } 668 }
670} 669}
671 670
672static void i810_dma_dispatch_swap(struct drm_device * dev) 671static void i810_dma_dispatch_swap(struct drm_device *dev)
673{ 672{
674 drm_i810_private_t *dev_priv = dev->dev_private; 673 drm_i810_private_t *dev_priv = dev->dev_private;
675 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; 674 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -715,8 +714,8 @@ static void i810_dma_dispatch_swap(struct drm_device * dev)
715 } 714 }
716} 715}
717 716
718static void i810_dma_dispatch_vertex(struct drm_device * dev, 717static void i810_dma_dispatch_vertex(struct drm_device *dev,
719 struct drm_buf * buf, int discard, int used) 718 struct drm_buf *buf, int discard, int used)
720{ 719{
721 drm_i810_private_t *dev_priv = dev->dev_private; 720 drm_i810_private_t *dev_priv = dev->dev_private;
722 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 721 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
@@ -795,7 +794,7 @@ static void i810_dma_dispatch_vertex(struct drm_device * dev,
795 } 794 }
796} 795}
797 796
798static void i810_dma_dispatch_flip(struct drm_device * dev) 797static void i810_dma_dispatch_flip(struct drm_device *dev)
799{ 798{
800 drm_i810_private_t *dev_priv = dev->dev_private; 799 drm_i810_private_t *dev_priv = dev->dev_private;
801 int pitch = dev_priv->pitch; 800 int pitch = dev_priv->pitch;
@@ -841,7 +840,7 @@ static void i810_dma_dispatch_flip(struct drm_device * dev)
841 840
842} 841}
843 842
844static void i810_dma_quiescent(struct drm_device * dev) 843static void i810_dma_quiescent(struct drm_device *dev)
845{ 844{
846 drm_i810_private_t *dev_priv = dev->dev_private; 845 drm_i810_private_t *dev_priv = dev->dev_private;
847 RING_LOCALS; 846 RING_LOCALS;
@@ -858,7 +857,7 @@ static void i810_dma_quiescent(struct drm_device * dev)
858 i810_wait_ring(dev, dev_priv->ring.Size - 8); 857 i810_wait_ring(dev, dev_priv->ring.Size - 8);
859} 858}
860 859
861static int i810_flush_queue(struct drm_device * dev) 860static int i810_flush_queue(struct drm_device *dev)
862{ 861{
863 drm_i810_private_t *dev_priv = dev->dev_private; 862 drm_i810_private_t *dev_priv = dev->dev_private;
864 struct drm_device_dma *dma = dev->dma; 863 struct drm_device_dma *dma = dev->dma;
@@ -891,7 +890,7 @@ static int i810_flush_queue(struct drm_device * dev)
891} 890}
892 891
893/* Must be called with the lock held */ 892/* Must be called with the lock held */
894static void i810_reclaim_buffers(struct drm_device * dev, 893static void i810_reclaim_buffers(struct drm_device *dev,
895 struct drm_file *file_priv) 894 struct drm_file *file_priv)
896{ 895{
897 struct drm_device_dma *dma = dev->dma; 896 struct drm_device_dma *dma = dev->dma;
@@ -969,9 +968,8 @@ static int i810_clear_bufs(struct drm_device *dev, void *data,
969 LOCK_TEST_WITH_RETURN(dev, file_priv); 968 LOCK_TEST_WITH_RETURN(dev, file_priv);
970 969
971 /* GH: Someone's doing nasty things... */ 970 /* GH: Someone's doing nasty things... */
972 if (!dev->dev_private) { 971 if (!dev->dev_private)
973 return -EINVAL; 972 return -EINVAL;
974 }
975 973
976 i810_dma_dispatch_clear(dev, clear->flags, 974 i810_dma_dispatch_clear(dev, clear->flags,
977 clear->clear_color, clear->clear_depth); 975 clear->clear_color, clear->clear_depth);
@@ -1039,7 +1037,7 @@ static int i810_docopy(struct drm_device *dev, void *data,
1039 return 0; 1037 return 0;
1040} 1038}
1041 1039
1042static void i810_dma_dispatch_mc(struct drm_device * dev, struct drm_buf * buf, int used, 1040static void i810_dma_dispatch_mc(struct drm_device *dev, struct drm_buf *buf, int used,
1043 unsigned int last_render) 1041 unsigned int last_render)
1044{ 1042{
1045 drm_i810_private_t *dev_priv = dev->dev_private; 1043 drm_i810_private_t *dev_priv = dev->dev_private;
@@ -1053,9 +1051,8 @@ static void i810_dma_dispatch_mc(struct drm_device * dev, struct drm_buf * buf,
1053 i810_kernel_lost_context(dev); 1051 i810_kernel_lost_context(dev);
1054 1052
1055 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE); 1053 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
1056 if (u != I810_BUF_CLIENT) { 1054 if (u != I810_BUF_CLIENT)
1057 DRM_DEBUG("MC found buffer that isn't mine!\n"); 1055 DRM_DEBUG("MC found buffer that isn't mine!\n");
1058 }
1059 1056
1060 if (used > 4 * 1024) 1057 if (used > 4 * 1024)
1061 used = 0; 1058 used = 0;
@@ -1160,7 +1157,7 @@ static int i810_ov0_flip(struct drm_device *dev, void *data,
1160 1157
1161 LOCK_TEST_WITH_RETURN(dev, file_priv); 1158 LOCK_TEST_WITH_RETURN(dev, file_priv);
1162 1159
1163 //Tell the overlay to update 1160 /* Tell the overlay to update */
1164 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000); 1161 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1165 1162
1166 return 0; 1163 return 0;
@@ -1168,7 +1165,7 @@ static int i810_ov0_flip(struct drm_device *dev, void *data,
1168 1165
1169/* Not sure why this isn't set all the time: 1166/* Not sure why this isn't set all the time:
1170 */ 1167 */
1171static void i810_do_init_pageflip(struct drm_device * dev) 1168static void i810_do_init_pageflip(struct drm_device *dev)
1172{ 1169{
1173 drm_i810_private_t *dev_priv = dev->dev_private; 1170 drm_i810_private_t *dev_priv = dev->dev_private;
1174 1171
@@ -1178,7 +1175,7 @@ static void i810_do_init_pageflip(struct drm_device * dev)
1178 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; 1175 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1179} 1176}
1180 1177
1181static int i810_do_cleanup_pageflip(struct drm_device * dev) 1178static int i810_do_cleanup_pageflip(struct drm_device *dev)
1182{ 1179{
1183 drm_i810_private_t *dev_priv = dev->dev_private; 1180 drm_i810_private_t *dev_priv = dev->dev_private;
1184 1181
@@ -1218,49 +1215,61 @@ int i810_driver_load(struct drm_device *dev, unsigned long flags)
1218 return 0; 1215 return 0;
1219} 1216}
1220 1217
1221void i810_driver_lastclose(struct drm_device * dev) 1218void i810_driver_lastclose(struct drm_device *dev)
1222{ 1219{
1223 i810_dma_cleanup(dev); 1220 i810_dma_cleanup(dev);
1224} 1221}
1225 1222
1226void i810_driver_preclose(struct drm_device * dev, struct drm_file *file_priv) 1223void i810_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
1227{ 1224{
1228 if (dev->dev_private) { 1225 if (dev->dev_private) {
1229 drm_i810_private_t *dev_priv = dev->dev_private; 1226 drm_i810_private_t *dev_priv = dev->dev_private;
1230 if (dev_priv->page_flipping) { 1227 if (dev_priv->page_flipping)
1231 i810_do_cleanup_pageflip(dev); 1228 i810_do_cleanup_pageflip(dev);
1232 }
1233 } 1229 }
1234} 1230}
1235 1231
1236void i810_driver_reclaim_buffers_locked(struct drm_device * dev, 1232void i810_driver_reclaim_buffers_locked(struct drm_device *dev,
1237 struct drm_file *file_priv) 1233 struct drm_file *file_priv)
1238{ 1234{
1239 i810_reclaim_buffers(dev, file_priv); 1235 i810_reclaim_buffers(dev, file_priv);
1240} 1236}
1241 1237
1242int i810_driver_dma_quiescent(struct drm_device * dev) 1238int i810_driver_dma_quiescent(struct drm_device *dev)
1243{ 1239{
1244 i810_dma_quiescent(dev); 1240 i810_dma_quiescent(dev);
1245 return 0; 1241 return 0;
1246} 1242}
1247 1243
1244/*
1245 * call the drm_ioctl under the big kernel lock because
1246 * to lock against the i810_mmap_buffers function.
1247 */
1248long i810_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1249{
1250 int ret;
1251 lock_kernel();
1252 ret = drm_ioctl(file, cmd, arg);
1253 unlock_kernel();
1254 return ret;
1255}
1256
1248struct drm_ioctl_desc i810_ioctls[] = { 1257struct drm_ioctl_desc i810_ioctls[] = {
1249 DRM_IOCTL_DEF(DRM_I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 1258 DRM_IOCTL_DEF(DRM_I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1250 DRM_IOCTL_DEF(DRM_I810_VERTEX, i810_dma_vertex, DRM_AUTH), 1259 DRM_IOCTL_DEF(DRM_I810_VERTEX, i810_dma_vertex, DRM_AUTH|DRM_UNLOCKED),
1251 DRM_IOCTL_DEF(DRM_I810_CLEAR, i810_clear_bufs, DRM_AUTH), 1260 DRM_IOCTL_DEF(DRM_I810_CLEAR, i810_clear_bufs, DRM_AUTH|DRM_UNLOCKED),
1252 DRM_IOCTL_DEF(DRM_I810_FLUSH, i810_flush_ioctl, DRM_AUTH), 1261 DRM_IOCTL_DEF(DRM_I810_FLUSH, i810_flush_ioctl, DRM_AUTH|DRM_UNLOCKED),
1253 DRM_IOCTL_DEF(DRM_I810_GETAGE, i810_getage, DRM_AUTH), 1262 DRM_IOCTL_DEF(DRM_I810_GETAGE, i810_getage, DRM_AUTH|DRM_UNLOCKED),
1254 DRM_IOCTL_DEF(DRM_I810_GETBUF, i810_getbuf, DRM_AUTH), 1263 DRM_IOCTL_DEF(DRM_I810_GETBUF, i810_getbuf, DRM_AUTH|DRM_UNLOCKED),
1255 DRM_IOCTL_DEF(DRM_I810_SWAP, i810_swap_bufs, DRM_AUTH), 1264 DRM_IOCTL_DEF(DRM_I810_SWAP, i810_swap_bufs, DRM_AUTH|DRM_UNLOCKED),
1256 DRM_IOCTL_DEF(DRM_I810_COPY, i810_copybuf, DRM_AUTH), 1265 DRM_IOCTL_DEF(DRM_I810_COPY, i810_copybuf, DRM_AUTH|DRM_UNLOCKED),
1257 DRM_IOCTL_DEF(DRM_I810_DOCOPY, i810_docopy, DRM_AUTH), 1266 DRM_IOCTL_DEF(DRM_I810_DOCOPY, i810_docopy, DRM_AUTH|DRM_UNLOCKED),
1258 DRM_IOCTL_DEF(DRM_I810_OV0INFO, i810_ov0_info, DRM_AUTH), 1267 DRM_IOCTL_DEF(DRM_I810_OV0INFO, i810_ov0_info, DRM_AUTH|DRM_UNLOCKED),
1259 DRM_IOCTL_DEF(DRM_I810_FSTATUS, i810_fstatus, DRM_AUTH), 1268 DRM_IOCTL_DEF(DRM_I810_FSTATUS, i810_fstatus, DRM_AUTH|DRM_UNLOCKED),
1260 DRM_IOCTL_DEF(DRM_I810_OV0FLIP, i810_ov0_flip, DRM_AUTH), 1269 DRM_IOCTL_DEF(DRM_I810_OV0FLIP, i810_ov0_flip, DRM_AUTH|DRM_UNLOCKED),
1261 DRM_IOCTL_DEF(DRM_I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 1270 DRM_IOCTL_DEF(DRM_I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1262 DRM_IOCTL_DEF(DRM_I810_RSTATUS, i810_rstatus, DRM_AUTH), 1271 DRM_IOCTL_DEF(DRM_I810_RSTATUS, i810_rstatus, DRM_AUTH|DRM_UNLOCKED),
1263 DRM_IOCTL_DEF(DRM_I810_FLIP, i810_flip_bufs, DRM_AUTH) 1272 DRM_IOCTL_DEF(DRM_I810_FLIP, i810_flip_bufs, DRM_AUTH|DRM_UNLOCKED),
1264}; 1273};
1265 1274
1266int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls); 1275int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
@@ -1276,7 +1285,7 @@ int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
1276 * \returns 1285 * \returns
1277 * A value of 1 is always retured to indictate every i810 is AGP. 1286 * A value of 1 is always retured to indictate every i810 is AGP.
1278 */ 1287 */
1279int i810_driver_device_is_agp(struct drm_device * dev) 1288int i810_driver_device_is_agp(struct drm_device *dev)
1280{ 1289{
1281 return 1; 1290 return 1;
1282} 1291}
diff --git a/drivers/gpu/drm/i810/i810_drv.c b/drivers/gpu/drm/i810/i810_drv.c
index c1e02752e023..b4250b2cac1f 100644
--- a/drivers/gpu/drm/i810/i810_drv.c
+++ b/drivers/gpu/drm/i810/i810_drv.c
@@ -59,7 +59,7 @@ static struct drm_driver driver = {
59 .owner = THIS_MODULE, 59 .owner = THIS_MODULE,
60 .open = drm_open, 60 .open = drm_open,
61 .release = drm_release, 61 .release = drm_release,
62 .unlocked_ioctl = drm_ioctl, 62 .unlocked_ioctl = i810_ioctl,
63 .mmap = drm_mmap, 63 .mmap = drm_mmap,
64 .poll = drm_poll, 64 .poll = drm_poll,
65 .fasync = drm_fasync, 65 .fasync = drm_fasync,
diff --git a/drivers/gpu/drm/i810/i810_drv.h b/drivers/gpu/drm/i810/i810_drv.h
index 21e2691f28f9..c9339f481795 100644
--- a/drivers/gpu/drm/i810/i810_drv.h
+++ b/drivers/gpu/drm/i810/i810_drv.h
@@ -115,56 +115,59 @@ typedef struct drm_i810_private {
115} drm_i810_private_t; 115} drm_i810_private_t;
116 116
117 /* i810_dma.c */ 117 /* i810_dma.c */
118extern int i810_driver_dma_quiescent(struct drm_device * dev); 118extern int i810_driver_dma_quiescent(struct drm_device *dev);
119extern void i810_driver_reclaim_buffers_locked(struct drm_device * dev, 119extern void i810_driver_reclaim_buffers_locked(struct drm_device *dev,
120 struct drm_file *file_priv); 120 struct drm_file *file_priv);
121extern int i810_driver_load(struct drm_device *, unsigned long flags); 121extern int i810_driver_load(struct drm_device *, unsigned long flags);
122extern void i810_driver_lastclose(struct drm_device * dev); 122extern void i810_driver_lastclose(struct drm_device *dev);
123extern void i810_driver_preclose(struct drm_device * dev, 123extern void i810_driver_preclose(struct drm_device *dev,
124 struct drm_file *file_priv); 124 struct drm_file *file_priv);
125extern void i810_driver_reclaim_buffers_locked(struct drm_device * dev, 125extern void i810_driver_reclaim_buffers_locked(struct drm_device *dev,
126 struct drm_file *file_priv); 126 struct drm_file *file_priv);
127extern int i810_driver_device_is_agp(struct drm_device * dev); 127extern int i810_driver_device_is_agp(struct drm_device *dev);
128 128
129extern long i810_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
129extern struct drm_ioctl_desc i810_ioctls[]; 130extern struct drm_ioctl_desc i810_ioctls[];
130extern int i810_max_ioctl; 131extern int i810_max_ioctl;
131 132
132#define I810_BASE(reg) ((unsigned long) \ 133#define I810_BASE(reg) ((unsigned long) \
133 dev_priv->mmio_map->handle) 134 dev_priv->mmio_map->handle)
134#define I810_ADDR(reg) (I810_BASE(reg) + reg) 135#define I810_ADDR(reg) (I810_BASE(reg) + reg)
135#define I810_DEREF(reg) *(__volatile__ int *)I810_ADDR(reg) 136#define I810_DEREF(reg) (*(__volatile__ int *)I810_ADDR(reg))
136#define I810_READ(reg) I810_DEREF(reg) 137#define I810_READ(reg) I810_DEREF(reg)
137#define I810_WRITE(reg,val) do { I810_DEREF(reg) = val; } while (0) 138#define I810_WRITE(reg, val) do { I810_DEREF(reg) = val; } while (0)
138#define I810_DEREF16(reg) *(__volatile__ u16 *)I810_ADDR(reg) 139#define I810_DEREF16(reg) (*(__volatile__ u16 *)I810_ADDR(reg))
139#define I810_READ16(reg) I810_DEREF16(reg) 140#define I810_READ16(reg) I810_DEREF16(reg)
140#define I810_WRITE16(reg,val) do { I810_DEREF16(reg) = val; } while (0) 141#define I810_WRITE16(reg, val) do { I810_DEREF16(reg) = val; } while (0)
141 142
142#define I810_VERBOSE 0 143#define I810_VERBOSE 0
143#define RING_LOCALS unsigned int outring, ringmask; \ 144#define RING_LOCALS unsigned int outring, ringmask; \
144 volatile char *virt; 145 volatile char *virt;
145 146
146#define BEGIN_LP_RING(n) do { \ 147#define BEGIN_LP_RING(n) do { \
147 if (I810_VERBOSE) \ 148 if (I810_VERBOSE) \
148 DRM_DEBUG("BEGIN_LP_RING(%d)\n", n); \ 149 DRM_DEBUG("BEGIN_LP_RING(%d)\n", n); \
149 if (dev_priv->ring.space < n*4) \ 150 if (dev_priv->ring.space < n*4) \
150 i810_wait_ring(dev, n*4); \ 151 i810_wait_ring(dev, n*4); \
151 dev_priv->ring.space -= n*4; \ 152 dev_priv->ring.space -= n*4; \
152 outring = dev_priv->ring.tail; \ 153 outring = dev_priv->ring.tail; \
153 ringmask = dev_priv->ring.tail_mask; \ 154 ringmask = dev_priv->ring.tail_mask; \
154 virt = dev_priv->ring.virtual_start; \ 155 virt = dev_priv->ring.virtual_start; \
155} while (0) 156} while (0)
156 157
157#define ADVANCE_LP_RING() do { \ 158#define ADVANCE_LP_RING() do { \
158 if (I810_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING\n"); \ 159 if (I810_VERBOSE) \
160 DRM_DEBUG("ADVANCE_LP_RING\n"); \
159 dev_priv->ring.tail = outring; \ 161 dev_priv->ring.tail = outring; \
160 I810_WRITE(LP_RING + RING_TAIL, outring); \ 162 I810_WRITE(LP_RING + RING_TAIL, outring); \
161} while(0) 163} while (0)
162 164
163#define OUT_RING(n) do { \ 165#define OUT_RING(n) do { \
164 if (I810_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \ 166 if (I810_VERBOSE) \
165 *(volatile unsigned int *)(virt + outring) = n; \ 167 DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \
166 outring += 4; \ 168 *(volatile unsigned int *)(virt + outring) = n; \
167 outring &= ringmask; \ 169 outring += 4; \
170 outring &= ringmask; \
168} while (0) 171} while (0)
169 172
170#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23)) 173#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23))
diff --git a/drivers/gpu/drm/i830/i830_dma.c b/drivers/gpu/drm/i830/i830_dma.c
index 65759a9a85c8..5168862c9227 100644
--- a/drivers/gpu/drm/i830/i830_dma.c
+++ b/drivers/gpu/drm/i830/i830_dma.c
@@ -36,6 +36,7 @@
36#include "i830_drm.h" 36#include "i830_drm.h"
37#include "i830_drv.h" 37#include "i830_drv.h"
38#include <linux/interrupt.h> /* For task queue support */ 38#include <linux/interrupt.h> /* For task queue support */
39#include <linux/smp_lock.h>
39#include <linux/pagemap.h> 40#include <linux/pagemap.h>
40#include <linux/delay.h> 41#include <linux/delay.h>
41#include <linux/slab.h> 42#include <linux/slab.h>
@@ -62,9 +63,8 @@ static struct drm_buf *i830_freelist_get(struct drm_device * dev)
62 /* In use is already a pointer */ 63 /* In use is already a pointer */
63 used = cmpxchg(buf_priv->in_use, I830_BUF_FREE, 64 used = cmpxchg(buf_priv->in_use, I830_BUF_FREE,
64 I830_BUF_CLIENT); 65 I830_BUF_CLIENT);
65 if (used == I830_BUF_FREE) { 66 if (used == I830_BUF_FREE)
66 return buf; 67 return buf;
67 }
68 } 68 }
69 return NULL; 69 return NULL;
70} 70}
@@ -73,7 +73,7 @@ static struct drm_buf *i830_freelist_get(struct drm_device * dev)
73 * yet, the hardware updates in use for us once its on the ring buffer. 73 * yet, the hardware updates in use for us once its on the ring buffer.
74 */ 74 */
75 75
76static int i830_freelist_put(struct drm_device * dev, struct drm_buf * buf) 76static int i830_freelist_put(struct drm_device *dev, struct drm_buf *buf)
77{ 77{
78 drm_i830_buf_priv_t *buf_priv = buf->dev_private; 78 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
79 int used; 79 int used;
@@ -123,7 +123,7 @@ static const struct file_operations i830_buffer_fops = {
123 .fasync = drm_fasync, 123 .fasync = drm_fasync,
124}; 124};
125 125
126static int i830_map_buffer(struct drm_buf * buf, struct drm_file *file_priv) 126static int i830_map_buffer(struct drm_buf *buf, struct drm_file *file_priv)
127{ 127{
128 struct drm_device *dev = file_priv->minor->dev; 128 struct drm_device *dev = file_priv->minor->dev;
129 drm_i830_buf_priv_t *buf_priv = buf->dev_private; 129 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
@@ -156,7 +156,7 @@ static int i830_map_buffer(struct drm_buf * buf, struct drm_file *file_priv)
156 return retcode; 156 return retcode;
157} 157}
158 158
159static int i830_unmap_buffer(struct drm_buf * buf) 159static int i830_unmap_buffer(struct drm_buf *buf)
160{ 160{
161 drm_i830_buf_priv_t *buf_priv = buf->dev_private; 161 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
162 int retcode = 0; 162 int retcode = 0;
@@ -176,7 +176,7 @@ static int i830_unmap_buffer(struct drm_buf * buf)
176 return retcode; 176 return retcode;
177} 177}
178 178
179static int i830_dma_get_buffer(struct drm_device * dev, drm_i830_dma_t * d, 179static int i830_dma_get_buffer(struct drm_device *dev, drm_i830_dma_t *d,
180 struct drm_file *file_priv) 180 struct drm_file *file_priv)
181{ 181{
182 struct drm_buf *buf; 182 struct drm_buf *buf;
@@ -206,7 +206,7 @@ static int i830_dma_get_buffer(struct drm_device * dev, drm_i830_dma_t * d,
206 return retcode; 206 return retcode;
207} 207}
208 208
209static int i830_dma_cleanup(struct drm_device * dev) 209static int i830_dma_cleanup(struct drm_device *dev)
210{ 210{
211 struct drm_device_dma *dma = dev->dma; 211 struct drm_device_dma *dma = dev->dma;
212 212
@@ -222,9 +222,8 @@ static int i830_dma_cleanup(struct drm_device * dev)
222 drm_i830_private_t *dev_priv = 222 drm_i830_private_t *dev_priv =
223 (drm_i830_private_t *) dev->dev_private; 223 (drm_i830_private_t *) dev->dev_private;
224 224
225 if (dev_priv->ring.virtual_start) { 225 if (dev_priv->ring.virtual_start)
226 drm_core_ioremapfree(&dev_priv->ring.map, dev); 226 drm_core_ioremapfree(&dev_priv->ring.map, dev);
227 }
228 if (dev_priv->hw_status_page) { 227 if (dev_priv->hw_status_page) {
229 pci_free_consistent(dev->pdev, PAGE_SIZE, 228 pci_free_consistent(dev->pdev, PAGE_SIZE,
230 dev_priv->hw_status_page, 229 dev_priv->hw_status_page,
@@ -246,7 +245,7 @@ static int i830_dma_cleanup(struct drm_device * dev)
246 return 0; 245 return 0;
247} 246}
248 247
249int i830_wait_ring(struct drm_device * dev, int n, const char *caller) 248int i830_wait_ring(struct drm_device *dev, int n, const char *caller)
250{ 249{
251 drm_i830_private_t *dev_priv = dev->dev_private; 250 drm_i830_private_t *dev_priv = dev->dev_private;
252 drm_i830_ring_buffer_t *ring = &(dev_priv->ring); 251 drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
@@ -276,11 +275,11 @@ int i830_wait_ring(struct drm_device * dev, int n, const char *caller)
276 dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT; 275 dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT;
277 } 276 }
278 277
279 out_wait_ring: 278out_wait_ring:
280 return iters; 279 return iters;
281} 280}
282 281
283static void i830_kernel_lost_context(struct drm_device * dev) 282static void i830_kernel_lost_context(struct drm_device *dev)
284{ 283{
285 drm_i830_private_t *dev_priv = dev->dev_private; 284 drm_i830_private_t *dev_priv = dev->dev_private;
286 drm_i830_ring_buffer_t *ring = &(dev_priv->ring); 285 drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
@@ -295,7 +294,7 @@ static void i830_kernel_lost_context(struct drm_device * dev)
295 dev_priv->sarea_priv->perf_boxes |= I830_BOX_RING_EMPTY; 294 dev_priv->sarea_priv->perf_boxes |= I830_BOX_RING_EMPTY;
296} 295}
297 296
298static int i830_freelist_init(struct drm_device * dev, drm_i830_private_t * dev_priv) 297static int i830_freelist_init(struct drm_device *dev, drm_i830_private_t *dev_priv)
299{ 298{
300 struct drm_device_dma *dma = dev->dma; 299 struct drm_device_dma *dma = dev->dma;
301 int my_idx = 36; 300 int my_idx = 36;
@@ -329,9 +328,9 @@ static int i830_freelist_init(struct drm_device * dev, drm_i830_private_t * dev_
329 return 0; 328 return 0;
330} 329}
331 330
332static int i830_dma_initialize(struct drm_device * dev, 331static int i830_dma_initialize(struct drm_device *dev,
333 drm_i830_private_t * dev_priv, 332 drm_i830_private_t *dev_priv,
334 drm_i830_init_t * init) 333 drm_i830_init_t *init)
335{ 334{
336 struct drm_map_list *r_list; 335 struct drm_map_list *r_list;
337 336
@@ -482,7 +481,7 @@ static int i830_dma_init(struct drm_device *dev, void *data,
482/* Most efficient way to verify state for the i830 is as it is 481/* Most efficient way to verify state for the i830 is as it is
483 * emitted. Non-conformant state is silently dropped. 482 * emitted. Non-conformant state is silently dropped.
484 */ 483 */
485static void i830EmitContextVerified(struct drm_device * dev, unsigned int *code) 484static void i830EmitContextVerified(struct drm_device *dev, unsigned int *code)
486{ 485{
487 drm_i830_private_t *dev_priv = dev->dev_private; 486 drm_i830_private_t *dev_priv = dev->dev_private;
488 int i, j = 0; 487 int i, j = 0;
@@ -527,7 +526,7 @@ static void i830EmitContextVerified(struct drm_device * dev, unsigned int *code)
527 ADVANCE_LP_RING(); 526 ADVANCE_LP_RING();
528} 527}
529 528
530static void i830EmitTexVerified(struct drm_device * dev, unsigned int *code) 529static void i830EmitTexVerified(struct drm_device *dev, unsigned int *code)
531{ 530{
532 drm_i830_private_t *dev_priv = dev->dev_private; 531 drm_i830_private_t *dev_priv = dev->dev_private;
533 int i, j = 0; 532 int i, j = 0;
@@ -561,7 +560,7 @@ static void i830EmitTexVerified(struct drm_device * dev, unsigned int *code)
561 printk("rejected packet %x\n", code[0]); 560 printk("rejected packet %x\n", code[0]);
562} 561}
563 562
564static void i830EmitTexBlendVerified(struct drm_device * dev, 563static void i830EmitTexBlendVerified(struct drm_device *dev,
565 unsigned int *code, unsigned int num) 564 unsigned int *code, unsigned int num)
566{ 565{
567 drm_i830_private_t *dev_priv = dev->dev_private; 566 drm_i830_private_t *dev_priv = dev->dev_private;
@@ -586,7 +585,7 @@ static void i830EmitTexBlendVerified(struct drm_device * dev,
586 ADVANCE_LP_RING(); 585 ADVANCE_LP_RING();
587} 586}
588 587
589static void i830EmitTexPalette(struct drm_device * dev, 588static void i830EmitTexPalette(struct drm_device *dev,
590 unsigned int *palette, int number, int is_shared) 589 unsigned int *palette, int number, int is_shared)
591{ 590{
592 drm_i830_private_t *dev_priv = dev->dev_private; 591 drm_i830_private_t *dev_priv = dev->dev_private;
@@ -603,9 +602,8 @@ static void i830EmitTexPalette(struct drm_device * dev,
603 } else { 602 } else {
604 OUT_RING(CMD_OP_MAP_PALETTE_LOAD | MAP_PALETTE_NUM(number)); 603 OUT_RING(CMD_OP_MAP_PALETTE_LOAD | MAP_PALETTE_NUM(number));
605 } 604 }
606 for (i = 0; i < 256; i++) { 605 for (i = 0; i < 256; i++)
607 OUT_RING(palette[i]); 606 OUT_RING(palette[i]);
608 }
609 OUT_RING(0); 607 OUT_RING(0);
610 /* KW: WHERE IS THE ADVANCE_LP_RING? This is effectively a noop! 608 /* KW: WHERE IS THE ADVANCE_LP_RING? This is effectively a noop!
611 */ 609 */
@@ -613,7 +611,7 @@ static void i830EmitTexPalette(struct drm_device * dev,
613 611
614/* Need to do some additional checking when setting the dest buffer. 612/* Need to do some additional checking when setting the dest buffer.
615 */ 613 */
616static void i830EmitDestVerified(struct drm_device * dev, unsigned int *code) 614static void i830EmitDestVerified(struct drm_device *dev, unsigned int *code)
617{ 615{
618 drm_i830_private_t *dev_priv = dev->dev_private; 616 drm_i830_private_t *dev_priv = dev->dev_private;
619 unsigned int tmp; 617 unsigned int tmp;
@@ -674,7 +672,7 @@ static void i830EmitDestVerified(struct drm_device * dev, unsigned int *code)
674 ADVANCE_LP_RING(); 672 ADVANCE_LP_RING();
675} 673}
676 674
677static void i830EmitStippleVerified(struct drm_device * dev, unsigned int *code) 675static void i830EmitStippleVerified(struct drm_device *dev, unsigned int *code)
678{ 676{
679 drm_i830_private_t *dev_priv = dev->dev_private; 677 drm_i830_private_t *dev_priv = dev->dev_private;
680 RING_LOCALS; 678 RING_LOCALS;
@@ -685,7 +683,7 @@ static void i830EmitStippleVerified(struct drm_device * dev, unsigned int *code)
685 ADVANCE_LP_RING(); 683 ADVANCE_LP_RING();
686} 684}
687 685
688static void i830EmitState(struct drm_device * dev) 686static void i830EmitState(struct drm_device *dev)
689{ 687{
690 drm_i830_private_t *dev_priv = dev->dev_private; 688 drm_i830_private_t *dev_priv = dev->dev_private;
691 drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv; 689 drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -788,7 +786,7 @@ static void i830EmitState(struct drm_device * dev)
788 * Performance monitoring functions 786 * Performance monitoring functions
789 */ 787 */
790 788
791static void i830_fill_box(struct drm_device * dev, 789static void i830_fill_box(struct drm_device *dev,
792 int x, int y, int w, int h, int r, int g, int b) 790 int x, int y, int w, int h, int r, int g, int b)
793{ 791{
794 drm_i830_private_t *dev_priv = dev->dev_private; 792 drm_i830_private_t *dev_priv = dev->dev_private;
@@ -816,17 +814,16 @@ static void i830_fill_box(struct drm_device * dev,
816 OUT_RING((y << 16) | x); 814 OUT_RING((y << 16) | x);
817 OUT_RING(((y + h) << 16) | (x + w)); 815 OUT_RING(((y + h) << 16) | (x + w));
818 816
819 if (dev_priv->current_page == 1) { 817 if (dev_priv->current_page == 1)
820 OUT_RING(dev_priv->front_offset); 818 OUT_RING(dev_priv->front_offset);
821 } else { 819 else
822 OUT_RING(dev_priv->back_offset); 820 OUT_RING(dev_priv->back_offset);
823 }
824 821
825 OUT_RING(color); 822 OUT_RING(color);
826 ADVANCE_LP_RING(); 823 ADVANCE_LP_RING();
827} 824}
828 825
829static void i830_cp_performance_boxes(struct drm_device * dev) 826static void i830_cp_performance_boxes(struct drm_device *dev)
830{ 827{
831 drm_i830_private_t *dev_priv = dev->dev_private; 828 drm_i830_private_t *dev_priv = dev->dev_private;
832 829
@@ -871,7 +868,7 @@ static void i830_cp_performance_boxes(struct drm_device * dev)
871 dev_priv->sarea_priv->perf_boxes = 0; 868 dev_priv->sarea_priv->perf_boxes = 0;
872} 869}
873 870
874static void i830_dma_dispatch_clear(struct drm_device * dev, int flags, 871static void i830_dma_dispatch_clear(struct drm_device *dev, int flags,
875 unsigned int clear_color, 872 unsigned int clear_color,
876 unsigned int clear_zval, 873 unsigned int clear_zval,
877 unsigned int clear_depthmask) 874 unsigned int clear_depthmask)
@@ -966,7 +963,7 @@ static void i830_dma_dispatch_clear(struct drm_device * dev, int flags,
966 } 963 }
967} 964}
968 965
969static void i830_dma_dispatch_swap(struct drm_device * dev) 966static void i830_dma_dispatch_swap(struct drm_device *dev)
970{ 967{
971 drm_i830_private_t *dev_priv = dev->dev_private; 968 drm_i830_private_t *dev_priv = dev->dev_private;
972 drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv; 969 drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -1036,7 +1033,7 @@ static void i830_dma_dispatch_swap(struct drm_device * dev)
1036 } 1033 }
1037} 1034}
1038 1035
1039static void i830_dma_dispatch_flip(struct drm_device * dev) 1036static void i830_dma_dispatch_flip(struct drm_device *dev)
1040{ 1037{
1041 drm_i830_private_t *dev_priv = dev->dev_private; 1038 drm_i830_private_t *dev_priv = dev->dev_private;
1042 RING_LOCALS; 1039 RING_LOCALS;
@@ -1079,8 +1076,8 @@ static void i830_dma_dispatch_flip(struct drm_device * dev)
1079 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; 1076 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1080} 1077}
1081 1078
1082static void i830_dma_dispatch_vertex(struct drm_device * dev, 1079static void i830_dma_dispatch_vertex(struct drm_device *dev,
1083 struct drm_buf * buf, int discard, int used) 1080 struct drm_buf *buf, int discard, int used)
1084{ 1081{
1085 drm_i830_private_t *dev_priv = dev->dev_private; 1082 drm_i830_private_t *dev_priv = dev->dev_private;
1086 drm_i830_buf_priv_t *buf_priv = buf->dev_private; 1083 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
@@ -1100,9 +1097,8 @@ static void i830_dma_dispatch_vertex(struct drm_device * dev,
1100 if (discard) { 1097 if (discard) {
1101 u = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, 1098 u = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1102 I830_BUF_HARDWARE); 1099 I830_BUF_HARDWARE);
1103 if (u != I830_BUF_CLIENT) { 1100 if (u != I830_BUF_CLIENT)
1104 DRM_DEBUG("xxxx 2\n"); 1101 DRM_DEBUG("xxxx 2\n");
1105 }
1106 } 1102 }
1107 1103
1108 if (used > 4 * 1023) 1104 if (used > 4 * 1023)
@@ -1191,7 +1187,7 @@ static void i830_dma_dispatch_vertex(struct drm_device * dev,
1191 } 1187 }
1192} 1188}
1193 1189
1194static void i830_dma_quiescent(struct drm_device * dev) 1190static void i830_dma_quiescent(struct drm_device *dev)
1195{ 1191{
1196 drm_i830_private_t *dev_priv = dev->dev_private; 1192 drm_i830_private_t *dev_priv = dev->dev_private;
1197 RING_LOCALS; 1193 RING_LOCALS;
@@ -1208,7 +1204,7 @@ static void i830_dma_quiescent(struct drm_device * dev)
1208 i830_wait_ring(dev, dev_priv->ring.Size - 8, __func__); 1204 i830_wait_ring(dev, dev_priv->ring.Size - 8, __func__);
1209} 1205}
1210 1206
1211static int i830_flush_queue(struct drm_device * dev) 1207static int i830_flush_queue(struct drm_device *dev)
1212{ 1208{
1213 drm_i830_private_t *dev_priv = dev->dev_private; 1209 drm_i830_private_t *dev_priv = dev->dev_private;
1214 struct drm_device_dma *dma = dev->dma; 1210 struct drm_device_dma *dma = dev->dma;
@@ -1241,7 +1237,7 @@ static int i830_flush_queue(struct drm_device * dev)
1241} 1237}
1242 1238
1243/* Must be called with the lock held */ 1239/* Must be called with the lock held */
1244static void i830_reclaim_buffers(struct drm_device * dev, struct drm_file *file_priv) 1240static void i830_reclaim_buffers(struct drm_device *dev, struct drm_file *file_priv)
1245{ 1241{
1246 struct drm_device_dma *dma = dev->dma; 1242 struct drm_device_dma *dma = dev->dma;
1247 int i; 1243 int i;
@@ -1316,9 +1312,8 @@ static int i830_clear_bufs(struct drm_device *dev, void *data,
1316 LOCK_TEST_WITH_RETURN(dev, file_priv); 1312 LOCK_TEST_WITH_RETURN(dev, file_priv);
1317 1313
1318 /* GH: Someone's doing nasty things... */ 1314 /* GH: Someone's doing nasty things... */
1319 if (!dev->dev_private) { 1315 if (!dev->dev_private)
1320 return -EINVAL; 1316 return -EINVAL;
1321 }
1322 1317
1323 i830_dma_dispatch_clear(dev, clear->flags, 1318 i830_dma_dispatch_clear(dev, clear->flags,
1324 clear->clear_color, 1319 clear->clear_color,
@@ -1339,7 +1334,7 @@ static int i830_swap_bufs(struct drm_device *dev, void *data,
1339 1334
1340/* Not sure why this isn't set all the time: 1335/* Not sure why this isn't set all the time:
1341 */ 1336 */
1342static void i830_do_init_pageflip(struct drm_device * dev) 1337static void i830_do_init_pageflip(struct drm_device *dev)
1343{ 1338{
1344 drm_i830_private_t *dev_priv = dev->dev_private; 1339 drm_i830_private_t *dev_priv = dev->dev_private;
1345 1340
@@ -1349,7 +1344,7 @@ static void i830_do_init_pageflip(struct drm_device * dev)
1349 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; 1344 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1350} 1345}
1351 1346
1352static int i830_do_cleanup_pageflip(struct drm_device * dev) 1347static int i830_do_cleanup_pageflip(struct drm_device *dev)
1353{ 1348{
1354 drm_i830_private_t *dev_priv = dev->dev_private; 1349 drm_i830_private_t *dev_priv = dev->dev_private;
1355 1350
@@ -1490,47 +1485,59 @@ int i830_driver_load(struct drm_device *dev, unsigned long flags)
1490 return 0; 1485 return 0;
1491} 1486}
1492 1487
1493void i830_driver_lastclose(struct drm_device * dev) 1488void i830_driver_lastclose(struct drm_device *dev)
1494{ 1489{
1495 i830_dma_cleanup(dev); 1490 i830_dma_cleanup(dev);
1496} 1491}
1497 1492
1498void i830_driver_preclose(struct drm_device * dev, struct drm_file *file_priv) 1493void i830_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
1499{ 1494{
1500 if (dev->dev_private) { 1495 if (dev->dev_private) {
1501 drm_i830_private_t *dev_priv = dev->dev_private; 1496 drm_i830_private_t *dev_priv = dev->dev_private;
1502 if (dev_priv->page_flipping) { 1497 if (dev_priv->page_flipping)
1503 i830_do_cleanup_pageflip(dev); 1498 i830_do_cleanup_pageflip(dev);
1504 }
1505 } 1499 }
1506} 1500}
1507 1501
1508void i830_driver_reclaim_buffers_locked(struct drm_device * dev, struct drm_file *file_priv) 1502void i830_driver_reclaim_buffers_locked(struct drm_device *dev, struct drm_file *file_priv)
1509{ 1503{
1510 i830_reclaim_buffers(dev, file_priv); 1504 i830_reclaim_buffers(dev, file_priv);
1511} 1505}
1512 1506
1513int i830_driver_dma_quiescent(struct drm_device * dev) 1507int i830_driver_dma_quiescent(struct drm_device *dev)
1514{ 1508{
1515 i830_dma_quiescent(dev); 1509 i830_dma_quiescent(dev);
1516 return 0; 1510 return 0;
1517} 1511}
1518 1512
1513/*
1514 * call the drm_ioctl under the big kernel lock because
1515 * to lock against the i830_mmap_buffers function.
1516 */
1517long i830_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1518{
1519 int ret;
1520 lock_kernel();
1521 ret = drm_ioctl(file, cmd, arg);
1522 unlock_kernel();
1523 return ret;
1524}
1525
1519struct drm_ioctl_desc i830_ioctls[] = { 1526struct drm_ioctl_desc i830_ioctls[] = {
1520 DRM_IOCTL_DEF(DRM_I830_INIT, i830_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 1527 DRM_IOCTL_DEF(DRM_I830_INIT, i830_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1521 DRM_IOCTL_DEF(DRM_I830_VERTEX, i830_dma_vertex, DRM_AUTH), 1528 DRM_IOCTL_DEF(DRM_I830_VERTEX, i830_dma_vertex, DRM_AUTH|DRM_UNLOCKED),
1522 DRM_IOCTL_DEF(DRM_I830_CLEAR, i830_clear_bufs, DRM_AUTH), 1529 DRM_IOCTL_DEF(DRM_I830_CLEAR, i830_clear_bufs, DRM_AUTH|DRM_UNLOCKED),
1523 DRM_IOCTL_DEF(DRM_I830_FLUSH, i830_flush_ioctl, DRM_AUTH), 1530 DRM_IOCTL_DEF(DRM_I830_FLUSH, i830_flush_ioctl, DRM_AUTH|DRM_UNLOCKED),
1524 DRM_IOCTL_DEF(DRM_I830_GETAGE, i830_getage, DRM_AUTH), 1531 DRM_IOCTL_DEF(DRM_I830_GETAGE, i830_getage, DRM_AUTH|DRM_UNLOCKED),
1525 DRM_IOCTL_DEF(DRM_I830_GETBUF, i830_getbuf, DRM_AUTH), 1532 DRM_IOCTL_DEF(DRM_I830_GETBUF, i830_getbuf, DRM_AUTH|DRM_UNLOCKED),
1526 DRM_IOCTL_DEF(DRM_I830_SWAP, i830_swap_bufs, DRM_AUTH), 1533 DRM_IOCTL_DEF(DRM_I830_SWAP, i830_swap_bufs, DRM_AUTH|DRM_UNLOCKED),
1527 DRM_IOCTL_DEF(DRM_I830_COPY, i830_copybuf, DRM_AUTH), 1534 DRM_IOCTL_DEF(DRM_I830_COPY, i830_copybuf, DRM_AUTH|DRM_UNLOCKED),
1528 DRM_IOCTL_DEF(DRM_I830_DOCOPY, i830_docopy, DRM_AUTH), 1535 DRM_IOCTL_DEF(DRM_I830_DOCOPY, i830_docopy, DRM_AUTH|DRM_UNLOCKED),
1529 DRM_IOCTL_DEF(DRM_I830_FLIP, i830_flip_bufs, DRM_AUTH), 1536 DRM_IOCTL_DEF(DRM_I830_FLIP, i830_flip_bufs, DRM_AUTH|DRM_UNLOCKED),
1530 DRM_IOCTL_DEF(DRM_I830_IRQ_EMIT, i830_irq_emit, DRM_AUTH), 1537 DRM_IOCTL_DEF(DRM_I830_IRQ_EMIT, i830_irq_emit, DRM_AUTH|DRM_UNLOCKED),
1531 DRM_IOCTL_DEF(DRM_I830_IRQ_WAIT, i830_irq_wait, DRM_AUTH), 1538 DRM_IOCTL_DEF(DRM_I830_IRQ_WAIT, i830_irq_wait, DRM_AUTH|DRM_UNLOCKED),
1532 DRM_IOCTL_DEF(DRM_I830_GETPARAM, i830_getparam, DRM_AUTH), 1539 DRM_IOCTL_DEF(DRM_I830_GETPARAM, i830_getparam, DRM_AUTH|DRM_UNLOCKED),
1533 DRM_IOCTL_DEF(DRM_I830_SETPARAM, i830_setparam, DRM_AUTH) 1540 DRM_IOCTL_DEF(DRM_I830_SETPARAM, i830_setparam, DRM_AUTH|DRM_UNLOCKED),
1534}; 1541};
1535 1542
1536int i830_max_ioctl = DRM_ARRAY_SIZE(i830_ioctls); 1543int i830_max_ioctl = DRM_ARRAY_SIZE(i830_ioctls);
@@ -1546,7 +1553,7 @@ int i830_max_ioctl = DRM_ARRAY_SIZE(i830_ioctls);
1546 * \returns 1553 * \returns
1547 * A value of 1 is always retured to indictate every i8xx is AGP. 1554 * A value of 1 is always retured to indictate every i8xx is AGP.
1548 */ 1555 */
1549int i830_driver_device_is_agp(struct drm_device * dev) 1556int i830_driver_device_is_agp(struct drm_device *dev)
1550{ 1557{
1551 return 1; 1558 return 1;
1552} 1559}
diff --git a/drivers/gpu/drm/i830/i830_drv.c b/drivers/gpu/drm/i830/i830_drv.c
index 44f990bed8f4..a5c66aa82f0c 100644
--- a/drivers/gpu/drm/i830/i830_drv.c
+++ b/drivers/gpu/drm/i830/i830_drv.c
@@ -70,7 +70,7 @@ static struct drm_driver driver = {
70 .owner = THIS_MODULE, 70 .owner = THIS_MODULE,
71 .open = drm_open, 71 .open = drm_open,
72 .release = drm_release, 72 .release = drm_release,
73 .unlocked_ioctl = drm_ioctl, 73 .unlocked_ioctl = i830_ioctl,
74 .mmap = drm_mmap, 74 .mmap = drm_mmap,
75 .poll = drm_poll, 75 .poll = drm_poll,
76 .fasync = drm_fasync, 76 .fasync = drm_fasync,
diff --git a/drivers/gpu/drm/i830/i830_drv.h b/drivers/gpu/drm/i830/i830_drv.h
index da82afe4ded5..0df1c720560b 100644
--- a/drivers/gpu/drm/i830/i830_drv.h
+++ b/drivers/gpu/drm/i830/i830_drv.h
@@ -122,6 +122,7 @@ typedef struct drm_i830_private {
122 122
123} drm_i830_private_t; 123} drm_i830_private_t;
124 124
125long i830_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
125extern struct drm_ioctl_desc i830_ioctls[]; 126extern struct drm_ioctl_desc i830_ioctls[];
126extern int i830_max_ioctl; 127extern int i830_max_ioctl;
127 128
@@ -132,33 +133,33 @@ extern int i830_irq_wait(struct drm_device *dev, void *data,
132 struct drm_file *file_priv); 133 struct drm_file *file_priv);
133 134
134extern irqreturn_t i830_driver_irq_handler(DRM_IRQ_ARGS); 135extern irqreturn_t i830_driver_irq_handler(DRM_IRQ_ARGS);
135extern void i830_driver_irq_preinstall(struct drm_device * dev); 136extern void i830_driver_irq_preinstall(struct drm_device *dev);
136extern void i830_driver_irq_postinstall(struct drm_device * dev); 137extern void i830_driver_irq_postinstall(struct drm_device *dev);
137extern void i830_driver_irq_uninstall(struct drm_device * dev); 138extern void i830_driver_irq_uninstall(struct drm_device *dev);
138extern int i830_driver_load(struct drm_device *, unsigned long flags); 139extern int i830_driver_load(struct drm_device *, unsigned long flags);
139extern void i830_driver_preclose(struct drm_device * dev, 140extern void i830_driver_preclose(struct drm_device *dev,
140 struct drm_file *file_priv); 141 struct drm_file *file_priv);
141extern void i830_driver_lastclose(struct drm_device * dev); 142extern void i830_driver_lastclose(struct drm_device *dev);
142extern void i830_driver_reclaim_buffers_locked(struct drm_device * dev, 143extern void i830_driver_reclaim_buffers_locked(struct drm_device *dev,
143 struct drm_file *file_priv); 144 struct drm_file *file_priv);
144extern int i830_driver_dma_quiescent(struct drm_device * dev); 145extern int i830_driver_dma_quiescent(struct drm_device *dev);
145extern int i830_driver_device_is_agp(struct drm_device * dev); 146extern int i830_driver_device_is_agp(struct drm_device *dev);
146 147
147#define I830_READ(reg) DRM_READ32(dev_priv->mmio_map, reg) 148#define I830_READ(reg) DRM_READ32(dev_priv->mmio_map, reg)
148#define I830_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio_map, reg, val) 149#define I830_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio_map, reg, val)
149#define I830_READ16(reg) DRM_READ16(dev_priv->mmio_map, reg) 150#define I830_READ16(reg) DRM_READ16(dev_priv->mmio_map, reg)
150#define I830_WRITE16(reg,val) DRM_WRITE16(dev_priv->mmio_map, reg, val) 151#define I830_WRITE16(reg, val) DRM_WRITE16(dev_priv->mmio_map, reg, val)
151 152
152#define I830_VERBOSE 0 153#define I830_VERBOSE 0
153 154
154#define RING_LOCALS unsigned int outring, ringmask, outcount; \ 155#define RING_LOCALS unsigned int outring, ringmask, outcount; \
155 volatile char *virt; 156 volatile char *virt;
156 157
157#define BEGIN_LP_RING(n) do { \ 158#define BEGIN_LP_RING(n) do { \
158 if (I830_VERBOSE) \ 159 if (I830_VERBOSE) \
159 printk("BEGIN_LP_RING(%d)\n", (n)); \ 160 printk("BEGIN_LP_RING(%d)\n", (n)); \
160 if (dev_priv->ring.space < n*4) \ 161 if (dev_priv->ring.space < n*4) \
161 i830_wait_ring(dev, n*4, __func__); \ 162 i830_wait_ring(dev, n*4, __func__); \
162 outcount = 0; \ 163 outcount = 0; \
163 outring = dev_priv->ring.tail; \ 164 outring = dev_priv->ring.tail; \
164 ringmask = dev_priv->ring.tail_mask; \ 165 ringmask = dev_priv->ring.tail_mask; \
@@ -166,21 +167,23 @@ extern int i830_driver_device_is_agp(struct drm_device * dev);
166} while (0) 167} while (0)
167 168
168#define OUT_RING(n) do { \ 169#define OUT_RING(n) do { \
169 if (I830_VERBOSE) printk(" OUT_RING %x\n", (int)(n)); \ 170 if (I830_VERBOSE) \
171 printk(" OUT_RING %x\n", (int)(n)); \
170 *(volatile unsigned int *)(virt + outring) = n; \ 172 *(volatile unsigned int *)(virt + outring) = n; \
171 outcount++; \ 173 outcount++; \
172 outring += 4; \ 174 outring += 4; \
173 outring &= ringmask; \ 175 outring &= ringmask; \
174} while (0) 176} while (0)
175 177
176#define ADVANCE_LP_RING() do { \ 178#define ADVANCE_LP_RING() do { \
177 if (I830_VERBOSE) printk("ADVANCE_LP_RING %x\n", outring); \ 179 if (I830_VERBOSE) \
178 dev_priv->ring.tail = outring; \ 180 printk("ADVANCE_LP_RING %x\n", outring); \
179 dev_priv->ring.space -= outcount * 4; \ 181 dev_priv->ring.tail = outring; \
180 I830_WRITE(LP_RING + RING_TAIL, outring); \ 182 dev_priv->ring.space -= outcount * 4; \
181} while(0) 183 I830_WRITE(LP_RING + RING_TAIL, outring); \
184} while (0)
182 185
183extern int i830_wait_ring(struct drm_device * dev, int n, const char *caller); 186extern int i830_wait_ring(struct drm_device *dev, int n, const char *caller);
184 187
185#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23)) 188#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23))
186#define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23)) 189#define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23))
diff --git a/drivers/gpu/drm/i830/i830_irq.c b/drivers/gpu/drm/i830/i830_irq.c
index 91ec2bb497e9..d1a6b95d631d 100644
--- a/drivers/gpu/drm/i830/i830_irq.c
+++ b/drivers/gpu/drm/i830/i830_irq.c
@@ -53,7 +53,7 @@ irqreturn_t i830_driver_irq_handler(DRM_IRQ_ARGS)
53 return IRQ_HANDLED; 53 return IRQ_HANDLED;
54} 54}
55 55
56static int i830_emit_irq(struct drm_device * dev) 56static int i830_emit_irq(struct drm_device *dev)
57{ 57{
58 drm_i830_private_t *dev_priv = dev->dev_private; 58 drm_i830_private_t *dev_priv = dev->dev_private;
59 RING_LOCALS; 59 RING_LOCALS;
@@ -70,7 +70,7 @@ static int i830_emit_irq(struct drm_device * dev)
70 return atomic_read(&dev_priv->irq_emitted); 70 return atomic_read(&dev_priv->irq_emitted);
71} 71}
72 72
73static int i830_wait_irq(struct drm_device * dev, int irq_nr) 73static int i830_wait_irq(struct drm_device *dev, int irq_nr)
74{ 74{
75 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private; 75 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
76 DECLARE_WAITQUEUE(entry, current); 76 DECLARE_WAITQUEUE(entry, current);
@@ -156,7 +156,7 @@ int i830_irq_wait(struct drm_device *dev, void *data,
156 156
157/* drm_dma.h hooks 157/* drm_dma.h hooks
158*/ 158*/
159void i830_driver_irq_preinstall(struct drm_device * dev) 159void i830_driver_irq_preinstall(struct drm_device *dev)
160{ 160{
161 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private; 161 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
162 162
@@ -168,14 +168,14 @@ void i830_driver_irq_preinstall(struct drm_device * dev)
168 init_waitqueue_head(&dev_priv->irq_queue); 168 init_waitqueue_head(&dev_priv->irq_queue);
169} 169}
170 170
171void i830_driver_irq_postinstall(struct drm_device * dev) 171void i830_driver_irq_postinstall(struct drm_device *dev)
172{ 172{
173 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private; 173 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
174 174
175 I830_WRITE16(I830REG_INT_ENABLE_R, 0x2); 175 I830_WRITE16(I830REG_INT_ENABLE_R, 0x2);
176} 176}
177 177
178void i830_driver_irq_uninstall(struct drm_device * dev) 178void i830_driver_irq_uninstall(struct drm_device *dev)
179{ 179{
180 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private; 180 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
181 if (!dev_priv) 181 if (!dev_priv)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index aee83fa178f6..9214119c0154 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -605,6 +605,9 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
605 case FBC_NOT_TILED: 605 case FBC_NOT_TILED:
606 seq_printf(m, "scanout buffer not tiled"); 606 seq_printf(m, "scanout buffer not tiled");
607 break; 607 break;
608 case FBC_MULTIPLE_PIPES:
609 seq_printf(m, "multiple pipes are enabled");
610 break;
608 default: 611 default:
609 seq_printf(m, "unknown reason"); 612 seq_printf(m, "unknown reason");
610 } 613 }
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index f00c5ae9556c..f19ffe87af3c 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -34,12 +34,15 @@
34#include "i915_drm.h" 34#include "i915_drm.h"
35#include "i915_drv.h" 35#include "i915_drv.h"
36#include "i915_trace.h" 36#include "i915_trace.h"
37#include <linux/pci.h>
37#include <linux/vgaarb.h> 38#include <linux/vgaarb.h>
38#include <linux/acpi.h> 39#include <linux/acpi.h>
39#include <linux/pnp.h> 40#include <linux/pnp.h>
40#include <linux/vga_switcheroo.h> 41#include <linux/vga_switcheroo.h>
41#include <linux/slab.h> 42#include <linux/slab.h>
42 43
44extern int intel_max_stolen; /* from AGP driver */
45
43/** 46/**
44 * Sets up the hardware status page for devices that need a physical address 47 * Sets up the hardware status page for devices that need a physical address
45 * in the register. 48 * in the register.
@@ -1256,7 +1259,7 @@ static void i915_setup_compression(struct drm_device *dev, int size)
1256 drm_mm_put_block(compressed_fb); 1259 drm_mm_put_block(compressed_fb);
1257 } 1260 }
1258 1261
1259 if (!IS_GM45(dev)) { 1262 if (!(IS_GM45(dev) || IS_IRONLAKE_M(dev))) {
1260 compressed_llb = drm_mm_search_free(&dev_priv->vram, 4096, 1263 compressed_llb = drm_mm_search_free(&dev_priv->vram, 4096,
1261 4096, 0); 1264 4096, 0);
1262 if (!compressed_llb) { 1265 if (!compressed_llb) {
@@ -1282,8 +1285,9 @@ static void i915_setup_compression(struct drm_device *dev, int size)
1282 1285
1283 intel_disable_fbc(dev); 1286 intel_disable_fbc(dev);
1284 dev_priv->compressed_fb = compressed_fb; 1287 dev_priv->compressed_fb = compressed_fb;
1285 1288 if (IS_IRONLAKE_M(dev))
1286 if (IS_GM45(dev)) { 1289 I915_WRITE(ILK_DPFC_CB_BASE, compressed_fb->start);
1290 else if (IS_GM45(dev)) {
1287 I915_WRITE(DPFC_CB_BASE, compressed_fb->start); 1291 I915_WRITE(DPFC_CB_BASE, compressed_fb->start);
1288 } else { 1292 } else {
1289 I915_WRITE(FBC_CFB_BASE, cfb_base); 1293 I915_WRITE(FBC_CFB_BASE, cfb_base);
@@ -1291,7 +1295,7 @@ static void i915_setup_compression(struct drm_device *dev, int size)
1291 dev_priv->compressed_llb = compressed_llb; 1295 dev_priv->compressed_llb = compressed_llb;
1292 } 1296 }
1293 1297
1294 DRM_DEBUG("FBC base 0x%08lx, ll base 0x%08lx, size %dM\n", cfb_base, 1298 DRM_DEBUG_KMS("FBC base 0x%08lx, ll base 0x%08lx, size %dM\n", cfb_base,
1295 ll_base, size >> 20); 1299 ll_base, size >> 20);
1296} 1300}
1297 1301
@@ -1300,7 +1304,7 @@ static void i915_cleanup_compression(struct drm_device *dev)
1300 struct drm_i915_private *dev_priv = dev->dev_private; 1304 struct drm_i915_private *dev_priv = dev->dev_private;
1301 1305
1302 drm_mm_put_block(dev_priv->compressed_fb); 1306 drm_mm_put_block(dev_priv->compressed_fb);
1303 if (!IS_GM45(dev)) 1307 if (dev_priv->compressed_llb)
1304 drm_mm_put_block(dev_priv->compressed_llb); 1308 drm_mm_put_block(dev_priv->compressed_llb);
1305} 1309}
1306 1310
@@ -1354,7 +1358,7 @@ static int i915_load_modeset_init(struct drm_device *dev,
1354 int fb_bar = IS_I9XX(dev) ? 2 : 0; 1358 int fb_bar = IS_I9XX(dev) ? 2 : 0;
1355 int ret = 0; 1359 int ret = 0;
1356 1360
1357 dev->mode_config.fb_base = drm_get_resource_start(dev, fb_bar) & 1361 dev->mode_config.fb_base = pci_resource_start(dev->pdev, fb_bar) &
1358 0xff000000; 1362 0xff000000;
1359 1363
1360 /* Basic memrange allocator for stolen space (aka vram) */ 1364 /* Basic memrange allocator for stolen space (aka vram) */
@@ -2063,8 +2067,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
2063 2067
2064 /* Add register map (needed for suspend/resume) */ 2068 /* Add register map (needed for suspend/resume) */
2065 mmio_bar = IS_I9XX(dev) ? 0 : 1; 2069 mmio_bar = IS_I9XX(dev) ? 0 : 1;
2066 base = drm_get_resource_start(dev, mmio_bar); 2070 base = pci_resource_start(dev->pdev, mmio_bar);
2067 size = drm_get_resource_len(dev, mmio_bar); 2071 size = pci_resource_len(dev->pdev, mmio_bar);
2068 2072
2069 if (i915_get_bridge_dev(dev)) { 2073 if (i915_get_bridge_dev(dev)) {
2070 ret = -EIO; 2074 ret = -EIO;
@@ -2104,6 +2108,12 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
2104 if (ret) 2108 if (ret)
2105 goto out_iomapfree; 2109 goto out_iomapfree;
2106 2110
2111 if (prealloc_size > intel_max_stolen) {
2112 DRM_INFO("detected %dM stolen memory, trimming to %dM\n",
2113 prealloc_size >> 20, intel_max_stolen >> 20);
2114 prealloc_size = intel_max_stolen;
2115 }
2116
2107 dev_priv->wq = create_singlethread_workqueue("i915"); 2117 dev_priv->wq = create_singlethread_workqueue("i915");
2108 if (dev_priv->wq == NULL) { 2118 if (dev_priv->wq == NULL) {
2109 DRM_ERROR("Failed to create our workqueue.\n"); 2119 DRM_ERROR("Failed to create our workqueue.\n");
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 423dc90c1e20..5044f653e8ea 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -93,11 +93,11 @@ static const struct intel_device_info intel_i945gm_info = {
93}; 93};
94 94
95static const struct intel_device_info intel_i965g_info = { 95static const struct intel_device_info intel_i965g_info = {
96 .is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1, 96 .is_broadwater = 1, .is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
97}; 97};
98 98
99static const struct intel_device_info intel_i965gm_info = { 99static const struct intel_device_info intel_i965gm_info = {
100 .is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1, 100 .is_crestline = 1, .is_i965g = 1, .is_i965gm = 1, .is_i9xx = 1,
101 .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1, 101 .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
102 .has_hotplug = 1, 102 .has_hotplug = 1,
103}; 103};
@@ -114,7 +114,7 @@ static const struct intel_device_info intel_g45_info = {
114}; 114};
115 115
116static const struct intel_device_info intel_gm45_info = { 116static const struct intel_device_info intel_gm45_info = {
117 .is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1, 117 .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1,
118 .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1, 118 .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
119 .has_pipe_cxsr = 1, 119 .has_pipe_cxsr = 1,
120 .has_hotplug = 1, 120 .has_hotplug = 1,
@@ -134,7 +134,7 @@ static const struct intel_device_info intel_ironlake_d_info = {
134 134
135static const struct intel_device_info intel_ironlake_m_info = { 135static const struct intel_device_info intel_ironlake_m_info = {
136 .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1, 136 .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
137 .need_gfx_hws = 1, .has_rc6 = 1, 137 .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
138 .has_hotplug = 1, 138 .has_hotplug = 1,
139}; 139};
140 140
@@ -148,33 +148,33 @@ static const struct intel_device_info intel_sandybridge_m_info = {
148 .has_hotplug = 1, .is_gen6 = 1, 148 .has_hotplug = 1, .is_gen6 = 1,
149}; 149};
150 150
151static const struct pci_device_id pciidlist[] = { 151static const struct pci_device_id pciidlist[] = { /* aka */
152 INTEL_VGA_DEVICE(0x3577, &intel_i830_info), 152 INTEL_VGA_DEVICE(0x3577, &intel_i830_info), /* I830_M */
153 INTEL_VGA_DEVICE(0x2562, &intel_845g_info), 153 INTEL_VGA_DEVICE(0x2562, &intel_845g_info), /* 845_G */
154 INTEL_VGA_DEVICE(0x3582, &intel_i85x_info), 154 INTEL_VGA_DEVICE(0x3582, &intel_i85x_info), /* I855_GM */
155 INTEL_VGA_DEVICE(0x358e, &intel_i85x_info), 155 INTEL_VGA_DEVICE(0x358e, &intel_i85x_info),
156 INTEL_VGA_DEVICE(0x2572, &intel_i865g_info), 156 INTEL_VGA_DEVICE(0x2572, &intel_i865g_info), /* I865_G */
157 INTEL_VGA_DEVICE(0x2582, &intel_i915g_info), 157 INTEL_VGA_DEVICE(0x2582, &intel_i915g_info), /* I915_G */
158 INTEL_VGA_DEVICE(0x258a, &intel_i915g_info), 158 INTEL_VGA_DEVICE(0x258a, &intel_i915g_info), /* E7221_G */
159 INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info), 159 INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info), /* I915_GM */
160 INTEL_VGA_DEVICE(0x2772, &intel_i945g_info), 160 INTEL_VGA_DEVICE(0x2772, &intel_i945g_info), /* I945_G */
161 INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info), 161 INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info), /* I945_GM */
162 INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info), 162 INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info), /* I945_GME */
163 INTEL_VGA_DEVICE(0x2972, &intel_i965g_info), 163 INTEL_VGA_DEVICE(0x2972, &intel_i965g_info), /* I946_GZ */
164 INTEL_VGA_DEVICE(0x2982, &intel_i965g_info), 164 INTEL_VGA_DEVICE(0x2982, &intel_i965g_info), /* G35_G */
165 INTEL_VGA_DEVICE(0x2992, &intel_i965g_info), 165 INTEL_VGA_DEVICE(0x2992, &intel_i965g_info), /* I965_Q */
166 INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info), 166 INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info), /* I965_G */
167 INTEL_VGA_DEVICE(0x29b2, &intel_g33_info), 167 INTEL_VGA_DEVICE(0x29b2, &intel_g33_info), /* Q35_G */
168 INTEL_VGA_DEVICE(0x29c2, &intel_g33_info), 168 INTEL_VGA_DEVICE(0x29c2, &intel_g33_info), /* G33_G */
169 INTEL_VGA_DEVICE(0x29d2, &intel_g33_info), 169 INTEL_VGA_DEVICE(0x29d2, &intel_g33_info), /* Q33_G */
170 INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info), 170 INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info), /* I965_GM */
171 INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info), 171 INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info), /* I965_GME */
172 INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info), 172 INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info), /* GM45_G */
173 INTEL_VGA_DEVICE(0x2e02, &intel_g45_info), 173 INTEL_VGA_DEVICE(0x2e02, &intel_g45_info), /* IGD_E_G */
174 INTEL_VGA_DEVICE(0x2e12, &intel_g45_info), 174 INTEL_VGA_DEVICE(0x2e12, &intel_g45_info), /* Q45_G */
175 INTEL_VGA_DEVICE(0x2e22, &intel_g45_info), 175 INTEL_VGA_DEVICE(0x2e22, &intel_g45_info), /* G45_G */
176 INTEL_VGA_DEVICE(0x2e32, &intel_g45_info), 176 INTEL_VGA_DEVICE(0x2e32, &intel_g45_info), /* G41_G */
177 INTEL_VGA_DEVICE(0x2e42, &intel_g45_info), 177 INTEL_VGA_DEVICE(0x2e42, &intel_g45_info), /* B43_G */
178 INTEL_VGA_DEVICE(0xa001, &intel_pineview_info), 178 INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
179 INTEL_VGA_DEVICE(0xa011, &intel_pineview_info), 179 INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
180 INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info), 180 INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
@@ -340,7 +340,7 @@ int i965_reset(struct drm_device *dev, u8 flags)
340 /* 340 /*
341 * Clear request list 341 * Clear request list
342 */ 342 */
343 i915_gem_retire_requests(dev, &dev_priv->render_ring); 343 i915_gem_retire_requests(dev);
344 344
345 if (need_display) 345 if (need_display)
346 i915_save_display(dev); 346 i915_save_display(dev);
@@ -413,7 +413,7 @@ int i965_reset(struct drm_device *dev, u8 flags)
413static int __devinit 413static int __devinit
414i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 414i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
415{ 415{
416 return drm_get_dev(pdev, ent, &driver); 416 return drm_get_pci_dev(pdev, ent, &driver);
417} 417}
418 418
419static void 419static void
@@ -482,7 +482,7 @@ static int i915_pm_poweroff(struct device *dev)
482 return i915_drm_freeze(drm_dev); 482 return i915_drm_freeze(drm_dev);
483} 483}
484 484
485const struct dev_pm_ops i915_pm_ops = { 485static const struct dev_pm_ops i915_pm_ops = {
486 .suspend = i915_pm_suspend, 486 .suspend = i915_pm_suspend,
487 .resume = i915_pm_resume, 487 .resume = i915_pm_resume,
488 .freeze = i915_pm_freeze, 488 .freeze = i915_pm_freeze,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d147ab2f5bfc..906663b9929e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -176,7 +176,8 @@ struct drm_i915_display_funcs {
176 int (*get_display_clock_speed)(struct drm_device *dev); 176 int (*get_display_clock_speed)(struct drm_device *dev);
177 int (*get_fifo_size)(struct drm_device *dev, int plane); 177 int (*get_fifo_size)(struct drm_device *dev, int plane);
178 void (*update_wm)(struct drm_device *dev, int planea_clock, 178 void (*update_wm)(struct drm_device *dev, int planea_clock,
179 int planeb_clock, int sr_hdisplay, int pixel_size); 179 int planeb_clock, int sr_hdisplay, int sr_htotal,
180 int pixel_size);
180 /* clock updates for mode set */ 181 /* clock updates for mode set */
181 /* cursor updates */ 182 /* cursor updates */
182 /* render clock increase/decrease */ 183 /* render clock increase/decrease */
@@ -200,6 +201,8 @@ struct intel_device_info {
200 u8 need_gfx_hws : 1; 201 u8 need_gfx_hws : 1;
201 u8 is_g4x : 1; 202 u8 is_g4x : 1;
202 u8 is_pineview : 1; 203 u8 is_pineview : 1;
204 u8 is_broadwater : 1;
205 u8 is_crestline : 1;
203 u8 is_ironlake : 1; 206 u8 is_ironlake : 1;
204 u8 is_gen6 : 1; 207 u8 is_gen6 : 1;
205 u8 has_fbc : 1; 208 u8 has_fbc : 1;
@@ -215,6 +218,7 @@ enum no_fbc_reason {
215 FBC_MODE_TOO_LARGE, /* mode too large for compression */ 218 FBC_MODE_TOO_LARGE, /* mode too large for compression */
216 FBC_BAD_PLANE, /* fbc not supported on plane */ 219 FBC_BAD_PLANE, /* fbc not supported on plane */
217 FBC_NOT_TILED, /* buffer not tiled */ 220 FBC_NOT_TILED, /* buffer not tiled */
221 FBC_MULTIPLE_PIPES, /* more than one pipe active */
218}; 222};
219 223
220enum intel_pch { 224enum intel_pch {
@@ -222,6 +226,8 @@ enum intel_pch {
222 PCH_CPT, /* Cougarpoint PCH */ 226 PCH_CPT, /* Cougarpoint PCH */
223}; 227};
224 228
229#define QUIRK_PIPEA_FORCE (1<<0)
230
225struct intel_fbdev; 231struct intel_fbdev;
226 232
227typedef struct drm_i915_private { 233typedef struct drm_i915_private {
@@ -285,6 +291,8 @@ typedef struct drm_i915_private {
285 struct timer_list hangcheck_timer; 291 struct timer_list hangcheck_timer;
286 int hangcheck_count; 292 int hangcheck_count;
287 uint32_t last_acthd; 293 uint32_t last_acthd;
294 uint32_t last_instdone;
295 uint32_t last_instdone1;
288 296
289 struct drm_mm vram; 297 struct drm_mm vram;
290 298
@@ -337,6 +345,8 @@ typedef struct drm_i915_private {
337 /* PCH chipset type */ 345 /* PCH chipset type */
338 enum intel_pch pch_type; 346 enum intel_pch pch_type;
339 347
348 unsigned long quirks;
349
340 /* Register state */ 350 /* Register state */
341 bool modeset_on_lid; 351 bool modeset_on_lid;
342 u8 saveLBB; 352 u8 saveLBB;
@@ -542,6 +552,14 @@ typedef struct drm_i915_private {
542 struct list_head fence_list; 552 struct list_head fence_list;
543 553
544 /** 554 /**
555 * List of objects currently pending being freed.
556 *
557 * These objects are no longer in use, but due to a signal
558 * we were prevented from freeing them at the appointed time.
559 */
560 struct list_head deferred_free_list;
561
562 /**
545 * We leave the user IRQ off as much as possible, 563 * We leave the user IRQ off as much as possible,
546 * but this means that requests will finish and never 564 * but this means that requests will finish and never
547 * be retired once the system goes idle. Set a timer to 565 * be retired once the system goes idle. Set a timer to
@@ -672,7 +690,7 @@ struct drm_i915_gem_object {
672 * 690 *
673 * Size: 4 bits for 16 fences + sign (for FENCE_REG_NONE) 691 * Size: 4 bits for 16 fences + sign (for FENCE_REG_NONE)
674 */ 692 */
675 int fence_reg : 5; 693 signed int fence_reg : 5;
676 694
677 /** 695 /**
678 * Used for checking the object doesn't appear more than once 696 * Used for checking the object doesn't appear more than once
@@ -708,7 +726,7 @@ struct drm_i915_gem_object {
708 * 726 *
709 * In the worst case this is 1 + 1 + 1 + 2*2 = 7. That would fit into 3 727 * In the worst case this is 1 + 1 + 1 + 2*2 = 7. That would fit into 3
710 * bits with absolutely no headroom. So use 4 bits. */ 728 * bits with absolutely no headroom. So use 4 bits. */
711 int pin_count : 4; 729 unsigned int pin_count : 4;
712#define DRM_I915_GEM_OBJECT_MAX_PIN_COUNT 0xf 730#define DRM_I915_GEM_OBJECT_MAX_PIN_COUNT 0xf
713 731
714 /** AGP memory structure for our GTT binding. */ 732 /** AGP memory structure for our GTT binding. */
@@ -738,7 +756,7 @@ struct drm_i915_gem_object {
738 uint32_t stride; 756 uint32_t stride;
739 757
740 /** Record of address bit 17 of each page at last unbind. */ 758 /** Record of address bit 17 of each page at last unbind. */
741 long *bit_17; 759 unsigned long *bit_17;
742 760
743 /** AGP mapping type (AGP_USER_MEMORY or AGP_USER_CACHED_MEMORY */ 761 /** AGP mapping type (AGP_USER_MEMORY or AGP_USER_CACHED_MEMORY */
744 uint32_t agp_type; 762 uint32_t agp_type;
@@ -950,8 +968,7 @@ uint32_t i915_get_gem_seqno(struct drm_device *dev,
950bool i915_seqno_passed(uint32_t seq1, uint32_t seq2); 968bool i915_seqno_passed(uint32_t seq1, uint32_t seq2);
951int i915_gem_object_get_fence_reg(struct drm_gem_object *obj); 969int i915_gem_object_get_fence_reg(struct drm_gem_object *obj);
952int i915_gem_object_put_fence_reg(struct drm_gem_object *obj); 970int i915_gem_object_put_fence_reg(struct drm_gem_object *obj);
953void i915_gem_retire_requests(struct drm_device *dev, 971void i915_gem_retire_requests(struct drm_device *dev);
954 struct intel_ring_buffer *ring);
955void i915_gem_retire_work_handler(struct work_struct *work); 972void i915_gem_retire_work_handler(struct work_struct *work);
956void i915_gem_clflush_object(struct drm_gem_object *obj); 973void i915_gem_clflush_object(struct drm_gem_object *obj);
957int i915_gem_object_set_domain(struct drm_gem_object *obj, 974int i915_gem_object_set_domain(struct drm_gem_object *obj,
@@ -981,7 +998,7 @@ void i915_gem_free_all_phys_object(struct drm_device *dev);
981int i915_gem_object_get_pages(struct drm_gem_object *obj, gfp_t gfpmask); 998int i915_gem_object_get_pages(struct drm_gem_object *obj, gfp_t gfpmask);
982void i915_gem_object_put_pages(struct drm_gem_object *obj); 999void i915_gem_object_put_pages(struct drm_gem_object *obj);
983void i915_gem_release(struct drm_device * dev, struct drm_file *file_priv); 1000void i915_gem_release(struct drm_device * dev, struct drm_file *file_priv);
984void i915_gem_object_flush_write_domain(struct drm_gem_object *obj); 1001int i915_gem_object_flush_write_domain(struct drm_gem_object *obj);
985 1002
986void i915_gem_shrinker_init(void); 1003void i915_gem_shrinker_init(void);
987void i915_gem_shrinker_exit(void); 1004void i915_gem_shrinker_exit(void);
@@ -1041,6 +1058,7 @@ extern void intel_modeset_cleanup(struct drm_device *dev);
1041extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state); 1058extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state);
1042extern void i8xx_disable_fbc(struct drm_device *dev); 1059extern void i8xx_disable_fbc(struct drm_device *dev);
1043extern void g4x_disable_fbc(struct drm_device *dev); 1060extern void g4x_disable_fbc(struct drm_device *dev);
1061extern void ironlake_disable_fbc(struct drm_device *dev);
1044extern void intel_disable_fbc(struct drm_device *dev); 1062extern void intel_disable_fbc(struct drm_device *dev);
1045extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval); 1063extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval);
1046extern bool intel_fbc_enabled(struct drm_device *dev); 1064extern bool intel_fbc_enabled(struct drm_device *dev);
@@ -1130,6 +1148,8 @@ extern int intel_trans_dp_port_sel (struct drm_crtc *crtc);
1130#define IS_I945GM(dev) (INTEL_INFO(dev)->is_i945gm) 1148#define IS_I945GM(dev) (INTEL_INFO(dev)->is_i945gm)
1131#define IS_I965G(dev) (INTEL_INFO(dev)->is_i965g) 1149#define IS_I965G(dev) (INTEL_INFO(dev)->is_i965g)
1132#define IS_I965GM(dev) (INTEL_INFO(dev)->is_i965gm) 1150#define IS_I965GM(dev) (INTEL_INFO(dev)->is_i965gm)
1151#define IS_BROADWATER(dev) (INTEL_INFO(dev)->is_broadwater)
1152#define IS_CRESTLINE(dev) (INTEL_INFO(dev)->is_crestline)
1133#define IS_GM45(dev) ((dev)->pci_device == 0x2A42) 1153#define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
1134#define IS_G4X(dev) (INTEL_INFO(dev)->is_g4x) 1154#define IS_G4X(dev) (INTEL_INFO(dev)->is_g4x)
1135#define IS_PINEVIEW_G(dev) ((dev)->pci_device == 0xa001) 1155#define IS_PINEVIEW_G(dev) ((dev)->pci_device == 0xa001)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 074385882ccf..2a4ed7ca8b4e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -35,7 +35,7 @@
35#include <linux/swap.h> 35#include <linux/swap.h>
36#include <linux/pci.h> 36#include <linux/pci.h>
37 37
38static void i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj); 38static int i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj);
39static void i915_gem_object_flush_gtt_write_domain(struct drm_gem_object *obj); 39static void i915_gem_object_flush_gtt_write_domain(struct drm_gem_object *obj);
40static void i915_gem_object_flush_cpu_write_domain(struct drm_gem_object *obj); 40static void i915_gem_object_flush_cpu_write_domain(struct drm_gem_object *obj);
41static int i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, 41static int i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj,
@@ -53,6 +53,7 @@ static int i915_gem_evict_from_inactive_list(struct drm_device *dev);
53static int i915_gem_phys_pwrite(struct drm_device *dev, struct drm_gem_object *obj, 53static int i915_gem_phys_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
54 struct drm_i915_gem_pwrite *args, 54 struct drm_i915_gem_pwrite *args,
55 struct drm_file *file_priv); 55 struct drm_file *file_priv);
56static void i915_gem_free_object_tail(struct drm_gem_object *obj);
56 57
57static LIST_HEAD(shrink_list); 58static LIST_HEAD(shrink_list);
58static DEFINE_SPINLOCK(shrink_list_lock); 59static DEFINE_SPINLOCK(shrink_list_lock);
@@ -127,8 +128,7 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data,
127 return -ENOMEM; 128 return -ENOMEM;
128 129
129 ret = drm_gem_handle_create(file_priv, obj, &handle); 130 ret = drm_gem_handle_create(file_priv, obj, &handle);
130 drm_gem_object_handle_unreference_unlocked(obj); 131 drm_gem_object_unreference_unlocked(obj);
131
132 if (ret) 132 if (ret)
133 return ret; 133 return ret;
134 134
@@ -496,10 +496,10 @@ fast_user_write(struct io_mapping *mapping,
496 char *vaddr_atomic; 496 char *vaddr_atomic;
497 unsigned long unwritten; 497 unsigned long unwritten;
498 498
499 vaddr_atomic = io_mapping_map_atomic_wc(mapping, page_base); 499 vaddr_atomic = io_mapping_map_atomic_wc(mapping, page_base, KM_USER0);
500 unwritten = __copy_from_user_inatomic_nocache(vaddr_atomic + page_offset, 500 unwritten = __copy_from_user_inatomic_nocache(vaddr_atomic + page_offset,
501 user_data, length); 501 user_data, length);
502 io_mapping_unmap_atomic(vaddr_atomic); 502 io_mapping_unmap_atomic(vaddr_atomic, KM_USER0);
503 if (unwritten) 503 if (unwritten)
504 return -EFAULT; 504 return -EFAULT;
505 return 0; 505 return 0;
@@ -1709,9 +1709,9 @@ i915_get_gem_seqno(struct drm_device *dev,
1709/** 1709/**
1710 * This function clears the request list as sequence numbers are passed. 1710 * This function clears the request list as sequence numbers are passed.
1711 */ 1711 */
1712void 1712static void
1713i915_gem_retire_requests(struct drm_device *dev, 1713i915_gem_retire_requests_ring(struct drm_device *dev,
1714 struct intel_ring_buffer *ring) 1714 struct intel_ring_buffer *ring)
1715{ 1715{
1716 drm_i915_private_t *dev_priv = dev->dev_private; 1716 drm_i915_private_t *dev_priv = dev->dev_private;
1717 uint32_t seqno; 1717 uint32_t seqno;
@@ -1751,6 +1751,30 @@ i915_gem_retire_requests(struct drm_device *dev,
1751} 1751}
1752 1752
1753void 1753void
1754i915_gem_retire_requests(struct drm_device *dev)
1755{
1756 drm_i915_private_t *dev_priv = dev->dev_private;
1757
1758 if (!list_empty(&dev_priv->mm.deferred_free_list)) {
1759 struct drm_i915_gem_object *obj_priv, *tmp;
1760
1761 /* We must be careful that during unbind() we do not
1762 * accidentally infinitely recurse into retire requests.
1763 * Currently:
1764 * retire -> free -> unbind -> wait -> retire_ring
1765 */
1766 list_for_each_entry_safe(obj_priv, tmp,
1767 &dev_priv->mm.deferred_free_list,
1768 list)
1769 i915_gem_free_object_tail(&obj_priv->base);
1770 }
1771
1772 i915_gem_retire_requests_ring(dev, &dev_priv->render_ring);
1773 if (HAS_BSD(dev))
1774 i915_gem_retire_requests_ring(dev, &dev_priv->bsd_ring);
1775}
1776
1777void
1754i915_gem_retire_work_handler(struct work_struct *work) 1778i915_gem_retire_work_handler(struct work_struct *work)
1755{ 1779{
1756 drm_i915_private_t *dev_priv; 1780 drm_i915_private_t *dev_priv;
@@ -1761,10 +1785,7 @@ i915_gem_retire_work_handler(struct work_struct *work)
1761 dev = dev_priv->dev; 1785 dev = dev_priv->dev;
1762 1786
1763 mutex_lock(&dev->struct_mutex); 1787 mutex_lock(&dev->struct_mutex);
1764 i915_gem_retire_requests(dev, &dev_priv->render_ring); 1788 i915_gem_retire_requests(dev);
1765
1766 if (HAS_BSD(dev))
1767 i915_gem_retire_requests(dev, &dev_priv->bsd_ring);
1768 1789
1769 if (!dev_priv->mm.suspended && 1790 if (!dev_priv->mm.suspended &&
1770 (!list_empty(&dev_priv->render_ring.request_list) || 1791 (!list_empty(&dev_priv->render_ring.request_list) ||
@@ -1832,7 +1853,7 @@ i915_do_wait_request(struct drm_device *dev, uint32_t seqno,
1832 * a separate wait queue to handle that. 1853 * a separate wait queue to handle that.
1833 */ 1854 */
1834 if (ret == 0) 1855 if (ret == 0)
1835 i915_gem_retire_requests(dev, ring); 1856 i915_gem_retire_requests_ring(dev, ring);
1836 1857
1837 return ret; 1858 return ret;
1838} 1859}
@@ -1945,11 +1966,12 @@ i915_gem_object_unbind(struct drm_gem_object *obj)
1945 * before we unbind. 1966 * before we unbind.
1946 */ 1967 */
1947 ret = i915_gem_object_set_to_cpu_domain(obj, 1); 1968 ret = i915_gem_object_set_to_cpu_domain(obj, 1);
1948 if (ret) { 1969 if (ret == -ERESTARTSYS)
1949 if (ret != -ERESTARTSYS)
1950 DRM_ERROR("set_domain failed: %d\n", ret);
1951 return ret; 1970 return ret;
1952 } 1971 /* Continue on if we fail due to EIO, the GPU is hung so we
1972 * should be safe and we need to cleanup or else we might
1973 * cause memory corruption through use-after-free.
1974 */
1953 1975
1954 BUG_ON(obj_priv->active); 1976 BUG_ON(obj_priv->active);
1955 1977
@@ -1985,7 +2007,7 @@ i915_gem_object_unbind(struct drm_gem_object *obj)
1985 2007
1986 trace_i915_gem_object_unbind(obj); 2008 trace_i915_gem_object_unbind(obj);
1987 2009
1988 return 0; 2010 return ret;
1989} 2011}
1990 2012
1991static struct drm_gem_object * 2013static struct drm_gem_object *
@@ -2107,10 +2129,7 @@ i915_gem_evict_something(struct drm_device *dev, int min_size)
2107 struct intel_ring_buffer *render_ring = &dev_priv->render_ring; 2129 struct intel_ring_buffer *render_ring = &dev_priv->render_ring;
2108 struct intel_ring_buffer *bsd_ring = &dev_priv->bsd_ring; 2130 struct intel_ring_buffer *bsd_ring = &dev_priv->bsd_ring;
2109 for (;;) { 2131 for (;;) {
2110 i915_gem_retire_requests(dev, render_ring); 2132 i915_gem_retire_requests(dev);
2111
2112 if (HAS_BSD(dev))
2113 i915_gem_retire_requests(dev, bsd_ring);
2114 2133
2115 /* If there's an inactive buffer available now, grab it 2134 /* If there's an inactive buffer available now, grab it
2116 * and be done. 2135 * and be done.
@@ -2241,6 +2260,7 @@ i915_gem_object_get_pages(struct drm_gem_object *obj,
2241 page = read_cache_page_gfp(mapping, i, 2260 page = read_cache_page_gfp(mapping, i,
2242 GFP_HIGHUSER | 2261 GFP_HIGHUSER |
2243 __GFP_COLD | 2262 __GFP_COLD |
2263 __GFP_RECLAIMABLE |
2244 gfpmask); 2264 gfpmask);
2245 if (IS_ERR(page)) 2265 if (IS_ERR(page))
2246 goto err_pages; 2266 goto err_pages;
@@ -2582,7 +2602,10 @@ i915_gem_object_put_fence_reg(struct drm_gem_object *obj)
2582 if (!IS_I965G(dev)) { 2602 if (!IS_I965G(dev)) {
2583 int ret; 2603 int ret;
2584 2604
2585 i915_gem_object_flush_gpu_write_domain(obj); 2605 ret = i915_gem_object_flush_gpu_write_domain(obj);
2606 if (ret != 0)
2607 return ret;
2608
2586 ret = i915_gem_object_wait_rendering(obj); 2609 ret = i915_gem_object_wait_rendering(obj);
2587 if (ret != 0) 2610 if (ret != 0)
2588 return ret; 2611 return ret;
@@ -2633,10 +2656,8 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment)
2633 if (free_space != NULL) { 2656 if (free_space != NULL) {
2634 obj_priv->gtt_space = drm_mm_get_block(free_space, obj->size, 2657 obj_priv->gtt_space = drm_mm_get_block(free_space, obj->size,
2635 alignment); 2658 alignment);
2636 if (obj_priv->gtt_space != NULL) { 2659 if (obj_priv->gtt_space != NULL)
2637 obj_priv->gtt_space->private = obj;
2638 obj_priv->gtt_offset = obj_priv->gtt_space->start; 2660 obj_priv->gtt_offset = obj_priv->gtt_space->start;
2639 }
2640 } 2661 }
2641 if (obj_priv->gtt_space == NULL) { 2662 if (obj_priv->gtt_space == NULL) {
2642 /* If the gtt is empty and we're still having trouble 2663 /* If the gtt is empty and we're still having trouble
@@ -2732,7 +2753,7 @@ i915_gem_clflush_object(struct drm_gem_object *obj)
2732} 2753}
2733 2754
2734/** Flushes any GPU write domain for the object if it's dirty. */ 2755/** Flushes any GPU write domain for the object if it's dirty. */
2735static void 2756static int
2736i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj) 2757i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj)
2737{ 2758{
2738 struct drm_device *dev = obj->dev; 2759 struct drm_device *dev = obj->dev;
@@ -2740,17 +2761,18 @@ i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj)
2740 struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); 2761 struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
2741 2762
2742 if ((obj->write_domain & I915_GEM_GPU_DOMAINS) == 0) 2763 if ((obj->write_domain & I915_GEM_GPU_DOMAINS) == 0)
2743 return; 2764 return 0;
2744 2765
2745 /* Queue the GPU write cache flushing we need. */ 2766 /* Queue the GPU write cache flushing we need. */
2746 old_write_domain = obj->write_domain; 2767 old_write_domain = obj->write_domain;
2747 i915_gem_flush(dev, 0, obj->write_domain); 2768 i915_gem_flush(dev, 0, obj->write_domain);
2748 (void) i915_add_request(dev, NULL, obj->write_domain, obj_priv->ring); 2769 if (i915_add_request(dev, NULL, obj->write_domain, obj_priv->ring) == 0)
2749 BUG_ON(obj->write_domain); 2770 return -ENOMEM;
2750 2771
2751 trace_i915_gem_object_change_domain(obj, 2772 trace_i915_gem_object_change_domain(obj,
2752 obj->read_domains, 2773 obj->read_domains,
2753 old_write_domain); 2774 old_write_domain);
2775 return 0;
2754} 2776}
2755 2777
2756/** Flushes the GTT write domain for the object if it's dirty. */ 2778/** Flushes the GTT write domain for the object if it's dirty. */
@@ -2794,9 +2816,11 @@ i915_gem_object_flush_cpu_write_domain(struct drm_gem_object *obj)
2794 old_write_domain); 2816 old_write_domain);
2795} 2817}
2796 2818
2797void 2819int
2798i915_gem_object_flush_write_domain(struct drm_gem_object *obj) 2820i915_gem_object_flush_write_domain(struct drm_gem_object *obj)
2799{ 2821{
2822 int ret = 0;
2823
2800 switch (obj->write_domain) { 2824 switch (obj->write_domain) {
2801 case I915_GEM_DOMAIN_GTT: 2825 case I915_GEM_DOMAIN_GTT:
2802 i915_gem_object_flush_gtt_write_domain(obj); 2826 i915_gem_object_flush_gtt_write_domain(obj);
@@ -2805,9 +2829,11 @@ i915_gem_object_flush_write_domain(struct drm_gem_object *obj)
2805 i915_gem_object_flush_cpu_write_domain(obj); 2829 i915_gem_object_flush_cpu_write_domain(obj);
2806 break; 2830 break;
2807 default: 2831 default:
2808 i915_gem_object_flush_gpu_write_domain(obj); 2832 ret = i915_gem_object_flush_gpu_write_domain(obj);
2809 break; 2833 break;
2810 } 2834 }
2835
2836 return ret;
2811} 2837}
2812 2838
2813/** 2839/**
@@ -2827,7 +2853,10 @@ i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, int write)
2827 if (obj_priv->gtt_space == NULL) 2853 if (obj_priv->gtt_space == NULL)
2828 return -EINVAL; 2854 return -EINVAL;
2829 2855
2830 i915_gem_object_flush_gpu_write_domain(obj); 2856 ret = i915_gem_object_flush_gpu_write_domain(obj);
2857 if (ret != 0)
2858 return ret;
2859
2831 /* Wait on any GPU rendering and flushing to occur. */ 2860 /* Wait on any GPU rendering and flushing to occur. */
2832 ret = i915_gem_object_wait_rendering(obj); 2861 ret = i915_gem_object_wait_rendering(obj);
2833 if (ret != 0) 2862 if (ret != 0)
@@ -2877,7 +2906,9 @@ i915_gem_object_set_to_display_plane(struct drm_gem_object *obj)
2877 if (obj_priv->gtt_space == NULL) 2906 if (obj_priv->gtt_space == NULL)
2878 return -EINVAL; 2907 return -EINVAL;
2879 2908
2880 i915_gem_object_flush_gpu_write_domain(obj); 2909 ret = i915_gem_object_flush_gpu_write_domain(obj);
2910 if (ret)
2911 return ret;
2881 2912
2882 /* Wait on any GPU rendering and flushing to occur. */ 2913 /* Wait on any GPU rendering and flushing to occur. */
2883 if (obj_priv->active) { 2914 if (obj_priv->active) {
@@ -2925,7 +2956,10 @@ i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, int write)
2925 uint32_t old_write_domain, old_read_domains; 2956 uint32_t old_write_domain, old_read_domains;
2926 int ret; 2957 int ret;
2927 2958
2928 i915_gem_object_flush_gpu_write_domain(obj); 2959 ret = i915_gem_object_flush_gpu_write_domain(obj);
2960 if (ret)
2961 return ret;
2962
2929 /* Wait on any GPU rendering and flushing to occur. */ 2963 /* Wait on any GPU rendering and flushing to occur. */
2930 ret = i915_gem_object_wait_rendering(obj); 2964 ret = i915_gem_object_wait_rendering(obj);
2931 if (ret != 0) 2965 if (ret != 0)
@@ -3215,7 +3249,10 @@ i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj,
3215 if (offset == 0 && size == obj->size) 3249 if (offset == 0 && size == obj->size)
3216 return i915_gem_object_set_to_cpu_domain(obj, 0); 3250 return i915_gem_object_set_to_cpu_domain(obj, 0);
3217 3251
3218 i915_gem_object_flush_gpu_write_domain(obj); 3252 ret = i915_gem_object_flush_gpu_write_domain(obj);
3253 if (ret)
3254 return ret;
3255
3219 /* Wait on any GPU rendering and flushing to occur. */ 3256 /* Wait on any GPU rendering and flushing to occur. */
3220 ret = i915_gem_object_wait_rendering(obj); 3257 ret = i915_gem_object_wait_rendering(obj);
3221 if (ret != 0) 3258 if (ret != 0)
@@ -3450,7 +3487,8 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
3450 reloc_offset = obj_priv->gtt_offset + reloc->offset; 3487 reloc_offset = obj_priv->gtt_offset + reloc->offset;
3451 reloc_page = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping, 3488 reloc_page = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
3452 (reloc_offset & 3489 (reloc_offset &
3453 ~(PAGE_SIZE - 1))); 3490 ~(PAGE_SIZE - 1)),
3491 KM_USER0);
3454 reloc_entry = (uint32_t __iomem *)(reloc_page + 3492 reloc_entry = (uint32_t __iomem *)(reloc_page +
3455 (reloc_offset & (PAGE_SIZE - 1))); 3493 (reloc_offset & (PAGE_SIZE - 1)));
3456 reloc_val = target_obj_priv->gtt_offset + reloc->delta; 3494 reloc_val = target_obj_priv->gtt_offset + reloc->delta;
@@ -3461,7 +3499,7 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
3461 readl(reloc_entry), reloc_val); 3499 readl(reloc_entry), reloc_val);
3462#endif 3500#endif
3463 writel(reloc_val, reloc_entry); 3501 writel(reloc_val, reloc_entry);
3464 io_mapping_unmap_atomic(reloc_page); 3502 io_mapping_unmap_atomic(reloc_page, KM_USER0);
3465 3503
3466 /* The updated presumed offset for this entry will be 3504 /* The updated presumed offset for this entry will be
3467 * copied back out to the user. 3505 * copied back out to the user.
@@ -3646,6 +3684,7 @@ i915_gem_wait_for_pending_flip(struct drm_device *dev,
3646 return ret; 3684 return ret;
3647} 3685}
3648 3686
3687
3649int 3688int
3650i915_gem_do_execbuffer(struct drm_device *dev, void *data, 3689i915_gem_do_execbuffer(struct drm_device *dev, void *data,
3651 struct drm_file *file_priv, 3690 struct drm_file *file_priv,
@@ -3793,7 +3832,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
3793 unsigned long long total_size = 0; 3832 unsigned long long total_size = 0;
3794 int num_fences = 0; 3833 int num_fences = 0;
3795 for (i = 0; i < args->buffer_count; i++) { 3834 for (i = 0; i < args->buffer_count; i++) {
3796 obj_priv = object_list[i]->driver_private; 3835 obj_priv = to_intel_bo(object_list[i]);
3797 3836
3798 total_size += object_list[i]->size; 3837 total_size += object_list[i]->size;
3799 num_fences += 3838 num_fences +=
@@ -4311,7 +4350,6 @@ i915_gem_busy_ioctl(struct drm_device *dev, void *data,
4311 struct drm_i915_gem_busy *args = data; 4350 struct drm_i915_gem_busy *args = data;
4312 struct drm_gem_object *obj; 4351 struct drm_gem_object *obj;
4313 struct drm_i915_gem_object *obj_priv; 4352 struct drm_i915_gem_object *obj_priv;
4314 drm_i915_private_t *dev_priv = dev->dev_private;
4315 4353
4316 obj = drm_gem_object_lookup(dev, file_priv, args->handle); 4354 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
4317 if (obj == NULL) { 4355 if (obj == NULL) {
@@ -4326,10 +4364,7 @@ i915_gem_busy_ioctl(struct drm_device *dev, void *data,
4326 * actually unmasked, and our working set ends up being larger than 4364 * actually unmasked, and our working set ends up being larger than
4327 * required. 4365 * required.
4328 */ 4366 */
4329 i915_gem_retire_requests(dev, &dev_priv->render_ring); 4367 i915_gem_retire_requests(dev);
4330
4331 if (HAS_BSD(dev))
4332 i915_gem_retire_requests(dev, &dev_priv->bsd_ring);
4333 4368
4334 obj_priv = to_intel_bo(obj); 4369 obj_priv = to_intel_bo(obj);
4335 /* Don't count being on the flushing list against the object being 4370 /* Don't count being on the flushing list against the object being
@@ -4439,20 +4474,19 @@ int i915_gem_init_object(struct drm_gem_object *obj)
4439 return 0; 4474 return 0;
4440} 4475}
4441 4476
4442void i915_gem_free_object(struct drm_gem_object *obj) 4477static void i915_gem_free_object_tail(struct drm_gem_object *obj)
4443{ 4478{
4444 struct drm_device *dev = obj->dev; 4479 struct drm_device *dev = obj->dev;
4480 drm_i915_private_t *dev_priv = dev->dev_private;
4445 struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); 4481 struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
4482 int ret;
4446 4483
4447 trace_i915_gem_object_destroy(obj); 4484 ret = i915_gem_object_unbind(obj);
4448 4485 if (ret == -ERESTARTSYS) {
4449 while (obj_priv->pin_count > 0) 4486 list_move(&obj_priv->list,
4450 i915_gem_object_unpin(obj); 4487 &dev_priv->mm.deferred_free_list);
4451 4488 return;
4452 if (obj_priv->phys_obj) 4489 }
4453 i915_gem_detach_phys_object(dev, obj);
4454
4455 i915_gem_object_unbind(obj);
4456 4490
4457 if (obj_priv->mmap_offset) 4491 if (obj_priv->mmap_offset)
4458 i915_gem_free_mmap_offset(obj); 4492 i915_gem_free_mmap_offset(obj);
@@ -4464,6 +4498,22 @@ void i915_gem_free_object(struct drm_gem_object *obj)
4464 kfree(obj_priv); 4498 kfree(obj_priv);
4465} 4499}
4466 4500
4501void i915_gem_free_object(struct drm_gem_object *obj)
4502{
4503 struct drm_device *dev = obj->dev;
4504 struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
4505
4506 trace_i915_gem_object_destroy(obj);
4507
4508 while (obj_priv->pin_count > 0)
4509 i915_gem_object_unpin(obj);
4510
4511 if (obj_priv->phys_obj)
4512 i915_gem_detach_phys_object(dev, obj);
4513
4514 i915_gem_free_object_tail(obj);
4515}
4516
4467/** Unbinds all inactive objects. */ 4517/** Unbinds all inactive objects. */
4468static int 4518static int
4469i915_gem_evict_from_inactive_list(struct drm_device *dev) 4519i915_gem_evict_from_inactive_list(struct drm_device *dev)
@@ -4687,9 +4737,19 @@ i915_gem_entervt_ioctl(struct drm_device *dev, void *data,
4687 BUG_ON(HAS_BSD(dev) && !list_empty(&dev_priv->bsd_ring.request_list)); 4737 BUG_ON(HAS_BSD(dev) && !list_empty(&dev_priv->bsd_ring.request_list));
4688 mutex_unlock(&dev->struct_mutex); 4738 mutex_unlock(&dev->struct_mutex);
4689 4739
4690 drm_irq_install(dev); 4740 ret = drm_irq_install(dev);
4741 if (ret)
4742 goto cleanup_ringbuffer;
4691 4743
4692 return 0; 4744 return 0;
4745
4746cleanup_ringbuffer:
4747 mutex_lock(&dev->struct_mutex);
4748 i915_gem_cleanup_ringbuffer(dev);
4749 dev_priv->mm.suspended = 1;
4750 mutex_unlock(&dev->struct_mutex);
4751
4752 return ret;
4693} 4753}
4694 4754
4695int 4755int
@@ -4727,6 +4787,7 @@ i915_gem_load(struct drm_device *dev)
4727 INIT_LIST_HEAD(&dev_priv->mm.gpu_write_list); 4787 INIT_LIST_HEAD(&dev_priv->mm.gpu_write_list);
4728 INIT_LIST_HEAD(&dev_priv->mm.inactive_list); 4788 INIT_LIST_HEAD(&dev_priv->mm.inactive_list);
4729 INIT_LIST_HEAD(&dev_priv->mm.fence_list); 4789 INIT_LIST_HEAD(&dev_priv->mm.fence_list);
4790 INIT_LIST_HEAD(&dev_priv->mm.deferred_free_list);
4730 INIT_LIST_HEAD(&dev_priv->render_ring.active_list); 4791 INIT_LIST_HEAD(&dev_priv->render_ring.active_list);
4731 INIT_LIST_HEAD(&dev_priv->render_ring.request_list); 4792 INIT_LIST_HEAD(&dev_priv->render_ring.request_list);
4732 if (HAS_BSD(dev)) { 4793 if (HAS_BSD(dev)) {
@@ -4741,6 +4802,16 @@ i915_gem_load(struct drm_device *dev)
4741 list_add(&dev_priv->mm.shrink_list, &shrink_list); 4802 list_add(&dev_priv->mm.shrink_list, &shrink_list);
4742 spin_unlock(&shrink_list_lock); 4803 spin_unlock(&shrink_list_lock);
4743 4804
4805 /* On GEN3 we really need to make sure the ARB C3 LP bit is set */
4806 if (IS_GEN3(dev)) {
4807 u32 tmp = I915_READ(MI_ARB_STATE);
4808 if (!(tmp & MI_ARB_C3_LP_WRITE_ENABLE)) {
4809 /* arb state is a masked write, so set bit + bit in mask */
4810 tmp = MI_ARB_C3_LP_WRITE_ENABLE | (MI_ARB_C3_LP_WRITE_ENABLE << MI_ARB_MASK_SHIFT);
4811 I915_WRITE(MI_ARB_STATE, tmp);
4812 }
4813 }
4814
4744 /* Old X drivers will take 0-2 for front, back, depth buffers */ 4815 /* Old X drivers will take 0-2 for front, back, depth buffers */
4745 if (!drm_core_check_feature(dev, DRIVER_MODESET)) 4816 if (!drm_core_check_feature(dev, DRIVER_MODESET))
4746 dev_priv->fence_reg_start = 3; 4817 dev_priv->fence_reg_start = 3;
@@ -4977,7 +5048,7 @@ i915_gpu_is_active(struct drm_device *dev)
4977} 5048}
4978 5049
4979static int 5050static int
4980i915_gem_shrink(int nr_to_scan, gfp_t gfp_mask) 5051i915_gem_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
4981{ 5052{
4982 drm_i915_private_t *dev_priv, *next_dev; 5053 drm_i915_private_t *dev_priv, *next_dev;
4983 struct drm_i915_gem_object *obj_priv, *next_obj; 5054 struct drm_i915_gem_object *obj_priv, *next_obj;
@@ -5015,10 +5086,7 @@ rescan:
5015 continue; 5086 continue;
5016 5087
5017 spin_unlock(&shrink_list_lock); 5088 spin_unlock(&shrink_list_lock);
5018 i915_gem_retire_requests(dev, &dev_priv->render_ring); 5089 i915_gem_retire_requests(dev);
5019
5020 if (HAS_BSD(dev))
5021 i915_gem_retire_requests(dev, &dev_priv->bsd_ring);
5022 5090
5023 list_for_each_entry_safe(obj_priv, next_obj, 5091 list_for_each_entry_safe(obj_priv, next_obj,
5024 &dev_priv->mm.inactive_list, 5092 &dev_priv->mm.inactive_list,
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 4b7c49d4257d..155719e4d16f 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -333,8 +333,6 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
333 i915_gem_release_mmap(obj); 333 i915_gem_release_mmap(obj);
334 334
335 if (ret != 0) { 335 if (ret != 0) {
336 WARN(ret != -ERESTARTSYS,
337 "failed to reset object for tiling switch");
338 args->tiling_mode = obj_priv->tiling_mode; 336 args->tiling_mode = obj_priv->tiling_mode;
339 args->stride = obj_priv->stride; 337 args->stride = obj_priv->stride;
340 goto err; 338 goto err;
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index dba53d4b9fb3..85785a8844ed 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -171,10 +171,10 @@ void intel_enable_asle (struct drm_device *dev)
171 ironlake_enable_display_irq(dev_priv, DE_GSE); 171 ironlake_enable_display_irq(dev_priv, DE_GSE);
172 else { 172 else {
173 i915_enable_pipestat(dev_priv, 1, 173 i915_enable_pipestat(dev_priv, 1,
174 I915_LEGACY_BLC_EVENT_ENABLE); 174 PIPE_LEGACY_BLC_EVENT_ENABLE);
175 if (IS_I965G(dev)) 175 if (IS_I965G(dev))
176 i915_enable_pipestat(dev_priv, 0, 176 i915_enable_pipestat(dev_priv, 0,
177 I915_LEGACY_BLC_EVENT_ENABLE); 177 PIPE_LEGACY_BLC_EVENT_ENABLE);
178 } 178 }
179} 179}
180 180
@@ -842,7 +842,6 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
842 u32 iir, new_iir; 842 u32 iir, new_iir;
843 u32 pipea_stats, pipeb_stats; 843 u32 pipea_stats, pipeb_stats;
844 u32 vblank_status; 844 u32 vblank_status;
845 u32 vblank_enable;
846 int vblank = 0; 845 int vblank = 0;
847 unsigned long irqflags; 846 unsigned long irqflags;
848 int irq_received; 847 int irq_received;
@@ -856,13 +855,10 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
856 855
857 iir = I915_READ(IIR); 856 iir = I915_READ(IIR);
858 857
859 if (IS_I965G(dev)) { 858 if (IS_I965G(dev))
860 vblank_status = I915_START_VBLANK_INTERRUPT_STATUS; 859 vblank_status = PIPE_START_VBLANK_INTERRUPT_STATUS;
861 vblank_enable = PIPE_START_VBLANK_INTERRUPT_ENABLE; 860 else
862 } else { 861 vblank_status = PIPE_VBLANK_INTERRUPT_STATUS;
863 vblank_status = I915_VBLANK_INTERRUPT_STATUS;
864 vblank_enable = I915_VBLANK_INTERRUPT_ENABLE;
865 }
866 862
867 for (;;) { 863 for (;;) {
868 irq_received = iir != 0; 864 irq_received = iir != 0;
@@ -966,8 +962,8 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
966 intel_finish_page_flip(dev, 1); 962 intel_finish_page_flip(dev, 1);
967 } 963 }
968 964
969 if ((pipea_stats & I915_LEGACY_BLC_EVENT_STATUS) || 965 if ((pipea_stats & PIPE_LEGACY_BLC_EVENT_STATUS) ||
970 (pipeb_stats & I915_LEGACY_BLC_EVENT_STATUS) || 966 (pipeb_stats & PIPE_LEGACY_BLC_EVENT_STATUS) ||
971 (iir & I915_ASLE_INTERRUPT)) 967 (iir & I915_ASLE_INTERRUPT))
972 opregion_asle_intr(dev); 968 opregion_asle_intr(dev);
973 969
@@ -1233,16 +1229,21 @@ void i915_hangcheck_elapsed(unsigned long data)
1233{ 1229{
1234 struct drm_device *dev = (struct drm_device *)data; 1230 struct drm_device *dev = (struct drm_device *)data;
1235 drm_i915_private_t *dev_priv = dev->dev_private; 1231 drm_i915_private_t *dev_priv = dev->dev_private;
1236 uint32_t acthd; 1232 uint32_t acthd, instdone, instdone1;
1237 1233
1238 /* No reset support on this chip yet. */ 1234 /* No reset support on this chip yet. */
1239 if (IS_GEN6(dev)) 1235 if (IS_GEN6(dev))
1240 return; 1236 return;
1241 1237
1242 if (!IS_I965G(dev)) 1238 if (!IS_I965G(dev)) {
1243 acthd = I915_READ(ACTHD); 1239 acthd = I915_READ(ACTHD);
1244 else 1240 instdone = I915_READ(INSTDONE);
1241 instdone1 = 0;
1242 } else {
1245 acthd = I915_READ(ACTHD_I965); 1243 acthd = I915_READ(ACTHD_I965);
1244 instdone = I915_READ(INSTDONE_I965);
1245 instdone1 = I915_READ(INSTDONE1);
1246 }
1246 1247
1247 /* If all work is done then ACTHD clearly hasn't advanced. */ 1248 /* If all work is done then ACTHD clearly hasn't advanced. */
1248 if (list_empty(&dev_priv->render_ring.request_list) || 1249 if (list_empty(&dev_priv->render_ring.request_list) ||
@@ -1253,21 +1254,24 @@ void i915_hangcheck_elapsed(unsigned long data)
1253 return; 1254 return;
1254 } 1255 }
1255 1256
1256 if (dev_priv->last_acthd == acthd && dev_priv->hangcheck_count > 0) { 1257 if (dev_priv->last_acthd == acthd &&
1257 DRM_ERROR("Hangcheck timer elapsed... GPU hung\n"); 1258 dev_priv->last_instdone == instdone &&
1258 i915_handle_error(dev, true); 1259 dev_priv->last_instdone1 == instdone1) {
1259 return; 1260 if (dev_priv->hangcheck_count++ > 1) {
1260 } 1261 DRM_ERROR("Hangcheck timer elapsed... GPU hung\n");
1262 i915_handle_error(dev, true);
1263 return;
1264 }
1265 } else {
1266 dev_priv->hangcheck_count = 0;
1267
1268 dev_priv->last_acthd = acthd;
1269 dev_priv->last_instdone = instdone;
1270 dev_priv->last_instdone1 = instdone1;
1271 }
1261 1272
1262 /* Reset timer case chip hangs without another request being added */ 1273 /* Reset timer case chip hangs without another request being added */
1263 mod_timer(&dev_priv->hangcheck_timer, jiffies + DRM_I915_HANGCHECK_PERIOD); 1274 mod_timer(&dev_priv->hangcheck_timer, jiffies + DRM_I915_HANGCHECK_PERIOD);
1264
1265 if (acthd != dev_priv->last_acthd)
1266 dev_priv->hangcheck_count = 0;
1267 else
1268 dev_priv->hangcheck_count++;
1269
1270 dev_priv->last_acthd = acthd;
1271} 1275}
1272 1276
1273/* drm_dma.h hooks 1277/* drm_dma.h hooks
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 150400f40534..281db6e5403a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -359,6 +359,70 @@
359#define LM_BURST_LENGTH 0x00000700 359#define LM_BURST_LENGTH 0x00000700
360#define LM_FIFO_WATERMARK 0x0000001F 360#define LM_FIFO_WATERMARK 0x0000001F
361#define MI_ARB_STATE 0x020e4 /* 915+ only */ 361#define MI_ARB_STATE 0x020e4 /* 915+ only */
362#define MI_ARB_MASK_SHIFT 16 /* shift for enable bits */
363
364/* Make render/texture TLB fetches lower priorty than associated data
365 * fetches. This is not turned on by default
366 */
367#define MI_ARB_RENDER_TLB_LOW_PRIORITY (1 << 15)
368
369/* Isoch request wait on GTT enable (Display A/B/C streams).
370 * Make isoch requests stall on the TLB update. May cause
371 * display underruns (test mode only)
372 */
373#define MI_ARB_ISOCH_WAIT_GTT (1 << 14)
374
375/* Block grant count for isoch requests when block count is
376 * set to a finite value.
377 */
378#define MI_ARB_BLOCK_GRANT_MASK (3 << 12)
379#define MI_ARB_BLOCK_GRANT_8 (0 << 12) /* for 3 display planes */
380#define MI_ARB_BLOCK_GRANT_4 (1 << 12) /* for 2 display planes */
381#define MI_ARB_BLOCK_GRANT_2 (2 << 12) /* for 1 display plane */
382#define MI_ARB_BLOCK_GRANT_0 (3 << 12) /* don't use */
383
384/* Enable render writes to complete in C2/C3/C4 power states.
385 * If this isn't enabled, render writes are prevented in low
386 * power states. That seems bad to me.
387 */
388#define MI_ARB_C3_LP_WRITE_ENABLE (1 << 11)
389
390/* This acknowledges an async flip immediately instead
391 * of waiting for 2TLB fetches.
392 */
393#define MI_ARB_ASYNC_FLIP_ACK_IMMEDIATE (1 << 10)
394
395/* Enables non-sequential data reads through arbiter
396 */
397#define MI_ARB_DUAL_DATA_PHASE_DISABLE (1 << 9)
398
399/* Disable FSB snooping of cacheable write cycles from binner/render
400 * command stream
401 */
402#define MI_ARB_CACHE_SNOOP_DISABLE (1 << 8)
403
404/* Arbiter time slice for non-isoch streams */
405#define MI_ARB_TIME_SLICE_MASK (7 << 5)
406#define MI_ARB_TIME_SLICE_1 (0 << 5)
407#define MI_ARB_TIME_SLICE_2 (1 << 5)
408#define MI_ARB_TIME_SLICE_4 (2 << 5)
409#define MI_ARB_TIME_SLICE_6 (3 << 5)
410#define MI_ARB_TIME_SLICE_8 (4 << 5)
411#define MI_ARB_TIME_SLICE_10 (5 << 5)
412#define MI_ARB_TIME_SLICE_14 (6 << 5)
413#define MI_ARB_TIME_SLICE_16 (7 << 5)
414
415/* Low priority grace period page size */
416#define MI_ARB_LOW_PRIORITY_GRACE_4KB (0 << 4) /* default */
417#define MI_ARB_LOW_PRIORITY_GRACE_8KB (1 << 4)
418
419/* Disable display A/B trickle feed */
420#define MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE (1 << 2)
421
422/* Set display plane priority */
423#define MI_ARB_DISPLAY_PRIORITY_A_B (0 << 0) /* display A > display B */
424#define MI_ARB_DISPLAY_PRIORITY_B_A (1 << 0) /* display B > display A */
425
362#define CACHE_MODE_0 0x02120 /* 915+ only */ 426#define CACHE_MODE_0 0x02120 /* 915+ only */
363#define CM0_MASK_SHIFT 16 427#define CM0_MASK_SHIFT 16
364#define CM0_IZ_OPT_DISABLE (1<<6) 428#define CM0_IZ_OPT_DISABLE (1<<6)
@@ -378,7 +442,7 @@
378#define GEN6_RENDER_IMR 0x20a8 442#define GEN6_RENDER_IMR 0x20a8
379#define GEN6_RENDER_CONTEXT_SWITCH_INTERRUPT (1 << 8) 443#define GEN6_RENDER_CONTEXT_SWITCH_INTERRUPT (1 << 8)
380#define GEN6_RENDER_PPGTT_PAGE_FAULT (1 << 7) 444#define GEN6_RENDER_PPGTT_PAGE_FAULT (1 << 7)
381#define GEN6_RENDER TIMEOUT_COUNTER_EXPIRED (1 << 6) 445#define GEN6_RENDER_TIMEOUT_COUNTER_EXPIRED (1 << 6)
382#define GEN6_RENDER_L3_PARITY_ERROR (1 << 5) 446#define GEN6_RENDER_L3_PARITY_ERROR (1 << 5)
383#define GEN6_RENDER_PIPE_CONTROL_NOTIFY_INTERRUPT (1 << 4) 447#define GEN6_RENDER_PIPE_CONTROL_NOTIFY_INTERRUPT (1 << 4)
384#define GEN6_RENDER_COMMAND_PARSER_MASTER_ERROR (1 << 3) 448#define GEN6_RENDER_COMMAND_PARSER_MASTER_ERROR (1 << 3)
@@ -466,6 +530,21 @@
466#define DPFC_CHICKEN 0x3224 530#define DPFC_CHICKEN 0x3224
467#define DPFC_HT_MODIFY (1<<31) 531#define DPFC_HT_MODIFY (1<<31)
468 532
533/* Framebuffer compression for Ironlake */
534#define ILK_DPFC_CB_BASE 0x43200
535#define ILK_DPFC_CONTROL 0x43208
536/* The bit 28-8 is reserved */
537#define DPFC_RESERVED (0x1FFFFF00)
538#define ILK_DPFC_RECOMP_CTL 0x4320c
539#define ILK_DPFC_STATUS 0x43210
540#define ILK_DPFC_FENCE_YOFF 0x43218
541#define ILK_DPFC_CHICKEN 0x43224
542#define ILK_FBC_RT_BASE 0x2128
543#define ILK_FBC_RT_VALID (1<<0)
544
545#define ILK_DISPLAY_CHICKEN1 0x42000
546#define ILK_FBCQ_DIS (1<<22)
547
469/* 548/*
470 * GPIO regs 549 * GPIO regs
471 */ 550 */
@@ -531,32 +610,6 @@
531#define DPLL_FPA01_P1_POST_DIV_MASK 0x00ff0000 /* i915 */ 610#define DPLL_FPA01_P1_POST_DIV_MASK 0x00ff0000 /* i915 */
532#define DPLL_FPA01_P1_POST_DIV_MASK_PINEVIEW 0x00ff8000 /* Pineview */ 611#define DPLL_FPA01_P1_POST_DIV_MASK_PINEVIEW 0x00ff8000 /* Pineview */
533 612
534#define I915_FIFO_UNDERRUN_STATUS (1UL<<31)
535#define I915_CRC_ERROR_ENABLE (1UL<<29)
536#define I915_CRC_DONE_ENABLE (1UL<<28)
537#define I915_GMBUS_EVENT_ENABLE (1UL<<27)
538#define I915_VSYNC_INTERRUPT_ENABLE (1UL<<25)
539#define I915_DISPLAY_LINE_COMPARE_ENABLE (1UL<<24)
540#define I915_DPST_EVENT_ENABLE (1UL<<23)
541#define I915_LEGACY_BLC_EVENT_ENABLE (1UL<<22)
542#define I915_ODD_FIELD_INTERRUPT_ENABLE (1UL<<21)
543#define I915_EVEN_FIELD_INTERRUPT_ENABLE (1UL<<20)
544#define I915_START_VBLANK_INTERRUPT_ENABLE (1UL<<18) /* 965 or later */
545#define I915_VBLANK_INTERRUPT_ENABLE (1UL<<17)
546#define I915_OVERLAY_UPDATED_ENABLE (1UL<<16)
547#define I915_CRC_ERROR_INTERRUPT_STATUS (1UL<<13)
548#define I915_CRC_DONE_INTERRUPT_STATUS (1UL<<12)
549#define I915_GMBUS_INTERRUPT_STATUS (1UL<<11)
550#define I915_VSYNC_INTERRUPT_STATUS (1UL<<9)
551#define I915_DISPLAY_LINE_COMPARE_STATUS (1UL<<8)
552#define I915_DPST_EVENT_STATUS (1UL<<7)
553#define I915_LEGACY_BLC_EVENT_STATUS (1UL<<6)
554#define I915_ODD_FIELD_INTERRUPT_STATUS (1UL<<5)
555#define I915_EVEN_FIELD_INTERRUPT_STATUS (1UL<<4)
556#define I915_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */
557#define I915_VBLANK_INTERRUPT_STATUS (1UL<<1)
558#define I915_OVERLAY_UPDATED_STATUS (1UL<<0)
559
560#define SRX_INDEX 0x3c4 613#define SRX_INDEX 0x3c4
561#define SRX_DATA 0x3c5 614#define SRX_DATA 0x3c5
562#define SR01 1 615#define SR01 1
@@ -2102,7 +2155,8 @@
2102#define I830_FIFO_LINE_SIZE 32 2155#define I830_FIFO_LINE_SIZE 32
2103 2156
2104#define G4X_FIFO_SIZE 127 2157#define G4X_FIFO_SIZE 127
2105#define I945_FIFO_SIZE 127 /* 945 & 965 */ 2158#define I965_FIFO_SIZE 512
2159#define I945_FIFO_SIZE 127
2106#define I915_FIFO_SIZE 95 2160#define I915_FIFO_SIZE 95
2107#define I855GM_FIFO_SIZE 127 /* In cachelines */ 2161#define I855GM_FIFO_SIZE 127 /* In cachelines */
2108#define I830_FIFO_SIZE 95 2162#define I830_FIFO_SIZE 95
@@ -2121,6 +2175,9 @@
2121#define PINEVIEW_CURSOR_DFT_WM 0 2175#define PINEVIEW_CURSOR_DFT_WM 0
2122#define PINEVIEW_CURSOR_GUARD_WM 5 2176#define PINEVIEW_CURSOR_GUARD_WM 5
2123 2177
2178#define I965_CURSOR_FIFO 64
2179#define I965_CURSOR_MAX_WM 32
2180#define I965_CURSOR_DFT_WM 8
2124 2181
2125/* define the Watermark register on Ironlake */ 2182/* define the Watermark register on Ironlake */
2126#define WM0_PIPEA_ILK 0x45100 2183#define WM0_PIPEA_ILK 0x45100
@@ -2148,6 +2205,9 @@
2148#define ILK_DISPLAY_FIFO 128 2205#define ILK_DISPLAY_FIFO 128
2149#define ILK_DISPLAY_MAXWM 64 2206#define ILK_DISPLAY_MAXWM 64
2150#define ILK_DISPLAY_DFTWM 8 2207#define ILK_DISPLAY_DFTWM 8
2208#define ILK_CURSOR_FIFO 32
2209#define ILK_CURSOR_MAXWM 16
2210#define ILK_CURSOR_DFTWM 8
2151 2211
2152#define ILK_DISPLAY_SR_FIFO 512 2212#define ILK_DISPLAY_SR_FIFO 512
2153#define ILK_DISPLAY_MAX_SRWM 0x1ff 2213#define ILK_DISPLAY_MAX_SRWM 0x1ff
@@ -2446,6 +2506,10 @@
2446#define ILK_VSDPFD_FULL (1<<21) 2506#define ILK_VSDPFD_FULL (1<<21)
2447#define ILK_DSPCLK_GATE 0x42020 2507#define ILK_DSPCLK_GATE 0x42020
2448#define ILK_DPARB_CLK_GATE (1<<5) 2508#define ILK_DPARB_CLK_GATE (1<<5)
2509/* According to spec this bit 7/8/9 of 0x42020 should be set to enable FBC */
2510#define ILK_CLK_FBC (1<<7)
2511#define ILK_DPFC_DIS1 (1<<8)
2512#define ILK_DPFC_DIS2 (1<<9)
2449 2513
2450#define DISP_ARB_CTL 0x45000 2514#define DISP_ARB_CTL 0x45000
2451#define DISP_TILE_SURFACE_SWIZZLING (1<<13) 2515#define DISP_TILE_SURFACE_SWIZZLING (1<<13)
@@ -2805,6 +2869,7 @@
2805 2869
2806#define PCH_PP_STATUS 0xc7200 2870#define PCH_PP_STATUS 0xc7200
2807#define PCH_PP_CONTROL 0xc7204 2871#define PCH_PP_CONTROL 0xc7204
2872#define PANEL_UNLOCK_REGS (0xabcd << 16)
2808#define EDP_FORCE_VDD (1 << 3) 2873#define EDP_FORCE_VDD (1 << 3)
2809#define EDP_BLC_ENABLE (1 << 2) 2874#define EDP_BLC_ENABLE (1 << 2)
2810#define PANEL_POWER_RESET (1 << 1) 2875#define PANEL_POWER_RESET (1 << 1)
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 60a5800fba6e..6e2025274db5 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -602,7 +602,9 @@ void i915_save_display(struct drm_device *dev)
602 602
603 /* Only save FBC state on the platform that supports FBC */ 603 /* Only save FBC state on the platform that supports FBC */
604 if (I915_HAS_FBC(dev)) { 604 if (I915_HAS_FBC(dev)) {
605 if (IS_GM45(dev)) { 605 if (IS_IRONLAKE_M(dev)) {
606 dev_priv->saveDPFC_CB_BASE = I915_READ(ILK_DPFC_CB_BASE);
607 } else if (IS_GM45(dev)) {
606 dev_priv->saveDPFC_CB_BASE = I915_READ(DPFC_CB_BASE); 608 dev_priv->saveDPFC_CB_BASE = I915_READ(DPFC_CB_BASE);
607 } else { 609 } else {
608 dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE); 610 dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE);
@@ -706,7 +708,10 @@ void i915_restore_display(struct drm_device *dev)
706 708
707 /* only restore FBC info on the platform that supports FBC*/ 709 /* only restore FBC info on the platform that supports FBC*/
708 if (I915_HAS_FBC(dev)) { 710 if (I915_HAS_FBC(dev)) {
709 if (IS_GM45(dev)) { 711 if (IS_IRONLAKE_M(dev)) {
712 ironlake_disable_fbc(dev);
713 I915_WRITE(ILK_DPFC_CB_BASE, dev_priv->saveDPFC_CB_BASE);
714 } else if (IS_GM45(dev)) {
710 g4x_disable_fbc(dev); 715 g4x_disable_fbc(dev);
711 I915_WRITE(DPFC_CB_BASE, dev_priv->saveDPFC_CB_BASE); 716 I915_WRITE(DPFC_CB_BASE, dev_priv->saveDPFC_CB_BASE);
712 } else { 717 } else {
diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
index fab21760dd57..fea97a21cc14 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -262,6 +262,42 @@ DEFINE_EVENT(i915_ring, i915_ring_wait_end,
262 TP_ARGS(dev) 262 TP_ARGS(dev)
263); 263);
264 264
265TRACE_EVENT(i915_flip_request,
266 TP_PROTO(int plane, struct drm_gem_object *obj),
267
268 TP_ARGS(plane, obj),
269
270 TP_STRUCT__entry(
271 __field(int, plane)
272 __field(struct drm_gem_object *, obj)
273 ),
274
275 TP_fast_assign(
276 __entry->plane = plane;
277 __entry->obj = obj;
278 ),
279
280 TP_printk("plane=%d, obj=%p", __entry->plane, __entry->obj)
281);
282
283TRACE_EVENT(i915_flip_complete,
284 TP_PROTO(int plane, struct drm_gem_object *obj),
285
286 TP_ARGS(plane, obj),
287
288 TP_STRUCT__entry(
289 __field(int, plane)
290 __field(struct drm_gem_object *, obj)
291 ),
292
293 TP_fast_assign(
294 __entry->plane = plane;
295 __entry->obj = obj;
296 ),
297
298 TP_printk("plane=%d, obj=%p", __entry->plane, __entry->obj)
299);
300
265#endif /* _I915_TRACE_H_ */ 301#endif /* _I915_TRACE_H_ */
266 302
267/* This part must be outside protection */ 303/* This part must be outside protection */
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 68dcf36e2793..1e5e0d379fa9 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -33,6 +33,7 @@
33#include "intel_drv.h" 33#include "intel_drv.h"
34#include "i915_drm.h" 34#include "i915_drm.h"
35#include "i915_drv.h" 35#include "i915_drv.h"
36#include "i915_trace.h"
36#include "drm_dp_helper.h" 37#include "drm_dp_helper.h"
37 38
38#include "drm_crtc_helper.h" 39#include "drm_crtc_helper.h"
@@ -42,6 +43,7 @@
42bool intel_pipe_has_type (struct drm_crtc *crtc, int type); 43bool intel_pipe_has_type (struct drm_crtc *crtc, int type);
43static void intel_update_watermarks(struct drm_device *dev); 44static void intel_update_watermarks(struct drm_device *dev);
44static void intel_increase_pllclock(struct drm_crtc *crtc, bool schedule); 45static void intel_increase_pllclock(struct drm_crtc *crtc, bool schedule);
46static void intel_crtc_update_cursor(struct drm_crtc *crtc);
45 47
46typedef struct { 48typedef struct {
47 /* given values */ 49 /* given values */
@@ -322,6 +324,9 @@ struct intel_limit {
322#define IRONLAKE_DP_P1_MIN 1 324#define IRONLAKE_DP_P1_MIN 1
323#define IRONLAKE_DP_P1_MAX 2 325#define IRONLAKE_DP_P1_MAX 2
324 326
327/* FDI */
328#define IRONLAKE_FDI_FREQ 2700000 /* in kHz for mode->clock */
329
325static bool 330static bool
326intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc, 331intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
327 int target, int refclk, intel_clock_t *best_clock); 332 int target, int refclk, intel_clock_t *best_clock);
@@ -862,8 +867,8 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
862 intel_clock_t clock; 867 intel_clock_t clock;
863 int max_n; 868 int max_n;
864 bool found; 869 bool found;
865 /* approximately equals target * 0.00488 */ 870 /* approximately equals target * 0.00585 */
866 int err_most = (target >> 8) + (target >> 10); 871 int err_most = (target >> 8) + (target >> 9);
867 found = false; 872 found = false;
868 873
869 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { 874 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
@@ -975,7 +980,10 @@ void
975intel_wait_for_vblank(struct drm_device *dev) 980intel_wait_for_vblank(struct drm_device *dev)
976{ 981{
977 /* Wait for 20ms, i.e. one cycle at 50hz. */ 982 /* Wait for 20ms, i.e. one cycle at 50hz. */
978 msleep(20); 983 if (in_dbg_master())
984 mdelay(20); /* The kernel debugger cannot call msleep() */
985 else
986 msleep(20);
979} 987}
980 988
981/* Parameters have changed, update FBC info */ 989/* Parameters have changed, update FBC info */
@@ -1122,6 +1130,67 @@ static bool g4x_fbc_enabled(struct drm_device *dev)
1122 return I915_READ(DPFC_CONTROL) & DPFC_CTL_EN; 1130 return I915_READ(DPFC_CONTROL) & DPFC_CTL_EN;
1123} 1131}
1124 1132
1133static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
1134{
1135 struct drm_device *dev = crtc->dev;
1136 struct drm_i915_private *dev_priv = dev->dev_private;
1137 struct drm_framebuffer *fb = crtc->fb;
1138 struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
1139 struct drm_i915_gem_object *obj_priv = to_intel_bo(intel_fb->obj);
1140 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1141 int plane = (intel_crtc->plane == 0) ? DPFC_CTL_PLANEA :
1142 DPFC_CTL_PLANEB;
1143 unsigned long stall_watermark = 200;
1144 u32 dpfc_ctl;
1145
1146 dev_priv->cfb_pitch = (dev_priv->cfb_pitch / 64) - 1;
1147 dev_priv->cfb_fence = obj_priv->fence_reg;
1148 dev_priv->cfb_plane = intel_crtc->plane;
1149
1150 dpfc_ctl = I915_READ(ILK_DPFC_CONTROL);
1151 dpfc_ctl &= DPFC_RESERVED;
1152 dpfc_ctl |= (plane | DPFC_CTL_LIMIT_1X);
1153 if (obj_priv->tiling_mode != I915_TILING_NONE) {
1154 dpfc_ctl |= (DPFC_CTL_FENCE_EN | dev_priv->cfb_fence);
1155 I915_WRITE(ILK_DPFC_CHICKEN, DPFC_HT_MODIFY);
1156 } else {
1157 I915_WRITE(ILK_DPFC_CHICKEN, ~DPFC_HT_MODIFY);
1158 }
1159
1160 I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl);
1161 I915_WRITE(ILK_DPFC_RECOMP_CTL, DPFC_RECOMP_STALL_EN |
1162 (stall_watermark << DPFC_RECOMP_STALL_WM_SHIFT) |
1163 (interval << DPFC_RECOMP_TIMER_COUNT_SHIFT));
1164 I915_WRITE(ILK_DPFC_FENCE_YOFF, crtc->y);
1165 I915_WRITE(ILK_FBC_RT_BASE, obj_priv->gtt_offset | ILK_FBC_RT_VALID);
1166 /* enable it... */
1167 I915_WRITE(ILK_DPFC_CONTROL, I915_READ(ILK_DPFC_CONTROL) |
1168 DPFC_CTL_EN);
1169
1170 DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane);
1171}
1172
1173void ironlake_disable_fbc(struct drm_device *dev)
1174{
1175 struct drm_i915_private *dev_priv = dev->dev_private;
1176 u32 dpfc_ctl;
1177
1178 /* Disable compression */
1179 dpfc_ctl = I915_READ(ILK_DPFC_CONTROL);
1180 dpfc_ctl &= ~DPFC_CTL_EN;
1181 I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl);
1182 intel_wait_for_vblank(dev);
1183
1184 DRM_DEBUG_KMS("disabled FBC\n");
1185}
1186
1187static bool ironlake_fbc_enabled(struct drm_device *dev)
1188{
1189 struct drm_i915_private *dev_priv = dev->dev_private;
1190
1191 return I915_READ(ILK_DPFC_CONTROL) & DPFC_CTL_EN;
1192}
1193
1125bool intel_fbc_enabled(struct drm_device *dev) 1194bool intel_fbc_enabled(struct drm_device *dev)
1126{ 1195{
1127 struct drm_i915_private *dev_priv = dev->dev_private; 1196 struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1180,8 +1249,12 @@ static void intel_update_fbc(struct drm_crtc *crtc,
1180 struct drm_framebuffer *fb = crtc->fb; 1249 struct drm_framebuffer *fb = crtc->fb;
1181 struct intel_framebuffer *intel_fb; 1250 struct intel_framebuffer *intel_fb;
1182 struct drm_i915_gem_object *obj_priv; 1251 struct drm_i915_gem_object *obj_priv;
1252 struct drm_crtc *tmp_crtc;
1183 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 1253 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1184 int plane = intel_crtc->plane; 1254 int plane = intel_crtc->plane;
1255 int crtcs_enabled = 0;
1256
1257 DRM_DEBUG_KMS("\n");
1185 1258
1186 if (!i915_powersave) 1259 if (!i915_powersave)
1187 return; 1260 return;
@@ -1199,10 +1272,21 @@ static void intel_update_fbc(struct drm_crtc *crtc,
1199 * If FBC is already on, we just have to verify that we can 1272 * If FBC is already on, we just have to verify that we can
1200 * keep it that way... 1273 * keep it that way...
1201 * Need to disable if: 1274 * Need to disable if:
1275 * - more than one pipe is active
1202 * - changing FBC params (stride, fence, mode) 1276 * - changing FBC params (stride, fence, mode)
1203 * - new fb is too large to fit in compressed buffer 1277 * - new fb is too large to fit in compressed buffer
1204 * - going to an unsupported config (interlace, pixel multiply, etc.) 1278 * - going to an unsupported config (interlace, pixel multiply, etc.)
1205 */ 1279 */
1280 list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head) {
1281 if (tmp_crtc->enabled)
1282 crtcs_enabled++;
1283 }
1284 DRM_DEBUG_KMS("%d pipes active\n", crtcs_enabled);
1285 if (crtcs_enabled > 1) {
1286 DRM_DEBUG_KMS("more than one pipe active, disabling compression\n");
1287 dev_priv->no_fbc_reason = FBC_MULTIPLE_PIPES;
1288 goto out_disable;
1289 }
1206 if (intel_fb->obj->size > dev_priv->cfb_size) { 1290 if (intel_fb->obj->size > dev_priv->cfb_size) {
1207 DRM_DEBUG_KMS("framebuffer too large, disabling " 1291 DRM_DEBUG_KMS("framebuffer too large, disabling "
1208 "compression\n"); 1292 "compression\n");
@@ -1233,6 +1317,10 @@ static void intel_update_fbc(struct drm_crtc *crtc,
1233 goto out_disable; 1317 goto out_disable;
1234 } 1318 }
1235 1319
1320 /* If the kernel debugger is active, always disable compression */
1321 if (in_dbg_master())
1322 goto out_disable;
1323
1236 if (intel_fbc_enabled(dev)) { 1324 if (intel_fbc_enabled(dev)) {
1237 /* We can re-enable it in this case, but need to update pitch */ 1325 /* We can re-enable it in this case, but need to update pitch */
1238 if ((fb->pitch > dev_priv->cfb_pitch) || 1326 if ((fb->pitch > dev_priv->cfb_pitch) ||
@@ -1255,7 +1343,7 @@ out_disable:
1255 } 1343 }
1256} 1344}
1257 1345
1258static int 1346int
1259intel_pin_and_fence_fb_obj(struct drm_device *dev, struct drm_gem_object *obj) 1347intel_pin_and_fence_fb_obj(struct drm_device *dev, struct drm_gem_object *obj)
1260{ 1348{
1261 struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); 1349 struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
@@ -1264,7 +1352,12 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev, struct drm_gem_object *obj)
1264 1352
1265 switch (obj_priv->tiling_mode) { 1353 switch (obj_priv->tiling_mode) {
1266 case I915_TILING_NONE: 1354 case I915_TILING_NONE:
1267 alignment = 64 * 1024; 1355 if (IS_BROADWATER(dev) || IS_CRESTLINE(dev))
1356 alignment = 128 * 1024;
1357 else if (IS_I965G(dev))
1358 alignment = 4 * 1024;
1359 else
1360 alignment = 64 * 1024;
1268 break; 1361 break;
1269 case I915_TILING_X: 1362 case I915_TILING_X:
1270 /* pin() will align the object as required by fence */ 1363 /* pin() will align the object as required by fence */
@@ -1299,6 +1392,98 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev, struct drm_gem_object *obj)
1299 return 0; 1392 return 0;
1300} 1393}
1301 1394
1395/* Assume fb object is pinned & idle & fenced and just update base pointers */
1396static int
1397intel_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb,
1398 int x, int y)
1399{
1400 struct drm_device *dev = crtc->dev;
1401 struct drm_i915_private *dev_priv = dev->dev_private;
1402 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1403 struct intel_framebuffer *intel_fb;
1404 struct drm_i915_gem_object *obj_priv;
1405 struct drm_gem_object *obj;
1406 int plane = intel_crtc->plane;
1407 unsigned long Start, Offset;
1408 int dspbase = (plane == 0 ? DSPAADDR : DSPBADDR);
1409 int dspsurf = (plane == 0 ? DSPASURF : DSPBSURF);
1410 int dspstride = (plane == 0) ? DSPASTRIDE : DSPBSTRIDE;
1411 int dsptileoff = (plane == 0 ? DSPATILEOFF : DSPBTILEOFF);
1412 int dspcntr_reg = (plane == 0) ? DSPACNTR : DSPBCNTR;
1413 u32 dspcntr;
1414
1415 switch (plane) {
1416 case 0:
1417 case 1:
1418 break;
1419 default:
1420 DRM_ERROR("Can't update plane %d in SAREA\n", plane);
1421 return -EINVAL;
1422 }
1423
1424 intel_fb = to_intel_framebuffer(fb);
1425 obj = intel_fb->obj;
1426 obj_priv = to_intel_bo(obj);
1427
1428 dspcntr = I915_READ(dspcntr_reg);
1429 /* Mask out pixel format bits in case we change it */
1430 dspcntr &= ~DISPPLANE_PIXFORMAT_MASK;
1431 switch (fb->bits_per_pixel) {
1432 case 8:
1433 dspcntr |= DISPPLANE_8BPP;
1434 break;
1435 case 16:
1436 if (fb->depth == 15)
1437 dspcntr |= DISPPLANE_15_16BPP;
1438 else
1439 dspcntr |= DISPPLANE_16BPP;
1440 break;
1441 case 24:
1442 case 32:
1443 dspcntr |= DISPPLANE_32BPP_NO_ALPHA;
1444 break;
1445 default:
1446 DRM_ERROR("Unknown color depth\n");
1447 return -EINVAL;
1448 }
1449 if (IS_I965G(dev)) {
1450 if (obj_priv->tiling_mode != I915_TILING_NONE)
1451 dspcntr |= DISPPLANE_TILED;
1452 else
1453 dspcntr &= ~DISPPLANE_TILED;
1454 }
1455
1456 if (IS_IRONLAKE(dev))
1457 /* must disable */
1458 dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE;
1459
1460 I915_WRITE(dspcntr_reg, dspcntr);
1461
1462 Start = obj_priv->gtt_offset;
1463 Offset = y * fb->pitch + x * (fb->bits_per_pixel / 8);
1464
1465 DRM_DEBUG("Writing base %08lX %08lX %d %d\n", Start, Offset, x, y);
1466 I915_WRITE(dspstride, fb->pitch);
1467 if (IS_I965G(dev)) {
1468 I915_WRITE(dspbase, Offset);
1469 I915_READ(dspbase);
1470 I915_WRITE(dspsurf, Start);
1471 I915_READ(dspsurf);
1472 I915_WRITE(dsptileoff, (y << 16) | x);
1473 } else {
1474 I915_WRITE(dspbase, Start + Offset);
1475 I915_READ(dspbase);
1476 }
1477
1478 if ((IS_I965G(dev) || plane == 0))
1479 intel_update_fbc(crtc, &crtc->mode);
1480
1481 intel_wait_for_vblank(dev);
1482 intel_increase_pllclock(crtc, true);
1483
1484 return 0;
1485}
1486
1302static int 1487static int
1303intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, 1488intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
1304 struct drm_framebuffer *old_fb) 1489 struct drm_framebuffer *old_fb)
@@ -1539,6 +1724,15 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
1539 int fdi_rx_imr_reg = (pipe == 0) ? FDI_RXA_IMR : FDI_RXB_IMR; 1724 int fdi_rx_imr_reg = (pipe == 0) ? FDI_RXA_IMR : FDI_RXB_IMR;
1540 u32 temp, tries = 0; 1725 u32 temp, tries = 0;
1541 1726
1727 /* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
1728 for train result */
1729 temp = I915_READ(fdi_rx_imr_reg);
1730 temp &= ~FDI_RX_SYMBOL_LOCK;
1731 temp &= ~FDI_RX_BIT_LOCK;
1732 I915_WRITE(fdi_rx_imr_reg, temp);
1733 I915_READ(fdi_rx_imr_reg);
1734 udelay(150);
1735
1542 /* enable CPU FDI TX and PCH FDI RX */ 1736 /* enable CPU FDI TX and PCH FDI RX */
1543 temp = I915_READ(fdi_tx_reg); 1737 temp = I915_READ(fdi_tx_reg);
1544 temp |= FDI_TX_ENABLE; 1738 temp |= FDI_TX_ENABLE;
@@ -1556,16 +1750,7 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
1556 I915_READ(fdi_rx_reg); 1750 I915_READ(fdi_rx_reg);
1557 udelay(150); 1751 udelay(150);
1558 1752
1559 /* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit 1753 for (tries = 0; tries < 5; tries++) {
1560 for train result */
1561 temp = I915_READ(fdi_rx_imr_reg);
1562 temp &= ~FDI_RX_SYMBOL_LOCK;
1563 temp &= ~FDI_RX_BIT_LOCK;
1564 I915_WRITE(fdi_rx_imr_reg, temp);
1565 I915_READ(fdi_rx_imr_reg);
1566 udelay(150);
1567
1568 for (;;) {
1569 temp = I915_READ(fdi_rx_iir_reg); 1754 temp = I915_READ(fdi_rx_iir_reg);
1570 DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp); 1755 DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp);
1571 1756
@@ -1575,14 +1760,9 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
1575 temp | FDI_RX_BIT_LOCK); 1760 temp | FDI_RX_BIT_LOCK);
1576 break; 1761 break;
1577 } 1762 }
1578
1579 tries++;
1580
1581 if (tries > 5) {
1582 DRM_DEBUG_KMS("FDI train 1 fail!\n");
1583 break;
1584 }
1585 } 1763 }
1764 if (tries == 5)
1765 DRM_DEBUG_KMS("FDI train 1 fail!\n");
1586 1766
1587 /* Train 2 */ 1767 /* Train 2 */
1588 temp = I915_READ(fdi_tx_reg); 1768 temp = I915_READ(fdi_tx_reg);
@@ -1598,7 +1778,7 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
1598 1778
1599 tries = 0; 1779 tries = 0;
1600 1780
1601 for (;;) { 1781 for (tries = 0; tries < 5; tries++) {
1602 temp = I915_READ(fdi_rx_iir_reg); 1782 temp = I915_READ(fdi_rx_iir_reg);
1603 DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp); 1783 DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp);
1604 1784
@@ -1608,14 +1788,9 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
1608 DRM_DEBUG_KMS("FDI train 2 done.\n"); 1788 DRM_DEBUG_KMS("FDI train 2 done.\n");
1609 break; 1789 break;
1610 } 1790 }
1611
1612 tries++;
1613
1614 if (tries > 5) {
1615 DRM_DEBUG_KMS("FDI train 2 fail!\n");
1616 break;
1617 }
1618 } 1791 }
1792 if (tries == 5)
1793 DRM_DEBUG_KMS("FDI train 2 fail!\n");
1619 1794
1620 DRM_DEBUG_KMS("FDI train done\n"); 1795 DRM_DEBUG_KMS("FDI train done\n");
1621} 1796}
@@ -1640,6 +1815,15 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc)
1640 int fdi_rx_imr_reg = (pipe == 0) ? FDI_RXA_IMR : FDI_RXB_IMR; 1815 int fdi_rx_imr_reg = (pipe == 0) ? FDI_RXA_IMR : FDI_RXB_IMR;
1641 u32 temp, i; 1816 u32 temp, i;
1642 1817
1818 /* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
1819 for train result */
1820 temp = I915_READ(fdi_rx_imr_reg);
1821 temp &= ~FDI_RX_SYMBOL_LOCK;
1822 temp &= ~FDI_RX_BIT_LOCK;
1823 I915_WRITE(fdi_rx_imr_reg, temp);
1824 I915_READ(fdi_rx_imr_reg);
1825 udelay(150);
1826
1643 /* enable CPU FDI TX and PCH FDI RX */ 1827 /* enable CPU FDI TX and PCH FDI RX */
1644 temp = I915_READ(fdi_tx_reg); 1828 temp = I915_READ(fdi_tx_reg);
1645 temp |= FDI_TX_ENABLE; 1829 temp |= FDI_TX_ENABLE;
@@ -1665,15 +1849,6 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc)
1665 I915_READ(fdi_rx_reg); 1849 I915_READ(fdi_rx_reg);
1666 udelay(150); 1850 udelay(150);
1667 1851
1668 /* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
1669 for train result */
1670 temp = I915_READ(fdi_rx_imr_reg);
1671 temp &= ~FDI_RX_SYMBOL_LOCK;
1672 temp &= ~FDI_RX_BIT_LOCK;
1673 I915_WRITE(fdi_rx_imr_reg, temp);
1674 I915_READ(fdi_rx_imr_reg);
1675 udelay(150);
1676
1677 for (i = 0; i < 4; i++ ) { 1852 for (i = 0; i < 4; i++ ) {
1678 temp = I915_READ(fdi_tx_reg); 1853 temp = I915_READ(fdi_tx_reg);
1679 temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK; 1854 temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK;
@@ -1828,7 +2003,8 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
1828 } 2003 }
1829 2004
1830 /* Enable panel fitting for LVDS */ 2005 /* Enable panel fitting for LVDS */
1831 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { 2006 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)
2007 || HAS_eDP || intel_pch_has_edp(crtc)) {
1832 temp = I915_READ(pf_ctl_reg); 2008 temp = I915_READ(pf_ctl_reg);
1833 I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | PF_FILTER_MED_3x3); 2009 I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | PF_FILTER_MED_3x3);
1834 2010
@@ -1923,9 +2099,12 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
1923 reg = I915_READ(trans_dp_ctl); 2099 reg = I915_READ(trans_dp_ctl);
1924 reg &= ~TRANS_DP_PORT_SEL_MASK; 2100 reg &= ~TRANS_DP_PORT_SEL_MASK;
1925 reg = TRANS_DP_OUTPUT_ENABLE | 2101 reg = TRANS_DP_OUTPUT_ENABLE |
1926 TRANS_DP_ENH_FRAMING | 2102 TRANS_DP_ENH_FRAMING;
1927 TRANS_DP_VSYNC_ACTIVE_HIGH | 2103
1928 TRANS_DP_HSYNC_ACTIVE_HIGH; 2104 if (crtc->mode.flags & DRM_MODE_FLAG_PHSYNC)
2105 reg |= TRANS_DP_HSYNC_ACTIVE_HIGH;
2106 if (crtc->mode.flags & DRM_MODE_FLAG_PVSYNC)
2107 reg |= TRANS_DP_VSYNC_ACTIVE_HIGH;
1929 2108
1930 switch (intel_trans_dp_port_sel(crtc)) { 2109 switch (intel_trans_dp_port_sel(crtc)) {
1931 case PCH_DP_B: 2110 case PCH_DP_B:
@@ -1965,6 +2144,8 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
1965 2144
1966 intel_crtc_load_lut(crtc); 2145 intel_crtc_load_lut(crtc);
1967 2146
2147 intel_update_fbc(crtc, &crtc->mode);
2148
1968 break; 2149 break;
1969 case DRM_MODE_DPMS_OFF: 2150 case DRM_MODE_DPMS_OFF:
1970 DRM_DEBUG_KMS("crtc %d dpms off\n", pipe); 2151 DRM_DEBUG_KMS("crtc %d dpms off\n", pipe);
@@ -1979,6 +2160,10 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
1979 I915_READ(dspbase_reg); 2160 I915_READ(dspbase_reg);
1980 } 2161 }
1981 2162
2163 if (dev_priv->cfb_plane == plane &&
2164 dev_priv->display.disable_fbc)
2165 dev_priv->display.disable_fbc(dev);
2166
1982 i915_disable_vga(dev); 2167 i915_disable_vga(dev);
1983 2168
1984 /* disable cpu pipe, disable after all planes disabled */ 2169 /* disable cpu pipe, disable after all planes disabled */
@@ -2255,6 +2440,11 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
2255 intel_wait_for_vblank(dev); 2440 intel_wait_for_vblank(dev);
2256 } 2441 }
2257 2442
2443 /* Don't disable pipe A or pipe A PLLs if needed */
2444 if (pipeconf_reg == PIPEACONF &&
2445 (dev_priv->quirks & QUIRK_PIPEA_FORCE))
2446 goto skip_pipe_off;
2447
2258 /* Next, disable display pipes */ 2448 /* Next, disable display pipes */
2259 temp = I915_READ(pipeconf_reg); 2449 temp = I915_READ(pipeconf_reg);
2260 if ((temp & PIPEACONF_ENABLE) != 0) { 2450 if ((temp & PIPEACONF_ENABLE) != 0) {
@@ -2270,7 +2460,7 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
2270 I915_WRITE(dpll_reg, temp & ~DPLL_VCO_ENABLE); 2460 I915_WRITE(dpll_reg, temp & ~DPLL_VCO_ENABLE);
2271 I915_READ(dpll_reg); 2461 I915_READ(dpll_reg);
2272 } 2462 }
2273 2463 skip_pipe_off:
2274 /* Wait for the clocks to turn off. */ 2464 /* Wait for the clocks to turn off. */
2275 udelay(150); 2465 udelay(150);
2276 break; 2466 break;
@@ -2353,11 +2543,9 @@ static bool intel_crtc_mode_fixup(struct drm_crtc *crtc,
2353 struct drm_device *dev = crtc->dev; 2543 struct drm_device *dev = crtc->dev;
2354 if (HAS_PCH_SPLIT(dev)) { 2544 if (HAS_PCH_SPLIT(dev)) {
2355 /* FDI link clock is fixed at 2.7G */ 2545 /* FDI link clock is fixed at 2.7G */
2356 if (mode->clock * 3 > 27000 * 4) 2546 if (mode->clock * 3 > IRONLAKE_FDI_FREQ * 4)
2357 return MODE_CLOCK_HIGH; 2547 return false;
2358 } 2548 }
2359
2360 drm_mode_set_crtcinfo(adjusted_mode, 0);
2361 return true; 2549 return true;
2362} 2550}
2363 2551
@@ -2538,6 +2726,20 @@ static struct intel_watermark_params g4x_wm_info = {
2538 2, 2726 2,
2539 G4X_FIFO_LINE_SIZE, 2727 G4X_FIFO_LINE_SIZE,
2540}; 2728};
2729static struct intel_watermark_params g4x_cursor_wm_info = {
2730 I965_CURSOR_FIFO,
2731 I965_CURSOR_MAX_WM,
2732 I965_CURSOR_DFT_WM,
2733 2,
2734 G4X_FIFO_LINE_SIZE,
2735};
2736static struct intel_watermark_params i965_cursor_wm_info = {
2737 I965_CURSOR_FIFO,
2738 I965_CURSOR_MAX_WM,
2739 I965_CURSOR_DFT_WM,
2740 2,
2741 I915_FIFO_LINE_SIZE,
2742};
2541static struct intel_watermark_params i945_wm_info = { 2743static struct intel_watermark_params i945_wm_info = {
2542 I945_FIFO_SIZE, 2744 I945_FIFO_SIZE,
2543 I915_MAX_WM, 2745 I915_MAX_WM,
@@ -2575,6 +2777,14 @@ static struct intel_watermark_params ironlake_display_wm_info = {
2575 ILK_FIFO_LINE_SIZE 2777 ILK_FIFO_LINE_SIZE
2576}; 2778};
2577 2779
2780static struct intel_watermark_params ironlake_cursor_wm_info = {
2781 ILK_CURSOR_FIFO,
2782 ILK_CURSOR_MAXWM,
2783 ILK_CURSOR_DFTWM,
2784 2,
2785 ILK_FIFO_LINE_SIZE
2786};
2787
2578static struct intel_watermark_params ironlake_display_srwm_info = { 2788static struct intel_watermark_params ironlake_display_srwm_info = {
2579 ILK_DISPLAY_SR_FIFO, 2789 ILK_DISPLAY_SR_FIFO,
2580 ILK_DISPLAY_MAX_SRWM, 2790 ILK_DISPLAY_MAX_SRWM,
@@ -2624,7 +2834,7 @@ static unsigned long intel_calculate_wm(unsigned long clock_in_khz,
2624 */ 2834 */
2625 entries_required = ((clock_in_khz / 1000) * pixel_size * latency_ns) / 2835 entries_required = ((clock_in_khz / 1000) * pixel_size * latency_ns) /
2626 1000; 2836 1000;
2627 entries_required /= wm->cacheline_size; 2837 entries_required = DIV_ROUND_UP(entries_required, wm->cacheline_size);
2628 2838
2629 DRM_DEBUG_KMS("FIFO entries required for mode: %d\n", entries_required); 2839 DRM_DEBUG_KMS("FIFO entries required for mode: %d\n", entries_required);
2630 2840
@@ -2635,8 +2845,14 @@ static unsigned long intel_calculate_wm(unsigned long clock_in_khz,
2635 /* Don't promote wm_size to unsigned... */ 2845 /* Don't promote wm_size to unsigned... */
2636 if (wm_size > (long)wm->max_wm) 2846 if (wm_size > (long)wm->max_wm)
2637 wm_size = wm->max_wm; 2847 wm_size = wm->max_wm;
2638 if (wm_size <= 0) 2848 if (wm_size <= 0) {
2639 wm_size = wm->default_wm; 2849 wm_size = wm->default_wm;
2850 DRM_ERROR("Insufficient FIFO for plane, expect flickering:"
2851 " entries required = %ld, available = %lu.\n",
2852 entries_required + wm->guard_size,
2853 wm->fifo_size);
2854 }
2855
2640 return wm_size; 2856 return wm_size;
2641} 2857}
2642 2858
@@ -2745,11 +2961,9 @@ static int i9xx_get_fifo_size(struct drm_device *dev, int plane)
2745 uint32_t dsparb = I915_READ(DSPARB); 2961 uint32_t dsparb = I915_READ(DSPARB);
2746 int size; 2962 int size;
2747 2963
2748 if (plane == 0) 2964 size = dsparb & 0x7f;
2749 size = dsparb & 0x7f; 2965 if (plane)
2750 else 2966 size = ((dsparb >> DSPARB_CSTART_SHIFT) & 0x7f) - size;
2751 size = ((dsparb >> DSPARB_CSTART_SHIFT) & 0x7f) -
2752 (dsparb & 0x7f);
2753 2967
2754 DRM_DEBUG_KMS("FIFO size - (0x%08x) %s: %d\n", dsparb, 2968 DRM_DEBUG_KMS("FIFO size - (0x%08x) %s: %d\n", dsparb,
2755 plane ? "B" : "A", size); 2969 plane ? "B" : "A", size);
@@ -2763,11 +2977,9 @@ static int i85x_get_fifo_size(struct drm_device *dev, int plane)
2763 uint32_t dsparb = I915_READ(DSPARB); 2977 uint32_t dsparb = I915_READ(DSPARB);
2764 int size; 2978 int size;
2765 2979
2766 if (plane == 0) 2980 size = dsparb & 0x1ff;
2767 size = dsparb & 0x1ff; 2981 if (plane)
2768 else 2982 size = ((dsparb >> DSPARB_BEND_SHIFT) & 0x1ff) - size;
2769 size = ((dsparb >> DSPARB_BEND_SHIFT) & 0x1ff) -
2770 (dsparb & 0x1ff);
2771 size >>= 1; /* Convert to cachelines */ 2983 size >>= 1; /* Convert to cachelines */
2772 2984
2773 DRM_DEBUG_KMS("FIFO size - (0x%08x) %s: %d\n", dsparb, 2985 DRM_DEBUG_KMS("FIFO size - (0x%08x) %s: %d\n", dsparb,
@@ -2808,7 +3020,8 @@ static int i830_get_fifo_size(struct drm_device *dev, int plane)
2808} 3020}
2809 3021
2810static void pineview_update_wm(struct drm_device *dev, int planea_clock, 3022static void pineview_update_wm(struct drm_device *dev, int planea_clock,
2811 int planeb_clock, int sr_hdisplay, int pixel_size) 3023 int planeb_clock, int sr_hdisplay, int unused,
3024 int pixel_size)
2812{ 3025{
2813 struct drm_i915_private *dev_priv = dev->dev_private; 3026 struct drm_i915_private *dev_priv = dev->dev_private;
2814 u32 reg; 3027 u32 reg;
@@ -2873,7 +3086,8 @@ static void pineview_update_wm(struct drm_device *dev, int planea_clock,
2873} 3086}
2874 3087
2875static void g4x_update_wm(struct drm_device *dev, int planea_clock, 3088static void g4x_update_wm(struct drm_device *dev, int planea_clock,
2876 int planeb_clock, int sr_hdisplay, int pixel_size) 3089 int planeb_clock, int sr_hdisplay, int sr_htotal,
3090 int pixel_size)
2877{ 3091{
2878 struct drm_i915_private *dev_priv = dev->dev_private; 3092 struct drm_i915_private *dev_priv = dev->dev_private;
2879 int total_size, cacheline_size; 3093 int total_size, cacheline_size;
@@ -2897,12 +3111,12 @@ static void g4x_update_wm(struct drm_device *dev, int planea_clock,
2897 */ 3111 */
2898 entries_required = ((planea_clock / 1000) * pixel_size * latency_ns) / 3112 entries_required = ((planea_clock / 1000) * pixel_size * latency_ns) /
2899 1000; 3113 1000;
2900 entries_required /= G4X_FIFO_LINE_SIZE; 3114 entries_required = DIV_ROUND_UP(entries_required, G4X_FIFO_LINE_SIZE);
2901 planea_wm = entries_required + planea_params.guard_size; 3115 planea_wm = entries_required + planea_params.guard_size;
2902 3116
2903 entries_required = ((planeb_clock / 1000) * pixel_size * latency_ns) / 3117 entries_required = ((planeb_clock / 1000) * pixel_size * latency_ns) /
2904 1000; 3118 1000;
2905 entries_required /= G4X_FIFO_LINE_SIZE; 3119 entries_required = DIV_ROUND_UP(entries_required, G4X_FIFO_LINE_SIZE);
2906 planeb_wm = entries_required + planeb_params.guard_size; 3120 planeb_wm = entries_required + planeb_params.guard_size;
2907 3121
2908 cursora_wm = cursorb_wm = 16; 3122 cursora_wm = cursorb_wm = 16;
@@ -2916,13 +3130,24 @@ static void g4x_update_wm(struct drm_device *dev, int planea_clock,
2916 static const int sr_latency_ns = 12000; 3130 static const int sr_latency_ns = 12000;
2917 3131
2918 sr_clock = planea_clock ? planea_clock : planeb_clock; 3132 sr_clock = planea_clock ? planea_clock : planeb_clock;
2919 line_time_us = ((sr_hdisplay * 1000) / sr_clock); 3133 line_time_us = ((sr_htotal * 1000) / sr_clock);
2920 3134
2921 /* Use ns/us then divide to preserve precision */ 3135 /* Use ns/us then divide to preserve precision */
2922 sr_entries = (((sr_latency_ns / line_time_us) + 1) * 3136 sr_entries = (((sr_latency_ns / line_time_us) + 1000) / 1000) *
2923 pixel_size * sr_hdisplay) / 1000; 3137 pixel_size * sr_hdisplay;
2924 sr_entries = roundup(sr_entries / cacheline_size, 1); 3138 sr_entries = DIV_ROUND_UP(sr_entries, cacheline_size);
2925 DRM_DEBUG("self-refresh entries: %d\n", sr_entries); 3139
3140 entries_required = (((sr_latency_ns / line_time_us) +
3141 1000) / 1000) * pixel_size * 64;
3142 entries_required = DIV_ROUND_UP(entries_required,
3143 g4x_cursor_wm_info.cacheline_size);
3144 cursor_sr = entries_required + g4x_cursor_wm_info.guard_size;
3145
3146 if (cursor_sr > g4x_cursor_wm_info.max_wm)
3147 cursor_sr = g4x_cursor_wm_info.max_wm;
3148 DRM_DEBUG_KMS("self-refresh watermark: display plane %d "
3149 "cursor %d\n", sr_entries, cursor_sr);
3150
2926 I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN); 3151 I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
2927 } else { 3152 } else {
2928 /* Turn off self refresh if both pipes are enabled */ 3153 /* Turn off self refresh if both pipes are enabled */
@@ -2947,11 +3172,13 @@ static void g4x_update_wm(struct drm_device *dev, int planea_clock,
2947} 3172}
2948 3173
2949static void i965_update_wm(struct drm_device *dev, int planea_clock, 3174static void i965_update_wm(struct drm_device *dev, int planea_clock,
2950 int planeb_clock, int sr_hdisplay, int pixel_size) 3175 int planeb_clock, int sr_hdisplay, int sr_htotal,
3176 int pixel_size)
2951{ 3177{
2952 struct drm_i915_private *dev_priv = dev->dev_private; 3178 struct drm_i915_private *dev_priv = dev->dev_private;
2953 unsigned long line_time_us; 3179 unsigned long line_time_us;
2954 int sr_clock, sr_entries, srwm = 1; 3180 int sr_clock, sr_entries, srwm = 1;
3181 int cursor_sr = 16;
2955 3182
2956 /* Calc sr entries for one plane configs */ 3183 /* Calc sr entries for one plane configs */
2957 if (sr_hdisplay && (!planea_clock || !planeb_clock)) { 3184 if (sr_hdisplay && (!planea_clock || !planeb_clock)) {
@@ -2959,17 +3186,31 @@ static void i965_update_wm(struct drm_device *dev, int planea_clock,
2959 static const int sr_latency_ns = 12000; 3186 static const int sr_latency_ns = 12000;
2960 3187
2961 sr_clock = planea_clock ? planea_clock : planeb_clock; 3188 sr_clock = planea_clock ? planea_clock : planeb_clock;
2962 line_time_us = ((sr_hdisplay * 1000) / sr_clock); 3189 line_time_us = ((sr_htotal * 1000) / sr_clock);
2963 3190
2964 /* Use ns/us then divide to preserve precision */ 3191 /* Use ns/us then divide to preserve precision */
2965 sr_entries = (((sr_latency_ns / line_time_us) + 1) * 3192 sr_entries = (((sr_latency_ns / line_time_us) + 1000) / 1000) *
2966 pixel_size * sr_hdisplay) / 1000; 3193 pixel_size * sr_hdisplay;
2967 sr_entries = roundup(sr_entries / I915_FIFO_LINE_SIZE, 1); 3194 sr_entries = DIV_ROUND_UP(sr_entries, I915_FIFO_LINE_SIZE);
2968 DRM_DEBUG("self-refresh entries: %d\n", sr_entries); 3195 DRM_DEBUG("self-refresh entries: %d\n", sr_entries);
2969 srwm = I945_FIFO_SIZE - sr_entries; 3196 srwm = I965_FIFO_SIZE - sr_entries;
2970 if (srwm < 0) 3197 if (srwm < 0)
2971 srwm = 1; 3198 srwm = 1;
2972 srwm &= 0x3f; 3199 srwm &= 0x1ff;
3200
3201 sr_entries = (((sr_latency_ns / line_time_us) + 1000) / 1000) *
3202 pixel_size * 64;
3203 sr_entries = DIV_ROUND_UP(sr_entries,
3204 i965_cursor_wm_info.cacheline_size);
3205 cursor_sr = i965_cursor_wm_info.fifo_size -
3206 (sr_entries + i965_cursor_wm_info.guard_size);
3207
3208 if (cursor_sr > i965_cursor_wm_info.max_wm)
3209 cursor_sr = i965_cursor_wm_info.max_wm;
3210
3211 DRM_DEBUG_KMS("self-refresh watermark: display plane %d "
3212 "cursor %d\n", srwm, cursor_sr);
3213
2973 if (IS_I965GM(dev)) 3214 if (IS_I965GM(dev))
2974 I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN); 3215 I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
2975 } else { 3216 } else {
@@ -2986,10 +3227,13 @@ static void i965_update_wm(struct drm_device *dev, int planea_clock,
2986 I915_WRITE(DSPFW1, (srwm << DSPFW_SR_SHIFT) | (8 << 16) | (8 << 8) | 3227 I915_WRITE(DSPFW1, (srwm << DSPFW_SR_SHIFT) | (8 << 16) | (8 << 8) |
2987 (8 << 0)); 3228 (8 << 0));
2988 I915_WRITE(DSPFW2, (8 << 8) | (8 << 0)); 3229 I915_WRITE(DSPFW2, (8 << 8) | (8 << 0));
3230 /* update cursor SR watermark */
3231 I915_WRITE(DSPFW3, (cursor_sr << DSPFW_CURSOR_SR_SHIFT));
2989} 3232}
2990 3233
2991static void i9xx_update_wm(struct drm_device *dev, int planea_clock, 3234static void i9xx_update_wm(struct drm_device *dev, int planea_clock,
2992 int planeb_clock, int sr_hdisplay, int pixel_size) 3235 int planeb_clock, int sr_hdisplay, int sr_htotal,
3236 int pixel_size)
2993{ 3237{
2994 struct drm_i915_private *dev_priv = dev->dev_private; 3238 struct drm_i915_private *dev_priv = dev->dev_private;
2995 uint32_t fwater_lo; 3239 uint32_t fwater_lo;
@@ -3034,12 +3278,12 @@ static void i9xx_update_wm(struct drm_device *dev, int planea_clock,
3034 static const int sr_latency_ns = 6000; 3278 static const int sr_latency_ns = 6000;
3035 3279
3036 sr_clock = planea_clock ? planea_clock : planeb_clock; 3280 sr_clock = planea_clock ? planea_clock : planeb_clock;
3037 line_time_us = ((sr_hdisplay * 1000) / sr_clock); 3281 line_time_us = ((sr_htotal * 1000) / sr_clock);
3038 3282
3039 /* Use ns/us then divide to preserve precision */ 3283 /* Use ns/us then divide to preserve precision */
3040 sr_entries = (((sr_latency_ns / line_time_us) + 1) * 3284 sr_entries = (((sr_latency_ns / line_time_us) + 1000) / 1000) *
3041 pixel_size * sr_hdisplay) / 1000; 3285 pixel_size * sr_hdisplay;
3042 sr_entries = roundup(sr_entries / cacheline_size, 1); 3286 sr_entries = DIV_ROUND_UP(sr_entries, cacheline_size);
3043 DRM_DEBUG_KMS("self-refresh entries: %d\n", sr_entries); 3287 DRM_DEBUG_KMS("self-refresh entries: %d\n", sr_entries);
3044 srwm = total_size - sr_entries; 3288 srwm = total_size - sr_entries;
3045 if (srwm < 0) 3289 if (srwm < 0)
@@ -3077,7 +3321,7 @@ static void i9xx_update_wm(struct drm_device *dev, int planea_clock,
3077} 3321}
3078 3322
3079static void i830_update_wm(struct drm_device *dev, int planea_clock, int unused, 3323static void i830_update_wm(struct drm_device *dev, int planea_clock, int unused,
3080 int unused2, int pixel_size) 3324 int unused2, int unused3, int pixel_size)
3081{ 3325{
3082 struct drm_i915_private *dev_priv = dev->dev_private; 3326 struct drm_i915_private *dev_priv = dev->dev_private;
3083 uint32_t fwater_lo = I915_READ(FW_BLC) & ~0xfff; 3327 uint32_t fwater_lo = I915_READ(FW_BLC) & ~0xfff;
@@ -3095,9 +3339,11 @@ static void i830_update_wm(struct drm_device *dev, int planea_clock, int unused,
3095} 3339}
3096 3340
3097#define ILK_LP0_PLANE_LATENCY 700 3341#define ILK_LP0_PLANE_LATENCY 700
3342#define ILK_LP0_CURSOR_LATENCY 1300
3098 3343
3099static void ironlake_update_wm(struct drm_device *dev, int planea_clock, 3344static void ironlake_update_wm(struct drm_device *dev, int planea_clock,
3100 int planeb_clock, int sr_hdisplay, int pixel_size) 3345 int planeb_clock, int sr_hdisplay, int sr_htotal,
3346 int pixel_size)
3101{ 3347{
3102 struct drm_i915_private *dev_priv = dev->dev_private; 3348 struct drm_i915_private *dev_priv = dev->dev_private;
3103 int planea_wm, planeb_wm, cursora_wm, cursorb_wm; 3349 int planea_wm, planeb_wm, cursora_wm, cursorb_wm;
@@ -3105,20 +3351,48 @@ static void ironlake_update_wm(struct drm_device *dev, int planea_clock,
3105 unsigned long line_time_us; 3351 unsigned long line_time_us;
3106 int sr_clock, entries_required; 3352 int sr_clock, entries_required;
3107 u32 reg_value; 3353 u32 reg_value;
3354 int line_count;
3355 int planea_htotal = 0, planeb_htotal = 0;
3356 struct drm_crtc *crtc;
3357 struct intel_crtc *intel_crtc;
3358
3359 /* Need htotal for all active display plane */
3360 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
3361 intel_crtc = to_intel_crtc(crtc);
3362 if (crtc->enabled) {
3363 if (intel_crtc->plane == 0)
3364 planea_htotal = crtc->mode.htotal;
3365 else
3366 planeb_htotal = crtc->mode.htotal;
3367 }
3368 }
3108 3369
3109 /* Calculate and update the watermark for plane A */ 3370 /* Calculate and update the watermark for plane A */
3110 if (planea_clock) { 3371 if (planea_clock) {
3111 entries_required = ((planea_clock / 1000) * pixel_size * 3372 entries_required = ((planea_clock / 1000) * pixel_size *
3112 ILK_LP0_PLANE_LATENCY) / 1000; 3373 ILK_LP0_PLANE_LATENCY) / 1000;
3113 entries_required = DIV_ROUND_UP(entries_required, 3374 entries_required = DIV_ROUND_UP(entries_required,
3114 ironlake_display_wm_info.cacheline_size); 3375 ironlake_display_wm_info.cacheline_size);
3115 planea_wm = entries_required + 3376 planea_wm = entries_required +
3116 ironlake_display_wm_info.guard_size; 3377 ironlake_display_wm_info.guard_size;
3117 3378
3118 if (planea_wm > (int)ironlake_display_wm_info.max_wm) 3379 if (planea_wm > (int)ironlake_display_wm_info.max_wm)
3119 planea_wm = ironlake_display_wm_info.max_wm; 3380 planea_wm = ironlake_display_wm_info.max_wm;
3120 3381
3121 cursora_wm = 16; 3382 /* Use the large buffer method to calculate cursor watermark */
3383 line_time_us = (planea_htotal * 1000) / planea_clock;
3384
3385 /* Use ns/us then divide to preserve precision */
3386 line_count = (ILK_LP0_CURSOR_LATENCY / line_time_us + 1000) / 1000;
3387
3388 /* calculate the cursor watermark for cursor A */
3389 entries_required = line_count * 64 * pixel_size;
3390 entries_required = DIV_ROUND_UP(entries_required,
3391 ironlake_cursor_wm_info.cacheline_size);
3392 cursora_wm = entries_required + ironlake_cursor_wm_info.guard_size;
3393 if (cursora_wm > ironlake_cursor_wm_info.max_wm)
3394 cursora_wm = ironlake_cursor_wm_info.max_wm;
3395
3122 reg_value = I915_READ(WM0_PIPEA_ILK); 3396 reg_value = I915_READ(WM0_PIPEA_ILK);
3123 reg_value &= ~(WM0_PIPE_PLANE_MASK | WM0_PIPE_CURSOR_MASK); 3397 reg_value &= ~(WM0_PIPE_PLANE_MASK | WM0_PIPE_CURSOR_MASK);
3124 reg_value |= (planea_wm << WM0_PIPE_PLANE_SHIFT) | 3398 reg_value |= (planea_wm << WM0_PIPE_PLANE_SHIFT) |
@@ -3132,14 +3406,27 @@ static void ironlake_update_wm(struct drm_device *dev, int planea_clock,
3132 entries_required = ((planeb_clock / 1000) * pixel_size * 3406 entries_required = ((planeb_clock / 1000) * pixel_size *
3133 ILK_LP0_PLANE_LATENCY) / 1000; 3407 ILK_LP0_PLANE_LATENCY) / 1000;
3134 entries_required = DIV_ROUND_UP(entries_required, 3408 entries_required = DIV_ROUND_UP(entries_required,
3135 ironlake_display_wm_info.cacheline_size); 3409 ironlake_display_wm_info.cacheline_size);
3136 planeb_wm = entries_required + 3410 planeb_wm = entries_required +
3137 ironlake_display_wm_info.guard_size; 3411 ironlake_display_wm_info.guard_size;
3138 3412
3139 if (planeb_wm > (int)ironlake_display_wm_info.max_wm) 3413 if (planeb_wm > (int)ironlake_display_wm_info.max_wm)
3140 planeb_wm = ironlake_display_wm_info.max_wm; 3414 planeb_wm = ironlake_display_wm_info.max_wm;
3141 3415
3142 cursorb_wm = 16; 3416 /* Use the large buffer method to calculate cursor watermark */
3417 line_time_us = (planeb_htotal * 1000) / planeb_clock;
3418
3419 /* Use ns/us then divide to preserve precision */
3420 line_count = (ILK_LP0_CURSOR_LATENCY / line_time_us + 1000) / 1000;
3421
3422 /* calculate the cursor watermark for cursor B */
3423 entries_required = line_count * 64 * pixel_size;
3424 entries_required = DIV_ROUND_UP(entries_required,
3425 ironlake_cursor_wm_info.cacheline_size);
3426 cursorb_wm = entries_required + ironlake_cursor_wm_info.guard_size;
3427 if (cursorb_wm > ironlake_cursor_wm_info.max_wm)
3428 cursorb_wm = ironlake_cursor_wm_info.max_wm;
3429
3143 reg_value = I915_READ(WM0_PIPEB_ILK); 3430 reg_value = I915_READ(WM0_PIPEB_ILK);
3144 reg_value &= ~(WM0_PIPE_PLANE_MASK | WM0_PIPE_CURSOR_MASK); 3431 reg_value &= ~(WM0_PIPE_PLANE_MASK | WM0_PIPE_CURSOR_MASK);
3145 reg_value |= (planeb_wm << WM0_PIPE_PLANE_SHIFT) | 3432 reg_value |= (planeb_wm << WM0_PIPE_PLANE_SHIFT) |
@@ -3154,12 +3441,12 @@ static void ironlake_update_wm(struct drm_device *dev, int planea_clock,
3154 * display plane is used. 3441 * display plane is used.
3155 */ 3442 */
3156 if (!planea_clock || !planeb_clock) { 3443 if (!planea_clock || !planeb_clock) {
3157 int line_count; 3444
3158 /* Read the self-refresh latency. The unit is 0.5us */ 3445 /* Read the self-refresh latency. The unit is 0.5us */
3159 int ilk_sr_latency = I915_READ(MLTR_ILK) & ILK_SRLT_MASK; 3446 int ilk_sr_latency = I915_READ(MLTR_ILK) & ILK_SRLT_MASK;
3160 3447
3161 sr_clock = planea_clock ? planea_clock : planeb_clock; 3448 sr_clock = planea_clock ? planea_clock : planeb_clock;
3162 line_time_us = ((sr_hdisplay * 1000) / sr_clock); 3449 line_time_us = ((sr_htotal * 1000) / sr_clock);
3163 3450
3164 /* Use ns/us then divide to preserve precision */ 3451 /* Use ns/us then divide to preserve precision */
3165 line_count = ((ilk_sr_latency * 500) / line_time_us + 1000) 3452 line_count = ((ilk_sr_latency * 500) / line_time_us + 1000)
@@ -3168,14 +3455,14 @@ static void ironlake_update_wm(struct drm_device *dev, int planea_clock,
3168 /* calculate the self-refresh watermark for display plane */ 3455 /* calculate the self-refresh watermark for display plane */
3169 entries_required = line_count * sr_hdisplay * pixel_size; 3456 entries_required = line_count * sr_hdisplay * pixel_size;
3170 entries_required = DIV_ROUND_UP(entries_required, 3457 entries_required = DIV_ROUND_UP(entries_required,
3171 ironlake_display_srwm_info.cacheline_size); 3458 ironlake_display_srwm_info.cacheline_size);
3172 sr_wm = entries_required + 3459 sr_wm = entries_required +
3173 ironlake_display_srwm_info.guard_size; 3460 ironlake_display_srwm_info.guard_size;
3174 3461
3175 /* calculate the self-refresh watermark for display cursor */ 3462 /* calculate the self-refresh watermark for display cursor */
3176 entries_required = line_count * pixel_size * 64; 3463 entries_required = line_count * pixel_size * 64;
3177 entries_required = DIV_ROUND_UP(entries_required, 3464 entries_required = DIV_ROUND_UP(entries_required,
3178 ironlake_cursor_srwm_info.cacheline_size); 3465 ironlake_cursor_srwm_info.cacheline_size);
3179 cursor_wm = entries_required + 3466 cursor_wm = entries_required +
3180 ironlake_cursor_srwm_info.guard_size; 3467 ironlake_cursor_srwm_info.guard_size;
3181 3468
@@ -3219,6 +3506,7 @@ static void ironlake_update_wm(struct drm_device *dev, int planea_clock,
3219 * bytes per pixel 3506 * bytes per pixel
3220 * where 3507 * where
3221 * line time = htotal / dotclock 3508 * line time = htotal / dotclock
3509 * surface width = hdisplay for normal plane and 64 for cursor
3222 * and latency is assumed to be high, as above. 3510 * and latency is assumed to be high, as above.
3223 * 3511 *
3224 * The final value programmed to the register should always be rounded up, 3512 * The final value programmed to the register should always be rounded up,
@@ -3235,6 +3523,7 @@ static void intel_update_watermarks(struct drm_device *dev)
3235 int sr_hdisplay = 0; 3523 int sr_hdisplay = 0;
3236 unsigned long planea_clock = 0, planeb_clock = 0, sr_clock = 0; 3524 unsigned long planea_clock = 0, planeb_clock = 0, sr_clock = 0;
3237 int enabled = 0, pixel_size = 0; 3525 int enabled = 0, pixel_size = 0;
3526 int sr_htotal = 0;
3238 3527
3239 if (!dev_priv->display.update_wm) 3528 if (!dev_priv->display.update_wm)
3240 return; 3529 return;
@@ -3255,6 +3544,7 @@ static void intel_update_watermarks(struct drm_device *dev)
3255 } 3544 }
3256 sr_hdisplay = crtc->mode.hdisplay; 3545 sr_hdisplay = crtc->mode.hdisplay;
3257 sr_clock = crtc->mode.clock; 3546 sr_clock = crtc->mode.clock;
3547 sr_htotal = crtc->mode.htotal;
3258 if (crtc->fb) 3548 if (crtc->fb)
3259 pixel_size = crtc->fb->bits_per_pixel / 8; 3549 pixel_size = crtc->fb->bits_per_pixel / 8;
3260 else 3550 else
@@ -3266,7 +3556,7 @@ static void intel_update_watermarks(struct drm_device *dev)
3266 return; 3556 return;
3267 3557
3268 dev_priv->display.update_wm(dev, planea_clock, planeb_clock, 3558 dev_priv->display.update_wm(dev, planea_clock, planeb_clock,
3269 sr_hdisplay, pixel_size); 3559 sr_hdisplay, sr_htotal, pixel_size);
3270} 3560}
3271 3561
3272static int intel_crtc_mode_set(struct drm_crtc *crtc, 3562static int intel_crtc_mode_set(struct drm_crtc *crtc,
@@ -3385,6 +3675,9 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
3385 return -EINVAL; 3675 return -EINVAL;
3386 } 3676 }
3387 3677
3678 /* Ensure that the cursor is valid for the new mode before changing... */
3679 intel_crtc_update_cursor(crtc);
3680
3388 if (is_lvds && dev_priv->lvds_downclock_avail) { 3681 if (is_lvds && dev_priv->lvds_downclock_avail) {
3389 has_reduced_clock = limit->find_pll(limit, crtc, 3682 has_reduced_clock = limit->find_pll(limit, crtc,
3390 dev_priv->lvds_downclock, 3683 dev_priv->lvds_downclock,
@@ -3451,7 +3744,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
3451 temp |= PIPE_8BPC; 3744 temp |= PIPE_8BPC;
3452 else 3745 else
3453 temp |= PIPE_6BPC; 3746 temp |= PIPE_6BPC;
3454 } else if (is_edp) { 3747 } else if (is_edp || (is_dp && intel_pch_has_edp(crtc))) {
3455 switch (dev_priv->edp_bpp/3) { 3748 switch (dev_priv->edp_bpp/3) {
3456 case 8: 3749 case 8:
3457 temp |= PIPE_8BPC; 3750 temp |= PIPE_8BPC;
@@ -3694,6 +3987,11 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
3694 udelay(150); 3987 udelay(150);
3695 } 3988 }
3696 3989
3990 if (HAS_PCH_SPLIT(dev)) {
3991 pipeconf &= ~PIPE_ENABLE_DITHER;
3992 pipeconf &= ~PIPE_DITHER_TYPE_MASK;
3993 }
3994
3697 /* The LVDS pin pair needs to be on before the DPLLs are enabled. 3995 /* The LVDS pin pair needs to be on before the DPLLs are enabled.
3698 * This is an exception to the general rule that mode_set doesn't turn 3996 * This is an exception to the general rule that mode_set doesn't turn
3699 * things on. 3997 * things on.
@@ -3740,11 +4038,9 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
3740 } else 4038 } else
3741 lvds |= LVDS_ENABLE_DITHER; 4039 lvds |= LVDS_ENABLE_DITHER;
3742 } else { 4040 } else {
3743 if (HAS_PCH_SPLIT(dev)) { 4041 if (!HAS_PCH_SPLIT(dev)) {
3744 pipeconf &= ~PIPE_ENABLE_DITHER;
3745 pipeconf &= ~PIPE_DITHER_TYPE_MASK;
3746 } else
3747 lvds &= ~LVDS_ENABLE_DITHER; 4042 lvds &= ~LVDS_ENABLE_DITHER;
4043 }
3748 } 4044 }
3749 } 4045 }
3750 I915_WRITE(lvds_reg, lvds); 4046 I915_WRITE(lvds_reg, lvds);
@@ -3920,6 +4216,85 @@ void intel_crtc_load_lut(struct drm_crtc *crtc)
3920 } 4216 }
3921} 4217}
3922 4218
4219/* If no-part of the cursor is visible on the framebuffer, then the GPU may hang... */
4220static void intel_crtc_update_cursor(struct drm_crtc *crtc)
4221{
4222 struct drm_device *dev = crtc->dev;
4223 struct drm_i915_private *dev_priv = dev->dev_private;
4224 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4225 int pipe = intel_crtc->pipe;
4226 int x = intel_crtc->cursor_x;
4227 int y = intel_crtc->cursor_y;
4228 uint32_t base, pos;
4229 bool visible;
4230
4231 pos = 0;
4232
4233 if (crtc->fb) {
4234 base = intel_crtc->cursor_addr;
4235 if (x > (int) crtc->fb->width)
4236 base = 0;
4237
4238 if (y > (int) crtc->fb->height)
4239 base = 0;
4240 } else
4241 base = 0;
4242
4243 if (x < 0) {
4244 if (x + intel_crtc->cursor_width < 0)
4245 base = 0;
4246
4247 pos |= CURSOR_POS_SIGN << CURSOR_X_SHIFT;
4248 x = -x;
4249 }
4250 pos |= x << CURSOR_X_SHIFT;
4251
4252 if (y < 0) {
4253 if (y + intel_crtc->cursor_height < 0)
4254 base = 0;
4255
4256 pos |= CURSOR_POS_SIGN << CURSOR_Y_SHIFT;
4257 y = -y;
4258 }
4259 pos |= y << CURSOR_Y_SHIFT;
4260
4261 visible = base != 0;
4262 if (!visible && !intel_crtc->cursor_visble)
4263 return;
4264
4265 I915_WRITE(pipe == 0 ? CURAPOS : CURBPOS, pos);
4266 if (intel_crtc->cursor_visble != visible) {
4267 uint32_t cntl = I915_READ(pipe == 0 ? CURACNTR : CURBCNTR);
4268 if (base) {
4269 /* Hooray for CUR*CNTR differences */
4270 if (IS_MOBILE(dev) || IS_I9XX(dev)) {
4271 cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT);
4272 cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE;
4273 cntl |= pipe << 28; /* Connect to correct pipe */
4274 } else {
4275 cntl &= ~(CURSOR_FORMAT_MASK);
4276 cntl |= CURSOR_ENABLE;
4277 cntl |= CURSOR_FORMAT_ARGB | CURSOR_GAMMA_ENABLE;
4278 }
4279 } else {
4280 if (IS_MOBILE(dev) || IS_I9XX(dev)) {
4281 cntl &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE);
4282 cntl |= CURSOR_MODE_DISABLE;
4283 } else {
4284 cntl &= ~(CURSOR_ENABLE | CURSOR_GAMMA_ENABLE);
4285 }
4286 }
4287 I915_WRITE(pipe == 0 ? CURACNTR : CURBCNTR, cntl);
4288
4289 intel_crtc->cursor_visble = visible;
4290 }
4291 /* and commit changes on next vblank */
4292 I915_WRITE(pipe == 0 ? CURABASE : CURBBASE, base);
4293
4294 if (visible)
4295 intel_mark_busy(dev, to_intel_framebuffer(crtc->fb)->obj);
4296}
4297
3923static int intel_crtc_cursor_set(struct drm_crtc *crtc, 4298static int intel_crtc_cursor_set(struct drm_crtc *crtc,
3924 struct drm_file *file_priv, 4299 struct drm_file *file_priv,
3925 uint32_t handle, 4300 uint32_t handle,
@@ -3930,11 +4305,7 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
3930 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 4305 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
3931 struct drm_gem_object *bo; 4306 struct drm_gem_object *bo;
3932 struct drm_i915_gem_object *obj_priv; 4307 struct drm_i915_gem_object *obj_priv;
3933 int pipe = intel_crtc->pipe; 4308 uint32_t addr;
3934 uint32_t control = (pipe == 0) ? CURACNTR : CURBCNTR;
3935 uint32_t base = (pipe == 0) ? CURABASE : CURBBASE;
3936 uint32_t temp = I915_READ(control);
3937 size_t addr;
3938 int ret; 4309 int ret;
3939 4310
3940 DRM_DEBUG_KMS("\n"); 4311 DRM_DEBUG_KMS("\n");
@@ -3942,12 +4313,6 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
3942 /* if we want to turn off the cursor ignore width and height */ 4313 /* if we want to turn off the cursor ignore width and height */
3943 if (!handle) { 4314 if (!handle) {
3944 DRM_DEBUG_KMS("cursor off\n"); 4315 DRM_DEBUG_KMS("cursor off\n");
3945 if (IS_MOBILE(dev) || IS_I9XX(dev)) {
3946 temp &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE);
3947 temp |= CURSOR_MODE_DISABLE;
3948 } else {
3949 temp &= ~(CURSOR_ENABLE | CURSOR_GAMMA_ENABLE);
3950 }
3951 addr = 0; 4316 addr = 0;
3952 bo = NULL; 4317 bo = NULL;
3953 mutex_lock(&dev->struct_mutex); 4318 mutex_lock(&dev->struct_mutex);
@@ -3989,7 +4354,8 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
3989 4354
3990 addr = obj_priv->gtt_offset; 4355 addr = obj_priv->gtt_offset;
3991 } else { 4356 } else {
3992 ret = i915_gem_attach_phys_object(dev, bo, (pipe == 0) ? I915_GEM_PHYS_CURSOR_0 : I915_GEM_PHYS_CURSOR_1); 4357 ret = i915_gem_attach_phys_object(dev, bo,
4358 (intel_crtc->pipe == 0) ? I915_GEM_PHYS_CURSOR_0 : I915_GEM_PHYS_CURSOR_1);
3993 if (ret) { 4359 if (ret) {
3994 DRM_ERROR("failed to attach phys object\n"); 4360 DRM_ERROR("failed to attach phys object\n");
3995 goto fail_locked; 4361 goto fail_locked;
@@ -4000,21 +4366,7 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
4000 if (!IS_I9XX(dev)) 4366 if (!IS_I9XX(dev))
4001 I915_WRITE(CURSIZE, (height << 12) | width); 4367 I915_WRITE(CURSIZE, (height << 12) | width);
4002 4368
4003 /* Hooray for CUR*CNTR differences */
4004 if (IS_MOBILE(dev) || IS_I9XX(dev)) {
4005 temp &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT);
4006 temp |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE;
4007 temp |= (pipe << 28); /* Connect to correct pipe */
4008 } else {
4009 temp &= ~(CURSOR_FORMAT_MASK);
4010 temp |= CURSOR_ENABLE;
4011 temp |= CURSOR_FORMAT_ARGB | CURSOR_GAMMA_ENABLE;
4012 }
4013
4014 finish: 4369 finish:
4015 I915_WRITE(control, temp);
4016 I915_WRITE(base, addr);
4017
4018 if (intel_crtc->cursor_bo) { 4370 if (intel_crtc->cursor_bo) {
4019 if (dev_priv->info->cursor_needs_physical) { 4371 if (dev_priv->info->cursor_needs_physical) {
4020 if (intel_crtc->cursor_bo != bo) 4372 if (intel_crtc->cursor_bo != bo)
@@ -4028,6 +4380,10 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
4028 4380
4029 intel_crtc->cursor_addr = addr; 4381 intel_crtc->cursor_addr = addr;
4030 intel_crtc->cursor_bo = bo; 4382 intel_crtc->cursor_bo = bo;
4383 intel_crtc->cursor_width = width;
4384 intel_crtc->cursor_height = height;
4385
4386 intel_crtc_update_cursor(crtc);
4031 4387
4032 return 0; 4388 return 0;
4033fail_unpin: 4389fail_unpin:
@@ -4041,34 +4397,12 @@ fail:
4041 4397
4042static int intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) 4398static int intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
4043{ 4399{
4044 struct drm_device *dev = crtc->dev;
4045 struct drm_i915_private *dev_priv = dev->dev_private;
4046 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 4400 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4047 struct intel_framebuffer *intel_fb;
4048 int pipe = intel_crtc->pipe;
4049 uint32_t temp = 0;
4050 uint32_t adder;
4051
4052 if (crtc->fb) {
4053 intel_fb = to_intel_framebuffer(crtc->fb);
4054 intel_mark_busy(dev, intel_fb->obj);
4055 }
4056
4057 if (x < 0) {
4058 temp |= CURSOR_POS_SIGN << CURSOR_X_SHIFT;
4059 x = -x;
4060 }
4061 if (y < 0) {
4062 temp |= CURSOR_POS_SIGN << CURSOR_Y_SHIFT;
4063 y = -y;
4064 }
4065 4401
4066 temp |= x << CURSOR_X_SHIFT; 4402 intel_crtc->cursor_x = x;
4067 temp |= y << CURSOR_Y_SHIFT; 4403 intel_crtc->cursor_y = y;
4068 4404
4069 adder = intel_crtc->cursor_addr; 4405 intel_crtc_update_cursor(crtc);
4070 I915_WRITE((pipe == 0) ? CURAPOS : CURBPOS, temp);
4071 I915_WRITE((pipe == 0) ? CURABASE : CURBBASE, adder);
4072 4406
4073 return 0; 4407 return 0;
4074} 4408}
@@ -4412,7 +4746,8 @@ static void intel_increase_pllclock(struct drm_crtc *crtc, bool schedule)
4412 DRM_DEBUG_DRIVER("upclocking LVDS\n"); 4746 DRM_DEBUG_DRIVER("upclocking LVDS\n");
4413 4747
4414 /* Unlock panel regs */ 4748 /* Unlock panel regs */
4415 I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | (0xabcd << 16)); 4749 I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) |
4750 PANEL_UNLOCK_REGS);
4416 4751
4417 dpll &= ~DISPLAY_RATE_SELECT_FPA1; 4752 dpll &= ~DISPLAY_RATE_SELECT_FPA1;
4418 I915_WRITE(dpll_reg, dpll); 4753 I915_WRITE(dpll_reg, dpll);
@@ -4455,7 +4790,8 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
4455 DRM_DEBUG_DRIVER("downclocking LVDS\n"); 4790 DRM_DEBUG_DRIVER("downclocking LVDS\n");
4456 4791
4457 /* Unlock panel regs */ 4792 /* Unlock panel regs */
4458 I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | (0xabcd << 16)); 4793 I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) |
4794 PANEL_UNLOCK_REGS);
4459 4795
4460 dpll |= DISPLAY_RATE_SELECT_FPA1; 4796 dpll |= DISPLAY_RATE_SELECT_FPA1;
4461 I915_WRITE(dpll_reg, dpll); 4797 I915_WRITE(dpll_reg, dpll);
@@ -4650,6 +4986,8 @@ static void do_intel_finish_page_flip(struct drm_device *dev,
4650 atomic_dec_and_test(&obj_priv->pending_flip)) 4986 atomic_dec_and_test(&obj_priv->pending_flip))
4651 DRM_WAKEUP(&dev_priv->pending_flip_queue); 4987 DRM_WAKEUP(&dev_priv->pending_flip_queue);
4652 schedule_work(&work->work); 4988 schedule_work(&work->work);
4989
4990 trace_i915_flip_complete(intel_crtc->plane, work->pending_flip_obj);
4653} 4991}
4654 4992
4655void intel_finish_page_flip(struct drm_device *dev, int pipe) 4993void intel_finish_page_flip(struct drm_device *dev, int pipe)
@@ -4695,7 +5033,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
4695 struct drm_gem_object *obj; 5033 struct drm_gem_object *obj;
4696 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 5034 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4697 struct intel_unpin_work *work; 5035 struct intel_unpin_work *work;
4698 unsigned long flags; 5036 unsigned long flags, offset;
4699 int pipesrc_reg = (intel_crtc->pipe == 0) ? PIPEASRC : PIPEBSRC; 5037 int pipesrc_reg = (intel_crtc->pipe == 0) ? PIPEASRC : PIPEBSRC;
4700 int ret, pipesrc; 5038 int ret, pipesrc;
4701 u32 flip_mask; 5039 u32 flip_mask;
@@ -4727,27 +5065,22 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
4727 5065
4728 mutex_lock(&dev->struct_mutex); 5066 mutex_lock(&dev->struct_mutex);
4729 ret = intel_pin_and_fence_fb_obj(dev, obj); 5067 ret = intel_pin_and_fence_fb_obj(dev, obj);
4730 if (ret != 0) { 5068 if (ret)
4731 mutex_unlock(&dev->struct_mutex); 5069 goto cleanup_work;
4732
4733 spin_lock_irqsave(&dev->event_lock, flags);
4734 intel_crtc->unpin_work = NULL;
4735 spin_unlock_irqrestore(&dev->event_lock, flags);
4736
4737 kfree(work);
4738
4739 DRM_DEBUG_DRIVER("flip queue: %p pin & fence failed\n",
4740 to_intel_bo(obj));
4741 return ret;
4742 }
4743 5070
4744 /* Reference the objects for the scheduled work. */ 5071 /* Reference the objects for the scheduled work. */
4745 drm_gem_object_reference(work->old_fb_obj); 5072 drm_gem_object_reference(work->old_fb_obj);
4746 drm_gem_object_reference(obj); 5073 drm_gem_object_reference(obj);
4747 5074
4748 crtc->fb = fb; 5075 crtc->fb = fb;
4749 i915_gem_object_flush_write_domain(obj); 5076 ret = i915_gem_object_flush_write_domain(obj);
4750 drm_vblank_get(dev, intel_crtc->pipe); 5077 if (ret)
5078 goto cleanup_objs;
5079
5080 ret = drm_vblank_get(dev, intel_crtc->pipe);
5081 if (ret)
5082 goto cleanup_objs;
5083
4751 obj_priv = to_intel_bo(obj); 5084 obj_priv = to_intel_bo(obj);
4752 atomic_inc(&obj_priv->pending_flip); 5085 atomic_inc(&obj_priv->pending_flip);
4753 work->pending_flip_obj = obj; 5086 work->pending_flip_obj = obj;
@@ -4762,26 +5095,46 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
4762 while (I915_READ(ISR) & flip_mask) 5095 while (I915_READ(ISR) & flip_mask)
4763 ; 5096 ;
4764 5097
5098 /* Offset into the new buffer for cases of shared fbs between CRTCs */
5099 offset = obj_priv->gtt_offset;
5100 offset += (crtc->y * fb->pitch) + (crtc->x * (fb->bits_per_pixel) / 8);
5101
4765 BEGIN_LP_RING(4); 5102 BEGIN_LP_RING(4);
4766 if (IS_I965G(dev)) { 5103 if (IS_I965G(dev)) {
4767 OUT_RING(MI_DISPLAY_FLIP | 5104 OUT_RING(MI_DISPLAY_FLIP |
4768 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane)); 5105 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
4769 OUT_RING(fb->pitch); 5106 OUT_RING(fb->pitch);
4770 OUT_RING(obj_priv->gtt_offset | obj_priv->tiling_mode); 5107 OUT_RING(offset | obj_priv->tiling_mode);
4771 pipesrc = I915_READ(pipesrc_reg); 5108 pipesrc = I915_READ(pipesrc_reg);
4772 OUT_RING(pipesrc & 0x0fff0fff); 5109 OUT_RING(pipesrc & 0x0fff0fff);
4773 } else { 5110 } else {
4774 OUT_RING(MI_DISPLAY_FLIP_I915 | 5111 OUT_RING(MI_DISPLAY_FLIP_I915 |
4775 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane)); 5112 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
4776 OUT_RING(fb->pitch); 5113 OUT_RING(fb->pitch);
4777 OUT_RING(obj_priv->gtt_offset); 5114 OUT_RING(offset);
4778 OUT_RING(MI_NOOP); 5115 OUT_RING(MI_NOOP);
4779 } 5116 }
4780 ADVANCE_LP_RING(); 5117 ADVANCE_LP_RING();
4781 5118
4782 mutex_unlock(&dev->struct_mutex); 5119 mutex_unlock(&dev->struct_mutex);
4783 5120
5121 trace_i915_flip_request(intel_crtc->plane, obj);
5122
4784 return 0; 5123 return 0;
5124
5125cleanup_objs:
5126 drm_gem_object_unreference(work->old_fb_obj);
5127 drm_gem_object_unreference(obj);
5128cleanup_work:
5129 mutex_unlock(&dev->struct_mutex);
5130
5131 spin_lock_irqsave(&dev->event_lock, flags);
5132 intel_crtc->unpin_work = NULL;
5133 spin_unlock_irqrestore(&dev->event_lock, flags);
5134
5135 kfree(work);
5136
5137 return ret;
4785} 5138}
4786 5139
4787static const struct drm_crtc_helper_funcs intel_helper_funcs = { 5140static const struct drm_crtc_helper_funcs intel_helper_funcs = {
@@ -4789,6 +5142,7 @@ static const struct drm_crtc_helper_funcs intel_helper_funcs = {
4789 .mode_fixup = intel_crtc_mode_fixup, 5142 .mode_fixup = intel_crtc_mode_fixup,
4790 .mode_set = intel_crtc_mode_set, 5143 .mode_set = intel_crtc_mode_set,
4791 .mode_set_base = intel_pipe_set_base, 5144 .mode_set_base = intel_pipe_set_base,
5145 .mode_set_base_atomic = intel_pipe_set_base_atomic,
4792 .prepare = intel_crtc_prepare, 5146 .prepare = intel_crtc_prepare,
4793 .commit = intel_crtc_commit, 5147 .commit = intel_crtc_commit,
4794 .load_lut = intel_crtc_load_lut, 5148 .load_lut = intel_crtc_load_lut,
@@ -4907,19 +5261,26 @@ static void intel_setup_outputs(struct drm_device *dev)
4907{ 5261{
4908 struct drm_i915_private *dev_priv = dev->dev_private; 5262 struct drm_i915_private *dev_priv = dev->dev_private;
4909 struct drm_encoder *encoder; 5263 struct drm_encoder *encoder;
5264 bool dpd_is_edp = false;
4910 5265
4911 intel_crt_init(dev);
4912
4913 /* Set up integrated LVDS */
4914 if (IS_MOBILE(dev) && !IS_I830(dev)) 5266 if (IS_MOBILE(dev) && !IS_I830(dev))
4915 intel_lvds_init(dev); 5267 intel_lvds_init(dev);
4916 5268
4917 if (HAS_PCH_SPLIT(dev)) { 5269 if (HAS_PCH_SPLIT(dev)) {
4918 int found; 5270 dpd_is_edp = intel_dpd_is_edp(dev);
4919 5271
4920 if (IS_MOBILE(dev) && (I915_READ(DP_A) & DP_DETECTED)) 5272 if (IS_MOBILE(dev) && (I915_READ(DP_A) & DP_DETECTED))
4921 intel_dp_init(dev, DP_A); 5273 intel_dp_init(dev, DP_A);
4922 5274
5275 if (dpd_is_edp && (I915_READ(PCH_DP_D) & DP_DETECTED))
5276 intel_dp_init(dev, PCH_DP_D);
5277 }
5278
5279 intel_crt_init(dev);
5280
5281 if (HAS_PCH_SPLIT(dev)) {
5282 int found;
5283
4923 if (I915_READ(HDMIB) & PORT_DETECTED) { 5284 if (I915_READ(HDMIB) & PORT_DETECTED) {
4924 /* PCH SDVOB multiplex with HDMIB */ 5285 /* PCH SDVOB multiplex with HDMIB */
4925 found = intel_sdvo_init(dev, PCH_SDVOB); 5286 found = intel_sdvo_init(dev, PCH_SDVOB);
@@ -4938,7 +5299,7 @@ static void intel_setup_outputs(struct drm_device *dev)
4938 if (I915_READ(PCH_DP_C) & DP_DETECTED) 5299 if (I915_READ(PCH_DP_C) & DP_DETECTED)
4939 intel_dp_init(dev, PCH_DP_C); 5300 intel_dp_init(dev, PCH_DP_C);
4940 5301
4941 if (I915_READ(PCH_DP_D) & DP_DETECTED) 5302 if (!dpd_is_edp && (I915_READ(PCH_DP_D) & DP_DETECTED))
4942 intel_dp_init(dev, PCH_DP_D); 5303 intel_dp_init(dev, PCH_DP_D);
4943 5304
4944 } else if (SUPPORTS_DIGITAL_OUTPUTS(dev)) { 5305 } else if (SUPPORTS_DIGITAL_OUTPUTS(dev)) {
@@ -5347,6 +5708,26 @@ void intel_init_clock_gating(struct drm_device *dev)
5347 (I915_READ(DISP_ARB_CTL) | 5708 (I915_READ(DISP_ARB_CTL) |
5348 DISP_FBC_WM_DIS)); 5709 DISP_FBC_WM_DIS));
5349 } 5710 }
5711 /*
5712 * Based on the document from hardware guys the following bits
5713 * should be set unconditionally in order to enable FBC.
5714 * The bit 22 of 0x42000
5715 * The bit 22 of 0x42004
5716 * The bit 7,8,9 of 0x42020.
5717 */
5718 if (IS_IRONLAKE_M(dev)) {
5719 I915_WRITE(ILK_DISPLAY_CHICKEN1,
5720 I915_READ(ILK_DISPLAY_CHICKEN1) |
5721 ILK_FBCQ_DIS);
5722 I915_WRITE(ILK_DISPLAY_CHICKEN2,
5723 I915_READ(ILK_DISPLAY_CHICKEN2) |
5724 ILK_DPARB_GATE);
5725 I915_WRITE(ILK_DSPCLK_GATE,
5726 I915_READ(ILK_DSPCLK_GATE) |
5727 ILK_DPFC_DIS1 |
5728 ILK_DPFC_DIS2 |
5729 ILK_CLK_FBC);
5730 }
5350 return; 5731 return;
5351 } else if (IS_G4X(dev)) { 5732 } else if (IS_G4X(dev)) {
5352 uint32_t dspclk_gate; 5733 uint32_t dspclk_gate;
@@ -5425,7 +5806,11 @@ static void intel_init_display(struct drm_device *dev)
5425 dev_priv->display.dpms = i9xx_crtc_dpms; 5806 dev_priv->display.dpms = i9xx_crtc_dpms;
5426 5807
5427 if (I915_HAS_FBC(dev)) { 5808 if (I915_HAS_FBC(dev)) {
5428 if (IS_GM45(dev)) { 5809 if (IS_IRONLAKE_M(dev)) {
5810 dev_priv->display.fbc_enabled = ironlake_fbc_enabled;
5811 dev_priv->display.enable_fbc = ironlake_enable_fbc;
5812 dev_priv->display.disable_fbc = ironlake_disable_fbc;
5813 } else if (IS_GM45(dev)) {
5429 dev_priv->display.fbc_enabled = g4x_fbc_enabled; 5814 dev_priv->display.fbc_enabled = g4x_fbc_enabled;
5430 dev_priv->display.enable_fbc = g4x_enable_fbc; 5815 dev_priv->display.enable_fbc = g4x_enable_fbc;
5431 dev_priv->display.disable_fbc = g4x_disable_fbc; 5816 dev_priv->display.disable_fbc = g4x_disable_fbc;
@@ -5506,6 +5891,66 @@ static void intel_init_display(struct drm_device *dev)
5506 } 5891 }
5507} 5892}
5508 5893
5894/*
5895 * Some BIOSes insist on assuming the GPU's pipe A is enabled at suspend,
5896 * resume, or other times. This quirk makes sure that's the case for
5897 * affected systems.
5898 */
5899static void quirk_pipea_force (struct drm_device *dev)
5900{
5901 struct drm_i915_private *dev_priv = dev->dev_private;
5902
5903 dev_priv->quirks |= QUIRK_PIPEA_FORCE;
5904 DRM_DEBUG_DRIVER("applying pipe a force quirk\n");
5905}
5906
5907struct intel_quirk {
5908 int device;
5909 int subsystem_vendor;
5910 int subsystem_device;
5911 void (*hook)(struct drm_device *dev);
5912};
5913
5914struct intel_quirk intel_quirks[] = {
5915 /* HP Compaq 2730p needs pipe A force quirk (LP: #291555) */
5916 { 0x2a42, 0x103c, 0x30eb, quirk_pipea_force },
5917 /* HP Mini needs pipe A force quirk (LP: #322104) */
5918 { 0x27ae,0x103c, 0x361a, quirk_pipea_force },
5919
5920 /* Thinkpad R31 needs pipe A force quirk */
5921 { 0x3577, 0x1014, 0x0505, quirk_pipea_force },
5922 /* Toshiba Protege R-205, S-209 needs pipe A force quirk */
5923 { 0x2592, 0x1179, 0x0001, quirk_pipea_force },
5924
5925 /* ThinkPad X30 needs pipe A force quirk (LP: #304614) */
5926 { 0x3577, 0x1014, 0x0513, quirk_pipea_force },
5927 /* ThinkPad X40 needs pipe A force quirk */
5928
5929 /* ThinkPad T60 needs pipe A force quirk (bug #16494) */
5930 { 0x2782, 0x17aa, 0x201a, quirk_pipea_force },
5931
5932 /* 855 & before need to leave pipe A & dpll A up */
5933 { 0x3582, PCI_ANY_ID, PCI_ANY_ID, quirk_pipea_force },
5934 { 0x2562, PCI_ANY_ID, PCI_ANY_ID, quirk_pipea_force },
5935};
5936
5937static void intel_init_quirks(struct drm_device *dev)
5938{
5939 struct pci_dev *d = dev->pdev;
5940 int i;
5941
5942 for (i = 0; i < ARRAY_SIZE(intel_quirks); i++) {
5943 struct intel_quirk *q = &intel_quirks[i];
5944
5945 if (d->device == q->device &&
5946 (d->subsystem_vendor == q->subsystem_vendor ||
5947 q->subsystem_vendor == PCI_ANY_ID) &&
5948 (d->subsystem_device == q->subsystem_device ||
5949 q->subsystem_device == PCI_ANY_ID))
5950 q->hook(dev);
5951 }
5952}
5953
5509void intel_modeset_init(struct drm_device *dev) 5954void intel_modeset_init(struct drm_device *dev)
5510{ 5955{
5511 struct drm_i915_private *dev_priv = dev->dev_private; 5956 struct drm_i915_private *dev_priv = dev->dev_private;
@@ -5518,6 +5963,8 @@ void intel_modeset_init(struct drm_device *dev)
5518 5963
5519 dev->mode_config.funcs = (void *)&intel_mode_funcs; 5964 dev->mode_config.funcs = (void *)&intel_mode_funcs;
5520 5965
5966 intel_init_quirks(dev);
5967
5521 intel_init_display(dev); 5968 intel_init_display(dev);
5522 5969
5523 if (IS_I965G(dev)) { 5970 if (IS_I965G(dev)) {
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 1aac59e83bff..40be1fa65be1 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -43,6 +43,7 @@
43#define DP_LINK_CONFIGURATION_SIZE 9 43#define DP_LINK_CONFIGURATION_SIZE 9
44 44
45#define IS_eDP(i) ((i)->type == INTEL_OUTPUT_EDP) 45#define IS_eDP(i) ((i)->type == INTEL_OUTPUT_EDP)
46#define IS_PCH_eDP(dp_priv) ((dp_priv)->is_pch_edp)
46 47
47struct intel_dp_priv { 48struct intel_dp_priv {
48 uint32_t output_reg; 49 uint32_t output_reg;
@@ -56,6 +57,7 @@ struct intel_dp_priv {
56 struct intel_encoder *intel_encoder; 57 struct intel_encoder *intel_encoder;
57 struct i2c_adapter adapter; 58 struct i2c_adapter adapter;
58 struct i2c_algo_dp_aux_data algo; 59 struct i2c_algo_dp_aux_data algo;
60 bool is_pch_edp;
59}; 61};
60 62
61static void 63static void
@@ -128,8 +130,9 @@ intel_dp_link_required(struct drm_device *dev,
128 struct intel_encoder *intel_encoder, int pixel_clock) 130 struct intel_encoder *intel_encoder, int pixel_clock)
129{ 131{
130 struct drm_i915_private *dev_priv = dev->dev_private; 132 struct drm_i915_private *dev_priv = dev->dev_private;
133 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
131 134
132 if (IS_eDP(intel_encoder)) 135 if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv))
133 return (pixel_clock * dev_priv->edp_bpp) / 8; 136 return (pixel_clock * dev_priv->edp_bpp) / 8;
134 else 137 else
135 return pixel_clock * 3; 138 return pixel_clock * 3;
@@ -147,9 +150,21 @@ intel_dp_mode_valid(struct drm_connector *connector,
147{ 150{
148 struct drm_encoder *encoder = intel_attached_encoder(connector); 151 struct drm_encoder *encoder = intel_attached_encoder(connector);
149 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 152 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
153 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
154 struct drm_device *dev = connector->dev;
155 struct drm_i915_private *dev_priv = dev->dev_private;
150 int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_encoder)); 156 int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_encoder));
151 int max_lanes = intel_dp_max_lane_count(intel_encoder); 157 int max_lanes = intel_dp_max_lane_count(intel_encoder);
152 158
159 if ((IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) &&
160 dev_priv->panel_fixed_mode) {
161 if (mode->hdisplay > dev_priv->panel_fixed_mode->hdisplay)
162 return MODE_PANEL;
163
164 if (mode->vdisplay > dev_priv->panel_fixed_mode->vdisplay)
165 return MODE_PANEL;
166 }
167
153 /* only refuse the mode on non eDP since we have seen some wierd eDP panels 168 /* only refuse the mode on non eDP since we have seen some wierd eDP panels
154 which are outside spec tolerances but somehow work by magic */ 169 which are outside spec tolerances but somehow work by magic */
155 if (!IS_eDP(intel_encoder) && 170 if (!IS_eDP(intel_encoder) &&
@@ -508,11 +523,37 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
508{ 523{
509 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 524 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
510 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; 525 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
526 struct drm_device *dev = encoder->dev;
527 struct drm_i915_private *dev_priv = dev->dev_private;
511 int lane_count, clock; 528 int lane_count, clock;
512 int max_lane_count = intel_dp_max_lane_count(intel_encoder); 529 int max_lane_count = intel_dp_max_lane_count(intel_encoder);
513 int max_clock = intel_dp_max_link_bw(intel_encoder) == DP_LINK_BW_2_7 ? 1 : 0; 530 int max_clock = intel_dp_max_link_bw(intel_encoder) == DP_LINK_BW_2_7 ? 1 : 0;
514 static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; 531 static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 };
515 532
533 if ((IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) &&
534 dev_priv->panel_fixed_mode) {
535 struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
536
537 adjusted_mode->hdisplay = fixed_mode->hdisplay;
538 adjusted_mode->hsync_start = fixed_mode->hsync_start;
539 adjusted_mode->hsync_end = fixed_mode->hsync_end;
540 adjusted_mode->htotal = fixed_mode->htotal;
541
542 adjusted_mode->vdisplay = fixed_mode->vdisplay;
543 adjusted_mode->vsync_start = fixed_mode->vsync_start;
544 adjusted_mode->vsync_end = fixed_mode->vsync_end;
545 adjusted_mode->vtotal = fixed_mode->vtotal;
546
547 adjusted_mode->clock = fixed_mode->clock;
548 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
549
550 /*
551 * the mode->clock is used to calculate the Data&Link M/N
552 * of the pipe. For the eDP the fixed clock should be used.
553 */
554 mode->clock = dev_priv->panel_fixed_mode->clock;
555 }
556
516 for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { 557 for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
517 for (clock = 0; clock <= max_clock; clock++) { 558 for (clock = 0; clock <= max_clock; clock++) {
518 int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count); 559 int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);
@@ -531,7 +572,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
531 } 572 }
532 } 573 }
533 574
534 if (IS_eDP(intel_encoder)) { 575 if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) {
535 /* okay we failed just pick the highest */ 576 /* okay we failed just pick the highest */
536 dp_priv->lane_count = max_lane_count; 577 dp_priv->lane_count = max_lane_count;
537 dp_priv->link_bw = bws[max_clock]; 578 dp_priv->link_bw = bws[max_clock];
@@ -563,14 +604,14 @@ intel_reduce_ratio(uint32_t *num, uint32_t *den)
563} 604}
564 605
565static void 606static void
566intel_dp_compute_m_n(int bytes_per_pixel, 607intel_dp_compute_m_n(int bpp,
567 int nlanes, 608 int nlanes,
568 int pixel_clock, 609 int pixel_clock,
569 int link_clock, 610 int link_clock,
570 struct intel_dp_m_n *m_n) 611 struct intel_dp_m_n *m_n)
571{ 612{
572 m_n->tu = 64; 613 m_n->tu = 64;
573 m_n->gmch_m = pixel_clock * bytes_per_pixel; 614 m_n->gmch_m = (pixel_clock * bpp) >> 3;
574 m_n->gmch_n = link_clock * nlanes; 615 m_n->gmch_n = link_clock * nlanes;
575 intel_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n); 616 intel_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n);
576 m_n->link_m = pixel_clock; 617 m_n->link_m = pixel_clock;
@@ -578,6 +619,28 @@ intel_dp_compute_m_n(int bytes_per_pixel,
578 intel_reduce_ratio(&m_n->link_m, &m_n->link_n); 619 intel_reduce_ratio(&m_n->link_m, &m_n->link_n);
579} 620}
580 621
622bool intel_pch_has_edp(struct drm_crtc *crtc)
623{
624 struct drm_device *dev = crtc->dev;
625 struct drm_mode_config *mode_config = &dev->mode_config;
626 struct drm_encoder *encoder;
627
628 list_for_each_entry(encoder, &mode_config->encoder_list, head) {
629 struct intel_encoder *intel_encoder;
630 struct intel_dp_priv *dp_priv;
631
632 if (!encoder || encoder->crtc != crtc)
633 continue;
634
635 intel_encoder = enc_to_intel_encoder(encoder);
636 dp_priv = intel_encoder->dev_priv;
637
638 if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT)
639 return dp_priv->is_pch_edp;
640 }
641 return false;
642}
643
581void 644void
582intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, 645intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
583 struct drm_display_mode *adjusted_mode) 646 struct drm_display_mode *adjusted_mode)
@@ -587,7 +650,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
587 struct drm_encoder *encoder; 650 struct drm_encoder *encoder;
588 struct drm_i915_private *dev_priv = dev->dev_private; 651 struct drm_i915_private *dev_priv = dev->dev_private;
589 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 652 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
590 int lane_count = 4; 653 int lane_count = 4, bpp = 24;
591 struct intel_dp_m_n m_n; 654 struct intel_dp_m_n m_n;
592 655
593 /* 656 /*
@@ -605,6 +668,8 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
605 668
606 if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT) { 669 if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT) {
607 lane_count = dp_priv->lane_count; 670 lane_count = dp_priv->lane_count;
671 if (IS_PCH_eDP(dp_priv))
672 bpp = dev_priv->edp_bpp;
608 break; 673 break;
609 } 674 }
610 } 675 }
@@ -614,7 +679,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
614 * the number of bytes_per_pixel post-LUT, which we always 679 * the number of bytes_per_pixel post-LUT, which we always
615 * set up for 8-bits of R/G/B, or 3 bytes total. 680 * set up for 8-bits of R/G/B, or 3 bytes total.
616 */ 681 */
617 intel_dp_compute_m_n(3, lane_count, 682 intel_dp_compute_m_n(bpp, lane_count,
618 mode->clock, adjusted_mode->clock, &m_n); 683 mode->clock, adjusted_mode->clock, &m_n);
619 684
620 if (HAS_PCH_SPLIT(dev)) { 685 if (HAS_PCH_SPLIT(dev)) {
@@ -717,6 +782,51 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
717 } 782 }
718} 783}
719 784
785static void ironlake_edp_panel_on (struct drm_device *dev)
786{
787 struct drm_i915_private *dev_priv = dev->dev_private;
788 unsigned long timeout = jiffies + msecs_to_jiffies(5000);
789 u32 pp, pp_status;
790
791 pp_status = I915_READ(PCH_PP_STATUS);
792 if (pp_status & PP_ON)
793 return;
794
795 pp = I915_READ(PCH_PP_CONTROL);
796 pp |= PANEL_UNLOCK_REGS | POWER_TARGET_ON;
797 I915_WRITE(PCH_PP_CONTROL, pp);
798 do {
799 pp_status = I915_READ(PCH_PP_STATUS);
800 } while (((pp_status & PP_ON) == 0) && !time_after(jiffies, timeout));
801
802 if (time_after(jiffies, timeout))
803 DRM_DEBUG_KMS("panel on wait timed out: 0x%08x\n", pp_status);
804
805 pp &= ~(PANEL_UNLOCK_REGS | EDP_FORCE_VDD);
806 I915_WRITE(PCH_PP_CONTROL, pp);
807}
808
809static void ironlake_edp_panel_off (struct drm_device *dev)
810{
811 struct drm_i915_private *dev_priv = dev->dev_private;
812 unsigned long timeout = jiffies + msecs_to_jiffies(5000);
813 u32 pp, pp_status;
814
815 pp = I915_READ(PCH_PP_CONTROL);
816 pp &= ~POWER_TARGET_ON;
817 I915_WRITE(PCH_PP_CONTROL, pp);
818 do {
819 pp_status = I915_READ(PCH_PP_STATUS);
820 } while ((pp_status & PP_ON) && !time_after(jiffies, timeout));
821
822 if (time_after(jiffies, timeout))
823 DRM_DEBUG_KMS("panel off wait timed out\n");
824
825 /* Make sure VDD is enabled so DP AUX will work */
826 pp |= EDP_FORCE_VDD;
827 I915_WRITE(PCH_PP_CONTROL, pp);
828}
829
720static void ironlake_edp_backlight_on (struct drm_device *dev) 830static void ironlake_edp_backlight_on (struct drm_device *dev)
721{ 831{
722 struct drm_i915_private *dev_priv = dev->dev_private; 832 struct drm_i915_private *dev_priv = dev->dev_private;
@@ -751,14 +861,18 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode)
751 if (mode != DRM_MODE_DPMS_ON) { 861 if (mode != DRM_MODE_DPMS_ON) {
752 if (dp_reg & DP_PORT_EN) { 862 if (dp_reg & DP_PORT_EN) {
753 intel_dp_link_down(intel_encoder, dp_priv->DP); 863 intel_dp_link_down(intel_encoder, dp_priv->DP);
754 if (IS_eDP(intel_encoder)) 864 if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) {
755 ironlake_edp_backlight_off(dev); 865 ironlake_edp_backlight_off(dev);
866 ironlake_edp_panel_off(dev);
867 }
756 } 868 }
757 } else { 869 } else {
758 if (!(dp_reg & DP_PORT_EN)) { 870 if (!(dp_reg & DP_PORT_EN)) {
759 intel_dp_link_train(intel_encoder, dp_priv->DP, dp_priv->link_configuration); 871 intel_dp_link_train(intel_encoder, dp_priv->DP, dp_priv->link_configuration);
760 if (IS_eDP(intel_encoder)) 872 if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) {
873 ironlake_edp_panel_on(dev);
761 ironlake_edp_backlight_on(dev); 874 ironlake_edp_backlight_on(dev);
875 }
762 } 876 }
763 } 877 }
764 dp_priv->dpms_mode = mode; 878 dp_priv->dpms_mode = mode;
@@ -1291,17 +1405,32 @@ static int intel_dp_get_modes(struct drm_connector *connector)
1291 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 1405 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
1292 struct drm_device *dev = intel_encoder->enc.dev; 1406 struct drm_device *dev = intel_encoder->enc.dev;
1293 struct drm_i915_private *dev_priv = dev->dev_private; 1407 struct drm_i915_private *dev_priv = dev->dev_private;
1408 struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
1294 int ret; 1409 int ret;
1295 1410
1296 /* We should parse the EDID data and find out if it has an audio sink 1411 /* We should parse the EDID data and find out if it has an audio sink
1297 */ 1412 */
1298 1413
1299 ret = intel_ddc_get_modes(connector, intel_encoder->ddc_bus); 1414 ret = intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
1300 if (ret) 1415 if (ret) {
1416 if ((IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) &&
1417 !dev_priv->panel_fixed_mode) {
1418 struct drm_display_mode *newmode;
1419 list_for_each_entry(newmode, &connector->probed_modes,
1420 head) {
1421 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1422 dev_priv->panel_fixed_mode =
1423 drm_mode_duplicate(dev, newmode);
1424 break;
1425 }
1426 }
1427 }
1428
1301 return ret; 1429 return ret;
1430 }
1302 1431
1303 /* if eDP has no EDID, try to use fixed panel mode from VBT */ 1432 /* if eDP has no EDID, try to use fixed panel mode from VBT */
1304 if (IS_eDP(intel_encoder)) { 1433 if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) {
1305 if (dev_priv->panel_fixed_mode != NULL) { 1434 if (dev_priv->panel_fixed_mode != NULL) {
1306 struct drm_display_mode *mode; 1435 struct drm_display_mode *mode;
1307 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode); 1436 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
@@ -1386,6 +1515,26 @@ intel_trans_dp_port_sel (struct drm_crtc *crtc)
1386 return -1; 1515 return -1;
1387} 1516}
1388 1517
1518/* check the VBT to see whether the eDP is on DP-D port */
1519bool intel_dpd_is_edp(struct drm_device *dev)
1520{
1521 struct drm_i915_private *dev_priv = dev->dev_private;
1522 struct child_device_config *p_child;
1523 int i;
1524
1525 if (!dev_priv->child_dev_num)
1526 return false;
1527
1528 for (i = 0; i < dev_priv->child_dev_num; i++) {
1529 p_child = dev_priv->child_dev + i;
1530
1531 if (p_child->dvo_port == PORT_IDPD &&
1532 p_child->device_type == DEVICE_TYPE_eDP)
1533 return true;
1534 }
1535 return false;
1536}
1537
1389void 1538void
1390intel_dp_init(struct drm_device *dev, int output_reg) 1539intel_dp_init(struct drm_device *dev, int output_reg)
1391{ 1540{
@@ -1395,6 +1544,7 @@ intel_dp_init(struct drm_device *dev, int output_reg)
1395 struct intel_connector *intel_connector; 1544 struct intel_connector *intel_connector;
1396 struct intel_dp_priv *dp_priv; 1545 struct intel_dp_priv *dp_priv;
1397 const char *name = NULL; 1546 const char *name = NULL;
1547 int type;
1398 1548
1399 intel_encoder = kcalloc(sizeof(struct intel_encoder) + 1549 intel_encoder = kcalloc(sizeof(struct intel_encoder) +
1400 sizeof(struct intel_dp_priv), 1, GFP_KERNEL); 1550 sizeof(struct intel_dp_priv), 1, GFP_KERNEL);
@@ -1409,18 +1559,24 @@ intel_dp_init(struct drm_device *dev, int output_reg)
1409 1559
1410 dp_priv = (struct intel_dp_priv *)(intel_encoder + 1); 1560 dp_priv = (struct intel_dp_priv *)(intel_encoder + 1);
1411 1561
1562 if (HAS_PCH_SPLIT(dev) && (output_reg == PCH_DP_D))
1563 if (intel_dpd_is_edp(dev))
1564 dp_priv->is_pch_edp = true;
1565
1566 if (output_reg == DP_A || IS_PCH_eDP(dp_priv)) {
1567 type = DRM_MODE_CONNECTOR_eDP;
1568 intel_encoder->type = INTEL_OUTPUT_EDP;
1569 } else {
1570 type = DRM_MODE_CONNECTOR_DisplayPort;
1571 intel_encoder->type = INTEL_OUTPUT_DISPLAYPORT;
1572 }
1573
1412 connector = &intel_connector->base; 1574 connector = &intel_connector->base;
1413 drm_connector_init(dev, connector, &intel_dp_connector_funcs, 1575 drm_connector_init(dev, connector, &intel_dp_connector_funcs, type);
1414 DRM_MODE_CONNECTOR_DisplayPort);
1415 drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs); 1576 drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
1416 1577
1417 connector->polled = DRM_CONNECTOR_POLL_HPD; 1578 connector->polled = DRM_CONNECTOR_POLL_HPD;
1418 1579
1419 if (output_reg == DP_A)
1420 intel_encoder->type = INTEL_OUTPUT_EDP;
1421 else
1422 intel_encoder->type = INTEL_OUTPUT_DISPLAYPORT;
1423
1424 if (output_reg == DP_B || output_reg == PCH_DP_B) 1580 if (output_reg == DP_B || output_reg == PCH_DP_B)
1425 intel_encoder->clone_mask = (1 << INTEL_DP_B_CLONE_BIT); 1581 intel_encoder->clone_mask = (1 << INTEL_DP_B_CLONE_BIT);
1426 else if (output_reg == DP_C || output_reg == PCH_DP_C) 1582 else if (output_reg == DP_C || output_reg == PCH_DP_C)
@@ -1479,7 +1635,7 @@ intel_dp_init(struct drm_device *dev, int output_reg)
1479 intel_encoder->ddc_bus = &dp_priv->adapter; 1635 intel_encoder->ddc_bus = &dp_priv->adapter;
1480 intel_encoder->hot_plug = intel_dp_hot_plug; 1636 intel_encoder->hot_plug = intel_dp_hot_plug;
1481 1637
1482 if (output_reg == DP_A) { 1638 if (output_reg == DP_A || IS_PCH_eDP(dp_priv)) {
1483 /* initialize panel mode from VBT if available for eDP */ 1639 /* initialize panel mode from VBT if available for eDP */
1484 if (dev_priv->lfp_lvds_vbt_mode) { 1640 if (dev_priv->lfp_lvds_vbt_mode) {
1485 dev_priv->panel_fixed_mode = 1641 dev_priv->panel_fixed_mode =
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 72206f37c4fb..b2190148703a 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -143,8 +143,6 @@ struct intel_crtc {
143 struct drm_crtc base; 143 struct drm_crtc base;
144 enum pipe pipe; 144 enum pipe pipe;
145 enum plane plane; 145 enum plane plane;
146 struct drm_gem_object *cursor_bo;
147 uint32_t cursor_addr;
148 u8 lut_r[256], lut_g[256], lut_b[256]; 146 u8 lut_r[256], lut_g[256], lut_b[256];
149 int dpms_mode; 147 int dpms_mode;
150 bool busy; /* is scanout buffer being updated frequently? */ 148 bool busy; /* is scanout buffer being updated frequently? */
@@ -153,6 +151,12 @@ struct intel_crtc {
153 struct intel_overlay *overlay; 151 struct intel_overlay *overlay;
154 struct intel_unpin_work *unpin_work; 152 struct intel_unpin_work *unpin_work;
155 int fdi_lanes; 153 int fdi_lanes;
154
155 struct drm_gem_object *cursor_bo;
156 uint32_t cursor_addr;
157 int16_t cursor_x, cursor_y;
158 int16_t cursor_width, cursor_height;
159 bool cursor_visble;
156}; 160};
157 161
158#define to_intel_crtc(x) container_of(x, struct intel_crtc, base) 162#define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
@@ -179,6 +183,8 @@ extern void intel_dp_init(struct drm_device *dev, int dp_reg);
179void 183void
180intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, 184intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
181 struct drm_display_mode *adjusted_mode); 185 struct drm_display_mode *adjusted_mode);
186extern bool intel_pch_has_edp(struct drm_crtc *crtc);
187extern bool intel_dpd_is_edp(struct drm_device *dev);
182extern void intel_edp_link_config (struct intel_encoder *, int *, int *); 188extern void intel_edp_link_config (struct intel_encoder *, int *, int *);
183 189
184 190
@@ -215,6 +221,9 @@ extern void intel_init_clock_gating(struct drm_device *dev);
215extern void ironlake_enable_drps(struct drm_device *dev); 221extern void ironlake_enable_drps(struct drm_device *dev);
216extern void ironlake_disable_drps(struct drm_device *dev); 222extern void ironlake_disable_drps(struct drm_device *dev);
217 223
224extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
225 struct drm_gem_object *obj);
226
218extern int intel_framebuffer_init(struct drm_device *dev, 227extern int intel_framebuffer_init(struct drm_device *dev,
219 struct intel_framebuffer *ifb, 228 struct intel_framebuffer *ifb,
220 struct drm_mode_fb_cmd *mode_cmd, 229 struct drm_mode_fb_cmd *mode_cmd,
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
index c3c505244e07..54acd8b534df 100644
--- a/drivers/gpu/drm/i915/intel_fb.c
+++ b/drivers/gpu/drm/i915/intel_fb.c
@@ -61,6 +61,8 @@ static struct fb_ops intelfb_ops = {
61 .fb_pan_display = drm_fb_helper_pan_display, 61 .fb_pan_display = drm_fb_helper_pan_display,
62 .fb_blank = drm_fb_helper_blank, 62 .fb_blank = drm_fb_helper_blank,
63 .fb_setcmap = drm_fb_helper_setcmap, 63 .fb_setcmap = drm_fb_helper_setcmap,
64 .fb_debug_enter = drm_fb_helper_debug_enter,
65 .fb_debug_leave = drm_fb_helper_debug_leave,
64}; 66};
65 67
66static int intelfb_create(struct intel_fbdev *ifbdev, 68static int intelfb_create(struct intel_fbdev *ifbdev,
@@ -98,7 +100,7 @@ static int intelfb_create(struct intel_fbdev *ifbdev,
98 100
99 mutex_lock(&dev->struct_mutex); 101 mutex_lock(&dev->struct_mutex);
100 102
101 ret = i915_gem_object_pin(fbo, 64*1024); 103 ret = intel_pin_and_fence_fb_obj(dev, fbo);
102 if (ret) { 104 if (ret) {
103 DRM_ERROR("failed to pin fb: %d\n", ret); 105 DRM_ERROR("failed to pin fb: %d\n", ret);
104 goto out_unref; 106 goto out_unref;
@@ -236,7 +238,7 @@ int intel_fbdev_destroy(struct drm_device *dev,
236 238
237 drm_framebuffer_cleanup(&ifb->base); 239 drm_framebuffer_cleanup(&ifb->base);
238 if (ifb->obj) 240 if (ifb->obj)
239 drm_gem_object_unreference_unlocked(ifb->obj); 241 drm_gem_object_unreference(ifb->obj);
240 242
241 return 0; 243 return 0;
242} 244}
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 83bd764b000e..197887ed1823 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -54,10 +54,11 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder,
54 struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv; 54 struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
55 u32 sdvox; 55 u32 sdvox;
56 56
57 sdvox = SDVO_ENCODING_HDMI | 57 sdvox = SDVO_ENCODING_HDMI | SDVO_BORDER_ENABLE;
58 SDVO_BORDER_ENABLE | 58 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
59 SDVO_VSYNC_ACTIVE_HIGH | 59 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
60 SDVO_HSYNC_ACTIVE_HIGH; 60 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
61 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
61 62
62 if (hdmi_priv->has_hdmi_sink) { 63 if (hdmi_priv->has_hdmi_sink) {
63 sdvox |= SDVO_AUDIO_ENABLE; 64 sdvox |= SDVO_AUDIO_ENABLE;
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 31df55f0a0a7..0a2e60059fb3 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -156,31 +156,73 @@ static int intel_lvds_mode_valid(struct drm_connector *connector,
156 return MODE_OK; 156 return MODE_OK;
157} 157}
158 158
159static void
160centre_horizontally(struct drm_display_mode *mode,
161 int width)
162{
163 u32 border, sync_pos, blank_width, sync_width;
164
165 /* keep the hsync and hblank widths constant */
166 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
167 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
168 sync_pos = (blank_width - sync_width + 1) / 2;
169
170 border = (mode->hdisplay - width + 1) / 2;
171 border += border & 1; /* make the border even */
172
173 mode->crtc_hdisplay = width;
174 mode->crtc_hblank_start = width + border;
175 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
176
177 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
178 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
179}
180
181static void
182centre_vertically(struct drm_display_mode *mode,
183 int height)
184{
185 u32 border, sync_pos, blank_width, sync_width;
186
187 /* keep the vsync and vblank widths constant */
188 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
189 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
190 sync_pos = (blank_width - sync_width + 1) / 2;
191
192 border = (mode->vdisplay - height + 1) / 2;
193
194 mode->crtc_vdisplay = height;
195 mode->crtc_vblank_start = height + border;
196 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
197
198 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
199 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
200}
201
202static inline u32 panel_fitter_scaling(u32 source, u32 target)
203{
204 /*
205 * Floating point operation is not supported. So the FACTOR
206 * is defined, which can avoid the floating point computation
207 * when calculating the panel ratio.
208 */
209#define ACCURACY 12
210#define FACTOR (1 << ACCURACY)
211 u32 ratio = source * FACTOR / target;
212 return (FACTOR * ratio + FACTOR/2) / FACTOR;
213}
214
159static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, 215static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
160 struct drm_display_mode *mode, 216 struct drm_display_mode *mode,
161 struct drm_display_mode *adjusted_mode) 217 struct drm_display_mode *adjusted_mode)
162{ 218{
163 /*
164 * float point operation is not supported . So the PANEL_RATIO_FACTOR
165 * is defined, which can avoid the float point computation when
166 * calculating the panel ratio.
167 */
168#define PANEL_RATIO_FACTOR 8192
169 struct drm_device *dev = encoder->dev; 219 struct drm_device *dev = encoder->dev;
170 struct drm_i915_private *dev_priv = dev->dev_private; 220 struct drm_i915_private *dev_priv = dev->dev_private;
171 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); 221 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
172 struct drm_encoder *tmp_encoder; 222 struct drm_encoder *tmp_encoder;
173 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); 223 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
174 struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv; 224 struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
175 u32 pfit_control = 0, pfit_pgm_ratios = 0; 225 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
176 int left_border = 0, right_border = 0, top_border = 0;
177 int bottom_border = 0;
178 bool border = 0;
179 int panel_ratio, desired_ratio, vert_scale, horiz_scale;
180 int horiz_ratio, vert_ratio;
181 u32 hsync_width, vsync_width;
182 u32 hblank_width, vblank_width;
183 u32 hsync_pos, vsync_pos;
184 226
185 /* Should never happen!! */ 227 /* Should never happen!! */
186 if (!IS_I965G(dev) && intel_crtc->pipe == 0) { 228 if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
@@ -200,27 +242,25 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
200 if (dev_priv->panel_fixed_mode == NULL) 242 if (dev_priv->panel_fixed_mode == NULL)
201 return true; 243 return true;
202 /* 244 /*
203 * If we have timings from the BIOS for the panel, put them in 245 * We have timings from the BIOS for the panel, put them in
204 * to the adjusted mode. The CRTC will be set up for this mode, 246 * to the adjusted mode. The CRTC will be set up for this mode,
205 * with the panel scaling set up to source from the H/VDisplay 247 * with the panel scaling set up to source from the H/VDisplay
206 * of the original mode. 248 * of the original mode.
207 */ 249 */
208 if (dev_priv->panel_fixed_mode != NULL) { 250 adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
209 adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay; 251 adjusted_mode->hsync_start =
210 adjusted_mode->hsync_start = 252 dev_priv->panel_fixed_mode->hsync_start;
211 dev_priv->panel_fixed_mode->hsync_start; 253 adjusted_mode->hsync_end =
212 adjusted_mode->hsync_end = 254 dev_priv->panel_fixed_mode->hsync_end;
213 dev_priv->panel_fixed_mode->hsync_end; 255 adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
214 adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal; 256 adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
215 adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay; 257 adjusted_mode->vsync_start =
216 adjusted_mode->vsync_start = 258 dev_priv->panel_fixed_mode->vsync_start;
217 dev_priv->panel_fixed_mode->vsync_start; 259 adjusted_mode->vsync_end =
218 adjusted_mode->vsync_end = 260 dev_priv->panel_fixed_mode->vsync_end;
219 dev_priv->panel_fixed_mode->vsync_end; 261 adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
220 adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal; 262 adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
221 adjusted_mode->clock = dev_priv->panel_fixed_mode->clock; 263 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
222 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
223 }
224 264
225 /* Make sure pre-965s set dither correctly */ 265 /* Make sure pre-965s set dither correctly */
226 if (!IS_I965G(dev)) { 266 if (!IS_I965G(dev)) {
@@ -230,11 +270,8 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
230 270
231 /* Native modes don't need fitting */ 271 /* Native modes don't need fitting */
232 if (adjusted_mode->hdisplay == mode->hdisplay && 272 if (adjusted_mode->hdisplay == mode->hdisplay &&
233 adjusted_mode->vdisplay == mode->vdisplay) { 273 adjusted_mode->vdisplay == mode->vdisplay)
234 pfit_pgm_ratios = 0;
235 border = 0;
236 goto out; 274 goto out;
237 }
238 275
239 /* full screen scale for now */ 276 /* full screen scale for now */
240 if (HAS_PCH_SPLIT(dev)) 277 if (HAS_PCH_SPLIT(dev))
@@ -242,25 +279,9 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
242 279
243 /* 965+ wants fuzzy fitting */ 280 /* 965+ wants fuzzy fitting */
244 if (IS_I965G(dev)) 281 if (IS_I965G(dev))
245 pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) | 282 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
246 PFIT_FILTER_FUZZY; 283 PFIT_FILTER_FUZZY);
247 284
248 hsync_width = adjusted_mode->crtc_hsync_end -
249 adjusted_mode->crtc_hsync_start;
250 vsync_width = adjusted_mode->crtc_vsync_end -
251 adjusted_mode->crtc_vsync_start;
252 hblank_width = adjusted_mode->crtc_hblank_end -
253 adjusted_mode->crtc_hblank_start;
254 vblank_width = adjusted_mode->crtc_vblank_end -
255 adjusted_mode->crtc_vblank_start;
256 /*
257 * Deal with panel fitting options. Figure out how to stretch the
258 * image based on its aspect ratio & the current panel fitting mode.
259 */
260 panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
261 adjusted_mode->vdisplay;
262 desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
263 mode->vdisplay;
264 /* 285 /*
265 * Enable automatic panel scaling for non-native modes so that they fill 286 * Enable automatic panel scaling for non-native modes so that they fill
266 * the screen. Should be enabled before the pipe is enabled, according 287 * the screen. Should be enabled before the pipe is enabled, according
@@ -278,170 +299,63 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
278 * For centered modes, we have to calculate border widths & 299 * For centered modes, we have to calculate border widths &
279 * heights and modify the values programmed into the CRTC. 300 * heights and modify the values programmed into the CRTC.
280 */ 301 */
281 left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2; 302 centre_horizontally(adjusted_mode, mode->hdisplay);
282 right_border = left_border; 303 centre_vertically(adjusted_mode, mode->vdisplay);
283 if (mode->hdisplay & 1) 304 border = LVDS_BORDER_ENABLE;
284 right_border++;
285 top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
286 bottom_border = top_border;
287 if (mode->vdisplay & 1)
288 bottom_border++;
289 /* Set active & border values */
290 adjusted_mode->crtc_hdisplay = mode->hdisplay;
291 /* Keep the boder be even */
292 if (right_border & 1)
293 right_border++;
294 /* use the border directly instead of border minuse one */
295 adjusted_mode->crtc_hblank_start = mode->hdisplay +
296 right_border;
297 /* keep the blank width constant */
298 adjusted_mode->crtc_hblank_end =
299 adjusted_mode->crtc_hblank_start + hblank_width;
300 /* get the hsync pos relative to hblank start */
301 hsync_pos = (hblank_width - hsync_width) / 2;
302 /* keep the hsync pos be even */
303 if (hsync_pos & 1)
304 hsync_pos++;
305 adjusted_mode->crtc_hsync_start =
306 adjusted_mode->crtc_hblank_start + hsync_pos;
307 /* keep the hsync width constant */
308 adjusted_mode->crtc_hsync_end =
309 adjusted_mode->crtc_hsync_start + hsync_width;
310 adjusted_mode->crtc_vdisplay = mode->vdisplay;
311 /* use the border instead of border minus one */
312 adjusted_mode->crtc_vblank_start = mode->vdisplay +
313 bottom_border;
314 /* keep the vblank width constant */
315 adjusted_mode->crtc_vblank_end =
316 adjusted_mode->crtc_vblank_start + vblank_width;
317 /* get the vsync start postion relative to vblank start */
318 vsync_pos = (vblank_width - vsync_width) / 2;
319 adjusted_mode->crtc_vsync_start =
320 adjusted_mode->crtc_vblank_start + vsync_pos;
321 /* keep the vsync width constant */
322 adjusted_mode->crtc_vsync_end =
323 adjusted_mode->crtc_vsync_start + vsync_width;
324 border = 1;
325 break; 305 break;
306
326 case DRM_MODE_SCALE_ASPECT: 307 case DRM_MODE_SCALE_ASPECT:
327 /* Scale but preserve the spect ratio */ 308 /* Scale but preserve the aspect ratio */
328 pfit_control |= PFIT_ENABLE;
329 if (IS_I965G(dev)) { 309 if (IS_I965G(dev)) {
310 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
311 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
312
313 pfit_control |= PFIT_ENABLE;
330 /* 965+ is easy, it does everything in hw */ 314 /* 965+ is easy, it does everything in hw */
331 if (panel_ratio > desired_ratio) 315 if (scaled_width > scaled_height)
332 pfit_control |= PFIT_SCALING_PILLAR; 316 pfit_control |= PFIT_SCALING_PILLAR;
333 else if (panel_ratio < desired_ratio) 317 else if (scaled_width < scaled_height)
334 pfit_control |= PFIT_SCALING_LETTER; 318 pfit_control |= PFIT_SCALING_LETTER;
335 else 319 else
336 pfit_control |= PFIT_SCALING_AUTO; 320 pfit_control |= PFIT_SCALING_AUTO;
337 } else { 321 } else {
322 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
323 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
338 /* 324 /*
339 * For earlier chips we have to calculate the scaling 325 * For earlier chips we have to calculate the scaling
340 * ratio by hand and program it into the 326 * ratio by hand and program it into the
341 * PFIT_PGM_RATIO register 327 * PFIT_PGM_RATIO register
342 */ 328 */
343 u32 horiz_bits, vert_bits, bits = 12; 329 if (scaled_width > scaled_height) { /* pillar */
344 horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/ 330 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
345 adjusted_mode->hdisplay; 331
346 vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/ 332 border = LVDS_BORDER_ENABLE;
347 adjusted_mode->vdisplay; 333 if (mode->vdisplay != adjusted_mode->vdisplay) {
348 horiz_scale = adjusted_mode->hdisplay * 334 u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
349 PANEL_RATIO_FACTOR / mode->hdisplay; 335 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
350 vert_scale = adjusted_mode->vdisplay * 336 bits << PFIT_VERT_SCALE_SHIFT);
351 PANEL_RATIO_FACTOR / mode->vdisplay; 337 pfit_control |= (PFIT_ENABLE |
352 338 VERT_INTERP_BILINEAR |
353 /* retain aspect ratio */ 339 HORIZ_INTERP_BILINEAR);
354 if (panel_ratio > desired_ratio) { /* Pillar */ 340 }
355 u32 scaled_width; 341 } else if (scaled_width < scaled_height) { /* letter */
356 scaled_width = mode->hdisplay * vert_scale / 342 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
357 PANEL_RATIO_FACTOR; 343
358 horiz_ratio = vert_ratio; 344 border = LVDS_BORDER_ENABLE;
359 pfit_control |= (VERT_AUTO_SCALE | 345 if (mode->hdisplay != adjusted_mode->hdisplay) {
360 VERT_INTERP_BILINEAR | 346 u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
361 HORIZ_INTERP_BILINEAR); 347 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
362 /* Pillar will have left/right borders */ 348 bits << PFIT_VERT_SCALE_SHIFT);
363 left_border = (adjusted_mode->hdisplay - 349 pfit_control |= (PFIT_ENABLE |
364 scaled_width) / 2; 350 VERT_INTERP_BILINEAR |
365 right_border = left_border; 351 HORIZ_INTERP_BILINEAR);
366 if (mode->hdisplay & 1) /* odd resolutions */ 352 }
367 right_border++; 353 } else
368 /* keep the border be even */ 354 /* Aspects match, Let hw scale both directions */
369 if (right_border & 1) 355 pfit_control |= (PFIT_ENABLE |
370 right_border++; 356 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
371 adjusted_mode->crtc_hdisplay = scaled_width;
372 /* use border instead of border minus one */
373 adjusted_mode->crtc_hblank_start =
374 scaled_width + right_border;
375 /* keep the hblank width constant */
376 adjusted_mode->crtc_hblank_end =
377 adjusted_mode->crtc_hblank_start +
378 hblank_width;
379 /*
380 * get the hsync start pos relative to
381 * hblank start
382 */
383 hsync_pos = (hblank_width - hsync_width) / 2;
384 /* keep the hsync_pos be even */
385 if (hsync_pos & 1)
386 hsync_pos++;
387 adjusted_mode->crtc_hsync_start =
388 adjusted_mode->crtc_hblank_start +
389 hsync_pos;
390 /* keept hsync width constant */
391 adjusted_mode->crtc_hsync_end =
392 adjusted_mode->crtc_hsync_start +
393 hsync_width;
394 border = 1;
395 } else if (panel_ratio < desired_ratio) { /* letter */
396 u32 scaled_height = mode->vdisplay *
397 horiz_scale / PANEL_RATIO_FACTOR;
398 vert_ratio = horiz_ratio;
399 pfit_control |= (HORIZ_AUTO_SCALE |
400 VERT_INTERP_BILINEAR |
401 HORIZ_INTERP_BILINEAR);
402 /* Letterbox will have top/bottom border */
403 top_border = (adjusted_mode->vdisplay -
404 scaled_height) / 2;
405 bottom_border = top_border;
406 if (mode->vdisplay & 1)
407 bottom_border++;
408 adjusted_mode->crtc_vdisplay = scaled_height;
409 /* use border instead of border minus one */
410 adjusted_mode->crtc_vblank_start =
411 scaled_height + bottom_border;
412 /* keep the vblank width constant */
413 adjusted_mode->crtc_vblank_end =
414 adjusted_mode->crtc_vblank_start +
415 vblank_width;
416 /*
417 * get the vsync start pos relative to
418 * vblank start
419 */
420 vsync_pos = (vblank_width - vsync_width) / 2;
421 adjusted_mode->crtc_vsync_start =
422 adjusted_mode->crtc_vblank_start +
423 vsync_pos;
424 /* keep the vsync width constant */
425 adjusted_mode->crtc_vsync_end =
426 adjusted_mode->crtc_vsync_start +
427 vsync_width;
428 border = 1;
429 } else {
430 /* Aspects match, Let hw scale both directions */
431 pfit_control |= (VERT_AUTO_SCALE |
432 HORIZ_AUTO_SCALE |
433 VERT_INTERP_BILINEAR | 357 VERT_INTERP_BILINEAR |
434 HORIZ_INTERP_BILINEAR); 358 HORIZ_INTERP_BILINEAR);
435 }
436 horiz_bits = (1 << bits) * horiz_ratio /
437 PANEL_RATIO_FACTOR;
438 vert_bits = (1 << bits) * vert_ratio /
439 PANEL_RATIO_FACTOR;
440 pfit_pgm_ratios =
441 ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
442 PFIT_VERT_SCALE_MASK) |
443 ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
444 PFIT_HORIZ_SCALE_MASK);
445 } 359 }
446 break; 360 break;
447 361
@@ -458,6 +372,7 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
458 VERT_INTERP_BILINEAR | 372 VERT_INTERP_BILINEAR |
459 HORIZ_INTERP_BILINEAR); 373 HORIZ_INTERP_BILINEAR);
460 break; 374 break;
375
461 default: 376 default:
462 break; 377 break;
463 } 378 }
@@ -465,14 +380,8 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
465out: 380out:
466 lvds_priv->pfit_control = pfit_control; 381 lvds_priv->pfit_control = pfit_control;
467 lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios; 382 lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
468 /* 383 dev_priv->lvds_border_bits = border;
469 * When there exists the border, it means that the LVDS_BORDR 384
470 * should be enabled.
471 */
472 if (border)
473 dev_priv->lvds_border_bits |= LVDS_BORDER_ENABLE;
474 else
475 dev_priv->lvds_border_bits &= ~(LVDS_BORDER_ENABLE);
476 /* 385 /*
477 * XXX: It would be nice to support lower refresh rates on the 386 * XXX: It would be nice to support lower refresh rates on the
478 * panels to reduce power consumption, and perhaps match the 387 * panels to reduce power consumption, and perhaps match the
@@ -599,6 +508,26 @@ static int intel_lvds_get_modes(struct drm_connector *connector)
599 return 0; 508 return 0;
600} 509}
601 510
511static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
512{
513 DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
514 return 1;
515}
516
517/* The GPU hangs up on these systems if modeset is performed on LID open */
518static const struct dmi_system_id intel_no_modeset_on_lid[] = {
519 {
520 .callback = intel_no_modeset_on_lid_dmi_callback,
521 .ident = "Toshiba Tecra A11",
522 .matches = {
523 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
524 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
525 },
526 },
527
528 { } /* terminating entry */
529};
530
602/* 531/*
603 * Lid events. Note the use of 'modeset_on_lid': 532 * Lid events. Note the use of 'modeset_on_lid':
604 * - we set it on lid close, and reset it on open 533 * - we set it on lid close, and reset it on open
@@ -622,6 +551,9 @@ static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
622 */ 551 */
623 if (connector) 552 if (connector)
624 connector->status = connector->funcs->detect(connector); 553 connector->status = connector->funcs->detect(connector);
554 /* Don't force modeset on machines where it causes a GPU lockup */
555 if (dmi_check_system(intel_no_modeset_on_lid))
556 return NOTIFY_OK;
625 if (!acpi_lid_open()) { 557 if (!acpi_lid_open()) {
626 dev_priv->modeset_on_lid = 1; 558 dev_priv->modeset_on_lid = 1;
627 return NOTIFY_OK; 559 return NOTIFY_OK;
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index d7ad5139d17c..d39aea24eabe 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -65,7 +65,7 @@
65#define OCMD_YUV_410_PLANAR (0xe<<10) /* also 411 */ 65#define OCMD_YUV_410_PLANAR (0xe<<10) /* also 411 */
66#define OCMD_TVSYNCFLIP_PARITY (0x1<<9) 66#define OCMD_TVSYNCFLIP_PARITY (0x1<<9)
67#define OCMD_TVSYNCFLIP_ENABLE (0x1<<7) 67#define OCMD_TVSYNCFLIP_ENABLE (0x1<<7)
68#define OCMD_BUF_TYPE_MASK (Ox1<<5) 68#define OCMD_BUF_TYPE_MASK (0x1<<5)
69#define OCMD_BUF_TYPE_FRAME (0x0<<5) 69#define OCMD_BUF_TYPE_FRAME (0x0<<5)
70#define OCMD_BUF_TYPE_FIELD (0x1<<5) 70#define OCMD_BUF_TYPE_FIELD (0x1<<5)
71#define OCMD_TEST_MODE (0x1<<4) 71#define OCMD_TEST_MODE (0x1<<4)
@@ -185,7 +185,8 @@ static struct overlay_registers *intel_overlay_map_regs_atomic(struct intel_over
185 185
186 if (OVERLAY_NONPHYSICAL(overlay->dev)) { 186 if (OVERLAY_NONPHYSICAL(overlay->dev)) {
187 regs = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping, 187 regs = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
188 overlay->reg_bo->gtt_offset); 188 overlay->reg_bo->gtt_offset,
189 KM_USER0);
189 190
190 if (!regs) { 191 if (!regs) {
191 DRM_ERROR("failed to map overlay regs in GTT\n"); 192 DRM_ERROR("failed to map overlay regs in GTT\n");
@@ -200,7 +201,7 @@ static struct overlay_registers *intel_overlay_map_regs_atomic(struct intel_over
200static void intel_overlay_unmap_regs_atomic(struct intel_overlay *overlay) 201static void intel_overlay_unmap_regs_atomic(struct intel_overlay *overlay)
201{ 202{
202 if (OVERLAY_NONPHYSICAL(overlay->dev)) 203 if (OVERLAY_NONPHYSICAL(overlay->dev))
203 io_mapping_unmap_atomic(overlay->virt_addr); 204 io_mapping_unmap_atomic(overlay->virt_addr, KM_USER0);
204 205
205 overlay->virt_addr = NULL; 206 overlay->virt_addr = NULL;
206 207
@@ -958,7 +959,7 @@ static int check_overlay_src(struct drm_device *dev,
958 || rec->src_width < N_HORIZ_Y_TAPS*4) 959 || rec->src_width < N_HORIZ_Y_TAPS*4)
959 return -EINVAL; 960 return -EINVAL;
960 961
961 /* check alingment constrains */ 962 /* check alignment constraints */
962 switch (rec->flags & I915_OVERLAY_TYPE_MASK) { 963 switch (rec->flags & I915_OVERLAY_TYPE_MASK) {
963 case I915_OVERLAY_RGB: 964 case I915_OVERLAY_RGB:
964 /* not implemented */ 965 /* not implemented */
@@ -990,7 +991,10 @@ static int check_overlay_src(struct drm_device *dev,
990 return -EINVAL; 991 return -EINVAL;
991 992
992 /* stride checking */ 993 /* stride checking */
993 stride_mask = 63; 994 if (IS_I830(dev) || IS_845G(dev))
995 stride_mask = 255;
996 else
997 stride_mask = 63;
994 998
995 if (rec->stride_Y & stride_mask || rec->stride_UV & stride_mask) 999 if (rec->stride_Y & stride_mask || rec->stride_UV & stride_mask)
996 return -EINVAL; 1000 return -EINVAL;
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 76993ac16cc1..d9d4d51aa89e 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -392,13 +392,13 @@ static void intel_sdvo_debug_write(struct intel_encoder *intel_encoder, u8 cmd,
392 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]); 392 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
393 for (; i < 8; i++) 393 for (; i < 8; i++)
394 DRM_LOG_KMS(" "); 394 DRM_LOG_KMS(" ");
395 for (i = 0; i < sizeof(sdvo_cmd_names) / sizeof(sdvo_cmd_names[0]); i++) { 395 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
396 if (cmd == sdvo_cmd_names[i].cmd) { 396 if (cmd == sdvo_cmd_names[i].cmd) {
397 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name); 397 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
398 break; 398 break;
399 } 399 }
400 } 400 }
401 if (i == sizeof(sdvo_cmd_names)/ sizeof(sdvo_cmd_names[0])) 401 if (i == ARRAY_SIZE(sdvo_cmd_names))
402 DRM_LOG_KMS("(%02X)", cmd); 402 DRM_LOG_KMS("(%02X)", cmd);
403 DRM_LOG_KMS("\n"); 403 DRM_LOG_KMS("\n");
404} 404}
@@ -1237,9 +1237,11 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1237 1237
1238 /* Set the SDVO control regs. */ 1238 /* Set the SDVO control regs. */
1239 if (IS_I965G(dev)) { 1239 if (IS_I965G(dev)) {
1240 sdvox |= SDVO_BORDER_ENABLE | 1240 sdvox |= SDVO_BORDER_ENABLE;
1241 SDVO_VSYNC_ACTIVE_HIGH | 1241 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1242 SDVO_HSYNC_ACTIVE_HIGH; 1242 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1243 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1244 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
1243 } else { 1245 } else {
1244 sdvox |= I915_READ(sdvo_priv->sdvo_reg); 1246 sdvox |= I915_READ(sdvo_priv->sdvo_reg);
1245 switch (sdvo_priv->sdvo_reg) { 1247 switch (sdvo_priv->sdvo_reg) {
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 6d553c29d106..cc3726a4a1cb 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -476,7 +476,7 @@ static const struct tv_mode tv_modes[] = {
476 .vi_end_f1 = 20, .vi_end_f2 = 21, 476 .vi_end_f1 = 20, .vi_end_f2 = 21,
477 .nbr_end = 240, 477 .nbr_end = 240,
478 478
479 .burst_ena = 8, 479 .burst_ena = true,
480 .hburst_start = 72, .hburst_len = 34, 480 .hburst_start = 72, .hburst_len = 34,
481 .vburst_start_f1 = 9, .vburst_end_f1 = 240, 481 .vburst_start_f1 = 9, .vburst_end_f1 = 240,
482 .vburst_start_f2 = 10, .vburst_end_f2 = 240, 482 .vburst_start_f2 = 10, .vburst_end_f2 = 240,
@@ -896,8 +896,6 @@ static const struct tv_mode tv_modes[] = {
896 }, 896 },
897}; 897};
898 898
899#define NUM_TV_MODES sizeof(tv_modes) / sizeof (tv_modes[0])
900
901static void 899static void
902intel_tv_dpms(struct drm_encoder *encoder, int mode) 900intel_tv_dpms(struct drm_encoder *encoder, int mode)
903{ 901{
@@ -1424,7 +1422,7 @@ intel_tv_get_modes(struct drm_connector *connector)
1424 int j, count = 0; 1422 int j, count = 0;
1425 u64 tmp; 1423 u64 tmp;
1426 1424
1427 for (j = 0; j < sizeof(input_res_table) / sizeof(input_res_table[0]); 1425 for (j = 0; j < ARRAY_SIZE(input_res_table);
1428 j++) { 1426 j++) {
1429 struct input_res *input = &input_res_table[j]; 1427 struct input_res *input = &input_res_table[j];
1430 unsigned int hactive_s = input->w; 1428 unsigned int hactive_s = input->w;
@@ -1512,7 +1510,7 @@ intel_tv_set_property(struct drm_connector *connector, struct drm_property *prop
1512 tv_priv->margin[TV_MARGIN_BOTTOM] = val; 1510 tv_priv->margin[TV_MARGIN_BOTTOM] = val;
1513 changed = true; 1511 changed = true;
1514 } else if (property == dev->mode_config.tv_mode_property) { 1512 } else if (property == dev->mode_config.tv_mode_property) {
1515 if (val >= NUM_TV_MODES) { 1513 if (val >= ARRAY_SIZE(tv_modes)) {
1516 ret = -EINVAL; 1514 ret = -EINVAL;
1517 goto out; 1515 goto out;
1518 } 1516 }
@@ -1693,13 +1691,13 @@ intel_tv_init(struct drm_device *dev)
1693 connector->doublescan_allowed = false; 1691 connector->doublescan_allowed = false;
1694 1692
1695 /* Create TV properties then attach current values */ 1693 /* Create TV properties then attach current values */
1696 tv_format_names = kmalloc(sizeof(char *) * NUM_TV_MODES, 1694 tv_format_names = kmalloc(sizeof(char *) * ARRAY_SIZE(tv_modes),
1697 GFP_KERNEL); 1695 GFP_KERNEL);
1698 if (!tv_format_names) 1696 if (!tv_format_names)
1699 goto out; 1697 goto out;
1700 for (i = 0; i < NUM_TV_MODES; i++) 1698 for (i = 0; i < ARRAY_SIZE(tv_modes); i++)
1701 tv_format_names[i] = tv_modes[i].name; 1699 tv_format_names[i] = tv_modes[i].name;
1702 drm_mode_create_tv_properties(dev, NUM_TV_MODES, tv_format_names); 1700 drm_mode_create_tv_properties(dev, ARRAY_SIZE(tv_modes), tv_format_names);
1703 1701
1704 drm_connector_attach_property(connector, dev->mode_config.tv_mode_property, 1702 drm_connector_attach_property(connector, dev->mode_config.tv_mode_property,
1705 initial_mode); 1703 initial_mode);
diff --git a/drivers/gpu/drm/mga/mga_dma.c b/drivers/gpu/drm/mga/mga_dma.c
index 3c917fb3a60b..08868ac3048a 100644
--- a/drivers/gpu/drm/mga/mga_dma.c
+++ b/drivers/gpu/drm/mga/mga_dma.c
@@ -52,7 +52,7 @@ static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup);
52 * Engine control 52 * Engine control
53 */ 53 */
54 54
55int mga_do_wait_for_idle(drm_mga_private_t * dev_priv) 55int mga_do_wait_for_idle(drm_mga_private_t *dev_priv)
56{ 56{
57 u32 status = 0; 57 u32 status = 0;
58 int i; 58 int i;
@@ -74,7 +74,7 @@ int mga_do_wait_for_idle(drm_mga_private_t * dev_priv)
74 return -EBUSY; 74 return -EBUSY;
75} 75}
76 76
77static int mga_do_dma_reset(drm_mga_private_t * dev_priv) 77static int mga_do_dma_reset(drm_mga_private_t *dev_priv)
78{ 78{
79 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 79 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
80 drm_mga_primary_buffer_t *primary = &dev_priv->prim; 80 drm_mga_primary_buffer_t *primary = &dev_priv->prim;
@@ -102,7 +102,7 @@ static int mga_do_dma_reset(drm_mga_private_t * dev_priv)
102 * Primary DMA stream 102 * Primary DMA stream
103 */ 103 */
104 104
105void mga_do_dma_flush(drm_mga_private_t * dev_priv) 105void mga_do_dma_flush(drm_mga_private_t *dev_priv)
106{ 106{
107 drm_mga_primary_buffer_t *primary = &dev_priv->prim; 107 drm_mga_primary_buffer_t *primary = &dev_priv->prim;
108 u32 head, tail; 108 u32 head, tail;
@@ -142,11 +142,10 @@ void mga_do_dma_flush(drm_mga_private_t * dev_priv)
142 142
143 head = MGA_READ(MGA_PRIMADDRESS); 143 head = MGA_READ(MGA_PRIMADDRESS);
144 144
145 if (head <= tail) { 145 if (head <= tail)
146 primary->space = primary->size - primary->tail; 146 primary->space = primary->size - primary->tail;
147 } else { 147 else
148 primary->space = head - tail; 148 primary->space = head - tail;
149 }
150 149
151 DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset)); 150 DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset));
152 DRM_DEBUG(" tail = 0x%06lx\n", (unsigned long)(tail - dev_priv->primary->offset)); 151 DRM_DEBUG(" tail = 0x%06lx\n", (unsigned long)(tail - dev_priv->primary->offset));
@@ -158,7 +157,7 @@ void mga_do_dma_flush(drm_mga_private_t * dev_priv)
158 DRM_DEBUG("done.\n"); 157 DRM_DEBUG("done.\n");
159} 158}
160 159
161void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv) 160void mga_do_dma_wrap_start(drm_mga_private_t *dev_priv)
162{ 161{
163 drm_mga_primary_buffer_t *primary = &dev_priv->prim; 162 drm_mga_primary_buffer_t *primary = &dev_priv->prim;
164 u32 head, tail; 163 u32 head, tail;
@@ -181,11 +180,10 @@ void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv)
181 180
182 head = MGA_READ(MGA_PRIMADDRESS); 181 head = MGA_READ(MGA_PRIMADDRESS);
183 182
184 if (head == dev_priv->primary->offset) { 183 if (head == dev_priv->primary->offset)
185 primary->space = primary->size; 184 primary->space = primary->size;
186 } else { 185 else
187 primary->space = head - dev_priv->primary->offset; 186 primary->space = head - dev_priv->primary->offset;
188 }
189 187
190 DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset)); 188 DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset));
191 DRM_DEBUG(" tail = 0x%06x\n", primary->tail); 189 DRM_DEBUG(" tail = 0x%06x\n", primary->tail);
@@ -199,7 +197,7 @@ void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv)
199 DRM_DEBUG("done.\n"); 197 DRM_DEBUG("done.\n");
200} 198}
201 199
202void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv) 200void mga_do_dma_wrap_end(drm_mga_private_t *dev_priv)
203{ 201{
204 drm_mga_primary_buffer_t *primary = &dev_priv->prim; 202 drm_mga_primary_buffer_t *primary = &dev_priv->prim;
205 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 203 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -220,11 +218,11 @@ void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv)
220 * Freelist management 218 * Freelist management
221 */ 219 */
222 220
223#define MGA_BUFFER_USED ~0 221#define MGA_BUFFER_USED (~0)
224#define MGA_BUFFER_FREE 0 222#define MGA_BUFFER_FREE 0
225 223
226#if MGA_FREELIST_DEBUG 224#if MGA_FREELIST_DEBUG
227static void mga_freelist_print(struct drm_device * dev) 225static void mga_freelist_print(struct drm_device *dev)
228{ 226{
229 drm_mga_private_t *dev_priv = dev->dev_private; 227 drm_mga_private_t *dev_priv = dev->dev_private;
230 drm_mga_freelist_t *entry; 228 drm_mga_freelist_t *entry;
@@ -245,7 +243,7 @@ static void mga_freelist_print(struct drm_device * dev)
245} 243}
246#endif 244#endif
247 245
248static int mga_freelist_init(struct drm_device * dev, drm_mga_private_t * dev_priv) 246static int mga_freelist_init(struct drm_device *dev, drm_mga_private_t *dev_priv)
249{ 247{
250 struct drm_device_dma *dma = dev->dma; 248 struct drm_device_dma *dma = dev->dma;
251 struct drm_buf *buf; 249 struct drm_buf *buf;
@@ -288,7 +286,7 @@ static int mga_freelist_init(struct drm_device * dev, drm_mga_private_t * dev_pr
288 return 0; 286 return 0;
289} 287}
290 288
291static void mga_freelist_cleanup(struct drm_device * dev) 289static void mga_freelist_cleanup(struct drm_device *dev)
292{ 290{
293 drm_mga_private_t *dev_priv = dev->dev_private; 291 drm_mga_private_t *dev_priv = dev->dev_private;
294 drm_mga_freelist_t *entry; 292 drm_mga_freelist_t *entry;
@@ -308,7 +306,7 @@ static void mga_freelist_cleanup(struct drm_device * dev)
308#if 0 306#if 0
309/* FIXME: Still needed? 307/* FIXME: Still needed?
310 */ 308 */
311static void mga_freelist_reset(struct drm_device * dev) 309static void mga_freelist_reset(struct drm_device *dev)
312{ 310{
313 struct drm_device_dma *dma = dev->dma; 311 struct drm_device_dma *dma = dev->dma;
314 struct drm_buf *buf; 312 struct drm_buf *buf;
@@ -356,7 +354,7 @@ static struct drm_buf *mga_freelist_get(struct drm_device * dev)
356 return NULL; 354 return NULL;
357} 355}
358 356
359int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf) 357int mga_freelist_put(struct drm_device *dev, struct drm_buf *buf)
360{ 358{
361 drm_mga_private_t *dev_priv = dev->dev_private; 359 drm_mga_private_t *dev_priv = dev->dev_private;
362 drm_mga_buf_priv_t *buf_priv = buf->dev_private; 360 drm_mga_buf_priv_t *buf_priv = buf->dev_private;
@@ -391,7 +389,7 @@ int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf)
391 * DMA initialization, cleanup 389 * DMA initialization, cleanup
392 */ 390 */
393 391
394int mga_driver_load(struct drm_device * dev, unsigned long flags) 392int mga_driver_load(struct drm_device *dev, unsigned long flags)
395{ 393{
396 drm_mga_private_t *dev_priv; 394 drm_mga_private_t *dev_priv;
397 int ret; 395 int ret;
@@ -405,8 +403,8 @@ int mga_driver_load(struct drm_device * dev, unsigned long flags)
405 dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT; 403 dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT;
406 dev_priv->chipset = flags; 404 dev_priv->chipset = flags;
407 405
408 dev_priv->mmio_base = drm_get_resource_start(dev, 1); 406 dev_priv->mmio_base = pci_resource_start(dev->pdev, 1);
409 dev_priv->mmio_size = drm_get_resource_len(dev, 1); 407 dev_priv->mmio_size = pci_resource_len(dev->pdev, 1);
410 408
411 dev->counters += 3; 409 dev->counters += 3;
412 dev->types[6] = _DRM_STAT_IRQ; 410 dev->types[6] = _DRM_STAT_IRQ;
@@ -439,8 +437,8 @@ int mga_driver_load(struct drm_device * dev, unsigned long flags)
439 * 437 *
440 * \sa mga_do_dma_bootstrap, mga_do_pci_dma_bootstrap 438 * \sa mga_do_dma_bootstrap, mga_do_pci_dma_bootstrap
441 */ 439 */
442static int mga_do_agp_dma_bootstrap(struct drm_device * dev, 440static int mga_do_agp_dma_bootstrap(struct drm_device *dev,
443 drm_mga_dma_bootstrap_t * dma_bs) 441 drm_mga_dma_bootstrap_t *dma_bs)
444{ 442{
445 drm_mga_private_t *const dev_priv = 443 drm_mga_private_t *const dev_priv =
446 (drm_mga_private_t *) dev->dev_private; 444 (drm_mga_private_t *) dev->dev_private;
@@ -481,11 +479,10 @@ static int mga_do_agp_dma_bootstrap(struct drm_device * dev,
481 */ 479 */
482 480
483 if (dev_priv->chipset == MGA_CARD_TYPE_G200) { 481 if (dev_priv->chipset == MGA_CARD_TYPE_G200) {
484 if (mode.mode & 0x02) { 482 if (mode.mode & 0x02)
485 MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_ENABLE); 483 MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_ENABLE);
486 } else { 484 else
487 MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_DISABLE); 485 MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_DISABLE);
488 }
489 } 486 }
490 487
491 /* Allocate and bind AGP memory. */ 488 /* Allocate and bind AGP memory. */
@@ -593,8 +590,8 @@ static int mga_do_agp_dma_bootstrap(struct drm_device * dev,
593 return 0; 590 return 0;
594} 591}
595#else 592#else
596static int mga_do_agp_dma_bootstrap(struct drm_device * dev, 593static int mga_do_agp_dma_bootstrap(struct drm_device *dev,
597 drm_mga_dma_bootstrap_t * dma_bs) 594 drm_mga_dma_bootstrap_t *dma_bs)
598{ 595{
599 return -EINVAL; 596 return -EINVAL;
600} 597}
@@ -614,8 +611,8 @@ static int mga_do_agp_dma_bootstrap(struct drm_device * dev,
614 * 611 *
615 * \sa mga_do_dma_bootstrap, mga_do_agp_dma_bootstrap 612 * \sa mga_do_dma_bootstrap, mga_do_agp_dma_bootstrap
616 */ 613 */
617static int mga_do_pci_dma_bootstrap(struct drm_device * dev, 614static int mga_do_pci_dma_bootstrap(struct drm_device *dev,
618 drm_mga_dma_bootstrap_t * dma_bs) 615 drm_mga_dma_bootstrap_t *dma_bs)
619{ 616{
620 drm_mga_private_t *const dev_priv = 617 drm_mga_private_t *const dev_priv =
621 (drm_mga_private_t *) dev->dev_private; 618 (drm_mga_private_t *) dev->dev_private;
@@ -678,9 +675,8 @@ static int mga_do_pci_dma_bootstrap(struct drm_device * dev,
678 req.size = dma_bs->secondary_bin_size; 675 req.size = dma_bs->secondary_bin_size;
679 676
680 err = drm_addbufs_pci(dev, &req); 677 err = drm_addbufs_pci(dev, &req);
681 if (!err) { 678 if (!err)
682 break; 679 break;
683 }
684 } 680 }
685 681
686 if (bin_count == 0) { 682 if (bin_count == 0) {
@@ -704,8 +700,8 @@ static int mga_do_pci_dma_bootstrap(struct drm_device * dev,
704 return 0; 700 return 0;
705} 701}
706 702
707static int mga_do_dma_bootstrap(struct drm_device * dev, 703static int mga_do_dma_bootstrap(struct drm_device *dev,
708 drm_mga_dma_bootstrap_t * dma_bs) 704 drm_mga_dma_bootstrap_t *dma_bs)
709{ 705{
710 const int is_agp = (dma_bs->agp_mode != 0) && drm_device_is_agp(dev); 706 const int is_agp = (dma_bs->agp_mode != 0) && drm_device_is_agp(dev);
711 int err; 707 int err;
@@ -737,17 +733,15 @@ static int mga_do_dma_bootstrap(struct drm_device * dev,
737 * carve off portions of it for internal uses. The remaining memory 733 * carve off portions of it for internal uses. The remaining memory
738 * is returned to user-mode to be used for AGP textures. 734 * is returned to user-mode to be used for AGP textures.
739 */ 735 */
740 if (is_agp) { 736 if (is_agp)
741 err = mga_do_agp_dma_bootstrap(dev, dma_bs); 737 err = mga_do_agp_dma_bootstrap(dev, dma_bs);
742 }
743 738
744 /* If we attempted to initialize the card for AGP DMA but failed, 739 /* If we attempted to initialize the card for AGP DMA but failed,
745 * clean-up any mess that may have been created. 740 * clean-up any mess that may have been created.
746 */ 741 */
747 742
748 if (err) { 743 if (err)
749 mga_do_cleanup_dma(dev, MINIMAL_CLEANUP); 744 mga_do_cleanup_dma(dev, MINIMAL_CLEANUP);
750 }
751 745
752 /* Not only do we want to try and initialized PCI cards for PCI DMA, 746 /* Not only do we want to try and initialized PCI cards for PCI DMA,
753 * but we also try to initialized AGP cards that could not be 747 * but we also try to initialized AGP cards that could not be
@@ -757,9 +751,8 @@ static int mga_do_dma_bootstrap(struct drm_device * dev,
757 * AGP memory, etc. 751 * AGP memory, etc.
758 */ 752 */
759 753
760 if (!is_agp || err) { 754 if (!is_agp || err)
761 err = mga_do_pci_dma_bootstrap(dev, dma_bs); 755 err = mga_do_pci_dma_bootstrap(dev, dma_bs);
762 }
763 756
764 return err; 757 return err;
765} 758}
@@ -792,7 +785,7 @@ int mga_dma_bootstrap(struct drm_device *dev, void *data,
792 return err; 785 return err;
793} 786}
794 787
795static int mga_do_init_dma(struct drm_device * dev, drm_mga_init_t * init) 788static int mga_do_init_dma(struct drm_device *dev, drm_mga_init_t *init)
796{ 789{
797 drm_mga_private_t *dev_priv; 790 drm_mga_private_t *dev_priv;
798 int ret; 791 int ret;
@@ -800,11 +793,10 @@ static int mga_do_init_dma(struct drm_device * dev, drm_mga_init_t * init)
800 793
801 dev_priv = dev->dev_private; 794 dev_priv = dev->dev_private;
802 795
803 if (init->sgram) { 796 if (init->sgram)
804 dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK; 797 dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK;
805 } else { 798 else
806 dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR; 799 dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR;
807 }
808 dev_priv->maccess = init->maccess; 800 dev_priv->maccess = init->maccess;
809 801
810 dev_priv->fb_cpp = init->fb_cpp; 802 dev_priv->fb_cpp = init->fb_cpp;
@@ -975,9 +967,8 @@ static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup)
975 dev_priv->agp_handle = 0; 967 dev_priv->agp_handle = 0;
976 } 968 }
977 969
978 if ((dev->agp != NULL) && dev->agp->acquired) { 970 if ((dev->agp != NULL) && dev->agp->acquired)
979 err = drm_agp_release(dev); 971 err = drm_agp_release(dev);
980 }
981#endif 972#endif
982 } 973 }
983 974
@@ -998,9 +989,8 @@ static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup)
998 memset(dev_priv->warp_pipe_phys, 0, 989 memset(dev_priv->warp_pipe_phys, 0,
999 sizeof(dev_priv->warp_pipe_phys)); 990 sizeof(dev_priv->warp_pipe_phys));
1000 991
1001 if (dev_priv->head != NULL) { 992 if (dev_priv->head != NULL)
1002 mga_freelist_cleanup(dev); 993 mga_freelist_cleanup(dev);
1003 }
1004 } 994 }
1005 995
1006 return err; 996 return err;
@@ -1017,9 +1007,8 @@ int mga_dma_init(struct drm_device *dev, void *data,
1017 switch (init->func) { 1007 switch (init->func) {
1018 case MGA_INIT_DMA: 1008 case MGA_INIT_DMA:
1019 err = mga_do_init_dma(dev, init); 1009 err = mga_do_init_dma(dev, init);
1020 if (err) { 1010 if (err)
1021 (void)mga_do_cleanup_dma(dev, FULL_CLEANUP); 1011 (void)mga_do_cleanup_dma(dev, FULL_CLEANUP);
1022 }
1023 return err; 1012 return err;
1024 case MGA_CLEANUP_DMA: 1013 case MGA_CLEANUP_DMA:
1025 return mga_do_cleanup_dma(dev, FULL_CLEANUP); 1014 return mga_do_cleanup_dma(dev, FULL_CLEANUP);
@@ -1047,9 +1036,8 @@ int mga_dma_flush(struct drm_device *dev, void *data,
1047 1036
1048 WRAP_WAIT_WITH_RETURN(dev_priv); 1037 WRAP_WAIT_WITH_RETURN(dev_priv);
1049 1038
1050 if (lock->flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL)) { 1039 if (lock->flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL))
1051 mga_do_dma_flush(dev_priv); 1040 mga_do_dma_flush(dev_priv);
1052 }
1053 1041
1054 if (lock->flags & _DRM_LOCK_QUIESCENT) { 1042 if (lock->flags & _DRM_LOCK_QUIESCENT) {
1055#if MGA_DMA_DEBUG 1043#if MGA_DMA_DEBUG
@@ -1079,8 +1067,8 @@ int mga_dma_reset(struct drm_device *dev, void *data,
1079 * DMA buffer management 1067 * DMA buffer management
1080 */ 1068 */
1081 1069
1082static int mga_dma_get_buffers(struct drm_device * dev, 1070static int mga_dma_get_buffers(struct drm_device *dev,
1083 struct drm_file *file_priv, struct drm_dma * d) 1071 struct drm_file *file_priv, struct drm_dma *d)
1084{ 1072{
1085 struct drm_buf *buf; 1073 struct drm_buf *buf;
1086 int i; 1074 int i;
@@ -1134,9 +1122,8 @@ int mga_dma_buffers(struct drm_device *dev, void *data,
1134 1122
1135 d->granted_count = 0; 1123 d->granted_count = 0;
1136 1124
1137 if (d->request_count) { 1125 if (d->request_count)
1138 ret = mga_dma_get_buffers(dev, file_priv, d); 1126 ret = mga_dma_get_buffers(dev, file_priv, d);
1139 }
1140 1127
1141 return ret; 1128 return ret;
1142} 1129}
@@ -1144,7 +1131,7 @@ int mga_dma_buffers(struct drm_device *dev, void *data,
1144/** 1131/**
1145 * Called just before the module is unloaded. 1132 * Called just before the module is unloaded.
1146 */ 1133 */
1147int mga_driver_unload(struct drm_device * dev) 1134int mga_driver_unload(struct drm_device *dev)
1148{ 1135{
1149 kfree(dev->dev_private); 1136 kfree(dev->dev_private);
1150 dev->dev_private = NULL; 1137 dev->dev_private = NULL;
@@ -1155,12 +1142,12 @@ int mga_driver_unload(struct drm_device * dev)
1155/** 1142/**
1156 * Called when the last opener of the device is closed. 1143 * Called when the last opener of the device is closed.
1157 */ 1144 */
1158void mga_driver_lastclose(struct drm_device * dev) 1145void mga_driver_lastclose(struct drm_device *dev)
1159{ 1146{
1160 mga_do_cleanup_dma(dev, FULL_CLEANUP); 1147 mga_do_cleanup_dma(dev, FULL_CLEANUP);
1161} 1148}
1162 1149
1163int mga_driver_dma_quiescent(struct drm_device * dev) 1150int mga_driver_dma_quiescent(struct drm_device *dev)
1164{ 1151{
1165 drm_mga_private_t *dev_priv = dev->dev_private; 1152 drm_mga_private_t *dev_priv = dev->dev_private;
1166 return mga_do_wait_for_idle(dev_priv); 1153 return mga_do_wait_for_idle(dev_priv);
diff --git a/drivers/gpu/drm/mga/mga_drv.c b/drivers/gpu/drm/mga/mga_drv.c
index ddfe16197b59..26d0d8ced80d 100644
--- a/drivers/gpu/drm/mga/mga_drv.c
+++ b/drivers/gpu/drm/mga/mga_drv.c
@@ -36,7 +36,7 @@
36 36
37#include "drm_pciids.h" 37#include "drm_pciids.h"
38 38
39static int mga_driver_device_is_agp(struct drm_device * dev); 39static int mga_driver_device_is_agp(struct drm_device *dev);
40 40
41static struct pci_device_id pciidlist[] = { 41static struct pci_device_id pciidlist[] = {
42 mga_PCI_IDS 42 mga_PCI_IDS
@@ -119,7 +119,7 @@ MODULE_LICENSE("GPL and additional rights");
119 * \returns 119 * \returns
120 * If the device is a PCI G450, zero is returned. Otherwise 2 is returned. 120 * If the device is a PCI G450, zero is returned. Otherwise 2 is returned.
121 */ 121 */
122static int mga_driver_device_is_agp(struct drm_device * dev) 122static int mga_driver_device_is_agp(struct drm_device *dev)
123{ 123{
124 const struct pci_dev *const pdev = dev->pdev; 124 const struct pci_dev *const pdev = dev->pdev;
125 125
diff --git a/drivers/gpu/drm/mga/mga_drv.h b/drivers/gpu/drm/mga/mga_drv.h
index be6c6b9b0e89..1084fa4d261b 100644
--- a/drivers/gpu/drm/mga/mga_drv.h
+++ b/drivers/gpu/drm/mga/mga_drv.h
@@ -164,59 +164,59 @@ extern int mga_dma_reset(struct drm_device *dev, void *data,
164extern int mga_dma_buffers(struct drm_device *dev, void *data, 164extern int mga_dma_buffers(struct drm_device *dev, void *data,
165 struct drm_file *file_priv); 165 struct drm_file *file_priv);
166extern int mga_driver_load(struct drm_device *dev, unsigned long flags); 166extern int mga_driver_load(struct drm_device *dev, unsigned long flags);
167extern int mga_driver_unload(struct drm_device * dev); 167extern int mga_driver_unload(struct drm_device *dev);
168extern void mga_driver_lastclose(struct drm_device * dev); 168extern void mga_driver_lastclose(struct drm_device *dev);
169extern int mga_driver_dma_quiescent(struct drm_device * dev); 169extern int mga_driver_dma_quiescent(struct drm_device *dev);
170 170
171extern int mga_do_wait_for_idle(drm_mga_private_t * dev_priv); 171extern int mga_do_wait_for_idle(drm_mga_private_t *dev_priv);
172 172
173extern void mga_do_dma_flush(drm_mga_private_t * dev_priv); 173extern void mga_do_dma_flush(drm_mga_private_t *dev_priv);
174extern void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv); 174extern void mga_do_dma_wrap_start(drm_mga_private_t *dev_priv);
175extern void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv); 175extern void mga_do_dma_wrap_end(drm_mga_private_t *dev_priv);
176 176
177extern int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf); 177extern int mga_freelist_put(struct drm_device *dev, struct drm_buf *buf);
178 178
179 /* mga_warp.c */ 179 /* mga_warp.c */
180extern int mga_warp_install_microcode(drm_mga_private_t * dev_priv); 180extern int mga_warp_install_microcode(drm_mga_private_t *dev_priv);
181extern int mga_warp_init(drm_mga_private_t * dev_priv); 181extern int mga_warp_init(drm_mga_private_t *dev_priv);
182 182
183 /* mga_irq.c */ 183 /* mga_irq.c */
184extern int mga_enable_vblank(struct drm_device *dev, int crtc); 184extern int mga_enable_vblank(struct drm_device *dev, int crtc);
185extern void mga_disable_vblank(struct drm_device *dev, int crtc); 185extern void mga_disable_vblank(struct drm_device *dev, int crtc);
186extern u32 mga_get_vblank_counter(struct drm_device *dev, int crtc); 186extern u32 mga_get_vblank_counter(struct drm_device *dev, int crtc);
187extern int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence); 187extern int mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence);
188extern int mga_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence); 188extern int mga_driver_vblank_wait(struct drm_device *dev, unsigned int *sequence);
189extern irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS); 189extern irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS);
190extern void mga_driver_irq_preinstall(struct drm_device * dev); 190extern void mga_driver_irq_preinstall(struct drm_device *dev);
191extern int mga_driver_irq_postinstall(struct drm_device *dev); 191extern int mga_driver_irq_postinstall(struct drm_device *dev);
192extern void mga_driver_irq_uninstall(struct drm_device * dev); 192extern void mga_driver_irq_uninstall(struct drm_device *dev);
193extern long mga_compat_ioctl(struct file *filp, unsigned int cmd, 193extern long mga_compat_ioctl(struct file *filp, unsigned int cmd,
194 unsigned long arg); 194 unsigned long arg);
195 195
196#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER() 196#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER()
197 197
198#if defined(__linux__) && defined(__alpha__) 198#if defined(__linux__) && defined(__alpha__)
199#define MGA_BASE( reg ) ((unsigned long)(dev_priv->mmio->handle)) 199#define MGA_BASE(reg) ((unsigned long)(dev_priv->mmio->handle))
200#define MGA_ADDR( reg ) (MGA_BASE(reg) + reg) 200#define MGA_ADDR(reg) (MGA_BASE(reg) + reg)
201 201
202#define MGA_DEREF( reg ) *(volatile u32 *)MGA_ADDR( reg ) 202#define MGA_DEREF(reg) (*(volatile u32 *)MGA_ADDR(reg))
203#define MGA_DEREF8( reg ) *(volatile u8 *)MGA_ADDR( reg ) 203#define MGA_DEREF8(reg) (*(volatile u8 *)MGA_ADDR(reg))
204 204
205#define MGA_READ( reg ) (_MGA_READ((u32 *)MGA_ADDR(reg))) 205#define MGA_READ(reg) (_MGA_READ((u32 *)MGA_ADDR(reg)))
206#define MGA_READ8( reg ) (_MGA_READ((u8 *)MGA_ADDR(reg))) 206#define MGA_READ8(reg) (_MGA_READ((u8 *)MGA_ADDR(reg)))
207#define MGA_WRITE( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF( reg ) = val; } while (0) 207#define MGA_WRITE(reg, val) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF(reg) = val; } while (0)
208#define MGA_WRITE8( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8( reg ) = val; } while (0) 208#define MGA_WRITE8(reg, val) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8(reg) = val; } while (0)
209 209
210static inline u32 _MGA_READ(u32 * addr) 210static inline u32 _MGA_READ(u32 *addr)
211{ 211{
212 DRM_MEMORYBARRIER(); 212 DRM_MEMORYBARRIER();
213 return *(volatile u32 *)addr; 213 return *(volatile u32 *)addr;
214} 214}
215#else 215#else
216#define MGA_READ8( reg ) DRM_READ8(dev_priv->mmio, (reg)) 216#define MGA_READ8(reg) DRM_READ8(dev_priv->mmio, (reg))
217#define MGA_READ( reg ) DRM_READ32(dev_priv->mmio, (reg)) 217#define MGA_READ(reg) DRM_READ32(dev_priv->mmio, (reg))
218#define MGA_WRITE8( reg, val ) DRM_WRITE8(dev_priv->mmio, (reg), (val)) 218#define MGA_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val))
219#define MGA_WRITE( reg, val ) DRM_WRITE32(dev_priv->mmio, (reg), (val)) 219#define MGA_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val))
220#endif 220#endif
221 221
222#define DWGREG0 0x1c00 222#define DWGREG0 0x1c00
@@ -233,40 +233,39 @@ static inline u32 _MGA_READ(u32 * addr)
233 * Helper macross... 233 * Helper macross...
234 */ 234 */
235 235
236#define MGA_EMIT_STATE( dev_priv, dirty ) \ 236#define MGA_EMIT_STATE(dev_priv, dirty) \
237do { \ 237do { \
238 if ( (dirty) & ~MGA_UPLOAD_CLIPRECTS ) { \ 238 if ((dirty) & ~MGA_UPLOAD_CLIPRECTS) { \
239 if ( dev_priv->chipset >= MGA_CARD_TYPE_G400 ) { \ 239 if (dev_priv->chipset >= MGA_CARD_TYPE_G400) \
240 mga_g400_emit_state( dev_priv ); \ 240 mga_g400_emit_state(dev_priv); \
241 } else { \ 241 else \
242 mga_g200_emit_state( dev_priv ); \ 242 mga_g200_emit_state(dev_priv); \
243 } \
244 } \ 243 } \
245} while (0) 244} while (0)
246 245
247#define WRAP_TEST_WITH_RETURN( dev_priv ) \ 246#define WRAP_TEST_WITH_RETURN(dev_priv) \
248do { \ 247do { \
249 if ( test_bit( 0, &dev_priv->prim.wrapped ) ) { \ 248 if (test_bit(0, &dev_priv->prim.wrapped)) { \
250 if ( mga_is_idle( dev_priv ) ) { \ 249 if (mga_is_idle(dev_priv)) { \
251 mga_do_dma_wrap_end( dev_priv ); \ 250 mga_do_dma_wrap_end(dev_priv); \
252 } else if ( dev_priv->prim.space < \ 251 } else if (dev_priv->prim.space < \
253 dev_priv->prim.high_mark ) { \ 252 dev_priv->prim.high_mark) { \
254 if ( MGA_DMA_DEBUG ) \ 253 if (MGA_DMA_DEBUG) \
255 DRM_INFO( "wrap...\n"); \ 254 DRM_INFO("wrap...\n"); \
256 return -EBUSY; \ 255 return -EBUSY; \
257 } \ 256 } \
258 } \ 257 } \
259} while (0) 258} while (0)
260 259
261#define WRAP_WAIT_WITH_RETURN( dev_priv ) \ 260#define WRAP_WAIT_WITH_RETURN(dev_priv) \
262do { \ 261do { \
263 if ( test_bit( 0, &dev_priv->prim.wrapped ) ) { \ 262 if (test_bit(0, &dev_priv->prim.wrapped)) { \
264 if ( mga_do_wait_for_idle( dev_priv ) < 0 ) { \ 263 if (mga_do_wait_for_idle(dev_priv) < 0) { \
265 if ( MGA_DMA_DEBUG ) \ 264 if (MGA_DMA_DEBUG) \
266 DRM_INFO( "wrap...\n"); \ 265 DRM_INFO("wrap...\n"); \
267 return -EBUSY; \ 266 return -EBUSY; \
268 } \ 267 } \
269 mga_do_dma_wrap_end( dev_priv ); \ 268 mga_do_dma_wrap_end(dev_priv); \
270 } \ 269 } \
271} while (0) 270} while (0)
272 271
@@ -280,12 +279,12 @@ do { \
280 279
281#define DMA_BLOCK_SIZE (5 * sizeof(u32)) 280#define DMA_BLOCK_SIZE (5 * sizeof(u32))
282 281
283#define BEGIN_DMA( n ) \ 282#define BEGIN_DMA(n) \
284do { \ 283do { \
285 if ( MGA_VERBOSE ) { \ 284 if (MGA_VERBOSE) { \
286 DRM_INFO( "BEGIN_DMA( %d )\n", (n) ); \ 285 DRM_INFO("BEGIN_DMA(%d)\n", (n)); \
287 DRM_INFO( " space=0x%x req=0x%Zx\n", \ 286 DRM_INFO(" space=0x%x req=0x%Zx\n", \
288 dev_priv->prim.space, (n) * DMA_BLOCK_SIZE ); \ 287 dev_priv->prim.space, (n) * DMA_BLOCK_SIZE); \
289 } \ 288 } \
290 prim = dev_priv->prim.start; \ 289 prim = dev_priv->prim.start; \
291 write = dev_priv->prim.tail; \ 290 write = dev_priv->prim.tail; \
@@ -293,9 +292,9 @@ do { \
293 292
294#define BEGIN_DMA_WRAP() \ 293#define BEGIN_DMA_WRAP() \
295do { \ 294do { \
296 if ( MGA_VERBOSE ) { \ 295 if (MGA_VERBOSE) { \
297 DRM_INFO( "BEGIN_DMA()\n" ); \ 296 DRM_INFO("BEGIN_DMA()\n"); \
298 DRM_INFO( " space=0x%x\n", dev_priv->prim.space ); \ 297 DRM_INFO(" space=0x%x\n", dev_priv->prim.space); \
299 } \ 298 } \
300 prim = dev_priv->prim.start; \ 299 prim = dev_priv->prim.start; \
301 write = dev_priv->prim.tail; \ 300 write = dev_priv->prim.tail; \
@@ -304,72 +303,68 @@ do { \
304#define ADVANCE_DMA() \ 303#define ADVANCE_DMA() \
305do { \ 304do { \
306 dev_priv->prim.tail = write; \ 305 dev_priv->prim.tail = write; \
307 if ( MGA_VERBOSE ) { \ 306 if (MGA_VERBOSE) \
308 DRM_INFO( "ADVANCE_DMA() tail=0x%05x sp=0x%x\n", \ 307 DRM_INFO("ADVANCE_DMA() tail=0x%05x sp=0x%x\n", \
309 write, dev_priv->prim.space ); \ 308 write, dev_priv->prim.space); \
310 } \
311} while (0) 309} while (0)
312 310
313#define FLUSH_DMA() \ 311#define FLUSH_DMA() \
314do { \ 312do { \
315 if ( 0 ) { \ 313 if (0) { \
316 DRM_INFO( "\n" ); \ 314 DRM_INFO("\n"); \
317 DRM_INFO( " tail=0x%06x head=0x%06lx\n", \ 315 DRM_INFO(" tail=0x%06x head=0x%06lx\n", \
318 dev_priv->prim.tail, \ 316 dev_priv->prim.tail, \
319 (unsigned long)(MGA_READ(MGA_PRIMADDRESS) - \ 317 (unsigned long)(MGA_READ(MGA_PRIMADDRESS) - \
320 dev_priv->primary->offset)); \ 318 dev_priv->primary->offset)); \
321 } \ 319 } \
322 if ( !test_bit( 0, &dev_priv->prim.wrapped ) ) { \ 320 if (!test_bit(0, &dev_priv->prim.wrapped)) { \
323 if ( dev_priv->prim.space < \ 321 if (dev_priv->prim.space < dev_priv->prim.high_mark) \
324 dev_priv->prim.high_mark ) { \ 322 mga_do_dma_wrap_start(dev_priv); \
325 mga_do_dma_wrap_start( dev_priv ); \ 323 else \
326 } else { \ 324 mga_do_dma_flush(dev_priv); \
327 mga_do_dma_flush( dev_priv ); \
328 } \
329 } \ 325 } \
330} while (0) 326} while (0)
331 327
332/* Never use this, always use DMA_BLOCK(...) for primary DMA output. 328/* Never use this, always use DMA_BLOCK(...) for primary DMA output.
333 */ 329 */
334#define DMA_WRITE( offset, val ) \ 330#define DMA_WRITE(offset, val) \
335do { \ 331do { \
336 if ( MGA_VERBOSE ) { \ 332 if (MGA_VERBOSE) \
337 DRM_INFO( " DMA_WRITE( 0x%08x ) at 0x%04Zx\n", \ 333 DRM_INFO(" DMA_WRITE( 0x%08x ) at 0x%04Zx\n", \
338 (u32)(val), write + (offset) * sizeof(u32) ); \ 334 (u32)(val), write + (offset) * sizeof(u32)); \
339 } \
340 *(volatile u32 *)(prim + write + (offset) * sizeof(u32)) = val; \ 335 *(volatile u32 *)(prim + write + (offset) * sizeof(u32)) = val; \
341} while (0) 336} while (0)
342 337
343#define DMA_BLOCK( reg0, val0, reg1, val1, reg2, val2, reg3, val3 ) \ 338#define DMA_BLOCK(reg0, val0, reg1, val1, reg2, val2, reg3, val3) \
344do { \ 339do { \
345 DMA_WRITE( 0, ((DMAREG( reg0 ) << 0) | \ 340 DMA_WRITE(0, ((DMAREG(reg0) << 0) | \
346 (DMAREG( reg1 ) << 8) | \ 341 (DMAREG(reg1) << 8) | \
347 (DMAREG( reg2 ) << 16) | \ 342 (DMAREG(reg2) << 16) | \
348 (DMAREG( reg3 ) << 24)) ); \ 343 (DMAREG(reg3) << 24))); \
349 DMA_WRITE( 1, val0 ); \ 344 DMA_WRITE(1, val0); \
350 DMA_WRITE( 2, val1 ); \ 345 DMA_WRITE(2, val1); \
351 DMA_WRITE( 3, val2 ); \ 346 DMA_WRITE(3, val2); \
352 DMA_WRITE( 4, val3 ); \ 347 DMA_WRITE(4, val3); \
353 write += DMA_BLOCK_SIZE; \ 348 write += DMA_BLOCK_SIZE; \
354} while (0) 349} while (0)
355 350
356/* Buffer aging via primary DMA stream head pointer. 351/* Buffer aging via primary DMA stream head pointer.
357 */ 352 */
358 353
359#define SET_AGE( age, h, w ) \ 354#define SET_AGE(age, h, w) \
360do { \ 355do { \
361 (age)->head = h; \ 356 (age)->head = h; \
362 (age)->wrap = w; \ 357 (age)->wrap = w; \
363} while (0) 358} while (0)
364 359
365#define TEST_AGE( age, h, w ) ( (age)->wrap < w || \ 360#define TEST_AGE(age, h, w) ((age)->wrap < w || \
366 ( (age)->wrap == w && \ 361 ((age)->wrap == w && \
367 (age)->head < h ) ) 362 (age)->head < h))
368 363
369#define AGE_BUFFER( buf_priv ) \ 364#define AGE_BUFFER(buf_priv) \
370do { \ 365do { \
371 drm_mga_freelist_t *entry = (buf_priv)->list_entry; \ 366 drm_mga_freelist_t *entry = (buf_priv)->list_entry; \
372 if ( (buf_priv)->dispatched ) { \ 367 if ((buf_priv)->dispatched) { \
373 entry->age.head = (dev_priv->prim.tail + \ 368 entry->age.head = (dev_priv->prim.tail + \
374 dev_priv->primary->offset); \ 369 dev_priv->primary->offset); \
375 entry->age.wrap = dev_priv->sarea_priv->last_wrap; \ 370 entry->age.wrap = dev_priv->sarea_priv->last_wrap; \
@@ -681,7 +676,7 @@ do { \
681 676
682/* Simple idle test. 677/* Simple idle test.
683 */ 678 */
684static __inline__ int mga_is_idle(drm_mga_private_t * dev_priv) 679static __inline__ int mga_is_idle(drm_mga_private_t *dev_priv)
685{ 680{
686 u32 status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK; 681 u32 status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK;
687 return (status == MGA_ENDPRDMASTS); 682 return (status == MGA_ENDPRDMASTS);
diff --git a/drivers/gpu/drm/mga/mga_irq.c b/drivers/gpu/drm/mga/mga_irq.c
index daa6041a483a..2581202297e4 100644
--- a/drivers/gpu/drm/mga/mga_irq.c
+++ b/drivers/gpu/drm/mga/mga_irq.c
@@ -76,9 +76,8 @@ irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS)
76 /* In addition to clearing the interrupt-pending bit, we 76 /* In addition to clearing the interrupt-pending bit, we
77 * have to write to MGA_PRIMEND to re-start the DMA operation. 77 * have to write to MGA_PRIMEND to re-start the DMA operation.
78 */ 78 */
79 if ((prim_start & ~0x03) != (prim_end & ~0x03)) { 79 if ((prim_start & ~0x03) != (prim_end & ~0x03))
80 MGA_WRITE(MGA_PRIMEND, prim_end); 80 MGA_WRITE(MGA_PRIMEND, prim_end);
81 }
82 81
83 atomic_inc(&dev_priv->last_fence_retired); 82 atomic_inc(&dev_priv->last_fence_retired);
84 DRM_WAKEUP(&dev_priv->fence_queue); 83 DRM_WAKEUP(&dev_priv->fence_queue);
@@ -120,7 +119,7 @@ void mga_disable_vblank(struct drm_device *dev, int crtc)
120 /* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */ 119 /* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */
121} 120}
122 121
123int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence) 122int mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence)
124{ 123{
125 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; 124 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
126 unsigned int cur_fence; 125 unsigned int cur_fence;
@@ -139,7 +138,7 @@ int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence)
139 return ret; 138 return ret;
140} 139}
141 140
142void mga_driver_irq_preinstall(struct drm_device * dev) 141void mga_driver_irq_preinstall(struct drm_device *dev)
143{ 142{
144 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; 143 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
145 144
@@ -162,7 +161,7 @@ int mga_driver_irq_postinstall(struct drm_device *dev)
162 return 0; 161 return 0;
163} 162}
164 163
165void mga_driver_irq_uninstall(struct drm_device * dev) 164void mga_driver_irq_uninstall(struct drm_device *dev)
166{ 165{
167 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; 166 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
168 if (!dev_priv) 167 if (!dev_priv)
diff --git a/drivers/gpu/drm/mga/mga_state.c b/drivers/gpu/drm/mga/mga_state.c
index a53b848e0f17..fff82045c427 100644
--- a/drivers/gpu/drm/mga/mga_state.c
+++ b/drivers/gpu/drm/mga/mga_state.c
@@ -41,8 +41,8 @@
41 * DMA hardware state programming functions 41 * DMA hardware state programming functions
42 */ 42 */
43 43
44static void mga_emit_clip_rect(drm_mga_private_t * dev_priv, 44static void mga_emit_clip_rect(drm_mga_private_t *dev_priv,
45 struct drm_clip_rect * box) 45 struct drm_clip_rect *box)
46{ 46{
47 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 47 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
48 drm_mga_context_regs_t *ctx = &sarea_priv->context_state; 48 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
@@ -66,7 +66,7 @@ static void mga_emit_clip_rect(drm_mga_private_t * dev_priv,
66 ADVANCE_DMA(); 66 ADVANCE_DMA();
67} 67}
68 68
69static __inline__ void mga_g200_emit_context(drm_mga_private_t * dev_priv) 69static __inline__ void mga_g200_emit_context(drm_mga_private_t *dev_priv)
70{ 70{
71 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 71 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
72 drm_mga_context_regs_t *ctx = &sarea_priv->context_state; 72 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
@@ -89,7 +89,7 @@ static __inline__ void mga_g200_emit_context(drm_mga_private_t * dev_priv)
89 ADVANCE_DMA(); 89 ADVANCE_DMA();
90} 90}
91 91
92static __inline__ void mga_g400_emit_context(drm_mga_private_t * dev_priv) 92static __inline__ void mga_g400_emit_context(drm_mga_private_t *dev_priv)
93{ 93{
94 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 94 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
95 drm_mga_context_regs_t *ctx = &sarea_priv->context_state; 95 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
@@ -116,7 +116,7 @@ static __inline__ void mga_g400_emit_context(drm_mga_private_t * dev_priv)
116 ADVANCE_DMA(); 116 ADVANCE_DMA();
117} 117}
118 118
119static __inline__ void mga_g200_emit_tex0(drm_mga_private_t * dev_priv) 119static __inline__ void mga_g200_emit_tex0(drm_mga_private_t *dev_priv)
120{ 120{
121 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 121 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
122 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0]; 122 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
@@ -144,7 +144,7 @@ static __inline__ void mga_g200_emit_tex0(drm_mga_private_t * dev_priv)
144 ADVANCE_DMA(); 144 ADVANCE_DMA();
145} 145}
146 146
147static __inline__ void mga_g400_emit_tex0(drm_mga_private_t * dev_priv) 147static __inline__ void mga_g400_emit_tex0(drm_mga_private_t *dev_priv)
148{ 148{
149 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 149 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
150 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0]; 150 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
@@ -184,7 +184,7 @@ static __inline__ void mga_g400_emit_tex0(drm_mga_private_t * dev_priv)
184 ADVANCE_DMA(); 184 ADVANCE_DMA();
185} 185}
186 186
187static __inline__ void mga_g400_emit_tex1(drm_mga_private_t * dev_priv) 187static __inline__ void mga_g400_emit_tex1(drm_mga_private_t *dev_priv)
188{ 188{
189 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 189 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
190 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1]; 190 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1];
@@ -223,7 +223,7 @@ static __inline__ void mga_g400_emit_tex1(drm_mga_private_t * dev_priv)
223 ADVANCE_DMA(); 223 ADVANCE_DMA();
224} 224}
225 225
226static __inline__ void mga_g200_emit_pipe(drm_mga_private_t * dev_priv) 226static __inline__ void mga_g200_emit_pipe(drm_mga_private_t *dev_priv)
227{ 227{
228 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 228 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
229 unsigned int pipe = sarea_priv->warp_pipe; 229 unsigned int pipe = sarea_priv->warp_pipe;
@@ -250,7 +250,7 @@ static __inline__ void mga_g200_emit_pipe(drm_mga_private_t * dev_priv)
250 ADVANCE_DMA(); 250 ADVANCE_DMA();
251} 251}
252 252
253static __inline__ void mga_g400_emit_pipe(drm_mga_private_t * dev_priv) 253static __inline__ void mga_g400_emit_pipe(drm_mga_private_t *dev_priv)
254{ 254{
255 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 255 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
256 unsigned int pipe = sarea_priv->warp_pipe; 256 unsigned int pipe = sarea_priv->warp_pipe;
@@ -327,7 +327,7 @@ static __inline__ void mga_g400_emit_pipe(drm_mga_private_t * dev_priv)
327 ADVANCE_DMA(); 327 ADVANCE_DMA();
328} 328}
329 329
330static void mga_g200_emit_state(drm_mga_private_t * dev_priv) 330static void mga_g200_emit_state(drm_mga_private_t *dev_priv)
331{ 331{
332 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 332 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
333 unsigned int dirty = sarea_priv->dirty; 333 unsigned int dirty = sarea_priv->dirty;
@@ -348,7 +348,7 @@ static void mga_g200_emit_state(drm_mga_private_t * dev_priv)
348 } 348 }
349} 349}
350 350
351static void mga_g400_emit_state(drm_mga_private_t * dev_priv) 351static void mga_g400_emit_state(drm_mga_private_t *dev_priv)
352{ 352{
353 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 353 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
354 unsigned int dirty = sarea_priv->dirty; 354 unsigned int dirty = sarea_priv->dirty;
@@ -381,7 +381,7 @@ static void mga_g400_emit_state(drm_mga_private_t * dev_priv)
381 381
382/* Disallow all write destinations except the front and backbuffer. 382/* Disallow all write destinations except the front and backbuffer.
383 */ 383 */
384static int mga_verify_context(drm_mga_private_t * dev_priv) 384static int mga_verify_context(drm_mga_private_t *dev_priv)
385{ 385{
386 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 386 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
387 drm_mga_context_regs_t *ctx = &sarea_priv->context_state; 387 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
@@ -400,7 +400,7 @@ static int mga_verify_context(drm_mga_private_t * dev_priv)
400 400
401/* Disallow texture reads from PCI space. 401/* Disallow texture reads from PCI space.
402 */ 402 */
403static int mga_verify_tex(drm_mga_private_t * dev_priv, int unit) 403static int mga_verify_tex(drm_mga_private_t *dev_priv, int unit)
404{ 404{
405 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 405 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
406 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[unit]; 406 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[unit];
@@ -417,7 +417,7 @@ static int mga_verify_tex(drm_mga_private_t * dev_priv, int unit)
417 return 0; 417 return 0;
418} 418}
419 419
420static int mga_verify_state(drm_mga_private_t * dev_priv) 420static int mga_verify_state(drm_mga_private_t *dev_priv)
421{ 421{
422 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 422 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
423 unsigned int dirty = sarea_priv->dirty; 423 unsigned int dirty = sarea_priv->dirty;
@@ -446,7 +446,7 @@ static int mga_verify_state(drm_mga_private_t * dev_priv)
446 return (ret == 0); 446 return (ret == 0);
447} 447}
448 448
449static int mga_verify_iload(drm_mga_private_t * dev_priv, 449static int mga_verify_iload(drm_mga_private_t *dev_priv,
450 unsigned int dstorg, unsigned int length) 450 unsigned int dstorg, unsigned int length)
451{ 451{
452 if (dstorg < dev_priv->texture_offset || 452 if (dstorg < dev_priv->texture_offset ||
@@ -465,7 +465,7 @@ static int mga_verify_iload(drm_mga_private_t * dev_priv,
465 return 0; 465 return 0;
466} 466}
467 467
468static int mga_verify_blit(drm_mga_private_t * dev_priv, 468static int mga_verify_blit(drm_mga_private_t *dev_priv,
469 unsigned int srcorg, unsigned int dstorg) 469 unsigned int srcorg, unsigned int dstorg)
470{ 470{
471 if ((srcorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) || 471 if ((srcorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ||
@@ -480,7 +480,7 @@ static int mga_verify_blit(drm_mga_private_t * dev_priv,
480 * 480 *
481 */ 481 */
482 482
483static void mga_dma_dispatch_clear(struct drm_device * dev, drm_mga_clear_t * clear) 483static void mga_dma_dispatch_clear(struct drm_device *dev, drm_mga_clear_t *clear)
484{ 484{
485 drm_mga_private_t *dev_priv = dev->dev_private; 485 drm_mga_private_t *dev_priv = dev->dev_private;
486 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 486 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -568,7 +568,7 @@ static void mga_dma_dispatch_clear(struct drm_device * dev, drm_mga_clear_t * cl
568 FLUSH_DMA(); 568 FLUSH_DMA();
569} 569}
570 570
571static void mga_dma_dispatch_swap(struct drm_device * dev) 571static void mga_dma_dispatch_swap(struct drm_device *dev)
572{ 572{
573 drm_mga_private_t *dev_priv = dev->dev_private; 573 drm_mga_private_t *dev_priv = dev->dev_private;
574 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 574 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -622,7 +622,7 @@ static void mga_dma_dispatch_swap(struct drm_device * dev)
622 DRM_DEBUG("... done.\n"); 622 DRM_DEBUG("... done.\n");
623} 623}
624 624
625static void mga_dma_dispatch_vertex(struct drm_device * dev, struct drm_buf * buf) 625static void mga_dma_dispatch_vertex(struct drm_device *dev, struct drm_buf *buf)
626{ 626{
627 drm_mga_private_t *dev_priv = dev->dev_private; 627 drm_mga_private_t *dev_priv = dev->dev_private;
628 drm_mga_buf_priv_t *buf_priv = buf->dev_private; 628 drm_mga_buf_priv_t *buf_priv = buf->dev_private;
@@ -669,7 +669,7 @@ static void mga_dma_dispatch_vertex(struct drm_device * dev, struct drm_buf * bu
669 FLUSH_DMA(); 669 FLUSH_DMA();
670} 670}
671 671
672static void mga_dma_dispatch_indices(struct drm_device * dev, struct drm_buf * buf, 672static void mga_dma_dispatch_indices(struct drm_device *dev, struct drm_buf *buf,
673 unsigned int start, unsigned int end) 673 unsigned int start, unsigned int end)
674{ 674{
675 drm_mga_private_t *dev_priv = dev->dev_private; 675 drm_mga_private_t *dev_priv = dev->dev_private;
@@ -718,7 +718,7 @@ static void mga_dma_dispatch_indices(struct drm_device * dev, struct drm_buf * b
718/* This copies a 64 byte aligned agp region to the frambuffer with a 718/* This copies a 64 byte aligned agp region to the frambuffer with a
719 * standard blit, the ioctl needs to do checking. 719 * standard blit, the ioctl needs to do checking.
720 */ 720 */
721static void mga_dma_dispatch_iload(struct drm_device * dev, struct drm_buf * buf, 721static void mga_dma_dispatch_iload(struct drm_device *dev, struct drm_buf *buf,
722 unsigned int dstorg, unsigned int length) 722 unsigned int dstorg, unsigned int length)
723{ 723{
724 drm_mga_private_t *dev_priv = dev->dev_private; 724 drm_mga_private_t *dev_priv = dev->dev_private;
@@ -766,7 +766,7 @@ static void mga_dma_dispatch_iload(struct drm_device * dev, struct drm_buf * buf
766 FLUSH_DMA(); 766 FLUSH_DMA();
767} 767}
768 768
769static void mga_dma_dispatch_blit(struct drm_device * dev, drm_mga_blit_t * blit) 769static void mga_dma_dispatch_blit(struct drm_device *dev, drm_mga_blit_t *blit)
770{ 770{
771 drm_mga_private_t *dev_priv = dev->dev_private; 771 drm_mga_private_t *dev_priv = dev->dev_private;
772 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 772 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -801,9 +801,8 @@ static void mga_dma_dispatch_blit(struct drm_device * dev, drm_mga_blit_t * blit
801 int w = pbox[i].x2 - pbox[i].x1 - 1; 801 int w = pbox[i].x2 - pbox[i].x1 - 1;
802 int start; 802 int start;
803 803
804 if (blit->ydir == -1) { 804 if (blit->ydir == -1)
805 srcy = blit->height - srcy - 1; 805 srcy = blit->height - srcy - 1;
806 }
807 806
808 start = srcy * blit->src_pitch + srcx; 807 start = srcy * blit->src_pitch + srcx;
809 808
diff --git a/drivers/gpu/drm/mga/mga_warp.c b/drivers/gpu/drm/mga/mga_warp.c
index 9aad4847afdf..f172bd5c257f 100644
--- a/drivers/gpu/drm/mga/mga_warp.c
+++ b/drivers/gpu/drm/mga/mga_warp.c
@@ -46,7 +46,7 @@ MODULE_FIRMWARE(FIRMWARE_G400);
46 46
47#define WARP_UCODE_SIZE(size) ALIGN(size, MGA_WARP_CODE_ALIGN) 47#define WARP_UCODE_SIZE(size) ALIGN(size, MGA_WARP_CODE_ALIGN)
48 48
49int mga_warp_install_microcode(drm_mga_private_t * dev_priv) 49int mga_warp_install_microcode(drm_mga_private_t *dev_priv)
50{ 50{
51 unsigned char *vcbase = dev_priv->warp->handle; 51 unsigned char *vcbase = dev_priv->warp->handle;
52 unsigned long pcbase = dev_priv->warp->offset; 52 unsigned long pcbase = dev_priv->warp->offset;
@@ -133,7 +133,7 @@ out:
133 133
134#define WMISC_EXPECTED (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE) 134#define WMISC_EXPECTED (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE)
135 135
136int mga_warp_init(drm_mga_private_t * dev_priv) 136int mga_warp_init(drm_mga_private_t *dev_priv)
137{ 137{
138 u32 wmisc; 138 u32 wmisc;
139 139
diff --git a/drivers/gpu/drm/nouveau/Kconfig b/drivers/gpu/drm/nouveau/Kconfig
index 1175429da102..d2d28048efb2 100644
--- a/drivers/gpu/drm/nouveau/Kconfig
+++ b/drivers/gpu/drm/nouveau/Kconfig
@@ -1,6 +1,6 @@
1config DRM_NOUVEAU 1config DRM_NOUVEAU
2 tristate "Nouveau (nVidia) cards" 2 tristate "Nouveau (nVidia) cards"
3 depends on DRM 3 depends on DRM && PCI
4 select FW_LOADER 4 select FW_LOADER
5 select DRM_KMS_HELPER 5 select DRM_KMS_HELPER
6 select DRM_TTM 6 select DRM_TTM
@@ -41,4 +41,13 @@ config DRM_I2C_CH7006
41 41
42 This driver is currently only useful if you're also using 42 This driver is currently only useful if you're also using
43 the nouveau driver. 43 the nouveau driver.
44
45config DRM_I2C_SIL164
46 tristate "Silicon Image sil164 TMDS transmitter"
47 default m if DRM_NOUVEAU
48 help
49 Support for sil164 and similar single-link (or dual-link
50 when used in pairs) TMDS transmitters, used in some nVidia
51 video cards.
52
44endmenu 53endmenu
diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile
index acd31ed861ef..2405d5ef0ca7 100644
--- a/drivers/gpu/drm/nouveau/Makefile
+++ b/drivers/gpu/drm/nouveau/Makefile
@@ -9,10 +9,10 @@ nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \
9 nouveau_bo.o nouveau_fence.o nouveau_gem.o nouveau_ttm.o \ 9 nouveau_bo.o nouveau_fence.o nouveau_gem.o nouveau_ttm.o \
10 nouveau_hw.o nouveau_calc.o nouveau_bios.o nouveau_i2c.o \ 10 nouveau_hw.o nouveau_calc.o nouveau_bios.o nouveau_i2c.o \
11 nouveau_display.o nouveau_connector.o nouveau_fbcon.o \ 11 nouveau_display.o nouveau_connector.o nouveau_fbcon.o \
12 nouveau_dp.o nouveau_grctx.o \ 12 nouveau_dp.o \
13 nv04_timer.o \ 13 nv04_timer.o \
14 nv04_mc.o nv40_mc.o nv50_mc.o \ 14 nv04_mc.o nv40_mc.o nv50_mc.o \
15 nv04_fb.o nv10_fb.o nv40_fb.o nv50_fb.o \ 15 nv04_fb.o nv10_fb.o nv30_fb.o nv40_fb.o nv50_fb.o \
16 nv04_fifo.o nv10_fifo.o nv40_fifo.o nv50_fifo.o \ 16 nv04_fifo.o nv10_fifo.o nv40_fifo.o nv50_fifo.o \
17 nv04_graph.o nv10_graph.o nv20_graph.o \ 17 nv04_graph.o nv10_graph.o nv20_graph.o \
18 nv40_graph.o nv50_graph.o \ 18 nv40_graph.o nv50_graph.o \
@@ -22,7 +22,7 @@ nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \
22 nv50_cursor.o nv50_display.o nv50_fbcon.o \ 22 nv50_cursor.o nv50_display.o nv50_fbcon.o \
23 nv04_dac.o nv04_dfp.o nv04_tv.o nv17_tv.o nv17_tv_modes.o \ 23 nv04_dac.o nv04_dfp.o nv04_tv.o nv17_tv.o nv17_tv_modes.o \
24 nv04_crtc.o nv04_display.o nv04_cursor.o nv04_fbcon.o \ 24 nv04_crtc.o nv04_display.o nv04_cursor.o nv04_fbcon.o \
25 nv17_gpio.o nv50_gpio.o \ 25 nv10_gpio.o nv50_gpio.o \
26 nv50_calc.o 26 nv50_calc.o
27 27
28nouveau-$(CONFIG_DRM_NOUVEAU_DEBUG) += nouveau_debugfs.o 28nouveau-$(CONFIG_DRM_NOUVEAU_DEBUG) += nouveau_debugfs.o
diff --git a/drivers/gpu/drm/nouveau/nouveau_acpi.c b/drivers/gpu/drm/nouveau/nouveau_acpi.c
index d4bcca8a5133..c17a055ee3e5 100644
--- a/drivers/gpu/drm/nouveau/nouveau_acpi.c
+++ b/drivers/gpu/drm/nouveau/nouveau_acpi.c
@@ -3,6 +3,7 @@
3#include <linux/slab.h> 3#include <linux/slab.h>
4#include <acpi/acpi_drivers.h> 4#include <acpi/acpi_drivers.h>
5#include <acpi/acpi_bus.h> 5#include <acpi/acpi_bus.h>
6#include <acpi/video.h>
6 7
7#include "drmP.h" 8#include "drmP.h"
8#include "drm.h" 9#include "drm.h"
@@ -11,6 +12,7 @@
11#include "nouveau_drv.h" 12#include "nouveau_drv.h"
12#include "nouveau_drm.h" 13#include "nouveau_drm.h"
13#include "nv50_display.h" 14#include "nv50_display.h"
15#include "nouveau_connector.h"
14 16
15#include <linux/vga_switcheroo.h> 17#include <linux/vga_switcheroo.h>
16 18
@@ -42,7 +44,7 @@ static const char nouveau_dsm_muid[] = {
42 0xB3, 0x4D, 0x7E, 0x5F, 0xEA, 0x12, 0x9F, 0xD4, 44 0xB3, 0x4D, 0x7E, 0x5F, 0xEA, 0x12, 0x9F, 0xD4,
43}; 45};
44 46
45static int nouveau_dsm(acpi_handle handle, int func, int arg, int *result) 47static int nouveau_dsm(acpi_handle handle, int func, int arg, uint32_t *result)
46{ 48{
47 struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL }; 49 struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL };
48 struct acpi_object_list input; 50 struct acpi_object_list input;
@@ -259,3 +261,37 @@ int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len)
259{ 261{
260 return nouveau_rom_call(nouveau_dsm_priv.rom_handle, bios, offset, len); 262 return nouveau_rom_call(nouveau_dsm_priv.rom_handle, bios, offset, len);
261} 263}
264
265int
266nouveau_acpi_edid(struct drm_device *dev, struct drm_connector *connector)
267{
268 struct nouveau_connector *nv_connector = nouveau_connector(connector);
269 struct acpi_device *acpidev;
270 acpi_handle handle;
271 int type, ret;
272 void *edid;
273
274 switch (connector->connector_type) {
275 case DRM_MODE_CONNECTOR_LVDS:
276 case DRM_MODE_CONNECTOR_eDP:
277 type = ACPI_VIDEO_DISPLAY_LCD;
278 break;
279 default:
280 return -EINVAL;
281 }
282
283 handle = DEVICE_ACPI_HANDLE(&dev->pdev->dev);
284 if (!handle)
285 return -ENODEV;
286
287 ret = acpi_bus_get_device(handle, &acpidev);
288 if (ret)
289 return -ENODEV;
290
291 ret = acpi_video_get_edid(acpidev, type, -1, &edid);
292 if (ret < 0)
293 return ret;
294
295 nv_connector->edid = edid;
296 return 0;
297}
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
index fc924b649195..7369b5e73649 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bios.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
@@ -28,6 +28,8 @@
28#include "nouveau_hw.h" 28#include "nouveau_hw.h"
29#include "nouveau_encoder.h" 29#include "nouveau_encoder.h"
30 30
31#include <linux/io-mapping.h>
32
31/* these defines are made up */ 33/* these defines are made up */
32#define NV_CIO_CRE_44_HEADA 0x0 34#define NV_CIO_CRE_44_HEADA 0x0
33#define NV_CIO_CRE_44_HEADB 0x3 35#define NV_CIO_CRE_44_HEADB 0x3
@@ -203,36 +205,26 @@ struct methods {
203 const bool rw; 205 const bool rw;
204}; 206};
205 207
206static struct methods nv04_methods[] = { 208static struct methods shadow_methods[] = {
207 { "PROM", load_vbios_prom, false },
208 { "PRAMIN", load_vbios_pramin, true },
209 { "PCIROM", load_vbios_pci, true },
210};
211
212static struct methods nv50_methods[] = {
213 { "ACPI", load_vbios_acpi, true },
214 { "PRAMIN", load_vbios_pramin, true }, 209 { "PRAMIN", load_vbios_pramin, true },
215 { "PROM", load_vbios_prom, false }, 210 { "PROM", load_vbios_prom, false },
216 { "PCIROM", load_vbios_pci, true }, 211 { "PCIROM", load_vbios_pci, true },
212 { "ACPI", load_vbios_acpi, true },
217}; 213};
218 214#define NUM_SHADOW_METHODS ARRAY_SIZE(shadow_methods)
219#define METHODCNT 3
220 215
221static bool NVShadowVBIOS(struct drm_device *dev, uint8_t *data) 216static bool NVShadowVBIOS(struct drm_device *dev, uint8_t *data)
222{ 217{
223 struct drm_nouveau_private *dev_priv = dev->dev_private; 218 struct methods *methods = shadow_methods;
224 struct methods *methods;
225 int i;
226 int testscore = 3; 219 int testscore = 3;
227 int scores[METHODCNT]; 220 int scores[NUM_SHADOW_METHODS], i;
228 221
229 if (nouveau_vbios) { 222 if (nouveau_vbios) {
230 methods = nv04_methods; 223 for (i = 0; i < NUM_SHADOW_METHODS; i++)
231 for (i = 0; i < METHODCNT; i++)
232 if (!strcasecmp(nouveau_vbios, methods[i].desc)) 224 if (!strcasecmp(nouveau_vbios, methods[i].desc))
233 break; 225 break;
234 226
235 if (i < METHODCNT) { 227 if (i < NUM_SHADOW_METHODS) {
236 NV_INFO(dev, "Attempting to use BIOS image from %s\n", 228 NV_INFO(dev, "Attempting to use BIOS image from %s\n",
237 methods[i].desc); 229 methods[i].desc);
238 230
@@ -244,12 +236,7 @@ static bool NVShadowVBIOS(struct drm_device *dev, uint8_t *data)
244 NV_ERROR(dev, "VBIOS source \'%s\' invalid\n", nouveau_vbios); 236 NV_ERROR(dev, "VBIOS source \'%s\' invalid\n", nouveau_vbios);
245 } 237 }
246 238
247 if (dev_priv->card_type < NV_50) 239 for (i = 0; i < NUM_SHADOW_METHODS; i++) {
248 methods = nv04_methods;
249 else
250 methods = nv50_methods;
251
252 for (i = 0; i < METHODCNT; i++) {
253 NV_TRACE(dev, "Attempting to load BIOS image from %s\n", 240 NV_TRACE(dev, "Attempting to load BIOS image from %s\n",
254 methods[i].desc); 241 methods[i].desc);
255 data[0] = data[1] = 0; /* avoid reuse of previous image */ 242 data[0] = data[1] = 0; /* avoid reuse of previous image */
@@ -260,7 +247,7 @@ static bool NVShadowVBIOS(struct drm_device *dev, uint8_t *data)
260 } 247 }
261 248
262 while (--testscore > 0) { 249 while (--testscore > 0) {
263 for (i = 0; i < METHODCNT; i++) { 250 for (i = 0; i < NUM_SHADOW_METHODS; i++) {
264 if (scores[i] == testscore) { 251 if (scores[i] == testscore) {
265 NV_TRACE(dev, "Using BIOS image from %s\n", 252 NV_TRACE(dev, "Using BIOS image from %s\n",
266 methods[i].desc); 253 methods[i].desc);
@@ -935,7 +922,7 @@ init_io_restrict_prog(struct nvbios *bios, uint16_t offset,
935 NV_ERROR(bios->dev, 922 NV_ERROR(bios->dev,
936 "0x%04X: Config 0x%02X exceeds maximal bound 0x%02X\n", 923 "0x%04X: Config 0x%02X exceeds maximal bound 0x%02X\n",
937 offset, config, count); 924 offset, config, count);
938 return -EINVAL; 925 return len;
939 } 926 }
940 927
941 configval = ROM32(bios->data[offset + 11 + config * 4]); 928 configval = ROM32(bios->data[offset + 11 + config * 4]);
@@ -1037,7 +1024,7 @@ init_io_restrict_pll(struct nvbios *bios, uint16_t offset,
1037 NV_ERROR(bios->dev, 1024 NV_ERROR(bios->dev,
1038 "0x%04X: Config 0x%02X exceeds maximal bound 0x%02X\n", 1025 "0x%04X: Config 0x%02X exceeds maximal bound 0x%02X\n",
1039 offset, config, count); 1026 offset, config, count);
1040 return -EINVAL; 1027 return len;
1041 } 1028 }
1042 1029
1043 freq = ROM16(bios->data[offset + 12 + config * 2]); 1030 freq = ROM16(bios->data[offset + 12 + config * 2]);
@@ -1209,7 +1196,7 @@ init_dp_condition(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1209 dpe = nouveau_bios_dp_table(dev, dcb, &dummy); 1196 dpe = nouveau_bios_dp_table(dev, dcb, &dummy);
1210 if (!dpe) { 1197 if (!dpe) {
1211 NV_ERROR(dev, "0x%04X: INIT_3A: no encoder table!!\n", offset); 1198 NV_ERROR(dev, "0x%04X: INIT_3A: no encoder table!!\n", offset);
1212 return -EINVAL; 1199 return 3;
1213 } 1200 }
1214 1201
1215 switch (cond) { 1202 switch (cond) {
@@ -1233,12 +1220,16 @@ init_dp_condition(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1233 int ret; 1220 int ret;
1234 1221
1235 auxch = nouveau_i2c_find(dev, bios->display.output->i2c_index); 1222 auxch = nouveau_i2c_find(dev, bios->display.output->i2c_index);
1236 if (!auxch) 1223 if (!auxch) {
1237 return -ENODEV; 1224 NV_ERROR(dev, "0x%04X: couldn't get auxch\n", offset);
1225 return 3;
1226 }
1238 1227
1239 ret = nouveau_dp_auxch(auxch, 9, 0xd, &cond, 1); 1228 ret = nouveau_dp_auxch(auxch, 9, 0xd, &cond, 1);
1240 if (ret) 1229 if (ret) {
1241 return ret; 1230 NV_ERROR(dev, "0x%04X: auxch rd fail: %d\n", offset, ret);
1231 return 3;
1232 }
1242 1233
1243 if (cond & 1) 1234 if (cond & 1)
1244 iexec->execute = false; 1235 iexec->execute = false;
@@ -1407,7 +1398,7 @@ init_io_restrict_pll2(struct nvbios *bios, uint16_t offset,
1407 NV_ERROR(bios->dev, 1398 NV_ERROR(bios->dev,
1408 "0x%04X: Config 0x%02X exceeds maximal bound 0x%02X\n", 1399 "0x%04X: Config 0x%02X exceeds maximal bound 0x%02X\n",
1409 offset, config, count); 1400 offset, config, count);
1410 return -EINVAL; 1401 return len;
1411 } 1402 }
1412 1403
1413 freq = ROM32(bios->data[offset + 11 + config * 4]); 1404 freq = ROM32(bios->data[offset + 11 + config * 4]);
@@ -1467,6 +1458,7 @@ init_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1467 * "mask n" and OR it with "data n" before writing it back to the device 1458 * "mask n" and OR it with "data n" before writing it back to the device
1468 */ 1459 */
1469 1460
1461 struct drm_device *dev = bios->dev;
1470 uint8_t i2c_index = bios->data[offset + 1]; 1462 uint8_t i2c_index = bios->data[offset + 1];
1471 uint8_t i2c_address = bios->data[offset + 2] >> 1; 1463 uint8_t i2c_address = bios->data[offset + 2] >> 1;
1472 uint8_t count = bios->data[offset + 3]; 1464 uint8_t count = bios->data[offset + 3];
@@ -1481,9 +1473,11 @@ init_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1481 "Count: 0x%02X\n", 1473 "Count: 0x%02X\n",
1482 offset, i2c_index, i2c_address, count); 1474 offset, i2c_index, i2c_address, count);
1483 1475
1484 chan = init_i2c_device_find(bios->dev, i2c_index); 1476 chan = init_i2c_device_find(dev, i2c_index);
1485 if (!chan) 1477 if (!chan) {
1486 return -ENODEV; 1478 NV_ERROR(dev, "0x%04X: i2c bus not found\n", offset);
1479 return len;
1480 }
1487 1481
1488 for (i = 0; i < count; i++) { 1482 for (i = 0; i < count; i++) {
1489 uint8_t reg = bios->data[offset + 4 + i * 3]; 1483 uint8_t reg = bios->data[offset + 4 + i * 3];
@@ -1494,8 +1488,10 @@ init_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1494 ret = i2c_smbus_xfer(&chan->adapter, i2c_address, 0, 1488 ret = i2c_smbus_xfer(&chan->adapter, i2c_address, 0,
1495 I2C_SMBUS_READ, reg, 1489 I2C_SMBUS_READ, reg,
1496 I2C_SMBUS_BYTE_DATA, &val); 1490 I2C_SMBUS_BYTE_DATA, &val);
1497 if (ret < 0) 1491 if (ret < 0) {
1498 return ret; 1492 NV_ERROR(dev, "0x%04X: i2c rd fail: %d\n", offset, ret);
1493 return len;
1494 }
1499 1495
1500 BIOSLOG(bios, "0x%04X: I2CReg: 0x%02X, Value: 0x%02X, " 1496 BIOSLOG(bios, "0x%04X: I2CReg: 0x%02X, Value: 0x%02X, "
1501 "Mask: 0x%02X, Data: 0x%02X\n", 1497 "Mask: 0x%02X, Data: 0x%02X\n",
@@ -1509,8 +1505,10 @@ init_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1509 ret = i2c_smbus_xfer(&chan->adapter, i2c_address, 0, 1505 ret = i2c_smbus_xfer(&chan->adapter, i2c_address, 0,
1510 I2C_SMBUS_WRITE, reg, 1506 I2C_SMBUS_WRITE, reg,
1511 I2C_SMBUS_BYTE_DATA, &val); 1507 I2C_SMBUS_BYTE_DATA, &val);
1512 if (ret < 0) 1508 if (ret < 0) {
1513 return ret; 1509 NV_ERROR(dev, "0x%04X: i2c wr fail: %d\n", offset, ret);
1510 return len;
1511 }
1514 } 1512 }
1515 1513
1516 return len; 1514 return len;
@@ -1535,6 +1533,7 @@ init_zm_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1535 * "DCB I2C table entry index", set the register to "data n" 1533 * "DCB I2C table entry index", set the register to "data n"
1536 */ 1534 */
1537 1535
1536 struct drm_device *dev = bios->dev;
1538 uint8_t i2c_index = bios->data[offset + 1]; 1537 uint8_t i2c_index = bios->data[offset + 1];
1539 uint8_t i2c_address = bios->data[offset + 2] >> 1; 1538 uint8_t i2c_address = bios->data[offset + 2] >> 1;
1540 uint8_t count = bios->data[offset + 3]; 1539 uint8_t count = bios->data[offset + 3];
@@ -1549,9 +1548,11 @@ init_zm_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1549 "Count: 0x%02X\n", 1548 "Count: 0x%02X\n",
1550 offset, i2c_index, i2c_address, count); 1549 offset, i2c_index, i2c_address, count);
1551 1550
1552 chan = init_i2c_device_find(bios->dev, i2c_index); 1551 chan = init_i2c_device_find(dev, i2c_index);
1553 if (!chan) 1552 if (!chan) {
1554 return -ENODEV; 1553 NV_ERROR(dev, "0x%04X: i2c bus not found\n", offset);
1554 return len;
1555 }
1555 1556
1556 for (i = 0; i < count; i++) { 1557 for (i = 0; i < count; i++) {
1557 uint8_t reg = bios->data[offset + 4 + i * 2]; 1558 uint8_t reg = bios->data[offset + 4 + i * 2];
@@ -1568,8 +1569,10 @@ init_zm_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1568 ret = i2c_smbus_xfer(&chan->adapter, i2c_address, 0, 1569 ret = i2c_smbus_xfer(&chan->adapter, i2c_address, 0,
1569 I2C_SMBUS_WRITE, reg, 1570 I2C_SMBUS_WRITE, reg,
1570 I2C_SMBUS_BYTE_DATA, &val); 1571 I2C_SMBUS_BYTE_DATA, &val);
1571 if (ret < 0) 1572 if (ret < 0) {
1572 return ret; 1573 NV_ERROR(dev, "0x%04X: i2c wr fail: %d\n", offset, ret);
1574 return len;
1575 }
1573 } 1576 }
1574 1577
1575 return len; 1578 return len;
@@ -1592,6 +1595,7 @@ init_zm_i2c(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1592 * address" on the I2C bus given by "DCB I2C table entry index" 1595 * address" on the I2C bus given by "DCB I2C table entry index"
1593 */ 1596 */
1594 1597
1598 struct drm_device *dev = bios->dev;
1595 uint8_t i2c_index = bios->data[offset + 1]; 1599 uint8_t i2c_index = bios->data[offset + 1];
1596 uint8_t i2c_address = bios->data[offset + 2] >> 1; 1600 uint8_t i2c_address = bios->data[offset + 2] >> 1;
1597 uint8_t count = bios->data[offset + 3]; 1601 uint8_t count = bios->data[offset + 3];
@@ -1599,7 +1603,7 @@ init_zm_i2c(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1599 struct nouveau_i2c_chan *chan; 1603 struct nouveau_i2c_chan *chan;
1600 struct i2c_msg msg; 1604 struct i2c_msg msg;
1601 uint8_t data[256]; 1605 uint8_t data[256];
1602 int i; 1606 int ret, i;
1603 1607
1604 if (!iexec->execute) 1608 if (!iexec->execute)
1605 return len; 1609 return len;
@@ -1608,9 +1612,11 @@ init_zm_i2c(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1608 "Count: 0x%02X\n", 1612 "Count: 0x%02X\n",
1609 offset, i2c_index, i2c_address, count); 1613 offset, i2c_index, i2c_address, count);
1610 1614
1611 chan = init_i2c_device_find(bios->dev, i2c_index); 1615 chan = init_i2c_device_find(dev, i2c_index);
1612 if (!chan) 1616 if (!chan) {
1613 return -ENODEV; 1617 NV_ERROR(dev, "0x%04X: i2c bus not found\n", offset);
1618 return len;
1619 }
1614 1620
1615 for (i = 0; i < count; i++) { 1621 for (i = 0; i < count; i++) {
1616 data[i] = bios->data[offset + 4 + i]; 1622 data[i] = bios->data[offset + 4 + i];
@@ -1623,8 +1629,11 @@ init_zm_i2c(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1623 msg.flags = 0; 1629 msg.flags = 0;
1624 msg.len = count; 1630 msg.len = count;
1625 msg.buf = data; 1631 msg.buf = data;
1626 if (i2c_transfer(&chan->adapter, &msg, 1) != 1) 1632 ret = i2c_transfer(&chan->adapter, &msg, 1);
1627 return -EIO; 1633 if (ret != 1) {
1634 NV_ERROR(dev, "0x%04X: i2c wr fail: %d\n", offset, ret);
1635 return len;
1636 }
1628 } 1637 }
1629 1638
1630 return len; 1639 return len;
@@ -1648,6 +1657,7 @@ init_tmds(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1648 * used -- see get_tmds_index_reg() 1657 * used -- see get_tmds_index_reg()
1649 */ 1658 */
1650 1659
1660 struct drm_device *dev = bios->dev;
1651 uint8_t mlv = bios->data[offset + 1]; 1661 uint8_t mlv = bios->data[offset + 1];
1652 uint32_t tmdsaddr = bios->data[offset + 2]; 1662 uint32_t tmdsaddr = bios->data[offset + 2];
1653 uint8_t mask = bios->data[offset + 3]; 1663 uint8_t mask = bios->data[offset + 3];
@@ -1662,8 +1672,10 @@ init_tmds(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1662 offset, mlv, tmdsaddr, mask, data); 1672 offset, mlv, tmdsaddr, mask, data);
1663 1673
1664 reg = get_tmds_index_reg(bios->dev, mlv); 1674 reg = get_tmds_index_reg(bios->dev, mlv);
1665 if (!reg) 1675 if (!reg) {
1666 return -EINVAL; 1676 NV_ERROR(dev, "0x%04X: no tmds_index_reg\n", offset);
1677 return 5;
1678 }
1667 1679
1668 bios_wr32(bios, reg, 1680 bios_wr32(bios, reg,
1669 tmdsaddr | NV_PRAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE); 1681 tmdsaddr | NV_PRAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE);
@@ -1693,6 +1705,7 @@ init_zm_tmds_group(struct nvbios *bios, uint16_t offset,
1693 * register is used -- see get_tmds_index_reg() 1705 * register is used -- see get_tmds_index_reg()
1694 */ 1706 */
1695 1707
1708 struct drm_device *dev = bios->dev;
1696 uint8_t mlv = bios->data[offset + 1]; 1709 uint8_t mlv = bios->data[offset + 1];
1697 uint8_t count = bios->data[offset + 2]; 1710 uint8_t count = bios->data[offset + 2];
1698 int len = 3 + count * 2; 1711 int len = 3 + count * 2;
@@ -1706,8 +1719,10 @@ init_zm_tmds_group(struct nvbios *bios, uint16_t offset,
1706 offset, mlv, count); 1719 offset, mlv, count);
1707 1720
1708 reg = get_tmds_index_reg(bios->dev, mlv); 1721 reg = get_tmds_index_reg(bios->dev, mlv);
1709 if (!reg) 1722 if (!reg) {
1710 return -EINVAL; 1723 NV_ERROR(dev, "0x%04X: no tmds_index_reg\n", offset);
1724 return len;
1725 }
1711 1726
1712 for (i = 0; i < count; i++) { 1727 for (i = 0; i < count; i++) {
1713 uint8_t tmdsaddr = bios->data[offset + 3 + i * 2]; 1728 uint8_t tmdsaddr = bios->data[offset + 3 + i * 2];
@@ -2054,6 +2069,323 @@ init_zm_index_io(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2054 return 5; 2069 return 5;
2055} 2070}
2056 2071
2072static inline void
2073bios_md32(struct nvbios *bios, uint32_t reg,
2074 uint32_t mask, uint32_t val)
2075{
2076 bios_wr32(bios, reg, (bios_rd32(bios, reg) & ~mask) | val);
2077}
2078
2079static uint32_t
2080peek_fb(struct drm_device *dev, struct io_mapping *fb,
2081 uint32_t off)
2082{
2083 uint32_t val = 0;
2084
2085 if (off < pci_resource_len(dev->pdev, 1)) {
2086 uint32_t __iomem *p = io_mapping_map_atomic_wc(fb, off, KM_USER0);
2087
2088 val = ioread32(p);
2089
2090 io_mapping_unmap_atomic(p, KM_USER0);
2091 }
2092
2093 return val;
2094}
2095
2096static void
2097poke_fb(struct drm_device *dev, struct io_mapping *fb,
2098 uint32_t off, uint32_t val)
2099{
2100 if (off < pci_resource_len(dev->pdev, 1)) {
2101 uint32_t __iomem *p = io_mapping_map_atomic_wc(fb, off, KM_USER0);
2102
2103 iowrite32(val, p);
2104 wmb();
2105
2106 io_mapping_unmap_atomic(p, KM_USER0);
2107 }
2108}
2109
2110static inline bool
2111read_back_fb(struct drm_device *dev, struct io_mapping *fb,
2112 uint32_t off, uint32_t val)
2113{
2114 poke_fb(dev, fb, off, val);
2115 return val == peek_fb(dev, fb, off);
2116}
2117
2118static int
2119nv04_init_compute_mem(struct nvbios *bios)
2120{
2121 struct drm_device *dev = bios->dev;
2122 uint32_t patt = 0xdeadbeef;
2123 struct io_mapping *fb;
2124 int i;
2125
2126 /* Map the framebuffer aperture */
2127 fb = io_mapping_create_wc(pci_resource_start(dev->pdev, 1),
2128 pci_resource_len(dev->pdev, 1));
2129 if (!fb)
2130 return -ENOMEM;
2131
2132 /* Sequencer and refresh off */
2133 NVWriteVgaSeq(dev, 0, 1, NVReadVgaSeq(dev, 0, 1) | 0x20);
2134 bios_md32(bios, NV04_PFB_DEBUG_0, 0, NV04_PFB_DEBUG_0_REFRESH_OFF);
2135
2136 bios_md32(bios, NV04_PFB_BOOT_0, ~0,
2137 NV04_PFB_BOOT_0_RAM_AMOUNT_16MB |
2138 NV04_PFB_BOOT_0_RAM_WIDTH_128 |
2139 NV04_PFB_BOOT_0_RAM_TYPE_SGRAM_16MBIT);
2140
2141 for (i = 0; i < 4; i++)
2142 poke_fb(dev, fb, 4 * i, patt);
2143
2144 poke_fb(dev, fb, 0x400000, patt + 1);
2145
2146 if (peek_fb(dev, fb, 0) == patt + 1) {
2147 bios_md32(bios, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_TYPE,
2148 NV04_PFB_BOOT_0_RAM_TYPE_SDRAM_16MBIT);
2149 bios_md32(bios, NV04_PFB_DEBUG_0,
2150 NV04_PFB_DEBUG_0_REFRESH_OFF, 0);
2151
2152 for (i = 0; i < 4; i++)
2153 poke_fb(dev, fb, 4 * i, patt);
2154
2155 if ((peek_fb(dev, fb, 0xc) & 0xffff) != (patt & 0xffff))
2156 bios_md32(bios, NV04_PFB_BOOT_0,
2157 NV04_PFB_BOOT_0_RAM_WIDTH_128 |
2158 NV04_PFB_BOOT_0_RAM_AMOUNT,
2159 NV04_PFB_BOOT_0_RAM_AMOUNT_8MB);
2160
2161 } else if ((peek_fb(dev, fb, 0xc) & 0xffff0000) !=
2162 (patt & 0xffff0000)) {
2163 bios_md32(bios, NV04_PFB_BOOT_0,
2164 NV04_PFB_BOOT_0_RAM_WIDTH_128 |
2165 NV04_PFB_BOOT_0_RAM_AMOUNT,
2166 NV04_PFB_BOOT_0_RAM_AMOUNT_4MB);
2167
2168 } else if (peek_fb(dev, fb, 0) == patt) {
2169 if (read_back_fb(dev, fb, 0x800000, patt))
2170 bios_md32(bios, NV04_PFB_BOOT_0,
2171 NV04_PFB_BOOT_0_RAM_AMOUNT,
2172 NV04_PFB_BOOT_0_RAM_AMOUNT_8MB);
2173 else
2174 bios_md32(bios, NV04_PFB_BOOT_0,
2175 NV04_PFB_BOOT_0_RAM_AMOUNT,
2176 NV04_PFB_BOOT_0_RAM_AMOUNT_4MB);
2177
2178 bios_md32(bios, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_TYPE,
2179 NV04_PFB_BOOT_0_RAM_TYPE_SGRAM_8MBIT);
2180
2181 } else if (!read_back_fb(dev, fb, 0x800000, patt)) {
2182 bios_md32(bios, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
2183 NV04_PFB_BOOT_0_RAM_AMOUNT_8MB);
2184
2185 }
2186
2187 /* Refresh on, sequencer on */
2188 bios_md32(bios, NV04_PFB_DEBUG_0, NV04_PFB_DEBUG_0_REFRESH_OFF, 0);
2189 NVWriteVgaSeq(dev, 0, 1, NVReadVgaSeq(dev, 0, 1) & ~0x20);
2190
2191 io_mapping_free(fb);
2192 return 0;
2193}
2194
2195static const uint8_t *
2196nv05_memory_config(struct nvbios *bios)
2197{
2198 /* Defaults for BIOSes lacking a memory config table */
2199 static const uint8_t default_config_tab[][2] = {
2200 { 0x24, 0x00 },
2201 { 0x28, 0x00 },
2202 { 0x24, 0x01 },
2203 { 0x1f, 0x00 },
2204 { 0x0f, 0x00 },
2205 { 0x17, 0x00 },
2206 { 0x06, 0x00 },
2207 { 0x00, 0x00 }
2208 };
2209 int i = (bios_rd32(bios, NV_PEXTDEV_BOOT_0) &
2210 NV_PEXTDEV_BOOT_0_RAMCFG) >> 2;
2211
2212 if (bios->legacy.mem_init_tbl_ptr)
2213 return &bios->data[bios->legacy.mem_init_tbl_ptr + 2 * i];
2214 else
2215 return default_config_tab[i];
2216}
2217
2218static int
2219nv05_init_compute_mem(struct nvbios *bios)
2220{
2221 struct drm_device *dev = bios->dev;
2222 const uint8_t *ramcfg = nv05_memory_config(bios);
2223 uint32_t patt = 0xdeadbeef;
2224 struct io_mapping *fb;
2225 int i, v;
2226
2227 /* Map the framebuffer aperture */
2228 fb = io_mapping_create_wc(pci_resource_start(dev->pdev, 1),
2229 pci_resource_len(dev->pdev, 1));
2230 if (!fb)
2231 return -ENOMEM;
2232
2233 /* Sequencer off */
2234 NVWriteVgaSeq(dev, 0, 1, NVReadVgaSeq(dev, 0, 1) | 0x20);
2235
2236 if (bios_rd32(bios, NV04_PFB_BOOT_0) & NV04_PFB_BOOT_0_UMA_ENABLE)
2237 goto out;
2238
2239 bios_md32(bios, NV04_PFB_DEBUG_0, NV04_PFB_DEBUG_0_REFRESH_OFF, 0);
2240
2241 /* If present load the hardcoded scrambling table */
2242 if (bios->legacy.mem_init_tbl_ptr) {
2243 uint32_t *scramble_tab = (uint32_t *)&bios->data[
2244 bios->legacy.mem_init_tbl_ptr + 0x10];
2245
2246 for (i = 0; i < 8; i++)
2247 bios_wr32(bios, NV04_PFB_SCRAMBLE(i),
2248 ROM32(scramble_tab[i]));
2249 }
2250
2251 /* Set memory type/width/length defaults depending on the straps */
2252 bios_md32(bios, NV04_PFB_BOOT_0, 0x3f, ramcfg[0]);
2253
2254 if (ramcfg[1] & 0x80)
2255 bios_md32(bios, NV04_PFB_CFG0, 0, NV04_PFB_CFG0_SCRAMBLE);
2256
2257 bios_md32(bios, NV04_PFB_CFG1, 0x700001, (ramcfg[1] & 1) << 20);
2258 bios_md32(bios, NV04_PFB_CFG1, 0, 1);
2259
2260 /* Probe memory bus width */
2261 for (i = 0; i < 4; i++)
2262 poke_fb(dev, fb, 4 * i, patt);
2263
2264 if (peek_fb(dev, fb, 0xc) != patt)
2265 bios_md32(bios, NV04_PFB_BOOT_0,
2266 NV04_PFB_BOOT_0_RAM_WIDTH_128, 0);
2267
2268 /* Probe memory length */
2269 v = bios_rd32(bios, NV04_PFB_BOOT_0) & NV04_PFB_BOOT_0_RAM_AMOUNT;
2270
2271 if (v == NV04_PFB_BOOT_0_RAM_AMOUNT_32MB &&
2272 (!read_back_fb(dev, fb, 0x1000000, ++patt) ||
2273 !read_back_fb(dev, fb, 0, ++patt)))
2274 bios_md32(bios, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
2275 NV04_PFB_BOOT_0_RAM_AMOUNT_16MB);
2276
2277 if (v == NV04_PFB_BOOT_0_RAM_AMOUNT_16MB &&
2278 !read_back_fb(dev, fb, 0x800000, ++patt))
2279 bios_md32(bios, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
2280 NV04_PFB_BOOT_0_RAM_AMOUNT_8MB);
2281
2282 if (!read_back_fb(dev, fb, 0x400000, ++patt))
2283 bios_md32(bios, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
2284 NV04_PFB_BOOT_0_RAM_AMOUNT_4MB);
2285
2286out:
2287 /* Sequencer on */
2288 NVWriteVgaSeq(dev, 0, 1, NVReadVgaSeq(dev, 0, 1) & ~0x20);
2289
2290 io_mapping_free(fb);
2291 return 0;
2292}
2293
2294static int
2295nv10_init_compute_mem(struct nvbios *bios)
2296{
2297 struct drm_device *dev = bios->dev;
2298 struct drm_nouveau_private *dev_priv = bios->dev->dev_private;
2299 const int mem_width[] = { 0x10, 0x00, 0x20 };
2300 const int mem_width_count = (dev_priv->chipset >= 0x17 ? 3 : 2);
2301 uint32_t patt = 0xdeadbeef;
2302 struct io_mapping *fb;
2303 int i, j, k;
2304
2305 /* Map the framebuffer aperture */
2306 fb = io_mapping_create_wc(pci_resource_start(dev->pdev, 1),
2307 pci_resource_len(dev->pdev, 1));
2308 if (!fb)
2309 return -ENOMEM;
2310
2311 bios_wr32(bios, NV10_PFB_REFCTRL, NV10_PFB_REFCTRL_VALID_1);
2312
2313 /* Probe memory bus width */
2314 for (i = 0; i < mem_width_count; i++) {
2315 bios_md32(bios, NV04_PFB_CFG0, 0x30, mem_width[i]);
2316
2317 for (j = 0; j < 4; j++) {
2318 for (k = 0; k < 4; k++)
2319 poke_fb(dev, fb, 0x1c, 0);
2320
2321 poke_fb(dev, fb, 0x1c, patt);
2322 poke_fb(dev, fb, 0x3c, 0);
2323
2324 if (peek_fb(dev, fb, 0x1c) == patt)
2325 goto mem_width_found;
2326 }
2327 }
2328
2329mem_width_found:
2330 patt <<= 1;
2331
2332 /* Probe amount of installed memory */
2333 for (i = 0; i < 4; i++) {
2334 int off = bios_rd32(bios, NV04_PFB_FIFO_DATA) - 0x100000;
2335
2336 poke_fb(dev, fb, off, patt);
2337 poke_fb(dev, fb, 0, 0);
2338
2339 peek_fb(dev, fb, 0);
2340 peek_fb(dev, fb, 0);
2341 peek_fb(dev, fb, 0);
2342 peek_fb(dev, fb, 0);
2343
2344 if (peek_fb(dev, fb, off) == patt)
2345 goto amount_found;
2346 }
2347
2348 /* IC missing - disable the upper half memory space. */
2349 bios_md32(bios, NV04_PFB_CFG0, 0x1000, 0);
2350
2351amount_found:
2352 io_mapping_free(fb);
2353 return 0;
2354}
2355
2356static int
2357nv20_init_compute_mem(struct nvbios *bios)
2358{
2359 struct drm_device *dev = bios->dev;
2360 struct drm_nouveau_private *dev_priv = bios->dev->dev_private;
2361 uint32_t mask = (dev_priv->chipset >= 0x25 ? 0x300 : 0x900);
2362 uint32_t amount, off;
2363 struct io_mapping *fb;
2364
2365 /* Map the framebuffer aperture */
2366 fb = io_mapping_create_wc(pci_resource_start(dev->pdev, 1),
2367 pci_resource_len(dev->pdev, 1));
2368 if (!fb)
2369 return -ENOMEM;
2370
2371 bios_wr32(bios, NV10_PFB_REFCTRL, NV10_PFB_REFCTRL_VALID_1);
2372
2373 /* Allow full addressing */
2374 bios_md32(bios, NV04_PFB_CFG0, 0, mask);
2375
2376 amount = bios_rd32(bios, NV04_PFB_FIFO_DATA);
2377 for (off = amount; off > 0x2000000; off -= 0x2000000)
2378 poke_fb(dev, fb, off - 4, off);
2379
2380 amount = bios_rd32(bios, NV04_PFB_FIFO_DATA);
2381 if (amount != peek_fb(dev, fb, amount - 4))
2382 /* IC missing - disable the upper half memory space. */
2383 bios_md32(bios, NV04_PFB_CFG0, mask, 0);
2384
2385 io_mapping_free(fb);
2386 return 0;
2387}
2388
2057static int 2389static int
2058init_compute_mem(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2390init_compute_mem(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2059{ 2391{
@@ -2062,64 +2394,57 @@ init_compute_mem(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2062 * 2394 *
2063 * offset (8 bit): opcode 2395 * offset (8 bit): opcode
2064 * 2396 *
2065 * This opcode is meant to set NV_PFB_CFG0 (0x100200) appropriately so 2397 * This opcode is meant to set the PFB memory config registers
2066 * that the hardware can correctly calculate how much VRAM it has 2398 * appropriately so that we can correctly calculate how much VRAM it
2067 * (and subsequently report that value in NV_PFB_CSTATUS (0x10020C)) 2399 * has (on nv10 and better chipsets the amount of installed VRAM is
2400 * subsequently reported in NV_PFB_CSTATUS (0x10020C)).
2068 * 2401 *
2069 * The implementation of this opcode in general consists of two parts: 2402 * The implementation of this opcode in general consists of several
2070 * 1) determination of the memory bus width 2403 * parts:
2071 * 2) determination of how many of the card's RAM pads have ICs attached
2072 * 2404 *
2073 * 1) is done by a cunning combination of writes to offsets 0x1c and 2405 * 1) Determination of memory type and density. Only necessary for
2074 * 0x3c in the framebuffer, and seeing whether the written values are 2406 * really old chipsets, the memory type reported by the strap bits
2075 * read back correctly. This then affects bits 4-7 of NV_PFB_CFG0 2407 * (0x101000) is assumed to be accurate on nv05 and newer.
2076 * 2408 *
2077 * 2) is done by a cunning combination of writes to an offset slightly 2409 * 2) Determination of the memory bus width. Usually done by a cunning
2078 * less than the maximum memory reported by NV_PFB_CSTATUS, then seeing 2410 * combination of writes to offsets 0x1c and 0x3c in the fb, and
2079 * if the test pattern can be read back. This then affects bits 12-15 of 2411 * seeing whether the written values are read back correctly.
2080 * NV_PFB_CFG0
2081 * 2412 *
2082 * In this context a "cunning combination" may include multiple reads 2413 * Only necessary on nv0x-nv1x and nv34, on the other cards we can
2083 * and writes to varying locations, often alternating the test pattern 2414 * trust the straps.
2084 * and 0, doubtless to make sure buffers are filled, residual charges
2085 * on tracks are removed etc.
2086 * 2415 *
2087 * Unfortunately, the "cunning combination"s mentioned above, and the 2416 * 3) Determination of how many of the card's RAM pads have ICs
2088 * changes to the bits in NV_PFB_CFG0 differ with nearly every bios 2417 * attached, usually done by a cunning combination of writes to an
2089 * trace I have. 2418 * offset slightly less than the maximum memory reported by
2419 * NV_PFB_CSTATUS, then seeing if the test pattern can be read back.
2090 * 2420 *
2091 * Therefore, we cheat and assume the value of NV_PFB_CFG0 with which 2421 * This appears to be a NOP on IGPs and NV4x or newer chipsets, both io
2092 * we started was correct, and use that instead 2422 * logs of the VBIOS and kmmio traces of the binary driver POSTing the
2423 * card show nothing being done for this opcode. Why is it still listed
2424 * in the table?!
2093 */ 2425 */
2094 2426
2095 /* no iexec->execute check by design */ 2427 /* no iexec->execute check by design */
2096 2428
2097 /*
2098 * This appears to be a NOP on G8x chipsets, both io logs of the VBIOS
2099 * and kmmio traces of the binary driver POSTing the card show nothing
2100 * being done for this opcode. why is it still listed in the table?!
2101 */
2102
2103 struct drm_nouveau_private *dev_priv = bios->dev->dev_private; 2429 struct drm_nouveau_private *dev_priv = bios->dev->dev_private;
2430 int ret;
2104 2431
2105 if (dev_priv->card_type >= NV_40) 2432 if (dev_priv->chipset >= 0x40 ||
2106 return 1; 2433 dev_priv->chipset == 0x1a ||
2107 2434 dev_priv->chipset == 0x1f)
2108 /* 2435 ret = 0;
2109 * On every card I've seen, this step gets done for us earlier in 2436 else if (dev_priv->chipset >= 0x20 &&
2110 * the init scripts 2437 dev_priv->chipset != 0x34)
2111 uint8_t crdata = bios_idxprt_rd(dev, NV_VIO_SRX, 0x01); 2438 ret = nv20_init_compute_mem(bios);
2112 bios_idxprt_wr(dev, NV_VIO_SRX, 0x01, crdata | 0x20); 2439 else if (dev_priv->chipset >= 0x10)
2113 */ 2440 ret = nv10_init_compute_mem(bios);
2114 2441 else if (dev_priv->chipset >= 0x5)
2115 /* 2442 ret = nv05_init_compute_mem(bios);
2116 * This also has probably been done in the scripts, but an mmio trace of 2443 else
2117 * s3 resume shows nvidia doing it anyway (unlike the NV_VIO_SRX write) 2444 ret = nv04_init_compute_mem(bios);
2118 */
2119 bios_wr32(bios, NV_PFB_REFCTRL, NV_PFB_REFCTRL_VALID_1);
2120 2445
2121 /* write back the saved configuration value */ 2446 if (ret)
2122 bios_wr32(bios, NV_PFB_CFG0, bios->state.saved_nv_pfb_cfg0); 2447 return ret;
2123 2448
2124 return 1; 2449 return 1;
2125} 2450}
@@ -2146,7 +2471,8 @@ init_reset(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2146 /* no iexec->execute check by design */ 2471 /* no iexec->execute check by design */
2147 2472
2148 pci_nv_19 = bios_rd32(bios, NV_PBUS_PCI_NV_19); 2473 pci_nv_19 = bios_rd32(bios, NV_PBUS_PCI_NV_19);
2149 bios_wr32(bios, NV_PBUS_PCI_NV_19, 0); 2474 bios_wr32(bios, NV_PBUS_PCI_NV_19, pci_nv_19 & ~0xf00);
2475
2150 bios_wr32(bios, reg, value1); 2476 bios_wr32(bios, reg, value1);
2151 2477
2152 udelay(10); 2478 udelay(10);
@@ -2182,7 +2508,7 @@ init_configure_mem(struct nvbios *bios, uint16_t offset,
2182 uint32_t reg, data; 2508 uint32_t reg, data;
2183 2509
2184 if (bios->major_version > 2) 2510 if (bios->major_version > 2)
2185 return -ENODEV; 2511 return 0;
2186 2512
2187 bios_idxprt_wr(bios, NV_VIO_SRX, NV_VIO_SR_CLOCK_INDEX, bios_idxprt_rd( 2513 bios_idxprt_wr(bios, NV_VIO_SRX, NV_VIO_SR_CLOCK_INDEX, bios_idxprt_rd(
2188 bios, NV_VIO_SRX, NV_VIO_SR_CLOCK_INDEX) | 0x20); 2514 bios, NV_VIO_SRX, NV_VIO_SR_CLOCK_INDEX) | 0x20);
@@ -2195,14 +2521,14 @@ init_configure_mem(struct nvbios *bios, uint16_t offset,
2195 reg = ROM32(bios->data[seqtbloffs += 4])) { 2521 reg = ROM32(bios->data[seqtbloffs += 4])) {
2196 2522
2197 switch (reg) { 2523 switch (reg) {
2198 case NV_PFB_PRE: 2524 case NV04_PFB_PRE:
2199 data = NV_PFB_PRE_CMD_PRECHARGE; 2525 data = NV04_PFB_PRE_CMD_PRECHARGE;
2200 break; 2526 break;
2201 case NV_PFB_PAD: 2527 case NV04_PFB_PAD:
2202 data = NV_PFB_PAD_CKE_NORMAL; 2528 data = NV04_PFB_PAD_CKE_NORMAL;
2203 break; 2529 break;
2204 case NV_PFB_REF: 2530 case NV04_PFB_REF:
2205 data = NV_PFB_REF_CMD_REFRESH; 2531 data = NV04_PFB_REF_CMD_REFRESH;
2206 break; 2532 break;
2207 default: 2533 default:
2208 data = ROM32(bios->data[meminitdata]); 2534 data = ROM32(bios->data[meminitdata]);
@@ -2237,7 +2563,7 @@ init_configure_clk(struct nvbios *bios, uint16_t offset,
2237 int clock; 2563 int clock;
2238 2564
2239 if (bios->major_version > 2) 2565 if (bios->major_version > 2)
2240 return -ENODEV; 2566 return 0;
2241 2567
2242 clock = ROM16(bios->data[meminitoffs + 4]) * 10; 2568 clock = ROM16(bios->data[meminitoffs + 4]) * 10;
2243 setPLL(bios, NV_PRAMDAC_NVPLL_COEFF, clock); 2569 setPLL(bios, NV_PRAMDAC_NVPLL_COEFF, clock);
@@ -2270,7 +2596,7 @@ init_configure_preinit(struct nvbios *bios, uint16_t offset,
2270 uint8_t cr3c = ((straps << 2) & 0xf0) | (straps & (1 << 6)); 2596 uint8_t cr3c = ((straps << 2) & 0xf0) | (straps & (1 << 6));
2271 2597
2272 if (bios->major_version > 2) 2598 if (bios->major_version > 2)
2273 return -ENODEV; 2599 return 0;
2274 2600
2275 bios_idxprt_wr(bios, NV_CIO_CRX__COLOR, 2601 bios_idxprt_wr(bios, NV_CIO_CRX__COLOR,
2276 NV_CIO_CRE_SCRATCH4__INDEX, cr3c); 2602 NV_CIO_CRE_SCRATCH4__INDEX, cr3c);
@@ -2404,7 +2730,7 @@ init_ram_condition(struct nvbios *bios, uint16_t offset,
2404 * offset + 1 (8 bit): mask 2730 * offset + 1 (8 bit): mask
2405 * offset + 2 (8 bit): cmpval 2731 * offset + 2 (8 bit): cmpval
2406 * 2732 *
2407 * Test if (NV_PFB_BOOT_0 & "mask") equals "cmpval". 2733 * Test if (NV04_PFB_BOOT_0 & "mask") equals "cmpval".
2408 * If condition not met skip subsequent opcodes until condition is 2734 * If condition not met skip subsequent opcodes until condition is
2409 * inverted (INIT_NOT), or we hit INIT_RESUME 2735 * inverted (INIT_NOT), or we hit INIT_RESUME
2410 */ 2736 */
@@ -2416,7 +2742,7 @@ init_ram_condition(struct nvbios *bios, uint16_t offset,
2416 if (!iexec->execute) 2742 if (!iexec->execute)
2417 return 3; 2743 return 3;
2418 2744
2419 data = bios_rd32(bios, NV_PFB_BOOT_0) & mask; 2745 data = bios_rd32(bios, NV04_PFB_BOOT_0) & mask;
2420 2746
2421 BIOSLOG(bios, "0x%04X: Checking if 0x%08X equals 0x%08X\n", 2747 BIOSLOG(bios, "0x%04X: Checking if 0x%08X equals 0x%08X\n",
2422 offset, data, cmpval); 2748 offset, data, cmpval);
@@ -2810,12 +3136,13 @@ init_gpio(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2810 */ 3136 */
2811 3137
2812 struct drm_nouveau_private *dev_priv = bios->dev->dev_private; 3138 struct drm_nouveau_private *dev_priv = bios->dev->dev_private;
3139 struct nouveau_gpio_engine *pgpio = &dev_priv->engine.gpio;
2813 const uint32_t nv50_gpio_ctl[2] = { 0xe100, 0xe28c }; 3140 const uint32_t nv50_gpio_ctl[2] = { 0xe100, 0xe28c };
2814 int i; 3141 int i;
2815 3142
2816 if (dev_priv->card_type != NV_50) { 3143 if (dev_priv->card_type != NV_50) {
2817 NV_ERROR(bios->dev, "INIT_GPIO on unsupported chipset\n"); 3144 NV_ERROR(bios->dev, "INIT_GPIO on unsupported chipset\n");
2818 return -ENODEV; 3145 return 1;
2819 } 3146 }
2820 3147
2821 if (!iexec->execute) 3148 if (!iexec->execute)
@@ -2830,7 +3157,7 @@ init_gpio(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2830 BIOSLOG(bios, "0x%04X: set gpio 0x%02x, state %d\n", 3157 BIOSLOG(bios, "0x%04X: set gpio 0x%02x, state %d\n",
2831 offset, gpio->tag, gpio->state_default); 3158 offset, gpio->tag, gpio->state_default);
2832 if (bios->execute) 3159 if (bios->execute)
2833 nv50_gpio_set(bios->dev, gpio->tag, gpio->state_default); 3160 pgpio->set(bios->dev, gpio->tag, gpio->state_default);
2834 3161
2835 /* The NVIDIA binary driver doesn't appear to actually do 3162 /* The NVIDIA binary driver doesn't appear to actually do
2836 * any of this, my VBIOS does however. 3163 * any of this, my VBIOS does however.
@@ -2887,10 +3214,7 @@ init_ram_restrict_zm_reg_group(struct nvbios *bios, uint16_t offset,
2887 uint8_t index; 3214 uint8_t index;
2888 int i; 3215 int i;
2889 3216
2890 3217 /* critical! to know the length of the opcode */;
2891 if (!iexec->execute)
2892 return len;
2893
2894 if (!blocklen) { 3218 if (!blocklen) {
2895 NV_ERROR(bios->dev, 3219 NV_ERROR(bios->dev,
2896 "0x%04X: Zero block length - has the M table " 3220 "0x%04X: Zero block length - has the M table "
@@ -2898,6 +3222,9 @@ init_ram_restrict_zm_reg_group(struct nvbios *bios, uint16_t offset,
2898 return -EINVAL; 3222 return -EINVAL;
2899 } 3223 }
2900 3224
3225 if (!iexec->execute)
3226 return len;
3227
2901 strap_ramcfg = (bios_rd32(bios, NV_PEXTDEV_BOOT_0) >> 2) & 0xf; 3228 strap_ramcfg = (bios_rd32(bios, NV_PEXTDEV_BOOT_0) >> 2) & 0xf;
2902 index = bios->data[bios->ram_restrict_tbl_ptr + strap_ramcfg]; 3229 index = bios->data[bios->ram_restrict_tbl_ptr + strap_ramcfg];
2903 3230
@@ -3079,14 +3406,14 @@ init_auxch(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
3079 3406
3080 if (!bios->display.output) { 3407 if (!bios->display.output) {
3081 NV_ERROR(dev, "INIT_AUXCH: no active output\n"); 3408 NV_ERROR(dev, "INIT_AUXCH: no active output\n");
3082 return -EINVAL; 3409 return len;
3083 } 3410 }
3084 3411
3085 auxch = init_i2c_device_find(dev, bios->display.output->i2c_index); 3412 auxch = init_i2c_device_find(dev, bios->display.output->i2c_index);
3086 if (!auxch) { 3413 if (!auxch) {
3087 NV_ERROR(dev, "INIT_AUXCH: couldn't get auxch %d\n", 3414 NV_ERROR(dev, "INIT_AUXCH: couldn't get auxch %d\n",
3088 bios->display.output->i2c_index); 3415 bios->display.output->i2c_index);
3089 return -ENODEV; 3416 return len;
3090 } 3417 }
3091 3418
3092 if (!iexec->execute) 3419 if (!iexec->execute)
@@ -3099,7 +3426,7 @@ init_auxch(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
3099 ret = nouveau_dp_auxch(auxch, 9, addr, &data, 1); 3426 ret = nouveau_dp_auxch(auxch, 9, addr, &data, 1);
3100 if (ret) { 3427 if (ret) {
3101 NV_ERROR(dev, "INIT_AUXCH: rd auxch fail %d\n", ret); 3428 NV_ERROR(dev, "INIT_AUXCH: rd auxch fail %d\n", ret);
3102 return ret; 3429 return len;
3103 } 3430 }
3104 3431
3105 data &= bios->data[offset + 0]; 3432 data &= bios->data[offset + 0];
@@ -3108,7 +3435,7 @@ init_auxch(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
3108 ret = nouveau_dp_auxch(auxch, 8, addr, &data, 1); 3435 ret = nouveau_dp_auxch(auxch, 8, addr, &data, 1);
3109 if (ret) { 3436 if (ret) {
3110 NV_ERROR(dev, "INIT_AUXCH: wr auxch fail %d\n", ret); 3437 NV_ERROR(dev, "INIT_AUXCH: wr auxch fail %d\n", ret);
3111 return ret; 3438 return len;
3112 } 3439 }
3113 } 3440 }
3114 3441
@@ -3138,14 +3465,14 @@ init_zm_auxch(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
3138 3465
3139 if (!bios->display.output) { 3466 if (!bios->display.output) {
3140 NV_ERROR(dev, "INIT_ZM_AUXCH: no active output\n"); 3467 NV_ERROR(dev, "INIT_ZM_AUXCH: no active output\n");
3141 return -EINVAL; 3468 return len;
3142 } 3469 }
3143 3470
3144 auxch = init_i2c_device_find(dev, bios->display.output->i2c_index); 3471 auxch = init_i2c_device_find(dev, bios->display.output->i2c_index);
3145 if (!auxch) { 3472 if (!auxch) {
3146 NV_ERROR(dev, "INIT_ZM_AUXCH: couldn't get auxch %d\n", 3473 NV_ERROR(dev, "INIT_ZM_AUXCH: couldn't get auxch %d\n",
3147 bios->display.output->i2c_index); 3474 bios->display.output->i2c_index);
3148 return -ENODEV; 3475 return len;
3149 } 3476 }
3150 3477
3151 if (!iexec->execute) 3478 if (!iexec->execute)
@@ -3156,7 +3483,7 @@ init_zm_auxch(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
3156 ret = nouveau_dp_auxch(auxch, 8, addr, &bios->data[offset], 1); 3483 ret = nouveau_dp_auxch(auxch, 8, addr, &bios->data[offset], 1);
3157 if (ret) { 3484 if (ret) {
3158 NV_ERROR(dev, "INIT_ZM_AUXCH: wr auxch fail %d\n", ret); 3485 NV_ERROR(dev, "INIT_ZM_AUXCH: wr auxch fail %d\n", ret);
3159 return ret; 3486 return len;
3160 } 3487 }
3161 } 3488 }
3162 3489
@@ -5166,10 +5493,14 @@ static int parse_bmp_structure(struct drm_device *dev, struct nvbios *bios, unsi
5166 bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset]; 5493 bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset];
5167 bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1]; 5494 bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1];
5168 bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2]; 5495 bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2];
5169 bios->dcb.i2c[0].write = bios->data[legacy_i2c_offset + 4]; 5496 if (bios->data[legacy_i2c_offset + 4])
5170 bios->dcb.i2c[0].read = bios->data[legacy_i2c_offset + 5]; 5497 bios->dcb.i2c[0].write = bios->data[legacy_i2c_offset + 4];
5171 bios->dcb.i2c[1].write = bios->data[legacy_i2c_offset + 6]; 5498 if (bios->data[legacy_i2c_offset + 5])
5172 bios->dcb.i2c[1].read = bios->data[legacy_i2c_offset + 7]; 5499 bios->dcb.i2c[0].read = bios->data[legacy_i2c_offset + 5];
5500 if (bios->data[legacy_i2c_offset + 6])
5501 bios->dcb.i2c[1].write = bios->data[legacy_i2c_offset + 6];
5502 if (bios->data[legacy_i2c_offset + 7])
5503 bios->dcb.i2c[1].read = bios->data[legacy_i2c_offset + 7];
5173 5504
5174 if (bmplength > 74) { 5505 if (bmplength > 74) {
5175 bios->fmaxvco = ROM32(bmp[67]); 5506 bios->fmaxvco = ROM32(bmp[67]);
@@ -5604,9 +5935,12 @@ parse_dcb20_entry(struct drm_device *dev, struct dcb_table *dcb,
5604 if (conf & 0x4 || conf & 0x8) 5935 if (conf & 0x4 || conf & 0x8)
5605 entry->lvdsconf.use_power_scripts = true; 5936 entry->lvdsconf.use_power_scripts = true;
5606 } else { 5937 } else {
5607 mask = ~0x5; 5938 mask = ~0x7;
5939 if (conf & 0x2)
5940 entry->lvdsconf.use_acpi_for_edid = true;
5608 if (conf & 0x4) 5941 if (conf & 0x4)
5609 entry->lvdsconf.use_power_scripts = true; 5942 entry->lvdsconf.use_power_scripts = true;
5943 entry->lvdsconf.sor.link = (conf & 0x00000030) >> 4;
5610 } 5944 }
5611 if (conf & mask) { 5945 if (conf & mask) {
5612 /* 5946 /*
@@ -5721,13 +6055,6 @@ parse_dcb15_entry(struct drm_device *dev, struct dcb_table *dcb,
5721 case OUTPUT_TV: 6055 case OUTPUT_TV:
5722 entry->tvconf.has_component_output = false; 6056 entry->tvconf.has_component_output = false;
5723 break; 6057 break;
5724 case OUTPUT_TMDS:
5725 /*
5726 * Invent a DVI-A output, by copying the fields of the DVI-D
5727 * output; reported to work by math_b on an NV20(!).
5728 */
5729 fabricate_vga_output(dcb, entry->i2c_index, entry->heads);
5730 break;
5731 case OUTPUT_LVDS: 6058 case OUTPUT_LVDS:
5732 if ((conn & 0x00003f00) != 0x10) 6059 if ((conn & 0x00003f00) != 0x10)
5733 entry->lvdsconf.use_straps_for_mode = true; 6060 entry->lvdsconf.use_straps_for_mode = true;
@@ -5808,6 +6135,31 @@ void merge_like_dcb_entries(struct drm_device *dev, struct dcb_table *dcb)
5808 dcb->entries = newentries; 6135 dcb->entries = newentries;
5809} 6136}
5810 6137
6138static bool
6139apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf)
6140{
6141 /* Dell Precision M6300
6142 * DCB entry 2: 02025312 00000010
6143 * DCB entry 3: 02026312 00000020
6144 *
6145 * Identical, except apparently a different connector on a
6146 * different SOR link. Not a clue how we're supposed to know
6147 * which one is in use if it even shares an i2c line...
6148 *
6149 * Ignore the connector on the second SOR link to prevent
6150 * nasty problems until this is sorted (assuming it's not a
6151 * VBIOS bug).
6152 */
6153 if ((dev->pdev->device == 0x040d) &&
6154 (dev->pdev->subsystem_vendor == 0x1028) &&
6155 (dev->pdev->subsystem_device == 0x019b)) {
6156 if (*conn == 0x02026312 && *conf == 0x00000020)
6157 return false;
6158 }
6159
6160 return true;
6161}
6162
5811static int 6163static int
5812parse_dcb_table(struct drm_device *dev, struct nvbios *bios, bool twoHeads) 6164parse_dcb_table(struct drm_device *dev, struct nvbios *bios, bool twoHeads)
5813{ 6165{
@@ -5941,6 +6293,9 @@ parse_dcb_table(struct drm_device *dev, struct nvbios *bios, bool twoHeads)
5941 if ((connection & 0x0000000f) == 0x0000000f) 6293 if ((connection & 0x0000000f) == 0x0000000f)
5942 continue; 6294 continue;
5943 6295
6296 if (!apply_dcb_encoder_quirks(dev, i, &connection, &config))
6297 continue;
6298
5944 NV_TRACEWARN(dev, "Raw DCB entry %d: %08x %08x\n", 6299 NV_TRACEWARN(dev, "Raw DCB entry %d: %08x %08x\n",
5945 dcb->entries, connection, config); 6300 dcb->entries, connection, config);
5946 6301
@@ -6196,9 +6551,8 @@ nouveau_run_vbios_init(struct drm_device *dev)
6196 struct nvbios *bios = &dev_priv->vbios; 6551 struct nvbios *bios = &dev_priv->vbios;
6197 int i, ret = 0; 6552 int i, ret = 0;
6198 6553
6199 NVLockVgaCrtcs(dev, false); 6554 /* Reset the BIOS head to 0. */
6200 if (nv_two_heads(dev)) 6555 bios->state.crtchead = 0;
6201 NVSetOwner(dev, bios->state.crtchead);
6202 6556
6203 if (bios->major_version < 5) /* BMP only */ 6557 if (bios->major_version < 5) /* BMP only */
6204 load_nv17_hw_sequencer_ucode(dev, bios); 6558 load_nv17_hw_sequencer_ucode(dev, bios);
@@ -6231,8 +6585,6 @@ nouveau_run_vbios_init(struct drm_device *dev)
6231 } 6585 }
6232 } 6586 }
6233 6587
6234 NVLockVgaCrtcs(dev, true);
6235
6236 return ret; 6588 return ret;
6237} 6589}
6238 6590
@@ -6253,7 +6605,6 @@ static bool
6253nouveau_bios_posted(struct drm_device *dev) 6605nouveau_bios_posted(struct drm_device *dev)
6254{ 6606{
6255 struct drm_nouveau_private *dev_priv = dev->dev_private; 6607 struct drm_nouveau_private *dev_priv = dev->dev_private;
6256 bool was_locked;
6257 unsigned htotal; 6608 unsigned htotal;
6258 6609
6259 if (dev_priv->chipset >= NV_50) { 6610 if (dev_priv->chipset >= NV_50) {
@@ -6263,13 +6614,12 @@ nouveau_bios_posted(struct drm_device *dev)
6263 return true; 6614 return true;
6264 } 6615 }
6265 6616
6266 was_locked = NVLockVgaCrtcs(dev, false);
6267 htotal = NVReadVgaCrtc(dev, 0, 0x06); 6617 htotal = NVReadVgaCrtc(dev, 0, 0x06);
6268 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x01) << 8; 6618 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x01) << 8;
6269 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x20) << 4; 6619 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x20) << 4;
6270 htotal |= (NVReadVgaCrtc(dev, 0, 0x25) & 0x01) << 10; 6620 htotal |= (NVReadVgaCrtc(dev, 0, 0x25) & 0x01) << 10;
6271 htotal |= (NVReadVgaCrtc(dev, 0, 0x41) & 0x01) << 11; 6621 htotal |= (NVReadVgaCrtc(dev, 0, 0x41) & 0x01) << 11;
6272 NVLockVgaCrtcs(dev, was_locked); 6622
6273 return (htotal != 0); 6623 return (htotal != 0);
6274} 6624}
6275 6625
@@ -6278,8 +6628,6 @@ nouveau_bios_init(struct drm_device *dev)
6278{ 6628{
6279 struct drm_nouveau_private *dev_priv = dev->dev_private; 6629 struct drm_nouveau_private *dev_priv = dev->dev_private;
6280 struct nvbios *bios = &dev_priv->vbios; 6630 struct nvbios *bios = &dev_priv->vbios;
6281 uint32_t saved_nv_pextdev_boot_0;
6282 bool was_locked;
6283 int ret; 6631 int ret;
6284 6632
6285 if (!NVInitVBIOS(dev)) 6633 if (!NVInitVBIOS(dev))
@@ -6299,40 +6647,27 @@ nouveau_bios_init(struct drm_device *dev)
6299 if (!bios->major_version) /* we don't run version 0 bios */ 6647 if (!bios->major_version) /* we don't run version 0 bios */
6300 return 0; 6648 return 0;
6301 6649
6302 /* these will need remembering across a suspend */
6303 saved_nv_pextdev_boot_0 = bios_rd32(bios, NV_PEXTDEV_BOOT_0);
6304 bios->state.saved_nv_pfb_cfg0 = bios_rd32(bios, NV_PFB_CFG0);
6305
6306 /* init script execution disabled */ 6650 /* init script execution disabled */
6307 bios->execute = false; 6651 bios->execute = false;
6308 6652
6309 /* ... unless card isn't POSTed already */ 6653 /* ... unless card isn't POSTed already */
6310 if (!nouveau_bios_posted(dev)) { 6654 if (!nouveau_bios_posted(dev)) {
6311 NV_INFO(dev, "Adaptor not initialised\n"); 6655 NV_INFO(dev, "Adaptor not initialised, "
6312 if (dev_priv->card_type < NV_40) { 6656 "running VBIOS init tables.\n");
6313 NV_ERROR(dev, "Unable to POST this chipset\n");
6314 return -ENODEV;
6315 }
6316
6317 NV_INFO(dev, "Running VBIOS init tables\n");
6318 bios->execute = true; 6657 bios->execute = true;
6319 } 6658 }
6320 6659
6321 bios_wr32(bios, NV_PEXTDEV_BOOT_0, saved_nv_pextdev_boot_0);
6322
6323 ret = nouveau_run_vbios_init(dev); 6660 ret = nouveau_run_vbios_init(dev);
6324 if (ret) 6661 if (ret)
6325 return ret; 6662 return ret;
6326 6663
6327 /* feature_byte on BMP is poor, but init always sets CR4B */ 6664 /* feature_byte on BMP is poor, but init always sets CR4B */
6328 was_locked = NVLockVgaCrtcs(dev, false);
6329 if (bios->major_version < 5) 6665 if (bios->major_version < 5)
6330 bios->is_mobile = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_4B) & 0x40; 6666 bios->is_mobile = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_4B) & 0x40;
6331 6667
6332 /* all BIT systems need p_f_m_t for digital_min_front_porch */ 6668 /* all BIT systems need p_f_m_t for digital_min_front_porch */
6333 if (bios->is_mobile || bios->major_version >= 5) 6669 if (bios->is_mobile || bios->major_version >= 5)
6334 ret = parse_fp_mode_table(dev, bios); 6670 ret = parse_fp_mode_table(dev, bios);
6335 NVLockVgaCrtcs(dev, was_locked);
6336 6671
6337 /* allow subsequent scripts to execute */ 6672 /* allow subsequent scripts to execute */
6338 bios->execute = true; 6673 bios->execute = true;
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.h b/drivers/gpu/drm/nouveau/nouveau_bios.h
index adf4ec2d06c0..024458a8d060 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bios.h
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.h
@@ -81,6 +81,7 @@ struct dcb_connector_table_entry {
81 enum dcb_connector_type type; 81 enum dcb_connector_type type;
82 uint8_t index2; 82 uint8_t index2;
83 uint8_t gpio_tag; 83 uint8_t gpio_tag;
84 void *drm;
84}; 85};
85 86
86struct dcb_connector_table { 87struct dcb_connector_table {
@@ -117,6 +118,7 @@ struct dcb_entry {
117 struct { 118 struct {
118 struct sor_conf sor; 119 struct sor_conf sor;
119 bool use_straps_for_mode; 120 bool use_straps_for_mode;
121 bool use_acpi_for_edid;
120 bool use_power_scripts; 122 bool use_power_scripts;
121 } lvdsconf; 123 } lvdsconf;
122 struct { 124 struct {
@@ -249,8 +251,6 @@ struct nvbios {
249 251
250 struct { 252 struct {
251 int crtchead; 253 int crtchead;
252 /* these need remembering across suspend */
253 uint32_t saved_nv_pfb_cfg0;
254 } state; 254 } state;
255 255
256 struct { 256 struct {
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 6f3c19522377..3ca8343c15df 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -461,9 +461,9 @@ nouveau_bo_move_accel_cleanup(struct nouveau_channel *chan,
461 return ret; 461 return ret;
462 462
463 ret = ttm_bo_move_accel_cleanup(&nvbo->bo, fence, NULL, 463 ret = ttm_bo_move_accel_cleanup(&nvbo->bo, fence, NULL,
464 evict, no_wait_reserve, no_wait_gpu, new_mem); 464 evict || (nvbo->channel &&
465 if (nvbo->channel && nvbo->channel != chan) 465 nvbo->channel != chan),
466 ret = nouveau_fence_wait(fence, NULL, false, false); 466 no_wait_reserve, no_wait_gpu, new_mem);
467 nouveau_fence_unref((void *)&fence); 467 nouveau_fence_unref((void *)&fence);
468 return ret; 468 return ret;
469} 469}
@@ -711,8 +711,7 @@ nouveau_bo_move(struct ttm_buffer_object *bo, bool evict, bool intr,
711 return ret; 711 return ret;
712 712
713 /* Software copy if the card isn't up and running yet. */ 713 /* Software copy if the card isn't up and running yet. */
714 if (dev_priv->init_state != NOUVEAU_CARD_INIT_DONE || 714 if (!dev_priv->channel) {
715 !dev_priv->channel) {
716 ret = ttm_bo_move_memcpy(bo, evict, no_wait_reserve, no_wait_gpu, new_mem); 715 ret = ttm_bo_move_memcpy(bo, evict, no_wait_reserve, no_wait_gpu, new_mem);
717 goto out; 716 goto out;
718 } 717 }
@@ -783,7 +782,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
783 break; 782 break;
784 case TTM_PL_VRAM: 783 case TTM_PL_VRAM:
785 mem->bus.offset = mem->mm_node->start << PAGE_SHIFT; 784 mem->bus.offset = mem->mm_node->start << PAGE_SHIFT;
786 mem->bus.base = drm_get_resource_start(dev, 1); 785 mem->bus.base = pci_resource_start(dev->pdev, 1);
787 mem->bus.is_iomem = true; 786 mem->bus.is_iomem = true;
788 break; 787 break;
789 default: 788 default:
diff --git a/drivers/gpu/drm/nouveau/nouveau_calc.c b/drivers/gpu/drm/nouveau/nouveau_calc.c
index 88f9bc0941eb..ca85da784846 100644
--- a/drivers/gpu/drm/nouveau/nouveau_calc.c
+++ b/drivers/gpu/drm/nouveau/nouveau_calc.c
@@ -200,7 +200,7 @@ nv04_update_arb(struct drm_device *dev, int VClk, int bpp,
200 struct nv_sim_state sim_data; 200 struct nv_sim_state sim_data;
201 int MClk = nouveau_hw_get_clock(dev, MPLL); 201 int MClk = nouveau_hw_get_clock(dev, MPLL);
202 int NVClk = nouveau_hw_get_clock(dev, NVPLL); 202 int NVClk = nouveau_hw_get_clock(dev, NVPLL);
203 uint32_t cfg1 = nvReadFB(dev, NV_PFB_CFG1); 203 uint32_t cfg1 = nvReadFB(dev, NV04_PFB_CFG1);
204 204
205 sim_data.pclk_khz = VClk; 205 sim_data.pclk_khz = VClk;
206 sim_data.mclk_khz = MClk; 206 sim_data.mclk_khz = MClk;
@@ -218,7 +218,7 @@ nv04_update_arb(struct drm_device *dev, int VClk, int bpp,
218 sim_data.mem_latency = 3; 218 sim_data.mem_latency = 3;
219 sim_data.mem_page_miss = 10; 219 sim_data.mem_page_miss = 10;
220 } else { 220 } else {
221 sim_data.memory_type = nvReadFB(dev, NV_PFB_CFG0) & 0x1; 221 sim_data.memory_type = nvReadFB(dev, NV04_PFB_CFG0) & 0x1;
222 sim_data.memory_width = (nvReadEXTDEV(dev, NV_PEXTDEV_BOOT_0) & 0x10) ? 128 : 64; 222 sim_data.memory_width = (nvReadEXTDEV(dev, NV_PEXTDEV_BOOT_0) & 0x10) ? 128 : 64;
223 sim_data.mem_latency = cfg1 & 0xf; 223 sim_data.mem_latency = cfg1 & 0xf;
224 sim_data.mem_page_miss = ((cfg1 >> 4) & 0xf) + ((cfg1 >> 31) & 0x1); 224 sim_data.mem_page_miss = ((cfg1 >> 4) & 0xf) + ((cfg1 >> 31) & 0x1);
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c
index 1fc57ef58295..90fdcda332be 100644
--- a/drivers/gpu/drm/nouveau/nouveau_channel.c
+++ b/drivers/gpu/drm/nouveau/nouveau_channel.c
@@ -62,7 +62,8 @@ nouveau_channel_pushbuf_ctxdma_init(struct nouveau_channel *chan)
62 * VRAM. 62 * VRAM.
63 */ 63 */
64 ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, 64 ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
65 drm_get_resource_start(dev, 1), 65 pci_resource_start(dev->pdev,
66 1),
66 dev_priv->fb_available_size, 67 dev_priv->fb_available_size,
67 NV_DMA_ACCESS_RO, 68 NV_DMA_ACCESS_RO,
68 NV_DMA_TARGET_PCI, &pushbuf); 69 NV_DMA_TARGET_PCI, &pushbuf);
@@ -257,9 +258,7 @@ nouveau_channel_free(struct nouveau_channel *chan)
257 nouveau_debugfs_channel_fini(chan); 258 nouveau_debugfs_channel_fini(chan);
258 259
259 /* Give outstanding push buffers a chance to complete */ 260 /* Give outstanding push buffers a chance to complete */
260 spin_lock_irqsave(&chan->fence.lock, flags);
261 nouveau_fence_update(chan); 261 nouveau_fence_update(chan);
262 spin_unlock_irqrestore(&chan->fence.lock, flags);
263 if (chan->fence.sequence != chan->fence.sequence_ack) { 262 if (chan->fence.sequence != chan->fence.sequence_ack) {
264 struct nouveau_fence *fence = NULL; 263 struct nouveau_fence *fence = NULL;
265 264
@@ -368,8 +367,6 @@ nouveau_ioctl_fifo_alloc(struct drm_device *dev, void *data,
368 struct nouveau_channel *chan; 367 struct nouveau_channel *chan;
369 int ret; 368 int ret;
370 369
371 NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
372
373 if (dev_priv->engine.graph.accel_blocked) 370 if (dev_priv->engine.graph.accel_blocked)
374 return -ENODEV; 371 return -ENODEV;
375 372
@@ -418,7 +415,6 @@ nouveau_ioctl_fifo_free(struct drm_device *dev, void *data,
418 struct drm_nouveau_channel_free *cfree = data; 415 struct drm_nouveau_channel_free *cfree = data;
419 struct nouveau_channel *chan; 416 struct nouveau_channel *chan;
420 417
421 NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
422 NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(cfree->channel, file_priv, chan); 418 NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(cfree->channel, file_priv, chan);
423 419
424 nouveau_channel_free(chan); 420 nouveau_channel_free(chan);
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c
index 149ed224c3cb..734e92635e83 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.c
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c
@@ -102,63 +102,15 @@ nouveau_connector_destroy(struct drm_connector *drm_connector)
102 kfree(drm_connector); 102 kfree(drm_connector);
103} 103}
104 104
105static void
106nouveau_connector_ddc_prepare(struct drm_connector *connector, int *flags)
107{
108 struct drm_nouveau_private *dev_priv = connector->dev->dev_private;
109
110 if (dev_priv->card_type >= NV_50)
111 return;
112
113 *flags = 0;
114 if (NVLockVgaCrtcs(dev_priv->dev, false))
115 *flags |= 1;
116 if (nv_heads_tied(dev_priv->dev))
117 *flags |= 2;
118
119 if (*flags & 2)
120 NVSetOwner(dev_priv->dev, 0); /* necessary? */
121}
122
123static void
124nouveau_connector_ddc_finish(struct drm_connector *connector, int flags)
125{
126 struct drm_nouveau_private *dev_priv = connector->dev->dev_private;
127
128 if (dev_priv->card_type >= NV_50)
129 return;
130
131 if (flags & 2)
132 NVSetOwner(dev_priv->dev, 4);
133 if (flags & 1)
134 NVLockVgaCrtcs(dev_priv->dev, true);
135}
136
137static struct nouveau_i2c_chan * 105static struct nouveau_i2c_chan *
138nouveau_connector_ddc_detect(struct drm_connector *connector, 106nouveau_connector_ddc_detect(struct drm_connector *connector,
139 struct nouveau_encoder **pnv_encoder) 107 struct nouveau_encoder **pnv_encoder)
140{ 108{
141 struct drm_device *dev = connector->dev; 109 struct drm_device *dev = connector->dev;
142 uint8_t out_buf[] = { 0x0, 0x0}, buf[2]; 110 int i;
143 int ret, flags, i;
144
145 struct i2c_msg msgs[] = {
146 {
147 .addr = 0x50,
148 .flags = 0,
149 .len = 1,
150 .buf = out_buf,
151 },
152 {
153 .addr = 0x50,
154 .flags = I2C_M_RD,
155 .len = 1,
156 .buf = buf,
157 }
158 };
159 111
160 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { 112 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
161 struct nouveau_i2c_chan *i2c = NULL; 113 struct nouveau_i2c_chan *i2c;
162 struct nouveau_encoder *nv_encoder; 114 struct nouveau_encoder *nv_encoder;
163 struct drm_mode_object *obj; 115 struct drm_mode_object *obj;
164 int id; 116 int id;
@@ -171,17 +123,9 @@ nouveau_connector_ddc_detect(struct drm_connector *connector,
171 if (!obj) 123 if (!obj)
172 continue; 124 continue;
173 nv_encoder = nouveau_encoder(obj_to_encoder(obj)); 125 nv_encoder = nouveau_encoder(obj_to_encoder(obj));
126 i2c = nouveau_i2c_find(dev, nv_encoder->dcb->i2c_index);
174 127
175 if (nv_encoder->dcb->i2c_index < 0xf) 128 if (i2c && nouveau_probe_i2c_addr(i2c, 0x50)) {
176 i2c = nouveau_i2c_find(dev, nv_encoder->dcb->i2c_index);
177 if (!i2c)
178 continue;
179
180 nouveau_connector_ddc_prepare(connector, &flags);
181 ret = i2c_transfer(&i2c->adapter, msgs, 2);
182 nouveau_connector_ddc_finish(connector, flags);
183
184 if (ret == 2) {
185 *pnv_encoder = nv_encoder; 129 *pnv_encoder = nv_encoder;
186 return i2c; 130 return i2c;
187 } 131 }
@@ -234,21 +178,7 @@ nouveau_connector_detect(struct drm_connector *connector)
234 struct nouveau_connector *nv_connector = nouveau_connector(connector); 178 struct nouveau_connector *nv_connector = nouveau_connector(connector);
235 struct nouveau_encoder *nv_encoder = NULL; 179 struct nouveau_encoder *nv_encoder = NULL;
236 struct nouveau_i2c_chan *i2c; 180 struct nouveau_i2c_chan *i2c;
237 int type, flags; 181 int type;
238
239 if (nv_connector->dcb->type == DCB_CONNECTOR_LVDS)
240 nv_encoder = find_encoder_by_type(connector, OUTPUT_LVDS);
241 if (nv_encoder && nv_connector->native_mode) {
242 unsigned status = connector_status_connected;
243
244#if defined(CONFIG_ACPI_BUTTON) || \
245 (defined(CONFIG_ACPI_BUTTON_MODULE) && defined(MODULE))
246 if (!nouveau_ignorelid && !acpi_lid_open())
247 status = connector_status_unknown;
248#endif
249 nouveau_connector_set_encoder(connector, nv_encoder);
250 return status;
251 }
252 182
253 /* Cleanup the previous EDID block. */ 183 /* Cleanup the previous EDID block. */
254 if (nv_connector->edid) { 184 if (nv_connector->edid) {
@@ -259,9 +189,7 @@ nouveau_connector_detect(struct drm_connector *connector)
259 189
260 i2c = nouveau_connector_ddc_detect(connector, &nv_encoder); 190 i2c = nouveau_connector_ddc_detect(connector, &nv_encoder);
261 if (i2c) { 191 if (i2c) {
262 nouveau_connector_ddc_prepare(connector, &flags);
263 nv_connector->edid = drm_get_edid(connector, &i2c->adapter); 192 nv_connector->edid = drm_get_edid(connector, &i2c->adapter);
264 nouveau_connector_ddc_finish(connector, flags);
265 drm_mode_connector_update_edid_property(connector, 193 drm_mode_connector_update_edid_property(connector,
266 nv_connector->edid); 194 nv_connector->edid);
267 if (!nv_connector->edid) { 195 if (!nv_connector->edid) {
@@ -321,6 +249,85 @@ detect_analog:
321 return connector_status_disconnected; 249 return connector_status_disconnected;
322} 250}
323 251
252static enum drm_connector_status
253nouveau_connector_detect_lvds(struct drm_connector *connector)
254{
255 struct drm_device *dev = connector->dev;
256 struct drm_nouveau_private *dev_priv = dev->dev_private;
257 struct nouveau_connector *nv_connector = nouveau_connector(connector);
258 struct nouveau_encoder *nv_encoder = NULL;
259 enum drm_connector_status status = connector_status_disconnected;
260
261 /* Cleanup the previous EDID block. */
262 if (nv_connector->edid) {
263 drm_mode_connector_update_edid_property(connector, NULL);
264 kfree(nv_connector->edid);
265 nv_connector->edid = NULL;
266 }
267
268 nv_encoder = find_encoder_by_type(connector, OUTPUT_LVDS);
269 if (!nv_encoder)
270 return connector_status_disconnected;
271
272 /* Try retrieving EDID via DDC */
273 if (!dev_priv->vbios.fp_no_ddc) {
274 status = nouveau_connector_detect(connector);
275 if (status == connector_status_connected)
276 goto out;
277 }
278
279 /* On some laptops (Sony, i'm looking at you) there appears to
280 * be no direct way of accessing the panel's EDID. The only
281 * option available to us appears to be to ask ACPI for help..
282 *
283 * It's important this check's before trying straps, one of the
284 * said manufacturer's laptops are configured in such a way
285 * the nouveau decides an entry in the VBIOS FP mode table is
286 * valid - it's not (rh#613284)
287 */
288 if (nv_encoder->dcb->lvdsconf.use_acpi_for_edid) {
289 if (!nouveau_acpi_edid(dev, connector)) {
290 status = connector_status_connected;
291 goto out;
292 }
293 }
294
295 /* If no EDID found above, and the VBIOS indicates a hardcoded
296 * modeline is avalilable for the panel, set it as the panel's
297 * native mode and exit.
298 */
299 if (nouveau_bios_fp_mode(dev, NULL) && (dev_priv->vbios.fp_no_ddc ||
300 nv_encoder->dcb->lvdsconf.use_straps_for_mode)) {
301 status = connector_status_connected;
302 goto out;
303 }
304
305 /* Still nothing, some VBIOS images have a hardcoded EDID block
306 * stored for the panel stored in them.
307 */
308 if (!dev_priv->vbios.fp_no_ddc) {
309 struct edid *edid =
310 (struct edid *)nouveau_bios_embedded_edid(dev);
311 if (edid) {
312 nv_connector->edid = kmalloc(EDID_LENGTH, GFP_KERNEL);
313 *(nv_connector->edid) = *edid;
314 status = connector_status_connected;
315 }
316 }
317
318out:
319#if defined(CONFIG_ACPI_BUTTON) || \
320 (defined(CONFIG_ACPI_BUTTON_MODULE) && defined(MODULE))
321 if (status == connector_status_connected &&
322 !nouveau_ignorelid && !acpi_lid_open())
323 status = connector_status_unknown;
324#endif
325
326 drm_mode_connector_update_edid_property(connector, nv_connector->edid);
327 nouveau_connector_set_encoder(connector, nv_encoder);
328 return status;
329}
330
324static void 331static void
325nouveau_connector_force(struct drm_connector *connector) 332nouveau_connector_force(struct drm_connector *connector)
326{ 333{
@@ -441,7 +448,8 @@ nouveau_connector_native_mode(struct drm_connector *connector)
441 int high_w = 0, high_h = 0, high_v = 0; 448 int high_w = 0, high_h = 0, high_v = 0;
442 449
443 list_for_each_entry(mode, &nv_connector->base.probed_modes, head) { 450 list_for_each_entry(mode, &nv_connector->base.probed_modes, head) {
444 if (helper->mode_valid(connector, mode) != MODE_OK) 451 if (helper->mode_valid(connector, mode) != MODE_OK ||
452 (mode->flags & DRM_MODE_FLAG_INTERLACE))
445 continue; 453 continue;
446 454
447 /* Use preferred mode if there is one.. */ 455 /* Use preferred mode if there is one.. */
@@ -534,21 +542,27 @@ static int
534nouveau_connector_get_modes(struct drm_connector *connector) 542nouveau_connector_get_modes(struct drm_connector *connector)
535{ 543{
536 struct drm_device *dev = connector->dev; 544 struct drm_device *dev = connector->dev;
545 struct drm_nouveau_private *dev_priv = dev->dev_private;
537 struct nouveau_connector *nv_connector = nouveau_connector(connector); 546 struct nouveau_connector *nv_connector = nouveau_connector(connector);
538 struct nouveau_encoder *nv_encoder = nv_connector->detected_encoder; 547 struct nouveau_encoder *nv_encoder = nv_connector->detected_encoder;
539 int ret = 0; 548 int ret = 0;
540 549
541 /* If we're not LVDS, destroy the previous native mode, the attached 550 /* destroy the native mode, the attached monitor could have changed.
542 * monitor could have changed.
543 */ 551 */
544 if (nv_connector->dcb->type != DCB_CONNECTOR_LVDS && 552 if (nv_connector->native_mode) {
545 nv_connector->native_mode) {
546 drm_mode_destroy(dev, nv_connector->native_mode); 553 drm_mode_destroy(dev, nv_connector->native_mode);
547 nv_connector->native_mode = NULL; 554 nv_connector->native_mode = NULL;
548 } 555 }
549 556
550 if (nv_connector->edid) 557 if (nv_connector->edid)
551 ret = drm_add_edid_modes(connector, nv_connector->edid); 558 ret = drm_add_edid_modes(connector, nv_connector->edid);
559 else
560 if (nv_encoder->dcb->type == OUTPUT_LVDS &&
561 (nv_encoder->dcb->lvdsconf.use_straps_for_mode ||
562 dev_priv->vbios.fp_no_ddc) && nouveau_bios_fp_mode(dev, NULL)) {
563 nv_connector->native_mode = drm_mode_create(dev);
564 nouveau_bios_fp_mode(dev, nv_connector->native_mode);
565 }
552 566
553 /* Find the native mode if this is a digital panel, if we didn't 567 /* Find the native mode if this is a digital panel, if we didn't
554 * find any modes through DDC previously add the native mode to 568 * find any modes through DDC previously add the native mode to
@@ -569,7 +583,8 @@ nouveau_connector_get_modes(struct drm_connector *connector)
569 ret = get_slave_funcs(nv_encoder)-> 583 ret = get_slave_funcs(nv_encoder)->
570 get_modes(to_drm_encoder(nv_encoder), connector); 584 get_modes(to_drm_encoder(nv_encoder), connector);
571 585
572 if (nv_encoder->dcb->type == OUTPUT_LVDS) 586 if (nv_connector->dcb->type == DCB_CONNECTOR_LVDS ||
587 nv_connector->dcb->type == DCB_CONNECTOR_eDP)
573 ret += nouveau_connector_scaler_modes_add(connector); 588 ret += nouveau_connector_scaler_modes_add(connector);
574 589
575 return ret; 590 return ret;
@@ -643,6 +658,44 @@ nouveau_connector_best_encoder(struct drm_connector *connector)
643 return NULL; 658 return NULL;
644} 659}
645 660
661void
662nouveau_connector_set_polling(struct drm_connector *connector)
663{
664 struct drm_device *dev = connector->dev;
665 struct drm_nouveau_private *dev_priv = dev->dev_private;
666 struct drm_crtc *crtc;
667 bool spare_crtc = false;
668
669 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
670 spare_crtc |= !crtc->enabled;
671
672 connector->polled = 0;
673
674 switch (connector->connector_type) {
675 case DRM_MODE_CONNECTOR_VGA:
676 case DRM_MODE_CONNECTOR_TV:
677 if (dev_priv->card_type >= NV_50 ||
678 (nv_gf4_disp_arch(dev) && spare_crtc))
679 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
680 break;
681
682 case DRM_MODE_CONNECTOR_DVII:
683 case DRM_MODE_CONNECTOR_DVID:
684 case DRM_MODE_CONNECTOR_HDMIA:
685 case DRM_MODE_CONNECTOR_DisplayPort:
686 case DRM_MODE_CONNECTOR_eDP:
687 if (dev_priv->card_type >= NV_50)
688 connector->polled = DRM_CONNECTOR_POLL_HPD;
689 else if (connector->connector_type == DRM_MODE_CONNECTOR_DVID ||
690 spare_crtc)
691 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
692 break;
693
694 default:
695 break;
696 }
697}
698
646static const struct drm_connector_helper_funcs 699static const struct drm_connector_helper_funcs
647nouveau_connector_helper_funcs = { 700nouveau_connector_helper_funcs = {
648 .get_modes = nouveau_connector_get_modes, 701 .get_modes = nouveau_connector_get_modes,
@@ -662,148 +715,74 @@ nouveau_connector_funcs = {
662 .force = nouveau_connector_force 715 .force = nouveau_connector_force
663}; 716};
664 717
665static int 718static const struct drm_connector_funcs
666nouveau_connector_create_lvds(struct drm_device *dev, 719nouveau_connector_funcs_lvds = {
667 struct drm_connector *connector) 720 .dpms = drm_helper_connector_dpms,
668{ 721 .save = NULL,
669 struct nouveau_connector *nv_connector = nouveau_connector(connector); 722 .restore = NULL,
670 struct drm_nouveau_private *dev_priv = dev->dev_private; 723 .detect = nouveau_connector_detect_lvds,
671 struct nouveau_i2c_chan *i2c = NULL; 724 .destroy = nouveau_connector_destroy,
672 struct nouveau_encoder *nv_encoder; 725 .fill_modes = drm_helper_probe_single_connector_modes,
673 struct drm_display_mode native, *mode, *temp; 726 .set_property = nouveau_connector_set_property,
674 bool dummy, if_is_24bit = false; 727 .force = nouveau_connector_force
675 int ret, flags; 728};
676
677 nv_encoder = find_encoder_by_type(connector, OUTPUT_LVDS);
678 if (!nv_encoder)
679 return -ENODEV;
680
681 ret = nouveau_bios_parse_lvds_table(dev, 0, &dummy, &if_is_24bit);
682 if (ret) {
683 NV_ERROR(dev, "Error parsing LVDS table, disabling LVDS\n");
684 return ret;
685 }
686 nv_connector->use_dithering = !if_is_24bit;
687
688 /* Firstly try getting EDID over DDC, if allowed and I2C channel
689 * is available.
690 */
691 if (!dev_priv->vbios.fp_no_ddc && nv_encoder->dcb->i2c_index < 0xf)
692 i2c = nouveau_i2c_find(dev, nv_encoder->dcb->i2c_index);
693
694 if (i2c) {
695 nouveau_connector_ddc_prepare(connector, &flags);
696 nv_connector->edid = drm_get_edid(connector, &i2c->adapter);
697 nouveau_connector_ddc_finish(connector, flags);
698 }
699
700 /* If no EDID found above, and the VBIOS indicates a hardcoded
701 * modeline is avalilable for the panel, set it as the panel's
702 * native mode and exit.
703 */
704 if (!nv_connector->edid && nouveau_bios_fp_mode(dev, &native) &&
705 (nv_encoder->dcb->lvdsconf.use_straps_for_mode ||
706 dev_priv->vbios.fp_no_ddc)) {
707 nv_connector->native_mode = drm_mode_duplicate(dev, &native);
708 goto out;
709 }
710
711 /* Still nothing, some VBIOS images have a hardcoded EDID block
712 * stored for the panel stored in them.
713 */
714 if (!nv_connector->edid && !nv_connector->native_mode &&
715 !dev_priv->vbios.fp_no_ddc) {
716 struct edid *edid =
717 (struct edid *)nouveau_bios_embedded_edid(dev);
718 if (edid) {
719 nv_connector->edid = kmalloc(EDID_LENGTH, GFP_KERNEL);
720 *(nv_connector->edid) = *edid;
721 }
722 }
723
724 if (!nv_connector->edid)
725 goto out;
726
727 /* We didn't find/use a panel mode from the VBIOS, so parse the EDID
728 * block and look for the preferred mode there.
729 */
730 ret = drm_add_edid_modes(connector, nv_connector->edid);
731 if (ret == 0)
732 goto out;
733 nv_connector->detected_encoder = nv_encoder;
734 nv_connector->native_mode = nouveau_connector_native_mode(connector);
735 list_for_each_entry_safe(mode, temp, &connector->probed_modes, head)
736 drm_mode_remove(connector, mode);
737
738out:
739 if (!nv_connector->native_mode) {
740 NV_ERROR(dev, "LVDS present in DCB table, but couldn't "
741 "determine its native mode. Disabling.\n");
742 return -ENODEV;
743 }
744
745 drm_mode_connector_update_edid_property(connector, nv_connector->edid);
746 return 0;
747}
748 729
749int 730struct drm_connector *
750nouveau_connector_create(struct drm_device *dev, 731nouveau_connector_create(struct drm_device *dev, int index)
751 struct dcb_connector_table_entry *dcb)
752{ 732{
733 const struct drm_connector_funcs *funcs = &nouveau_connector_funcs;
753 struct drm_nouveau_private *dev_priv = dev->dev_private; 734 struct drm_nouveau_private *dev_priv = dev->dev_private;
754 struct nouveau_connector *nv_connector = NULL; 735 struct nouveau_connector *nv_connector = NULL;
736 struct dcb_connector_table_entry *dcb = NULL;
755 struct drm_connector *connector; 737 struct drm_connector *connector;
756 struct drm_encoder *encoder; 738 int type, ret = 0;
757 int ret, type;
758 739
759 NV_DEBUG_KMS(dev, "\n"); 740 NV_DEBUG_KMS(dev, "\n");
760 741
742 if (index >= dev_priv->vbios.dcb.connector.entries)
743 return ERR_PTR(-EINVAL);
744
745 dcb = &dev_priv->vbios.dcb.connector.entry[index];
746 if (dcb->drm)
747 return dcb->drm;
748
761 switch (dcb->type) { 749 switch (dcb->type) {
762 case DCB_CONNECTOR_NONE:
763 return 0;
764 case DCB_CONNECTOR_VGA: 750 case DCB_CONNECTOR_VGA:
765 NV_INFO(dev, "Detected a VGA connector\n");
766 type = DRM_MODE_CONNECTOR_VGA; 751 type = DRM_MODE_CONNECTOR_VGA;
767 break; 752 break;
768 case DCB_CONNECTOR_TV_0: 753 case DCB_CONNECTOR_TV_0:
769 case DCB_CONNECTOR_TV_1: 754 case DCB_CONNECTOR_TV_1:
770 case DCB_CONNECTOR_TV_3: 755 case DCB_CONNECTOR_TV_3:
771 NV_INFO(dev, "Detected a TV connector\n");
772 type = DRM_MODE_CONNECTOR_TV; 756 type = DRM_MODE_CONNECTOR_TV;
773 break; 757 break;
774 case DCB_CONNECTOR_DVI_I: 758 case DCB_CONNECTOR_DVI_I:
775 NV_INFO(dev, "Detected a DVI-I connector\n");
776 type = DRM_MODE_CONNECTOR_DVII; 759 type = DRM_MODE_CONNECTOR_DVII;
777 break; 760 break;
778 case DCB_CONNECTOR_DVI_D: 761 case DCB_CONNECTOR_DVI_D:
779 NV_INFO(dev, "Detected a DVI-D connector\n");
780 type = DRM_MODE_CONNECTOR_DVID; 762 type = DRM_MODE_CONNECTOR_DVID;
781 break; 763 break;
782 case DCB_CONNECTOR_HDMI_0: 764 case DCB_CONNECTOR_HDMI_0:
783 case DCB_CONNECTOR_HDMI_1: 765 case DCB_CONNECTOR_HDMI_1:
784 NV_INFO(dev, "Detected a HDMI connector\n");
785 type = DRM_MODE_CONNECTOR_HDMIA; 766 type = DRM_MODE_CONNECTOR_HDMIA;
786 break; 767 break;
787 case DCB_CONNECTOR_LVDS: 768 case DCB_CONNECTOR_LVDS:
788 NV_INFO(dev, "Detected a LVDS connector\n");
789 type = DRM_MODE_CONNECTOR_LVDS; 769 type = DRM_MODE_CONNECTOR_LVDS;
770 funcs = &nouveau_connector_funcs_lvds;
790 break; 771 break;
791 case DCB_CONNECTOR_DP: 772 case DCB_CONNECTOR_DP:
792 NV_INFO(dev, "Detected a DisplayPort connector\n");
793 type = DRM_MODE_CONNECTOR_DisplayPort; 773 type = DRM_MODE_CONNECTOR_DisplayPort;
794 break; 774 break;
795 case DCB_CONNECTOR_eDP: 775 case DCB_CONNECTOR_eDP:
796 NV_INFO(dev, "Detected an eDP connector\n");
797 type = DRM_MODE_CONNECTOR_eDP; 776 type = DRM_MODE_CONNECTOR_eDP;
798 break; 777 break;
799 default: 778 default:
800 NV_ERROR(dev, "unknown connector type: 0x%02x!!\n", dcb->type); 779 NV_ERROR(dev, "unknown connector type: 0x%02x!!\n", dcb->type);
801 return -EINVAL; 780 return ERR_PTR(-EINVAL);
802 } 781 }
803 782
804 nv_connector = kzalloc(sizeof(*nv_connector), GFP_KERNEL); 783 nv_connector = kzalloc(sizeof(*nv_connector), GFP_KERNEL);
805 if (!nv_connector) 784 if (!nv_connector)
806 return -ENOMEM; 785 return ERR_PTR(-ENOMEM);
807 nv_connector->dcb = dcb; 786 nv_connector->dcb = dcb;
808 connector = &nv_connector->base; 787 connector = &nv_connector->base;
809 788
@@ -811,27 +790,21 @@ nouveau_connector_create(struct drm_device *dev,
811 connector->interlace_allowed = false; 790 connector->interlace_allowed = false;
812 connector->doublescan_allowed = false; 791 connector->doublescan_allowed = false;
813 792
814 drm_connector_init(dev, connector, &nouveau_connector_funcs, type); 793 drm_connector_init(dev, connector, funcs, type);
815 drm_connector_helper_add(connector, &nouveau_connector_helper_funcs); 794 drm_connector_helper_add(connector, &nouveau_connector_helper_funcs);
816 795
817 /* attach encoders */ 796 /* Check if we need dithering enabled */
818 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 797 if (dcb->type == DCB_CONNECTOR_LVDS) {
819 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 798 bool dummy, is_24bit = false;
820
821 if (nv_encoder->dcb->connector != dcb->index)
822 continue;
823
824 if (get_slave_funcs(nv_encoder))
825 get_slave_funcs(nv_encoder)->create_resources(encoder, connector);
826 799
827 drm_mode_connector_attach_encoder(connector, encoder); 800 ret = nouveau_bios_parse_lvds_table(dev, 0, &dummy, &is_24bit);
828 } 801 if (ret) {
802 NV_ERROR(dev, "Error parsing LVDS table, disabling "
803 "LVDS\n");
804 goto fail;
805 }
829 806
830 if (!connector->encoder_ids[0]) { 807 nv_connector->use_dithering = !is_24bit;
831 NV_WARN(dev, " no encoders, ignoring\n");
832 drm_connector_cleanup(connector);
833 kfree(connector);
834 return 0;
835 } 808 }
836 809
837 /* Init DVI-I specific properties */ 810 /* Init DVI-I specific properties */
@@ -841,12 +814,8 @@ nouveau_connector_create(struct drm_device *dev,
841 drm_connector_attach_property(connector, dev->mode_config.dvi_i_select_subconnector_property, 0); 814 drm_connector_attach_property(connector, dev->mode_config.dvi_i_select_subconnector_property, 0);
842 } 815 }
843 816
844 if (dcb->type != DCB_CONNECTOR_LVDS)
845 nv_connector->use_dithering = false;
846
847 switch (dcb->type) { 817 switch (dcb->type) {
848 case DCB_CONNECTOR_VGA: 818 case DCB_CONNECTOR_VGA:
849 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
850 if (dev_priv->card_type >= NV_50) { 819 if (dev_priv->card_type >= NV_50) {
851 drm_connector_attach_property(connector, 820 drm_connector_attach_property(connector,
852 dev->mode_config.scaling_mode_property, 821 dev->mode_config.scaling_mode_property,
@@ -858,17 +827,6 @@ nouveau_connector_create(struct drm_device *dev,
858 case DCB_CONNECTOR_TV_3: 827 case DCB_CONNECTOR_TV_3:
859 nv_connector->scaling_mode = DRM_MODE_SCALE_NONE; 828 nv_connector->scaling_mode = DRM_MODE_SCALE_NONE;
860 break; 829 break;
861 case DCB_CONNECTOR_DP:
862 case DCB_CONNECTOR_eDP:
863 case DCB_CONNECTOR_HDMI_0:
864 case DCB_CONNECTOR_HDMI_1:
865 case DCB_CONNECTOR_DVI_I:
866 case DCB_CONNECTOR_DVI_D:
867 if (dev_priv->card_type >= NV_50)
868 connector->polled = DRM_CONNECTOR_POLL_HPD;
869 else
870 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
871 /* fall-through */
872 default: 830 default:
873 nv_connector->scaling_mode = DRM_MODE_SCALE_FULLSCREEN; 831 nv_connector->scaling_mode = DRM_MODE_SCALE_FULLSCREEN;
874 832
@@ -882,15 +840,15 @@ nouveau_connector_create(struct drm_device *dev,
882 break; 840 break;
883 } 841 }
884 842
843 nouveau_connector_set_polling(connector);
844
885 drm_sysfs_connector_add(connector); 845 drm_sysfs_connector_add(connector);
846 dcb->drm = connector;
847 return dcb->drm;
886 848
887 if (dcb->type == DCB_CONNECTOR_LVDS) { 849fail:
888 ret = nouveau_connector_create_lvds(dev, connector); 850 drm_connector_cleanup(connector);
889 if (ret) { 851 kfree(connector);
890 connector->funcs->destroy(connector); 852 return ERR_PTR(ret);
891 return ret;
892 }
893 }
894 853
895 return 0;
896} 854}
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.h b/drivers/gpu/drm/nouveau/nouveau_connector.h
index 4ef38abc2d9c..0d2e668ccfe5 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.h
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.h
@@ -49,7 +49,10 @@ static inline struct nouveau_connector *nouveau_connector(
49 return container_of(con, struct nouveau_connector, base); 49 return container_of(con, struct nouveau_connector, base);
50} 50}
51 51
52int nouveau_connector_create(struct drm_device *, 52struct drm_connector *
53 struct dcb_connector_table_entry *); 53nouveau_connector_create(struct drm_device *, int index);
54
55void
56nouveau_connector_set_polling(struct drm_connector *);
54 57
55#endif /* __NOUVEAU_CONNECTOR_H__ */ 58#endif /* __NOUVEAU_CONNECTOR_H__ */
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c b/drivers/gpu/drm/nouveau/nouveau_dma.c
index 65c441a1999f..2e3c6caa97ee 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dma.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dma.c
@@ -92,11 +92,9 @@ nouveau_dma_init(struct nouveau_channel *chan)
92 return ret; 92 return ret;
93 93
94 /* Map M2MF notifier object - fbcon. */ 94 /* Map M2MF notifier object - fbcon. */
95 if (drm_core_check_feature(dev, DRIVER_MODESET)) { 95 ret = nouveau_bo_map(chan->notifier_bo);
96 ret = nouveau_bo_map(chan->notifier_bo); 96 if (ret)
97 if (ret) 97 return ret;
98 return ret;
99 }
100 98
101 /* Insert NOPS for NOUVEAU_DMA_SKIPS */ 99 /* Insert NOPS for NOUVEAU_DMA_SKIPS */
102 ret = RING_SPACE(chan, NOUVEAU_DMA_SKIPS); 100 ret = RING_SPACE(chan, NOUVEAU_DMA_SKIPS);
diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c b/drivers/gpu/drm/nouveau/nouveau_dp.c
index deeb21c6865c..33742b11188b 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dp.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dp.c
@@ -23,8 +23,10 @@
23 */ 23 */
24 24
25#include "drmP.h" 25#include "drmP.h"
26
26#include "nouveau_drv.h" 27#include "nouveau_drv.h"
27#include "nouveau_i2c.h" 28#include "nouveau_i2c.h"
29#include "nouveau_connector.h"
28#include "nouveau_encoder.h" 30#include "nouveau_encoder.h"
29 31
30static int 32static int
@@ -270,13 +272,39 @@ bool
270nouveau_dp_link_train(struct drm_encoder *encoder) 272nouveau_dp_link_train(struct drm_encoder *encoder)
271{ 273{
272 struct drm_device *dev = encoder->dev; 274 struct drm_device *dev = encoder->dev;
275 struct drm_nouveau_private *dev_priv = dev->dev_private;
276 struct nouveau_gpio_engine *pgpio = &dev_priv->engine.gpio;
273 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 277 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
274 uint8_t config[4]; 278 struct nouveau_connector *nv_connector;
275 uint8_t status[3]; 279 struct bit_displayport_encoder_table *dpe;
280 int dpe_headerlen;
281 uint8_t config[4], status[3];
276 bool cr_done, cr_max_vs, eq_done; 282 bool cr_done, cr_max_vs, eq_done;
277 int ret = 0, i, tries, voltage; 283 int ret = 0, i, tries, voltage;
278 284
279 NV_DEBUG_KMS(dev, "link training!!\n"); 285 NV_DEBUG_KMS(dev, "link training!!\n");
286
287 nv_connector = nouveau_encoder_connector_get(nv_encoder);
288 if (!nv_connector)
289 return false;
290
291 dpe = nouveau_bios_dp_table(dev, nv_encoder->dcb, &dpe_headerlen);
292 if (!dpe) {
293 NV_ERROR(dev, "SOR-%d: no DP encoder table!\n", nv_encoder->or);
294 return false;
295 }
296
297 /* disable hotplug detect, this flips around on some panels during
298 * link training.
299 */
300 pgpio->irq_enable(dev, nv_connector->dcb->gpio_tag, false);
301
302 if (dpe->script0) {
303 NV_DEBUG_KMS(dev, "SOR-%d: running DP script 0\n", nv_encoder->or);
304 nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script0),
305 nv_encoder->dcb);
306 }
307
280train: 308train:
281 cr_done = eq_done = false; 309 cr_done = eq_done = false;
282 310
@@ -403,6 +431,15 @@ stop:
403 } 431 }
404 } 432 }
405 433
434 if (dpe->script1) {
435 NV_DEBUG_KMS(dev, "SOR-%d: running DP script 1\n", nv_encoder->or);
436 nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script1),
437 nv_encoder->dcb);
438 }
439
440 /* re-enable hotplug detect */
441 pgpio->irq_enable(dev, nv_connector->dcb->gpio_tag, true);
442
406 return eq_done; 443 return eq_done;
407} 444}
408 445
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.c b/drivers/gpu/drm/nouveau/nouveau_drv.c
index 273770432298..1de5eb53e016 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.c
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.c
@@ -35,10 +35,6 @@
35 35
36#include "drm_pciids.h" 36#include "drm_pciids.h"
37 37
38MODULE_PARM_DESC(ctxfw, "Use external firmware blob for grctx init (NV40)");
39int nouveau_ctxfw = 0;
40module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
41
42MODULE_PARM_DESC(noagp, "Disable AGP"); 38MODULE_PARM_DESC(noagp, "Disable AGP");
43int nouveau_noagp; 39int nouveau_noagp;
44module_param_named(noagp, nouveau_noagp, int, 0400); 40module_param_named(noagp, nouveau_noagp, int, 0400);
@@ -56,7 +52,7 @@ int nouveau_vram_pushbuf;
56module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400); 52module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
57 53
58MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM"); 54MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
59int nouveau_vram_notify = 1; 55int nouveau_vram_notify = 0;
60module_param_named(vram_notify, nouveau_vram_notify, int, 0400); 56module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
61 57
62MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)"); 58MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
@@ -132,7 +128,7 @@ static struct drm_driver driver;
132static int __devinit 128static int __devinit
133nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 129nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
134{ 130{
135 return drm_get_dev(pdev, ent, &driver); 131 return drm_get_pci_dev(pdev, ent, &driver);
136} 132}
137 133
138static void 134static void
@@ -155,9 +151,6 @@ nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
155 struct drm_crtc *crtc; 151 struct drm_crtc *crtc;
156 int ret, i; 152 int ret, i;
157 153
158 if (!drm_core_check_feature(dev, DRIVER_MODESET))
159 return -ENODEV;
160
161 if (pm_state.event == PM_EVENT_PRETHAW) 154 if (pm_state.event == PM_EVENT_PRETHAW)
162 return 0; 155 return 0;
163 156
@@ -257,9 +250,6 @@ nouveau_pci_resume(struct pci_dev *pdev)
257 struct drm_crtc *crtc; 250 struct drm_crtc *crtc;
258 int ret, i; 251 int ret, i;
259 252
260 if (!drm_core_check_feature(dev, DRIVER_MODESET))
261 return -ENODEV;
262
263 nouveau_fbcon_save_disable_accel(dev); 253 nouveau_fbcon_save_disable_accel(dev);
264 254
265 NV_INFO(dev, "We're back, enabling device...\n"); 255 NV_INFO(dev, "We're back, enabling device...\n");
@@ -269,6 +259,13 @@ nouveau_pci_resume(struct pci_dev *pdev)
269 return -1; 259 return -1;
270 pci_set_master(dev->pdev); 260 pci_set_master(dev->pdev);
271 261
262 /* Make sure the AGP controller is in a consistent state */
263 if (dev_priv->gart_info.type == NOUVEAU_GART_AGP)
264 nouveau_mem_reset_agp(dev);
265
266 /* Make the CRTCs accessible */
267 engine->display.early_init(dev);
268
272 NV_INFO(dev, "POSTing device...\n"); 269 NV_INFO(dev, "POSTing device...\n");
273 ret = nouveau_run_vbios_init(dev); 270 ret = nouveau_run_vbios_init(dev);
274 if (ret) 271 if (ret)
@@ -323,7 +320,6 @@ nouveau_pci_resume(struct pci_dev *pdev)
323 320
324 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 321 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
325 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 322 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
326 int ret;
327 323
328 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM); 324 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
329 if (!ret) 325 if (!ret)
@@ -332,11 +328,7 @@ nouveau_pci_resume(struct pci_dev *pdev)
332 NV_ERROR(dev, "Could not pin/map cursor.\n"); 328 NV_ERROR(dev, "Could not pin/map cursor.\n");
333 } 329 }
334 330
335 if (dev_priv->card_type < NV_50) { 331 engine->display.init(dev);
336 nv04_display_restore(dev);
337 NVLockVgaCrtcs(dev, false);
338 } else
339 nv50_display_init(dev);
340 332
341 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 333 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
342 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 334 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
@@ -371,7 +363,8 @@ nouveau_pci_resume(struct pci_dev *pdev)
371static struct drm_driver driver = { 363static struct drm_driver driver = {
372 .driver_features = 364 .driver_features =
373 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG | 365 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
374 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM, 366 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
367 DRIVER_MODESET,
375 .load = nouveau_load, 368 .load = nouveau_load,
376 .firstopen = nouveau_firstopen, 369 .firstopen = nouveau_firstopen,
377 .lastclose = nouveau_lastclose, 370 .lastclose = nouveau_lastclose,
@@ -438,16 +431,18 @@ static int __init nouveau_init(void)
438 nouveau_modeset = 1; 431 nouveau_modeset = 1;
439 } 432 }
440 433
441 if (nouveau_modeset == 1) { 434 if (!nouveau_modeset)
442 driver.driver_features |= DRIVER_MODESET; 435 return 0;
443 nouveau_register_dsm_handler();
444 }
445 436
437 nouveau_register_dsm_handler();
446 return drm_init(&driver); 438 return drm_init(&driver);
447} 439}
448 440
449static void __exit nouveau_exit(void) 441static void __exit nouveau_exit(void)
450{ 442{
443 if (!nouveau_modeset)
444 return;
445
451 drm_exit(&driver); 446 drm_exit(&driver);
452 nouveau_unregister_dsm_handler(); 447 nouveau_unregister_dsm_handler();
453} 448}
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index c69719106489..e15db15dca77 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -123,14 +123,6 @@ nvbo_kmap_obj_iovirtual(struct nouveau_bo *nvbo)
123 return ioptr; 123 return ioptr;
124} 124}
125 125
126struct mem_block {
127 struct mem_block *next;
128 struct mem_block *prev;
129 uint64_t start;
130 uint64_t size;
131 struct drm_file *file_priv; /* NULL: free, -1: heap, other: real files */
132};
133
134enum nouveau_flags { 126enum nouveau_flags {
135 NV_NFORCE = 0x10000000, 127 NV_NFORCE = 0x10000000,
136 NV_NFORCE2 = 0x20000000 128 NV_NFORCE2 = 0x20000000
@@ -149,7 +141,7 @@ struct nouveau_gpuobj {
149 struct list_head list; 141 struct list_head list;
150 142
151 struct nouveau_channel *im_channel; 143 struct nouveau_channel *im_channel;
152 struct mem_block *im_pramin; 144 struct drm_mm_node *im_pramin;
153 struct nouveau_bo *im_backing; 145 struct nouveau_bo *im_backing;
154 uint32_t im_backing_start; 146 uint32_t im_backing_start;
155 uint32_t *im_backing_suspend; 147 uint32_t *im_backing_suspend;
@@ -196,7 +188,7 @@ struct nouveau_channel {
196 struct list_head pending; 188 struct list_head pending;
197 uint32_t sequence; 189 uint32_t sequence;
198 uint32_t sequence_ack; 190 uint32_t sequence_ack;
199 uint32_t last_sequence_irq; 191 atomic_t last_sequence_irq;
200 } fence; 192 } fence;
201 193
202 /* DMA push buffer */ 194 /* DMA push buffer */
@@ -206,7 +198,7 @@ struct nouveau_channel {
206 198
207 /* Notifier memory */ 199 /* Notifier memory */
208 struct nouveau_bo *notifier_bo; 200 struct nouveau_bo *notifier_bo;
209 struct mem_block *notifier_heap; 201 struct drm_mm notifier_heap;
210 202
211 /* PFIFO context */ 203 /* PFIFO context */
212 struct nouveau_gpuobj_ref *ramfc; 204 struct nouveau_gpuobj_ref *ramfc;
@@ -224,7 +216,7 @@ struct nouveau_channel {
224 216
225 /* Objects */ 217 /* Objects */
226 struct nouveau_gpuobj_ref *ramin; /* Private instmem */ 218 struct nouveau_gpuobj_ref *ramin; /* Private instmem */
227 struct mem_block *ramin_heap; /* Private PRAMIN heap */ 219 struct drm_mm ramin_heap; /* Private PRAMIN heap */
228 struct nouveau_gpuobj_ref *ramht; /* Hash table */ 220 struct nouveau_gpuobj_ref *ramht; /* Hash table */
229 struct list_head ramht_refs; /* Objects referenced by RAMHT */ 221 struct list_head ramht_refs; /* Objects referenced by RAMHT */
230 222
@@ -277,8 +269,7 @@ struct nouveau_instmem_engine {
277 void (*clear)(struct drm_device *, struct nouveau_gpuobj *); 269 void (*clear)(struct drm_device *, struct nouveau_gpuobj *);
278 int (*bind)(struct drm_device *, struct nouveau_gpuobj *); 270 int (*bind)(struct drm_device *, struct nouveau_gpuobj *);
279 int (*unbind)(struct drm_device *, struct nouveau_gpuobj *); 271 int (*unbind)(struct drm_device *, struct nouveau_gpuobj *);
280 void (*prepare_access)(struct drm_device *, bool write); 272 void (*flush)(struct drm_device *);
281 void (*finish_access)(struct drm_device *);
282}; 273};
283 274
284struct nouveau_mc_engine { 275struct nouveau_mc_engine {
@@ -303,10 +294,11 @@ struct nouveau_fb_engine {
303}; 294};
304 295
305struct nouveau_fifo_engine { 296struct nouveau_fifo_engine {
306 void *priv;
307
308 int channels; 297 int channels;
309 298
299 struct nouveau_gpuobj_ref *playlist[2];
300 int cur_playlist;
301
310 int (*init)(struct drm_device *); 302 int (*init)(struct drm_device *);
311 void (*takedown)(struct drm_device *); 303 void (*takedown)(struct drm_device *);
312 304
@@ -339,10 +331,11 @@ struct nouveau_pgraph_object_class {
339struct nouveau_pgraph_engine { 331struct nouveau_pgraph_engine {
340 struct nouveau_pgraph_object_class *grclass; 332 struct nouveau_pgraph_object_class *grclass;
341 bool accel_blocked; 333 bool accel_blocked;
342 void *ctxprog;
343 void *ctxvals;
344 int grctx_size; 334 int grctx_size;
345 335
336 /* NV2x/NV3x context table (0x400780) */
337 struct nouveau_gpuobj_ref *ctx_table;
338
346 int (*init)(struct drm_device *); 339 int (*init)(struct drm_device *);
347 void (*takedown)(struct drm_device *); 340 void (*takedown)(struct drm_device *);
348 341
@@ -358,6 +351,24 @@ struct nouveau_pgraph_engine {
358 uint32_t size, uint32_t pitch); 351 uint32_t size, uint32_t pitch);
359}; 352};
360 353
354struct nouveau_display_engine {
355 int (*early_init)(struct drm_device *);
356 void (*late_takedown)(struct drm_device *);
357 int (*create)(struct drm_device *);
358 int (*init)(struct drm_device *);
359 void (*destroy)(struct drm_device *);
360};
361
362struct nouveau_gpio_engine {
363 int (*init)(struct drm_device *);
364 void (*takedown)(struct drm_device *);
365
366 int (*get)(struct drm_device *, enum dcb_gpio_tag);
367 int (*set)(struct drm_device *, enum dcb_gpio_tag, int state);
368
369 void (*irq_enable)(struct drm_device *, enum dcb_gpio_tag, bool on);
370};
371
361struct nouveau_engine { 372struct nouveau_engine {
362 struct nouveau_instmem_engine instmem; 373 struct nouveau_instmem_engine instmem;
363 struct nouveau_mc_engine mc; 374 struct nouveau_mc_engine mc;
@@ -365,6 +376,8 @@ struct nouveau_engine {
365 struct nouveau_fb_engine fb; 376 struct nouveau_fb_engine fb;
366 struct nouveau_pgraph_engine graph; 377 struct nouveau_pgraph_engine graph;
367 struct nouveau_fifo_engine fifo; 378 struct nouveau_fifo_engine fifo;
379 struct nouveau_display_engine display;
380 struct nouveau_gpio_engine gpio;
368}; 381};
369 382
370struct nouveau_pll_vals { 383struct nouveau_pll_vals {
@@ -500,11 +513,6 @@ enum nouveau_card_type {
500 513
501struct drm_nouveau_private { 514struct drm_nouveau_private {
502 struct drm_device *dev; 515 struct drm_device *dev;
503 enum {
504 NOUVEAU_CARD_INIT_DOWN,
505 NOUVEAU_CARD_INIT_DONE,
506 NOUVEAU_CARD_INIT_FAILED
507 } init_state;
508 516
509 /* the card type, takes NV_* as values */ 517 /* the card type, takes NV_* as values */
510 enum nouveau_card_type card_type; 518 enum nouveau_card_type card_type;
@@ -525,7 +533,7 @@ struct drm_nouveau_private {
525 struct list_head vbl_waiting; 533 struct list_head vbl_waiting;
526 534
527 struct { 535 struct {
528 struct ttm_global_reference mem_global_ref; 536 struct drm_global_reference mem_global_ref;
529 struct ttm_bo_global_ref bo_global_ref; 537 struct ttm_bo_global_ref bo_global_ref;
530 struct ttm_bo_device bdev; 538 struct ttm_bo_device bdev;
531 spinlock_t bo_list_lock; 539 spinlock_t bo_list_lock;
@@ -533,8 +541,6 @@ struct drm_nouveau_private {
533 atomic_t validate_sequence; 541 atomic_t validate_sequence;
534 } ttm; 542 } ttm;
535 543
536 struct fb_info *fbdev_info;
537
538 int fifo_alloc_count; 544 int fifo_alloc_count;
539 struct nouveau_channel *fifos[NOUVEAU_MAX_CHANNEL_NR]; 545 struct nouveau_channel *fifos[NOUVEAU_MAX_CHANNEL_NR];
540 546
@@ -595,11 +601,7 @@ struct drm_nouveau_private {
595 struct nouveau_gpuobj *vm_vram_pt[NV50_VM_VRAM_NR]; 601 struct nouveau_gpuobj *vm_vram_pt[NV50_VM_VRAM_NR];
596 int vm_vram_pt_nr; 602 int vm_vram_pt_nr;
597 603
598 struct mem_block *ramin_heap; 604 struct drm_mm ramin_heap;
599
600 /* context table pointed to be NV_PGRAPH_CHANNEL_CTX_TABLE (0x400780) */
601 uint32_t ctx_table_size;
602 struct nouveau_gpuobj_ref *ctx_table;
603 605
604 struct list_head gpuobj_list; 606 struct list_head gpuobj_list;
605 607
@@ -618,6 +620,11 @@ struct drm_nouveau_private {
618 struct backlight_device *backlight; 620 struct backlight_device *backlight;
619 621
620 struct nouveau_channel *evo; 622 struct nouveau_channel *evo;
623 struct {
624 struct dcb_entry *dcb;
625 u16 script;
626 u32 pclk;
627 } evo_irq;
621 628
622 struct { 629 struct {
623 struct dentry *channel_root; 630 struct dentry *channel_root;
@@ -652,14 +659,6 @@ nouveau_bo_ref(struct nouveau_bo *ref, struct nouveau_bo **pnvbo)
652 return 0; 659 return 0;
653} 660}
654 661
655#define NOUVEAU_CHECK_INITIALISED_WITH_RETURN do { \
656 struct drm_nouveau_private *nv = dev->dev_private; \
657 if (nv->init_state != NOUVEAU_CARD_INIT_DONE) { \
658 NV_ERROR(dev, "called without init\n"); \
659 return -EINVAL; \
660 } \
661} while (0)
662
663#define NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(id, cl, ch) do { \ 662#define NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(id, cl, ch) do { \
664 struct drm_nouveau_private *nv = dev->dev_private; \ 663 struct drm_nouveau_private *nv = dev->dev_private; \
665 if (!nouveau_channel_owner(dev, (cl), (id))) { \ 664 if (!nouveau_channel_owner(dev, (cl), (id))) { \
@@ -682,7 +681,6 @@ extern int nouveau_tv_disable;
682extern char *nouveau_tv_norm; 681extern char *nouveau_tv_norm;
683extern int nouveau_reg_debug; 682extern int nouveau_reg_debug;
684extern char *nouveau_vbios; 683extern char *nouveau_vbios;
685extern int nouveau_ctxfw;
686extern int nouveau_ignorelid; 684extern int nouveau_ignorelid;
687extern int nouveau_nofbaccel; 685extern int nouveau_nofbaccel;
688extern int nouveau_noaccel; 686extern int nouveau_noaccel;
@@ -707,17 +705,10 @@ extern bool nouveau_wait_for_idle(struct drm_device *);
707extern int nouveau_card_init(struct drm_device *); 705extern int nouveau_card_init(struct drm_device *);
708 706
709/* nouveau_mem.c */ 707/* nouveau_mem.c */
710extern int nouveau_mem_init_heap(struct mem_block **, uint64_t start,
711 uint64_t size);
712extern struct mem_block *nouveau_mem_alloc_block(struct mem_block *,
713 uint64_t size, int align2,
714 struct drm_file *, int tail);
715extern void nouveau_mem_takedown(struct mem_block **heap);
716extern void nouveau_mem_free_block(struct mem_block *);
717extern int nouveau_mem_detect(struct drm_device *dev); 708extern int nouveau_mem_detect(struct drm_device *dev);
718extern void nouveau_mem_release(struct drm_file *, struct mem_block *heap);
719extern int nouveau_mem_init(struct drm_device *); 709extern int nouveau_mem_init(struct drm_device *);
720extern int nouveau_mem_init_agp(struct drm_device *); 710extern int nouveau_mem_init_agp(struct drm_device *);
711extern int nouveau_mem_reset_agp(struct drm_device *);
721extern void nouveau_mem_close(struct drm_device *); 712extern void nouveau_mem_close(struct drm_device *);
722extern struct nouveau_tile_reg *nv10_mem_set_tiling(struct drm_device *dev, 713extern struct nouveau_tile_reg *nv10_mem_set_tiling(struct drm_device *dev,
723 uint32_t addr, 714 uint32_t addr,
@@ -857,11 +848,13 @@ void nouveau_register_dsm_handler(void);
857void nouveau_unregister_dsm_handler(void); 848void nouveau_unregister_dsm_handler(void);
858int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len); 849int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len);
859bool nouveau_acpi_rom_supported(struct pci_dev *pdev); 850bool nouveau_acpi_rom_supported(struct pci_dev *pdev);
851int nouveau_acpi_edid(struct drm_device *, struct drm_connector *);
860#else 852#else
861static inline void nouveau_register_dsm_handler(void) {} 853static inline void nouveau_register_dsm_handler(void) {}
862static inline void nouveau_unregister_dsm_handler(void) {} 854static inline void nouveau_unregister_dsm_handler(void) {}
863static inline bool nouveau_acpi_rom_supported(struct pci_dev *pdev) { return false; } 855static inline bool nouveau_acpi_rom_supported(struct pci_dev *pdev) { return false; }
864static inline int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len) { return -EINVAL; } 856static inline int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len) { return -EINVAL; }
857static inline int nouveau_acpi_edid(struct drm_device *dev, struct drm_connector *connector) { return -EINVAL; }
865#endif 858#endif
866 859
867/* nouveau_backlight.c */ 860/* nouveau_backlight.c */
@@ -924,6 +917,10 @@ extern void nv10_fb_takedown(struct drm_device *);
924extern void nv10_fb_set_region_tiling(struct drm_device *, int, uint32_t, 917extern void nv10_fb_set_region_tiling(struct drm_device *, int, uint32_t,
925 uint32_t, uint32_t); 918 uint32_t, uint32_t);
926 919
920/* nv30_fb.c */
921extern int nv30_fb_init(struct drm_device *);
922extern void nv30_fb_takedown(struct drm_device *);
923
927/* nv40_fb.c */ 924/* nv40_fb.c */
928extern int nv40_fb_init(struct drm_device *); 925extern int nv40_fb_init(struct drm_device *);
929extern void nv40_fb_takedown(struct drm_device *); 926extern void nv40_fb_takedown(struct drm_device *);
@@ -1035,12 +1032,6 @@ extern int nv50_graph_unload_context(struct drm_device *);
1035extern void nv50_graph_context_switch(struct drm_device *); 1032extern void nv50_graph_context_switch(struct drm_device *);
1036extern int nv50_grctx_init(struct nouveau_grctx *); 1033extern int nv50_grctx_init(struct nouveau_grctx *);
1037 1034
1038/* nouveau_grctx.c */
1039extern int nouveau_grctx_prog_load(struct drm_device *);
1040extern void nouveau_grctx_vals_load(struct drm_device *,
1041 struct nouveau_gpuobj *);
1042extern void nouveau_grctx_fini(struct drm_device *);
1043
1044/* nv04_instmem.c */ 1035/* nv04_instmem.c */
1045extern int nv04_instmem_init(struct drm_device *); 1036extern int nv04_instmem_init(struct drm_device *);
1046extern void nv04_instmem_takedown(struct drm_device *); 1037extern void nv04_instmem_takedown(struct drm_device *);
@@ -1051,8 +1042,7 @@ extern int nv04_instmem_populate(struct drm_device *, struct nouveau_gpuobj *,
1051extern void nv04_instmem_clear(struct drm_device *, struct nouveau_gpuobj *); 1042extern void nv04_instmem_clear(struct drm_device *, struct nouveau_gpuobj *);
1052extern int nv04_instmem_bind(struct drm_device *, struct nouveau_gpuobj *); 1043extern int nv04_instmem_bind(struct drm_device *, struct nouveau_gpuobj *);
1053extern int nv04_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *); 1044extern int nv04_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *);
1054extern void nv04_instmem_prepare_access(struct drm_device *, bool write); 1045extern void nv04_instmem_flush(struct drm_device *);
1055extern void nv04_instmem_finish_access(struct drm_device *);
1056 1046
1057/* nv50_instmem.c */ 1047/* nv50_instmem.c */
1058extern int nv50_instmem_init(struct drm_device *); 1048extern int nv50_instmem_init(struct drm_device *);
@@ -1064,8 +1054,9 @@ extern int nv50_instmem_populate(struct drm_device *, struct nouveau_gpuobj *,
1064extern void nv50_instmem_clear(struct drm_device *, struct nouveau_gpuobj *); 1054extern void nv50_instmem_clear(struct drm_device *, struct nouveau_gpuobj *);
1065extern int nv50_instmem_bind(struct drm_device *, struct nouveau_gpuobj *); 1055extern int nv50_instmem_bind(struct drm_device *, struct nouveau_gpuobj *);
1066extern int nv50_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *); 1056extern int nv50_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *);
1067extern void nv50_instmem_prepare_access(struct drm_device *, bool write); 1057extern void nv50_instmem_flush(struct drm_device *);
1068extern void nv50_instmem_finish_access(struct drm_device *); 1058extern void nv84_instmem_flush(struct drm_device *);
1059extern void nv50_vm_flush(struct drm_device *, int engine);
1069 1060
1070/* nv04_mc.c */ 1061/* nv04_mc.c */
1071extern int nv04_mc_init(struct drm_device *); 1062extern int nv04_mc_init(struct drm_device *);
@@ -1088,13 +1079,14 @@ extern long nouveau_compat_ioctl(struct file *file, unsigned int cmd,
1088 unsigned long arg); 1079 unsigned long arg);
1089 1080
1090/* nv04_dac.c */ 1081/* nv04_dac.c */
1091extern int nv04_dac_create(struct drm_device *dev, struct dcb_entry *entry); 1082extern int nv04_dac_create(struct drm_connector *, struct dcb_entry *);
1092extern uint32_t nv17_dac_sample_load(struct drm_encoder *encoder); 1083extern uint32_t nv17_dac_sample_load(struct drm_encoder *encoder);
1093extern int nv04_dac_output_offset(struct drm_encoder *encoder); 1084extern int nv04_dac_output_offset(struct drm_encoder *encoder);
1094extern void nv04_dac_update_dacclk(struct drm_encoder *encoder, bool enable); 1085extern void nv04_dac_update_dacclk(struct drm_encoder *encoder, bool enable);
1086extern bool nv04_dac_in_use(struct drm_encoder *encoder);
1095 1087
1096/* nv04_dfp.c */ 1088/* nv04_dfp.c */
1097extern int nv04_dfp_create(struct drm_device *dev, struct dcb_entry *entry); 1089extern int nv04_dfp_create(struct drm_connector *, struct dcb_entry *);
1098extern int nv04_dfp_get_bound_head(struct drm_device *dev, struct dcb_entry *dcbent); 1090extern int nv04_dfp_get_bound_head(struct drm_device *dev, struct dcb_entry *dcbent);
1099extern void nv04_dfp_bind_head(struct drm_device *dev, struct dcb_entry *dcbent, 1091extern void nv04_dfp_bind_head(struct drm_device *dev, struct dcb_entry *dcbent,
1100 int head, bool dl); 1092 int head, bool dl);
@@ -1103,15 +1095,17 @@ extern void nv04_dfp_update_fp_control(struct drm_encoder *encoder, int mode);
1103 1095
1104/* nv04_tv.c */ 1096/* nv04_tv.c */
1105extern int nv04_tv_identify(struct drm_device *dev, int i2c_index); 1097extern int nv04_tv_identify(struct drm_device *dev, int i2c_index);
1106extern int nv04_tv_create(struct drm_device *dev, struct dcb_entry *entry); 1098extern int nv04_tv_create(struct drm_connector *, struct dcb_entry *);
1107 1099
1108/* nv17_tv.c */ 1100/* nv17_tv.c */
1109extern int nv17_tv_create(struct drm_device *dev, struct dcb_entry *entry); 1101extern int nv17_tv_create(struct drm_connector *, struct dcb_entry *);
1110 1102
1111/* nv04_display.c */ 1103/* nv04_display.c */
1104extern int nv04_display_early_init(struct drm_device *);
1105extern void nv04_display_late_takedown(struct drm_device *);
1112extern int nv04_display_create(struct drm_device *); 1106extern int nv04_display_create(struct drm_device *);
1107extern int nv04_display_init(struct drm_device *);
1113extern void nv04_display_destroy(struct drm_device *); 1108extern void nv04_display_destroy(struct drm_device *);
1114extern void nv04_display_restore(struct drm_device *);
1115 1109
1116/* nv04_crtc.c */ 1110/* nv04_crtc.c */
1117extern int nv04_crtc_create(struct drm_device *, int index); 1111extern int nv04_crtc_create(struct drm_device *, int index);
@@ -1147,7 +1141,6 @@ extern int nouveau_fence_wait(void *obj, void *arg, bool lazy, bool intr);
1147extern int nouveau_fence_flush(void *obj, void *arg); 1141extern int nouveau_fence_flush(void *obj, void *arg);
1148extern void nouveau_fence_unref(void **obj); 1142extern void nouveau_fence_unref(void **obj);
1149extern void *nouveau_fence_ref(void *obj); 1143extern void *nouveau_fence_ref(void *obj);
1150extern void nouveau_fence_handler(struct drm_device *dev, int channel);
1151 1144
1152/* nouveau_gem.c */ 1145/* nouveau_gem.c */
1153extern int nouveau_gem_new(struct drm_device *, struct nouveau_channel *, 1146extern int nouveau_gem_new(struct drm_device *, struct nouveau_channel *,
@@ -1167,13 +1160,15 @@ extern int nouveau_gem_ioctl_cpu_fini(struct drm_device *, void *,
1167extern int nouveau_gem_ioctl_info(struct drm_device *, void *, 1160extern int nouveau_gem_ioctl_info(struct drm_device *, void *,
1168 struct drm_file *); 1161 struct drm_file *);
1169 1162
1170/* nv17_gpio.c */ 1163/* nv10_gpio.c */
1171int nv17_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag); 1164int nv10_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag);
1172int nv17_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state); 1165int nv10_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state);
1173 1166
1174/* nv50_gpio.c */ 1167/* nv50_gpio.c */
1168int nv50_gpio_init(struct drm_device *dev);
1175int nv50_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag); 1169int nv50_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag);
1176int nv50_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state); 1170int nv50_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state);
1171void nv50_gpio_irq_enable(struct drm_device *, enum dcb_gpio_tag, bool on);
1177 1172
1178/* nv50_calc. */ 1173/* nv50_calc. */
1179int nv50_calc_pll(struct drm_device *, struct pll_lims *, int clk, 1174int nv50_calc_pll(struct drm_device *, struct pll_lims *, int clk,
@@ -1220,6 +1215,14 @@ static inline void nv_wr32(struct drm_device *dev, unsigned reg, u32 val)
1220 iowrite32_native(val, dev_priv->mmio + reg); 1215 iowrite32_native(val, dev_priv->mmio + reg);
1221} 1216}
1222 1217
1218static inline void nv_mask(struct drm_device *dev, u32 reg, u32 mask, u32 val)
1219{
1220 u32 tmp = nv_rd32(dev, reg);
1221 tmp &= ~mask;
1222 tmp |= val;
1223 nv_wr32(dev, reg, tmp);
1224}
1225
1223static inline u8 nv_rd08(struct drm_device *dev, unsigned reg) 1226static inline u8 nv_rd08(struct drm_device *dev, unsigned reg)
1224{ 1227{
1225 struct drm_nouveau_private *dev_priv = dev->dev_private; 1228 struct drm_nouveau_private *dev_priv = dev->dev_private;
diff --git a/drivers/gpu/drm/nouveau/nouveau_encoder.h b/drivers/gpu/drm/nouveau/nouveau_encoder.h
index e1df8209cd0f..a1a0d48ae70c 100644
--- a/drivers/gpu/drm/nouveau/nouveau_encoder.h
+++ b/drivers/gpu/drm/nouveau/nouveau_encoder.h
@@ -38,13 +38,15 @@ struct nouveau_encoder {
38 struct dcb_entry *dcb; 38 struct dcb_entry *dcb;
39 int or; 39 int or;
40 40
41 /* different to drm_encoder.crtc, this reflects what's
42 * actually programmed on the hw, not the proposed crtc */
43 struct drm_crtc *crtc;
44
41 struct drm_display_mode mode; 45 struct drm_display_mode mode;
42 int last_dpms; 46 int last_dpms;
43 47
44 struct nv04_output_reg restore; 48 struct nv04_output_reg restore;
45 49
46 void (*disconnect)(struct nouveau_encoder *encoder);
47
48 union { 50 union {
49 struct { 51 struct {
50 int mc_unknown; 52 int mc_unknown;
@@ -71,8 +73,8 @@ static inline struct drm_encoder *to_drm_encoder(struct nouveau_encoder *enc)
71 73
72struct nouveau_connector * 74struct nouveau_connector *
73nouveau_encoder_connector_get(struct nouveau_encoder *encoder); 75nouveau_encoder_connector_get(struct nouveau_encoder *encoder);
74int nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry); 76int nv50_sor_create(struct drm_connector *, struct dcb_entry *);
75int nv50_dac_create(struct drm_device *dev, struct dcb_entry *entry); 77int nv50_dac_create(struct drm_connector *, struct dcb_entry *);
76 78
77struct bit_displayport_encoder_table { 79struct bit_displayport_encoder_table {
78 uint32_t match; 80 uint32_t match;
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
index c9a4a0d2a115..2fb2444d2322 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
@@ -333,7 +333,7 @@ nouveau_fbcon_output_poll_changed(struct drm_device *dev)
333 drm_fb_helper_hotplug_event(&dev_priv->nfbdev->helper); 333 drm_fb_helper_hotplug_event(&dev_priv->nfbdev->helper);
334} 334}
335 335
336int 336static int
337nouveau_fbcon_destroy(struct drm_device *dev, struct nouveau_fbdev *nfbdev) 337nouveau_fbcon_destroy(struct drm_device *dev, struct nouveau_fbdev *nfbdev)
338{ 338{
339 struct nouveau_framebuffer *nouveau_fb = &nfbdev->nouveau_fb; 339 struct nouveau_framebuffer *nouveau_fb = &nfbdev->nouveau_fb;
@@ -387,7 +387,8 @@ int nouveau_fbcon_init(struct drm_device *dev)
387 dev_priv->nfbdev = nfbdev; 387 dev_priv->nfbdev = nfbdev;
388 nfbdev->helper.funcs = &nouveau_fbcon_helper_funcs; 388 nfbdev->helper.funcs = &nouveau_fbcon_helper_funcs;
389 389
390 ret = drm_fb_helper_init(dev, &nfbdev->helper, 2, 4); 390 ret = drm_fb_helper_init(dev, &nfbdev->helper,
391 nv_two_heads(dev) ? 2 : 1, 4);
391 if (ret) { 392 if (ret) {
392 kfree(nfbdev); 393 kfree(nfbdev);
393 return ret; 394 return ret;
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c
index faddf53ff9ed..6b208ffafa8d 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -67,12 +67,13 @@ nouveau_fence_update(struct nouveau_channel *chan)
67 if (USE_REFCNT) 67 if (USE_REFCNT)
68 sequence = nvchan_rd32(chan, 0x48); 68 sequence = nvchan_rd32(chan, 0x48);
69 else 69 else
70 sequence = chan->fence.last_sequence_irq; 70 sequence = atomic_read(&chan->fence.last_sequence_irq);
71 71
72 if (chan->fence.sequence_ack == sequence) 72 if (chan->fence.sequence_ack == sequence)
73 return; 73 return;
74 chan->fence.sequence_ack = sequence; 74 chan->fence.sequence_ack = sequence;
75 75
76 spin_lock(&chan->fence.lock);
76 list_for_each_safe(entry, tmp, &chan->fence.pending) { 77 list_for_each_safe(entry, tmp, &chan->fence.pending) {
77 fence = list_entry(entry, struct nouveau_fence, entry); 78 fence = list_entry(entry, struct nouveau_fence, entry);
78 79
@@ -84,6 +85,7 @@ nouveau_fence_update(struct nouveau_channel *chan)
84 if (sequence == chan->fence.sequence_ack) 85 if (sequence == chan->fence.sequence_ack)
85 break; 86 break;
86 } 87 }
88 spin_unlock(&chan->fence.lock);
87} 89}
88 90
89int 91int
@@ -119,7 +121,6 @@ nouveau_fence_emit(struct nouveau_fence *fence)
119{ 121{
120 struct drm_nouveau_private *dev_priv = fence->channel->dev->dev_private; 122 struct drm_nouveau_private *dev_priv = fence->channel->dev->dev_private;
121 struct nouveau_channel *chan = fence->channel; 123 struct nouveau_channel *chan = fence->channel;
122 unsigned long flags;
123 int ret; 124 int ret;
124 125
125 ret = RING_SPACE(chan, 2); 126 ret = RING_SPACE(chan, 2);
@@ -127,9 +128,7 @@ nouveau_fence_emit(struct nouveau_fence *fence)
127 return ret; 128 return ret;
128 129
129 if (unlikely(chan->fence.sequence == chan->fence.sequence_ack - 1)) { 130 if (unlikely(chan->fence.sequence == chan->fence.sequence_ack - 1)) {
130 spin_lock_irqsave(&chan->fence.lock, flags);
131 nouveau_fence_update(chan); 131 nouveau_fence_update(chan);
132 spin_unlock_irqrestore(&chan->fence.lock, flags);
133 132
134 BUG_ON(chan->fence.sequence == 133 BUG_ON(chan->fence.sequence ==
135 chan->fence.sequence_ack - 1); 134 chan->fence.sequence_ack - 1);
@@ -138,9 +137,9 @@ nouveau_fence_emit(struct nouveau_fence *fence)
138 fence->sequence = ++chan->fence.sequence; 137 fence->sequence = ++chan->fence.sequence;
139 138
140 kref_get(&fence->refcount); 139 kref_get(&fence->refcount);
141 spin_lock_irqsave(&chan->fence.lock, flags); 140 spin_lock(&chan->fence.lock);
142 list_add_tail(&fence->entry, &chan->fence.pending); 141 list_add_tail(&fence->entry, &chan->fence.pending);
143 spin_unlock_irqrestore(&chan->fence.lock, flags); 142 spin_unlock(&chan->fence.lock);
144 143
145 BEGIN_RING(chan, NvSubSw, USE_REFCNT ? 0x0050 : 0x0150, 1); 144 BEGIN_RING(chan, NvSubSw, USE_REFCNT ? 0x0050 : 0x0150, 1);
146 OUT_RING(chan, fence->sequence); 145 OUT_RING(chan, fence->sequence);
@@ -173,14 +172,11 @@ nouveau_fence_signalled(void *sync_obj, void *sync_arg)
173{ 172{
174 struct nouveau_fence *fence = nouveau_fence(sync_obj); 173 struct nouveau_fence *fence = nouveau_fence(sync_obj);
175 struct nouveau_channel *chan = fence->channel; 174 struct nouveau_channel *chan = fence->channel;
176 unsigned long flags;
177 175
178 if (fence->signalled) 176 if (fence->signalled)
179 return true; 177 return true;
180 178
181 spin_lock_irqsave(&chan->fence.lock, flags);
182 nouveau_fence_update(chan); 179 nouveau_fence_update(chan);
183 spin_unlock_irqrestore(&chan->fence.lock, flags);
184 return fence->signalled; 180 return fence->signalled;
185} 181}
186 182
@@ -190,8 +186,6 @@ nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr)
190 unsigned long timeout = jiffies + (3 * DRM_HZ); 186 unsigned long timeout = jiffies + (3 * DRM_HZ);
191 int ret = 0; 187 int ret = 0;
192 188
193 __set_current_state(intr ? TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);
194
195 while (1) { 189 while (1) {
196 if (nouveau_fence_signalled(sync_obj, sync_arg)) 190 if (nouveau_fence_signalled(sync_obj, sync_arg))
197 break; 191 break;
@@ -201,6 +195,8 @@ nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr)
201 break; 195 break;
202 } 196 }
203 197
198 __set_current_state(intr ? TASK_INTERRUPTIBLE
199 : TASK_UNINTERRUPTIBLE);
204 if (lazy) 200 if (lazy)
205 schedule_timeout(1); 201 schedule_timeout(1);
206 202
@@ -221,27 +217,12 @@ nouveau_fence_flush(void *sync_obj, void *sync_arg)
221 return 0; 217 return 0;
222} 218}
223 219
224void
225nouveau_fence_handler(struct drm_device *dev, int channel)
226{
227 struct drm_nouveau_private *dev_priv = dev->dev_private;
228 struct nouveau_channel *chan = NULL;
229
230 if (channel >= 0 && channel < dev_priv->engine.fifo.channels)
231 chan = dev_priv->fifos[channel];
232
233 if (chan) {
234 spin_lock_irq(&chan->fence.lock);
235 nouveau_fence_update(chan);
236 spin_unlock_irq(&chan->fence.lock);
237 }
238}
239
240int 220int
241nouveau_fence_init(struct nouveau_channel *chan) 221nouveau_fence_init(struct nouveau_channel *chan)
242{ 222{
243 INIT_LIST_HEAD(&chan->fence.pending); 223 INIT_LIST_HEAD(&chan->fence.pending);
244 spin_lock_init(&chan->fence.lock); 224 spin_lock_init(&chan->fence.lock);
225 atomic_set(&chan->fence.last_sequence_irq, 0);
245 return 0; 226 return 0;
246} 227}
247 228
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 69c76cf93407..547f2c24c1e7 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -137,8 +137,6 @@ nouveau_gem_ioctl_new(struct drm_device *dev, void *data,
137 uint32_t flags = 0; 137 uint32_t flags = 0;
138 int ret = 0; 138 int ret = 0;
139 139
140 NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
141
142 if (unlikely(dev_priv->ttm.bdev.dev_mapping == NULL)) 140 if (unlikely(dev_priv->ttm.bdev.dev_mapping == NULL))
143 dev_priv->ttm.bdev.dev_mapping = dev_priv->dev->dev_mapping; 141 dev_priv->ttm.bdev.dev_mapping = dev_priv->dev->dev_mapping;
144 142
@@ -577,10 +575,9 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
577 struct drm_nouveau_gem_pushbuf_bo *bo; 575 struct drm_nouveau_gem_pushbuf_bo *bo;
578 struct nouveau_channel *chan; 576 struct nouveau_channel *chan;
579 struct validate_op op; 577 struct validate_op op;
580 struct nouveau_fence *fence = 0; 578 struct nouveau_fence *fence = NULL;
581 int i, j, ret = 0, do_reloc = 0; 579 int i, j, ret = 0, do_reloc = 0;
582 580
583 NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
584 NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(req->channel, file_priv, chan); 581 NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(req->channel, file_priv, chan);
585 582
586 req->vram_available = dev_priv->fb_aper_free; 583 req->vram_available = dev_priv->fb_aper_free;
@@ -760,8 +757,6 @@ nouveau_gem_ioctl_cpu_prep(struct drm_device *dev, void *data,
760 bool no_wait = !!(req->flags & NOUVEAU_GEM_CPU_PREP_NOWAIT); 757 bool no_wait = !!(req->flags & NOUVEAU_GEM_CPU_PREP_NOWAIT);
761 int ret = -EINVAL; 758 int ret = -EINVAL;
762 759
763 NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
764
765 gem = drm_gem_object_lookup(dev, file_priv, req->handle); 760 gem = drm_gem_object_lookup(dev, file_priv, req->handle);
766 if (!gem) 761 if (!gem)
767 return ret; 762 return ret;
@@ -800,8 +795,6 @@ nouveau_gem_ioctl_cpu_fini(struct drm_device *dev, void *data,
800 struct nouveau_bo *nvbo; 795 struct nouveau_bo *nvbo;
801 int ret = -EINVAL; 796 int ret = -EINVAL;
802 797
803 NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
804
805 gem = drm_gem_object_lookup(dev, file_priv, req->handle); 798 gem = drm_gem_object_lookup(dev, file_priv, req->handle);
806 if (!gem) 799 if (!gem)
807 return ret; 800 return ret;
@@ -827,8 +820,6 @@ nouveau_gem_ioctl_info(struct drm_device *dev, void *data,
827 struct drm_gem_object *gem; 820 struct drm_gem_object *gem;
828 int ret; 821 int ret;
829 822
830 NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
831
832 gem = drm_gem_object_lookup(dev, file_priv, req->handle); 823 gem = drm_gem_object_lookup(dev, file_priv, req->handle);
833 if (!gem) 824 if (!gem)
834 return -EINVAL; 825 return -EINVAL;
diff --git a/drivers/gpu/drm/nouveau/nouveau_grctx.c b/drivers/gpu/drm/nouveau/nouveau_grctx.c
deleted file mode 100644
index f731c5f60536..000000000000
--- a/drivers/gpu/drm/nouveau/nouveau_grctx.c
+++ /dev/null
@@ -1,160 +0,0 @@
1/*
2 * Copyright 2009 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25#include <linux/firmware.h>
26#include <linux/slab.h>
27
28#include "drmP.h"
29#include "nouveau_drv.h"
30
31struct nouveau_ctxprog {
32 uint32_t signature;
33 uint8_t version;
34 uint16_t length;
35 uint32_t data[];
36} __attribute__ ((packed));
37
38struct nouveau_ctxvals {
39 uint32_t signature;
40 uint8_t version;
41 uint32_t length;
42 struct {
43 uint32_t offset;
44 uint32_t value;
45 } data[];
46} __attribute__ ((packed));
47
48int
49nouveau_grctx_prog_load(struct drm_device *dev)
50{
51 struct drm_nouveau_private *dev_priv = dev->dev_private;
52 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
53 const int chipset = dev_priv->chipset;
54 const struct firmware *fw;
55 const struct nouveau_ctxprog *cp;
56 const struct nouveau_ctxvals *cv;
57 char name[32];
58 int ret, i;
59
60 if (pgraph->accel_blocked)
61 return -ENODEV;
62
63 if (!pgraph->ctxprog) {
64 sprintf(name, "nouveau/nv%02x.ctxprog", chipset);
65 ret = request_firmware(&fw, name, &dev->pdev->dev);
66 if (ret) {
67 NV_ERROR(dev, "No ctxprog for NV%02x\n", chipset);
68 return ret;
69 }
70
71 pgraph->ctxprog = kmemdup(fw->data, fw->size, GFP_KERNEL);
72 if (!pgraph->ctxprog) {
73 NV_ERROR(dev, "OOM copying ctxprog\n");
74 release_firmware(fw);
75 return -ENOMEM;
76 }
77
78 cp = pgraph->ctxprog;
79 if (le32_to_cpu(cp->signature) != 0x5043564e ||
80 cp->version != 0 ||
81 le16_to_cpu(cp->length) != ((fw->size - 7) / 4)) {
82 NV_ERROR(dev, "ctxprog invalid\n");
83 release_firmware(fw);
84 nouveau_grctx_fini(dev);
85 return -EINVAL;
86 }
87 release_firmware(fw);
88 }
89
90 if (!pgraph->ctxvals) {
91 sprintf(name, "nouveau/nv%02x.ctxvals", chipset);
92 ret = request_firmware(&fw, name, &dev->pdev->dev);
93 if (ret) {
94 NV_ERROR(dev, "No ctxvals for NV%02x\n", chipset);
95 nouveau_grctx_fini(dev);
96 return ret;
97 }
98
99 pgraph->ctxvals = kmemdup(fw->data, fw->size, GFP_KERNEL);
100 if (!pgraph->ctxvals) {
101 NV_ERROR(dev, "OOM copying ctxvals\n");
102 release_firmware(fw);
103 nouveau_grctx_fini(dev);
104 return -ENOMEM;
105 }
106
107 cv = (void *)pgraph->ctxvals;
108 if (le32_to_cpu(cv->signature) != 0x5643564e ||
109 cv->version != 0 ||
110 le32_to_cpu(cv->length) != ((fw->size - 9) / 8)) {
111 NV_ERROR(dev, "ctxvals invalid\n");
112 release_firmware(fw);
113 nouveau_grctx_fini(dev);
114 return -EINVAL;
115 }
116 release_firmware(fw);
117 }
118
119 cp = pgraph->ctxprog;
120
121 nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0);
122 for (i = 0; i < le16_to_cpu(cp->length); i++)
123 nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_DATA,
124 le32_to_cpu(cp->data[i]));
125
126 return 0;
127}
128
129void
130nouveau_grctx_fini(struct drm_device *dev)
131{
132 struct drm_nouveau_private *dev_priv = dev->dev_private;
133 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
134
135 if (pgraph->ctxprog) {
136 kfree(pgraph->ctxprog);
137 pgraph->ctxprog = NULL;
138 }
139
140 if (pgraph->ctxvals) {
141 kfree(pgraph->ctxprog);
142 pgraph->ctxvals = NULL;
143 }
144}
145
146void
147nouveau_grctx_vals_load(struct drm_device *dev, struct nouveau_gpuobj *ctx)
148{
149 struct drm_nouveau_private *dev_priv = dev->dev_private;
150 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
151 struct nouveau_ctxvals *cv = pgraph->ctxvals;
152 int i;
153
154 if (!cv)
155 return;
156
157 for (i = 0; i < le32_to_cpu(cv->length); i++)
158 nv_wo32(dev, ctx, le32_to_cpu(cv->data[i].offset),
159 le32_to_cpu(cv->data[i].value));
160}
diff --git a/drivers/gpu/drm/nouveau/nouveau_i2c.c b/drivers/gpu/drm/nouveau/nouveau_i2c.c
index 316a3c7e6eb4..cb0cb34440c6 100644
--- a/drivers/gpu/drm/nouveau/nouveau_i2c.c
+++ b/drivers/gpu/drm/nouveau/nouveau_i2c.c
@@ -278,3 +278,45 @@ nouveau_i2c_find(struct drm_device *dev, int index)
278 return i2c->chan; 278 return i2c->chan;
279} 279}
280 280
281bool
282nouveau_probe_i2c_addr(struct nouveau_i2c_chan *i2c, int addr)
283{
284 uint8_t buf[] = { 0 };
285 struct i2c_msg msgs[] = {
286 {
287 .addr = addr,
288 .flags = 0,
289 .len = 1,
290 .buf = buf,
291 },
292 {
293 .addr = addr,
294 .flags = I2C_M_RD,
295 .len = 1,
296 .buf = buf,
297 }
298 };
299
300 return i2c_transfer(&i2c->adapter, msgs, 2) == 2;
301}
302
303int
304nouveau_i2c_identify(struct drm_device *dev, const char *what,
305 struct i2c_board_info *info, int index)
306{
307 struct nouveau_i2c_chan *i2c = nouveau_i2c_find(dev, index);
308 int i;
309
310 NV_DEBUG(dev, "Probing %ss on I2C bus: %d\n", what, index);
311
312 for (i = 0; info[i].addr; i++) {
313 if (nouveau_probe_i2c_addr(i2c, info[i].addr)) {
314 NV_INFO(dev, "Detected %s: %s\n", what, info[i].type);
315 return i;
316 }
317 }
318
319 NV_DEBUG(dev, "No devices found.\n");
320
321 return -ENODEV;
322}
diff --git a/drivers/gpu/drm/nouveau/nouveau_i2c.h b/drivers/gpu/drm/nouveau/nouveau_i2c.h
index c8eaf7a9fcbb..6dd2f8713cd1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_i2c.h
+++ b/drivers/gpu/drm/nouveau/nouveau_i2c.h
@@ -45,6 +45,9 @@ struct nouveau_i2c_chan {
45int nouveau_i2c_init(struct drm_device *, struct dcb_i2c_entry *, int index); 45int nouveau_i2c_init(struct drm_device *, struct dcb_i2c_entry *, int index);
46void nouveau_i2c_fini(struct drm_device *, struct dcb_i2c_entry *); 46void nouveau_i2c_fini(struct drm_device *, struct dcb_i2c_entry *);
47struct nouveau_i2c_chan *nouveau_i2c_find(struct drm_device *, int index); 47struct nouveau_i2c_chan *nouveau_i2c_find(struct drm_device *, int index);
48bool nouveau_probe_i2c_addr(struct nouveau_i2c_chan *i2c, int addr);
49int nouveau_i2c_identify(struct drm_device *dev, const char *what,
50 struct i2c_board_info *info, int index);
48 51
49int nouveau_dp_i2c_aux_ch(struct i2c_adapter *, int mode, uint8_t write_byte, 52int nouveau_dp_i2c_aux_ch(struct i2c_adapter *, int mode, uint8_t write_byte,
50 uint8_t *read_byte); 53 uint8_t *read_byte);
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c
index c1fd42b0dad1..a9f36ab256b7 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -35,162 +35,6 @@
35#include "drm_sarea.h" 35#include "drm_sarea.h"
36#include "nouveau_drv.h" 36#include "nouveau_drv.h"
37 37
38static struct mem_block *
39split_block(struct mem_block *p, uint64_t start, uint64_t size,
40 struct drm_file *file_priv)
41{
42 /* Maybe cut off the start of an existing block */
43 if (start > p->start) {
44 struct mem_block *newblock =
45 kmalloc(sizeof(*newblock), GFP_KERNEL);
46 if (!newblock)
47 goto out;
48 newblock->start = start;
49 newblock->size = p->size - (start - p->start);
50 newblock->file_priv = NULL;
51 newblock->next = p->next;
52 newblock->prev = p;
53 p->next->prev = newblock;
54 p->next = newblock;
55 p->size -= newblock->size;
56 p = newblock;
57 }
58
59 /* Maybe cut off the end of an existing block */
60 if (size < p->size) {
61 struct mem_block *newblock =
62 kmalloc(sizeof(*newblock), GFP_KERNEL);
63 if (!newblock)
64 goto out;
65 newblock->start = start + size;
66 newblock->size = p->size - size;
67 newblock->file_priv = NULL;
68 newblock->next = p->next;
69 newblock->prev = p;
70 p->next->prev = newblock;
71 p->next = newblock;
72 p->size = size;
73 }
74
75out:
76 /* Our block is in the middle */
77 p->file_priv = file_priv;
78 return p;
79}
80
81struct mem_block *
82nouveau_mem_alloc_block(struct mem_block *heap, uint64_t size,
83 int align2, struct drm_file *file_priv, int tail)
84{
85 struct mem_block *p;
86 uint64_t mask = (1 << align2) - 1;
87
88 if (!heap)
89 return NULL;
90
91 if (tail) {
92 list_for_each_prev(p, heap) {
93 uint64_t start = ((p->start + p->size) - size) & ~mask;
94
95 if (p->file_priv == NULL && start >= p->start &&
96 start + size <= p->start + p->size)
97 return split_block(p, start, size, file_priv);
98 }
99 } else {
100 list_for_each(p, heap) {
101 uint64_t start = (p->start + mask) & ~mask;
102
103 if (p->file_priv == NULL &&
104 start + size <= p->start + p->size)
105 return split_block(p, start, size, file_priv);
106 }
107 }
108
109 return NULL;
110}
111
112void nouveau_mem_free_block(struct mem_block *p)
113{
114 p->file_priv = NULL;
115
116 /* Assumes a single contiguous range. Needs a special file_priv in
117 * 'heap' to stop it being subsumed.
118 */
119 if (p->next->file_priv == NULL) {
120 struct mem_block *q = p->next;
121 p->size += q->size;
122 p->next = q->next;
123 p->next->prev = p;
124 kfree(q);
125 }
126
127 if (p->prev->file_priv == NULL) {
128 struct mem_block *q = p->prev;
129 q->size += p->size;
130 q->next = p->next;
131 q->next->prev = q;
132 kfree(p);
133 }
134}
135
136/* Initialize. How to check for an uninitialized heap?
137 */
138int nouveau_mem_init_heap(struct mem_block **heap, uint64_t start,
139 uint64_t size)
140{
141 struct mem_block *blocks = kmalloc(sizeof(*blocks), GFP_KERNEL);
142
143 if (!blocks)
144 return -ENOMEM;
145
146 *heap = kmalloc(sizeof(**heap), GFP_KERNEL);
147 if (!*heap) {
148 kfree(blocks);
149 return -ENOMEM;
150 }
151
152 blocks->start = start;
153 blocks->size = size;
154 blocks->file_priv = NULL;
155 blocks->next = blocks->prev = *heap;
156
157 memset(*heap, 0, sizeof(**heap));
158 (*heap)->file_priv = (struct drm_file *) -1;
159 (*heap)->next = (*heap)->prev = blocks;
160 return 0;
161}
162
163/*
164 * Free all blocks associated with the releasing file_priv
165 */
166void nouveau_mem_release(struct drm_file *file_priv, struct mem_block *heap)
167{
168 struct mem_block *p;
169
170 if (!heap || !heap->next)
171 return;
172
173 list_for_each(p, heap) {
174 if (p->file_priv == file_priv)
175 p->file_priv = NULL;
176 }
177
178 /* Assumes a single contiguous range. Needs a special file_priv in
179 * 'heap' to stop it being subsumed.
180 */
181 list_for_each(p, heap) {
182 while ((p->file_priv == NULL) &&
183 (p->next->file_priv == NULL) &&
184 (p->next != heap)) {
185 struct mem_block *q = p->next;
186 p->size += q->size;
187 p->next = q->next;
188 p->next->prev = p;
189 kfree(q);
190 }
191 }
192}
193
194/* 38/*
195 * NV10-NV40 tiling helpers 39 * NV10-NV40 tiling helpers
196 */ 40 */
@@ -299,7 +143,6 @@ nv50_mem_vm_bind_linear(struct drm_device *dev, uint64_t virt, uint32_t size,
299 phys |= 0x30; 143 phys |= 0x30;
300 } 144 }
301 145
302 dev_priv->engine.instmem.prepare_access(dev, true);
303 while (size) { 146 while (size) {
304 unsigned offset_h = upper_32_bits(phys); 147 unsigned offset_h = upper_32_bits(phys);
305 unsigned offset_l = lower_32_bits(phys); 148 unsigned offset_l = lower_32_bits(phys);
@@ -331,36 +174,12 @@ nv50_mem_vm_bind_linear(struct drm_device *dev, uint64_t virt, uint32_t size,
331 } 174 }
332 } 175 }
333 } 176 }
334 dev_priv->engine.instmem.finish_access(dev); 177 dev_priv->engine.instmem.flush(dev);
335
336 nv_wr32(dev, 0x100c80, 0x00050001);
337 if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
338 NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
339 NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
340 return -EBUSY;
341 }
342
343 nv_wr32(dev, 0x100c80, 0x00000001);
344 if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
345 NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
346 NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
347 return -EBUSY;
348 }
349
350 nv_wr32(dev, 0x100c80, 0x00040001);
351 if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
352 NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
353 NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
354 return -EBUSY;
355 }
356
357 nv_wr32(dev, 0x100c80, 0x00060001);
358 if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
359 NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
360 NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
361 return -EBUSY;
362 }
363 178
179 nv50_vm_flush(dev, 5);
180 nv50_vm_flush(dev, 0);
181 nv50_vm_flush(dev, 4);
182 nv50_vm_flush(dev, 6);
364 return 0; 183 return 0;
365} 184}
366 185
@@ -374,7 +193,6 @@ nv50_mem_vm_unbind(struct drm_device *dev, uint64_t virt, uint32_t size)
374 virt -= dev_priv->vm_vram_base; 193 virt -= dev_priv->vm_vram_base;
375 pages = (size >> 16) << 1; 194 pages = (size >> 16) << 1;
376 195
377 dev_priv->engine.instmem.prepare_access(dev, true);
378 while (pages) { 196 while (pages) {
379 pgt = dev_priv->vm_vram_pt[virt >> 29]; 197 pgt = dev_priv->vm_vram_pt[virt >> 29];
380 pte = (virt & 0x1ffe0000ULL) >> 15; 198 pte = (virt & 0x1ffe0000ULL) >> 15;
@@ -388,57 +206,19 @@ nv50_mem_vm_unbind(struct drm_device *dev, uint64_t virt, uint32_t size)
388 while (pte < end) 206 while (pte < end)
389 nv_wo32(dev, pgt, pte++, 0); 207 nv_wo32(dev, pgt, pte++, 0);
390 } 208 }
391 dev_priv->engine.instmem.finish_access(dev); 209 dev_priv->engine.instmem.flush(dev);
392
393 nv_wr32(dev, 0x100c80, 0x00050001);
394 if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
395 NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
396 NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
397 return;
398 }
399
400 nv_wr32(dev, 0x100c80, 0x00000001);
401 if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
402 NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
403 NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
404 return;
405 }
406
407 nv_wr32(dev, 0x100c80, 0x00040001);
408 if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
409 NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
410 NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
411 return;
412 }
413 210
414 nv_wr32(dev, 0x100c80, 0x00060001); 211 nv50_vm_flush(dev, 5);
415 if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) { 212 nv50_vm_flush(dev, 0);
416 NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n"); 213 nv50_vm_flush(dev, 4);
417 NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80)); 214 nv50_vm_flush(dev, 6);
418 }
419} 215}
420 216
421/* 217/*
422 * Cleanup everything 218 * Cleanup everything
423 */ 219 */
424void nouveau_mem_takedown(struct mem_block **heap) 220void
425{ 221nouveau_mem_close(struct drm_device *dev)
426 struct mem_block *p;
427
428 if (!*heap)
429 return;
430
431 for (p = (*heap)->next; p != *heap;) {
432 struct mem_block *q = p;
433 p = p->next;
434 kfree(q);
435 }
436
437 kfree(*heap);
438 *heap = NULL;
439}
440
441void nouveau_mem_close(struct drm_device *dev)
442{ 222{
443 struct drm_nouveau_private *dev_priv = dev->dev_private; 223 struct drm_nouveau_private *dev_priv = dev->dev_private;
444 224
@@ -449,8 +229,7 @@ void nouveau_mem_close(struct drm_device *dev)
449 229
450 nouveau_ttm_global_release(dev_priv); 230 nouveau_ttm_global_release(dev_priv);
451 231
452 if (drm_core_has_AGP(dev) && dev->agp && 232 if (drm_core_has_AGP(dev) && dev->agp) {
453 drm_core_check_feature(dev, DRIVER_MODESET)) {
454 struct drm_agp_mem *entry, *tempe; 233 struct drm_agp_mem *entry, *tempe;
455 234
456 /* Remove AGP resources, but leave dev->agp 235 /* Remove AGP resources, but leave dev->agp
@@ -471,28 +250,29 @@ void nouveau_mem_close(struct drm_device *dev)
471 } 250 }
472 251
473 if (dev_priv->fb_mtrr) { 252 if (dev_priv->fb_mtrr) {
474 drm_mtrr_del(dev_priv->fb_mtrr, drm_get_resource_start(dev, 1), 253 drm_mtrr_del(dev_priv->fb_mtrr,
475 drm_get_resource_len(dev, 1), DRM_MTRR_WC); 254 pci_resource_start(dev->pdev, 1),
476 dev_priv->fb_mtrr = 0; 255 pci_resource_len(dev->pdev, 1), DRM_MTRR_WC);
256 dev_priv->fb_mtrr = -1;
477 } 257 }
478} 258}
479 259
480static uint32_t 260static uint32_t
481nouveau_mem_detect_nv04(struct drm_device *dev) 261nouveau_mem_detect_nv04(struct drm_device *dev)
482{ 262{
483 uint32_t boot0 = nv_rd32(dev, NV03_BOOT_0); 263 uint32_t boot0 = nv_rd32(dev, NV04_PFB_BOOT_0);
484 264
485 if (boot0 & 0x00000100) 265 if (boot0 & 0x00000100)
486 return (((boot0 >> 12) & 0xf) * 2 + 2) * 1024 * 1024; 266 return (((boot0 >> 12) & 0xf) * 2 + 2) * 1024 * 1024;
487 267
488 switch (boot0 & NV03_BOOT_0_RAM_AMOUNT) { 268 switch (boot0 & NV04_PFB_BOOT_0_RAM_AMOUNT) {
489 case NV04_BOOT_0_RAM_AMOUNT_32MB: 269 case NV04_PFB_BOOT_0_RAM_AMOUNT_32MB:
490 return 32 * 1024 * 1024; 270 return 32 * 1024 * 1024;
491 case NV04_BOOT_0_RAM_AMOUNT_16MB: 271 case NV04_PFB_BOOT_0_RAM_AMOUNT_16MB:
492 return 16 * 1024 * 1024; 272 return 16 * 1024 * 1024;
493 case NV04_BOOT_0_RAM_AMOUNT_8MB: 273 case NV04_PFB_BOOT_0_RAM_AMOUNT_8MB:
494 return 8 * 1024 * 1024; 274 return 8 * 1024 * 1024;
495 case NV04_BOOT_0_RAM_AMOUNT_4MB: 275 case NV04_PFB_BOOT_0_RAM_AMOUNT_4MB:
496 return 4 * 1024 * 1024; 276 return 4 * 1024 * 1024;
497 } 277 }
498 278
@@ -536,12 +316,18 @@ nouveau_mem_detect(struct drm_device *dev)
536 } else 316 } else
537 if (dev_priv->flags & (NV_NFORCE | NV_NFORCE2)) { 317 if (dev_priv->flags & (NV_NFORCE | NV_NFORCE2)) {
538 dev_priv->vram_size = nouveau_mem_detect_nforce(dev); 318 dev_priv->vram_size = nouveau_mem_detect_nforce(dev);
319 } else
320 if (dev_priv->card_type < NV_50) {
321 dev_priv->vram_size = nv_rd32(dev, NV04_PFB_FIFO_DATA);
322 dev_priv->vram_size &= NV10_PFB_FIFO_DATA_RAM_AMOUNT_MB_MASK;
539 } else { 323 } else {
540 dev_priv->vram_size = nv_rd32(dev, NV04_FIFO_DATA); 324 dev_priv->vram_size = nv_rd32(dev, NV04_PFB_FIFO_DATA);
541 dev_priv->vram_size &= NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK; 325 dev_priv->vram_size |= (dev_priv->vram_size & 0xff) << 32;
542 if (dev_priv->chipset == 0xaa || dev_priv->chipset == 0xac) 326 dev_priv->vram_size &= 0xffffffff00ll;
327 if (dev_priv->chipset == 0xaa || dev_priv->chipset == 0xac) {
543 dev_priv->vram_sys_base = nv_rd32(dev, 0x100e10); 328 dev_priv->vram_sys_base = nv_rd32(dev, 0x100e10);
544 dev_priv->vram_sys_base <<= 12; 329 dev_priv->vram_sys_base <<= 12;
330 }
545 } 331 }
546 332
547 NV_INFO(dev, "Detected %dMiB VRAM\n", (int)(dev_priv->vram_size >> 20)); 333 NV_INFO(dev, "Detected %dMiB VRAM\n", (int)(dev_priv->vram_size >> 20));
@@ -555,18 +341,36 @@ nouveau_mem_detect(struct drm_device *dev)
555 return -ENOMEM; 341 return -ENOMEM;
556} 342}
557 343
558#if __OS_HAS_AGP 344int
559static void nouveau_mem_reset_agp(struct drm_device *dev) 345nouveau_mem_reset_agp(struct drm_device *dev)
560{ 346{
561 uint32_t saved_pci_nv_1, saved_pci_nv_19, pmc_enable; 347#if __OS_HAS_AGP
348 uint32_t saved_pci_nv_1, pmc_enable;
349 int ret;
350
351 /* First of all, disable fast writes, otherwise if it's
352 * already enabled in the AGP bridge and we disable the card's
353 * AGP controller we might be locking ourselves out of it. */
354 if (dev->agp->acquired) {
355 struct drm_agp_info info;
356 struct drm_agp_mode mode;
357
358 ret = drm_agp_info(dev, &info);
359 if (ret)
360 return ret;
361
362 mode.mode = info.mode & ~0x10;
363 ret = drm_agp_enable(dev, mode);
364 if (ret)
365 return ret;
366 }
562 367
563 saved_pci_nv_1 = nv_rd32(dev, NV04_PBUS_PCI_NV_1); 368 saved_pci_nv_1 = nv_rd32(dev, NV04_PBUS_PCI_NV_1);
564 saved_pci_nv_19 = nv_rd32(dev, NV04_PBUS_PCI_NV_19);
565 369
566 /* clear busmaster bit */ 370 /* clear busmaster bit */
567 nv_wr32(dev, NV04_PBUS_PCI_NV_1, saved_pci_nv_1 & ~0x4); 371 nv_wr32(dev, NV04_PBUS_PCI_NV_1, saved_pci_nv_1 & ~0x4);
568 /* clear SBA and AGP bits */ 372 /* disable AGP */
569 nv_wr32(dev, NV04_PBUS_PCI_NV_19, saved_pci_nv_19 & 0xfffff0ff); 373 nv_wr32(dev, NV04_PBUS_PCI_NV_19, 0);
570 374
571 /* power cycle pgraph, if enabled */ 375 /* power cycle pgraph, if enabled */
572 pmc_enable = nv_rd32(dev, NV03_PMC_ENABLE); 376 pmc_enable = nv_rd32(dev, NV03_PMC_ENABLE);
@@ -578,11 +382,12 @@ static void nouveau_mem_reset_agp(struct drm_device *dev)
578 } 382 }
579 383
580 /* and restore (gives effect of resetting AGP) */ 384 /* and restore (gives effect of resetting AGP) */
581 nv_wr32(dev, NV04_PBUS_PCI_NV_19, saved_pci_nv_19);
582 nv_wr32(dev, NV04_PBUS_PCI_NV_1, saved_pci_nv_1); 385 nv_wr32(dev, NV04_PBUS_PCI_NV_1, saved_pci_nv_1);
583}
584#endif 386#endif
585 387
388 return 0;
389}
390
586int 391int
587nouveau_mem_init_agp(struct drm_device *dev) 392nouveau_mem_init_agp(struct drm_device *dev)
588{ 393{
@@ -592,11 +397,6 @@ nouveau_mem_init_agp(struct drm_device *dev)
592 struct drm_agp_mode mode; 397 struct drm_agp_mode mode;
593 int ret; 398 int ret;
594 399
595 if (nouveau_noagp)
596 return 0;
597
598 nouveau_mem_reset_agp(dev);
599
600 if (!dev->agp->acquired) { 400 if (!dev->agp->acquired) {
601 ret = drm_agp_acquire(dev); 401 ret = drm_agp_acquire(dev);
602 if (ret) { 402 if (ret) {
@@ -633,7 +433,7 @@ nouveau_mem_init(struct drm_device *dev)
633 struct ttm_bo_device *bdev = &dev_priv->ttm.bdev; 433 struct ttm_bo_device *bdev = &dev_priv->ttm.bdev;
634 int ret, dma_bits = 32; 434 int ret, dma_bits = 32;
635 435
636 dev_priv->fb_phys = drm_get_resource_start(dev, 1); 436 dev_priv->fb_phys = pci_resource_start(dev->pdev, 1);
637 dev_priv->gart_info.type = NOUVEAU_GART_NONE; 437 dev_priv->gart_info.type = NOUVEAU_GART_NONE;
638 438
639 if (dev_priv->card_type >= NV_50 && 439 if (dev_priv->card_type >= NV_50 &&
@@ -665,8 +465,9 @@ nouveau_mem_init(struct drm_device *dev)
665 465
666 dev_priv->fb_available_size = dev_priv->vram_size; 466 dev_priv->fb_available_size = dev_priv->vram_size;
667 dev_priv->fb_mappable_pages = dev_priv->fb_available_size; 467 dev_priv->fb_mappable_pages = dev_priv->fb_available_size;
668 if (dev_priv->fb_mappable_pages > drm_get_resource_len(dev, 1)) 468 if (dev_priv->fb_mappable_pages > pci_resource_len(dev->pdev, 1))
669 dev_priv->fb_mappable_pages = drm_get_resource_len(dev, 1); 469 dev_priv->fb_mappable_pages =
470 pci_resource_len(dev->pdev, 1);
670 dev_priv->fb_mappable_pages >>= PAGE_SHIFT; 471 dev_priv->fb_mappable_pages >>= PAGE_SHIFT;
671 472
672 /* remove reserved space at end of vram from available amount */ 473 /* remove reserved space at end of vram from available amount */
@@ -692,7 +493,8 @@ nouveau_mem_init(struct drm_device *dev)
692 493
693 /* GART */ 494 /* GART */
694#if !defined(__powerpc__) && !defined(__ia64__) 495#if !defined(__powerpc__) && !defined(__ia64__)
695 if (drm_device_is_agp(dev) && dev->agp) { 496 if (drm_device_is_agp(dev) && dev->agp && !nouveau_noagp) {
497 nouveau_mem_reset_agp(dev);
696 ret = nouveau_mem_init_agp(dev); 498 ret = nouveau_mem_init_agp(dev);
697 if (ret) 499 if (ret)
698 NV_ERROR(dev, "Error initialising AGP: %d\n", ret); 500 NV_ERROR(dev, "Error initialising AGP: %d\n", ret);
@@ -718,8 +520,8 @@ nouveau_mem_init(struct drm_device *dev)
718 return ret; 520 return ret;
719 } 521 }
720 522
721 dev_priv->fb_mtrr = drm_mtrr_add(drm_get_resource_start(dev, 1), 523 dev_priv->fb_mtrr = drm_mtrr_add(pci_resource_start(dev->pdev, 1),
722 drm_get_resource_len(dev, 1), 524 pci_resource_len(dev->pdev, 1),
723 DRM_MTRR_WC); 525 DRM_MTRR_WC);
724 526
725 return 0; 527 return 0;
diff --git a/drivers/gpu/drm/nouveau/nouveau_notifier.c b/drivers/gpu/drm/nouveau/nouveau_notifier.c
index 9537f3e30115..3ec181ff50ce 100644
--- a/drivers/gpu/drm/nouveau/nouveau_notifier.c
+++ b/drivers/gpu/drm/nouveau/nouveau_notifier.c
@@ -55,7 +55,7 @@ nouveau_notifier_init_channel(struct nouveau_channel *chan)
55 if (ret) 55 if (ret)
56 goto out_err; 56 goto out_err;
57 57
58 ret = nouveau_mem_init_heap(&chan->notifier_heap, 0, ntfy->bo.mem.size); 58 ret = drm_mm_init(&chan->notifier_heap, 0, ntfy->bo.mem.size);
59 if (ret) 59 if (ret)
60 goto out_err; 60 goto out_err;
61 61
@@ -80,7 +80,7 @@ nouveau_notifier_takedown_channel(struct nouveau_channel *chan)
80 nouveau_bo_unpin(chan->notifier_bo); 80 nouveau_bo_unpin(chan->notifier_bo);
81 mutex_unlock(&dev->struct_mutex); 81 mutex_unlock(&dev->struct_mutex);
82 drm_gem_object_unreference_unlocked(chan->notifier_bo->gem); 82 drm_gem_object_unreference_unlocked(chan->notifier_bo->gem);
83 nouveau_mem_takedown(&chan->notifier_heap); 83 drm_mm_takedown(&chan->notifier_heap);
84} 84}
85 85
86static void 86static void
@@ -90,7 +90,7 @@ nouveau_notifier_gpuobj_dtor(struct drm_device *dev,
90 NV_DEBUG(dev, "\n"); 90 NV_DEBUG(dev, "\n");
91 91
92 if (gpuobj->priv) 92 if (gpuobj->priv)
93 nouveau_mem_free_block(gpuobj->priv); 93 drm_mm_put_block(gpuobj->priv);
94} 94}
95 95
96int 96int
@@ -100,18 +100,13 @@ nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle,
100 struct drm_device *dev = chan->dev; 100 struct drm_device *dev = chan->dev;
101 struct drm_nouveau_private *dev_priv = dev->dev_private; 101 struct drm_nouveau_private *dev_priv = dev->dev_private;
102 struct nouveau_gpuobj *nobj = NULL; 102 struct nouveau_gpuobj *nobj = NULL;
103 struct mem_block *mem; 103 struct drm_mm_node *mem;
104 uint32_t offset; 104 uint32_t offset;
105 int target, ret; 105 int target, ret;
106 106
107 if (!chan->notifier_heap) { 107 mem = drm_mm_search_free(&chan->notifier_heap, size, 0, 0);
108 NV_ERROR(dev, "Channel %d doesn't have a notifier heap!\n", 108 if (mem)
109 chan->id); 109 mem = drm_mm_get_block(mem, size, 0);
110 return -EINVAL;
111 }
112
113 mem = nouveau_mem_alloc_block(chan->notifier_heap, size, 0,
114 (struct drm_file *)-2, 0);
115 if (!mem) { 110 if (!mem) {
116 NV_ERROR(dev, "Channel %d notifier block full\n", chan->id); 111 NV_ERROR(dev, "Channel %d notifier block full\n", chan->id);
117 return -ENOMEM; 112 return -ENOMEM;
@@ -144,17 +139,17 @@ nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle,
144 mem->size, NV_DMA_ACCESS_RW, target, 139 mem->size, NV_DMA_ACCESS_RW, target,
145 &nobj); 140 &nobj);
146 if (ret) { 141 if (ret) {
147 nouveau_mem_free_block(mem); 142 drm_mm_put_block(mem);
148 NV_ERROR(dev, "Error creating notifier ctxdma: %d\n", ret); 143 NV_ERROR(dev, "Error creating notifier ctxdma: %d\n", ret);
149 return ret; 144 return ret;
150 } 145 }
151 nobj->dtor = nouveau_notifier_gpuobj_dtor; 146 nobj->dtor = nouveau_notifier_gpuobj_dtor;
152 nobj->priv = mem; 147 nobj->priv = mem;
153 148
154 ret = nouveau_gpuobj_ref_add(dev, chan, handle, nobj, NULL); 149 ret = nouveau_gpuobj_ref_add(dev, chan, handle, nobj, NULL);
155 if (ret) { 150 if (ret) {
156 nouveau_gpuobj_del(dev, &nobj); 151 nouveau_gpuobj_del(dev, &nobj);
157 nouveau_mem_free_block(mem); 152 drm_mm_put_block(mem);
158 NV_ERROR(dev, "Error referencing notifier ctxdma: %d\n", ret); 153 NV_ERROR(dev, "Error referencing notifier ctxdma: %d\n", ret);
159 return ret; 154 return ret;
160 } 155 }
@@ -170,7 +165,7 @@ nouveau_notifier_offset(struct nouveau_gpuobj *nobj, uint32_t *poffset)
170 return -EINVAL; 165 return -EINVAL;
171 166
172 if (poffset) { 167 if (poffset) {
173 struct mem_block *mem = nobj->priv; 168 struct drm_mm_node *mem = nobj->priv;
174 169
175 if (*poffset >= mem->size) 170 if (*poffset >= mem->size)
176 return false; 171 return false;
@@ -189,7 +184,6 @@ nouveau_ioctl_notifier_alloc(struct drm_device *dev, void *data,
189 struct nouveau_channel *chan; 184 struct nouveau_channel *chan;
190 int ret; 185 int ret;
191 186
192 NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
193 NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(na->channel, file_priv, chan); 187 NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(na->channel, file_priv, chan);
194 188
195 ret = nouveau_notifier_alloc(chan, na->handle, na->size, &na->offset); 189 ret = nouveau_notifier_alloc(chan, na->handle, na->size, &na->offset);
diff --git a/drivers/gpu/drm/nouveau/nouveau_object.c b/drivers/gpu/drm/nouveau/nouveau_object.c
index e7c100ba63a1..b6bcb254f4ab 100644
--- a/drivers/gpu/drm/nouveau/nouveau_object.c
+++ b/drivers/gpu/drm/nouveau/nouveau_object.c
@@ -132,7 +132,6 @@ nouveau_ramht_insert(struct drm_device *dev, struct nouveau_gpuobj_ref *ref)
132 } 132 }
133 } 133 }
134 134
135 instmem->prepare_access(dev, true);
136 co = ho = nouveau_ramht_hash_handle(dev, chan->id, ref->handle); 135 co = ho = nouveau_ramht_hash_handle(dev, chan->id, ref->handle);
137 do { 136 do {
138 if (!nouveau_ramht_entry_valid(dev, ramht, co)) { 137 if (!nouveau_ramht_entry_valid(dev, ramht, co)) {
@@ -143,7 +142,7 @@ nouveau_ramht_insert(struct drm_device *dev, struct nouveau_gpuobj_ref *ref)
143 nv_wo32(dev, ramht, (co + 4)/4, ctx); 142 nv_wo32(dev, ramht, (co + 4)/4, ctx);
144 143
145 list_add_tail(&ref->list, &chan->ramht_refs); 144 list_add_tail(&ref->list, &chan->ramht_refs);
146 instmem->finish_access(dev); 145 instmem->flush(dev);
147 return 0; 146 return 0;
148 } 147 }
149 NV_DEBUG(dev, "collision ch%d 0x%08x: h=0x%08x\n", 148 NV_DEBUG(dev, "collision ch%d 0x%08x: h=0x%08x\n",
@@ -153,7 +152,6 @@ nouveau_ramht_insert(struct drm_device *dev, struct nouveau_gpuobj_ref *ref)
153 if (co >= dev_priv->ramht_size) 152 if (co >= dev_priv->ramht_size)
154 co = 0; 153 co = 0;
155 } while (co != ho); 154 } while (co != ho);
156 instmem->finish_access(dev);
157 155
158 NV_ERROR(dev, "RAMHT space exhausted. ch=%d\n", chan->id); 156 NV_ERROR(dev, "RAMHT space exhausted. ch=%d\n", chan->id);
159 return -ENOMEM; 157 return -ENOMEM;
@@ -173,7 +171,6 @@ nouveau_ramht_remove(struct drm_device *dev, struct nouveau_gpuobj_ref *ref)
173 return; 171 return;
174 } 172 }
175 173
176 instmem->prepare_access(dev, true);
177 co = ho = nouveau_ramht_hash_handle(dev, chan->id, ref->handle); 174 co = ho = nouveau_ramht_hash_handle(dev, chan->id, ref->handle);
178 do { 175 do {
179 if (nouveau_ramht_entry_valid(dev, ramht, co) && 176 if (nouveau_ramht_entry_valid(dev, ramht, co) &&
@@ -186,7 +183,7 @@ nouveau_ramht_remove(struct drm_device *dev, struct nouveau_gpuobj_ref *ref)
186 nv_wo32(dev, ramht, (co + 4)/4, 0x00000000); 183 nv_wo32(dev, ramht, (co + 4)/4, 0x00000000);
187 184
188 list_del(&ref->list); 185 list_del(&ref->list);
189 instmem->finish_access(dev); 186 instmem->flush(dev);
190 return; 187 return;
191 } 188 }
192 189
@@ -195,7 +192,6 @@ nouveau_ramht_remove(struct drm_device *dev, struct nouveau_gpuobj_ref *ref)
195 co = 0; 192 co = 0;
196 } while (co != ho); 193 } while (co != ho);
197 list_del(&ref->list); 194 list_del(&ref->list);
198 instmem->finish_access(dev);
199 195
200 NV_ERROR(dev, "RAMHT entry not found. ch=%d, handle=0x%08x\n", 196 NV_ERROR(dev, "RAMHT entry not found. ch=%d, handle=0x%08x\n",
201 chan->id, ref->handle); 197 chan->id, ref->handle);
@@ -209,7 +205,7 @@ nouveau_gpuobj_new(struct drm_device *dev, struct nouveau_channel *chan,
209 struct drm_nouveau_private *dev_priv = dev->dev_private; 205 struct drm_nouveau_private *dev_priv = dev->dev_private;
210 struct nouveau_engine *engine = &dev_priv->engine; 206 struct nouveau_engine *engine = &dev_priv->engine;
211 struct nouveau_gpuobj *gpuobj; 207 struct nouveau_gpuobj *gpuobj;
212 struct mem_block *pramin = NULL; 208 struct drm_mm *pramin = NULL;
213 int ret; 209 int ret;
214 210
215 NV_DEBUG(dev, "ch%d size=%u align=%d flags=0x%08x\n", 211 NV_DEBUG(dev, "ch%d size=%u align=%d flags=0x%08x\n",
@@ -233,25 +229,12 @@ nouveau_gpuobj_new(struct drm_device *dev, struct nouveau_channel *chan,
233 * available. 229 * available.
234 */ 230 */
235 if (chan) { 231 if (chan) {
236 if (chan->ramin_heap) { 232 NV_DEBUG(dev, "channel heap\n");
237 NV_DEBUG(dev, "private heap\n"); 233 pramin = &chan->ramin_heap;
238 pramin = chan->ramin_heap;
239 } else
240 if (dev_priv->card_type < NV_50) {
241 NV_DEBUG(dev, "global heap fallback\n");
242 pramin = dev_priv->ramin_heap;
243 }
244 } else { 234 } else {
245 NV_DEBUG(dev, "global heap\n"); 235 NV_DEBUG(dev, "global heap\n");
246 pramin = dev_priv->ramin_heap; 236 pramin = &dev_priv->ramin_heap;
247 }
248
249 if (!pramin) {
250 NV_ERROR(dev, "No PRAMIN heap!\n");
251 return -EINVAL;
252 }
253 237
254 if (!chan) {
255 ret = engine->instmem.populate(dev, gpuobj, &size); 238 ret = engine->instmem.populate(dev, gpuobj, &size);
256 if (ret) { 239 if (ret) {
257 nouveau_gpuobj_del(dev, &gpuobj); 240 nouveau_gpuobj_del(dev, &gpuobj);
@@ -260,9 +243,10 @@ nouveau_gpuobj_new(struct drm_device *dev, struct nouveau_channel *chan,
260 } 243 }
261 244
262 /* Allocate a chunk of the PRAMIN aperture */ 245 /* Allocate a chunk of the PRAMIN aperture */
263 gpuobj->im_pramin = nouveau_mem_alloc_block(pramin, size, 246 gpuobj->im_pramin = drm_mm_search_free(pramin, size, align, 0);
264 drm_order(align), 247 if (gpuobj->im_pramin)
265 (struct drm_file *)-2, 0); 248 gpuobj->im_pramin = drm_mm_get_block(gpuobj->im_pramin, size, align);
249
266 if (!gpuobj->im_pramin) { 250 if (!gpuobj->im_pramin) {
267 nouveau_gpuobj_del(dev, &gpuobj); 251 nouveau_gpuobj_del(dev, &gpuobj);
268 return -ENOMEM; 252 return -ENOMEM;
@@ -279,10 +263,9 @@ nouveau_gpuobj_new(struct drm_device *dev, struct nouveau_channel *chan,
279 if (gpuobj->flags & NVOBJ_FLAG_ZERO_ALLOC) { 263 if (gpuobj->flags & NVOBJ_FLAG_ZERO_ALLOC) {
280 int i; 264 int i;
281 265
282 engine->instmem.prepare_access(dev, true);
283 for (i = 0; i < gpuobj->im_pramin->size; i += 4) 266 for (i = 0; i < gpuobj->im_pramin->size; i += 4)
284 nv_wo32(dev, gpuobj, i/4, 0); 267 nv_wo32(dev, gpuobj, i/4, 0);
285 engine->instmem.finish_access(dev); 268 engine->instmem.flush(dev);
286 } 269 }
287 270
288 *gpuobj_ret = gpuobj; 271 *gpuobj_ret = gpuobj;
@@ -370,10 +353,9 @@ nouveau_gpuobj_del(struct drm_device *dev, struct nouveau_gpuobj **pgpuobj)
370 } 353 }
371 354
372 if (gpuobj->im_pramin && (gpuobj->flags & NVOBJ_FLAG_ZERO_FREE)) { 355 if (gpuobj->im_pramin && (gpuobj->flags & NVOBJ_FLAG_ZERO_FREE)) {
373 engine->instmem.prepare_access(dev, true);
374 for (i = 0; i < gpuobj->im_pramin->size; i += 4) 356 for (i = 0; i < gpuobj->im_pramin->size; i += 4)
375 nv_wo32(dev, gpuobj, i/4, 0); 357 nv_wo32(dev, gpuobj, i/4, 0);
376 engine->instmem.finish_access(dev); 358 engine->instmem.flush(dev);
377 } 359 }
378 360
379 if (gpuobj->dtor) 361 if (gpuobj->dtor)
@@ -386,7 +368,7 @@ nouveau_gpuobj_del(struct drm_device *dev, struct nouveau_gpuobj **pgpuobj)
386 if (gpuobj->flags & NVOBJ_FLAG_FAKE) 368 if (gpuobj->flags & NVOBJ_FLAG_FAKE)
387 kfree(gpuobj->im_pramin); 369 kfree(gpuobj->im_pramin);
388 else 370 else
389 nouveau_mem_free_block(gpuobj->im_pramin); 371 drm_mm_put_block(gpuobj->im_pramin);
390 } 372 }
391 373
392 list_del(&gpuobj->list); 374 list_del(&gpuobj->list);
@@ -589,7 +571,7 @@ nouveau_gpuobj_new_fake(struct drm_device *dev, uint32_t p_offset,
589 list_add_tail(&gpuobj->list, &dev_priv->gpuobj_list); 571 list_add_tail(&gpuobj->list, &dev_priv->gpuobj_list);
590 572
591 if (p_offset != ~0) { 573 if (p_offset != ~0) {
592 gpuobj->im_pramin = kzalloc(sizeof(struct mem_block), 574 gpuobj->im_pramin = kzalloc(sizeof(struct drm_mm_node),
593 GFP_KERNEL); 575 GFP_KERNEL);
594 if (!gpuobj->im_pramin) { 576 if (!gpuobj->im_pramin) {
595 nouveau_gpuobj_del(dev, &gpuobj); 577 nouveau_gpuobj_del(dev, &gpuobj);
@@ -605,10 +587,9 @@ nouveau_gpuobj_new_fake(struct drm_device *dev, uint32_t p_offset,
605 } 587 }
606 588
607 if (gpuobj->flags & NVOBJ_FLAG_ZERO_ALLOC) { 589 if (gpuobj->flags & NVOBJ_FLAG_ZERO_ALLOC) {
608 dev_priv->engine.instmem.prepare_access(dev, true);
609 for (i = 0; i < gpuobj->im_pramin->size; i += 4) 590 for (i = 0; i < gpuobj->im_pramin->size; i += 4)
610 nv_wo32(dev, gpuobj, i/4, 0); 591 nv_wo32(dev, gpuobj, i/4, 0);
611 dev_priv->engine.instmem.finish_access(dev); 592 dev_priv->engine.instmem.flush(dev);
612 } 593 }
613 594
614 if (pref) { 595 if (pref) {
@@ -696,8 +677,6 @@ nouveau_gpuobj_dma_new(struct nouveau_channel *chan, int class,
696 return ret; 677 return ret;
697 } 678 }
698 679
699 instmem->prepare_access(dev, true);
700
701 if (dev_priv->card_type < NV_50) { 680 if (dev_priv->card_type < NV_50) {
702 uint32_t frame, adjust, pte_flags = 0; 681 uint32_t frame, adjust, pte_flags = 0;
703 682
@@ -734,7 +713,7 @@ nouveau_gpuobj_dma_new(struct nouveau_channel *chan, int class,
734 nv_wo32(dev, *gpuobj, 5, flags5); 713 nv_wo32(dev, *gpuobj, 5, flags5);
735 } 714 }
736 715
737 instmem->finish_access(dev); 716 instmem->flush(dev);
738 717
739 (*gpuobj)->engine = NVOBJ_ENGINE_SW; 718 (*gpuobj)->engine = NVOBJ_ENGINE_SW;
740 (*gpuobj)->class = class; 719 (*gpuobj)->class = class;
@@ -849,7 +828,6 @@ nouveau_gpuobj_gr_new(struct nouveau_channel *chan, int class,
849 return ret; 828 return ret;
850 } 829 }
851 830
852 dev_priv->engine.instmem.prepare_access(dev, true);
853 if (dev_priv->card_type >= NV_50) { 831 if (dev_priv->card_type >= NV_50) {
854 nv_wo32(dev, *gpuobj, 0, class); 832 nv_wo32(dev, *gpuobj, 0, class);
855 nv_wo32(dev, *gpuobj, 5, 0x00010000); 833 nv_wo32(dev, *gpuobj, 5, 0x00010000);
@@ -874,7 +852,7 @@ nouveau_gpuobj_gr_new(struct nouveau_channel *chan, int class,
874 } 852 }
875 } 853 }
876 } 854 }
877 dev_priv->engine.instmem.finish_access(dev); 855 dev_priv->engine.instmem.flush(dev);
878 856
879 (*gpuobj)->engine = NVOBJ_ENGINE_GR; 857 (*gpuobj)->engine = NVOBJ_ENGINE_GR;
880 (*gpuobj)->class = class; 858 (*gpuobj)->class = class;
@@ -920,6 +898,7 @@ nouveau_gpuobj_channel_init_pramin(struct nouveau_channel *chan)
920 base = 0; 898 base = 0;
921 899
922 /* PGRAPH context */ 900 /* PGRAPH context */
901 size += dev_priv->engine.graph.grctx_size;
923 902
924 if (dev_priv->card_type == NV_50) { 903 if (dev_priv->card_type == NV_50) {
925 /* Various fixed table thingos */ 904 /* Various fixed table thingos */
@@ -930,12 +909,8 @@ nouveau_gpuobj_channel_init_pramin(struct nouveau_channel *chan)
930 size += 0x8000; 909 size += 0x8000;
931 /* RAMFC */ 910 /* RAMFC */
932 size += 0x1000; 911 size += 0x1000;
933 /* PGRAPH context */
934 size += 0x70000;
935 } 912 }
936 913
937 NV_DEBUG(dev, "ch%d PRAMIN size: 0x%08x bytes, base alloc=0x%08x\n",
938 chan->id, size, base);
939 ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, size, 0x1000, 0, 914 ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, size, 0x1000, 0,
940 &chan->ramin); 915 &chan->ramin);
941 if (ret) { 916 if (ret) {
@@ -944,8 +919,7 @@ nouveau_gpuobj_channel_init_pramin(struct nouveau_channel *chan)
944 } 919 }
945 pramin = chan->ramin->gpuobj; 920 pramin = chan->ramin->gpuobj;
946 921
947 ret = nouveau_mem_init_heap(&chan->ramin_heap, 922 ret = drm_mm_init(&chan->ramin_heap, pramin->im_pramin->start + base, size);
948 pramin->im_pramin->start + base, size);
949 if (ret) { 923 if (ret) {
950 NV_ERROR(dev, "Error creating PRAMIN heap: %d\n", ret); 924 NV_ERROR(dev, "Error creating PRAMIN heap: %d\n", ret);
951 nouveau_gpuobj_ref_del(dev, &chan->ramin); 925 nouveau_gpuobj_ref_del(dev, &chan->ramin);
@@ -969,15 +943,11 @@ nouveau_gpuobj_channel_init(struct nouveau_channel *chan,
969 943
970 NV_DEBUG(dev, "ch%d vram=0x%08x tt=0x%08x\n", chan->id, vram_h, tt_h); 944 NV_DEBUG(dev, "ch%d vram=0x%08x tt=0x%08x\n", chan->id, vram_h, tt_h);
971 945
972 /* Reserve a block of PRAMIN for the channel 946 /* Allocate a chunk of memory for per-channel object storage */
973 *XXX: maybe on <NV50 too at some point 947 ret = nouveau_gpuobj_channel_init_pramin(chan);
974 */ 948 if (ret) {
975 if (0 || dev_priv->card_type == NV_50) { 949 NV_ERROR(dev, "init pramin\n");
976 ret = nouveau_gpuobj_channel_init_pramin(chan); 950 return ret;
977 if (ret) {
978 NV_ERROR(dev, "init pramin\n");
979 return ret;
980 }
981 } 951 }
982 952
983 /* NV50 VM 953 /* NV50 VM
@@ -988,17 +958,13 @@ nouveau_gpuobj_channel_init(struct nouveau_channel *chan,
988 if (dev_priv->card_type >= NV_50) { 958 if (dev_priv->card_type >= NV_50) {
989 uint32_t vm_offset, pde; 959 uint32_t vm_offset, pde;
990 960
991 instmem->prepare_access(dev, true);
992
993 vm_offset = (dev_priv->chipset & 0xf0) == 0x50 ? 0x1400 : 0x200; 961 vm_offset = (dev_priv->chipset & 0xf0) == 0x50 ? 0x1400 : 0x200;
994 vm_offset += chan->ramin->gpuobj->im_pramin->start; 962 vm_offset += chan->ramin->gpuobj->im_pramin->start;
995 963
996 ret = nouveau_gpuobj_new_fake(dev, vm_offset, ~0, 0x4000, 964 ret = nouveau_gpuobj_new_fake(dev, vm_offset, ~0, 0x4000,
997 0, &chan->vm_pd, NULL); 965 0, &chan->vm_pd, NULL);
998 if (ret) { 966 if (ret)
999 instmem->finish_access(dev);
1000 return ret; 967 return ret;
1001 }
1002 for (i = 0; i < 0x4000; i += 8) { 968 for (i = 0; i < 0x4000; i += 8) {
1003 nv_wo32(dev, chan->vm_pd, (i+0)/4, 0x00000000); 969 nv_wo32(dev, chan->vm_pd, (i+0)/4, 0x00000000);
1004 nv_wo32(dev, chan->vm_pd, (i+4)/4, 0xdeadcafe); 970 nv_wo32(dev, chan->vm_pd, (i+4)/4, 0xdeadcafe);
@@ -1008,10 +974,8 @@ nouveau_gpuobj_channel_init(struct nouveau_channel *chan,
1008 ret = nouveau_gpuobj_ref_add(dev, NULL, 0, 974 ret = nouveau_gpuobj_ref_add(dev, NULL, 0,
1009 dev_priv->gart_info.sg_ctxdma, 975 dev_priv->gart_info.sg_ctxdma,
1010 &chan->vm_gart_pt); 976 &chan->vm_gart_pt);
1011 if (ret) { 977 if (ret)
1012 instmem->finish_access(dev);
1013 return ret; 978 return ret;
1014 }
1015 nv_wo32(dev, chan->vm_pd, pde++, 979 nv_wo32(dev, chan->vm_pd, pde++,
1016 chan->vm_gart_pt->instance | 0x03); 980 chan->vm_gart_pt->instance | 0x03);
1017 nv_wo32(dev, chan->vm_pd, pde++, 0x00000000); 981 nv_wo32(dev, chan->vm_pd, pde++, 0x00000000);
@@ -1021,17 +985,15 @@ nouveau_gpuobj_channel_init(struct nouveau_channel *chan,
1021 ret = nouveau_gpuobj_ref_add(dev, NULL, 0, 985 ret = nouveau_gpuobj_ref_add(dev, NULL, 0,
1022 dev_priv->vm_vram_pt[i], 986 dev_priv->vm_vram_pt[i],
1023 &chan->vm_vram_pt[i]); 987 &chan->vm_vram_pt[i]);
1024 if (ret) { 988 if (ret)
1025 instmem->finish_access(dev);
1026 return ret; 989 return ret;
1027 }
1028 990
1029 nv_wo32(dev, chan->vm_pd, pde++, 991 nv_wo32(dev, chan->vm_pd, pde++,
1030 chan->vm_vram_pt[i]->instance | 0x61); 992 chan->vm_vram_pt[i]->instance | 0x61);
1031 nv_wo32(dev, chan->vm_pd, pde++, 0x00000000); 993 nv_wo32(dev, chan->vm_pd, pde++, 0x00000000);
1032 } 994 }
1033 995
1034 instmem->finish_access(dev); 996 instmem->flush(dev);
1035 } 997 }
1036 998
1037 /* RAMHT */ 999 /* RAMHT */
@@ -1130,8 +1092,8 @@ nouveau_gpuobj_channel_takedown(struct nouveau_channel *chan)
1130 for (i = 0; i < dev_priv->vm_vram_pt_nr; i++) 1092 for (i = 0; i < dev_priv->vm_vram_pt_nr; i++)
1131 nouveau_gpuobj_ref_del(dev, &chan->vm_vram_pt[i]); 1093 nouveau_gpuobj_ref_del(dev, &chan->vm_vram_pt[i]);
1132 1094
1133 if (chan->ramin_heap) 1095 if (chan->ramin_heap.free_stack.next)
1134 nouveau_mem_takedown(&chan->ramin_heap); 1096 drm_mm_takedown(&chan->ramin_heap);
1135 if (chan->ramin) 1097 if (chan->ramin)
1136 nouveau_gpuobj_ref_del(dev, &chan->ramin); 1098 nouveau_gpuobj_ref_del(dev, &chan->ramin);
1137 1099
@@ -1164,10 +1126,8 @@ nouveau_gpuobj_suspend(struct drm_device *dev)
1164 return -ENOMEM; 1126 return -ENOMEM;
1165 } 1127 }
1166 1128
1167 dev_priv->engine.instmem.prepare_access(dev, false);
1168 for (i = 0; i < gpuobj->im_pramin->size / 4; i++) 1129 for (i = 0; i < gpuobj->im_pramin->size / 4; i++)
1169 gpuobj->im_backing_suspend[i] = nv_ro32(dev, gpuobj, i); 1130 gpuobj->im_backing_suspend[i] = nv_ro32(dev, gpuobj, i);
1170 dev_priv->engine.instmem.finish_access(dev);
1171 } 1131 }
1172 1132
1173 return 0; 1133 return 0;
@@ -1212,10 +1172,9 @@ nouveau_gpuobj_resume(struct drm_device *dev)
1212 if (!gpuobj->im_backing_suspend) 1172 if (!gpuobj->im_backing_suspend)
1213 continue; 1173 continue;
1214 1174
1215 dev_priv->engine.instmem.prepare_access(dev, true);
1216 for (i = 0; i < gpuobj->im_pramin->size / 4; i++) 1175 for (i = 0; i < gpuobj->im_pramin->size / 4; i++)
1217 nv_wo32(dev, gpuobj, i, gpuobj->im_backing_suspend[i]); 1176 nv_wo32(dev, gpuobj, i, gpuobj->im_backing_suspend[i]);
1218 dev_priv->engine.instmem.finish_access(dev); 1177 dev_priv->engine.instmem.flush(dev);
1219 } 1178 }
1220 1179
1221 nouveau_gpuobj_suspend_cleanup(dev); 1180 nouveau_gpuobj_suspend_cleanup(dev);
@@ -1232,7 +1191,6 @@ int nouveau_ioctl_grobj_alloc(struct drm_device *dev, void *data,
1232 struct nouveau_channel *chan; 1191 struct nouveau_channel *chan;
1233 int ret; 1192 int ret;
1234 1193
1235 NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
1236 NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(init->channel, file_priv, chan); 1194 NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(init->channel, file_priv, chan);
1237 1195
1238 if (init->handle == ~0) 1196 if (init->handle == ~0)
@@ -1283,7 +1241,6 @@ int nouveau_ioctl_gpuobj_free(struct drm_device *dev, void *data,
1283 struct nouveau_channel *chan; 1241 struct nouveau_channel *chan;
1284 int ret; 1242 int ret;
1285 1243
1286 NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
1287 NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(objfree->channel, file_priv, chan); 1244 NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(objfree->channel, file_priv, chan);
1288 1245
1289 ret = nouveau_gpuobj_ref_find(chan, objfree->handle, &ref); 1246 ret = nouveau_gpuobj_ref_find(chan, objfree->handle, &ref);
diff --git a/drivers/gpu/drm/nouveau/nouveau_reg.h b/drivers/gpu/drm/nouveau/nouveau_reg.h
index 6ca80a3fe70d..9c1056cb8a90 100644
--- a/drivers/gpu/drm/nouveau/nouveau_reg.h
+++ b/drivers/gpu/drm/nouveau/nouveau_reg.h
@@ -1,19 +1,64 @@
1 1
2#define NV04_PFB_BOOT_0 0x00100000
3# define NV04_PFB_BOOT_0_RAM_AMOUNT 0x00000003
4# define NV04_PFB_BOOT_0_RAM_AMOUNT_32MB 0x00000000
5# define NV04_PFB_BOOT_0_RAM_AMOUNT_4MB 0x00000001
6# define NV04_PFB_BOOT_0_RAM_AMOUNT_8MB 0x00000002
7# define NV04_PFB_BOOT_0_RAM_AMOUNT_16MB 0x00000003
8# define NV04_PFB_BOOT_0_RAM_WIDTH_128 0x00000004
9# define NV04_PFB_BOOT_0_RAM_TYPE 0x00000028
10# define NV04_PFB_BOOT_0_RAM_TYPE_SGRAM_8MBIT 0x00000000
11# define NV04_PFB_BOOT_0_RAM_TYPE_SGRAM_16MBIT 0x00000008
12# define NV04_PFB_BOOT_0_RAM_TYPE_SGRAM_16MBIT_4BANK 0x00000010
13# define NV04_PFB_BOOT_0_RAM_TYPE_SDRAM_16MBIT 0x00000018
14# define NV04_PFB_BOOT_0_RAM_TYPE_SDRAM_64MBIT 0x00000020
15# define NV04_PFB_BOOT_0_RAM_TYPE_SDRAM_64MBITX16 0x00000028
16# define NV04_PFB_BOOT_0_UMA_ENABLE 0x00000100
17# define NV04_PFB_BOOT_0_UMA_SIZE 0x0000f000
18#define NV04_PFB_DEBUG_0 0x00100080
19# define NV04_PFB_DEBUG_0_PAGE_MODE 0x00000001
20# define NV04_PFB_DEBUG_0_REFRESH_OFF 0x00000010
21# define NV04_PFB_DEBUG_0_REFRESH_COUNTX64 0x00003f00
22# define NV04_PFB_DEBUG_0_REFRESH_SLOW_CLK 0x00004000
23# define NV04_PFB_DEBUG_0_SAFE_MODE 0x00008000
24# define NV04_PFB_DEBUG_0_ALOM_ENABLE 0x00010000
25# define NV04_PFB_DEBUG_0_CASOE 0x00100000
26# define NV04_PFB_DEBUG_0_CKE_INVERT 0x10000000
27# define NV04_PFB_DEBUG_0_REFINC 0x20000000
28# define NV04_PFB_DEBUG_0_SAVE_POWER_OFF 0x40000000
29#define NV04_PFB_CFG0 0x00100200
30# define NV04_PFB_CFG0_SCRAMBLE 0x20000000
31#define NV04_PFB_CFG1 0x00100204
32#define NV04_PFB_FIFO_DATA 0x0010020c
33# define NV10_PFB_FIFO_DATA_RAM_AMOUNT_MB_MASK 0xfff00000
34# define NV10_PFB_FIFO_DATA_RAM_AMOUNT_MB_SHIFT 20
35#define NV10_PFB_REFCTRL 0x00100210
36# define NV10_PFB_REFCTRL_VALID_1 (1 << 31)
37#define NV04_PFB_PAD 0x0010021c
38# define NV04_PFB_PAD_CKE_NORMAL (1 << 0)
39#define NV10_PFB_TILE(i) (0x00100240 + (i*16))
40#define NV10_PFB_TILE__SIZE 8
41#define NV10_PFB_TLIMIT(i) (0x00100244 + (i*16))
42#define NV10_PFB_TSIZE(i) (0x00100248 + (i*16))
43#define NV10_PFB_TSTATUS(i) (0x0010024c + (i*16))
44#define NV04_PFB_REF 0x001002d0
45# define NV04_PFB_REF_CMD_REFRESH (1 << 0)
46#define NV04_PFB_PRE 0x001002d4
47# define NV04_PFB_PRE_CMD_PRECHARGE (1 << 0)
48#define NV10_PFB_CLOSE_PAGE2 0x0010033c
49#define NV04_PFB_SCRAMBLE(i) (0x00100400 + 4 * (i))
50#define NV40_PFB_TILE(i) (0x00100600 + (i*16))
51#define NV40_PFB_TILE__SIZE_0 12
52#define NV40_PFB_TILE__SIZE_1 15
53#define NV40_PFB_TLIMIT(i) (0x00100604 + (i*16))
54#define NV40_PFB_TSIZE(i) (0x00100608 + (i*16))
55#define NV40_PFB_TSTATUS(i) (0x0010060c + (i*16))
56#define NV40_PFB_UNK_800 0x00100800
2 57
3#define NV03_BOOT_0 0x00100000 58#define NV_PEXTDEV_BOOT_0 0x00101000
4# define NV03_BOOT_0_RAM_AMOUNT 0x00000003 59#define NV_PEXTDEV_BOOT_0_RAMCFG 0x0000003c
5# define NV03_BOOT_0_RAM_AMOUNT_8MB 0x00000000 60# define NV_PEXTDEV_BOOT_0_STRAP_FP_IFACE_12BIT (8 << 12)
6# define NV03_BOOT_0_RAM_AMOUNT_2MB 0x00000001 61#define NV_PEXTDEV_BOOT_3 0x0010100c
7# define NV03_BOOT_0_RAM_AMOUNT_4MB 0x00000002
8# define NV03_BOOT_0_RAM_AMOUNT_8MB_SDRAM 0x00000003
9# define NV04_BOOT_0_RAM_AMOUNT_32MB 0x00000000
10# define NV04_BOOT_0_RAM_AMOUNT_4MB 0x00000001
11# define NV04_BOOT_0_RAM_AMOUNT_8MB 0x00000002
12# define NV04_BOOT_0_RAM_AMOUNT_16MB 0x00000003
13
14#define NV04_FIFO_DATA 0x0010020c
15# define NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK 0xfff00000
16# define NV10_FIFO_DATA_RAM_AMOUNT_MB_SHIFT 20
17 62
18#define NV_RAMIN 0x00700000 63#define NV_RAMIN 0x00700000
19 64
@@ -131,23 +176,6 @@
131#define NV04_PTIMER_TIME_1 0x00009410 176#define NV04_PTIMER_TIME_1 0x00009410
132#define NV04_PTIMER_ALARM_0 0x00009420 177#define NV04_PTIMER_ALARM_0 0x00009420
133 178
134#define NV04_PFB_CFG0 0x00100200
135#define NV04_PFB_CFG1 0x00100204
136#define NV40_PFB_020C 0x0010020C
137#define NV10_PFB_TILE(i) (0x00100240 + (i*16))
138#define NV10_PFB_TILE__SIZE 8
139#define NV10_PFB_TLIMIT(i) (0x00100244 + (i*16))
140#define NV10_PFB_TSIZE(i) (0x00100248 + (i*16))
141#define NV10_PFB_TSTATUS(i) (0x0010024C + (i*16))
142#define NV10_PFB_CLOSE_PAGE2 0x0010033C
143#define NV40_PFB_TILE(i) (0x00100600 + (i*16))
144#define NV40_PFB_TILE__SIZE_0 12
145#define NV40_PFB_TILE__SIZE_1 15
146#define NV40_PFB_TLIMIT(i) (0x00100604 + (i*16))
147#define NV40_PFB_TSIZE(i) (0x00100608 + (i*16))
148#define NV40_PFB_TSTATUS(i) (0x0010060C + (i*16))
149#define NV40_PFB_UNK_800 0x00100800
150
151#define NV04_PGRAPH_DEBUG_0 0x00400080 179#define NV04_PGRAPH_DEBUG_0 0x00400080
152#define NV04_PGRAPH_DEBUG_1 0x00400084 180#define NV04_PGRAPH_DEBUG_1 0x00400084
153#define NV04_PGRAPH_DEBUG_2 0x00400088 181#define NV04_PGRAPH_DEBUG_2 0x00400088
@@ -814,6 +842,7 @@
814#define NV50_PDISPLAY_SOR_BACKLIGHT_ENABLE 0x80000000 842#define NV50_PDISPLAY_SOR_BACKLIGHT_ENABLE 0x80000000
815#define NV50_PDISPLAY_SOR_BACKLIGHT_LEVEL 0x00000fff 843#define NV50_PDISPLAY_SOR_BACKLIGHT_LEVEL 0x00000fff
816#define NV50_SOR_DP_CTRL(i,l) (0x0061c10c + (i) * 0x800 + (l) * 0x80) 844#define NV50_SOR_DP_CTRL(i,l) (0x0061c10c + (i) * 0x800 + (l) * 0x80)
845#define NV50_SOR_DP_CTRL_ENABLED 0x00000001
817#define NV50_SOR_DP_CTRL_ENHANCED_FRAME_ENABLED 0x00004000 846#define NV50_SOR_DP_CTRL_ENHANCED_FRAME_ENABLED 0x00004000
818#define NV50_SOR_DP_CTRL_LANE_MASK 0x001f0000 847#define NV50_SOR_DP_CTRL_LANE_MASK 0x001f0000
819#define NV50_SOR_DP_CTRL_LANE_0_ENABLED 0x00010000 848#define NV50_SOR_DP_CTRL_LANE_0_ENABLED 0x00010000
diff --git a/drivers/gpu/drm/nouveau/nouveau_sgdma.c b/drivers/gpu/drm/nouveau/nouveau_sgdma.c
index 1d6ee8b55154..491767fe4fcf 100644
--- a/drivers/gpu/drm/nouveau/nouveau_sgdma.c
+++ b/drivers/gpu/drm/nouveau/nouveau_sgdma.c
@@ -97,7 +97,6 @@ nouveau_sgdma_bind(struct ttm_backend *be, struct ttm_mem_reg *mem)
97 97
98 NV_DEBUG(dev, "pg=0x%lx\n", mem->mm_node->start); 98 NV_DEBUG(dev, "pg=0x%lx\n", mem->mm_node->start);
99 99
100 dev_priv->engine.instmem.prepare_access(nvbe->dev, true);
101 pte = nouveau_sgdma_pte(nvbe->dev, mem->mm_node->start << PAGE_SHIFT); 100 pte = nouveau_sgdma_pte(nvbe->dev, mem->mm_node->start << PAGE_SHIFT);
102 nvbe->pte_start = pte; 101 nvbe->pte_start = pte;
103 for (i = 0; i < nvbe->nr_pages; i++) { 102 for (i = 0; i < nvbe->nr_pages; i++) {
@@ -116,24 +115,11 @@ nouveau_sgdma_bind(struct ttm_backend *be, struct ttm_mem_reg *mem)
116 dma_offset += NV_CTXDMA_PAGE_SIZE; 115 dma_offset += NV_CTXDMA_PAGE_SIZE;
117 } 116 }
118 } 117 }
119 dev_priv->engine.instmem.finish_access(nvbe->dev); 118 dev_priv->engine.instmem.flush(nvbe->dev);
120 119
121 if (dev_priv->card_type == NV_50) { 120 if (dev_priv->card_type == NV_50) {
122 nv_wr32(dev, 0x100c80, 0x00050001); 121 nv50_vm_flush(dev, 5); /* PGRAPH */
123 if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) { 122 nv50_vm_flush(dev, 0); /* PFIFO */
124 NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
125 NV_ERROR(dev, "0x100c80 = 0x%08x\n",
126 nv_rd32(dev, 0x100c80));
127 return -EBUSY;
128 }
129
130 nv_wr32(dev, 0x100c80, 0x00000001);
131 if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
132 NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
133 NV_ERROR(dev, "0x100c80 = 0x%08x\n",
134 nv_rd32(dev, 0x100c80));
135 return -EBUSY;
136 }
137 } 123 }
138 124
139 nvbe->bound = true; 125 nvbe->bound = true;
@@ -154,7 +140,6 @@ nouveau_sgdma_unbind(struct ttm_backend *be)
154 if (!nvbe->bound) 140 if (!nvbe->bound)
155 return 0; 141 return 0;
156 142
157 dev_priv->engine.instmem.prepare_access(nvbe->dev, true);
158 pte = nvbe->pte_start; 143 pte = nvbe->pte_start;
159 for (i = 0; i < nvbe->nr_pages; i++) { 144 for (i = 0; i < nvbe->nr_pages; i++) {
160 dma_addr_t dma_offset = dev_priv->gart_info.sg_dummy_bus; 145 dma_addr_t dma_offset = dev_priv->gart_info.sg_dummy_bus;
@@ -170,24 +155,11 @@ nouveau_sgdma_unbind(struct ttm_backend *be)
170 dma_offset += NV_CTXDMA_PAGE_SIZE; 155 dma_offset += NV_CTXDMA_PAGE_SIZE;
171 } 156 }
172 } 157 }
173 dev_priv->engine.instmem.finish_access(nvbe->dev); 158 dev_priv->engine.instmem.flush(nvbe->dev);
174 159
175 if (dev_priv->card_type == NV_50) { 160 if (dev_priv->card_type == NV_50) {
176 nv_wr32(dev, 0x100c80, 0x00050001); 161 nv50_vm_flush(dev, 5);
177 if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) { 162 nv50_vm_flush(dev, 0);
178 NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
179 NV_ERROR(dev, "0x100c80 = 0x%08x\n",
180 nv_rd32(dev, 0x100c80));
181 return -EBUSY;
182 }
183
184 nv_wr32(dev, 0x100c80, 0x00000001);
185 if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
186 NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
187 NV_ERROR(dev, "0x100c80 = 0x%08x\n",
188 nv_rd32(dev, 0x100c80));
189 return -EBUSY;
190 }
191 } 163 }
192 164
193 nvbe->bound = false; 165 nvbe->bound = false;
@@ -272,7 +244,6 @@ nouveau_sgdma_init(struct drm_device *dev)
272 pci_map_page(dev->pdev, dev_priv->gart_info.sg_dummy_page, 0, 244 pci_map_page(dev->pdev, dev_priv->gart_info.sg_dummy_page, 0,
273 PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); 245 PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
274 246
275 dev_priv->engine.instmem.prepare_access(dev, true);
276 if (dev_priv->card_type < NV_50) { 247 if (dev_priv->card_type < NV_50) {
277 /* Maybe use NV_DMA_TARGET_AGP for PCIE? NVIDIA do this, and 248 /* Maybe use NV_DMA_TARGET_AGP for PCIE? NVIDIA do this, and
278 * confirmed to work on c51. Perhaps means NV_DMA_TARGET_PCIE 249 * confirmed to work on c51. Perhaps means NV_DMA_TARGET_PCIE
@@ -294,7 +265,7 @@ nouveau_sgdma_init(struct drm_device *dev)
294 nv_wo32(dev, gpuobj, (i+4)/4, 0); 265 nv_wo32(dev, gpuobj, (i+4)/4, 0);
295 } 266 }
296 } 267 }
297 dev_priv->engine.instmem.finish_access(dev); 268 dev_priv->engine.instmem.flush(dev);
298 269
299 dev_priv->gart_info.type = NOUVEAU_GART_SGDMA; 270 dev_priv->gart_info.type = NOUVEAU_GART_SGDMA;
300 dev_priv->gart_info.aper_base = 0; 271 dev_priv->gart_info.aper_base = 0;
@@ -325,14 +296,11 @@ nouveau_sgdma_get_page(struct drm_device *dev, uint32_t offset, uint32_t *page)
325{ 296{
326 struct drm_nouveau_private *dev_priv = dev->dev_private; 297 struct drm_nouveau_private *dev_priv = dev->dev_private;
327 struct nouveau_gpuobj *gpuobj = dev_priv->gart_info.sg_ctxdma; 298 struct nouveau_gpuobj *gpuobj = dev_priv->gart_info.sg_ctxdma;
328 struct nouveau_instmem_engine *instmem = &dev_priv->engine.instmem;
329 int pte; 299 int pte;
330 300
331 pte = (offset >> NV_CTXDMA_PAGE_SHIFT); 301 pte = (offset >> NV_CTXDMA_PAGE_SHIFT);
332 if (dev_priv->card_type < NV_50) { 302 if (dev_priv->card_type < NV_50) {
333 instmem->prepare_access(dev, false);
334 *page = nv_ro32(dev, gpuobj, (pte + 2)) & ~NV_CTXDMA_PAGE_MASK; 303 *page = nv_ro32(dev, gpuobj, (pte + 2)) & ~NV_CTXDMA_PAGE_MASK;
335 instmem->finish_access(dev);
336 return 0; 304 return 0;
337 } 305 }
338 306
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index b02a231d6937..ee3729e7823b 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -38,6 +38,7 @@
38#include "nv50_display.h" 38#include "nv50_display.h"
39 39
40static void nouveau_stub_takedown(struct drm_device *dev) {} 40static void nouveau_stub_takedown(struct drm_device *dev) {}
41static int nouveau_stub_init(struct drm_device *dev) { return 0; }
41 42
42static int nouveau_init_engine_ptrs(struct drm_device *dev) 43static int nouveau_init_engine_ptrs(struct drm_device *dev)
43{ 44{
@@ -54,8 +55,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
54 engine->instmem.clear = nv04_instmem_clear; 55 engine->instmem.clear = nv04_instmem_clear;
55 engine->instmem.bind = nv04_instmem_bind; 56 engine->instmem.bind = nv04_instmem_bind;
56 engine->instmem.unbind = nv04_instmem_unbind; 57 engine->instmem.unbind = nv04_instmem_unbind;
57 engine->instmem.prepare_access = nv04_instmem_prepare_access; 58 engine->instmem.flush = nv04_instmem_flush;
58 engine->instmem.finish_access = nv04_instmem_finish_access;
59 engine->mc.init = nv04_mc_init; 59 engine->mc.init = nv04_mc_init;
60 engine->mc.takedown = nv04_mc_takedown; 60 engine->mc.takedown = nv04_mc_takedown;
61 engine->timer.init = nv04_timer_init; 61 engine->timer.init = nv04_timer_init;
@@ -85,6 +85,16 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
85 engine->fifo.destroy_context = nv04_fifo_destroy_context; 85 engine->fifo.destroy_context = nv04_fifo_destroy_context;
86 engine->fifo.load_context = nv04_fifo_load_context; 86 engine->fifo.load_context = nv04_fifo_load_context;
87 engine->fifo.unload_context = nv04_fifo_unload_context; 87 engine->fifo.unload_context = nv04_fifo_unload_context;
88 engine->display.early_init = nv04_display_early_init;
89 engine->display.late_takedown = nv04_display_late_takedown;
90 engine->display.create = nv04_display_create;
91 engine->display.init = nv04_display_init;
92 engine->display.destroy = nv04_display_destroy;
93 engine->gpio.init = nouveau_stub_init;
94 engine->gpio.takedown = nouveau_stub_takedown;
95 engine->gpio.get = NULL;
96 engine->gpio.set = NULL;
97 engine->gpio.irq_enable = NULL;
88 break; 98 break;
89 case 0x10: 99 case 0x10:
90 engine->instmem.init = nv04_instmem_init; 100 engine->instmem.init = nv04_instmem_init;
@@ -95,8 +105,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
95 engine->instmem.clear = nv04_instmem_clear; 105 engine->instmem.clear = nv04_instmem_clear;
96 engine->instmem.bind = nv04_instmem_bind; 106 engine->instmem.bind = nv04_instmem_bind;
97 engine->instmem.unbind = nv04_instmem_unbind; 107 engine->instmem.unbind = nv04_instmem_unbind;
98 engine->instmem.prepare_access = nv04_instmem_prepare_access; 108 engine->instmem.flush = nv04_instmem_flush;
99 engine->instmem.finish_access = nv04_instmem_finish_access;
100 engine->mc.init = nv04_mc_init; 109 engine->mc.init = nv04_mc_init;
101 engine->mc.takedown = nv04_mc_takedown; 110 engine->mc.takedown = nv04_mc_takedown;
102 engine->timer.init = nv04_timer_init; 111 engine->timer.init = nv04_timer_init;
@@ -128,6 +137,16 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
128 engine->fifo.destroy_context = nv10_fifo_destroy_context; 137 engine->fifo.destroy_context = nv10_fifo_destroy_context;
129 engine->fifo.load_context = nv10_fifo_load_context; 138 engine->fifo.load_context = nv10_fifo_load_context;
130 engine->fifo.unload_context = nv10_fifo_unload_context; 139 engine->fifo.unload_context = nv10_fifo_unload_context;
140 engine->display.early_init = nv04_display_early_init;
141 engine->display.late_takedown = nv04_display_late_takedown;
142 engine->display.create = nv04_display_create;
143 engine->display.init = nv04_display_init;
144 engine->display.destroy = nv04_display_destroy;
145 engine->gpio.init = nouveau_stub_init;
146 engine->gpio.takedown = nouveau_stub_takedown;
147 engine->gpio.get = nv10_gpio_get;
148 engine->gpio.set = nv10_gpio_set;
149 engine->gpio.irq_enable = NULL;
131 break; 150 break;
132 case 0x20: 151 case 0x20:
133 engine->instmem.init = nv04_instmem_init; 152 engine->instmem.init = nv04_instmem_init;
@@ -138,8 +157,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
138 engine->instmem.clear = nv04_instmem_clear; 157 engine->instmem.clear = nv04_instmem_clear;
139 engine->instmem.bind = nv04_instmem_bind; 158 engine->instmem.bind = nv04_instmem_bind;
140 engine->instmem.unbind = nv04_instmem_unbind; 159 engine->instmem.unbind = nv04_instmem_unbind;
141 engine->instmem.prepare_access = nv04_instmem_prepare_access; 160 engine->instmem.flush = nv04_instmem_flush;
142 engine->instmem.finish_access = nv04_instmem_finish_access;
143 engine->mc.init = nv04_mc_init; 161 engine->mc.init = nv04_mc_init;
144 engine->mc.takedown = nv04_mc_takedown; 162 engine->mc.takedown = nv04_mc_takedown;
145 engine->timer.init = nv04_timer_init; 163 engine->timer.init = nv04_timer_init;
@@ -171,6 +189,16 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
171 engine->fifo.destroy_context = nv10_fifo_destroy_context; 189 engine->fifo.destroy_context = nv10_fifo_destroy_context;
172 engine->fifo.load_context = nv10_fifo_load_context; 190 engine->fifo.load_context = nv10_fifo_load_context;
173 engine->fifo.unload_context = nv10_fifo_unload_context; 191 engine->fifo.unload_context = nv10_fifo_unload_context;
192 engine->display.early_init = nv04_display_early_init;
193 engine->display.late_takedown = nv04_display_late_takedown;
194 engine->display.create = nv04_display_create;
195 engine->display.init = nv04_display_init;
196 engine->display.destroy = nv04_display_destroy;
197 engine->gpio.init = nouveau_stub_init;
198 engine->gpio.takedown = nouveau_stub_takedown;
199 engine->gpio.get = nv10_gpio_get;
200 engine->gpio.set = nv10_gpio_set;
201 engine->gpio.irq_enable = NULL;
174 break; 202 break;
175 case 0x30: 203 case 0x30:
176 engine->instmem.init = nv04_instmem_init; 204 engine->instmem.init = nv04_instmem_init;
@@ -181,15 +209,14 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
181 engine->instmem.clear = nv04_instmem_clear; 209 engine->instmem.clear = nv04_instmem_clear;
182 engine->instmem.bind = nv04_instmem_bind; 210 engine->instmem.bind = nv04_instmem_bind;
183 engine->instmem.unbind = nv04_instmem_unbind; 211 engine->instmem.unbind = nv04_instmem_unbind;
184 engine->instmem.prepare_access = nv04_instmem_prepare_access; 212 engine->instmem.flush = nv04_instmem_flush;
185 engine->instmem.finish_access = nv04_instmem_finish_access;
186 engine->mc.init = nv04_mc_init; 213 engine->mc.init = nv04_mc_init;
187 engine->mc.takedown = nv04_mc_takedown; 214 engine->mc.takedown = nv04_mc_takedown;
188 engine->timer.init = nv04_timer_init; 215 engine->timer.init = nv04_timer_init;
189 engine->timer.read = nv04_timer_read; 216 engine->timer.read = nv04_timer_read;
190 engine->timer.takedown = nv04_timer_takedown; 217 engine->timer.takedown = nv04_timer_takedown;
191 engine->fb.init = nv10_fb_init; 218 engine->fb.init = nv30_fb_init;
192 engine->fb.takedown = nv10_fb_takedown; 219 engine->fb.takedown = nv30_fb_takedown;
193 engine->fb.set_region_tiling = nv10_fb_set_region_tiling; 220 engine->fb.set_region_tiling = nv10_fb_set_region_tiling;
194 engine->graph.grclass = nv30_graph_grclass; 221 engine->graph.grclass = nv30_graph_grclass;
195 engine->graph.init = nv30_graph_init; 222 engine->graph.init = nv30_graph_init;
@@ -214,6 +241,16 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
214 engine->fifo.destroy_context = nv10_fifo_destroy_context; 241 engine->fifo.destroy_context = nv10_fifo_destroy_context;
215 engine->fifo.load_context = nv10_fifo_load_context; 242 engine->fifo.load_context = nv10_fifo_load_context;
216 engine->fifo.unload_context = nv10_fifo_unload_context; 243 engine->fifo.unload_context = nv10_fifo_unload_context;
244 engine->display.early_init = nv04_display_early_init;
245 engine->display.late_takedown = nv04_display_late_takedown;
246 engine->display.create = nv04_display_create;
247 engine->display.init = nv04_display_init;
248 engine->display.destroy = nv04_display_destroy;
249 engine->gpio.init = nouveau_stub_init;
250 engine->gpio.takedown = nouveau_stub_takedown;
251 engine->gpio.get = nv10_gpio_get;
252 engine->gpio.set = nv10_gpio_set;
253 engine->gpio.irq_enable = NULL;
217 break; 254 break;
218 case 0x40: 255 case 0x40:
219 case 0x60: 256 case 0x60:
@@ -225,8 +262,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
225 engine->instmem.clear = nv04_instmem_clear; 262 engine->instmem.clear = nv04_instmem_clear;
226 engine->instmem.bind = nv04_instmem_bind; 263 engine->instmem.bind = nv04_instmem_bind;
227 engine->instmem.unbind = nv04_instmem_unbind; 264 engine->instmem.unbind = nv04_instmem_unbind;
228 engine->instmem.prepare_access = nv04_instmem_prepare_access; 265 engine->instmem.flush = nv04_instmem_flush;
229 engine->instmem.finish_access = nv04_instmem_finish_access;
230 engine->mc.init = nv40_mc_init; 266 engine->mc.init = nv40_mc_init;
231 engine->mc.takedown = nv40_mc_takedown; 267 engine->mc.takedown = nv40_mc_takedown;
232 engine->timer.init = nv04_timer_init; 268 engine->timer.init = nv04_timer_init;
@@ -258,6 +294,16 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
258 engine->fifo.destroy_context = nv40_fifo_destroy_context; 294 engine->fifo.destroy_context = nv40_fifo_destroy_context;
259 engine->fifo.load_context = nv40_fifo_load_context; 295 engine->fifo.load_context = nv40_fifo_load_context;
260 engine->fifo.unload_context = nv40_fifo_unload_context; 296 engine->fifo.unload_context = nv40_fifo_unload_context;
297 engine->display.early_init = nv04_display_early_init;
298 engine->display.late_takedown = nv04_display_late_takedown;
299 engine->display.create = nv04_display_create;
300 engine->display.init = nv04_display_init;
301 engine->display.destroy = nv04_display_destroy;
302 engine->gpio.init = nouveau_stub_init;
303 engine->gpio.takedown = nouveau_stub_takedown;
304 engine->gpio.get = nv10_gpio_get;
305 engine->gpio.set = nv10_gpio_set;
306 engine->gpio.irq_enable = NULL;
261 break; 307 break;
262 case 0x50: 308 case 0x50:
263 case 0x80: /* gotta love NVIDIA's consistency.. */ 309 case 0x80: /* gotta love NVIDIA's consistency.. */
@@ -271,8 +317,10 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
271 engine->instmem.clear = nv50_instmem_clear; 317 engine->instmem.clear = nv50_instmem_clear;
272 engine->instmem.bind = nv50_instmem_bind; 318 engine->instmem.bind = nv50_instmem_bind;
273 engine->instmem.unbind = nv50_instmem_unbind; 319 engine->instmem.unbind = nv50_instmem_unbind;
274 engine->instmem.prepare_access = nv50_instmem_prepare_access; 320 if (dev_priv->chipset == 0x50)
275 engine->instmem.finish_access = nv50_instmem_finish_access; 321 engine->instmem.flush = nv50_instmem_flush;
322 else
323 engine->instmem.flush = nv84_instmem_flush;
276 engine->mc.init = nv50_mc_init; 324 engine->mc.init = nv50_mc_init;
277 engine->mc.takedown = nv50_mc_takedown; 325 engine->mc.takedown = nv50_mc_takedown;
278 engine->timer.init = nv04_timer_init; 326 engine->timer.init = nv04_timer_init;
@@ -300,6 +348,16 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
300 engine->fifo.destroy_context = nv50_fifo_destroy_context; 348 engine->fifo.destroy_context = nv50_fifo_destroy_context;
301 engine->fifo.load_context = nv50_fifo_load_context; 349 engine->fifo.load_context = nv50_fifo_load_context;
302 engine->fifo.unload_context = nv50_fifo_unload_context; 350 engine->fifo.unload_context = nv50_fifo_unload_context;
351 engine->display.early_init = nv50_display_early_init;
352 engine->display.late_takedown = nv50_display_late_takedown;
353 engine->display.create = nv50_display_create;
354 engine->display.init = nv50_display_init;
355 engine->display.destroy = nv50_display_destroy;
356 engine->gpio.init = nv50_gpio_init;
357 engine->gpio.takedown = nouveau_stub_takedown;
358 engine->gpio.get = nv50_gpio_get;
359 engine->gpio.set = nv50_gpio_set;
360 engine->gpio.irq_enable = nv50_gpio_irq_enable;
303 break; 361 break;
304 default: 362 default:
305 NV_ERROR(dev, "NV%02x unsupported\n", dev_priv->chipset); 363 NV_ERROR(dev, "NV%02x unsupported\n", dev_priv->chipset);
@@ -407,11 +465,6 @@ nouveau_card_init(struct drm_device *dev)
407 struct nouveau_engine *engine; 465 struct nouveau_engine *engine;
408 int ret; 466 int ret;
409 467
410 NV_DEBUG(dev, "prev state = %d\n", dev_priv->init_state);
411
412 if (dev_priv->init_state == NOUVEAU_CARD_INIT_DONE)
413 return 0;
414
415 vga_client_register(dev->pdev, dev, NULL, nouveau_vga_set_decode); 468 vga_client_register(dev->pdev, dev, NULL, nouveau_vga_set_decode);
416 vga_switcheroo_register_client(dev->pdev, nouveau_switcheroo_set_state, 469 vga_switcheroo_register_client(dev->pdev, nouveau_switcheroo_set_state,
417 nouveau_switcheroo_can_switch); 470 nouveau_switcheroo_can_switch);
@@ -421,15 +474,17 @@ nouveau_card_init(struct drm_device *dev)
421 if (ret) 474 if (ret)
422 goto out; 475 goto out;
423 engine = &dev_priv->engine; 476 engine = &dev_priv->engine;
424 dev_priv->init_state = NOUVEAU_CARD_INIT_FAILED;
425 spin_lock_init(&dev_priv->context_switch_lock); 477 spin_lock_init(&dev_priv->context_switch_lock);
426 478
479 /* Make the CRTCs and I2C buses accessible */
480 ret = engine->display.early_init(dev);
481 if (ret)
482 goto out;
483
427 /* Parse BIOS tables / Run init tables if card not POSTed */ 484 /* Parse BIOS tables / Run init tables if card not POSTed */
428 if (drm_core_check_feature(dev, DRIVER_MODESET)) { 485 ret = nouveau_bios_init(dev);
429 ret = nouveau_bios_init(dev); 486 if (ret)
430 if (ret) 487 goto out_display_early;
431 goto out;
432 }
433 488
434 ret = nouveau_mem_detect(dev); 489 ret = nouveau_mem_detect(dev);
435 if (ret) 490 if (ret)
@@ -461,10 +516,15 @@ nouveau_card_init(struct drm_device *dev)
461 if (ret) 516 if (ret)
462 goto out_gpuobj; 517 goto out_gpuobj;
463 518
519 /* PGPIO */
520 ret = engine->gpio.init(dev);
521 if (ret)
522 goto out_mc;
523
464 /* PTIMER */ 524 /* PTIMER */
465 ret = engine->timer.init(dev); 525 ret = engine->timer.init(dev);
466 if (ret) 526 if (ret)
467 goto out_mc; 527 goto out_gpio;
468 528
469 /* PFB */ 529 /* PFB */
470 ret = engine->fb.init(dev); 530 ret = engine->fb.init(dev);
@@ -485,12 +545,16 @@ nouveau_card_init(struct drm_device *dev)
485 goto out_graph; 545 goto out_graph;
486 } 546 }
487 547
548 ret = engine->display.create(dev);
549 if (ret)
550 goto out_fifo;
551
488 /* this call irq_preinstall, register irq handler and 552 /* this call irq_preinstall, register irq handler and
489 * call irq_postinstall 553 * call irq_postinstall
490 */ 554 */
491 ret = drm_irq_install(dev); 555 ret = drm_irq_install(dev);
492 if (ret) 556 if (ret)
493 goto out_fifo; 557 goto out_display;
494 558
495 ret = drm_vblank_init(dev, 0); 559 ret = drm_vblank_init(dev, 0);
496 if (ret) 560 if (ret)
@@ -504,35 +568,18 @@ nouveau_card_init(struct drm_device *dev)
504 goto out_irq; 568 goto out_irq;
505 } 569 }
506 570
507 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
508 if (dev_priv->card_type >= NV_50)
509 ret = nv50_display_create(dev);
510 else
511 ret = nv04_display_create(dev);
512 if (ret)
513 goto out_channel;
514 }
515
516 ret = nouveau_backlight_init(dev); 571 ret = nouveau_backlight_init(dev);
517 if (ret) 572 if (ret)
518 NV_ERROR(dev, "Error %d registering backlight\n", ret); 573 NV_ERROR(dev, "Error %d registering backlight\n", ret);
519 574
520 dev_priv->init_state = NOUVEAU_CARD_INIT_DONE; 575 nouveau_fbcon_init(dev);
521 576 drm_kms_helper_poll_init(dev);
522 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
523 nouveau_fbcon_init(dev);
524 drm_kms_helper_poll_init(dev);
525 }
526
527 return 0; 577 return 0;
528 578
529out_channel:
530 if (dev_priv->channel) {
531 nouveau_channel_free(dev_priv->channel);
532 dev_priv->channel = NULL;
533 }
534out_irq: 579out_irq:
535 drm_irq_uninstall(dev); 580 drm_irq_uninstall(dev);
581out_display:
582 engine->display.destroy(dev);
536out_fifo: 583out_fifo:
537 if (!nouveau_noaccel) 584 if (!nouveau_noaccel)
538 engine->fifo.takedown(dev); 585 engine->fifo.takedown(dev);
@@ -543,6 +590,8 @@ out_fb:
543 engine->fb.takedown(dev); 590 engine->fb.takedown(dev);
544out_timer: 591out_timer:
545 engine->timer.takedown(dev); 592 engine->timer.takedown(dev);
593out_gpio:
594 engine->gpio.takedown(dev);
546out_mc: 595out_mc:
547 engine->mc.takedown(dev); 596 engine->mc.takedown(dev);
548out_gpuobj: 597out_gpuobj:
@@ -556,6 +605,8 @@ out_gpuobj_early:
556 nouveau_gpuobj_late_takedown(dev); 605 nouveau_gpuobj_late_takedown(dev);
557out_bios: 606out_bios:
558 nouveau_bios_takedown(dev); 607 nouveau_bios_takedown(dev);
608out_display_early:
609 engine->display.late_takedown(dev);
559out: 610out:
560 vga_client_register(dev->pdev, NULL, NULL, NULL); 611 vga_client_register(dev->pdev, NULL, NULL, NULL);
561 return ret; 612 return ret;
@@ -566,45 +617,39 @@ static void nouveau_card_takedown(struct drm_device *dev)
566 struct drm_nouveau_private *dev_priv = dev->dev_private; 617 struct drm_nouveau_private *dev_priv = dev->dev_private;
567 struct nouveau_engine *engine = &dev_priv->engine; 618 struct nouveau_engine *engine = &dev_priv->engine;
568 619
569 NV_DEBUG(dev, "prev state = %d\n", dev_priv->init_state); 620 nouveau_backlight_exit(dev);
570
571 if (dev_priv->init_state != NOUVEAU_CARD_INIT_DOWN) {
572
573 nouveau_backlight_exit(dev);
574
575 if (dev_priv->channel) {
576 nouveau_channel_free(dev_priv->channel);
577 dev_priv->channel = NULL;
578 }
579 621
580 if (!nouveau_noaccel) { 622 if (dev_priv->channel) {
581 engine->fifo.takedown(dev); 623 nouveau_channel_free(dev_priv->channel);
582 engine->graph.takedown(dev); 624 dev_priv->channel = NULL;
583 } 625 }
584 engine->fb.takedown(dev);
585 engine->timer.takedown(dev);
586 engine->mc.takedown(dev);
587 626
588 mutex_lock(&dev->struct_mutex); 627 if (!nouveau_noaccel) {
589 ttm_bo_clean_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM); 628 engine->fifo.takedown(dev);
590 ttm_bo_clean_mm(&dev_priv->ttm.bdev, TTM_PL_TT); 629 engine->graph.takedown(dev);
591 mutex_unlock(&dev->struct_mutex); 630 }
592 nouveau_sgdma_takedown(dev); 631 engine->fb.takedown(dev);
632 engine->timer.takedown(dev);
633 engine->gpio.takedown(dev);
634 engine->mc.takedown(dev);
635 engine->display.late_takedown(dev);
593 636
594 nouveau_gpuobj_takedown(dev); 637 mutex_lock(&dev->struct_mutex);
595 nouveau_mem_close(dev); 638 ttm_bo_clean_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
596 engine->instmem.takedown(dev); 639 ttm_bo_clean_mm(&dev_priv->ttm.bdev, TTM_PL_TT);
640 mutex_unlock(&dev->struct_mutex);
641 nouveau_sgdma_takedown(dev);
597 642
598 if (drm_core_check_feature(dev, DRIVER_MODESET)) 643 nouveau_gpuobj_takedown(dev);
599 drm_irq_uninstall(dev); 644 nouveau_mem_close(dev);
645 engine->instmem.takedown(dev);
600 646
601 nouveau_gpuobj_late_takedown(dev); 647 drm_irq_uninstall(dev);
602 nouveau_bios_takedown(dev);
603 648
604 vga_client_register(dev->pdev, NULL, NULL, NULL); 649 nouveau_gpuobj_late_takedown(dev);
650 nouveau_bios_takedown(dev);
605 651
606 dev_priv->init_state = NOUVEAU_CARD_INIT_DOWN; 652 vga_client_register(dev->pdev, NULL, NULL, NULL);
607 }
608} 653}
609 654
610/* here a client dies, release the stuff that was allocated for its 655/* here a client dies, release the stuff that was allocated for its
@@ -691,6 +736,7 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
691 struct drm_nouveau_private *dev_priv; 736 struct drm_nouveau_private *dev_priv;
692 uint32_t reg0; 737 uint32_t reg0;
693 resource_size_t mmio_start_offs; 738 resource_size_t mmio_start_offs;
739 int ret;
694 740
695 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL); 741 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
696 if (!dev_priv) 742 if (!dev_priv)
@@ -699,7 +745,6 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
699 dev_priv->dev = dev; 745 dev_priv->dev = dev;
700 746
701 dev_priv->flags = flags & NOUVEAU_FLAGS; 747 dev_priv->flags = flags & NOUVEAU_FLAGS;
702 dev_priv->init_state = NOUVEAU_CARD_INIT_DOWN;
703 748
704 NV_DEBUG(dev, "vendor: 0x%X device: 0x%X class: 0x%X\n", 749 NV_DEBUG(dev, "vendor: 0x%X device: 0x%X class: 0x%X\n",
705 dev->pci_vendor, dev->pci_device, dev->pdev->class); 750 dev->pci_vendor, dev->pci_device, dev->pdev->class);
@@ -773,11 +818,9 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
773 NV_INFO(dev, "Detected an NV%2x generation card (0x%08x)\n", 818 NV_INFO(dev, "Detected an NV%2x generation card (0x%08x)\n",
774 dev_priv->card_type, reg0); 819 dev_priv->card_type, reg0);
775 820
776 if (drm_core_check_feature(dev, DRIVER_MODESET)) { 821 ret = nouveau_remove_conflicting_drivers(dev);
777 int ret = nouveau_remove_conflicting_drivers(dev); 822 if (ret)
778 if (ret) 823 return ret;
779 return ret;
780 }
781 824
782 /* Map PRAMIN BAR, or on older cards, the aperture withing BAR0 */ 825 /* Map PRAMIN BAR, or on older cards, the aperture withing BAR0 */
783 if (dev_priv->card_type >= NV_40) { 826 if (dev_priv->card_type >= NV_40) {
@@ -812,46 +855,26 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
812 dev_priv->flags |= NV_NFORCE2; 855 dev_priv->flags |= NV_NFORCE2;
813 856
814 /* For kernel modesetting, init card now and bring up fbcon */ 857 /* For kernel modesetting, init card now and bring up fbcon */
815 if (drm_core_check_feature(dev, DRIVER_MODESET)) { 858 ret = nouveau_card_init(dev);
816 int ret = nouveau_card_init(dev); 859 if (ret)
817 if (ret) 860 return ret;
818 return ret;
819 }
820 861
821 return 0; 862 return 0;
822} 863}
823 864
824static void nouveau_close(struct drm_device *dev)
825{
826 struct drm_nouveau_private *dev_priv = dev->dev_private;
827
828 /* In the case of an error dev_priv may not be allocated yet */
829 if (dev_priv)
830 nouveau_card_takedown(dev);
831}
832
833/* KMS: we need mmio at load time, not when the first drm client opens. */
834void nouveau_lastclose(struct drm_device *dev) 865void nouveau_lastclose(struct drm_device *dev)
835{ 866{
836 if (drm_core_check_feature(dev, DRIVER_MODESET))
837 return;
838
839 nouveau_close(dev);
840} 867}
841 868
842int nouveau_unload(struct drm_device *dev) 869int nouveau_unload(struct drm_device *dev)
843{ 870{
844 struct drm_nouveau_private *dev_priv = dev->dev_private; 871 struct drm_nouveau_private *dev_priv = dev->dev_private;
872 struct nouveau_engine *engine = &dev_priv->engine;
845 873
846 if (drm_core_check_feature(dev, DRIVER_MODESET)) { 874 drm_kms_helper_poll_fini(dev);
847 drm_kms_helper_poll_fini(dev); 875 nouveau_fbcon_fini(dev);
848 nouveau_fbcon_fini(dev); 876 engine->display.destroy(dev);
849 if (dev_priv->card_type >= NV_50) 877 nouveau_card_takedown(dev);
850 nv50_display_destroy(dev);
851 else
852 nv04_display_destroy(dev);
853 nouveau_close(dev);
854 }
855 878
856 iounmap(dev_priv->mmio); 879 iounmap(dev_priv->mmio);
857 iounmap(dev_priv->ramin); 880 iounmap(dev_priv->ramin);
@@ -867,8 +890,6 @@ int nouveau_ioctl_getparam(struct drm_device *dev, void *data,
867 struct drm_nouveau_private *dev_priv = dev->dev_private; 890 struct drm_nouveau_private *dev_priv = dev->dev_private;
868 struct drm_nouveau_getparam *getparam = data; 891 struct drm_nouveau_getparam *getparam = data;
869 892
870 NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
871
872 switch (getparam->param) { 893 switch (getparam->param) {
873 case NOUVEAU_GETPARAM_CHIPSET_ID: 894 case NOUVEAU_GETPARAM_CHIPSET_ID:
874 getparam->value = dev_priv->chipset; 895 getparam->value = dev_priv->chipset;
@@ -937,8 +958,6 @@ nouveau_ioctl_setparam(struct drm_device *dev, void *data,
937{ 958{
938 struct drm_nouveau_setparam *setparam = data; 959 struct drm_nouveau_setparam *setparam = data;
939 960
940 NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
941
942 switch (setparam->param) { 961 switch (setparam->param) {
943 default: 962 default:
944 NV_ERROR(dev, "unknown parameter %lld\n", setparam->param); 963 NV_ERROR(dev, "unknown parameter %lld\n", setparam->param);
diff --git a/drivers/gpu/drm/nouveau/nouveau_ttm.c b/drivers/gpu/drm/nouveau/nouveau_ttm.c
index c385d50f041b..bd35f930568c 100644
--- a/drivers/gpu/drm/nouveau/nouveau_ttm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_ttm.c
@@ -42,13 +42,13 @@ nouveau_ttm_mmap(struct file *filp, struct vm_area_struct *vma)
42} 42}
43 43
44static int 44static int
45nouveau_ttm_mem_global_init(struct ttm_global_reference *ref) 45nouveau_ttm_mem_global_init(struct drm_global_reference *ref)
46{ 46{
47 return ttm_mem_global_init(ref->object); 47 return ttm_mem_global_init(ref->object);
48} 48}
49 49
50static void 50static void
51nouveau_ttm_mem_global_release(struct ttm_global_reference *ref) 51nouveau_ttm_mem_global_release(struct drm_global_reference *ref)
52{ 52{
53 ttm_mem_global_release(ref->object); 53 ttm_mem_global_release(ref->object);
54} 54}
@@ -56,16 +56,16 @@ nouveau_ttm_mem_global_release(struct ttm_global_reference *ref)
56int 56int
57nouveau_ttm_global_init(struct drm_nouveau_private *dev_priv) 57nouveau_ttm_global_init(struct drm_nouveau_private *dev_priv)
58{ 58{
59 struct ttm_global_reference *global_ref; 59 struct drm_global_reference *global_ref;
60 int ret; 60 int ret;
61 61
62 global_ref = &dev_priv->ttm.mem_global_ref; 62 global_ref = &dev_priv->ttm.mem_global_ref;
63 global_ref->global_type = TTM_GLOBAL_TTM_MEM; 63 global_ref->global_type = DRM_GLOBAL_TTM_MEM;
64 global_ref->size = sizeof(struct ttm_mem_global); 64 global_ref->size = sizeof(struct ttm_mem_global);
65 global_ref->init = &nouveau_ttm_mem_global_init; 65 global_ref->init = &nouveau_ttm_mem_global_init;
66 global_ref->release = &nouveau_ttm_mem_global_release; 66 global_ref->release = &nouveau_ttm_mem_global_release;
67 67
68 ret = ttm_global_item_ref(global_ref); 68 ret = drm_global_item_ref(global_ref);
69 if (unlikely(ret != 0)) { 69 if (unlikely(ret != 0)) {
70 DRM_ERROR("Failed setting up TTM memory accounting\n"); 70 DRM_ERROR("Failed setting up TTM memory accounting\n");
71 dev_priv->ttm.mem_global_ref.release = NULL; 71 dev_priv->ttm.mem_global_ref.release = NULL;
@@ -74,15 +74,15 @@ nouveau_ttm_global_init(struct drm_nouveau_private *dev_priv)
74 74
75 dev_priv->ttm.bo_global_ref.mem_glob = global_ref->object; 75 dev_priv->ttm.bo_global_ref.mem_glob = global_ref->object;
76 global_ref = &dev_priv->ttm.bo_global_ref.ref; 76 global_ref = &dev_priv->ttm.bo_global_ref.ref;
77 global_ref->global_type = TTM_GLOBAL_TTM_BO; 77 global_ref->global_type = DRM_GLOBAL_TTM_BO;
78 global_ref->size = sizeof(struct ttm_bo_global); 78 global_ref->size = sizeof(struct ttm_bo_global);
79 global_ref->init = &ttm_bo_global_init; 79 global_ref->init = &ttm_bo_global_init;
80 global_ref->release = &ttm_bo_global_release; 80 global_ref->release = &ttm_bo_global_release;
81 81
82 ret = ttm_global_item_ref(global_ref); 82 ret = drm_global_item_ref(global_ref);
83 if (unlikely(ret != 0)) { 83 if (unlikely(ret != 0)) {
84 DRM_ERROR("Failed setting up TTM BO subsystem\n"); 84 DRM_ERROR("Failed setting up TTM BO subsystem\n");
85 ttm_global_item_unref(&dev_priv->ttm.mem_global_ref); 85 drm_global_item_unref(&dev_priv->ttm.mem_global_ref);
86 dev_priv->ttm.mem_global_ref.release = NULL; 86 dev_priv->ttm.mem_global_ref.release = NULL;
87 return ret; 87 return ret;
88 } 88 }
@@ -96,8 +96,8 @@ nouveau_ttm_global_release(struct drm_nouveau_private *dev_priv)
96 if (dev_priv->ttm.mem_global_ref.release == NULL) 96 if (dev_priv->ttm.mem_global_ref.release == NULL)
97 return; 97 return;
98 98
99 ttm_global_item_unref(&dev_priv->ttm.bo_global_ref.ref); 99 drm_global_item_unref(&dev_priv->ttm.bo_global_ref.ref);
100 ttm_global_item_unref(&dev_priv->ttm.mem_global_ref); 100 drm_global_item_unref(&dev_priv->ttm.mem_global_ref);
101 dev_priv->ttm.mem_global_ref.release = NULL; 101 dev_priv->ttm.mem_global_ref.release = NULL;
102} 102}
103 103
diff --git a/drivers/gpu/drm/nouveau/nv04_crtc.c b/drivers/gpu/drm/nouveau/nv04_crtc.c
index eba687f1099e..1c20c08ce67c 100644
--- a/drivers/gpu/drm/nouveau/nv04_crtc.c
+++ b/drivers/gpu/drm/nouveau/nv04_crtc.c
@@ -157,6 +157,7 @@ nv_crtc_dpms(struct drm_crtc *crtc, int mode)
157{ 157{
158 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 158 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
159 struct drm_device *dev = crtc->dev; 159 struct drm_device *dev = crtc->dev;
160 struct drm_connector *connector;
160 unsigned char seq1 = 0, crtc17 = 0; 161 unsigned char seq1 = 0, crtc17 = 0;
161 unsigned char crtc1A; 162 unsigned char crtc1A;
162 163
@@ -211,6 +212,10 @@ nv_crtc_dpms(struct drm_crtc *crtc, int mode)
211 NVVgaSeqReset(dev, nv_crtc->index, false); 212 NVVgaSeqReset(dev, nv_crtc->index, false);
212 213
213 NVWriteVgaCrtc(dev, nv_crtc->index, NV_CIO_CRE_RPC1_INDEX, crtc1A); 214 NVWriteVgaCrtc(dev, nv_crtc->index, NV_CIO_CRE_RPC1_INDEX, crtc1A);
215
216 /* Update connector polling modes */
217 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
218 nouveau_connector_set_polling(connector);
214} 219}
215 220
216static bool 221static bool
diff --git a/drivers/gpu/drm/nouveau/nv04_dac.c b/drivers/gpu/drm/nouveau/nv04_dac.c
index 1cb19e3acb55..ea3627041ecf 100644
--- a/drivers/gpu/drm/nouveau/nv04_dac.c
+++ b/drivers/gpu/drm/nouveau/nv04_dac.c
@@ -220,6 +220,7 @@ uint32_t nv17_dac_sample_load(struct drm_encoder *encoder)
220{ 220{
221 struct drm_device *dev = encoder->dev; 221 struct drm_device *dev = encoder->dev;
222 struct drm_nouveau_private *dev_priv = dev->dev_private; 222 struct drm_nouveau_private *dev_priv = dev->dev_private;
223 struct nouveau_gpio_engine *gpio = &dev_priv->engine.gpio;
223 struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb; 224 struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb;
224 uint32_t sample, testval, regoffset = nv04_dac_output_offset(encoder); 225 uint32_t sample, testval, regoffset = nv04_dac_output_offset(encoder);
225 uint32_t saved_powerctrl_2 = 0, saved_powerctrl_4 = 0, saved_routput, 226 uint32_t saved_powerctrl_2 = 0, saved_powerctrl_4 = 0, saved_routput,
@@ -251,22 +252,21 @@ uint32_t nv17_dac_sample_load(struct drm_encoder *encoder)
251 nvWriteMC(dev, NV_PBUS_POWERCTRL_4, saved_powerctrl_4 & 0xffffffcf); 252 nvWriteMC(dev, NV_PBUS_POWERCTRL_4, saved_powerctrl_4 & 0xffffffcf);
252 } 253 }
253 254
254 saved_gpio1 = nv17_gpio_get(dev, DCB_GPIO_TVDAC1); 255 saved_gpio1 = gpio->get(dev, DCB_GPIO_TVDAC1);
255 saved_gpio0 = nv17_gpio_get(dev, DCB_GPIO_TVDAC0); 256 saved_gpio0 = gpio->get(dev, DCB_GPIO_TVDAC0);
256 257
257 nv17_gpio_set(dev, DCB_GPIO_TVDAC1, dcb->type == OUTPUT_TV); 258 gpio->set(dev, DCB_GPIO_TVDAC1, dcb->type == OUTPUT_TV);
258 nv17_gpio_set(dev, DCB_GPIO_TVDAC0, dcb->type == OUTPUT_TV); 259 gpio->set(dev, DCB_GPIO_TVDAC0, dcb->type == OUTPUT_TV);
259 260
260 msleep(4); 261 msleep(4);
261 262
262 saved_routput = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset); 263 saved_routput = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset);
263 head = (saved_routput & 0x100) >> 8; 264 head = (saved_routput & 0x100) >> 8;
264#if 0 265
265 /* if there's a spare crtc, using it will minimise flicker for the case 266 /* if there's a spare crtc, using it will minimise flicker */
266 * where the in-use crtc is in use by an off-chip tmds encoder */ 267 if (!(NVReadVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX) & 0xC0))
267 if (xf86_config->crtc[head]->enabled && !xf86_config->crtc[head ^ 1]->enabled)
268 head ^= 1; 268 head ^= 1;
269#endif 269
270 /* nv driver and nv31 use 0xfffffeee, nv34 and 6600 use 0xfffffece */ 270 /* nv driver and nv31 use 0xfffffeee, nv34 and 6600 use 0xfffffece */
271 routput = (saved_routput & 0xfffffece) | head << 8; 271 routput = (saved_routput & 0xfffffece) | head << 8;
272 272
@@ -304,8 +304,8 @@ uint32_t nv17_dac_sample_load(struct drm_encoder *encoder)
304 nvWriteMC(dev, NV_PBUS_POWERCTRL_4, saved_powerctrl_4); 304 nvWriteMC(dev, NV_PBUS_POWERCTRL_4, saved_powerctrl_4);
305 nvWriteMC(dev, NV_PBUS_POWERCTRL_2, saved_powerctrl_2); 305 nvWriteMC(dev, NV_PBUS_POWERCTRL_2, saved_powerctrl_2);
306 306
307 nv17_gpio_set(dev, DCB_GPIO_TVDAC1, saved_gpio1); 307 gpio->set(dev, DCB_GPIO_TVDAC1, saved_gpio1);
308 nv17_gpio_set(dev, DCB_GPIO_TVDAC0, saved_gpio0); 308 gpio->set(dev, DCB_GPIO_TVDAC0, saved_gpio0);
309 309
310 return sample; 310 return sample;
311} 311}
@@ -315,9 +315,12 @@ nv17_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector)
315{ 315{
316 struct drm_device *dev = encoder->dev; 316 struct drm_device *dev = encoder->dev;
317 struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb; 317 struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb;
318 uint32_t sample = nv17_dac_sample_load(encoder);
319 318
320 if (sample & NV_PRAMDAC_TEST_CONTROL_SENSEB_ALLHI) { 319 if (nv04_dac_in_use(encoder))
320 return connector_status_disconnected;
321
322 if (nv17_dac_sample_load(encoder) &
323 NV_PRAMDAC_TEST_CONTROL_SENSEB_ALLHI) {
321 NV_INFO(dev, "Load detected on output %c\n", 324 NV_INFO(dev, "Load detected on output %c\n",
322 '@' + ffs(dcb->or)); 325 '@' + ffs(dcb->or));
323 return connector_status_connected; 326 return connector_status_connected;
@@ -330,6 +333,9 @@ static bool nv04_dac_mode_fixup(struct drm_encoder *encoder,
330 struct drm_display_mode *mode, 333 struct drm_display_mode *mode,
331 struct drm_display_mode *adjusted_mode) 334 struct drm_display_mode *adjusted_mode)
332{ 335{
336 if (nv04_dac_in_use(encoder))
337 return false;
338
333 return true; 339 return true;
334} 340}
335 341
@@ -428,6 +434,17 @@ void nv04_dac_update_dacclk(struct drm_encoder *encoder, bool enable)
428 } 434 }
429} 435}
430 436
437/* Check if the DAC corresponding to 'encoder' is being used by
438 * someone else. */
439bool nv04_dac_in_use(struct drm_encoder *encoder)
440{
441 struct drm_nouveau_private *dev_priv = encoder->dev->dev_private;
442 struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb;
443
444 return nv_gf4_disp_arch(encoder->dev) &&
445 (dev_priv->dac_users[ffs(dcb->or) - 1] & ~(1 << dcb->index));
446}
447
431static void nv04_dac_dpms(struct drm_encoder *encoder, int mode) 448static void nv04_dac_dpms(struct drm_encoder *encoder, int mode)
432{ 449{
433 struct drm_device *dev = encoder->dev; 450 struct drm_device *dev = encoder->dev;
@@ -501,11 +518,13 @@ static const struct drm_encoder_funcs nv04_dac_funcs = {
501 .destroy = nv04_dac_destroy, 518 .destroy = nv04_dac_destroy,
502}; 519};
503 520
504int nv04_dac_create(struct drm_device *dev, struct dcb_entry *entry) 521int
522nv04_dac_create(struct drm_connector *connector, struct dcb_entry *entry)
505{ 523{
506 const struct drm_encoder_helper_funcs *helper; 524 const struct drm_encoder_helper_funcs *helper;
507 struct drm_encoder *encoder;
508 struct nouveau_encoder *nv_encoder = NULL; 525 struct nouveau_encoder *nv_encoder = NULL;
526 struct drm_device *dev = connector->dev;
527 struct drm_encoder *encoder;
509 528
510 nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL); 529 nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
511 if (!nv_encoder) 530 if (!nv_encoder)
@@ -527,5 +546,6 @@ int nv04_dac_create(struct drm_device *dev, struct dcb_entry *entry)
527 encoder->possible_crtcs = entry->heads; 546 encoder->possible_crtcs = entry->heads;
528 encoder->possible_clones = 0; 547 encoder->possible_clones = 0;
529 548
549 drm_mode_connector_attach_encoder(connector, encoder);
530 return 0; 550 return 0;
531} 551}
diff --git a/drivers/gpu/drm/nouveau/nv04_dfp.c b/drivers/gpu/drm/nouveau/nv04_dfp.c
index 41634d4752fe..3311f3a8c818 100644
--- a/drivers/gpu/drm/nouveau/nv04_dfp.c
+++ b/drivers/gpu/drm/nouveau/nv04_dfp.c
@@ -413,10 +413,6 @@ static void nv04_dfp_commit(struct drm_encoder *encoder)
413 struct dcb_entry *dcbe = nv_encoder->dcb; 413 struct dcb_entry *dcbe = nv_encoder->dcb;
414 int head = nouveau_crtc(encoder->crtc)->index; 414 int head = nouveau_crtc(encoder->crtc)->index;
415 415
416 NV_INFO(dev, "Output %s is running on CRTC %d using output %c\n",
417 drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base),
418 nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
419
420 if (dcbe->type == OUTPUT_TMDS) 416 if (dcbe->type == OUTPUT_TMDS)
421 run_tmds_table(dev, dcbe, head, nv_encoder->mode.clock); 417 run_tmds_table(dev, dcbe, head, nv_encoder->mode.clock);
422 else if (dcbe->type == OUTPUT_LVDS) 418 else if (dcbe->type == OUTPUT_LVDS)
@@ -584,11 +580,12 @@ static const struct drm_encoder_funcs nv04_dfp_funcs = {
584 .destroy = nv04_dfp_destroy, 580 .destroy = nv04_dfp_destroy,
585}; 581};
586 582
587int nv04_dfp_create(struct drm_device *dev, struct dcb_entry *entry) 583int
584nv04_dfp_create(struct drm_connector *connector, struct dcb_entry *entry)
588{ 585{
589 const struct drm_encoder_helper_funcs *helper; 586 const struct drm_encoder_helper_funcs *helper;
590 struct drm_encoder *encoder;
591 struct nouveau_encoder *nv_encoder = NULL; 587 struct nouveau_encoder *nv_encoder = NULL;
588 struct drm_encoder *encoder;
592 int type; 589 int type;
593 590
594 switch (entry->type) { 591 switch (entry->type) {
@@ -613,11 +610,12 @@ int nv04_dfp_create(struct drm_device *dev, struct dcb_entry *entry)
613 nv_encoder->dcb = entry; 610 nv_encoder->dcb = entry;
614 nv_encoder->or = ffs(entry->or) - 1; 611 nv_encoder->or = ffs(entry->or) - 1;
615 612
616 drm_encoder_init(dev, encoder, &nv04_dfp_funcs, type); 613 drm_encoder_init(connector->dev, encoder, &nv04_dfp_funcs, type);
617 drm_encoder_helper_add(encoder, helper); 614 drm_encoder_helper_add(encoder, helper);
618 615
619 encoder->possible_crtcs = entry->heads; 616 encoder->possible_crtcs = entry->heads;
620 encoder->possible_clones = 0; 617 encoder->possible_clones = 0;
621 618
619 drm_mode_connector_attach_encoder(connector, encoder);
622 return 0; 620 return 0;
623} 621}
diff --git a/drivers/gpu/drm/nouveau/nv04_display.c b/drivers/gpu/drm/nouveau/nv04_display.c
index c7898b4f6dfb..9e28cf772e3c 100644
--- a/drivers/gpu/drm/nouveau/nv04_display.c
+++ b/drivers/gpu/drm/nouveau/nv04_display.c
@@ -32,8 +32,6 @@
32#include "nouveau_encoder.h" 32#include "nouveau_encoder.h"
33#include "nouveau_connector.h" 33#include "nouveau_connector.h"
34 34
35#define MULTIPLE_ENCODERS(e) (e & (e - 1))
36
37static void 35static void
38nv04_display_store_initial_head_owner(struct drm_device *dev) 36nv04_display_store_initial_head_owner(struct drm_device *dev)
39{ 37{
@@ -41,7 +39,7 @@ nv04_display_store_initial_head_owner(struct drm_device *dev)
41 39
42 if (dev_priv->chipset != 0x11) { 40 if (dev_priv->chipset != 0x11) {
43 dev_priv->crtc_owner = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_44); 41 dev_priv->crtc_owner = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_44);
44 goto ownerknown; 42 return;
45 } 43 }
46 44
47 /* reading CR44 is broken on nv11, so we attempt to infer it */ 45 /* reading CR44 is broken on nv11, so we attempt to infer it */
@@ -52,8 +50,6 @@ nv04_display_store_initial_head_owner(struct drm_device *dev)
52 bool tvA = false; 50 bool tvA = false;
53 bool tvB = false; 51 bool tvB = false;
54 52
55 NVLockVgaCrtcs(dev, false);
56
57 slaved_on_B = NVReadVgaCrtc(dev, 1, NV_CIO_CRE_PIXEL_INDEX) & 53 slaved_on_B = NVReadVgaCrtc(dev, 1, NV_CIO_CRE_PIXEL_INDEX) &
58 0x80; 54 0x80;
59 if (slaved_on_B) 55 if (slaved_on_B)
@@ -66,8 +62,6 @@ nv04_display_store_initial_head_owner(struct drm_device *dev)
66 tvA = !(NVReadVgaCrtc(dev, 0, NV_CIO_CRE_LCD__INDEX) & 62 tvA = !(NVReadVgaCrtc(dev, 0, NV_CIO_CRE_LCD__INDEX) &
67 MASK(NV_CIO_CRE_LCD_LCD_SELECT)); 63 MASK(NV_CIO_CRE_LCD_LCD_SELECT));
68 64
69 NVLockVgaCrtcs(dev, true);
70
71 if (slaved_on_A && !tvA) 65 if (slaved_on_A && !tvA)
72 dev_priv->crtc_owner = 0x0; 66 dev_priv->crtc_owner = 0x0;
73 else if (slaved_on_B && !tvB) 67 else if (slaved_on_B && !tvB)
@@ -79,14 +73,40 @@ nv04_display_store_initial_head_owner(struct drm_device *dev)
79 else 73 else
80 dev_priv->crtc_owner = 0x0; 74 dev_priv->crtc_owner = 0x0;
81 } 75 }
76}
77
78int
79nv04_display_early_init(struct drm_device *dev)
80{
81 /* Make the I2C buses accessible. */
82 if (!nv_gf4_disp_arch(dev)) {
83 uint32_t pmc_enable = nv_rd32(dev, NV03_PMC_ENABLE);
84
85 if (!(pmc_enable & 1))
86 nv_wr32(dev, NV03_PMC_ENABLE, pmc_enable | 1);
87 }
82 88
83ownerknown: 89 /* Unlock the VGA CRTCs. */
84 NV_INFO(dev, "Initial CRTC_OWNER is %d\n", dev_priv->crtc_owner); 90 NVLockVgaCrtcs(dev, false);
91
92 /* Make sure the CRTCs aren't in slaved mode. */
93 if (nv_two_heads(dev)) {
94 nv04_display_store_initial_head_owner(dev);
95 NVSetOwner(dev, 0);
96 }
97
98 return 0;
99}
100
101void
102nv04_display_late_takedown(struct drm_device *dev)
103{
104 struct drm_nouveau_private *dev_priv = dev->dev_private;
105
106 if (nv_two_heads(dev))
107 NVSetOwner(dev, dev_priv->crtc_owner);
85 108
86 /* we need to ensure the heads are not tied henceforth, or reading any 109 NVLockVgaCrtcs(dev, true);
87 * 8 bit reg on head B will fail
88 * setting a single arbitrary head solves that */
89 NVSetOwner(dev, 0);
90} 110}
91 111
92int 112int
@@ -94,14 +114,13 @@ nv04_display_create(struct drm_device *dev)
94{ 114{
95 struct drm_nouveau_private *dev_priv = dev->dev_private; 115 struct drm_nouveau_private *dev_priv = dev->dev_private;
96 struct dcb_table *dcb = &dev_priv->vbios.dcb; 116 struct dcb_table *dcb = &dev_priv->vbios.dcb;
117 struct drm_connector *connector, *ct;
97 struct drm_encoder *encoder; 118 struct drm_encoder *encoder;
98 struct drm_crtc *crtc; 119 struct drm_crtc *crtc;
99 int i, ret; 120 int i, ret;
100 121
101 NV_DEBUG_KMS(dev, "\n"); 122 NV_DEBUG_KMS(dev, "\n");
102 123
103 if (nv_two_heads(dev))
104 nv04_display_store_initial_head_owner(dev);
105 nouveau_hw_save_vga_fonts(dev, 1); 124 nouveau_hw_save_vga_fonts(dev, 1);
106 125
107 drm_mode_config_init(dev); 126 drm_mode_config_init(dev);
@@ -132,19 +151,23 @@ nv04_display_create(struct drm_device *dev)
132 for (i = 0; i < dcb->entries; i++) { 151 for (i = 0; i < dcb->entries; i++) {
133 struct dcb_entry *dcbent = &dcb->entry[i]; 152 struct dcb_entry *dcbent = &dcb->entry[i];
134 153
154 connector = nouveau_connector_create(dev, dcbent->connector);
155 if (IS_ERR(connector))
156 continue;
157
135 switch (dcbent->type) { 158 switch (dcbent->type) {
136 case OUTPUT_ANALOG: 159 case OUTPUT_ANALOG:
137 ret = nv04_dac_create(dev, dcbent); 160 ret = nv04_dac_create(connector, dcbent);
138 break; 161 break;
139 case OUTPUT_LVDS: 162 case OUTPUT_LVDS:
140 case OUTPUT_TMDS: 163 case OUTPUT_TMDS:
141 ret = nv04_dfp_create(dev, dcbent); 164 ret = nv04_dfp_create(connector, dcbent);
142 break; 165 break;
143 case OUTPUT_TV: 166 case OUTPUT_TV:
144 if (dcbent->location == DCB_LOC_ON_CHIP) 167 if (dcbent->location == DCB_LOC_ON_CHIP)
145 ret = nv17_tv_create(dev, dcbent); 168 ret = nv17_tv_create(connector, dcbent);
146 else 169 else
147 ret = nv04_tv_create(dev, dcbent); 170 ret = nv04_tv_create(connector, dcbent);
148 break; 171 break;
149 default: 172 default:
150 NV_WARN(dev, "DCB type %d not known\n", dcbent->type); 173 NV_WARN(dev, "DCB type %d not known\n", dcbent->type);
@@ -155,12 +178,16 @@ nv04_display_create(struct drm_device *dev)
155 continue; 178 continue;
156 } 179 }
157 180
158 for (i = 0; i < dcb->connector.entries; i++) 181 list_for_each_entry_safe(connector, ct,
159 nouveau_connector_create(dev, &dcb->connector.entry[i]); 182 &dev->mode_config.connector_list, head) {
183 if (!connector->encoder_ids[0]) {
184 NV_WARN(dev, "%s has no encoders, removing\n",
185 drm_get_connector_name(connector));
186 connector->funcs->destroy(connector);
187 }
188 }
160 189
161 /* Save previous state */ 190 /* Save previous state */
162 NVLockVgaCrtcs(dev, false);
163
164 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) 191 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
165 crtc->funcs->save(crtc); 192 crtc->funcs->save(crtc);
166 193
@@ -191,8 +218,6 @@ nv04_display_destroy(struct drm_device *dev)
191 } 218 }
192 219
193 /* Restore state */ 220 /* Restore state */
194 NVLockVgaCrtcs(dev, false);
195
196 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 221 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
197 struct drm_encoder_helper_funcs *func = encoder->helper_private; 222 struct drm_encoder_helper_funcs *func = encoder->helper_private;
198 223
@@ -207,15 +232,12 @@ nv04_display_destroy(struct drm_device *dev)
207 nouveau_hw_save_vga_fonts(dev, 0); 232 nouveau_hw_save_vga_fonts(dev, 0);
208} 233}
209 234
210void 235int
211nv04_display_restore(struct drm_device *dev) 236nv04_display_init(struct drm_device *dev)
212{ 237{
213 struct drm_nouveau_private *dev_priv = dev->dev_private;
214 struct drm_encoder *encoder; 238 struct drm_encoder *encoder;
215 struct drm_crtc *crtc; 239 struct drm_crtc *crtc;
216 240
217 NVLockVgaCrtcs(dev, false);
218
219 /* meh.. modeset apparently doesn't setup all the regs and depends 241 /* meh.. modeset apparently doesn't setup all the regs and depends
220 * on pre-existing state, for now load the state of the card *before* 242 * on pre-existing state, for now load the state of the card *before*
221 * nouveau was loaded, and then do a modeset. 243 * nouveau was loaded, and then do a modeset.
@@ -233,12 +255,6 @@ nv04_display_restore(struct drm_device *dev)
233 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) 255 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
234 crtc->funcs->restore(crtc); 256 crtc->funcs->restore(crtc);
235 257
236 if (nv_two_heads(dev)) { 258 return 0;
237 NV_INFO(dev, "Restoring CRTC_OWNER to %d.\n",
238 dev_priv->crtc_owner);
239 NVSetOwner(dev, dev_priv->crtc_owner);
240 }
241
242 NVLockVgaCrtcs(dev, true);
243} 259}
244 260
diff --git a/drivers/gpu/drm/nouveau/nv04_fifo.c b/drivers/gpu/drm/nouveau/nv04_fifo.c
index 66fe55983b6e..06cedd99c26a 100644
--- a/drivers/gpu/drm/nouveau/nv04_fifo.c
+++ b/drivers/gpu/drm/nouveau/nv04_fifo.c
@@ -112,6 +112,12 @@ nv04_fifo_channel_id(struct drm_device *dev)
112 NV03_PFIFO_CACHE1_PUSH1_CHID_MASK; 112 NV03_PFIFO_CACHE1_PUSH1_CHID_MASK;
113} 113}
114 114
115#ifdef __BIG_ENDIAN
116#define DMA_FETCH_ENDIANNESS NV_PFIFO_CACHE1_BIG_ENDIAN
117#else
118#define DMA_FETCH_ENDIANNESS 0
119#endif
120
115int 121int
116nv04_fifo_create_context(struct nouveau_channel *chan) 122nv04_fifo_create_context(struct nouveau_channel *chan)
117{ 123{
@@ -131,18 +137,13 @@ nv04_fifo_create_context(struct nouveau_channel *chan)
131 spin_lock_irqsave(&dev_priv->context_switch_lock, flags); 137 spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
132 138
133 /* Setup initial state */ 139 /* Setup initial state */
134 dev_priv->engine.instmem.prepare_access(dev, true);
135 RAMFC_WR(DMA_PUT, chan->pushbuf_base); 140 RAMFC_WR(DMA_PUT, chan->pushbuf_base);
136 RAMFC_WR(DMA_GET, chan->pushbuf_base); 141 RAMFC_WR(DMA_GET, chan->pushbuf_base);
137 RAMFC_WR(DMA_INSTANCE, chan->pushbuf->instance >> 4); 142 RAMFC_WR(DMA_INSTANCE, chan->pushbuf->instance >> 4);
138 RAMFC_WR(DMA_FETCH, (NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES | 143 RAMFC_WR(DMA_FETCH, (NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES |
139 NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES | 144 NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES |
140 NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8 | 145 NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8 |
141#ifdef __BIG_ENDIAN 146 DMA_FETCH_ENDIANNESS));
142 NV_PFIFO_CACHE1_BIG_ENDIAN |
143#endif
144 0));
145 dev_priv->engine.instmem.finish_access(dev);
146 147
147 /* enable the fifo dma operation */ 148 /* enable the fifo dma operation */
148 nv_wr32(dev, NV04_PFIFO_MODE, 149 nv_wr32(dev, NV04_PFIFO_MODE,
@@ -169,8 +170,6 @@ nv04_fifo_do_load_context(struct drm_device *dev, int chid)
169 struct drm_nouveau_private *dev_priv = dev->dev_private; 170 struct drm_nouveau_private *dev_priv = dev->dev_private;
170 uint32_t fc = NV04_RAMFC(chid), tmp; 171 uint32_t fc = NV04_RAMFC(chid), tmp;
171 172
172 dev_priv->engine.instmem.prepare_access(dev, false);
173
174 nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUT, nv_ri32(dev, fc + 0)); 173 nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUT, nv_ri32(dev, fc + 0));
175 nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_GET, nv_ri32(dev, fc + 4)); 174 nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_GET, nv_ri32(dev, fc + 4));
176 tmp = nv_ri32(dev, fc + 8); 175 tmp = nv_ri32(dev, fc + 8);
@@ -181,8 +180,6 @@ nv04_fifo_do_load_context(struct drm_device *dev, int chid)
181 nv_wr32(dev, NV04_PFIFO_CACHE1_ENGINE, nv_ri32(dev, fc + 20)); 180 nv_wr32(dev, NV04_PFIFO_CACHE1_ENGINE, nv_ri32(dev, fc + 20));
182 nv_wr32(dev, NV04_PFIFO_CACHE1_PULL1, nv_ri32(dev, fc + 24)); 181 nv_wr32(dev, NV04_PFIFO_CACHE1_PULL1, nv_ri32(dev, fc + 24));
183 182
184 dev_priv->engine.instmem.finish_access(dev);
185
186 nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0); 183 nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);
187 nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0); 184 nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0);
188} 185}
@@ -223,7 +220,6 @@ nv04_fifo_unload_context(struct drm_device *dev)
223 return -EINVAL; 220 return -EINVAL;
224 } 221 }
225 222
226 dev_priv->engine.instmem.prepare_access(dev, true);
227 RAMFC_WR(DMA_PUT, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUT)); 223 RAMFC_WR(DMA_PUT, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUT));
228 RAMFC_WR(DMA_GET, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET)); 224 RAMFC_WR(DMA_GET, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET));
229 tmp = nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_DCOUNT) << 16; 225 tmp = nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_DCOUNT) << 16;
@@ -233,7 +229,6 @@ nv04_fifo_unload_context(struct drm_device *dev)
233 RAMFC_WR(DMA_FETCH, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_FETCH)); 229 RAMFC_WR(DMA_FETCH, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_FETCH));
234 RAMFC_WR(ENGINE, nv_rd32(dev, NV04_PFIFO_CACHE1_ENGINE)); 230 RAMFC_WR(ENGINE, nv_rd32(dev, NV04_PFIFO_CACHE1_ENGINE));
235 RAMFC_WR(PULL1_ENGINE, nv_rd32(dev, NV04_PFIFO_CACHE1_PULL1)); 231 RAMFC_WR(PULL1_ENGINE, nv_rd32(dev, NV04_PFIFO_CACHE1_PULL1));
236 dev_priv->engine.instmem.finish_access(dev);
237 232
238 nv04_fifo_do_load_context(dev, pfifo->channels - 1); 233 nv04_fifo_do_load_context(dev, pfifo->channels - 1);
239 nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, pfifo->channels - 1); 234 nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, pfifo->channels - 1);
@@ -297,6 +292,7 @@ nv04_fifo_init(struct drm_device *dev)
297 292
298 nv04_fifo_init_intr(dev); 293 nv04_fifo_init_intr(dev);
299 pfifo->enable(dev); 294 pfifo->enable(dev);
295 pfifo->reassign(dev, true);
300 296
301 for (i = 0; i < dev_priv->engine.fifo.channels; i++) { 297 for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
302 if (dev_priv->fifos[i]) { 298 if (dev_priv->fifos[i]) {
diff --git a/drivers/gpu/drm/nouveau/nv04_graph.c b/drivers/gpu/drm/nouveau/nv04_graph.c
index 618355e9cdd5..c8973421b635 100644
--- a/drivers/gpu/drm/nouveau/nv04_graph.c
+++ b/drivers/gpu/drm/nouveau/nv04_graph.c
@@ -342,7 +342,7 @@ static uint32_t nv04_graph_ctx_regs[] = {
342}; 342};
343 343
344struct graph_state { 344struct graph_state {
345 int nv04[ARRAY_SIZE(nv04_graph_ctx_regs)]; 345 uint32_t nv04[ARRAY_SIZE(nv04_graph_ctx_regs)];
346}; 346};
347 347
348struct nouveau_channel * 348struct nouveau_channel *
@@ -527,8 +527,7 @@ static int
527nv04_graph_mthd_set_ref(struct nouveau_channel *chan, int grclass, 527nv04_graph_mthd_set_ref(struct nouveau_channel *chan, int grclass,
528 int mthd, uint32_t data) 528 int mthd, uint32_t data)
529{ 529{
530 chan->fence.last_sequence_irq = data; 530 atomic_set(&chan->fence.last_sequence_irq, data);
531 nouveau_fence_handler(chan->dev, chan->id);
532 return 0; 531 return 0;
533} 532}
534 533
diff --git a/drivers/gpu/drm/nouveau/nv04_instmem.c b/drivers/gpu/drm/nouveau/nv04_instmem.c
index a3b9563a6f60..4408232d33f1 100644
--- a/drivers/gpu/drm/nouveau/nv04_instmem.c
+++ b/drivers/gpu/drm/nouveau/nv04_instmem.c
@@ -49,10 +49,8 @@ nv04_instmem_determine_amount(struct drm_device *dev)
49 NV_DEBUG(dev, "RAMIN size: %dKiB\n", dev_priv->ramin_rsvd_vram >> 10); 49 NV_DEBUG(dev, "RAMIN size: %dKiB\n", dev_priv->ramin_rsvd_vram >> 10);
50 50
51 /* Clear all of it, except the BIOS image that's in the first 64KiB */ 51 /* Clear all of it, except the BIOS image that's in the first 64KiB */
52 dev_priv->engine.instmem.prepare_access(dev, true);
53 for (i = 64 * 1024; i < dev_priv->ramin_rsvd_vram; i += 4) 52 for (i = 64 * 1024; i < dev_priv->ramin_rsvd_vram; i += 4)
54 nv_wi32(dev, i, 0x00000000); 53 nv_wi32(dev, i, 0x00000000);
55 dev_priv->engine.instmem.finish_access(dev);
56} 54}
57 55
58static void 56static void
@@ -106,7 +104,7 @@ int nv04_instmem_init(struct drm_device *dev)
106{ 104{
107 struct drm_nouveau_private *dev_priv = dev->dev_private; 105 struct drm_nouveau_private *dev_priv = dev->dev_private;
108 uint32_t offset; 106 uint32_t offset;
109 int ret = 0; 107 int ret;
110 108
111 nv04_instmem_determine_amount(dev); 109 nv04_instmem_determine_amount(dev);
112 nv04_instmem_configure_fixed_tables(dev); 110 nv04_instmem_configure_fixed_tables(dev);
@@ -129,14 +127,14 @@ int nv04_instmem_init(struct drm_device *dev)
129 offset = 0x40000; 127 offset = 0x40000;
130 } 128 }
131 129
132 ret = nouveau_mem_init_heap(&dev_priv->ramin_heap, 130 ret = drm_mm_init(&dev_priv->ramin_heap, offset,
133 offset, dev_priv->ramin_rsvd_vram - offset); 131 dev_priv->ramin_rsvd_vram - offset);
134 if (ret) { 132 if (ret) {
135 dev_priv->ramin_heap = NULL; 133 NV_ERROR(dev, "Failed to init RAMIN heap: %d\n", ret);
136 NV_ERROR(dev, "Failed to init RAMIN heap\n"); 134 return ret;
137 } 135 }
138 136
139 return ret; 137 return 0;
140} 138}
141 139
142void 140void
@@ -186,12 +184,7 @@ nv04_instmem_unbind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
186} 184}
187 185
188void 186void
189nv04_instmem_prepare_access(struct drm_device *dev, bool write) 187nv04_instmem_flush(struct drm_device *dev)
190{
191}
192
193void
194nv04_instmem_finish_access(struct drm_device *dev)
195{ 188{
196} 189}
197 190
diff --git a/drivers/gpu/drm/nouveau/nv04_mc.c b/drivers/gpu/drm/nouveau/nv04_mc.c
index 617ed1e05269..2af43a1cb2ec 100644
--- a/drivers/gpu/drm/nouveau/nv04_mc.c
+++ b/drivers/gpu/drm/nouveau/nv04_mc.c
@@ -11,6 +11,10 @@ nv04_mc_init(struct drm_device *dev)
11 */ 11 */
12 12
13 nv_wr32(dev, NV03_PMC_ENABLE, 0xFFFFFFFF); 13 nv_wr32(dev, NV03_PMC_ENABLE, 0xFFFFFFFF);
14
15 /* Disable PROM access. */
16 nv_wr32(dev, NV_PBUS_PCI_NV_20, NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED);
17
14 return 0; 18 return 0;
15} 19}
16 20
diff --git a/drivers/gpu/drm/nouveau/nv04_tv.c b/drivers/gpu/drm/nouveau/nv04_tv.c
index c4e3404337d4..94e299cef0b2 100644
--- a/drivers/gpu/drm/nouveau/nv04_tv.c
+++ b/drivers/gpu/drm/nouveau/nv04_tv.c
@@ -34,69 +34,26 @@
34 34
35#include "i2c/ch7006.h" 35#include "i2c/ch7006.h"
36 36
37static struct { 37static struct i2c_board_info nv04_tv_encoder_info[] = {
38 struct i2c_board_info board_info;
39 struct drm_encoder_funcs funcs;
40 struct drm_encoder_helper_funcs hfuncs;
41 void *params;
42
43} nv04_tv_encoder_info[] = {
44 { 38 {
45 .board_info = { I2C_BOARD_INFO("ch7006", 0x75) }, 39 I2C_BOARD_INFO("ch7006", 0x75),
46 .params = &(struct ch7006_encoder_params) { 40 .platform_data = &(struct ch7006_encoder_params) {
47 CH7006_FORMAT_RGB24m12I, CH7006_CLOCK_MASTER, 41 CH7006_FORMAT_RGB24m12I, CH7006_CLOCK_MASTER,
48 0, 0, 0, 42 0, 0, 0,
49 CH7006_SYNC_SLAVE, CH7006_SYNC_SEPARATED, 43 CH7006_SYNC_SLAVE, CH7006_SYNC_SEPARATED,
50 CH7006_POUT_3_3V, CH7006_ACTIVE_HSYNC 44 CH7006_POUT_3_3V, CH7006_ACTIVE_HSYNC
51 }, 45 }
52 }, 46 },
47 { }
53}; 48};
54 49
55static bool probe_i2c_addr(struct i2c_adapter *adapter, int addr)
56{
57 struct i2c_msg msg = {
58 .addr = addr,
59 .len = 0,
60 };
61
62 return i2c_transfer(adapter, &msg, 1) == 1;
63}
64
65int nv04_tv_identify(struct drm_device *dev, int i2c_index) 50int nv04_tv_identify(struct drm_device *dev, int i2c_index)
66{ 51{
67 struct nouveau_i2c_chan *i2c; 52 return nouveau_i2c_identify(dev, "TV encoder",
68 bool was_locked; 53 nv04_tv_encoder_info, i2c_index);
69 int i, ret;
70
71 NV_TRACE(dev, "Probing TV encoders on I2C bus: %d\n", i2c_index);
72
73 i2c = nouveau_i2c_find(dev, i2c_index);
74 if (!i2c)
75 return -ENODEV;
76
77 was_locked = NVLockVgaCrtcs(dev, false);
78
79 for (i = 0; i < ARRAY_SIZE(nv04_tv_encoder_info); i++) {
80 if (probe_i2c_addr(&i2c->adapter,
81 nv04_tv_encoder_info[i].board_info.addr)) {
82 ret = i;
83 break;
84 }
85 }
86
87 if (i < ARRAY_SIZE(nv04_tv_encoder_info)) {
88 NV_TRACE(dev, "Detected TV encoder: %s\n",
89 nv04_tv_encoder_info[i].board_info.type);
90
91 } else {
92 NV_TRACE(dev, "No TV encoders found.\n");
93 i = -ENODEV;
94 }
95
96 NVLockVgaCrtcs(dev, was_locked);
97 return i;
98} 54}
99 55
56
100#define PLLSEL_TV_CRTC1_MASK \ 57#define PLLSEL_TV_CRTC1_MASK \
101 (NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK1 \ 58 (NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK1 \
102 | NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK1) 59 | NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK1)
@@ -214,30 +171,32 @@ static void nv04_tv_commit(struct drm_encoder *encoder)
214 171
215static void nv04_tv_destroy(struct drm_encoder *encoder) 172static void nv04_tv_destroy(struct drm_encoder *encoder)
216{ 173{
217 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
218
219 to_encoder_slave(encoder)->slave_funcs->destroy(encoder); 174 to_encoder_slave(encoder)->slave_funcs->destroy(encoder);
220 175
221 drm_encoder_cleanup(encoder); 176 drm_encoder_cleanup(encoder);
222 177
223 kfree(nv_encoder); 178 kfree(encoder->helper_private);
179 kfree(nouveau_encoder(encoder));
224} 180}
225 181
226int nv04_tv_create(struct drm_device *dev, struct dcb_entry *entry) 182static const struct drm_encoder_funcs nv04_tv_funcs = {
183 .destroy = nv04_tv_destroy,
184};
185
186int
187nv04_tv_create(struct drm_connector *connector, struct dcb_entry *entry)
227{ 188{
228 struct nouveau_encoder *nv_encoder; 189 struct nouveau_encoder *nv_encoder;
229 struct drm_encoder *encoder; 190 struct drm_encoder *encoder;
230 struct drm_nouveau_private *dev_priv = dev->dev_private; 191 struct drm_device *dev = connector->dev;
231 struct i2c_adapter *adap; 192 struct drm_encoder_helper_funcs *hfuncs;
232 struct drm_encoder_funcs *funcs = NULL; 193 struct drm_encoder_slave_funcs *sfuncs;
233 struct drm_encoder_helper_funcs *hfuncs = NULL; 194 struct nouveau_i2c_chan *i2c =
234 struct drm_encoder_slave_funcs *sfuncs = NULL; 195 nouveau_i2c_find(dev, entry->i2c_index);
235 int i2c_index = entry->i2c_index;
236 int type, ret; 196 int type, ret;
237 bool was_locked;
238 197
239 /* Ensure that we can talk to this encoder */ 198 /* Ensure that we can talk to this encoder */
240 type = nv04_tv_identify(dev, i2c_index); 199 type = nv04_tv_identify(dev, entry->i2c_index);
241 if (type < 0) 200 if (type < 0)
242 return type; 201 return type;
243 202
@@ -246,41 +205,32 @@ int nv04_tv_create(struct drm_device *dev, struct dcb_entry *entry)
246 if (!nv_encoder) 205 if (!nv_encoder)
247 return -ENOMEM; 206 return -ENOMEM;
248 207
208 hfuncs = kzalloc(sizeof(*hfuncs), GFP_KERNEL);
209 if (!hfuncs) {
210 ret = -ENOMEM;
211 goto fail_free;
212 }
213
249 /* Initialize the common members */ 214 /* Initialize the common members */
250 encoder = to_drm_encoder(nv_encoder); 215 encoder = to_drm_encoder(nv_encoder);
251 216
252 funcs = &nv04_tv_encoder_info[type].funcs; 217 drm_encoder_init(dev, encoder, &nv04_tv_funcs, DRM_MODE_ENCODER_TVDAC);
253 hfuncs = &nv04_tv_encoder_info[type].hfuncs;
254
255 drm_encoder_init(dev, encoder, funcs, DRM_MODE_ENCODER_TVDAC);
256 drm_encoder_helper_add(encoder, hfuncs); 218 drm_encoder_helper_add(encoder, hfuncs);
257 219
258 encoder->possible_crtcs = entry->heads; 220 encoder->possible_crtcs = entry->heads;
259 encoder->possible_clones = 0; 221 encoder->possible_clones = 0;
260
261 nv_encoder->dcb = entry; 222 nv_encoder->dcb = entry;
262 nv_encoder->or = ffs(entry->or) - 1; 223 nv_encoder->or = ffs(entry->or) - 1;
263 224
264 /* Run the slave-specific initialization */ 225 /* Run the slave-specific initialization */
265 adap = &dev_priv->vbios.dcb.i2c[i2c_index].chan->adapter; 226 ret = drm_i2c_encoder_init(dev, to_encoder_slave(encoder),
266 227 &i2c->adapter, &nv04_tv_encoder_info[type]);
267 was_locked = NVLockVgaCrtcs(dev, false);
268
269 ret = drm_i2c_encoder_init(encoder->dev, to_encoder_slave(encoder), adap,
270 &nv04_tv_encoder_info[type].board_info);
271
272 NVLockVgaCrtcs(dev, was_locked);
273
274 if (ret < 0) 228 if (ret < 0)
275 goto fail; 229 goto fail_cleanup;
276 230
277 /* Fill the function pointers */ 231 /* Fill the function pointers */
278 sfuncs = to_encoder_slave(encoder)->slave_funcs; 232 sfuncs = to_encoder_slave(encoder)->slave_funcs;
279 233
280 *funcs = (struct drm_encoder_funcs) {
281 .destroy = nv04_tv_destroy,
282 };
283
284 *hfuncs = (struct drm_encoder_helper_funcs) { 234 *hfuncs = (struct drm_encoder_helper_funcs) {
285 .dpms = nv04_tv_dpms, 235 .dpms = nv04_tv_dpms,
286 .save = sfuncs->save, 236 .save = sfuncs->save,
@@ -292,14 +242,17 @@ int nv04_tv_create(struct drm_device *dev, struct dcb_entry *entry)
292 .detect = sfuncs->detect, 242 .detect = sfuncs->detect,
293 }; 243 };
294 244
295 /* Set the slave encoder configuration */ 245 /* Attach it to the specified connector. */
296 sfuncs->set_config(encoder, nv04_tv_encoder_info[type].params); 246 sfuncs->set_config(encoder, nv04_tv_encoder_info[type].platform_data);
247 sfuncs->create_resources(encoder, connector);
248 drm_mode_connector_attach_encoder(connector, encoder);
297 249
298 return 0; 250 return 0;
299 251
300fail: 252fail_cleanup:
301 drm_encoder_cleanup(encoder); 253 drm_encoder_cleanup(encoder);
302 254 kfree(hfuncs);
255fail_free:
303 kfree(nv_encoder); 256 kfree(nv_encoder);
304 return ret; 257 return ret;
305} 258}
diff --git a/drivers/gpu/drm/nouveau/nv10_fifo.c b/drivers/gpu/drm/nouveau/nv10_fifo.c
index 7aeabf262bc0..7a4069cf5d0b 100644
--- a/drivers/gpu/drm/nouveau/nv10_fifo.c
+++ b/drivers/gpu/drm/nouveau/nv10_fifo.c
@@ -55,7 +55,6 @@ nv10_fifo_create_context(struct nouveau_channel *chan)
55 /* Fill entries that are seen filled in dumps of nvidia driver just 55 /* Fill entries that are seen filled in dumps of nvidia driver just
56 * after channel's is put into DMA mode 56 * after channel's is put into DMA mode
57 */ 57 */
58 dev_priv->engine.instmem.prepare_access(dev, true);
59 nv_wi32(dev, fc + 0, chan->pushbuf_base); 58 nv_wi32(dev, fc + 0, chan->pushbuf_base);
60 nv_wi32(dev, fc + 4, chan->pushbuf_base); 59 nv_wi32(dev, fc + 4, chan->pushbuf_base);
61 nv_wi32(dev, fc + 12, chan->pushbuf->instance >> 4); 60 nv_wi32(dev, fc + 12, chan->pushbuf->instance >> 4);
@@ -66,7 +65,6 @@ nv10_fifo_create_context(struct nouveau_channel *chan)
66 NV_PFIFO_CACHE1_BIG_ENDIAN | 65 NV_PFIFO_CACHE1_BIG_ENDIAN |
67#endif 66#endif
68 0); 67 0);
69 dev_priv->engine.instmem.finish_access(dev);
70 68
71 /* enable the fifo dma operation */ 69 /* enable the fifo dma operation */
72 nv_wr32(dev, NV04_PFIFO_MODE, 70 nv_wr32(dev, NV04_PFIFO_MODE,
@@ -91,8 +89,6 @@ nv10_fifo_do_load_context(struct drm_device *dev, int chid)
91 struct drm_nouveau_private *dev_priv = dev->dev_private; 89 struct drm_nouveau_private *dev_priv = dev->dev_private;
92 uint32_t fc = NV10_RAMFC(chid), tmp; 90 uint32_t fc = NV10_RAMFC(chid), tmp;
93 91
94 dev_priv->engine.instmem.prepare_access(dev, false);
95
96 nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUT, nv_ri32(dev, fc + 0)); 92 nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUT, nv_ri32(dev, fc + 0));
97 nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_GET, nv_ri32(dev, fc + 4)); 93 nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_GET, nv_ri32(dev, fc + 4));
98 nv_wr32(dev, NV10_PFIFO_CACHE1_REF_CNT, nv_ri32(dev, fc + 8)); 94 nv_wr32(dev, NV10_PFIFO_CACHE1_REF_CNT, nv_ri32(dev, fc + 8));
@@ -117,8 +113,6 @@ nv10_fifo_do_load_context(struct drm_device *dev, int chid)
117 nv_wr32(dev, NV10_PFIFO_CACHE1_DMA_SUBROUTINE, nv_ri32(dev, fc + 48)); 113 nv_wr32(dev, NV10_PFIFO_CACHE1_DMA_SUBROUTINE, nv_ri32(dev, fc + 48));
118 114
119out: 115out:
120 dev_priv->engine.instmem.finish_access(dev);
121
122 nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0); 116 nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);
123 nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0); 117 nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0);
124} 118}
@@ -155,8 +149,6 @@ nv10_fifo_unload_context(struct drm_device *dev)
155 return 0; 149 return 0;
156 fc = NV10_RAMFC(chid); 150 fc = NV10_RAMFC(chid);
157 151
158 dev_priv->engine.instmem.prepare_access(dev, true);
159
160 nv_wi32(dev, fc + 0, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUT)); 152 nv_wi32(dev, fc + 0, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUT));
161 nv_wi32(dev, fc + 4, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET)); 153 nv_wi32(dev, fc + 4, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET));
162 nv_wi32(dev, fc + 8, nv_rd32(dev, NV10_PFIFO_CACHE1_REF_CNT)); 154 nv_wi32(dev, fc + 8, nv_rd32(dev, NV10_PFIFO_CACHE1_REF_CNT));
@@ -179,8 +171,6 @@ nv10_fifo_unload_context(struct drm_device *dev)
179 nv_wi32(dev, fc + 48, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET)); 171 nv_wi32(dev, fc + 48, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET));
180 172
181out: 173out:
182 dev_priv->engine.instmem.finish_access(dev);
183
184 nv10_fifo_do_load_context(dev, pfifo->channels - 1); 174 nv10_fifo_do_load_context(dev, pfifo->channels - 1);
185 nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, pfifo->channels - 1); 175 nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, pfifo->channels - 1);
186 return 0; 176 return 0;
diff --git a/drivers/gpu/drm/nouveau/nv17_gpio.c b/drivers/gpu/drm/nouveau/nv10_gpio.c
index 2e58c331e9b7..007fc29e2f86 100644
--- a/drivers/gpu/drm/nouveau/nv17_gpio.c
+++ b/drivers/gpu/drm/nouveau/nv10_gpio.c
@@ -55,7 +55,7 @@ get_gpio_location(struct dcb_gpio_entry *ent, uint32_t *reg, uint32_t *shift,
55} 55}
56 56
57int 57int
58nv17_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag) 58nv10_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag)
59{ 59{
60 struct dcb_gpio_entry *ent = nouveau_bios_gpio_entry(dev, tag); 60 struct dcb_gpio_entry *ent = nouveau_bios_gpio_entry(dev, tag);
61 uint32_t reg, shift, mask, value; 61 uint32_t reg, shift, mask, value;
@@ -72,7 +72,7 @@ nv17_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag)
72} 72}
73 73
74int 74int
75nv17_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state) 75nv10_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state)
76{ 76{
77 struct dcb_gpio_entry *ent = nouveau_bios_gpio_entry(dev, tag); 77 struct dcb_gpio_entry *ent = nouveau_bios_gpio_entry(dev, tag);
78 uint32_t reg, shift, mask, value; 78 uint32_t reg, shift, mask, value;
diff --git a/drivers/gpu/drm/nouveau/nv17_tv.c b/drivers/gpu/drm/nouveau/nv17_tv.c
index 74c880374fb9..44fefb0c7083 100644
--- a/drivers/gpu/drm/nouveau/nv17_tv.c
+++ b/drivers/gpu/drm/nouveau/nv17_tv.c
@@ -37,6 +37,7 @@ static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder)
37{ 37{
38 struct drm_device *dev = encoder->dev; 38 struct drm_device *dev = encoder->dev;
39 struct drm_nouveau_private *dev_priv = dev->dev_private; 39 struct drm_nouveau_private *dev_priv = dev->dev_private;
40 struct nouveau_gpio_engine *gpio = &dev_priv->engine.gpio;
40 uint32_t testval, regoffset = nv04_dac_output_offset(encoder); 41 uint32_t testval, regoffset = nv04_dac_output_offset(encoder);
41 uint32_t gpio0, gpio1, fp_htotal, fp_hsync_start, fp_hsync_end, 42 uint32_t gpio0, gpio1, fp_htotal, fp_hsync_start, fp_hsync_end,
42 fp_control, test_ctrl, dacclk, ctv_14, ctv_1c, ctv_6c; 43 fp_control, test_ctrl, dacclk, ctv_14, ctv_1c, ctv_6c;
@@ -52,8 +53,8 @@ static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder)
52 head = (dacclk & 0x100) >> 8; 53 head = (dacclk & 0x100) >> 8;
53 54
54 /* Save the previous state. */ 55 /* Save the previous state. */
55 gpio1 = nv17_gpio_get(dev, DCB_GPIO_TVDAC1); 56 gpio1 = gpio->get(dev, DCB_GPIO_TVDAC1);
56 gpio0 = nv17_gpio_get(dev, DCB_GPIO_TVDAC0); 57 gpio0 = gpio->get(dev, DCB_GPIO_TVDAC0);
57 fp_htotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL); 58 fp_htotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL);
58 fp_hsync_start = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START); 59 fp_hsync_start = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START);
59 fp_hsync_end = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END); 60 fp_hsync_end = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END);
@@ -64,8 +65,8 @@ static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder)
64 ctv_6c = NVReadRAMDAC(dev, head, 0x680c6c); 65 ctv_6c = NVReadRAMDAC(dev, head, 0x680c6c);
65 66
66 /* Prepare the DAC for load detection. */ 67 /* Prepare the DAC for load detection. */
67 nv17_gpio_set(dev, DCB_GPIO_TVDAC1, true); 68 gpio->set(dev, DCB_GPIO_TVDAC1, true);
68 nv17_gpio_set(dev, DCB_GPIO_TVDAC0, true); 69 gpio->set(dev, DCB_GPIO_TVDAC0, true);
69 70
70 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, 1343); 71 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, 1343);
71 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, 1047); 72 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, 1047);
@@ -110,12 +111,27 @@ static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder)
110 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END, fp_hsync_end); 111 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END, fp_hsync_end);
111 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, fp_hsync_start); 112 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, fp_hsync_start);
112 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, fp_htotal); 113 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, fp_htotal);
113 nv17_gpio_set(dev, DCB_GPIO_TVDAC1, gpio1); 114 gpio->set(dev, DCB_GPIO_TVDAC1, gpio1);
114 nv17_gpio_set(dev, DCB_GPIO_TVDAC0, gpio0); 115 gpio->set(dev, DCB_GPIO_TVDAC0, gpio0);
115 116
116 return sample; 117 return sample;
117} 118}
118 119
120static bool
121get_tv_detect_quirks(struct drm_device *dev, uint32_t *pin_mask)
122{
123 /* Zotac FX5200 */
124 if (dev->pdev->device == 0x0322 &&
125 dev->pdev->subsystem_vendor == 0x19da &&
126 (dev->pdev->subsystem_device == 0x1035 ||
127 dev->pdev->subsystem_device == 0x2035)) {
128 *pin_mask = 0xc;
129 return false;
130 }
131
132 return true;
133}
134
119static enum drm_connector_status 135static enum drm_connector_status
120nv17_tv_detect(struct drm_encoder *encoder, struct drm_connector *connector) 136nv17_tv_detect(struct drm_encoder *encoder, struct drm_connector *connector)
121{ 137{
@@ -124,12 +140,20 @@ nv17_tv_detect(struct drm_encoder *encoder, struct drm_connector *connector)
124 struct drm_mode_config *conf = &dev->mode_config; 140 struct drm_mode_config *conf = &dev->mode_config;
125 struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder); 141 struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
126 struct dcb_entry *dcb = tv_enc->base.dcb; 142 struct dcb_entry *dcb = tv_enc->base.dcb;
143 bool reliable = get_tv_detect_quirks(dev, &tv_enc->pin_mask);
127 144
128 if (dev_priv->chipset == 0x42 || 145 if (nv04_dac_in_use(encoder))
129 dev_priv->chipset == 0x43) 146 return connector_status_disconnected;
130 tv_enc->pin_mask = nv42_tv_sample_load(encoder) >> 28 & 0xe; 147
131 else 148 if (reliable) {
132 tv_enc->pin_mask = nv17_dac_sample_load(encoder) >> 28 & 0xe; 149 if (dev_priv->chipset == 0x42 ||
150 dev_priv->chipset == 0x43)
151 tv_enc->pin_mask =
152 nv42_tv_sample_load(encoder) >> 28 & 0xe;
153 else
154 tv_enc->pin_mask =
155 nv17_dac_sample_load(encoder) >> 28 & 0xe;
156 }
133 157
134 switch (tv_enc->pin_mask) { 158 switch (tv_enc->pin_mask) {
135 case 0x2: 159 case 0x2:
@@ -154,7 +178,9 @@ nv17_tv_detect(struct drm_encoder *encoder, struct drm_connector *connector)
154 conf->tv_subconnector_property, 178 conf->tv_subconnector_property,
155 tv_enc->subconnector); 179 tv_enc->subconnector);
156 180
157 if (tv_enc->subconnector) { 181 if (!reliable) {
182 return connector_status_unknown;
183 } else if (tv_enc->subconnector) {
158 NV_INFO(dev, "Load detected on output %c\n", 184 NV_INFO(dev, "Load detected on output %c\n",
159 '@' + ffs(dcb->or)); 185 '@' + ffs(dcb->or));
160 return connector_status_connected; 186 return connector_status_connected;
@@ -296,6 +322,9 @@ static bool nv17_tv_mode_fixup(struct drm_encoder *encoder,
296{ 322{
297 struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder); 323 struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
298 324
325 if (nv04_dac_in_use(encoder))
326 return false;
327
299 if (tv_norm->kind == CTV_ENC_MODE) 328 if (tv_norm->kind == CTV_ENC_MODE)
300 adjusted_mode->clock = tv_norm->ctv_enc_mode.mode.clock; 329 adjusted_mode->clock = tv_norm->ctv_enc_mode.mode.clock;
301 else 330 else
@@ -307,6 +336,8 @@ static bool nv17_tv_mode_fixup(struct drm_encoder *encoder,
307static void nv17_tv_dpms(struct drm_encoder *encoder, int mode) 336static void nv17_tv_dpms(struct drm_encoder *encoder, int mode)
308{ 337{
309 struct drm_device *dev = encoder->dev; 338 struct drm_device *dev = encoder->dev;
339 struct drm_nouveau_private *dev_priv = dev->dev_private;
340 struct nouveau_gpio_engine *gpio = &dev_priv->engine.gpio;
310 struct nv17_tv_state *regs = &to_tv_enc(encoder)->state; 341 struct nv17_tv_state *regs = &to_tv_enc(encoder)->state;
311 struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder); 342 struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
312 343
@@ -331,8 +362,8 @@ static void nv17_tv_dpms(struct drm_encoder *encoder, int mode)
331 362
332 nv_load_ptv(dev, regs, 200); 363 nv_load_ptv(dev, regs, 200);
333 364
334 nv17_gpio_set(dev, DCB_GPIO_TVDAC1, mode == DRM_MODE_DPMS_ON); 365 gpio->set(dev, DCB_GPIO_TVDAC1, mode == DRM_MODE_DPMS_ON);
335 nv17_gpio_set(dev, DCB_GPIO_TVDAC0, mode == DRM_MODE_DPMS_ON); 366 gpio->set(dev, DCB_GPIO_TVDAC0, mode == DRM_MODE_DPMS_ON);
336 367
337 nv04_dac_update_dacclk(encoder, mode == DRM_MODE_DPMS_ON); 368 nv04_dac_update_dacclk(encoder, mode == DRM_MODE_DPMS_ON);
338} 369}
@@ -744,8 +775,10 @@ static struct drm_encoder_funcs nv17_tv_funcs = {
744 .destroy = nv17_tv_destroy, 775 .destroy = nv17_tv_destroy,
745}; 776};
746 777
747int nv17_tv_create(struct drm_device *dev, struct dcb_entry *entry) 778int
779nv17_tv_create(struct drm_connector *connector, struct dcb_entry *entry)
748{ 780{
781 struct drm_device *dev = connector->dev;
749 struct drm_encoder *encoder; 782 struct drm_encoder *encoder;
750 struct nv17_tv_encoder *tv_enc = NULL; 783 struct nv17_tv_encoder *tv_enc = NULL;
751 784
@@ -774,5 +807,7 @@ int nv17_tv_create(struct drm_device *dev, struct dcb_entry *entry)
774 encoder->possible_crtcs = entry->heads; 807 encoder->possible_crtcs = entry->heads;
775 encoder->possible_clones = 0; 808 encoder->possible_clones = 0;
776 809
810 nv17_tv_create_resources(encoder, connector);
811 drm_mode_connector_attach_encoder(connector, encoder);
777 return 0; 812 return 0;
778} 813}
diff --git a/drivers/gpu/drm/nouveau/nv20_graph.c b/drivers/gpu/drm/nouveau/nv20_graph.c
index d6fc0a82f03d..17f309b36c91 100644
--- a/drivers/gpu/drm/nouveau/nv20_graph.c
+++ b/drivers/gpu/drm/nouveau/nv20_graph.c
@@ -370,68 +370,54 @@ nv20_graph_create_context(struct nouveau_channel *chan)
370{ 370{
371 struct drm_device *dev = chan->dev; 371 struct drm_device *dev = chan->dev;
372 struct drm_nouveau_private *dev_priv = dev->dev_private; 372 struct drm_nouveau_private *dev_priv = dev->dev_private;
373 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
373 void (*ctx_init)(struct drm_device *, struct nouveau_gpuobj *); 374 void (*ctx_init)(struct drm_device *, struct nouveau_gpuobj *);
374 unsigned int ctx_size;
375 unsigned int idoffs = 0x28/4; 375 unsigned int idoffs = 0x28/4;
376 int ret; 376 int ret;
377 377
378 switch (dev_priv->chipset) { 378 switch (dev_priv->chipset) {
379 case 0x20: 379 case 0x20:
380 ctx_size = NV20_GRCTX_SIZE;
381 ctx_init = nv20_graph_context_init; 380 ctx_init = nv20_graph_context_init;
382 idoffs = 0; 381 idoffs = 0;
383 break; 382 break;
384 case 0x25: 383 case 0x25:
385 case 0x28: 384 case 0x28:
386 ctx_size = NV25_GRCTX_SIZE;
387 ctx_init = nv25_graph_context_init; 385 ctx_init = nv25_graph_context_init;
388 break; 386 break;
389 case 0x2a: 387 case 0x2a:
390 ctx_size = NV2A_GRCTX_SIZE;
391 ctx_init = nv2a_graph_context_init; 388 ctx_init = nv2a_graph_context_init;
392 idoffs = 0; 389 idoffs = 0;
393 break; 390 break;
394 case 0x30: 391 case 0x30:
395 case 0x31: 392 case 0x31:
396 ctx_size = NV30_31_GRCTX_SIZE;
397 ctx_init = nv30_31_graph_context_init; 393 ctx_init = nv30_31_graph_context_init;
398 break; 394 break;
399 case 0x34: 395 case 0x34:
400 ctx_size = NV34_GRCTX_SIZE;
401 ctx_init = nv34_graph_context_init; 396 ctx_init = nv34_graph_context_init;
402 break; 397 break;
403 case 0x35: 398 case 0x35:
404 case 0x36: 399 case 0x36:
405 ctx_size = NV35_36_GRCTX_SIZE;
406 ctx_init = nv35_36_graph_context_init; 400 ctx_init = nv35_36_graph_context_init;
407 break; 401 break;
408 default: 402 default:
409 ctx_size = 0; 403 BUG_ON(1);
410 ctx_init = nv35_36_graph_context_init;
411 NV_ERROR(dev, "Please contact the devs if you want your NV%x"
412 " card to work\n", dev_priv->chipset);
413 return -ENOSYS;
414 break;
415 } 404 }
416 405
417 ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, ctx_size, 16, 406 ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, pgraph->grctx_size,
418 NVOBJ_FLAG_ZERO_ALLOC, 407 16, NVOBJ_FLAG_ZERO_ALLOC,
419 &chan->ramin_grctx); 408 &chan->ramin_grctx);
420 if (ret) 409 if (ret)
421 return ret; 410 return ret;
422 411
423 /* Initialise default context values */ 412 /* Initialise default context values */
424 dev_priv->engine.instmem.prepare_access(dev, true);
425 ctx_init(dev, chan->ramin_grctx->gpuobj); 413 ctx_init(dev, chan->ramin_grctx->gpuobj);
426 414
427 /* nv20: nv_wo32(dev, chan->ramin_grctx->gpuobj, 10, chan->id<<24); */ 415 /* nv20: nv_wo32(dev, chan->ramin_grctx->gpuobj, 10, chan->id<<24); */
428 nv_wo32(dev, chan->ramin_grctx->gpuobj, idoffs, 416 nv_wo32(dev, chan->ramin_grctx->gpuobj, idoffs,
429 (chan->id << 24) | 0x1); /* CTX_USER */ 417 (chan->id << 24) | 0x1); /* CTX_USER */
430 418
431 nv_wo32(dev, dev_priv->ctx_table->gpuobj, chan->id, 419 nv_wo32(dev, pgraph->ctx_table->gpuobj, chan->id,
432 chan->ramin_grctx->instance >> 4); 420 chan->ramin_grctx->instance >> 4);
433
434 dev_priv->engine.instmem.finish_access(dev);
435 return 0; 421 return 0;
436} 422}
437 423
@@ -440,13 +426,12 @@ nv20_graph_destroy_context(struct nouveau_channel *chan)
440{ 426{
441 struct drm_device *dev = chan->dev; 427 struct drm_device *dev = chan->dev;
442 struct drm_nouveau_private *dev_priv = dev->dev_private; 428 struct drm_nouveau_private *dev_priv = dev->dev_private;
429 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
443 430
444 if (chan->ramin_grctx) 431 if (chan->ramin_grctx)
445 nouveau_gpuobj_ref_del(dev, &chan->ramin_grctx); 432 nouveau_gpuobj_ref_del(dev, &chan->ramin_grctx);
446 433
447 dev_priv->engine.instmem.prepare_access(dev, true); 434 nv_wo32(dev, pgraph->ctx_table->gpuobj, chan->id, 0);
448 nv_wo32(dev, dev_priv->ctx_table->gpuobj, chan->id, 0);
449 dev_priv->engine.instmem.finish_access(dev);
450} 435}
451 436
452int 437int
@@ -538,29 +523,44 @@ nv20_graph_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
538int 523int
539nv20_graph_init(struct drm_device *dev) 524nv20_graph_init(struct drm_device *dev)
540{ 525{
541 struct drm_nouveau_private *dev_priv = 526 struct drm_nouveau_private *dev_priv = dev->dev_private;
542 (struct drm_nouveau_private *)dev->dev_private; 527 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
543 uint32_t tmp, vramsz; 528 uint32_t tmp, vramsz;
544 int ret, i; 529 int ret, i;
545 530
531 switch (dev_priv->chipset) {
532 case 0x20:
533 pgraph->grctx_size = NV20_GRCTX_SIZE;
534 break;
535 case 0x25:
536 case 0x28:
537 pgraph->grctx_size = NV25_GRCTX_SIZE;
538 break;
539 case 0x2a:
540 pgraph->grctx_size = NV2A_GRCTX_SIZE;
541 break;
542 default:
543 NV_ERROR(dev, "unknown chipset, disabling acceleration\n");
544 pgraph->accel_blocked = true;
545 return 0;
546 }
547
546 nv_wr32(dev, NV03_PMC_ENABLE, 548 nv_wr32(dev, NV03_PMC_ENABLE,
547 nv_rd32(dev, NV03_PMC_ENABLE) & ~NV_PMC_ENABLE_PGRAPH); 549 nv_rd32(dev, NV03_PMC_ENABLE) & ~NV_PMC_ENABLE_PGRAPH);
548 nv_wr32(dev, NV03_PMC_ENABLE, 550 nv_wr32(dev, NV03_PMC_ENABLE,
549 nv_rd32(dev, NV03_PMC_ENABLE) | NV_PMC_ENABLE_PGRAPH); 551 nv_rd32(dev, NV03_PMC_ENABLE) | NV_PMC_ENABLE_PGRAPH);
550 552
551 if (!dev_priv->ctx_table) { 553 if (!pgraph->ctx_table) {
552 /* Create Context Pointer Table */ 554 /* Create Context Pointer Table */
553 dev_priv->ctx_table_size = 32 * 4; 555 ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, 32 * 4, 16,
554 ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0,
555 dev_priv->ctx_table_size, 16,
556 NVOBJ_FLAG_ZERO_ALLOC, 556 NVOBJ_FLAG_ZERO_ALLOC,
557 &dev_priv->ctx_table); 557 &pgraph->ctx_table);
558 if (ret) 558 if (ret)
559 return ret; 559 return ret;
560 } 560 }
561 561
562 nv_wr32(dev, NV20_PGRAPH_CHANNEL_CTX_TABLE, 562 nv_wr32(dev, NV20_PGRAPH_CHANNEL_CTX_TABLE,
563 dev_priv->ctx_table->instance >> 4); 563 pgraph->ctx_table->instance >> 4);
564 564
565 nv20_graph_rdi(dev); 565 nv20_graph_rdi(dev);
566 566
@@ -616,7 +616,7 @@ nv20_graph_init(struct drm_device *dev)
616 nv_wr32(dev, NV10_PGRAPH_SURFACE, tmp); 616 nv_wr32(dev, NV10_PGRAPH_SURFACE, tmp);
617 617
618 /* begin RAM config */ 618 /* begin RAM config */
619 vramsz = drm_get_resource_len(dev, 0) - 1; 619 vramsz = pci_resource_len(dev->pdev, 0) - 1;
620 nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0)); 620 nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0));
621 nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1)); 621 nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1));
622 nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0000); 622 nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0000);
@@ -644,34 +644,52 @@ void
644nv20_graph_takedown(struct drm_device *dev) 644nv20_graph_takedown(struct drm_device *dev)
645{ 645{
646 struct drm_nouveau_private *dev_priv = dev->dev_private; 646 struct drm_nouveau_private *dev_priv = dev->dev_private;
647 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
647 648
648 nouveau_gpuobj_ref_del(dev, &dev_priv->ctx_table); 649 nouveau_gpuobj_ref_del(dev, &pgraph->ctx_table);
649} 650}
650 651
651int 652int
652nv30_graph_init(struct drm_device *dev) 653nv30_graph_init(struct drm_device *dev)
653{ 654{
654 struct drm_nouveau_private *dev_priv = dev->dev_private; 655 struct drm_nouveau_private *dev_priv = dev->dev_private;
656 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
655 int ret, i; 657 int ret, i;
656 658
659 switch (dev_priv->chipset) {
660 case 0x30:
661 case 0x31:
662 pgraph->grctx_size = NV30_31_GRCTX_SIZE;
663 break;
664 case 0x34:
665 pgraph->grctx_size = NV34_GRCTX_SIZE;
666 break;
667 case 0x35:
668 case 0x36:
669 pgraph->grctx_size = NV35_36_GRCTX_SIZE;
670 break;
671 default:
672 NV_ERROR(dev, "unknown chipset, disabling acceleration\n");
673 pgraph->accel_blocked = true;
674 return 0;
675 }
676
657 nv_wr32(dev, NV03_PMC_ENABLE, 677 nv_wr32(dev, NV03_PMC_ENABLE,
658 nv_rd32(dev, NV03_PMC_ENABLE) & ~NV_PMC_ENABLE_PGRAPH); 678 nv_rd32(dev, NV03_PMC_ENABLE) & ~NV_PMC_ENABLE_PGRAPH);
659 nv_wr32(dev, NV03_PMC_ENABLE, 679 nv_wr32(dev, NV03_PMC_ENABLE,
660 nv_rd32(dev, NV03_PMC_ENABLE) | NV_PMC_ENABLE_PGRAPH); 680 nv_rd32(dev, NV03_PMC_ENABLE) | NV_PMC_ENABLE_PGRAPH);
661 681
662 if (!dev_priv->ctx_table) { 682 if (!pgraph->ctx_table) {
663 /* Create Context Pointer Table */ 683 /* Create Context Pointer Table */
664 dev_priv->ctx_table_size = 32 * 4; 684 ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, 32 * 4, 16,
665 ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0,
666 dev_priv->ctx_table_size, 16,
667 NVOBJ_FLAG_ZERO_ALLOC, 685 NVOBJ_FLAG_ZERO_ALLOC,
668 &dev_priv->ctx_table); 686 &pgraph->ctx_table);
669 if (ret) 687 if (ret)
670 return ret; 688 return ret;
671 } 689 }
672 690
673 nv_wr32(dev, NV20_PGRAPH_CHANNEL_CTX_TABLE, 691 nv_wr32(dev, NV20_PGRAPH_CHANNEL_CTX_TABLE,
674 dev_priv->ctx_table->instance >> 4); 692 pgraph->ctx_table->instance >> 4);
675 693
676 nv_wr32(dev, NV03_PGRAPH_INTR , 0xFFFFFFFF); 694 nv_wr32(dev, NV03_PGRAPH_INTR , 0xFFFFFFFF);
677 nv_wr32(dev, NV03_PGRAPH_INTR_EN, 0xFFFFFFFF); 695 nv_wr32(dev, NV03_PGRAPH_INTR_EN, 0xFFFFFFFF);
@@ -717,7 +735,7 @@ nv30_graph_init(struct drm_device *dev)
717 nv_wr32(dev, 0x0040075c , 0x00000001); 735 nv_wr32(dev, 0x0040075c , 0x00000001);
718 736
719 /* begin RAM config */ 737 /* begin RAM config */
720 /* vramsz = drm_get_resource_len(dev, 0) - 1; */ 738 /* vramsz = pci_resource_len(dev->pdev, 0) - 1; */
721 nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0)); 739 nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0));
722 nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1)); 740 nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1));
723 if (dev_priv->chipset != 0x34) { 741 if (dev_priv->chipset != 0x34) {
diff --git a/drivers/gpu/drm/nouveau/nv30_fb.c b/drivers/gpu/drm/nouveau/nv30_fb.c
new file mode 100644
index 000000000000..9d35c8b3b839
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nv30_fb.c
@@ -0,0 +1,87 @@
1/*
2 * Copyright (C) 2010 Francisco Jerez.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
27#include "drmP.h"
28#include "drm.h"
29#include "nouveau_drv.h"
30#include "nouveau_drm.h"
31
32static int
33calc_ref(int b, int l, int i)
34{
35 int j, x = 0;
36
37 for (j = 0; j < 4; j++) {
38 int n = (b >> (8 * j) & 0xf);
39 int m = (l >> (8 * i) & 0xff) + 2 * (n & 0x8 ? n - 0x10 : n);
40
41 x |= (0x80 | (m & 0x1f)) << (8 * j);
42 }
43
44 return x;
45}
46
47int
48nv30_fb_init(struct drm_device *dev)
49{
50 struct drm_nouveau_private *dev_priv = dev->dev_private;
51 struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
52 int i, j;
53
54 pfb->num_tiles = NV10_PFB_TILE__SIZE;
55
56 /* Turn all the tiling regions off. */
57 for (i = 0; i < pfb->num_tiles; i++)
58 pfb->set_region_tiling(dev, i, 0, 0, 0);
59
60 /* Init the memory timing regs at 0x10037c/0x1003ac */
61 if (dev_priv->chipset == 0x30 ||
62 dev_priv->chipset == 0x31 ||
63 dev_priv->chipset == 0x35) {
64 /* Related to ROP count */
65 int n = (dev_priv->chipset == 0x31 ? 2 : 4);
66 int b = (dev_priv->chipset > 0x30 ?
67 nv_rd32(dev, 0x122c) & 0xf : 0);
68 int l = nv_rd32(dev, 0x1003d0);
69
70 for (i = 0; i < n; i++) {
71 for (j = 0; j < 3; j++)
72 nv_wr32(dev, 0x10037c + 0xc * i + 0x4 * j,
73 calc_ref(b, l, j));
74
75 for (j = 0; j < 2; j++)
76 nv_wr32(dev, 0x1003ac + 0x8 * i + 0x4 * j,
77 calc_ref(b, l, j));
78 }
79 }
80
81 return 0;
82}
83
84void
85nv30_fb_takedown(struct drm_device *dev)
86{
87}
diff --git a/drivers/gpu/drm/nouveau/nv40_fifo.c b/drivers/gpu/drm/nouveau/nv40_fifo.c
index 500ccfd3a0b8..2b67f1835c39 100644
--- a/drivers/gpu/drm/nouveau/nv40_fifo.c
+++ b/drivers/gpu/drm/nouveau/nv40_fifo.c
@@ -48,7 +48,6 @@ nv40_fifo_create_context(struct nouveau_channel *chan)
48 48
49 spin_lock_irqsave(&dev_priv->context_switch_lock, flags); 49 spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
50 50
51 dev_priv->engine.instmem.prepare_access(dev, true);
52 nv_wi32(dev, fc + 0, chan->pushbuf_base); 51 nv_wi32(dev, fc + 0, chan->pushbuf_base);
53 nv_wi32(dev, fc + 4, chan->pushbuf_base); 52 nv_wi32(dev, fc + 4, chan->pushbuf_base);
54 nv_wi32(dev, fc + 12, chan->pushbuf->instance >> 4); 53 nv_wi32(dev, fc + 12, chan->pushbuf->instance >> 4);
@@ -61,7 +60,6 @@ nv40_fifo_create_context(struct nouveau_channel *chan)
61 0x30000000 /* no idea.. */); 60 0x30000000 /* no idea.. */);
62 nv_wi32(dev, fc + 56, chan->ramin_grctx->instance >> 4); 61 nv_wi32(dev, fc + 56, chan->ramin_grctx->instance >> 4);
63 nv_wi32(dev, fc + 60, 0x0001FFFF); 62 nv_wi32(dev, fc + 60, 0x0001FFFF);
64 dev_priv->engine.instmem.finish_access(dev);
65 63
66 /* enable the fifo dma operation */ 64 /* enable the fifo dma operation */
67 nv_wr32(dev, NV04_PFIFO_MODE, 65 nv_wr32(dev, NV04_PFIFO_MODE,
@@ -89,8 +87,6 @@ nv40_fifo_do_load_context(struct drm_device *dev, int chid)
89 struct drm_nouveau_private *dev_priv = dev->dev_private; 87 struct drm_nouveau_private *dev_priv = dev->dev_private;
90 uint32_t fc = NV40_RAMFC(chid), tmp, tmp2; 88 uint32_t fc = NV40_RAMFC(chid), tmp, tmp2;
91 89
92 dev_priv->engine.instmem.prepare_access(dev, false);
93
94 nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUT, nv_ri32(dev, fc + 0)); 90 nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUT, nv_ri32(dev, fc + 0));
95 nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_GET, nv_ri32(dev, fc + 4)); 91 nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_GET, nv_ri32(dev, fc + 4));
96 nv_wr32(dev, NV10_PFIFO_CACHE1_REF_CNT, nv_ri32(dev, fc + 8)); 92 nv_wr32(dev, NV10_PFIFO_CACHE1_REF_CNT, nv_ri32(dev, fc + 8));
@@ -127,8 +123,6 @@ nv40_fifo_do_load_context(struct drm_device *dev, int chid)
127 nv_wr32(dev, 0x2088, nv_ri32(dev, fc + 76)); 123 nv_wr32(dev, 0x2088, nv_ri32(dev, fc + 76));
128 nv_wr32(dev, 0x3300, nv_ri32(dev, fc + 80)); 124 nv_wr32(dev, 0x3300, nv_ri32(dev, fc + 80));
129 125
130 dev_priv->engine.instmem.finish_access(dev);
131
132 nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0); 126 nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);
133 nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0); 127 nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0);
134} 128}
@@ -166,7 +160,6 @@ nv40_fifo_unload_context(struct drm_device *dev)
166 return 0; 160 return 0;
167 fc = NV40_RAMFC(chid); 161 fc = NV40_RAMFC(chid);
168 162
169 dev_priv->engine.instmem.prepare_access(dev, true);
170 nv_wi32(dev, fc + 0, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUT)); 163 nv_wi32(dev, fc + 0, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUT));
171 nv_wi32(dev, fc + 4, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET)); 164 nv_wi32(dev, fc + 4, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET));
172 nv_wi32(dev, fc + 8, nv_rd32(dev, NV10_PFIFO_CACHE1_REF_CNT)); 165 nv_wi32(dev, fc + 8, nv_rd32(dev, NV10_PFIFO_CACHE1_REF_CNT));
@@ -200,7 +193,6 @@ nv40_fifo_unload_context(struct drm_device *dev)
200 tmp |= (nv_rd32(dev, NV04_PFIFO_CACHE1_PUT) << 16); 193 tmp |= (nv_rd32(dev, NV04_PFIFO_CACHE1_PUT) << 16);
201 nv_wi32(dev, fc + 72, tmp); 194 nv_wi32(dev, fc + 72, tmp);
202#endif 195#endif
203 dev_priv->engine.instmem.finish_access(dev);
204 196
205 nv40_fifo_do_load_context(dev, pfifo->channels - 1); 197 nv40_fifo_do_load_context(dev, pfifo->channels - 1);
206 nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, 198 nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1,
diff --git a/drivers/gpu/drm/nouveau/nv40_graph.c b/drivers/gpu/drm/nouveau/nv40_graph.c
index 704a25d04ac9..fd7d2b501316 100644
--- a/drivers/gpu/drm/nouveau/nv40_graph.c
+++ b/drivers/gpu/drm/nouveau/nv40_graph.c
@@ -58,6 +58,7 @@ nv40_graph_create_context(struct nouveau_channel *chan)
58 struct drm_device *dev = chan->dev; 58 struct drm_device *dev = chan->dev;
59 struct drm_nouveau_private *dev_priv = dev->dev_private; 59 struct drm_nouveau_private *dev_priv = dev->dev_private;
60 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph; 60 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
61 struct nouveau_grctx ctx = {};
61 int ret; 62 int ret;
62 63
63 ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, pgraph->grctx_size, 64 ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, pgraph->grctx_size,
@@ -67,20 +68,13 @@ nv40_graph_create_context(struct nouveau_channel *chan)
67 return ret; 68 return ret;
68 69
69 /* Initialise default context values */ 70 /* Initialise default context values */
70 dev_priv->engine.instmem.prepare_access(dev, true); 71 ctx.dev = chan->dev;
71 if (!pgraph->ctxprog) { 72 ctx.mode = NOUVEAU_GRCTX_VALS;
72 struct nouveau_grctx ctx = {}; 73 ctx.data = chan->ramin_grctx->gpuobj;
73 74 nv40_grctx_init(&ctx);
74 ctx.dev = chan->dev; 75
75 ctx.mode = NOUVEAU_GRCTX_VALS;
76 ctx.data = chan->ramin_grctx->gpuobj;
77 nv40_grctx_init(&ctx);
78 } else {
79 nouveau_grctx_vals_load(dev, chan->ramin_grctx->gpuobj);
80 }
81 nv_wo32(dev, chan->ramin_grctx->gpuobj, 0, 76 nv_wo32(dev, chan->ramin_grctx->gpuobj, 0,
82 chan->ramin_grctx->gpuobj->im_pramin->start); 77 chan->ramin_grctx->gpuobj->im_pramin->start);
83 dev_priv->engine.instmem.finish_access(dev);
84 return 0; 78 return 0;
85} 79}
86 80
@@ -238,7 +232,8 @@ nv40_graph_init(struct drm_device *dev)
238 struct drm_nouveau_private *dev_priv = 232 struct drm_nouveau_private *dev_priv =
239 (struct drm_nouveau_private *)dev->dev_private; 233 (struct drm_nouveau_private *)dev->dev_private;
240 struct nouveau_fb_engine *pfb = &dev_priv->engine.fb; 234 struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
241 uint32_t vramsz; 235 struct nouveau_grctx ctx = {};
236 uint32_t vramsz, *cp;
242 int i, j; 237 int i, j;
243 238
244 nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) & 239 nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) &
@@ -246,32 +241,22 @@ nv40_graph_init(struct drm_device *dev)
246 nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) | 241 nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) |
247 NV_PMC_ENABLE_PGRAPH); 242 NV_PMC_ENABLE_PGRAPH);
248 243
249 if (nouveau_ctxfw) { 244 cp = kmalloc(sizeof(*cp) * 256, GFP_KERNEL);
250 nouveau_grctx_prog_load(dev); 245 if (!cp)
251 dev_priv->engine.graph.grctx_size = 175 * 1024; 246 return -ENOMEM;
252 }
253 247
254 if (!dev_priv->engine.graph.ctxprog) { 248 ctx.dev = dev;
255 struct nouveau_grctx ctx = {}; 249 ctx.mode = NOUVEAU_GRCTX_PROG;
256 uint32_t *cp; 250 ctx.data = cp;
251 ctx.ctxprog_max = 256;
252 nv40_grctx_init(&ctx);
253 dev_priv->engine.graph.grctx_size = ctx.ctxvals_pos * 4;
257 254
258 cp = kmalloc(sizeof(*cp) * 256, GFP_KERNEL); 255 nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0);
259 if (!cp) 256 for (i = 0; i < ctx.ctxprog_len; i++)
260 return -ENOMEM; 257 nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_DATA, cp[i]);
261 258
262 ctx.dev = dev; 259 kfree(cp);
263 ctx.mode = NOUVEAU_GRCTX_PROG;
264 ctx.data = cp;
265 ctx.ctxprog_max = 256;
266 nv40_grctx_init(&ctx);
267 dev_priv->engine.graph.grctx_size = ctx.ctxvals_pos * 4;
268
269 nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0);
270 for (i = 0; i < ctx.ctxprog_len; i++)
271 nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_DATA, cp[i]);
272
273 kfree(cp);
274 }
275 260
276 /* No context present currently */ 261 /* No context present currently */
277 nv_wr32(dev, NV40_PGRAPH_CTXCTL_CUR, 0x00000000); 262 nv_wr32(dev, NV40_PGRAPH_CTXCTL_CUR, 0x00000000);
@@ -367,7 +352,7 @@ nv40_graph_init(struct drm_device *dev)
367 nv40_graph_set_region_tiling(dev, i, 0, 0, 0); 352 nv40_graph_set_region_tiling(dev, i, 0, 0, 0);
368 353
369 /* begin RAM config */ 354 /* begin RAM config */
370 vramsz = drm_get_resource_len(dev, 0) - 1; 355 vramsz = pci_resource_len(dev->pdev, 0) - 1;
371 switch (dev_priv->chipset) { 356 switch (dev_priv->chipset) {
372 case 0x40: 357 case 0x40:
373 nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0)); 358 nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0));
@@ -407,7 +392,6 @@ nv40_graph_init(struct drm_device *dev)
407 392
408void nv40_graph_takedown(struct drm_device *dev) 393void nv40_graph_takedown(struct drm_device *dev)
409{ 394{
410 nouveau_grctx_fini(dev);
411} 395}
412 396
413struct nouveau_pgraph_object_class nv40_graph_grclass[] = { 397struct nouveau_pgraph_object_class nv40_graph_grclass[] = {
diff --git a/drivers/gpu/drm/nouveau/nv40_mc.c b/drivers/gpu/drm/nouveau/nv40_mc.c
index 2a3495e848e9..e4e72c12ab6a 100644
--- a/drivers/gpu/drm/nouveau/nv40_mc.c
+++ b/drivers/gpu/drm/nouveau/nv40_mc.c
@@ -19,7 +19,7 @@ nv40_mc_init(struct drm_device *dev)
19 case 0x46: /* G72 */ 19 case 0x46: /* G72 */
20 case 0x4e: 20 case 0x4e:
21 case 0x4c: /* C51_G7X */ 21 case 0x4c: /* C51_G7X */
22 tmp = nv_rd32(dev, NV40_PFB_020C); 22 tmp = nv_rd32(dev, NV04_PFB_FIFO_DATA);
23 nv_wr32(dev, NV40_PMC_1700, tmp); 23 nv_wr32(dev, NV40_PMC_1700, tmp);
24 nv_wr32(dev, NV40_PMC_1704, 0); 24 nv_wr32(dev, NV40_PMC_1704, 0);
25 nv_wr32(dev, NV40_PMC_1708, 0); 25 nv_wr32(dev, NV40_PMC_1708, 0);
diff --git a/drivers/gpu/drm/nouveau/nv50_crtc.c b/drivers/gpu/drm/nouveau/nv50_crtc.c
index b4e4a3b05eae..5d11ea101666 100644
--- a/drivers/gpu/drm/nouveau/nv50_crtc.c
+++ b/drivers/gpu/drm/nouveau/nv50_crtc.c
@@ -440,47 +440,15 @@ nv50_crtc_prepare(struct drm_crtc *crtc)
440{ 440{
441 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 441 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
442 struct drm_device *dev = crtc->dev; 442 struct drm_device *dev = crtc->dev;
443 struct drm_encoder *encoder;
444 uint32_t dac = 0, sor = 0;
445 443
446 NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index); 444 NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
447 445
448 /* Disconnect all unused encoders. */
449 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
450 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
451
452 if (!drm_helper_encoder_in_use(encoder))
453 continue;
454
455 if (nv_encoder->dcb->type == OUTPUT_ANALOG ||
456 nv_encoder->dcb->type == OUTPUT_TV)
457 dac |= (1 << nv_encoder->or);
458 else
459 sor |= (1 << nv_encoder->or);
460 }
461
462 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
463 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
464
465 if (nv_encoder->dcb->type == OUTPUT_ANALOG ||
466 nv_encoder->dcb->type == OUTPUT_TV) {
467 if (dac & (1 << nv_encoder->or))
468 continue;
469 } else {
470 if (sor & (1 << nv_encoder->or))
471 continue;
472 }
473
474 nv_encoder->disconnect(nv_encoder);
475 }
476
477 nv50_crtc_blank(nv_crtc, true); 446 nv50_crtc_blank(nv_crtc, true);
478} 447}
479 448
480static void 449static void
481nv50_crtc_commit(struct drm_crtc *crtc) 450nv50_crtc_commit(struct drm_crtc *crtc)
482{ 451{
483 struct drm_crtc *crtc2;
484 struct drm_device *dev = crtc->dev; 452 struct drm_device *dev = crtc->dev;
485 struct drm_nouveau_private *dev_priv = dev->dev_private; 453 struct drm_nouveau_private *dev_priv = dev->dev_private;
486 struct nouveau_channel *evo = dev_priv->evo; 454 struct nouveau_channel *evo = dev_priv->evo;
@@ -491,20 +459,14 @@ nv50_crtc_commit(struct drm_crtc *crtc)
491 459
492 nv50_crtc_blank(nv_crtc, false); 460 nv50_crtc_blank(nv_crtc, false);
493 461
494 /* Explicitly blank all unused crtc's. */
495 list_for_each_entry(crtc2, &dev->mode_config.crtc_list, head) {
496 if (!drm_helper_crtc_in_use(crtc2))
497 nv50_crtc_blank(nouveau_crtc(crtc2), true);
498 }
499
500 ret = RING_SPACE(evo, 2); 462 ret = RING_SPACE(evo, 2);
501 if (ret) { 463 if (ret) {
502 NV_ERROR(dev, "no space while committing crtc\n"); 464 NV_ERROR(dev, "no space while committing crtc\n");
503 return; 465 return;
504 } 466 }
505 BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1); 467 BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);
506 OUT_RING(evo, 0); 468 OUT_RING (evo, 0);
507 FIRE_RING(evo); 469 FIRE_RING (evo);
508} 470}
509 471
510static bool 472static bool
diff --git a/drivers/gpu/drm/nouveau/nv50_dac.c b/drivers/gpu/drm/nouveau/nv50_dac.c
index 1fd9537beff6..1bc085962945 100644
--- a/drivers/gpu/drm/nouveau/nv50_dac.c
+++ b/drivers/gpu/drm/nouveau/nv50_dac.c
@@ -37,22 +37,31 @@
37#include "nv50_display.h" 37#include "nv50_display.h"
38 38
39static void 39static void
40nv50_dac_disconnect(struct nouveau_encoder *nv_encoder) 40nv50_dac_disconnect(struct drm_encoder *encoder)
41{ 41{
42 struct drm_device *dev = to_drm_encoder(nv_encoder)->dev; 42 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
43 struct drm_device *dev = encoder->dev;
43 struct drm_nouveau_private *dev_priv = dev->dev_private; 44 struct drm_nouveau_private *dev_priv = dev->dev_private;
44 struct nouveau_channel *evo = dev_priv->evo; 45 struct nouveau_channel *evo = dev_priv->evo;
45 int ret; 46 int ret;
46 47
48 if (!nv_encoder->crtc)
49 return;
50 nv50_crtc_blank(nouveau_crtc(nv_encoder->crtc), true);
51
47 NV_DEBUG_KMS(dev, "Disconnecting DAC %d\n", nv_encoder->or); 52 NV_DEBUG_KMS(dev, "Disconnecting DAC %d\n", nv_encoder->or);
48 53
49 ret = RING_SPACE(evo, 2); 54 ret = RING_SPACE(evo, 4);
50 if (ret) { 55 if (ret) {
51 NV_ERROR(dev, "no space while disconnecting DAC\n"); 56 NV_ERROR(dev, "no space while disconnecting DAC\n");
52 return; 57 return;
53 } 58 }
54 BEGIN_RING(evo, 0, NV50_EVO_DAC(nv_encoder->or, MODE_CTRL), 1); 59 BEGIN_RING(evo, 0, NV50_EVO_DAC(nv_encoder->or, MODE_CTRL), 1);
55 OUT_RING(evo, 0); 60 OUT_RING (evo, 0);
61 BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);
62 OUT_RING (evo, 0);
63
64 nv_encoder->crtc = NULL;
56} 65}
57 66
58static enum drm_connector_status 67static enum drm_connector_status
@@ -213,7 +222,8 @@ nv50_dac_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
213 uint32_t mode_ctl = 0, mode_ctl2 = 0; 222 uint32_t mode_ctl = 0, mode_ctl2 = 0;
214 int ret; 223 int ret;
215 224
216 NV_DEBUG_KMS(dev, "or %d\n", nv_encoder->or); 225 NV_DEBUG_KMS(dev, "or %d type %d crtc %d\n",
226 nv_encoder->or, nv_encoder->dcb->type, crtc->index);
217 227
218 nv50_dac_dpms(encoder, DRM_MODE_DPMS_ON); 228 nv50_dac_dpms(encoder, DRM_MODE_DPMS_ON);
219 229
@@ -243,6 +253,14 @@ nv50_dac_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
243 BEGIN_RING(evo, 0, NV50_EVO_DAC(nv_encoder->or, MODE_CTRL), 2); 253 BEGIN_RING(evo, 0, NV50_EVO_DAC(nv_encoder->or, MODE_CTRL), 2);
244 OUT_RING(evo, mode_ctl); 254 OUT_RING(evo, mode_ctl);
245 OUT_RING(evo, mode_ctl2); 255 OUT_RING(evo, mode_ctl2);
256
257 nv_encoder->crtc = encoder->crtc;
258}
259
260static struct drm_crtc *
261nv50_dac_crtc_get(struct drm_encoder *encoder)
262{
263 return nouveau_encoder(encoder)->crtc;
246} 264}
247 265
248static const struct drm_encoder_helper_funcs nv50_dac_helper_funcs = { 266static const struct drm_encoder_helper_funcs nv50_dac_helper_funcs = {
@@ -253,7 +271,9 @@ static const struct drm_encoder_helper_funcs nv50_dac_helper_funcs = {
253 .prepare = nv50_dac_prepare, 271 .prepare = nv50_dac_prepare,
254 .commit = nv50_dac_commit, 272 .commit = nv50_dac_commit,
255 .mode_set = nv50_dac_mode_set, 273 .mode_set = nv50_dac_mode_set,
256 .detect = nv50_dac_detect 274 .get_crtc = nv50_dac_crtc_get,
275 .detect = nv50_dac_detect,
276 .disable = nv50_dac_disconnect
257}; 277};
258 278
259static void 279static void
@@ -275,14 +295,11 @@ static const struct drm_encoder_funcs nv50_dac_encoder_funcs = {
275}; 295};
276 296
277int 297int
278nv50_dac_create(struct drm_device *dev, struct dcb_entry *entry) 298nv50_dac_create(struct drm_connector *connector, struct dcb_entry *entry)
279{ 299{
280 struct nouveau_encoder *nv_encoder; 300 struct nouveau_encoder *nv_encoder;
281 struct drm_encoder *encoder; 301 struct drm_encoder *encoder;
282 302
283 NV_DEBUG_KMS(dev, "\n");
284 NV_INFO(dev, "Detected a DAC output\n");
285
286 nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL); 303 nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
287 if (!nv_encoder) 304 if (!nv_encoder)
288 return -ENOMEM; 305 return -ENOMEM;
@@ -291,14 +308,14 @@ nv50_dac_create(struct drm_device *dev, struct dcb_entry *entry)
291 nv_encoder->dcb = entry; 308 nv_encoder->dcb = entry;
292 nv_encoder->or = ffs(entry->or) - 1; 309 nv_encoder->or = ffs(entry->or) - 1;
293 310
294 nv_encoder->disconnect = nv50_dac_disconnect; 311 drm_encoder_init(connector->dev, encoder, &nv50_dac_encoder_funcs,
295
296 drm_encoder_init(dev, encoder, &nv50_dac_encoder_funcs,
297 DRM_MODE_ENCODER_DAC); 312 DRM_MODE_ENCODER_DAC);
298 drm_encoder_helper_add(encoder, &nv50_dac_helper_funcs); 313 drm_encoder_helper_add(encoder, &nv50_dac_helper_funcs);
299 314
300 encoder->possible_crtcs = entry->heads; 315 encoder->possible_crtcs = entry->heads;
301 encoder->possible_clones = 0; 316 encoder->possible_clones = 0;
317
318 drm_mode_connector_attach_encoder(connector, encoder);
302 return 0; 319 return 0;
303} 320}
304 321
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index 580a5d10be93..f13ad0de9c8f 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -71,14 +71,13 @@ nv50_evo_dmaobj_new(struct nouveau_channel *evo, uint32_t class, uint32_t name,
71 return ret; 71 return ret;
72 } 72 }
73 73
74 dev_priv->engine.instmem.prepare_access(dev, true);
75 nv_wo32(dev, obj, 0, (tile_flags << 22) | (magic_flags << 16) | class); 74 nv_wo32(dev, obj, 0, (tile_flags << 22) | (magic_flags << 16) | class);
76 nv_wo32(dev, obj, 1, limit); 75 nv_wo32(dev, obj, 1, limit);
77 nv_wo32(dev, obj, 2, offset); 76 nv_wo32(dev, obj, 2, offset);
78 nv_wo32(dev, obj, 3, 0x00000000); 77 nv_wo32(dev, obj, 3, 0x00000000);
79 nv_wo32(dev, obj, 4, 0x00000000); 78 nv_wo32(dev, obj, 4, 0x00000000);
80 nv_wo32(dev, obj, 5, 0x00010000); 79 nv_wo32(dev, obj, 5, 0x00010000);
81 dev_priv->engine.instmem.finish_access(dev); 80 dev_priv->engine.instmem.flush(dev);
82 81
83 return 0; 82 return 0;
84} 83}
@@ -110,8 +109,8 @@ nv50_evo_channel_new(struct drm_device *dev, struct nouveau_channel **pchan)
110 return ret; 109 return ret;
111 } 110 }
112 111
113 ret = nouveau_mem_init_heap(&chan->ramin_heap, chan->ramin->gpuobj-> 112 ret = drm_mm_init(&chan->ramin_heap,
114 im_pramin->start, 32768); 113 chan->ramin->gpuobj->im_pramin->start, 32768);
115 if (ret) { 114 if (ret) {
116 NV_ERROR(dev, "Error initialising EVO PRAMIN heap: %d\n", ret); 115 NV_ERROR(dev, "Error initialising EVO PRAMIN heap: %d\n", ret);
117 nv50_evo_channel_del(pchan); 116 nv50_evo_channel_del(pchan);
@@ -179,13 +178,25 @@ nv50_evo_channel_new(struct drm_device *dev, struct nouveau_channel **pchan)
179} 178}
180 179
181int 180int
181nv50_display_early_init(struct drm_device *dev)
182{
183 return 0;
184}
185
186void
187nv50_display_late_takedown(struct drm_device *dev)
188{
189}
190
191int
182nv50_display_init(struct drm_device *dev) 192nv50_display_init(struct drm_device *dev)
183{ 193{
184 struct drm_nouveau_private *dev_priv = dev->dev_private; 194 struct drm_nouveau_private *dev_priv = dev->dev_private;
185 struct nouveau_timer_engine *ptimer = &dev_priv->engine.timer; 195 struct nouveau_timer_engine *ptimer = &dev_priv->engine.timer;
196 struct nouveau_gpio_engine *pgpio = &dev_priv->engine.gpio;
186 struct nouveau_channel *evo = dev_priv->evo; 197 struct nouveau_channel *evo = dev_priv->evo;
187 struct drm_connector *connector; 198 struct drm_connector *connector;
188 uint32_t val, ram_amount, hpd_en[2]; 199 uint32_t val, ram_amount;
189 uint64_t start; 200 uint64_t start;
190 int ret, i; 201 int ret, i;
191 202
@@ -366,26 +377,13 @@ nv50_display_init(struct drm_device *dev)
366 NV50_PDISPLAY_INTR_EN_CLK_UNK40)); 377 NV50_PDISPLAY_INTR_EN_CLK_UNK40));
367 378
368 /* enable hotplug interrupts */ 379 /* enable hotplug interrupts */
369 hpd_en[0] = hpd_en[1] = 0;
370 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 380 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
371 struct nouveau_connector *conn = nouveau_connector(connector); 381 struct nouveau_connector *conn = nouveau_connector(connector);
372 struct dcb_gpio_entry *gpio;
373 382
374 if (conn->dcb->gpio_tag == 0xff) 383 if (conn->dcb->gpio_tag == 0xff)
375 continue; 384 continue;
376 385
377 gpio = nouveau_bios_gpio_entry(dev, conn->dcb->gpio_tag); 386 pgpio->irq_enable(dev, conn->dcb->gpio_tag, true);
378 if (!gpio)
379 continue;
380
381 hpd_en[gpio->line >> 4] |= (0x00010001 << (gpio->line & 0xf));
382 }
383
384 nv_wr32(dev, 0xe054, 0xffffffff);
385 nv_wr32(dev, 0xe050, hpd_en[0]);
386 if (dev_priv->chipset >= 0x90) {
387 nv_wr32(dev, 0xe074, 0xffffffff);
388 nv_wr32(dev, 0xe070, hpd_en[1]);
389 } 387 }
390 388
391 return 0; 389 return 0;
@@ -465,6 +463,7 @@ int nv50_display_create(struct drm_device *dev)
465{ 463{
466 struct drm_nouveau_private *dev_priv = dev->dev_private; 464 struct drm_nouveau_private *dev_priv = dev->dev_private;
467 struct dcb_table *dcb = &dev_priv->vbios.dcb; 465 struct dcb_table *dcb = &dev_priv->vbios.dcb;
466 struct drm_connector *connector, *ct;
468 int ret, i; 467 int ret, i;
469 468
470 NV_DEBUG_KMS(dev, "\n"); 469 NV_DEBUG_KMS(dev, "\n");
@@ -507,14 +506,18 @@ int nv50_display_create(struct drm_device *dev)
507 continue; 506 continue;
508 } 507 }
509 508
509 connector = nouveau_connector_create(dev, entry->connector);
510 if (IS_ERR(connector))
511 continue;
512
510 switch (entry->type) { 513 switch (entry->type) {
511 case OUTPUT_TMDS: 514 case OUTPUT_TMDS:
512 case OUTPUT_LVDS: 515 case OUTPUT_LVDS:
513 case OUTPUT_DP: 516 case OUTPUT_DP:
514 nv50_sor_create(dev, entry); 517 nv50_sor_create(connector, entry);
515 break; 518 break;
516 case OUTPUT_ANALOG: 519 case OUTPUT_ANALOG:
517 nv50_dac_create(dev, entry); 520 nv50_dac_create(connector, entry);
518 break; 521 break;
519 default: 522 default:
520 NV_WARN(dev, "DCB encoder %d unknown\n", entry->type); 523 NV_WARN(dev, "DCB encoder %d unknown\n", entry->type);
@@ -522,11 +525,13 @@ int nv50_display_create(struct drm_device *dev)
522 } 525 }
523 } 526 }
524 527
525 for (i = 0 ; i < dcb->connector.entries; i++) { 528 list_for_each_entry_safe(connector, ct,
526 if (i != 0 && dcb->connector.entry[i].index2 == 529 &dev->mode_config.connector_list, head) {
527 dcb->connector.entry[i - 1].index2) 530 if (!connector->encoder_ids[0]) {
528 continue; 531 NV_WARN(dev, "%s has no encoders, removing\n",
529 nouveau_connector_create(dev, &dcb->connector.entry[i]); 532 drm_get_connector_name(connector));
533 connector->funcs->destroy(connector);
534 }
530 } 535 }
531 536
532 ret = nv50_display_init(dev); 537 ret = nv50_display_init(dev);
@@ -538,7 +543,8 @@ int nv50_display_create(struct drm_device *dev)
538 return 0; 543 return 0;
539} 544}
540 545
541int nv50_display_destroy(struct drm_device *dev) 546void
547nv50_display_destroy(struct drm_device *dev)
542{ 548{
543 struct drm_nouveau_private *dev_priv = dev->dev_private; 549 struct drm_nouveau_private *dev_priv = dev->dev_private;
544 550
@@ -548,135 +554,30 @@ int nv50_display_destroy(struct drm_device *dev)
548 554
549 nv50_display_disable(dev); 555 nv50_display_disable(dev);
550 nv50_evo_channel_del(&dev_priv->evo); 556 nv50_evo_channel_del(&dev_priv->evo);
551
552 return 0;
553}
554
555static inline uint32_t
556nv50_display_mode_ctrl(struct drm_device *dev, bool sor, int or)
557{
558 struct drm_nouveau_private *dev_priv = dev->dev_private;
559 uint32_t mc;
560
561 if (sor) {
562 if (dev_priv->chipset < 0x90 ||
563 dev_priv->chipset == 0x92 || dev_priv->chipset == 0xa0)
564 mc = nv_rd32(dev, NV50_PDISPLAY_SOR_MODE_CTRL_P(or));
565 else
566 mc = nv_rd32(dev, NV90_PDISPLAY_SOR_MODE_CTRL_P(or));
567 } else {
568 mc = nv_rd32(dev, NV50_PDISPLAY_DAC_MODE_CTRL_P(or));
569 }
570
571 return mc;
572}
573
574static int
575nv50_display_irq_head(struct drm_device *dev, int *phead,
576 struct dcb_entry **pdcbent)
577{
578 struct drm_nouveau_private *dev_priv = dev->dev_private;
579 uint32_t unk30 = nv_rd32(dev, NV50_PDISPLAY_UNK30_CTRL);
580 uint32_t dac = 0, sor = 0;
581 int head, i, or = 0, type = OUTPUT_ANY;
582
583 /* We're assuming that head 0 *or* head 1 will be active here,
584 * and not both. I'm not sure if the hw will even signal both
585 * ever, but it definitely shouldn't for us as we commit each
586 * CRTC separately, and submission will be blocked by the GPU
587 * until we handle each in turn.
588 */
589 NV_DEBUG_KMS(dev, "0x610030: 0x%08x\n", unk30);
590 head = ffs((unk30 >> 9) & 3) - 1;
591 if (head < 0)
592 return -EINVAL;
593
594 /* This assumes CRTCs are never bound to multiple encoders, which
595 * should be the case.
596 */
597 for (i = 0; i < 3 && type == OUTPUT_ANY; i++) {
598 uint32_t mc = nv50_display_mode_ctrl(dev, false, i);
599 if (!(mc & (1 << head)))
600 continue;
601
602 switch ((mc >> 8) & 0xf) {
603 case 0: type = OUTPUT_ANALOG; break;
604 case 1: type = OUTPUT_TV; break;
605 default:
606 NV_ERROR(dev, "unknown dac mode_ctrl: 0x%08x\n", dac);
607 return -1;
608 }
609
610 or = i;
611 }
612
613 for (i = 0; i < 4 && type == OUTPUT_ANY; i++) {
614 uint32_t mc = nv50_display_mode_ctrl(dev, true, i);
615 if (!(mc & (1 << head)))
616 continue;
617
618 switch ((mc >> 8) & 0xf) {
619 case 0: type = OUTPUT_LVDS; break;
620 case 1: type = OUTPUT_TMDS; break;
621 case 2: type = OUTPUT_TMDS; break;
622 case 5: type = OUTPUT_TMDS; break;
623 case 8: type = OUTPUT_DP; break;
624 case 9: type = OUTPUT_DP; break;
625 default:
626 NV_ERROR(dev, "unknown sor mode_ctrl: 0x%08x\n", sor);
627 return -1;
628 }
629
630 or = i;
631 }
632
633 NV_DEBUG_KMS(dev, "type %d, or %d\n", type, or);
634 if (type == OUTPUT_ANY) {
635 NV_ERROR(dev, "unknown encoder!!\n");
636 return -1;
637 }
638
639 for (i = 0; i < dev_priv->vbios.dcb.entries; i++) {
640 struct dcb_entry *dcbent = &dev_priv->vbios.dcb.entry[i];
641
642 if (dcbent->type != type)
643 continue;
644
645 if (!(dcbent->or & (1 << or)))
646 continue;
647
648 *phead = head;
649 *pdcbent = dcbent;
650 return 0;
651 }
652
653 NV_ERROR(dev, "no DCB entry for %d %d\n", dac != 0, or);
654 return 0;
655} 557}
656 558
657static uint32_t 559static u16
658nv50_display_script_select(struct drm_device *dev, struct dcb_entry *dcbent, 560nv50_display_script_select(struct drm_device *dev, struct dcb_entry *dcb,
659 int pxclk) 561 u32 mc, int pxclk)
660{ 562{
661 struct drm_nouveau_private *dev_priv = dev->dev_private; 563 struct drm_nouveau_private *dev_priv = dev->dev_private;
662 struct nouveau_connector *nv_connector = NULL; 564 struct nouveau_connector *nv_connector = NULL;
663 struct drm_encoder *encoder; 565 struct drm_encoder *encoder;
664 struct nvbios *bios = &dev_priv->vbios; 566 struct nvbios *bios = &dev_priv->vbios;
665 uint32_t mc, script = 0, or; 567 u32 script = 0, or;
666 568
667 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 569 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
668 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 570 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
669 571
670 if (nv_encoder->dcb != dcbent) 572 if (nv_encoder->dcb != dcb)
671 continue; 573 continue;
672 574
673 nv_connector = nouveau_encoder_connector_get(nv_encoder); 575 nv_connector = nouveau_encoder_connector_get(nv_encoder);
674 break; 576 break;
675 } 577 }
676 578
677 or = ffs(dcbent->or) - 1; 579 or = ffs(dcb->or) - 1;
678 mc = nv50_display_mode_ctrl(dev, dcbent->type != OUTPUT_ANALOG, or); 580 switch (dcb->type) {
679 switch (dcbent->type) {
680 case OUTPUT_LVDS: 581 case OUTPUT_LVDS:
681 script = (mc >> 8) & 0xf; 582 script = (mc >> 8) & 0xf;
682 if (bios->fp_no_ddc) { 583 if (bios->fp_no_ddc) {
@@ -767,17 +668,88 @@ nv50_display_vblank_handler(struct drm_device *dev, uint32_t intr)
767static void 668static void
768nv50_display_unk10_handler(struct drm_device *dev) 669nv50_display_unk10_handler(struct drm_device *dev)
769{ 670{
770 struct dcb_entry *dcbent; 671 struct drm_nouveau_private *dev_priv = dev->dev_private;
771 int head, ret; 672 u32 unk30 = nv_rd32(dev, 0x610030), mc;
673 int i, crtc, or, type = OUTPUT_ANY;
772 674
773 ret = nv50_display_irq_head(dev, &head, &dcbent); 675 NV_DEBUG_KMS(dev, "0x610030: 0x%08x\n", unk30);
774 if (ret) 676 dev_priv->evo_irq.dcb = NULL;
775 goto ack;
776 677
777 nv_wr32(dev, 0x619494, nv_rd32(dev, 0x619494) & ~8); 678 nv_wr32(dev, 0x619494, nv_rd32(dev, 0x619494) & ~8);
778 679
779 nouveau_bios_run_display_table(dev, dcbent, 0, -1); 680 /* Determine which CRTC we're dealing with, only 1 ever will be
681 * signalled at the same time with the current nouveau code.
682 */
683 crtc = ffs((unk30 & 0x00000060) >> 5) - 1;
684 if (crtc < 0)
685 goto ack;
686
687 /* Nothing needs to be done for the encoder */
688 crtc = ffs((unk30 & 0x00000180) >> 7) - 1;
689 if (crtc < 0)
690 goto ack;
780 691
692 /* Find which encoder was connected to the CRTC */
693 for (i = 0; type == OUTPUT_ANY && i < 3; i++) {
694 mc = nv_rd32(dev, NV50_PDISPLAY_DAC_MODE_CTRL_C(i));
695 NV_DEBUG_KMS(dev, "DAC-%d mc: 0x%08x\n", i, mc);
696 if (!(mc & (1 << crtc)))
697 continue;
698
699 switch ((mc & 0x00000f00) >> 8) {
700 case 0: type = OUTPUT_ANALOG; break;
701 case 1: type = OUTPUT_TV; break;
702 default:
703 NV_ERROR(dev, "invalid mc, DAC-%d: 0x%08x\n", i, mc);
704 goto ack;
705 }
706
707 or = i;
708 }
709
710 for (i = 0; type == OUTPUT_ANY && i < 4; i++) {
711 if (dev_priv->chipset < 0x90 ||
712 dev_priv->chipset == 0x92 ||
713 dev_priv->chipset == 0xa0)
714 mc = nv_rd32(dev, NV50_PDISPLAY_SOR_MODE_CTRL_C(i));
715 else
716 mc = nv_rd32(dev, NV90_PDISPLAY_SOR_MODE_CTRL_C(i));
717
718 NV_DEBUG_KMS(dev, "SOR-%d mc: 0x%08x\n", i, mc);
719 if (!(mc & (1 << crtc)))
720 continue;
721
722 switch ((mc & 0x00000f00) >> 8) {
723 case 0: type = OUTPUT_LVDS; break;
724 case 1: type = OUTPUT_TMDS; break;
725 case 2: type = OUTPUT_TMDS; break;
726 case 5: type = OUTPUT_TMDS; break;
727 case 8: type = OUTPUT_DP; break;
728 case 9: type = OUTPUT_DP; break;
729 default:
730 NV_ERROR(dev, "invalid mc, SOR-%d: 0x%08x\n", i, mc);
731 goto ack;
732 }
733
734 or = i;
735 }
736
737 /* There was no encoder to disable */
738 if (type == OUTPUT_ANY)
739 goto ack;
740
741 /* Disable the encoder */
742 for (i = 0; i < dev_priv->vbios.dcb.entries; i++) {
743 struct dcb_entry *dcb = &dev_priv->vbios.dcb.entry[i];
744
745 if (dcb->type == type && (dcb->or & (1 << or))) {
746 nouveau_bios_run_display_table(dev, dcb, 0, -1);
747 dev_priv->evo_irq.dcb = dcb;
748 goto ack;
749 }
750 }
751
752 NV_ERROR(dev, "no dcb for %d %d 0x%08x\n", or, type, mc);
781ack: 753ack:
782 nv_wr32(dev, NV50_PDISPLAY_INTR_1, NV50_PDISPLAY_INTR_1_CLK_UNK10); 754 nv_wr32(dev, NV50_PDISPLAY_INTR_1, NV50_PDISPLAY_INTR_1_CLK_UNK10);
783 nv_wr32(dev, 0x610030, 0x80000000); 755 nv_wr32(dev, 0x610030, 0x80000000);
@@ -817,33 +789,103 @@ nv50_display_unk20_dp_hack(struct drm_device *dev, struct dcb_entry *dcb)
817static void 789static void
818nv50_display_unk20_handler(struct drm_device *dev) 790nv50_display_unk20_handler(struct drm_device *dev)
819{ 791{
820 struct dcb_entry *dcbent; 792 struct drm_nouveau_private *dev_priv = dev->dev_private;
821 uint32_t tmp, pclk, script; 793 u32 unk30 = nv_rd32(dev, 0x610030), tmp, pclk, script, mc;
822 int head, or, ret; 794 struct dcb_entry *dcb;
795 int i, crtc, or, type = OUTPUT_ANY;
823 796
824 ret = nv50_display_irq_head(dev, &head, &dcbent); 797 NV_DEBUG_KMS(dev, "0x610030: 0x%08x\n", unk30);
825 if (ret) 798 dcb = dev_priv->evo_irq.dcb;
799 if (dcb) {
800 nouveau_bios_run_display_table(dev, dcb, 0, -2);
801 dev_priv->evo_irq.dcb = NULL;
802 }
803
804 /* CRTC clock change requested? */
805 crtc = ffs((unk30 & 0x00000600) >> 9) - 1;
806 if (crtc >= 0) {
807 pclk = nv_rd32(dev, NV50_PDISPLAY_CRTC_P(crtc, CLOCK));
808 pclk &= 0x003fffff;
809
810 nv50_crtc_set_clock(dev, crtc, pclk);
811
812 tmp = nv_rd32(dev, NV50_PDISPLAY_CRTC_CLK_CTRL2(crtc));
813 tmp &= ~0x000000f;
814 nv_wr32(dev, NV50_PDISPLAY_CRTC_CLK_CTRL2(crtc), tmp);
815 }
816
817 /* Nothing needs to be done for the encoder */
818 crtc = ffs((unk30 & 0x00000180) >> 7) - 1;
819 if (crtc < 0)
826 goto ack; 820 goto ack;
827 or = ffs(dcbent->or) - 1; 821 pclk = nv_rd32(dev, NV50_PDISPLAY_CRTC_P(crtc, CLOCK)) & 0x003fffff;
828 pclk = nv_rd32(dev, NV50_PDISPLAY_CRTC_P(head, CLOCK)) & 0x3fffff;
829 script = nv50_display_script_select(dev, dcbent, pclk);
830 822
831 NV_DEBUG_KMS(dev, "head %d pxclk: %dKHz\n", head, pclk); 823 /* Find which encoder is connected to the CRTC */
824 for (i = 0; type == OUTPUT_ANY && i < 3; i++) {
825 mc = nv_rd32(dev, NV50_PDISPLAY_DAC_MODE_CTRL_P(i));
826 NV_DEBUG_KMS(dev, "DAC-%d mc: 0x%08x\n", i, mc);
827 if (!(mc & (1 << crtc)))
828 continue;
832 829
833 if (dcbent->type != OUTPUT_DP) 830 switch ((mc & 0x00000f00) >> 8) {
834 nouveau_bios_run_display_table(dev, dcbent, 0, -2); 831 case 0: type = OUTPUT_ANALOG; break;
832 case 1: type = OUTPUT_TV; break;
833 default:
834 NV_ERROR(dev, "invalid mc, DAC-%d: 0x%08x\n", i, mc);
835 goto ack;
836 }
835 837
836 nv50_crtc_set_clock(dev, head, pclk); 838 or = i;
839 }
837 840
838 nouveau_bios_run_display_table(dev, dcbent, script, pclk); 841 for (i = 0; type == OUTPUT_ANY && i < 4; i++) {
842 if (dev_priv->chipset < 0x90 ||
843 dev_priv->chipset == 0x92 ||
844 dev_priv->chipset == 0xa0)
845 mc = nv_rd32(dev, NV50_PDISPLAY_SOR_MODE_CTRL_P(i));
846 else
847 mc = nv_rd32(dev, NV90_PDISPLAY_SOR_MODE_CTRL_P(i));
839 848
840 nv50_display_unk20_dp_hack(dev, dcbent); 849 NV_DEBUG_KMS(dev, "SOR-%d mc: 0x%08x\n", i, mc);
850 if (!(mc & (1 << crtc)))
851 continue;
852
853 switch ((mc & 0x00000f00) >> 8) {
854 case 0: type = OUTPUT_LVDS; break;
855 case 1: type = OUTPUT_TMDS; break;
856 case 2: type = OUTPUT_TMDS; break;
857 case 5: type = OUTPUT_TMDS; break;
858 case 8: type = OUTPUT_DP; break;
859 case 9: type = OUTPUT_DP; break;
860 default:
861 NV_ERROR(dev, "invalid mc, SOR-%d: 0x%08x\n", i, mc);
862 goto ack;
863 }
864
865 or = i;
866 }
867
868 if (type == OUTPUT_ANY)
869 goto ack;
870
871 /* Enable the encoder */
872 for (i = 0; i < dev_priv->vbios.dcb.entries; i++) {
873 dcb = &dev_priv->vbios.dcb.entry[i];
874 if (dcb->type == type && (dcb->or & (1 << or)))
875 break;
876 }
877
878 if (i == dev_priv->vbios.dcb.entries) {
879 NV_ERROR(dev, "no dcb for %d %d 0x%08x\n", or, type, mc);
880 goto ack;
881 }
841 882
842 tmp = nv_rd32(dev, NV50_PDISPLAY_CRTC_CLK_CTRL2(head)); 883 script = nv50_display_script_select(dev, dcb, mc, pclk);
843 tmp &= ~0x000000f; 884 nouveau_bios_run_display_table(dev, dcb, script, pclk);
844 nv_wr32(dev, NV50_PDISPLAY_CRTC_CLK_CTRL2(head), tmp);
845 885
846 if (dcbent->type != OUTPUT_ANALOG) { 886 nv50_display_unk20_dp_hack(dev, dcb);
887
888 if (dcb->type != OUTPUT_ANALOG) {
847 tmp = nv_rd32(dev, NV50_PDISPLAY_SOR_CLK_CTRL2(or)); 889 tmp = nv_rd32(dev, NV50_PDISPLAY_SOR_CLK_CTRL2(or));
848 tmp &= ~0x00000f0f; 890 tmp &= ~0x00000f0f;
849 if (script & 0x0100) 891 if (script & 0x0100)
@@ -853,24 +895,61 @@ nv50_display_unk20_handler(struct drm_device *dev)
853 nv_wr32(dev, NV50_PDISPLAY_DAC_CLK_CTRL2(or), 0); 895 nv_wr32(dev, NV50_PDISPLAY_DAC_CLK_CTRL2(or), 0);
854 } 896 }
855 897
898 dev_priv->evo_irq.dcb = dcb;
899 dev_priv->evo_irq.pclk = pclk;
900 dev_priv->evo_irq.script = script;
901
856ack: 902ack:
857 nv_wr32(dev, NV50_PDISPLAY_INTR_1, NV50_PDISPLAY_INTR_1_CLK_UNK20); 903 nv_wr32(dev, NV50_PDISPLAY_INTR_1, NV50_PDISPLAY_INTR_1_CLK_UNK20);
858 nv_wr32(dev, 0x610030, 0x80000000); 904 nv_wr32(dev, 0x610030, 0x80000000);
859} 905}
860 906
907/* If programming a TMDS output on a SOR that can also be configured for
908 * DisplayPort, make sure NV50_SOR_DP_CTRL_ENABLE is forced off.
909 *
910 * It looks like the VBIOS TMDS scripts make an attempt at this, however,
911 * the VBIOS scripts on at least one board I have only switch it off on
912 * link 0, causing a blank display if the output has previously been
913 * programmed for DisplayPort.
914 */
915static void
916nv50_display_unk40_dp_set_tmds(struct drm_device *dev, struct dcb_entry *dcb)
917{
918 int or = ffs(dcb->or) - 1, link = !(dcb->dpconf.sor.link & 1);
919 struct drm_encoder *encoder;
920 u32 tmp;
921
922 if (dcb->type != OUTPUT_TMDS)
923 return;
924
925 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
926 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
927
928 if (nv_encoder->dcb->type == OUTPUT_DP &&
929 nv_encoder->dcb->or & (1 << or)) {
930 tmp = nv_rd32(dev, NV50_SOR_DP_CTRL(or, link));
931 tmp &= ~NV50_SOR_DP_CTRL_ENABLED;
932 nv_wr32(dev, NV50_SOR_DP_CTRL(or, link), tmp);
933 break;
934 }
935 }
936}
937
861static void 938static void
862nv50_display_unk40_handler(struct drm_device *dev) 939nv50_display_unk40_handler(struct drm_device *dev)
863{ 940{
864 struct dcb_entry *dcbent; 941 struct drm_nouveau_private *dev_priv = dev->dev_private;
865 int head, pclk, script, ret; 942 struct dcb_entry *dcb = dev_priv->evo_irq.dcb;
943 u16 script = dev_priv->evo_irq.script;
944 u32 unk30 = nv_rd32(dev, 0x610030), pclk = dev_priv->evo_irq.pclk;
866 945
867 ret = nv50_display_irq_head(dev, &head, &dcbent); 946 NV_DEBUG_KMS(dev, "0x610030: 0x%08x\n", unk30);
868 if (ret) 947 dev_priv->evo_irq.dcb = NULL;
948 if (!dcb)
869 goto ack; 949 goto ack;
870 pclk = nv_rd32(dev, NV50_PDISPLAY_CRTC_P(head, CLOCK)) & 0x3fffff;
871 script = nv50_display_script_select(dev, dcbent, pclk);
872 950
873 nouveau_bios_run_display_table(dev, dcbent, script, -pclk); 951 nouveau_bios_run_display_table(dev, dcb, script, -pclk);
952 nv50_display_unk40_dp_set_tmds(dev, dcb);
874 953
875ack: 954ack:
876 nv_wr32(dev, NV50_PDISPLAY_INTR_1, NV50_PDISPLAY_INTR_1_CLK_UNK40); 955 nv_wr32(dev, NV50_PDISPLAY_INTR_1, NV50_PDISPLAY_INTR_1_CLK_UNK40);
diff --git a/drivers/gpu/drm/nouveau/nv50_display.h b/drivers/gpu/drm/nouveau/nv50_display.h
index 581d405ac014..c551f0b85ee0 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.h
+++ b/drivers/gpu/drm/nouveau/nv50_display.h
@@ -38,9 +38,11 @@
38void nv50_display_irq_handler(struct drm_device *dev); 38void nv50_display_irq_handler(struct drm_device *dev);
39void nv50_display_irq_handler_bh(struct work_struct *work); 39void nv50_display_irq_handler_bh(struct work_struct *work);
40void nv50_display_irq_hotplug_bh(struct work_struct *work); 40void nv50_display_irq_hotplug_bh(struct work_struct *work);
41int nv50_display_init(struct drm_device *dev); 41int nv50_display_early_init(struct drm_device *dev);
42void nv50_display_late_takedown(struct drm_device *dev);
42int nv50_display_create(struct drm_device *dev); 43int nv50_display_create(struct drm_device *dev);
43int nv50_display_destroy(struct drm_device *dev); 44int nv50_display_init(struct drm_device *dev);
45void nv50_display_destroy(struct drm_device *dev);
44int nv50_crtc_blank(struct nouveau_crtc *, bool blank); 46int nv50_crtc_blank(struct nouveau_crtc *, bool blank);
45int nv50_crtc_set_clock(struct drm_device *, int head, int pclk); 47int nv50_crtc_set_clock(struct drm_device *, int head, int pclk);
46 48
diff --git a/drivers/gpu/drm/nouveau/nv50_fifo.c b/drivers/gpu/drm/nouveau/nv50_fifo.c
index e20c0e2474f3..fb0281ae8f90 100644
--- a/drivers/gpu/drm/nouveau/nv50_fifo.c
+++ b/drivers/gpu/drm/nouveau/nv50_fifo.c
@@ -28,41 +28,33 @@
28#include "drm.h" 28#include "drm.h"
29#include "nouveau_drv.h" 29#include "nouveau_drv.h"
30 30
31struct nv50_fifo_priv {
32 struct nouveau_gpuobj_ref *thingo[2];
33 int cur_thingo;
34};
35
36#define IS_G80 ((dev_priv->chipset & 0xf0) == 0x50)
37
38static void 31static void
39nv50_fifo_init_thingo(struct drm_device *dev) 32nv50_fifo_playlist_update(struct drm_device *dev)
40{ 33{
41 struct drm_nouveau_private *dev_priv = dev->dev_private; 34 struct drm_nouveau_private *dev_priv = dev->dev_private;
42 struct nv50_fifo_priv *priv = dev_priv->engine.fifo.priv; 35 struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
43 struct nouveau_gpuobj_ref *cur; 36 struct nouveau_gpuobj_ref *cur;
44 int i, nr; 37 int i, nr;
45 38
46 NV_DEBUG(dev, "\n"); 39 NV_DEBUG(dev, "\n");
47 40
48 cur = priv->thingo[priv->cur_thingo]; 41 cur = pfifo->playlist[pfifo->cur_playlist];
49 priv->cur_thingo = !priv->cur_thingo; 42 pfifo->cur_playlist = !pfifo->cur_playlist;
50 43
51 /* We never schedule channel 0 or 127 */ 44 /* We never schedule channel 0 or 127 */
52 dev_priv->engine.instmem.prepare_access(dev, true);
53 for (i = 1, nr = 0; i < 127; i++) { 45 for (i = 1, nr = 0; i < 127; i++) {
54 if (dev_priv->fifos[i] && dev_priv->fifos[i]->ramfc) 46 if (dev_priv->fifos[i] && dev_priv->fifos[i]->ramfc)
55 nv_wo32(dev, cur->gpuobj, nr++, i); 47 nv_wo32(dev, cur->gpuobj, nr++, i);
56 } 48 }
57 dev_priv->engine.instmem.finish_access(dev); 49 dev_priv->engine.instmem.flush(dev);
58 50
59 nv_wr32(dev, 0x32f4, cur->instance >> 12); 51 nv_wr32(dev, 0x32f4, cur->instance >> 12);
60 nv_wr32(dev, 0x32ec, nr); 52 nv_wr32(dev, 0x32ec, nr);
61 nv_wr32(dev, 0x2500, 0x101); 53 nv_wr32(dev, 0x2500, 0x101);
62} 54}
63 55
64static int 56static void
65nv50_fifo_channel_enable(struct drm_device *dev, int channel, bool nt) 57nv50_fifo_channel_enable(struct drm_device *dev, int channel)
66{ 58{
67 struct drm_nouveau_private *dev_priv = dev->dev_private; 59 struct drm_nouveau_private *dev_priv = dev->dev_private;
68 struct nouveau_channel *chan = dev_priv->fifos[channel]; 60 struct nouveau_channel *chan = dev_priv->fifos[channel];
@@ -70,37 +62,28 @@ nv50_fifo_channel_enable(struct drm_device *dev, int channel, bool nt)
70 62
71 NV_DEBUG(dev, "ch%d\n", channel); 63 NV_DEBUG(dev, "ch%d\n", channel);
72 64
73 if (!chan->ramfc) 65 if (dev_priv->chipset == 0x50)
74 return -EINVAL;
75
76 if (IS_G80)
77 inst = chan->ramfc->instance >> 12; 66 inst = chan->ramfc->instance >> 12;
78 else 67 else
79 inst = chan->ramfc->instance >> 8; 68 inst = chan->ramfc->instance >> 8;
80 nv_wr32(dev, NV50_PFIFO_CTX_TABLE(channel),
81 inst | NV50_PFIFO_CTX_TABLE_CHANNEL_ENABLED);
82 69
83 if (!nt) 70 nv_wr32(dev, NV50_PFIFO_CTX_TABLE(channel), inst |
84 nv50_fifo_init_thingo(dev); 71 NV50_PFIFO_CTX_TABLE_CHANNEL_ENABLED);
85 return 0;
86} 72}
87 73
88static void 74static void
89nv50_fifo_channel_disable(struct drm_device *dev, int channel, bool nt) 75nv50_fifo_channel_disable(struct drm_device *dev, int channel)
90{ 76{
91 struct drm_nouveau_private *dev_priv = dev->dev_private; 77 struct drm_nouveau_private *dev_priv = dev->dev_private;
92 uint32_t inst; 78 uint32_t inst;
93 79
94 NV_DEBUG(dev, "ch%d, nt=%d\n", channel, nt); 80 NV_DEBUG(dev, "ch%d\n", channel);
95 81
96 if (IS_G80) 82 if (dev_priv->chipset == 0x50)
97 inst = NV50_PFIFO_CTX_TABLE_INSTANCE_MASK_G80; 83 inst = NV50_PFIFO_CTX_TABLE_INSTANCE_MASK_G80;
98 else 84 else
99 inst = NV50_PFIFO_CTX_TABLE_INSTANCE_MASK_G84; 85 inst = NV50_PFIFO_CTX_TABLE_INSTANCE_MASK_G84;
100 nv_wr32(dev, NV50_PFIFO_CTX_TABLE(channel), inst); 86 nv_wr32(dev, NV50_PFIFO_CTX_TABLE(channel), inst);
101
102 if (!nt)
103 nv50_fifo_init_thingo(dev);
104} 87}
105 88
106static void 89static void
@@ -133,12 +116,12 @@ nv50_fifo_init_context_table(struct drm_device *dev)
133 116
134 for (i = 0; i < NV50_PFIFO_CTX_TABLE__SIZE; i++) { 117 for (i = 0; i < NV50_PFIFO_CTX_TABLE__SIZE; i++) {
135 if (dev_priv->fifos[i]) 118 if (dev_priv->fifos[i])
136 nv50_fifo_channel_enable(dev, i, true); 119 nv50_fifo_channel_enable(dev, i);
137 else 120 else
138 nv50_fifo_channel_disable(dev, i, true); 121 nv50_fifo_channel_disable(dev, i);
139 } 122 }
140 123
141 nv50_fifo_init_thingo(dev); 124 nv50_fifo_playlist_update(dev);
142} 125}
143 126
144static void 127static void
@@ -162,41 +145,38 @@ nv50_fifo_init_regs(struct drm_device *dev)
162 nv_wr32(dev, 0x3270, 0); 145 nv_wr32(dev, 0x3270, 0);
163 146
164 /* Enable dummy channels setup by nv50_instmem.c */ 147 /* Enable dummy channels setup by nv50_instmem.c */
165 nv50_fifo_channel_enable(dev, 0, true); 148 nv50_fifo_channel_enable(dev, 0);
166 nv50_fifo_channel_enable(dev, 127, true); 149 nv50_fifo_channel_enable(dev, 127);
167} 150}
168 151
169int 152int
170nv50_fifo_init(struct drm_device *dev) 153nv50_fifo_init(struct drm_device *dev)
171{ 154{
172 struct drm_nouveau_private *dev_priv = dev->dev_private; 155 struct drm_nouveau_private *dev_priv = dev->dev_private;
173 struct nv50_fifo_priv *priv; 156 struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
174 int ret; 157 int ret;
175 158
176 NV_DEBUG(dev, "\n"); 159 NV_DEBUG(dev, "\n");
177 160
178 priv = dev_priv->engine.fifo.priv; 161 if (pfifo->playlist[0]) {
179 if (priv) { 162 pfifo->cur_playlist = !pfifo->cur_playlist;
180 priv->cur_thingo = !priv->cur_thingo;
181 goto just_reset; 163 goto just_reset;
182 } 164 }
183 165
184 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
185 if (!priv)
186 return -ENOMEM;
187 dev_priv->engine.fifo.priv = priv;
188
189 ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, 128*4, 0x1000, 166 ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, 128*4, 0x1000,
190 NVOBJ_FLAG_ZERO_ALLOC, &priv->thingo[0]); 167 NVOBJ_FLAG_ZERO_ALLOC,
168 &pfifo->playlist[0]);
191 if (ret) { 169 if (ret) {
192 NV_ERROR(dev, "error creating thingo0: %d\n", ret); 170 NV_ERROR(dev, "error creating playlist 0: %d\n", ret);
193 return ret; 171 return ret;
194 } 172 }
195 173
196 ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, 128*4, 0x1000, 174 ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, 128*4, 0x1000,
197 NVOBJ_FLAG_ZERO_ALLOC, &priv->thingo[1]); 175 NVOBJ_FLAG_ZERO_ALLOC,
176 &pfifo->playlist[1]);
198 if (ret) { 177 if (ret) {
199 NV_ERROR(dev, "error creating thingo1: %d\n", ret); 178 nouveau_gpuobj_ref_del(dev, &pfifo->playlist[0]);
179 NV_ERROR(dev, "error creating playlist 1: %d\n", ret);
200 return ret; 180 return ret;
201 } 181 }
202 182
@@ -216,18 +196,15 @@ void
216nv50_fifo_takedown(struct drm_device *dev) 196nv50_fifo_takedown(struct drm_device *dev)
217{ 197{
218 struct drm_nouveau_private *dev_priv = dev->dev_private; 198 struct drm_nouveau_private *dev_priv = dev->dev_private;
219 struct nv50_fifo_priv *priv = dev_priv->engine.fifo.priv; 199 struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
220 200
221 NV_DEBUG(dev, "\n"); 201 NV_DEBUG(dev, "\n");
222 202
223 if (!priv) 203 if (!pfifo->playlist[0])
224 return; 204 return;
225 205
226 nouveau_gpuobj_ref_del(dev, &priv->thingo[0]); 206 nouveau_gpuobj_ref_del(dev, &pfifo->playlist[0]);
227 nouveau_gpuobj_ref_del(dev, &priv->thingo[1]); 207 nouveau_gpuobj_ref_del(dev, &pfifo->playlist[1]);
228
229 dev_priv->engine.fifo.priv = NULL;
230 kfree(priv);
231} 208}
232 209
233int 210int
@@ -248,7 +225,7 @@ nv50_fifo_create_context(struct nouveau_channel *chan)
248 225
249 NV_DEBUG(dev, "ch%d\n", chan->id); 226 NV_DEBUG(dev, "ch%d\n", chan->id);
250 227
251 if (IS_G80) { 228 if (dev_priv->chipset == 0x50) {
252 uint32_t ramin_poffset = chan->ramin->gpuobj->im_pramin->start; 229 uint32_t ramin_poffset = chan->ramin->gpuobj->im_pramin->start;
253 uint32_t ramin_voffset = chan->ramin->gpuobj->im_backing_start; 230 uint32_t ramin_voffset = chan->ramin->gpuobj->im_backing_start;
254 231
@@ -281,10 +258,10 @@ nv50_fifo_create_context(struct nouveau_channel *chan)
281 258
282 spin_lock_irqsave(&dev_priv->context_switch_lock, flags); 259 spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
283 260
284 dev_priv->engine.instmem.prepare_access(dev, true);
285
286 nv_wo32(dev, ramfc, 0x48/4, chan->pushbuf->instance >> 4); 261 nv_wo32(dev, ramfc, 0x48/4, chan->pushbuf->instance >> 4);
287 nv_wo32(dev, ramfc, 0x80/4, (0xc << 24) | (chan->ramht->instance >> 4)); 262 nv_wo32(dev, ramfc, 0x80/4, (0 << 27) /* 4KiB */ |
263 (4 << 24) /* SEARCH_FULL */ |
264 (chan->ramht->instance >> 4));
288 nv_wo32(dev, ramfc, 0x44/4, 0x2101ffff); 265 nv_wo32(dev, ramfc, 0x44/4, 0x2101ffff);
289 nv_wo32(dev, ramfc, 0x60/4, 0x7fffffff); 266 nv_wo32(dev, ramfc, 0x60/4, 0x7fffffff);
290 nv_wo32(dev, ramfc, 0x40/4, 0x00000000); 267 nv_wo32(dev, ramfc, 0x40/4, 0x00000000);
@@ -295,7 +272,7 @@ nv50_fifo_create_context(struct nouveau_channel *chan)
295 chan->dma.ib_base * 4); 272 chan->dma.ib_base * 4);
296 nv_wo32(dev, ramfc, 0x54/4, drm_order(chan->dma.ib_max + 1) << 16); 273 nv_wo32(dev, ramfc, 0x54/4, drm_order(chan->dma.ib_max + 1) << 16);
297 274
298 if (!IS_G80) { 275 if (dev_priv->chipset != 0x50) {
299 nv_wo32(dev, chan->ramin->gpuobj, 0, chan->id); 276 nv_wo32(dev, chan->ramin->gpuobj, 0, chan->id);
300 nv_wo32(dev, chan->ramin->gpuobj, 1, 277 nv_wo32(dev, chan->ramin->gpuobj, 1,
301 chan->ramfc->instance >> 8); 278 chan->ramfc->instance >> 8);
@@ -304,16 +281,10 @@ nv50_fifo_create_context(struct nouveau_channel *chan)
304 nv_wo32(dev, ramfc, 0x98/4, chan->ramin->instance >> 12); 281 nv_wo32(dev, ramfc, 0x98/4, chan->ramin->instance >> 12);
305 } 282 }
306 283
307 dev_priv->engine.instmem.finish_access(dev); 284 dev_priv->engine.instmem.flush(dev);
308
309 ret = nv50_fifo_channel_enable(dev, chan->id, false);
310 if (ret) {
311 NV_ERROR(dev, "error enabling ch%d: %d\n", chan->id, ret);
312 spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
313 nouveau_gpuobj_ref_del(dev, &chan->ramfc);
314 return ret;
315 }
316 285
286 nv50_fifo_channel_enable(dev, chan->id);
287 nv50_fifo_playlist_update(dev);
317 spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags); 288 spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
318 return 0; 289 return 0;
319} 290}
@@ -328,11 +299,12 @@ nv50_fifo_destroy_context(struct nouveau_channel *chan)
328 299
329 /* This will ensure the channel is seen as disabled. */ 300 /* This will ensure the channel is seen as disabled. */
330 chan->ramfc = NULL; 301 chan->ramfc = NULL;
331 nv50_fifo_channel_disable(dev, chan->id, false); 302 nv50_fifo_channel_disable(dev, chan->id);
332 303
333 /* Dummy channel, also used on ch 127 */ 304 /* Dummy channel, also used on ch 127 */
334 if (chan->id == 0) 305 if (chan->id == 0)
335 nv50_fifo_channel_disable(dev, 127, false); 306 nv50_fifo_channel_disable(dev, 127);
307 nv50_fifo_playlist_update(dev);
336 308
337 nouveau_gpuobj_ref_del(dev, &ramfc); 309 nouveau_gpuobj_ref_del(dev, &ramfc);
338 nouveau_gpuobj_ref_del(dev, &chan->cache); 310 nouveau_gpuobj_ref_del(dev, &chan->cache);
@@ -349,8 +321,6 @@ nv50_fifo_load_context(struct nouveau_channel *chan)
349 321
350 NV_DEBUG(dev, "ch%d\n", chan->id); 322 NV_DEBUG(dev, "ch%d\n", chan->id);
351 323
352 dev_priv->engine.instmem.prepare_access(dev, false);
353
354 nv_wr32(dev, 0x3330, nv_ro32(dev, ramfc, 0x00/4)); 324 nv_wr32(dev, 0x3330, nv_ro32(dev, ramfc, 0x00/4));
355 nv_wr32(dev, 0x3334, nv_ro32(dev, ramfc, 0x04/4)); 325 nv_wr32(dev, 0x3334, nv_ro32(dev, ramfc, 0x04/4));
356 nv_wr32(dev, 0x3240, nv_ro32(dev, ramfc, 0x08/4)); 326 nv_wr32(dev, 0x3240, nv_ro32(dev, ramfc, 0x08/4));
@@ -396,7 +366,7 @@ nv50_fifo_load_context(struct nouveau_channel *chan)
396 nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0); 366 nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);
397 367
398 /* guessing that all the 0x34xx regs aren't on NV50 */ 368 /* guessing that all the 0x34xx regs aren't on NV50 */
399 if (!IS_G80) { 369 if (dev_priv->chipset != 0x50) {
400 nv_wr32(dev, 0x340c, nv_ro32(dev, ramfc, 0x88/4)); 370 nv_wr32(dev, 0x340c, nv_ro32(dev, ramfc, 0x88/4));
401 nv_wr32(dev, 0x3400, nv_ro32(dev, ramfc, 0x8c/4)); 371 nv_wr32(dev, 0x3400, nv_ro32(dev, ramfc, 0x8c/4));
402 nv_wr32(dev, 0x3404, nv_ro32(dev, ramfc, 0x90/4)); 372 nv_wr32(dev, 0x3404, nv_ro32(dev, ramfc, 0x90/4));
@@ -404,8 +374,6 @@ nv50_fifo_load_context(struct nouveau_channel *chan)
404 nv_wr32(dev, 0x3410, nv_ro32(dev, ramfc, 0x98/4)); 374 nv_wr32(dev, 0x3410, nv_ro32(dev, ramfc, 0x98/4));
405 } 375 }
406 376
407 dev_priv->engine.instmem.finish_access(dev);
408
409 nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, chan->id | (1<<16)); 377 nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, chan->id | (1<<16));
410 return 0; 378 return 0;
411} 379}
@@ -434,8 +402,6 @@ nv50_fifo_unload_context(struct drm_device *dev)
434 ramfc = chan->ramfc->gpuobj; 402 ramfc = chan->ramfc->gpuobj;
435 cache = chan->cache->gpuobj; 403 cache = chan->cache->gpuobj;
436 404
437 dev_priv->engine.instmem.prepare_access(dev, true);
438
439 nv_wo32(dev, ramfc, 0x00/4, nv_rd32(dev, 0x3330)); 405 nv_wo32(dev, ramfc, 0x00/4, nv_rd32(dev, 0x3330));
440 nv_wo32(dev, ramfc, 0x04/4, nv_rd32(dev, 0x3334)); 406 nv_wo32(dev, ramfc, 0x04/4, nv_rd32(dev, 0x3334));
441 nv_wo32(dev, ramfc, 0x08/4, nv_rd32(dev, 0x3240)); 407 nv_wo32(dev, ramfc, 0x08/4, nv_rd32(dev, 0x3240));
@@ -482,7 +448,7 @@ nv50_fifo_unload_context(struct drm_device *dev)
482 } 448 }
483 449
484 /* guessing that all the 0x34xx regs aren't on NV50 */ 450 /* guessing that all the 0x34xx regs aren't on NV50 */
485 if (!IS_G80) { 451 if (dev_priv->chipset != 0x50) {
486 nv_wo32(dev, ramfc, 0x84/4, ptr >> 1); 452 nv_wo32(dev, ramfc, 0x84/4, ptr >> 1);
487 nv_wo32(dev, ramfc, 0x88/4, nv_rd32(dev, 0x340c)); 453 nv_wo32(dev, ramfc, 0x88/4, nv_rd32(dev, 0x340c));
488 nv_wo32(dev, ramfc, 0x8c/4, nv_rd32(dev, 0x3400)); 454 nv_wo32(dev, ramfc, 0x8c/4, nv_rd32(dev, 0x3400));
@@ -491,7 +457,7 @@ nv50_fifo_unload_context(struct drm_device *dev)
491 nv_wo32(dev, ramfc, 0x98/4, nv_rd32(dev, 0x3410)); 457 nv_wo32(dev, ramfc, 0x98/4, nv_rd32(dev, 0x3410));
492 } 458 }
493 459
494 dev_priv->engine.instmem.finish_access(dev); 460 dev_priv->engine.instmem.flush(dev);
495 461
496 /*XXX: probably reload ch127 (NULL) state back too */ 462 /*XXX: probably reload ch127 (NULL) state back too */
497 nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, 127); 463 nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, 127);
diff --git a/drivers/gpu/drm/nouveau/nv50_gpio.c b/drivers/gpu/drm/nouveau/nv50_gpio.c
index bb47ad737267..b2fab2bf3d61 100644
--- a/drivers/gpu/drm/nouveau/nv50_gpio.c
+++ b/drivers/gpu/drm/nouveau/nv50_gpio.c
@@ -74,3 +74,38 @@ nv50_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state)
74 nv_wr32(dev, r, v); 74 nv_wr32(dev, r, v);
75 return 0; 75 return 0;
76} 76}
77
78void
79nv50_gpio_irq_enable(struct drm_device *dev, enum dcb_gpio_tag tag, bool on)
80{
81 struct dcb_gpio_entry *gpio;
82 u32 reg, mask;
83
84 gpio = nouveau_bios_gpio_entry(dev, tag);
85 if (!gpio) {
86 NV_ERROR(dev, "gpio tag 0x%02x not found\n", tag);
87 return;
88 }
89
90 reg = gpio->line < 16 ? 0xe050 : 0xe070;
91 mask = 0x00010001 << (gpio->line & 0xf);
92
93 nv_wr32(dev, reg + 4, mask);
94 nv_mask(dev, reg + 0, mask, on ? mask : 0);
95}
96
97int
98nv50_gpio_init(struct drm_device *dev)
99{
100 struct drm_nouveau_private *dev_priv = dev->dev_private;
101
102 /* disable, and ack any pending gpio interrupts */
103 nv_wr32(dev, 0xe050, 0x00000000);
104 nv_wr32(dev, 0xe054, 0xffffffff);
105 if (dev_priv->chipset >= 0x90) {
106 nv_wr32(dev, 0xe070, 0x00000000);
107 nv_wr32(dev, 0xe074, 0xffffffff);
108 }
109
110 return 0;
111}
diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c
index b203d06f601f..1413028e1580 100644
--- a/drivers/gpu/drm/nouveau/nv50_graph.c
+++ b/drivers/gpu/drm/nouveau/nv50_graph.c
@@ -30,8 +30,6 @@
30 30
31#include "nouveau_grctx.h" 31#include "nouveau_grctx.h"
32 32
33#define IS_G80 ((dev_priv->chipset & 0xf0) == 0x50)
34
35static void 33static void
36nv50_graph_init_reset(struct drm_device *dev) 34nv50_graph_init_reset(struct drm_device *dev)
37{ 35{
@@ -103,37 +101,33 @@ static int
103nv50_graph_init_ctxctl(struct drm_device *dev) 101nv50_graph_init_ctxctl(struct drm_device *dev)
104{ 102{
105 struct drm_nouveau_private *dev_priv = dev->dev_private; 103 struct drm_nouveau_private *dev_priv = dev->dev_private;
104 struct nouveau_grctx ctx = {};
105 uint32_t *cp;
106 int i;
106 107
107 NV_DEBUG(dev, "\n"); 108 NV_DEBUG(dev, "\n");
108 109
109 if (nouveau_ctxfw) { 110 cp = kmalloc(512 * 4, GFP_KERNEL);
110 nouveau_grctx_prog_load(dev); 111 if (!cp) {
111 dev_priv->engine.graph.grctx_size = 0x70000; 112 NV_ERROR(dev, "failed to allocate ctxprog\n");
113 dev_priv->engine.graph.accel_blocked = true;
114 return 0;
112 } 115 }
113 if (!dev_priv->engine.graph.ctxprog) { 116
114 struct nouveau_grctx ctx = {}; 117 ctx.dev = dev;
115 uint32_t *cp = kmalloc(512 * 4, GFP_KERNEL); 118 ctx.mode = NOUVEAU_GRCTX_PROG;
116 int i; 119 ctx.data = cp;
117 if (!cp) { 120 ctx.ctxprog_max = 512;
118 NV_ERROR(dev, "Couldn't alloc ctxprog! Disabling acceleration.\n"); 121 if (!nv50_grctx_init(&ctx)) {
119 dev_priv->engine.graph.accel_blocked = true; 122 dev_priv->engine.graph.grctx_size = ctx.ctxvals_pos * 4;
120 return 0; 123
121 } 124 nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0);
122 ctx.dev = dev; 125 for (i = 0; i < ctx.ctxprog_len; i++)
123 ctx.mode = NOUVEAU_GRCTX_PROG; 126 nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_DATA, cp[i]);
124 ctx.data = cp; 127 } else {
125 ctx.ctxprog_max = 512; 128 dev_priv->engine.graph.accel_blocked = true;
126 if (!nv50_grctx_init(&ctx)) {
127 dev_priv->engine.graph.grctx_size = ctx.ctxvals_pos * 4;
128
129 nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0);
130 for (i = 0; i < ctx.ctxprog_len; i++)
131 nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_DATA, cp[i]);
132 } else {
133 dev_priv->engine.graph.accel_blocked = true;
134 }
135 kfree(cp);
136 } 129 }
130 kfree(cp);
137 131
138 nv_wr32(dev, 0x400320, 4); 132 nv_wr32(dev, 0x400320, 4);
139 nv_wr32(dev, NV40_PGRAPH_CTXCTL_CUR, 0); 133 nv_wr32(dev, NV40_PGRAPH_CTXCTL_CUR, 0);
@@ -164,7 +158,6 @@ void
164nv50_graph_takedown(struct drm_device *dev) 158nv50_graph_takedown(struct drm_device *dev)
165{ 159{
166 NV_DEBUG(dev, "\n"); 160 NV_DEBUG(dev, "\n");
167 nouveau_grctx_fini(dev);
168} 161}
169 162
170void 163void
@@ -212,8 +205,9 @@ nv50_graph_create_context(struct nouveau_channel *chan)
212 struct drm_device *dev = chan->dev; 205 struct drm_device *dev = chan->dev;
213 struct drm_nouveau_private *dev_priv = dev->dev_private; 206 struct drm_nouveau_private *dev_priv = dev->dev_private;
214 struct nouveau_gpuobj *ramin = chan->ramin->gpuobj; 207 struct nouveau_gpuobj *ramin = chan->ramin->gpuobj;
215 struct nouveau_gpuobj *ctx; 208 struct nouveau_gpuobj *obj;
216 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph; 209 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
210 struct nouveau_grctx ctx = {};
217 int hdr, ret; 211 int hdr, ret;
218 212
219 NV_DEBUG(dev, "ch%d\n", chan->id); 213 NV_DEBUG(dev, "ch%d\n", chan->id);
@@ -223,10 +217,9 @@ nv50_graph_create_context(struct nouveau_channel *chan)
223 NVOBJ_FLAG_ZERO_FREE, &chan->ramin_grctx); 217 NVOBJ_FLAG_ZERO_FREE, &chan->ramin_grctx);
224 if (ret) 218 if (ret)
225 return ret; 219 return ret;
226 ctx = chan->ramin_grctx->gpuobj; 220 obj = chan->ramin_grctx->gpuobj;
227 221
228 hdr = IS_G80 ? 0x200 : 0x20; 222 hdr = (dev_priv->chipset == 0x50) ? 0x200 : 0x20;
229 dev_priv->engine.instmem.prepare_access(dev, true);
230 nv_wo32(dev, ramin, (hdr + 0x00)/4, 0x00190002); 223 nv_wo32(dev, ramin, (hdr + 0x00)/4, 0x00190002);
231 nv_wo32(dev, ramin, (hdr + 0x04)/4, chan->ramin_grctx->instance + 224 nv_wo32(dev, ramin, (hdr + 0x04)/4, chan->ramin_grctx->instance +
232 pgraph->grctx_size - 1); 225 pgraph->grctx_size - 1);
@@ -234,21 +227,15 @@ nv50_graph_create_context(struct nouveau_channel *chan)
234 nv_wo32(dev, ramin, (hdr + 0x0c)/4, 0); 227 nv_wo32(dev, ramin, (hdr + 0x0c)/4, 0);
235 nv_wo32(dev, ramin, (hdr + 0x10)/4, 0); 228 nv_wo32(dev, ramin, (hdr + 0x10)/4, 0);
236 nv_wo32(dev, ramin, (hdr + 0x14)/4, 0x00010000); 229 nv_wo32(dev, ramin, (hdr + 0x14)/4, 0x00010000);
237 dev_priv->engine.instmem.finish_access(dev);
238
239 dev_priv->engine.instmem.prepare_access(dev, true);
240 if (!pgraph->ctxprog) {
241 struct nouveau_grctx ctx = {};
242 ctx.dev = chan->dev;
243 ctx.mode = NOUVEAU_GRCTX_VALS;
244 ctx.data = chan->ramin_grctx->gpuobj;
245 nv50_grctx_init(&ctx);
246 } else {
247 nouveau_grctx_vals_load(dev, ctx);
248 }
249 nv_wo32(dev, ctx, 0x00000/4, chan->ramin->instance >> 12);
250 dev_priv->engine.instmem.finish_access(dev);
251 230
231 ctx.dev = chan->dev;
232 ctx.mode = NOUVEAU_GRCTX_VALS;
233 ctx.data = obj;
234 nv50_grctx_init(&ctx);
235
236 nv_wo32(dev, obj, 0x00000/4, chan->ramin->instance >> 12);
237
238 dev_priv->engine.instmem.flush(dev);
252 return 0; 239 return 0;
253} 240}
254 241
@@ -257,17 +244,16 @@ nv50_graph_destroy_context(struct nouveau_channel *chan)
257{ 244{
258 struct drm_device *dev = chan->dev; 245 struct drm_device *dev = chan->dev;
259 struct drm_nouveau_private *dev_priv = dev->dev_private; 246 struct drm_nouveau_private *dev_priv = dev->dev_private;
260 int i, hdr = IS_G80 ? 0x200 : 0x20; 247 int i, hdr = (dev_priv->chipset == 0x50) ? 0x200 : 0x20;
261 248
262 NV_DEBUG(dev, "ch%d\n", chan->id); 249 NV_DEBUG(dev, "ch%d\n", chan->id);
263 250
264 if (!chan->ramin || !chan->ramin->gpuobj) 251 if (!chan->ramin || !chan->ramin->gpuobj)
265 return; 252 return;
266 253
267 dev_priv->engine.instmem.prepare_access(dev, true);
268 for (i = hdr; i < hdr + 24; i += 4) 254 for (i = hdr; i < hdr + 24; i += 4)
269 nv_wo32(dev, chan->ramin->gpuobj, i/4, 0); 255 nv_wo32(dev, chan->ramin->gpuobj, i/4, 0);
270 dev_priv->engine.instmem.finish_access(dev); 256 dev_priv->engine.instmem.flush(dev);
271 257
272 nouveau_gpuobj_ref_del(dev, &chan->ramin_grctx); 258 nouveau_gpuobj_ref_del(dev, &chan->ramin_grctx);
273} 259}
diff --git a/drivers/gpu/drm/nouveau/nv50_instmem.c b/drivers/gpu/drm/nouveau/nv50_instmem.c
index 5f21df31f3aa..37c7b48ab24a 100644
--- a/drivers/gpu/drm/nouveau/nv50_instmem.c
+++ b/drivers/gpu/drm/nouveau/nv50_instmem.c
@@ -35,8 +35,6 @@ struct nv50_instmem_priv {
35 struct nouveau_gpuobj_ref *pramin_pt; 35 struct nouveau_gpuobj_ref *pramin_pt;
36 struct nouveau_gpuobj_ref *pramin_bar; 36 struct nouveau_gpuobj_ref *pramin_bar;
37 struct nouveau_gpuobj_ref *fb_bar; 37 struct nouveau_gpuobj_ref *fb_bar;
38
39 bool last_access_wr;
40}; 38};
41 39
42#define NV50_INSTMEM_PAGE_SHIFT 12 40#define NV50_INSTMEM_PAGE_SHIFT 12
@@ -147,7 +145,7 @@ nv50_instmem_init(struct drm_device *dev)
147 if (ret) 145 if (ret)
148 return ret; 146 return ret;
149 147
150 if (nouveau_mem_init_heap(&chan->ramin_heap, c_base, c_size - c_base)) 148 if (drm_mm_init(&chan->ramin_heap, c_base, c_size - c_base))
151 return -ENOMEM; 149 return -ENOMEM;
152 150
153 /* RAMFC + zero channel's PRAMIN up to start of VM pagedir */ 151 /* RAMFC + zero channel's PRAMIN up to start of VM pagedir */
@@ -241,7 +239,7 @@ nv50_instmem_init(struct drm_device *dev)
241 return ret; 239 return ret;
242 BAR0_WI32(priv->fb_bar->gpuobj, 0x00, 0x7fc00000); 240 BAR0_WI32(priv->fb_bar->gpuobj, 0x00, 0x7fc00000);
243 BAR0_WI32(priv->fb_bar->gpuobj, 0x04, 0x40000000 + 241 BAR0_WI32(priv->fb_bar->gpuobj, 0x04, 0x40000000 +
244 drm_get_resource_len(dev, 1) - 1); 242 pci_resource_len(dev->pdev, 1) - 1);
245 BAR0_WI32(priv->fb_bar->gpuobj, 0x08, 0x40000000); 243 BAR0_WI32(priv->fb_bar->gpuobj, 0x08, 0x40000000);
246 BAR0_WI32(priv->fb_bar->gpuobj, 0x0c, 0x00000000); 244 BAR0_WI32(priv->fb_bar->gpuobj, 0x0c, 0x00000000);
247 BAR0_WI32(priv->fb_bar->gpuobj, 0x10, 0x00000000); 245 BAR0_WI32(priv->fb_bar->gpuobj, 0x10, 0x00000000);
@@ -262,23 +260,18 @@ nv50_instmem_init(struct drm_device *dev)
262 260
263 /* Assume that praying isn't enough, check that we can re-read the 261 /* Assume that praying isn't enough, check that we can re-read the
264 * entire fake channel back from the PRAMIN BAR */ 262 * entire fake channel back from the PRAMIN BAR */
265 dev_priv->engine.instmem.prepare_access(dev, false);
266 for (i = 0; i < c_size; i += 4) { 263 for (i = 0; i < c_size; i += 4) {
267 if (nv_rd32(dev, NV_RAMIN + i) != nv_ri32(dev, i)) { 264 if (nv_rd32(dev, NV_RAMIN + i) != nv_ri32(dev, i)) {
268 NV_ERROR(dev, "Error reading back PRAMIN at 0x%08x\n", 265 NV_ERROR(dev, "Error reading back PRAMIN at 0x%08x\n",
269 i); 266 i);
270 dev_priv->engine.instmem.finish_access(dev);
271 return -EINVAL; 267 return -EINVAL;
272 } 268 }
273 } 269 }
274 dev_priv->engine.instmem.finish_access(dev);
275 270
276 nv_wr32(dev, NV50_PUNK_BAR0_PRAMIN, save_nv001700); 271 nv_wr32(dev, NV50_PUNK_BAR0_PRAMIN, save_nv001700);
277 272
278 /* Global PRAMIN heap */ 273 /* Global PRAMIN heap */
279 if (nouveau_mem_init_heap(&dev_priv->ramin_heap, 274 if (drm_mm_init(&dev_priv->ramin_heap, c_size, dev_priv->ramin_size - c_size)) {
280 c_size, dev_priv->ramin_size - c_size)) {
281 dev_priv->ramin_heap = NULL;
282 NV_ERROR(dev, "Failed to init RAMIN heap\n"); 275 NV_ERROR(dev, "Failed to init RAMIN heap\n");
283 } 276 }
284 277
@@ -321,7 +314,7 @@ nv50_instmem_takedown(struct drm_device *dev)
321 nouveau_gpuobj_del(dev, &chan->vm_pd); 314 nouveau_gpuobj_del(dev, &chan->vm_pd);
322 nouveau_gpuobj_ref_del(dev, &chan->ramfc); 315 nouveau_gpuobj_ref_del(dev, &chan->ramfc);
323 nouveau_gpuobj_ref_del(dev, &chan->ramin); 316 nouveau_gpuobj_ref_del(dev, &chan->ramin);
324 nouveau_mem_takedown(&chan->ramin_heap); 317 drm_mm_takedown(&chan->ramin_heap);
325 318
326 dev_priv->fifos[0] = dev_priv->fifos[127] = NULL; 319 dev_priv->fifos[0] = dev_priv->fifos[127] = NULL;
327 kfree(chan); 320 kfree(chan);
@@ -436,14 +429,14 @@ nv50_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
436 if (!gpuobj->im_backing || !gpuobj->im_pramin || gpuobj->im_bound) 429 if (!gpuobj->im_backing || !gpuobj->im_pramin || gpuobj->im_bound)
437 return -EINVAL; 430 return -EINVAL;
438 431
439 NV_DEBUG(dev, "st=0x%0llx sz=0x%0llx\n", 432 NV_DEBUG(dev, "st=0x%lx sz=0x%lx\n",
440 gpuobj->im_pramin->start, gpuobj->im_pramin->size); 433 gpuobj->im_pramin->start, gpuobj->im_pramin->size);
441 434
442 pte = (gpuobj->im_pramin->start >> 12) << 1; 435 pte = (gpuobj->im_pramin->start >> 12) << 1;
443 pte_end = ((gpuobj->im_pramin->size >> 12) << 1) + pte; 436 pte_end = ((gpuobj->im_pramin->size >> 12) << 1) + pte;
444 vram = gpuobj->im_backing_start; 437 vram = gpuobj->im_backing_start;
445 438
446 NV_DEBUG(dev, "pramin=0x%llx, pte=%d, pte_end=%d\n", 439 NV_DEBUG(dev, "pramin=0x%lx, pte=%d, pte_end=%d\n",
447 gpuobj->im_pramin->start, pte, pte_end); 440 gpuobj->im_pramin->start, pte, pte_end);
448 NV_DEBUG(dev, "first vram page: 0x%08x\n", gpuobj->im_backing_start); 441 NV_DEBUG(dev, "first vram page: 0x%08x\n", gpuobj->im_backing_start);
449 442
@@ -453,27 +446,15 @@ nv50_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
453 vram |= 0x30; 446 vram |= 0x30;
454 } 447 }
455 448
456 dev_priv->engine.instmem.prepare_access(dev, true);
457 while (pte < pte_end) { 449 while (pte < pte_end) {
458 nv_wo32(dev, pramin_pt, pte++, lower_32_bits(vram)); 450 nv_wo32(dev, pramin_pt, pte++, lower_32_bits(vram));
459 nv_wo32(dev, pramin_pt, pte++, upper_32_bits(vram)); 451 nv_wo32(dev, pramin_pt, pte++, upper_32_bits(vram));
460 vram += NV50_INSTMEM_PAGE_SIZE; 452 vram += NV50_INSTMEM_PAGE_SIZE;
461 } 453 }
462 dev_priv->engine.instmem.finish_access(dev); 454 dev_priv->engine.instmem.flush(dev);
463
464 nv_wr32(dev, 0x100c80, 0x00040001);
465 if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
466 NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (1)\n");
467 NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
468 return -EBUSY;
469 }
470 455
471 nv_wr32(dev, 0x100c80, 0x00060001); 456 nv50_vm_flush(dev, 4);
472 if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) { 457 nv50_vm_flush(dev, 6);
473 NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
474 NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
475 return -EBUSY;
476 }
477 458
478 gpuobj->im_bound = 1; 459 gpuobj->im_bound = 1;
479 return 0; 460 return 0;
@@ -492,36 +473,37 @@ nv50_instmem_unbind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
492 pte = (gpuobj->im_pramin->start >> 12) << 1; 473 pte = (gpuobj->im_pramin->start >> 12) << 1;
493 pte_end = ((gpuobj->im_pramin->size >> 12) << 1) + pte; 474 pte_end = ((gpuobj->im_pramin->size >> 12) << 1) + pte;
494 475
495 dev_priv->engine.instmem.prepare_access(dev, true);
496 while (pte < pte_end) { 476 while (pte < pte_end) {
497 nv_wo32(dev, priv->pramin_pt->gpuobj, pte++, 0x00000000); 477 nv_wo32(dev, priv->pramin_pt->gpuobj, pte++, 0x00000000);
498 nv_wo32(dev, priv->pramin_pt->gpuobj, pte++, 0x00000000); 478 nv_wo32(dev, priv->pramin_pt->gpuobj, pte++, 0x00000000);
499 } 479 }
500 dev_priv->engine.instmem.finish_access(dev); 480 dev_priv->engine.instmem.flush(dev);
501 481
502 gpuobj->im_bound = 0; 482 gpuobj->im_bound = 0;
503 return 0; 483 return 0;
504} 484}
505 485
506void 486void
507nv50_instmem_prepare_access(struct drm_device *dev, bool write) 487nv50_instmem_flush(struct drm_device *dev)
508{ 488{
509 struct drm_nouveau_private *dev_priv = dev->dev_private; 489 nv_wr32(dev, 0x00330c, 0x00000001);
510 struct nv50_instmem_priv *priv = dev_priv->engine.instmem.priv; 490 if (!nv_wait(0x00330c, 0x00000002, 0x00000000))
511 491 NV_ERROR(dev, "PRAMIN flush timeout\n");
512 priv->last_access_wr = write;
513} 492}
514 493
515void 494void
516nv50_instmem_finish_access(struct drm_device *dev) 495nv84_instmem_flush(struct drm_device *dev)
517{ 496{
518 struct drm_nouveau_private *dev_priv = dev->dev_private; 497 nv_wr32(dev, 0x070000, 0x00000001);
519 struct nv50_instmem_priv *priv = dev_priv->engine.instmem.priv; 498 if (!nv_wait(0x070000, 0x00000002, 0x00000000))
499 NV_ERROR(dev, "PRAMIN flush timeout\n");
500}
520 501
521 if (priv->last_access_wr) { 502void
522 nv_wr32(dev, 0x070000, 0x00000001); 503nv50_vm_flush(struct drm_device *dev, int engine)
523 if (!nv_wait(0x070000, 0x00000001, 0x00000000)) 504{
524 NV_ERROR(dev, "PRAMIN flush timeout\n"); 505 nv_wr32(dev, 0x100c80, (engine << 16) | 1);
525 } 506 if (!nv_wait(0x100c80, 0x00000001, 0x00000000))
507 NV_ERROR(dev, "vm flush timeout: engine %d\n", engine);
526} 508}
527 509
diff --git a/drivers/gpu/drm/nouveau/nv50_sor.c b/drivers/gpu/drm/nouveau/nv50_sor.c
index 812778db76ac..bcd4cf84a7e6 100644
--- a/drivers/gpu/drm/nouveau/nv50_sor.c
+++ b/drivers/gpu/drm/nouveau/nv50_sor.c
@@ -37,52 +37,32 @@
37#include "nv50_display.h" 37#include "nv50_display.h"
38 38
39static void 39static void
40nv50_sor_disconnect(struct nouveau_encoder *nv_encoder) 40nv50_sor_disconnect(struct drm_encoder *encoder)
41{ 41{
42 struct drm_device *dev = to_drm_encoder(nv_encoder)->dev; 42 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
43 struct drm_device *dev = encoder->dev;
43 struct drm_nouveau_private *dev_priv = dev->dev_private; 44 struct drm_nouveau_private *dev_priv = dev->dev_private;
44 struct nouveau_channel *evo = dev_priv->evo; 45 struct nouveau_channel *evo = dev_priv->evo;
45 int ret; 46 int ret;
46 47
48 if (!nv_encoder->crtc)
49 return;
50 nv50_crtc_blank(nouveau_crtc(nv_encoder->crtc), true);
51
47 NV_DEBUG_KMS(dev, "Disconnecting SOR %d\n", nv_encoder->or); 52 NV_DEBUG_KMS(dev, "Disconnecting SOR %d\n", nv_encoder->or);
48 53
49 ret = RING_SPACE(evo, 2); 54 ret = RING_SPACE(evo, 4);
50 if (ret) { 55 if (ret) {
51 NV_ERROR(dev, "no space while disconnecting SOR\n"); 56 NV_ERROR(dev, "no space while disconnecting SOR\n");
52 return; 57 return;
53 } 58 }
54 BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1); 59 BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
55 OUT_RING(evo, 0); 60 OUT_RING (evo, 0);
56} 61 BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);
57 62 OUT_RING (evo, 0);
58static void
59nv50_sor_dp_link_train(struct drm_encoder *encoder)
60{
61 struct drm_device *dev = encoder->dev;
62 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
63 struct bit_displayport_encoder_table *dpe;
64 int dpe_headerlen;
65
66 dpe = nouveau_bios_dp_table(dev, nv_encoder->dcb, &dpe_headerlen);
67 if (!dpe) {
68 NV_ERROR(dev, "SOR-%d: no DP encoder table!\n", nv_encoder->or);
69 return;
70 }
71 63
72 if (dpe->script0) { 64 nv_encoder->crtc = NULL;
73 NV_DEBUG_KMS(dev, "SOR-%d: running DP script 0\n", nv_encoder->or); 65 nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
74 nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script0),
75 nv_encoder->dcb);
76 }
77
78 if (!nouveau_dp_link_train(encoder))
79 NV_ERROR(dev, "SOR-%d: link training failed\n", nv_encoder->or);
80
81 if (dpe->script1) {
82 NV_DEBUG_KMS(dev, "SOR-%d: running DP script 1\n", nv_encoder->or);
83 nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script1),
84 nv_encoder->dcb);
85 }
86} 66}
87 67
88static void 68static void
@@ -94,14 +74,16 @@ nv50_sor_dpms(struct drm_encoder *encoder, int mode)
94 uint32_t val; 74 uint32_t val;
95 int or = nv_encoder->or; 75 int or = nv_encoder->or;
96 76
97 NV_DEBUG_KMS(dev, "or %d mode %d\n", or, mode); 77 NV_DEBUG_KMS(dev, "or %d type %d mode %d\n", or, nv_encoder->dcb->type, mode);
98 78
99 nv_encoder->last_dpms = mode; 79 nv_encoder->last_dpms = mode;
100 list_for_each_entry(enc, &dev->mode_config.encoder_list, head) { 80 list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
101 struct nouveau_encoder *nvenc = nouveau_encoder(enc); 81 struct nouveau_encoder *nvenc = nouveau_encoder(enc);
102 82
103 if (nvenc == nv_encoder || 83 if (nvenc == nv_encoder ||
104 nvenc->disconnect != nv50_sor_disconnect || 84 (nvenc->dcb->type != OUTPUT_TMDS &&
85 nvenc->dcb->type != OUTPUT_LVDS &&
86 nvenc->dcb->type != OUTPUT_DP) ||
105 nvenc->dcb->or != nv_encoder->dcb->or) 87 nvenc->dcb->or != nv_encoder->dcb->or)
106 continue; 88 continue;
107 89
@@ -133,8 +115,22 @@ nv50_sor_dpms(struct drm_encoder *encoder, int mode)
133 nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_STATE(or))); 115 nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_STATE(or)));
134 } 116 }
135 117
136 if (nv_encoder->dcb->type == OUTPUT_DP && mode == DRM_MODE_DPMS_ON) 118 if (nv_encoder->dcb->type == OUTPUT_DP) {
137 nv50_sor_dp_link_train(encoder); 119 struct nouveau_i2c_chan *auxch;
120
121 auxch = nouveau_i2c_find(dev, nv_encoder->dcb->i2c_index);
122 if (!auxch)
123 return;
124
125 if (mode == DRM_MODE_DPMS_ON) {
126 u8 status = DP_SET_POWER_D0;
127 nouveau_dp_auxch(auxch, 8, DP_SET_POWER, &status, 1);
128 nouveau_dp_link_train(encoder);
129 } else {
130 u8 status = DP_SET_POWER_D3;
131 nouveau_dp_auxch(auxch, 8, DP_SET_POWER, &status, 1);
132 }
133 }
138} 134}
139 135
140static void 136static void
@@ -196,7 +192,8 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
196 uint32_t mode_ctl = 0; 192 uint32_t mode_ctl = 0;
197 int ret; 193 int ret;
198 194
199 NV_DEBUG_KMS(dev, "or %d\n", nv_encoder->or); 195 NV_DEBUG_KMS(dev, "or %d type %d -> crtc %d\n",
196 nv_encoder->or, nv_encoder->dcb->type, crtc->index);
200 197
201 nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON); 198 nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON);
202 199
@@ -239,6 +236,14 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
239 } 236 }
240 BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1); 237 BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
241 OUT_RING(evo, mode_ctl); 238 OUT_RING(evo, mode_ctl);
239
240 nv_encoder->crtc = encoder->crtc;
241}
242
243static struct drm_crtc *
244nv50_sor_crtc_get(struct drm_encoder *encoder)
245{
246 return nouveau_encoder(encoder)->crtc;
242} 247}
243 248
244static const struct drm_encoder_helper_funcs nv50_sor_helper_funcs = { 249static const struct drm_encoder_helper_funcs nv50_sor_helper_funcs = {
@@ -249,7 +254,9 @@ static const struct drm_encoder_helper_funcs nv50_sor_helper_funcs = {
249 .prepare = nv50_sor_prepare, 254 .prepare = nv50_sor_prepare,
250 .commit = nv50_sor_commit, 255 .commit = nv50_sor_commit,
251 .mode_set = nv50_sor_mode_set, 256 .mode_set = nv50_sor_mode_set,
252 .detect = NULL 257 .get_crtc = nv50_sor_crtc_get,
258 .detect = NULL,
259 .disable = nv50_sor_disconnect
253}; 260};
254 261
255static void 262static void
@@ -272,32 +279,22 @@ static const struct drm_encoder_funcs nv50_sor_encoder_funcs = {
272}; 279};
273 280
274int 281int
275nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry) 282nv50_sor_create(struct drm_connector *connector, struct dcb_entry *entry)
276{ 283{
277 struct nouveau_encoder *nv_encoder = NULL; 284 struct nouveau_encoder *nv_encoder = NULL;
285 struct drm_device *dev = connector->dev;
278 struct drm_encoder *encoder; 286 struct drm_encoder *encoder;
279 bool dum;
280 int type; 287 int type;
281 288
282 NV_DEBUG_KMS(dev, "\n"); 289 NV_DEBUG_KMS(dev, "\n");
283 290
284 switch (entry->type) { 291 switch (entry->type) {
285 case OUTPUT_TMDS: 292 case OUTPUT_TMDS:
286 NV_INFO(dev, "Detected a TMDS output\n"); 293 case OUTPUT_DP:
287 type = DRM_MODE_ENCODER_TMDS; 294 type = DRM_MODE_ENCODER_TMDS;
288 break; 295 break;
289 case OUTPUT_LVDS: 296 case OUTPUT_LVDS:
290 NV_INFO(dev, "Detected a LVDS output\n");
291 type = DRM_MODE_ENCODER_LVDS; 297 type = DRM_MODE_ENCODER_LVDS;
292
293 if (nouveau_bios_parse_lvds_table(dev, 0, &dum, &dum)) {
294 NV_ERROR(dev, "Failed parsing LVDS table\n");
295 return -EINVAL;
296 }
297 break;
298 case OUTPUT_DP:
299 NV_INFO(dev, "Detected a DP output\n");
300 type = DRM_MODE_ENCODER_TMDS;
301 break; 298 break;
302 default: 299 default:
303 return -EINVAL; 300 return -EINVAL;
@@ -310,8 +307,7 @@ nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry)
310 307
311 nv_encoder->dcb = entry; 308 nv_encoder->dcb = entry;
312 nv_encoder->or = ffs(entry->or) - 1; 309 nv_encoder->or = ffs(entry->or) - 1;
313 310 nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
314 nv_encoder->disconnect = nv50_sor_disconnect;
315 311
316 drm_encoder_init(dev, encoder, &nv50_sor_encoder_funcs, type); 312 drm_encoder_init(dev, encoder, &nv50_sor_encoder_funcs, type);
317 drm_encoder_helper_add(encoder, &nv50_sor_helper_funcs); 313 drm_encoder_helper_add(encoder, &nv50_sor_helper_funcs);
@@ -342,5 +338,6 @@ nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry)
342 nv_encoder->dp.mc_unknown = 5; 338 nv_encoder->dp.mc_unknown = 5;
343 } 339 }
344 340
341 drm_mode_connector_attach_encoder(connector, encoder);
345 return 0; 342 return 0;
346} 343}
diff --git a/drivers/gpu/drm/nouveau/nvreg.h b/drivers/gpu/drm/nouveau/nvreg.h
index 5998c35237b0..ad64673ace1f 100644
--- a/drivers/gpu/drm/nouveau/nvreg.h
+++ b/drivers/gpu/drm/nouveau/nvreg.h
@@ -147,28 +147,6 @@
147# define NV_VIO_GX_DONT_CARE_INDEX 0x07 147# define NV_VIO_GX_DONT_CARE_INDEX 0x07
148# define NV_VIO_GX_BIT_MASK_INDEX 0x08 148# define NV_VIO_GX_BIT_MASK_INDEX 0x08
149 149
150#define NV_PFB_BOOT_0 0x00100000
151#define NV_PFB_CFG0 0x00100200
152#define NV_PFB_CFG1 0x00100204
153#define NV_PFB_CSTATUS 0x0010020C
154#define NV_PFB_REFCTRL 0x00100210
155# define NV_PFB_REFCTRL_VALID_1 (1 << 31)
156#define NV_PFB_PAD 0x0010021C
157# define NV_PFB_PAD_CKE_NORMAL (1 << 0)
158#define NV_PFB_TILE_NV10 0x00100240
159#define NV_PFB_TILE_SIZE_NV10 0x00100244
160#define NV_PFB_REF 0x001002D0
161# define NV_PFB_REF_CMD_REFRESH (1 << 0)
162#define NV_PFB_PRE 0x001002D4
163# define NV_PFB_PRE_CMD_PRECHARGE (1 << 0)
164#define NV_PFB_CLOSE_PAGE2 0x0010033C
165#define NV_PFB_TILE_NV40 0x00100600
166#define NV_PFB_TILE_SIZE_NV40 0x00100604
167
168#define NV_PEXTDEV_BOOT_0 0x00101000
169# define NV_PEXTDEV_BOOT_0_STRAP_FP_IFACE_12BIT (8 << 12)
170#define NV_PEXTDEV_BOOT_3 0x0010100c
171
172#define NV_PCRTC_INTR_0 0x00600100 150#define NV_PCRTC_INTR_0 0x00600100
173# define NV_PCRTC_INTR_0_VBLANK (1 << 0) 151# define NV_PCRTC_INTR_0_VBLANK (1 << 0)
174#define NV_PCRTC_INTR_EN_0 0x00600140 152#define NV_PCRTC_INTR_EN_0 0x00600140
diff --git a/drivers/gpu/drm/r128/r128_cce.c b/drivers/gpu/drm/r128/r128_cce.c
index e671d0e74d4c..570e190710bd 100644
--- a/drivers/gpu/drm/r128/r128_cce.c
+++ b/drivers/gpu/drm/r128/r128_cce.c
@@ -44,7 +44,7 @@
44 44
45MODULE_FIRMWARE(FIRMWARE_NAME); 45MODULE_FIRMWARE(FIRMWARE_NAME);
46 46
47static int R128_READ_PLL(struct drm_device * dev, int addr) 47static int R128_READ_PLL(struct drm_device *dev, int addr)
48{ 48{
49 drm_r128_private_t *dev_priv = dev->dev_private; 49 drm_r128_private_t *dev_priv = dev->dev_private;
50 50
@@ -53,7 +53,7 @@ static int R128_READ_PLL(struct drm_device * dev, int addr)
53} 53}
54 54
55#if R128_FIFO_DEBUG 55#if R128_FIFO_DEBUG
56static void r128_status(drm_r128_private_t * dev_priv) 56static void r128_status(drm_r128_private_t *dev_priv)
57{ 57{
58 printk("GUI_STAT = 0x%08x\n", 58 printk("GUI_STAT = 0x%08x\n",
59 (unsigned int)R128_READ(R128_GUI_STAT)); 59 (unsigned int)R128_READ(R128_GUI_STAT));
@@ -74,7 +74,7 @@ static void r128_status(drm_r128_private_t * dev_priv)
74 * Engine, FIFO control 74 * Engine, FIFO control
75 */ 75 */
76 76
77static int r128_do_pixcache_flush(drm_r128_private_t * dev_priv) 77static int r128_do_pixcache_flush(drm_r128_private_t *dev_priv)
78{ 78{
79 u32 tmp; 79 u32 tmp;
80 int i; 80 int i;
@@ -83,9 +83,8 @@ static int r128_do_pixcache_flush(drm_r128_private_t * dev_priv)
83 R128_WRITE(R128_PC_NGUI_CTLSTAT, tmp); 83 R128_WRITE(R128_PC_NGUI_CTLSTAT, tmp);
84 84
85 for (i = 0; i < dev_priv->usec_timeout; i++) { 85 for (i = 0; i < dev_priv->usec_timeout; i++) {
86 if (!(R128_READ(R128_PC_NGUI_CTLSTAT) & R128_PC_BUSY)) { 86 if (!(R128_READ(R128_PC_NGUI_CTLSTAT) & R128_PC_BUSY))
87 return 0; 87 return 0;
88 }
89 DRM_UDELAY(1); 88 DRM_UDELAY(1);
90 } 89 }
91 90
@@ -95,7 +94,7 @@ static int r128_do_pixcache_flush(drm_r128_private_t * dev_priv)
95 return -EBUSY; 94 return -EBUSY;
96} 95}
97 96
98static int r128_do_wait_for_fifo(drm_r128_private_t * dev_priv, int entries) 97static int r128_do_wait_for_fifo(drm_r128_private_t *dev_priv, int entries)
99{ 98{
100 int i; 99 int i;
101 100
@@ -112,7 +111,7 @@ static int r128_do_wait_for_fifo(drm_r128_private_t * dev_priv, int entries)
112 return -EBUSY; 111 return -EBUSY;
113} 112}
114 113
115static int r128_do_wait_for_idle(drm_r128_private_t * dev_priv) 114static int r128_do_wait_for_idle(drm_r128_private_t *dev_priv)
116{ 115{
117 int i, ret; 116 int i, ret;
118 117
@@ -189,7 +188,7 @@ out_release:
189 * prior to a wait for idle, as it informs the engine that the command 188 * prior to a wait for idle, as it informs the engine that the command
190 * stream is ending. 189 * stream is ending.
191 */ 190 */
192static void r128_do_cce_flush(drm_r128_private_t * dev_priv) 191static void r128_do_cce_flush(drm_r128_private_t *dev_priv)
193{ 192{
194 u32 tmp; 193 u32 tmp;
195 194
@@ -199,7 +198,7 @@ static void r128_do_cce_flush(drm_r128_private_t * dev_priv)
199 198
200/* Wait for the CCE to go idle. 199/* Wait for the CCE to go idle.
201 */ 200 */
202int r128_do_cce_idle(drm_r128_private_t * dev_priv) 201int r128_do_cce_idle(drm_r128_private_t *dev_priv)
203{ 202{
204 int i; 203 int i;
205 204
@@ -225,7 +224,7 @@ int r128_do_cce_idle(drm_r128_private_t * dev_priv)
225 224
226/* Start the Concurrent Command Engine. 225/* Start the Concurrent Command Engine.
227 */ 226 */
228static void r128_do_cce_start(drm_r128_private_t * dev_priv) 227static void r128_do_cce_start(drm_r128_private_t *dev_priv)
229{ 228{
230 r128_do_wait_for_idle(dev_priv); 229 r128_do_wait_for_idle(dev_priv);
231 230
@@ -242,7 +241,7 @@ static void r128_do_cce_start(drm_r128_private_t * dev_priv)
242 * commands, so you must wait for the CCE command stream to complete 241 * commands, so you must wait for the CCE command stream to complete
243 * before calling this routine. 242 * before calling this routine.
244 */ 243 */
245static void r128_do_cce_reset(drm_r128_private_t * dev_priv) 244static void r128_do_cce_reset(drm_r128_private_t *dev_priv)
246{ 245{
247 R128_WRITE(R128_PM4_BUFFER_DL_WPTR, 0); 246 R128_WRITE(R128_PM4_BUFFER_DL_WPTR, 0);
248 R128_WRITE(R128_PM4_BUFFER_DL_RPTR, 0); 247 R128_WRITE(R128_PM4_BUFFER_DL_RPTR, 0);
@@ -253,7 +252,7 @@ static void r128_do_cce_reset(drm_r128_private_t * dev_priv)
253 * commands, so you must flush the command stream and wait for the CCE 252 * commands, so you must flush the command stream and wait for the CCE
254 * to go idle before calling this routine. 253 * to go idle before calling this routine.
255 */ 254 */
256static void r128_do_cce_stop(drm_r128_private_t * dev_priv) 255static void r128_do_cce_stop(drm_r128_private_t *dev_priv)
257{ 256{
258 R128_WRITE(R128_PM4_MICRO_CNTL, 0); 257 R128_WRITE(R128_PM4_MICRO_CNTL, 0);
259 R128_WRITE(R128_PM4_BUFFER_CNTL, 258 R128_WRITE(R128_PM4_BUFFER_CNTL,
@@ -264,7 +263,7 @@ static void r128_do_cce_stop(drm_r128_private_t * dev_priv)
264 263
265/* Reset the engine. This will stop the CCE if it is running. 264/* Reset the engine. This will stop the CCE if it is running.
266 */ 265 */
267static int r128_do_engine_reset(struct drm_device * dev) 266static int r128_do_engine_reset(struct drm_device *dev)
268{ 267{
269 drm_r128_private_t *dev_priv = dev->dev_private; 268 drm_r128_private_t *dev_priv = dev->dev_private;
270 u32 clock_cntl_index, mclk_cntl, gen_reset_cntl; 269 u32 clock_cntl_index, mclk_cntl, gen_reset_cntl;
@@ -301,8 +300,8 @@ static int r128_do_engine_reset(struct drm_device * dev)
301 return 0; 300 return 0;
302} 301}
303 302
304static void r128_cce_init_ring_buffer(struct drm_device * dev, 303static void r128_cce_init_ring_buffer(struct drm_device *dev,
305 drm_r128_private_t * dev_priv) 304 drm_r128_private_t *dev_priv)
306{ 305{
307 u32 ring_start; 306 u32 ring_start;
308 u32 tmp; 307 u32 tmp;
@@ -340,7 +339,7 @@ static void r128_cce_init_ring_buffer(struct drm_device * dev,
340 R128_WRITE(R128_BUS_CNTL, tmp); 339 R128_WRITE(R128_BUS_CNTL, tmp);
341} 340}
342 341
343static int r128_do_init_cce(struct drm_device * dev, drm_r128_init_t * init) 342static int r128_do_init_cce(struct drm_device *dev, drm_r128_init_t *init)
344{ 343{
345 drm_r128_private_t *dev_priv; 344 drm_r128_private_t *dev_priv;
346 int rc; 345 int rc;
@@ -588,7 +587,7 @@ static int r128_do_init_cce(struct drm_device * dev, drm_r128_init_t * init)
588 return rc; 587 return rc;
589} 588}
590 589
591int r128_do_cleanup_cce(struct drm_device * dev) 590int r128_do_cleanup_cce(struct drm_device *dev)
592{ 591{
593 592
594 /* Make sure interrupts are disabled here because the uninstall ioctl 593 /* Make sure interrupts are disabled here because the uninstall ioctl
@@ -682,9 +681,8 @@ int r128_cce_stop(struct drm_device *dev, void *data, struct drm_file *file_priv
682 /* Flush any pending CCE commands. This ensures any outstanding 681 /* Flush any pending CCE commands. This ensures any outstanding
683 * commands are exectuted by the engine before we turn it off. 682 * commands are exectuted by the engine before we turn it off.
684 */ 683 */
685 if (stop->flush) { 684 if (stop->flush)
686 r128_do_cce_flush(dev_priv); 685 r128_do_cce_flush(dev_priv);
687 }
688 686
689 /* If we fail to make the engine go idle, we return an error 687 /* If we fail to make the engine go idle, we return an error
690 * code so that the DRM ioctl wrapper can try again. 688 * code so that the DRM ioctl wrapper can try again.
@@ -735,9 +733,8 @@ int r128_cce_idle(struct drm_device *dev, void *data, struct drm_file *file_priv
735 733
736 DEV_INIT_TEST_WITH_RETURN(dev_priv); 734 DEV_INIT_TEST_WITH_RETURN(dev_priv);
737 735
738 if (dev_priv->cce_running) { 736 if (dev_priv->cce_running)
739 r128_do_cce_flush(dev_priv); 737 r128_do_cce_flush(dev_priv);
740 }
741 738
742 return r128_do_cce_idle(dev_priv); 739 return r128_do_cce_idle(dev_priv);
743} 740}
@@ -765,7 +762,7 @@ int r128_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_pr
765#define R128_BUFFER_FREE 0 762#define R128_BUFFER_FREE 0
766 763
767#if 0 764#if 0
768static int r128_freelist_init(struct drm_device * dev) 765static int r128_freelist_init(struct drm_device *dev)
769{ 766{
770 struct drm_device_dma *dma = dev->dma; 767 struct drm_device_dma *dma = dev->dma;
771 drm_r128_private_t *dev_priv = dev->dev_private; 768 drm_r128_private_t *dev_priv = dev->dev_private;
@@ -848,7 +845,7 @@ static struct drm_buf *r128_freelist_get(struct drm_device * dev)
848 return NULL; 845 return NULL;
849} 846}
850 847
851void r128_freelist_reset(struct drm_device * dev) 848void r128_freelist_reset(struct drm_device *dev)
852{ 849{
853 struct drm_device_dma *dma = dev->dma; 850 struct drm_device_dma *dma = dev->dma;
854 int i; 851 int i;
@@ -864,7 +861,7 @@ void r128_freelist_reset(struct drm_device * dev)
864 * CCE command submission 861 * CCE command submission
865 */ 862 */
866 863
867int r128_wait_ring(drm_r128_private_t * dev_priv, int n) 864int r128_wait_ring(drm_r128_private_t *dev_priv, int n)
868{ 865{
869 drm_r128_ring_buffer_t *ring = &dev_priv->ring; 866 drm_r128_ring_buffer_t *ring = &dev_priv->ring;
870 int i; 867 int i;
@@ -881,9 +878,9 @@ int r128_wait_ring(drm_r128_private_t * dev_priv, int n)
881 return -EBUSY; 878 return -EBUSY;
882} 879}
883 880
884static int r128_cce_get_buffers(struct drm_device * dev, 881static int r128_cce_get_buffers(struct drm_device *dev,
885 struct drm_file *file_priv, 882 struct drm_file *file_priv,
886 struct drm_dma * d) 883 struct drm_dma *d)
887{ 884{
888 int i; 885 int i;
889 struct drm_buf *buf; 886 struct drm_buf *buf;
@@ -933,9 +930,8 @@ int r128_cce_buffers(struct drm_device *dev, void *data, struct drm_file *file_p
933 930
934 d->granted_count = 0; 931 d->granted_count = 0;
935 932
936 if (d->request_count) { 933 if (d->request_count)
937 ret = r128_cce_get_buffers(dev, file_priv, d); 934 ret = r128_cce_get_buffers(dev, file_priv, d);
938 }
939 935
940 return ret; 936 return ret;
941} 937}
diff --git a/drivers/gpu/drm/r128/r128_drv.c b/drivers/gpu/drm/r128/r128_drv.c
index b806fdcc7170..1e2971f13aa1 100644
--- a/drivers/gpu/drm/r128/r128_drv.c
+++ b/drivers/gpu/drm/r128/r128_drv.c
@@ -85,7 +85,7 @@ static struct drm_driver driver = {
85 .patchlevel = DRIVER_PATCHLEVEL, 85 .patchlevel = DRIVER_PATCHLEVEL,
86}; 86};
87 87
88int r128_driver_load(struct drm_device * dev, unsigned long flags) 88int r128_driver_load(struct drm_device *dev, unsigned long flags)
89{ 89{
90 return drm_vblank_init(dev, 1); 90 return drm_vblank_init(dev, 1);
91} 91}
diff --git a/drivers/gpu/drm/r128/r128_drv.h b/drivers/gpu/drm/r128/r128_drv.h
index 3c60829d82e9..930c71b2fb5e 100644
--- a/drivers/gpu/drm/r128/r128_drv.h
+++ b/drivers/gpu/drm/r128/r128_drv.h
@@ -53,7 +53,7 @@
53#define DRIVER_MINOR 5 53#define DRIVER_MINOR 5
54#define DRIVER_PATCHLEVEL 0 54#define DRIVER_PATCHLEVEL 0
55 55
56#define GET_RING_HEAD(dev_priv) R128_READ( R128_PM4_BUFFER_DL_RPTR ) 56#define GET_RING_HEAD(dev_priv) R128_READ(R128_PM4_BUFFER_DL_RPTR)
57 57
58typedef struct drm_r128_freelist { 58typedef struct drm_r128_freelist {
59 unsigned int age; 59 unsigned int age;
@@ -144,23 +144,23 @@ extern int r128_engine_reset(struct drm_device *dev, void *data, struct drm_file
144extern int r128_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv); 144extern int r128_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv);
145extern int r128_cce_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv); 145extern int r128_cce_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv);
146 146
147extern void r128_freelist_reset(struct drm_device * dev); 147extern void r128_freelist_reset(struct drm_device *dev);
148 148
149extern int r128_wait_ring(drm_r128_private_t * dev_priv, int n); 149extern int r128_wait_ring(drm_r128_private_t *dev_priv, int n);
150 150
151extern int r128_do_cce_idle(drm_r128_private_t * dev_priv); 151extern int r128_do_cce_idle(drm_r128_private_t *dev_priv);
152extern int r128_do_cleanup_cce(struct drm_device * dev); 152extern int r128_do_cleanup_cce(struct drm_device *dev);
153 153
154extern int r128_enable_vblank(struct drm_device *dev, int crtc); 154extern int r128_enable_vblank(struct drm_device *dev, int crtc);
155extern void r128_disable_vblank(struct drm_device *dev, int crtc); 155extern void r128_disable_vblank(struct drm_device *dev, int crtc);
156extern u32 r128_get_vblank_counter(struct drm_device *dev, int crtc); 156extern u32 r128_get_vblank_counter(struct drm_device *dev, int crtc);
157extern irqreturn_t r128_driver_irq_handler(DRM_IRQ_ARGS); 157extern irqreturn_t r128_driver_irq_handler(DRM_IRQ_ARGS);
158extern void r128_driver_irq_preinstall(struct drm_device * dev); 158extern void r128_driver_irq_preinstall(struct drm_device *dev);
159extern int r128_driver_irq_postinstall(struct drm_device *dev); 159extern int r128_driver_irq_postinstall(struct drm_device *dev);
160extern void r128_driver_irq_uninstall(struct drm_device * dev); 160extern void r128_driver_irq_uninstall(struct drm_device *dev);
161extern void r128_driver_lastclose(struct drm_device * dev); 161extern void r128_driver_lastclose(struct drm_device *dev);
162extern int r128_driver_load(struct drm_device * dev, unsigned long flags); 162extern int r128_driver_load(struct drm_device *dev, unsigned long flags);
163extern void r128_driver_preclose(struct drm_device * dev, 163extern void r128_driver_preclose(struct drm_device *dev,
164 struct drm_file *file_priv); 164 struct drm_file *file_priv);
165 165
166extern long r128_compat_ioctl(struct file *filp, unsigned int cmd, 166extern long r128_compat_ioctl(struct file *filp, unsigned int cmd,
@@ -390,27 +390,27 @@ extern long r128_compat_ioctl(struct file *filp, unsigned int cmd,
390 390
391#define R128_PCIGART_TABLE_SIZE 32768 391#define R128_PCIGART_TABLE_SIZE 32768
392 392
393#define R128_READ(reg) DRM_READ32( dev_priv->mmio, (reg) ) 393#define R128_READ(reg) DRM_READ32(dev_priv->mmio, (reg))
394#define R128_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) ) 394#define R128_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val))
395#define R128_READ8(reg) DRM_READ8( dev_priv->mmio, (reg) ) 395#define R128_READ8(reg) DRM_READ8(dev_priv->mmio, (reg))
396#define R128_WRITE8(reg,val) DRM_WRITE8( dev_priv->mmio, (reg), (val) ) 396#define R128_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val))
397 397
398#define R128_WRITE_PLL(addr,val) \ 398#define R128_WRITE_PLL(addr, val) \
399do { \ 399do { \
400 R128_WRITE8(R128_CLOCK_CNTL_INDEX, \ 400 R128_WRITE8(R128_CLOCK_CNTL_INDEX, \
401 ((addr) & 0x1f) | R128_PLL_WR_EN); \ 401 ((addr) & 0x1f) | R128_PLL_WR_EN); \
402 R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \ 402 R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \
403} while (0) 403} while (0)
404 404
405#define CCE_PACKET0( reg, n ) (R128_CCE_PACKET0 | \ 405#define CCE_PACKET0(reg, n) (R128_CCE_PACKET0 | \
406 ((n) << 16) | ((reg) >> 2)) 406 ((n) << 16) | ((reg) >> 2))
407#define CCE_PACKET1( reg0, reg1 ) (R128_CCE_PACKET1 | \ 407#define CCE_PACKET1(reg0, reg1) (R128_CCE_PACKET1 | \
408 (((reg1) >> 2) << 11) | ((reg0) >> 2)) 408 (((reg1) >> 2) << 11) | ((reg0) >> 2))
409#define CCE_PACKET2() (R128_CCE_PACKET2) 409#define CCE_PACKET2() (R128_CCE_PACKET2)
410#define CCE_PACKET3( pkt, n ) (R128_CCE_PACKET3 | \ 410#define CCE_PACKET3(pkt, n) (R128_CCE_PACKET3 | \
411 (pkt) | ((n) << 16)) 411 (pkt) | ((n) << 16))
412 412
413static __inline__ void r128_update_ring_snapshot(drm_r128_private_t * dev_priv) 413static __inline__ void r128_update_ring_snapshot(drm_r128_private_t *dev_priv)
414{ 414{
415 drm_r128_ring_buffer_t *ring = &dev_priv->ring; 415 drm_r128_ring_buffer_t *ring = &dev_priv->ring;
416 ring->space = (GET_RING_HEAD(dev_priv) - ring->tail) * sizeof(u32); 416 ring->space = (GET_RING_HEAD(dev_priv) - ring->tail) * sizeof(u32);
@@ -430,37 +430,38 @@ do { \
430 } \ 430 } \
431} while (0) 431} while (0)
432 432
433#define RING_SPACE_TEST_WITH_RETURN( dev_priv ) \ 433#define RING_SPACE_TEST_WITH_RETURN(dev_priv) \
434do { \ 434do { \
435 drm_r128_ring_buffer_t *ring = &dev_priv->ring; int i; \ 435 drm_r128_ring_buffer_t *ring = &dev_priv->ring; int i; \
436 if ( ring->space < ring->high_mark ) { \ 436 if (ring->space < ring->high_mark) { \
437 for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { \ 437 for (i = 0 ; i < dev_priv->usec_timeout ; i++) { \
438 r128_update_ring_snapshot( dev_priv ); \ 438 r128_update_ring_snapshot(dev_priv); \
439 if ( ring->space >= ring->high_mark ) \ 439 if (ring->space >= ring->high_mark) \
440 goto __ring_space_done; \ 440 goto __ring_space_done; \
441 DRM_UDELAY(1); \ 441 DRM_UDELAY(1); \
442 } \ 442 } \
443 DRM_ERROR( "ring space check failed!\n" ); \ 443 DRM_ERROR("ring space check failed!\n"); \
444 return -EBUSY; \ 444 return -EBUSY; \
445 } \ 445 } \
446 __ring_space_done: \ 446 __ring_space_done: \
447 ; \ 447 ; \
448} while (0) 448} while (0)
449 449
450#define VB_AGE_TEST_WITH_RETURN( dev_priv ) \ 450#define VB_AGE_TEST_WITH_RETURN(dev_priv) \
451do { \ 451do { \
452 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; \ 452 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; \
453 if ( sarea_priv->last_dispatch >= R128_MAX_VB_AGE ) { \ 453 if (sarea_priv->last_dispatch >= R128_MAX_VB_AGE) { \
454 int __ret = r128_do_cce_idle( dev_priv ); \ 454 int __ret = r128_do_cce_idle(dev_priv); \
455 if ( __ret ) return __ret; \ 455 if (__ret) \
456 return __ret; \
456 sarea_priv->last_dispatch = 0; \ 457 sarea_priv->last_dispatch = 0; \
457 r128_freelist_reset( dev ); \ 458 r128_freelist_reset(dev); \
458 } \ 459 } \
459} while (0) 460} while (0)
460 461
461#define R128_WAIT_UNTIL_PAGE_FLIPPED() do { \ 462#define R128_WAIT_UNTIL_PAGE_FLIPPED() do { \
462 OUT_RING( CCE_PACKET0( R128_WAIT_UNTIL, 0 ) ); \ 463 OUT_RING(CCE_PACKET0(R128_WAIT_UNTIL, 0)); \
463 OUT_RING( R128_EVENT_CRTC_OFFSET ); \ 464 OUT_RING(R128_EVENT_CRTC_OFFSET); \
464} while (0) 465} while (0)
465 466
466/* ================================================================ 467/* ================================================================
@@ -472,13 +473,12 @@ do { \
472#define RING_LOCALS \ 473#define RING_LOCALS \
473 int write, _nr; unsigned int tail_mask; volatile u32 *ring; 474 int write, _nr; unsigned int tail_mask; volatile u32 *ring;
474 475
475#define BEGIN_RING( n ) do { \ 476#define BEGIN_RING(n) do { \
476 if ( R128_VERBOSE ) { \ 477 if (R128_VERBOSE) \
477 DRM_INFO( "BEGIN_RING( %d )\n", (n)); \ 478 DRM_INFO("BEGIN_RING(%d)\n", (n)); \
478 } \ 479 if (dev_priv->ring.space <= (n) * sizeof(u32)) { \
479 if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \
480 COMMIT_RING(); \ 480 COMMIT_RING(); \
481 r128_wait_ring( dev_priv, (n) * sizeof(u32) ); \ 481 r128_wait_ring(dev_priv, (n) * sizeof(u32)); \
482 } \ 482 } \
483 _nr = n; dev_priv->ring.space -= (n) * sizeof(u32); \ 483 _nr = n; dev_priv->ring.space -= (n) * sizeof(u32); \
484 ring = dev_priv->ring.start; \ 484 ring = dev_priv->ring.start; \
@@ -494,40 +494,36 @@ do { \
494#define R128_BROKEN_CCE 1 494#define R128_BROKEN_CCE 1
495 495
496#define ADVANCE_RING() do { \ 496#define ADVANCE_RING() do { \
497 if ( R128_VERBOSE ) { \ 497 if (R128_VERBOSE) \
498 DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \ 498 DRM_INFO("ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \
499 write, dev_priv->ring.tail ); \ 499 write, dev_priv->ring.tail); \
500 } \ 500 if (R128_BROKEN_CCE && write < 32) \
501 if ( R128_BROKEN_CCE && write < 32 ) { \ 501 memcpy(dev_priv->ring.end, \
502 memcpy( dev_priv->ring.end, \ 502 dev_priv->ring.start, \
503 dev_priv->ring.start, \ 503 write * sizeof(u32)); \
504 write * sizeof(u32) ); \ 504 if (((dev_priv->ring.tail + _nr) & tail_mask) != write) \
505 } \
506 if (((dev_priv->ring.tail + _nr) & tail_mask) != write) { \
507 DRM_ERROR( \ 505 DRM_ERROR( \
508 "ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n", \ 506 "ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n", \
509 ((dev_priv->ring.tail + _nr) & tail_mask), \ 507 ((dev_priv->ring.tail + _nr) & tail_mask), \
510 write, __LINE__); \ 508 write, __LINE__); \
511 } else \ 509 else \
512 dev_priv->ring.tail = write; \ 510 dev_priv->ring.tail = write; \
513} while (0) 511} while (0)
514 512
515#define COMMIT_RING() do { \ 513#define COMMIT_RING() do { \
516 if ( R128_VERBOSE ) { \ 514 if (R128_VERBOSE) \
517 DRM_INFO( "COMMIT_RING() tail=0x%06x\n", \ 515 DRM_INFO("COMMIT_RING() tail=0x%06x\n", \
518 dev_priv->ring.tail ); \ 516 dev_priv->ring.tail); \
519 } \
520 DRM_MEMORYBARRIER(); \ 517 DRM_MEMORYBARRIER(); \
521 R128_WRITE( R128_PM4_BUFFER_DL_WPTR, dev_priv->ring.tail ); \ 518 R128_WRITE(R128_PM4_BUFFER_DL_WPTR, dev_priv->ring.tail); \
522 R128_READ( R128_PM4_BUFFER_DL_WPTR ); \ 519 R128_READ(R128_PM4_BUFFER_DL_WPTR); \
523} while (0) 520} while (0)
524 521
525#define OUT_RING( x ) do { \ 522#define OUT_RING(x) do { \
526 if ( R128_VERBOSE ) { \ 523 if (R128_VERBOSE) \
527 DRM_INFO( " OUT_RING( 0x%08x ) at 0x%x\n", \ 524 DRM_INFO(" OUT_RING( 0x%08x ) at 0x%x\n", \
528 (unsigned int)(x), write ); \ 525 (unsigned int)(x), write); \
529 } \ 526 ring[write++] = cpu_to_le32(x); \
530 ring[write++] = cpu_to_le32( x ); \
531 write &= tail_mask; \ 527 write &= tail_mask; \
532} while (0) 528} while (0)
533 529
diff --git a/drivers/gpu/drm/r128/r128_irq.c b/drivers/gpu/drm/r128/r128_irq.c
index 69810fb8ac49..429d5a02695f 100644
--- a/drivers/gpu/drm/r128/r128_irq.c
+++ b/drivers/gpu/drm/r128/r128_irq.c
@@ -90,7 +90,7 @@ void r128_disable_vblank(struct drm_device *dev, int crtc)
90 */ 90 */
91} 91}
92 92
93void r128_driver_irq_preinstall(struct drm_device * dev) 93void r128_driver_irq_preinstall(struct drm_device *dev)
94{ 94{
95 drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private; 95 drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private;
96 96
@@ -105,7 +105,7 @@ int r128_driver_irq_postinstall(struct drm_device *dev)
105 return 0; 105 return 0;
106} 106}
107 107
108void r128_driver_irq_uninstall(struct drm_device * dev) 108void r128_driver_irq_uninstall(struct drm_device *dev)
109{ 109{
110 drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private; 110 drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private;
111 if (!dev_priv) 111 if (!dev_priv)
diff --git a/drivers/gpu/drm/r128/r128_state.c b/drivers/gpu/drm/r128/r128_state.c
index af2665cf4718..077af1f2f9b4 100644
--- a/drivers/gpu/drm/r128/r128_state.c
+++ b/drivers/gpu/drm/r128/r128_state.c
@@ -37,8 +37,8 @@
37 * CCE hardware state programming functions 37 * CCE hardware state programming functions
38 */ 38 */
39 39
40static void r128_emit_clip_rects(drm_r128_private_t * dev_priv, 40static void r128_emit_clip_rects(drm_r128_private_t *dev_priv,
41 struct drm_clip_rect * boxes, int count) 41 struct drm_clip_rect *boxes, int count)
42{ 42{
43 u32 aux_sc_cntl = 0x00000000; 43 u32 aux_sc_cntl = 0x00000000;
44 RING_LOCALS; 44 RING_LOCALS;
@@ -80,7 +80,7 @@ static void r128_emit_clip_rects(drm_r128_private_t * dev_priv,
80 ADVANCE_RING(); 80 ADVANCE_RING();
81} 81}
82 82
83static __inline__ void r128_emit_core(drm_r128_private_t * dev_priv) 83static __inline__ void r128_emit_core(drm_r128_private_t *dev_priv)
84{ 84{
85 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 85 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
86 drm_r128_context_regs_t *ctx = &sarea_priv->context_state; 86 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
@@ -95,7 +95,7 @@ static __inline__ void r128_emit_core(drm_r128_private_t * dev_priv)
95 ADVANCE_RING(); 95 ADVANCE_RING();
96} 96}
97 97
98static __inline__ void r128_emit_context(drm_r128_private_t * dev_priv) 98static __inline__ void r128_emit_context(drm_r128_private_t *dev_priv)
99{ 99{
100 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 100 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
101 drm_r128_context_regs_t *ctx = &sarea_priv->context_state; 101 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
@@ -121,7 +121,7 @@ static __inline__ void r128_emit_context(drm_r128_private_t * dev_priv)
121 ADVANCE_RING(); 121 ADVANCE_RING();
122} 122}
123 123
124static __inline__ void r128_emit_setup(drm_r128_private_t * dev_priv) 124static __inline__ void r128_emit_setup(drm_r128_private_t *dev_priv)
125{ 125{
126 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 126 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
127 drm_r128_context_regs_t *ctx = &sarea_priv->context_state; 127 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
@@ -137,7 +137,7 @@ static __inline__ void r128_emit_setup(drm_r128_private_t * dev_priv)
137 ADVANCE_RING(); 137 ADVANCE_RING();
138} 138}
139 139
140static __inline__ void r128_emit_masks(drm_r128_private_t * dev_priv) 140static __inline__ void r128_emit_masks(drm_r128_private_t *dev_priv)
141{ 141{
142 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 142 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
143 drm_r128_context_regs_t *ctx = &sarea_priv->context_state; 143 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
@@ -156,7 +156,7 @@ static __inline__ void r128_emit_masks(drm_r128_private_t * dev_priv)
156 ADVANCE_RING(); 156 ADVANCE_RING();
157} 157}
158 158
159static __inline__ void r128_emit_window(drm_r128_private_t * dev_priv) 159static __inline__ void r128_emit_window(drm_r128_private_t *dev_priv)
160{ 160{
161 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 161 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
162 drm_r128_context_regs_t *ctx = &sarea_priv->context_state; 162 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
@@ -171,7 +171,7 @@ static __inline__ void r128_emit_window(drm_r128_private_t * dev_priv)
171 ADVANCE_RING(); 171 ADVANCE_RING();
172} 172}
173 173
174static __inline__ void r128_emit_tex0(drm_r128_private_t * dev_priv) 174static __inline__ void r128_emit_tex0(drm_r128_private_t *dev_priv)
175{ 175{
176 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 176 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
177 drm_r128_context_regs_t *ctx = &sarea_priv->context_state; 177 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
@@ -187,9 +187,8 @@ static __inline__ void r128_emit_tex0(drm_r128_private_t * dev_priv)
187 OUT_RING(tex->tex_cntl); 187 OUT_RING(tex->tex_cntl);
188 OUT_RING(tex->tex_combine_cntl); 188 OUT_RING(tex->tex_combine_cntl);
189 OUT_RING(ctx->tex_size_pitch_c); 189 OUT_RING(ctx->tex_size_pitch_c);
190 for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++) { 190 for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++)
191 OUT_RING(tex->tex_offset[i]); 191 OUT_RING(tex->tex_offset[i]);
192 }
193 192
194 OUT_RING(CCE_PACKET0(R128_CONSTANT_COLOR_C, 1)); 193 OUT_RING(CCE_PACKET0(R128_CONSTANT_COLOR_C, 1));
195 OUT_RING(ctx->constant_color_c); 194 OUT_RING(ctx->constant_color_c);
@@ -198,7 +197,7 @@ static __inline__ void r128_emit_tex0(drm_r128_private_t * dev_priv)
198 ADVANCE_RING(); 197 ADVANCE_RING();
199} 198}
200 199
201static __inline__ void r128_emit_tex1(drm_r128_private_t * dev_priv) 200static __inline__ void r128_emit_tex1(drm_r128_private_t *dev_priv)
202{ 201{
203 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 202 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
204 drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[1]; 203 drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[1];
@@ -211,9 +210,8 @@ static __inline__ void r128_emit_tex1(drm_r128_private_t * dev_priv)
211 OUT_RING(CCE_PACKET0(R128_SEC_TEX_CNTL_C, 1 + R128_MAX_TEXTURE_LEVELS)); 210 OUT_RING(CCE_PACKET0(R128_SEC_TEX_CNTL_C, 1 + R128_MAX_TEXTURE_LEVELS));
212 OUT_RING(tex->tex_cntl); 211 OUT_RING(tex->tex_cntl);
213 OUT_RING(tex->tex_combine_cntl); 212 OUT_RING(tex->tex_combine_cntl);
214 for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++) { 213 for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++)
215 OUT_RING(tex->tex_offset[i]); 214 OUT_RING(tex->tex_offset[i]);
216 }
217 215
218 OUT_RING(CCE_PACKET0(R128_SEC_TEXTURE_BORDER_COLOR_C, 0)); 216 OUT_RING(CCE_PACKET0(R128_SEC_TEXTURE_BORDER_COLOR_C, 0));
219 OUT_RING(tex->tex_border_color); 217 OUT_RING(tex->tex_border_color);
@@ -221,7 +219,7 @@ static __inline__ void r128_emit_tex1(drm_r128_private_t * dev_priv)
221 ADVANCE_RING(); 219 ADVANCE_RING();
222} 220}
223 221
224static void r128_emit_state(drm_r128_private_t * dev_priv) 222static void r128_emit_state(drm_r128_private_t *dev_priv)
225{ 223{
226 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 224 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
227 unsigned int dirty = sarea_priv->dirty; 225 unsigned int dirty = sarea_priv->dirty;
@@ -274,7 +272,7 @@ static void r128_emit_state(drm_r128_private_t * dev_priv)
274 * Performance monitoring functions 272 * Performance monitoring functions
275 */ 273 */
276 274
277static void r128_clear_box(drm_r128_private_t * dev_priv, 275static void r128_clear_box(drm_r128_private_t *dev_priv,
278 int x, int y, int w, int h, int r, int g, int b) 276 int x, int y, int w, int h, int r, int g, int b)
279{ 277{
280 u32 pitch, offset; 278 u32 pitch, offset;
@@ -321,13 +319,12 @@ static void r128_clear_box(drm_r128_private_t * dev_priv,
321 ADVANCE_RING(); 319 ADVANCE_RING();
322} 320}
323 321
324static void r128_cce_performance_boxes(drm_r128_private_t * dev_priv) 322static void r128_cce_performance_boxes(drm_r128_private_t *dev_priv)
325{ 323{
326 if (atomic_read(&dev_priv->idle_count) == 0) { 324 if (atomic_read(&dev_priv->idle_count) == 0)
327 r128_clear_box(dev_priv, 64, 4, 8, 8, 0, 255, 0); 325 r128_clear_box(dev_priv, 64, 4, 8, 8, 0, 255, 0);
328 } else { 326 else
329 atomic_set(&dev_priv->idle_count, 0); 327 atomic_set(&dev_priv->idle_count, 0);
330 }
331} 328}
332 329
333#endif 330#endif
@@ -352,8 +349,8 @@ static void r128_print_dirty(const char *msg, unsigned int flags)
352 (flags & R128_REQUIRE_QUIESCENCE) ? "quiescence, " : ""); 349 (flags & R128_REQUIRE_QUIESCENCE) ? "quiescence, " : "");
353} 350}
354 351
355static void r128_cce_dispatch_clear(struct drm_device * dev, 352static void r128_cce_dispatch_clear(struct drm_device *dev,
356 drm_r128_clear_t * clear) 353 drm_r128_clear_t *clear)
357{ 354{
358 drm_r128_private_t *dev_priv = dev->dev_private; 355 drm_r128_private_t *dev_priv = dev->dev_private;
359 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 356 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -458,7 +455,7 @@ static void r128_cce_dispatch_clear(struct drm_device * dev,
458 } 455 }
459} 456}
460 457
461static void r128_cce_dispatch_swap(struct drm_device * dev) 458static void r128_cce_dispatch_swap(struct drm_device *dev)
462{ 459{
463 drm_r128_private_t *dev_priv = dev->dev_private; 460 drm_r128_private_t *dev_priv = dev->dev_private;
464 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 461 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -524,7 +521,7 @@ static void r128_cce_dispatch_swap(struct drm_device * dev)
524 ADVANCE_RING(); 521 ADVANCE_RING();
525} 522}
526 523
527static void r128_cce_dispatch_flip(struct drm_device * dev) 524static void r128_cce_dispatch_flip(struct drm_device *dev)
528{ 525{
529 drm_r128_private_t *dev_priv = dev->dev_private; 526 drm_r128_private_t *dev_priv = dev->dev_private;
530 RING_LOCALS; 527 RING_LOCALS;
@@ -542,11 +539,10 @@ static void r128_cce_dispatch_flip(struct drm_device * dev)
542 R128_WAIT_UNTIL_PAGE_FLIPPED(); 539 R128_WAIT_UNTIL_PAGE_FLIPPED();
543 OUT_RING(CCE_PACKET0(R128_CRTC_OFFSET, 0)); 540 OUT_RING(CCE_PACKET0(R128_CRTC_OFFSET, 0));
544 541
545 if (dev_priv->current_page == 0) { 542 if (dev_priv->current_page == 0)
546 OUT_RING(dev_priv->back_offset); 543 OUT_RING(dev_priv->back_offset);
547 } else { 544 else
548 OUT_RING(dev_priv->front_offset); 545 OUT_RING(dev_priv->front_offset);
549 }
550 546
551 ADVANCE_RING(); 547 ADVANCE_RING();
552 548
@@ -566,7 +562,7 @@ static void r128_cce_dispatch_flip(struct drm_device * dev)
566 ADVANCE_RING(); 562 ADVANCE_RING();
567} 563}
568 564
569static void r128_cce_dispatch_vertex(struct drm_device * dev, struct drm_buf * buf) 565static void r128_cce_dispatch_vertex(struct drm_device *dev, struct drm_buf *buf)
570{ 566{
571 drm_r128_private_t *dev_priv = dev->dev_private; 567 drm_r128_private_t *dev_priv = dev->dev_private;
572 drm_r128_buf_priv_t *buf_priv = buf->dev_private; 568 drm_r128_buf_priv_t *buf_priv = buf->dev_private;
@@ -585,9 +581,8 @@ static void r128_cce_dispatch_vertex(struct drm_device * dev, struct drm_buf * b
585 if (buf->used) { 581 if (buf->used) {
586 buf_priv->dispatched = 1; 582 buf_priv->dispatched = 1;
587 583
588 if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS) { 584 if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS)
589 r128_emit_state(dev_priv); 585 r128_emit_state(dev_priv);
590 }
591 586
592 do { 587 do {
593 /* Emit the next set of up to three cliprects */ 588 /* Emit the next set of up to three cliprects */
@@ -636,8 +631,8 @@ static void r128_cce_dispatch_vertex(struct drm_device * dev, struct drm_buf * b
636 sarea_priv->nbox = 0; 631 sarea_priv->nbox = 0;
637} 632}
638 633
639static void r128_cce_dispatch_indirect(struct drm_device * dev, 634static void r128_cce_dispatch_indirect(struct drm_device *dev,
640 struct drm_buf * buf, int start, int end) 635 struct drm_buf *buf, int start, int end)
641{ 636{
642 drm_r128_private_t *dev_priv = dev->dev_private; 637 drm_r128_private_t *dev_priv = dev->dev_private;
643 drm_r128_buf_priv_t *buf_priv = buf->dev_private; 638 drm_r128_buf_priv_t *buf_priv = buf->dev_private;
@@ -691,8 +686,8 @@ static void r128_cce_dispatch_indirect(struct drm_device * dev,
691 dev_priv->sarea_priv->last_dispatch++; 686 dev_priv->sarea_priv->last_dispatch++;
692} 687}
693 688
694static void r128_cce_dispatch_indices(struct drm_device * dev, 689static void r128_cce_dispatch_indices(struct drm_device *dev,
695 struct drm_buf * buf, 690 struct drm_buf *buf,
696 int start, int end, int count) 691 int start, int end, int count)
697{ 692{
698 drm_r128_private_t *dev_priv = dev->dev_private; 693 drm_r128_private_t *dev_priv = dev->dev_private;
@@ -713,9 +708,8 @@ static void r128_cce_dispatch_indices(struct drm_device * dev,
713 if (start != end) { 708 if (start != end) {
714 buf_priv->dispatched = 1; 709 buf_priv->dispatched = 1;
715 710
716 if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS) { 711 if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS)
717 r128_emit_state(dev_priv); 712 r128_emit_state(dev_priv);
718 }
719 713
720 dwords = (end - start + 3) / sizeof(u32); 714 dwords = (end - start + 3) / sizeof(u32);
721 715
@@ -775,9 +769,9 @@ static void r128_cce_dispatch_indices(struct drm_device * dev,
775 sarea_priv->nbox = 0; 769 sarea_priv->nbox = 0;
776} 770}
777 771
778static int r128_cce_dispatch_blit(struct drm_device * dev, 772static int r128_cce_dispatch_blit(struct drm_device *dev,
779 struct drm_file *file_priv, 773 struct drm_file *file_priv,
780 drm_r128_blit_t * blit) 774 drm_r128_blit_t *blit)
781{ 775{
782 drm_r128_private_t *dev_priv = dev->dev_private; 776 drm_r128_private_t *dev_priv = dev->dev_private;
783 struct drm_device_dma *dma = dev->dma; 777 struct drm_device_dma *dma = dev->dma;
@@ -887,8 +881,8 @@ static int r128_cce_dispatch_blit(struct drm_device * dev,
887 * have hardware stencil support. 881 * have hardware stencil support.
888 */ 882 */
889 883
890static int r128_cce_dispatch_write_span(struct drm_device * dev, 884static int r128_cce_dispatch_write_span(struct drm_device *dev,
891 drm_r128_depth_t * depth) 885 drm_r128_depth_t *depth)
892{ 886{
893 drm_r128_private_t *dev_priv = dev->dev_private; 887 drm_r128_private_t *dev_priv = dev->dev_private;
894 int count, x, y; 888 int count, x, y;
@@ -902,12 +896,10 @@ static int r128_cce_dispatch_write_span(struct drm_device * dev,
902 if (count > 4096 || count <= 0) 896 if (count > 4096 || count <= 0)
903 return -EMSGSIZE; 897 return -EMSGSIZE;
904 898
905 if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x))) { 899 if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x)))
906 return -EFAULT; 900 return -EFAULT;
907 } 901 if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y)))
908 if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y))) {
909 return -EFAULT; 902 return -EFAULT;
910 }
911 903
912 buffer_size = depth->n * sizeof(u32); 904 buffer_size = depth->n * sizeof(u32);
913 buffer = kmalloc(buffer_size, GFP_KERNEL); 905 buffer = kmalloc(buffer_size, GFP_KERNEL);
@@ -983,8 +975,8 @@ static int r128_cce_dispatch_write_span(struct drm_device * dev,
983 return 0; 975 return 0;
984} 976}
985 977
986static int r128_cce_dispatch_write_pixels(struct drm_device * dev, 978static int r128_cce_dispatch_write_pixels(struct drm_device *dev,
987 drm_r128_depth_t * depth) 979 drm_r128_depth_t *depth)
988{ 980{
989 drm_r128_private_t *dev_priv = dev->dev_private; 981 drm_r128_private_t *dev_priv = dev->dev_private;
990 int count, *x, *y; 982 int count, *x, *y;
@@ -1001,9 +993,8 @@ static int r128_cce_dispatch_write_pixels(struct drm_device * dev,
1001 xbuf_size = count * sizeof(*x); 993 xbuf_size = count * sizeof(*x);
1002 ybuf_size = count * sizeof(*y); 994 ybuf_size = count * sizeof(*y);
1003 x = kmalloc(xbuf_size, GFP_KERNEL); 995 x = kmalloc(xbuf_size, GFP_KERNEL);
1004 if (x == NULL) { 996 if (x == NULL)
1005 return -ENOMEM; 997 return -ENOMEM;
1006 }
1007 y = kmalloc(ybuf_size, GFP_KERNEL); 998 y = kmalloc(ybuf_size, GFP_KERNEL);
1008 if (y == NULL) { 999 if (y == NULL) {
1009 kfree(x); 1000 kfree(x);
@@ -1105,8 +1096,8 @@ static int r128_cce_dispatch_write_pixels(struct drm_device * dev,
1105 return 0; 1096 return 0;
1106} 1097}
1107 1098
1108static int r128_cce_dispatch_read_span(struct drm_device * dev, 1099static int r128_cce_dispatch_read_span(struct drm_device *dev,
1109 drm_r128_depth_t * depth) 1100 drm_r128_depth_t *depth)
1110{ 1101{
1111 drm_r128_private_t *dev_priv = dev->dev_private; 1102 drm_r128_private_t *dev_priv = dev->dev_private;
1112 int count, x, y; 1103 int count, x, y;
@@ -1117,12 +1108,10 @@ static int r128_cce_dispatch_read_span(struct drm_device * dev,
1117 if (count > 4096 || count <= 0) 1108 if (count > 4096 || count <= 0)
1118 return -EMSGSIZE; 1109 return -EMSGSIZE;
1119 1110
1120 if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x))) { 1111 if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x)))
1121 return -EFAULT; 1112 return -EFAULT;
1122 } 1113 if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y)))
1123 if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y))) {
1124 return -EFAULT; 1114 return -EFAULT;
1125 }
1126 1115
1127 BEGIN_RING(7); 1116 BEGIN_RING(7);
1128 1117
@@ -1148,8 +1137,8 @@ static int r128_cce_dispatch_read_span(struct drm_device * dev,
1148 return 0; 1137 return 0;
1149} 1138}
1150 1139
1151static int r128_cce_dispatch_read_pixels(struct drm_device * dev, 1140static int r128_cce_dispatch_read_pixels(struct drm_device *dev,
1152 drm_r128_depth_t * depth) 1141 drm_r128_depth_t *depth)
1153{ 1142{
1154 drm_r128_private_t *dev_priv = dev->dev_private; 1143 drm_r128_private_t *dev_priv = dev->dev_private;
1155 int count, *x, *y; 1144 int count, *x, *y;
@@ -1161,16 +1150,14 @@ static int r128_cce_dispatch_read_pixels(struct drm_device * dev,
1161 if (count > 4096 || count <= 0) 1150 if (count > 4096 || count <= 0)
1162 return -EMSGSIZE; 1151 return -EMSGSIZE;
1163 1152
1164 if (count > dev_priv->depth_pitch) { 1153 if (count > dev_priv->depth_pitch)
1165 count = dev_priv->depth_pitch; 1154 count = dev_priv->depth_pitch;
1166 }
1167 1155
1168 xbuf_size = count * sizeof(*x); 1156 xbuf_size = count * sizeof(*x);
1169 ybuf_size = count * sizeof(*y); 1157 ybuf_size = count * sizeof(*y);
1170 x = kmalloc(xbuf_size, GFP_KERNEL); 1158 x = kmalloc(xbuf_size, GFP_KERNEL);
1171 if (x == NULL) { 1159 if (x == NULL)
1172 return -ENOMEM; 1160 return -ENOMEM;
1173 }
1174 y = kmalloc(ybuf_size, GFP_KERNEL); 1161 y = kmalloc(ybuf_size, GFP_KERNEL);
1175 if (y == NULL) { 1162 if (y == NULL) {
1176 kfree(x); 1163 kfree(x);
@@ -1220,7 +1207,7 @@ static int r128_cce_dispatch_read_pixels(struct drm_device * dev,
1220 * Polygon stipple 1207 * Polygon stipple
1221 */ 1208 */
1222 1209
1223static void r128_cce_dispatch_stipple(struct drm_device * dev, u32 * stipple) 1210static void r128_cce_dispatch_stipple(struct drm_device *dev, u32 *stipple)
1224{ 1211{
1225 drm_r128_private_t *dev_priv = dev->dev_private; 1212 drm_r128_private_t *dev_priv = dev->dev_private;
1226 int i; 1213 int i;
@@ -1230,9 +1217,8 @@ static void r128_cce_dispatch_stipple(struct drm_device * dev, u32 * stipple)
1230 BEGIN_RING(33); 1217 BEGIN_RING(33);
1231 1218
1232 OUT_RING(CCE_PACKET0(R128_BRUSH_DATA0, 31)); 1219 OUT_RING(CCE_PACKET0(R128_BRUSH_DATA0, 31));
1233 for (i = 0; i < 32; i++) { 1220 for (i = 0; i < 32; i++)
1234 OUT_RING(stipple[i]); 1221 OUT_RING(stipple[i]);
1235 }
1236 1222
1237 ADVANCE_RING(); 1223 ADVANCE_RING();
1238} 1224}
@@ -1269,7 +1255,7 @@ static int r128_cce_clear(struct drm_device *dev, void *data, struct drm_file *f
1269 return 0; 1255 return 0;
1270} 1256}
1271 1257
1272static int r128_do_init_pageflip(struct drm_device * dev) 1258static int r128_do_init_pageflip(struct drm_device *dev)
1273{ 1259{
1274 drm_r128_private_t *dev_priv = dev->dev_private; 1260 drm_r128_private_t *dev_priv = dev->dev_private;
1275 DRM_DEBUG("\n"); 1261 DRM_DEBUG("\n");
@@ -1288,7 +1274,7 @@ static int r128_do_init_pageflip(struct drm_device * dev)
1288 return 0; 1274 return 0;
1289} 1275}
1290 1276
1291static int r128_do_cleanup_pageflip(struct drm_device * dev) 1277static int r128_do_cleanup_pageflip(struct drm_device *dev)
1292{ 1278{
1293 drm_r128_private_t *dev_priv = dev->dev_private; 1279 drm_r128_private_t *dev_priv = dev->dev_private;
1294 DRM_DEBUG("\n"); 1280 DRM_DEBUG("\n");
@@ -1645,17 +1631,16 @@ static int r128_getparam(struct drm_device *dev, void *data, struct drm_file *fi
1645 return 0; 1631 return 0;
1646} 1632}
1647 1633
1648void r128_driver_preclose(struct drm_device * dev, struct drm_file *file_priv) 1634void r128_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
1649{ 1635{
1650 if (dev->dev_private) { 1636 if (dev->dev_private) {
1651 drm_r128_private_t *dev_priv = dev->dev_private; 1637 drm_r128_private_t *dev_priv = dev->dev_private;
1652 if (dev_priv->page_flipping) { 1638 if (dev_priv->page_flipping)
1653 r128_do_cleanup_pageflip(dev); 1639 r128_do_cleanup_pageflip(dev);
1654 }
1655 } 1640 }
1656} 1641}
1657 1642
1658void r128_driver_lastclose(struct drm_device * dev) 1643void r128_driver_lastclose(struct drm_device *dev)
1659{ 1644{
1660 r128_do_cleanup_cce(dev); 1645 r128_do_cleanup_cce(dev);
1661} 1646}
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index 84b1f2729d43..aebe00875041 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -69,5 +69,6 @@ radeon-y += radeon_device.o radeon_asic.o radeon_kms.o \
69 69
70radeon-$(CONFIG_COMPAT) += radeon_ioc32.o 70radeon-$(CONFIG_COMPAT) += radeon_ioc32.o
71radeon-$(CONFIG_VGA_SWITCHEROO) += radeon_atpx_handler.o 71radeon-$(CONFIG_VGA_SWITCHEROO) += radeon_atpx_handler.o
72radeon-$(CONFIG_ACPI) += radeon_acpi.o
72 73
73obj-$(CONFIG_DRM_RADEON)+= radeon.o 74obj-$(CONFIG_DRM_RADEON)+= radeon.o
diff --git a/drivers/gpu/drm/radeon/atom.c b/drivers/gpu/drm/radeon/atom.c
index 1d569830ed99..8e421f644a54 100644
--- a/drivers/gpu/drm/radeon/atom.c
+++ b/drivers/gpu/drm/radeon/atom.c
@@ -108,12 +108,11 @@ static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
108 base++; 108 base++;
109 break; 109 break;
110 case ATOM_IIO_READ: 110 case ATOM_IIO_READ:
111 temp = ctx->card->reg_read(ctx->card, CU16(base + 1)); 111 temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1));
112 base += 3; 112 base += 3;
113 break; 113 break;
114 case ATOM_IIO_WRITE: 114 case ATOM_IIO_WRITE:
115 (void)ctx->card->reg_read(ctx->card, CU16(base + 1)); 115 ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp);
116 ctx->card->reg_write(ctx->card, CU16(base + 1), temp);
117 base += 3; 116 base += 3;
118 break; 117 break;
119 case ATOM_IIO_CLEAR: 118 case ATOM_IIO_CLEAR:
@@ -715,8 +714,8 @@ static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
715 cjiffies = jiffies; 714 cjiffies = jiffies;
716 if (time_after(cjiffies, ctx->last_jump_jiffies)) { 715 if (time_after(cjiffies, ctx->last_jump_jiffies)) {
717 cjiffies -= ctx->last_jump_jiffies; 716 cjiffies -= ctx->last_jump_jiffies;
718 if ((jiffies_to_msecs(cjiffies) > 1000)) { 717 if ((jiffies_to_msecs(cjiffies) > 5000)) {
719 DRM_ERROR("atombios stuck in loop for more than 1sec aborting\n"); 718 DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
720 ctx->abort = true; 719 ctx->abort = true;
721 } 720 }
722 } else { 721 } else {
diff --git a/drivers/gpu/drm/radeon/atom.h b/drivers/gpu/drm/radeon/atom.h
index cd1b64ab5ca7..a589a55b223e 100644
--- a/drivers/gpu/drm/radeon/atom.h
+++ b/drivers/gpu/drm/radeon/atom.h
@@ -113,6 +113,8 @@ struct card_info {
113 struct drm_device *dev; 113 struct drm_device *dev;
114 void (* reg_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */ 114 void (* reg_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */
115 uint32_t (* reg_read)(struct card_info *, uint32_t); /* filled by driver */ 115 uint32_t (* reg_read)(struct card_info *, uint32_t); /* filled by driver */
116 void (* ioreg_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */
117 uint32_t (* ioreg_read)(struct card_info *, uint32_t); /* filled by driver */
116 void (* mc_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */ 118 void (* mc_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */
117 uint32_t (* mc_read)(struct card_info *, uint32_t); /* filled by driver */ 119 uint32_t (* mc_read)(struct card_info *, uint32_t); /* filled by driver */
118 void (* pll_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */ 120 void (* pll_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 8c2d6478a221..12ad512bd3d3 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -44,10 +44,6 @@ static void atombios_overscan_setup(struct drm_crtc *crtc,
44 44
45 memset(&args, 0, sizeof(args)); 45 memset(&args, 0, sizeof(args));
46 46
47 args.usOverscanRight = 0;
48 args.usOverscanLeft = 0;
49 args.usOverscanBottom = 0;
50 args.usOverscanTop = 0;
51 args.ucCRTC = radeon_crtc->crtc_id; 47 args.ucCRTC = radeon_crtc->crtc_id;
52 48
53 switch (radeon_crtc->rmx_type) { 49 switch (radeon_crtc->rmx_type) {
@@ -56,7 +52,6 @@ static void atombios_overscan_setup(struct drm_crtc *crtc,
56 args.usOverscanBottom = (adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2; 52 args.usOverscanBottom = (adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2;
57 args.usOverscanLeft = (adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2; 53 args.usOverscanLeft = (adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2;
58 args.usOverscanRight = (adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2; 54 args.usOverscanRight = (adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2;
59 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
60 break; 55 break;
61 case RMX_ASPECT: 56 case RMX_ASPECT:
62 a1 = mode->crtc_vdisplay * adjusted_mode->crtc_hdisplay; 57 a1 = mode->crtc_vdisplay * adjusted_mode->crtc_hdisplay;
@@ -69,17 +64,16 @@ static void atombios_overscan_setup(struct drm_crtc *crtc,
69 args.usOverscanLeft = (adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / 2; 64 args.usOverscanLeft = (adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / 2;
70 args.usOverscanRight = (adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / 2; 65 args.usOverscanRight = (adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / 2;
71 } 66 }
72 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
73 break; 67 break;
74 case RMX_FULL: 68 case RMX_FULL:
75 default: 69 default:
76 args.usOverscanRight = 0; 70 args.usOverscanRight = radeon_crtc->h_border;
77 args.usOverscanLeft = 0; 71 args.usOverscanLeft = radeon_crtc->h_border;
78 args.usOverscanBottom = 0; 72 args.usOverscanBottom = radeon_crtc->v_border;
79 args.usOverscanTop = 0; 73 args.usOverscanTop = radeon_crtc->v_border;
80 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
81 break; 74 break;
82 } 75 }
76 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
83} 77}
84 78
85static void atombios_scaler_setup(struct drm_crtc *crtc) 79static void atombios_scaler_setup(struct drm_crtc *crtc)
@@ -282,22 +276,22 @@ atombios_set_crtc_dtd_timing(struct drm_crtc *crtc,
282 u16 misc = 0; 276 u16 misc = 0;
283 277
284 memset(&args, 0, sizeof(args)); 278 memset(&args, 0, sizeof(args));
285 args.usH_Size = cpu_to_le16(mode->crtc_hdisplay); 279 args.usH_Size = cpu_to_le16(mode->crtc_hdisplay - (radeon_crtc->h_border * 2));
286 args.usH_Blanking_Time = 280 args.usH_Blanking_Time =
287 cpu_to_le16(mode->crtc_hblank_end - mode->crtc_hdisplay); 281 cpu_to_le16(mode->crtc_hblank_end - mode->crtc_hdisplay + (radeon_crtc->h_border * 2));
288 args.usV_Size = cpu_to_le16(mode->crtc_vdisplay); 282 args.usV_Size = cpu_to_le16(mode->crtc_vdisplay - (radeon_crtc->v_border * 2));
289 args.usV_Blanking_Time = 283 args.usV_Blanking_Time =
290 cpu_to_le16(mode->crtc_vblank_end - mode->crtc_vdisplay); 284 cpu_to_le16(mode->crtc_vblank_end - mode->crtc_vdisplay + (radeon_crtc->v_border * 2));
291 args.usH_SyncOffset = 285 args.usH_SyncOffset =
292 cpu_to_le16(mode->crtc_hsync_start - mode->crtc_hdisplay); 286 cpu_to_le16(mode->crtc_hsync_start - mode->crtc_hdisplay + radeon_crtc->h_border);
293 args.usH_SyncWidth = 287 args.usH_SyncWidth =
294 cpu_to_le16(mode->crtc_hsync_end - mode->crtc_hsync_start); 288 cpu_to_le16(mode->crtc_hsync_end - mode->crtc_hsync_start);
295 args.usV_SyncOffset = 289 args.usV_SyncOffset =
296 cpu_to_le16(mode->crtc_vsync_start - mode->crtc_vdisplay); 290 cpu_to_le16(mode->crtc_vsync_start - mode->crtc_vdisplay + radeon_crtc->v_border);
297 args.usV_SyncWidth = 291 args.usV_SyncWidth =
298 cpu_to_le16(mode->crtc_vsync_end - mode->crtc_vsync_start); 292 cpu_to_le16(mode->crtc_vsync_end - mode->crtc_vsync_start);
299 /*args.ucH_Border = mode->hborder;*/ 293 args.ucH_Border = radeon_crtc->h_border;
300 /*args.ucV_Border = mode->vborder;*/ 294 args.ucV_Border = radeon_crtc->v_border;
301 295
302 if (mode->flags & DRM_MODE_FLAG_NVSYNC) 296 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
303 misc |= ATOM_VSYNC_POLARITY; 297 misc |= ATOM_VSYNC_POLARITY;
@@ -669,56 +663,25 @@ static void atombios_crtc_set_dcpll(struct drm_crtc *crtc)
669 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); 663 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
670} 664}
671 665
672static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) 666static void atombios_crtc_program_pll(struct drm_crtc *crtc,
667 int crtc_id,
668 int pll_id,
669 u32 encoder_mode,
670 u32 encoder_id,
671 u32 clock,
672 u32 ref_div,
673 u32 fb_div,
674 u32 frac_fb_div,
675 u32 post_div)
673{ 676{
674 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
675 struct drm_device *dev = crtc->dev; 677 struct drm_device *dev = crtc->dev;
676 struct radeon_device *rdev = dev->dev_private; 678 struct radeon_device *rdev = dev->dev_private;
677 struct drm_encoder *encoder = NULL;
678 struct radeon_encoder *radeon_encoder = NULL;
679 u8 frev, crev; 679 u8 frev, crev;
680 int index; 680 int index = GetIndexIntoMasterTable(COMMAND, SetPixelClock);
681 union set_pixel_clock args; 681 union set_pixel_clock args;
682 u32 pll_clock = mode->clock;
683 u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0;
684 struct radeon_pll *pll;
685 u32 adjusted_clock;
686 int encoder_mode = 0;
687 682
688 memset(&args, 0, sizeof(args)); 683 memset(&args, 0, sizeof(args));
689 684
690 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
691 if (encoder->crtc == crtc) {
692 radeon_encoder = to_radeon_encoder(encoder);
693 encoder_mode = atombios_get_encoder_mode(encoder);
694 break;
695 }
696 }
697
698 if (!radeon_encoder)
699 return;
700
701 switch (radeon_crtc->pll_id) {
702 case ATOM_PPLL1:
703 pll = &rdev->clock.p1pll;
704 break;
705 case ATOM_PPLL2:
706 pll = &rdev->clock.p2pll;
707 break;
708 case ATOM_DCPLL:
709 case ATOM_PPLL_INVALID:
710 default:
711 pll = &rdev->clock.dcpll;
712 break;
713 }
714
715 /* adjust pixel clock as needed */
716 adjusted_clock = atombios_adjust_pll(crtc, mode, pll);
717
718 radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div,
719 &ref_div, &post_div);
720
721 index = GetIndexIntoMasterTable(COMMAND, SetPixelClock);
722 if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, 685 if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev,
723 &crev)) 686 &crev))
724 return; 687 return;
@@ -727,47 +690,49 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode
727 case 1: 690 case 1:
728 switch (crev) { 691 switch (crev) {
729 case 1: 692 case 1:
730 args.v1.usPixelClock = cpu_to_le16(mode->clock / 10); 693 if (clock == ATOM_DISABLE)
694 return;
695 args.v1.usPixelClock = cpu_to_le16(clock / 10);
731 args.v1.usRefDiv = cpu_to_le16(ref_div); 696 args.v1.usRefDiv = cpu_to_le16(ref_div);
732 args.v1.usFbDiv = cpu_to_le16(fb_div); 697 args.v1.usFbDiv = cpu_to_le16(fb_div);
733 args.v1.ucFracFbDiv = frac_fb_div; 698 args.v1.ucFracFbDiv = frac_fb_div;
734 args.v1.ucPostDiv = post_div; 699 args.v1.ucPostDiv = post_div;
735 args.v1.ucPpll = radeon_crtc->pll_id; 700 args.v1.ucPpll = pll_id;
736 args.v1.ucCRTC = radeon_crtc->crtc_id; 701 args.v1.ucCRTC = crtc_id;
737 args.v1.ucRefDivSrc = 1; 702 args.v1.ucRefDivSrc = 1;
738 break; 703 break;
739 case 2: 704 case 2:
740 args.v2.usPixelClock = cpu_to_le16(mode->clock / 10); 705 args.v2.usPixelClock = cpu_to_le16(clock / 10);
741 args.v2.usRefDiv = cpu_to_le16(ref_div); 706 args.v2.usRefDiv = cpu_to_le16(ref_div);
742 args.v2.usFbDiv = cpu_to_le16(fb_div); 707 args.v2.usFbDiv = cpu_to_le16(fb_div);
743 args.v2.ucFracFbDiv = frac_fb_div; 708 args.v2.ucFracFbDiv = frac_fb_div;
744 args.v2.ucPostDiv = post_div; 709 args.v2.ucPostDiv = post_div;
745 args.v2.ucPpll = radeon_crtc->pll_id; 710 args.v2.ucPpll = pll_id;
746 args.v2.ucCRTC = radeon_crtc->crtc_id; 711 args.v2.ucCRTC = crtc_id;
747 args.v2.ucRefDivSrc = 1; 712 args.v2.ucRefDivSrc = 1;
748 break; 713 break;
749 case 3: 714 case 3:
750 args.v3.usPixelClock = cpu_to_le16(mode->clock / 10); 715 args.v3.usPixelClock = cpu_to_le16(clock / 10);
751 args.v3.usRefDiv = cpu_to_le16(ref_div); 716 args.v3.usRefDiv = cpu_to_le16(ref_div);
752 args.v3.usFbDiv = cpu_to_le16(fb_div); 717 args.v3.usFbDiv = cpu_to_le16(fb_div);
753 args.v3.ucFracFbDiv = frac_fb_div; 718 args.v3.ucFracFbDiv = frac_fb_div;
754 args.v3.ucPostDiv = post_div; 719 args.v3.ucPostDiv = post_div;
755 args.v3.ucPpll = radeon_crtc->pll_id; 720 args.v3.ucPpll = pll_id;
756 args.v3.ucMiscInfo = (radeon_crtc->pll_id << 2); 721 args.v3.ucMiscInfo = (pll_id << 2);
757 args.v3.ucTransmitterId = radeon_encoder->encoder_id; 722 args.v3.ucTransmitterId = encoder_id;
758 args.v3.ucEncoderMode = encoder_mode; 723 args.v3.ucEncoderMode = encoder_mode;
759 break; 724 break;
760 case 5: 725 case 5:
761 args.v5.ucCRTC = radeon_crtc->crtc_id; 726 args.v5.ucCRTC = crtc_id;
762 args.v5.usPixelClock = cpu_to_le16(mode->clock / 10); 727 args.v5.usPixelClock = cpu_to_le16(clock / 10);
763 args.v5.ucRefDiv = ref_div; 728 args.v5.ucRefDiv = ref_div;
764 args.v5.usFbDiv = cpu_to_le16(fb_div); 729 args.v5.usFbDiv = cpu_to_le16(fb_div);
765 args.v5.ulFbDivDecFrac = cpu_to_le32(frac_fb_div * 100000); 730 args.v5.ulFbDivDecFrac = cpu_to_le32(frac_fb_div * 100000);
766 args.v5.ucPostDiv = post_div; 731 args.v5.ucPostDiv = post_div;
767 args.v5.ucMiscInfo = 0; /* HDMI depth, etc. */ 732 args.v5.ucMiscInfo = 0; /* HDMI depth, etc. */
768 args.v5.ucTransmitterID = radeon_encoder->encoder_id; 733 args.v5.ucTransmitterID = encoder_id;
769 args.v5.ucEncoderMode = encoder_mode; 734 args.v5.ucEncoderMode = encoder_mode;
770 args.v5.ucPpll = radeon_crtc->pll_id; 735 args.v5.ucPpll = pll_id;
771 break; 736 break;
772 default: 737 default:
773 DRM_ERROR("Unknown table version %d %d\n", frev, crev); 738 DRM_ERROR("Unknown table version %d %d\n", frev, crev);
@@ -782,6 +747,56 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode
782 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); 747 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
783} 748}
784 749
750static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
751{
752 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
753 struct drm_device *dev = crtc->dev;
754 struct radeon_device *rdev = dev->dev_private;
755 struct drm_encoder *encoder = NULL;
756 struct radeon_encoder *radeon_encoder = NULL;
757 u32 pll_clock = mode->clock;
758 u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0;
759 struct radeon_pll *pll;
760 u32 adjusted_clock;
761 int encoder_mode = 0;
762
763 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
764 if (encoder->crtc == crtc) {
765 radeon_encoder = to_radeon_encoder(encoder);
766 encoder_mode = atombios_get_encoder_mode(encoder);
767 break;
768 }
769 }
770
771 if (!radeon_encoder)
772 return;
773
774 switch (radeon_crtc->pll_id) {
775 case ATOM_PPLL1:
776 pll = &rdev->clock.p1pll;
777 break;
778 case ATOM_PPLL2:
779 pll = &rdev->clock.p2pll;
780 break;
781 case ATOM_DCPLL:
782 case ATOM_PPLL_INVALID:
783 default:
784 pll = &rdev->clock.dcpll;
785 break;
786 }
787
788 /* adjust pixel clock as needed */
789 adjusted_clock = atombios_adjust_pll(crtc, mode, pll);
790
791 radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div,
792 &ref_div, &post_div);
793
794 atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id,
795 encoder_mode, radeon_encoder->encoder_id, mode->clock,
796 ref_div, fb_div, frac_fb_div, post_div);
797
798}
799
785static int evergreen_crtc_set_base(struct drm_crtc *crtc, int x, int y, 800static int evergreen_crtc_set_base(struct drm_crtc *crtc, int x, int y,
786 struct drm_framebuffer *old_fb) 801 struct drm_framebuffer *old_fb)
787{ 802{
@@ -797,7 +812,7 @@ static int evergreen_crtc_set_base(struct drm_crtc *crtc, int x, int y,
797 812
798 /* no fb bound */ 813 /* no fb bound */
799 if (!crtc->fb) { 814 if (!crtc->fb) {
800 DRM_DEBUG("No FB bound\n"); 815 DRM_DEBUG_KMS("No FB bound\n");
801 return 0; 816 return 0;
802 } 817 }
803 818
@@ -841,6 +856,11 @@ static int evergreen_crtc_set_base(struct drm_crtc *crtc, int x, int y,
841 return -EINVAL; 856 return -EINVAL;
842 } 857 }
843 858
859 if (tiling_flags & RADEON_TILING_MACRO)
860 fb_format |= EVERGREEN_GRPH_ARRAY_MODE(EVERGREEN_GRPH_ARRAY_2D_TILED_THIN1);
861 else if (tiling_flags & RADEON_TILING_MICRO)
862 fb_format |= EVERGREEN_GRPH_ARRAY_MODE(EVERGREEN_GRPH_ARRAY_1D_TILED_THIN1);
863
844 switch (radeon_crtc->crtc_id) { 864 switch (radeon_crtc->crtc_id) {
845 case 0: 865 case 0:
846 WREG32(AVIVO_D1VGA_CONTROL, 0); 866 WREG32(AVIVO_D1VGA_CONTROL, 0);
@@ -931,7 +951,7 @@ static int avivo_crtc_set_base(struct drm_crtc *crtc, int x, int y,
931 951
932 /* no fb bound */ 952 /* no fb bound */
933 if (!crtc->fb) { 953 if (!crtc->fb) {
934 DRM_DEBUG("No FB bound\n"); 954 DRM_DEBUG_KMS("No FB bound\n");
935 return 0; 955 return 0;
936 } 956 }
937 957
@@ -979,11 +999,18 @@ static int avivo_crtc_set_base(struct drm_crtc *crtc, int x, int y,
979 return -EINVAL; 999 return -EINVAL;
980 } 1000 }
981 1001
982 if (tiling_flags & RADEON_TILING_MACRO) 1002 if (rdev->family >= CHIP_R600) {
983 fb_format |= AVIVO_D1GRPH_MACRO_ADDRESS_MODE; 1003 if (tiling_flags & RADEON_TILING_MACRO)
1004 fb_format |= R600_D1GRPH_ARRAY_MODE_2D_TILED_THIN1;
1005 else if (tiling_flags & RADEON_TILING_MICRO)
1006 fb_format |= R600_D1GRPH_ARRAY_MODE_1D_TILED_THIN1;
1007 } else {
1008 if (tiling_flags & RADEON_TILING_MACRO)
1009 fb_format |= AVIVO_D1GRPH_MACRO_ADDRESS_MODE;
984 1010
985 if (tiling_flags & RADEON_TILING_MICRO) 1011 if (tiling_flags & RADEON_TILING_MICRO)
986 fb_format |= AVIVO_D1GRPH_TILED; 1012 fb_format |= AVIVO_D1GRPH_TILED;
1013 }
987 1014
988 if (radeon_crtc->crtc_id == 0) 1015 if (radeon_crtc->crtc_id == 0)
989 WREG32(AVIVO_D1VGA_CONTROL, 0); 1016 WREG32(AVIVO_D1VGA_CONTROL, 0);
@@ -1143,10 +1170,8 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc,
1143 atombios_crtc_set_pll(crtc, adjusted_mode); 1170 atombios_crtc_set_pll(crtc, adjusted_mode);
1144 atombios_enable_ss(crtc); 1171 atombios_enable_ss(crtc);
1145 1172
1146 if (ASIC_IS_DCE4(rdev)) 1173 if (ASIC_IS_AVIVO(rdev))
1147 atombios_set_crtc_dtd_timing(crtc, adjusted_mode); 1174 atombios_set_crtc_dtd_timing(crtc, adjusted_mode);
1148 else if (ASIC_IS_AVIVO(rdev))
1149 atombios_crtc_set_timing(crtc, adjusted_mode);
1150 else { 1175 else {
1151 atombios_crtc_set_timing(crtc, adjusted_mode); 1176 atombios_crtc_set_timing(crtc, adjusted_mode);
1152 if (radeon_crtc->crtc_id == 0) 1177 if (radeon_crtc->crtc_id == 0)
@@ -1191,6 +1216,24 @@ static void atombios_crtc_commit(struct drm_crtc *crtc)
1191 atombios_lock_crtc(crtc, ATOM_DISABLE); 1216 atombios_lock_crtc(crtc, ATOM_DISABLE);
1192} 1217}
1193 1218
1219static void atombios_crtc_disable(struct drm_crtc *crtc)
1220{
1221 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
1222 atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
1223
1224 switch (radeon_crtc->pll_id) {
1225 case ATOM_PPLL1:
1226 case ATOM_PPLL2:
1227 /* disable the ppll */
1228 atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id,
1229 0, 0, ATOM_DISABLE, 0, 0, 0, 0);
1230 break;
1231 default:
1232 break;
1233 }
1234 radeon_crtc->pll_id = -1;
1235}
1236
1194static const struct drm_crtc_helper_funcs atombios_helper_funcs = { 1237static const struct drm_crtc_helper_funcs atombios_helper_funcs = {
1195 .dpms = atombios_crtc_dpms, 1238 .dpms = atombios_crtc_dpms,
1196 .mode_fixup = atombios_crtc_mode_fixup, 1239 .mode_fixup = atombios_crtc_mode_fixup,
@@ -1199,6 +1242,7 @@ static const struct drm_crtc_helper_funcs atombios_helper_funcs = {
1199 .prepare = atombios_crtc_prepare, 1242 .prepare = atombios_crtc_prepare,
1200 .commit = atombios_crtc_commit, 1243 .commit = atombios_crtc_commit,
1201 .load_lut = radeon_crtc_load_lut, 1244 .load_lut = radeon_crtc_load_lut,
1245 .disable = atombios_crtc_disable,
1202}; 1246};
1203 1247
1204void radeon_atombios_init_crtc(struct drm_device *dev, 1248void radeon_atombios_init_crtc(struct drm_device *dev,
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c
index abffb1499e22..36e0d4b545e6 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -296,7 +296,7 @@ static void dp_get_adjust_train(u8 link_status[DP_LINK_STATUS_SIZE],
296 u8 this_v = dp_get_adjust_request_voltage(link_status, lane); 296 u8 this_v = dp_get_adjust_request_voltage(link_status, lane);
297 u8 this_p = dp_get_adjust_request_pre_emphasis(link_status, lane); 297 u8 this_p = dp_get_adjust_request_pre_emphasis(link_status, lane);
298 298
299 DRM_DEBUG("requested signal parameters: lane %d voltage %s pre_emph %s\n", 299 DRM_DEBUG_KMS("requested signal parameters: lane %d voltage %s pre_emph %s\n",
300 lane, 300 lane,
301 voltage_names[this_v >> DP_TRAIN_VOLTAGE_SWING_SHIFT], 301 voltage_names[this_v >> DP_TRAIN_VOLTAGE_SWING_SHIFT],
302 pre_emph_names[this_p >> DP_TRAIN_PRE_EMPHASIS_SHIFT]); 302 pre_emph_names[this_p >> DP_TRAIN_PRE_EMPHASIS_SHIFT]);
@@ -313,7 +313,7 @@ static void dp_get_adjust_train(u8 link_status[DP_LINK_STATUS_SIZE],
313 if (p >= dp_pre_emphasis_max(v)) 313 if (p >= dp_pre_emphasis_max(v))
314 p = dp_pre_emphasis_max(v) | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED; 314 p = dp_pre_emphasis_max(v) | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
315 315
316 DRM_DEBUG("using signal parameters: voltage %s pre_emph %s\n", 316 DRM_DEBUG_KMS("using signal parameters: voltage %s pre_emph %s\n",
317 voltage_names[(v & DP_TRAIN_VOLTAGE_SWING_MASK) >> DP_TRAIN_VOLTAGE_SWING_SHIFT], 317 voltage_names[(v & DP_TRAIN_VOLTAGE_SWING_MASK) >> DP_TRAIN_VOLTAGE_SWING_SHIFT],
318 pre_emph_names[(p & DP_TRAIN_PRE_EMPHASIS_MASK) >> DP_TRAIN_PRE_EMPHASIS_SHIFT]); 318 pre_emph_names[(p & DP_TRAIN_PRE_EMPHASIS_MASK) >> DP_TRAIN_PRE_EMPHASIS_SHIFT]);
319 319
@@ -358,7 +358,7 @@ retry:
358 if (args.v1.ucReplyStatus && !args.v1.ucDataOutLen) { 358 if (args.v1.ucReplyStatus && !args.v1.ucDataOutLen) {
359 if (args.v1.ucReplyStatus == 0x20 && retry_count++ < 10) 359 if (args.v1.ucReplyStatus == 0x20 && retry_count++ < 10)
360 goto retry; 360 goto retry;
361 DRM_DEBUG("failed to get auxch %02x%02x %02x %02x 0x%02x %02x after %d retries\n", 361 DRM_DEBUG_KMS("failed to get auxch %02x%02x %02x %02x 0x%02x %02x after %d retries\n",
362 req_bytes[1], req_bytes[0], req_bytes[2], req_bytes[3], 362 req_bytes[1], req_bytes[0], req_bytes[2], req_bytes[3],
363 chan->rec.i2c_id, args.v1.ucReplyStatus, retry_count); 363 chan->rec.i2c_id, args.v1.ucReplyStatus, retry_count);
364 return false; 364 return false;
@@ -461,10 +461,10 @@ bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector)
461 memcpy(dig_connector->dpcd, msg, 8); 461 memcpy(dig_connector->dpcd, msg, 8);
462 { 462 {
463 int i; 463 int i;
464 DRM_DEBUG("DPCD: "); 464 DRM_DEBUG_KMS("DPCD: ");
465 for (i = 0; i < 8; i++) 465 for (i = 0; i < 8; i++)
466 DRM_DEBUG("%02x ", msg[i]); 466 DRM_DEBUG_KMS("%02x ", msg[i]);
467 DRM_DEBUG("\n"); 467 DRM_DEBUG_KMS("\n");
468 } 468 }
469 return true; 469 return true;
470 } 470 }
@@ -512,7 +512,7 @@ static bool atom_dp_get_link_status(struct radeon_connector *radeon_connector,
512 return false; 512 return false;
513 } 513 }
514 514
515 DRM_DEBUG("link status %02x %02x %02x %02x %02x %02x\n", 515 DRM_DEBUG_KMS("link status %02x %02x %02x %02x %02x %02x\n",
516 link_status[0], link_status[1], link_status[2], 516 link_status[0], link_status[1], link_status[2],
517 link_status[3], link_status[4], link_status[5]); 517 link_status[3], link_status[4], link_status[5]);
518 return true; 518 return true;
@@ -695,7 +695,7 @@ void dp_link_train(struct drm_encoder *encoder,
695 if (!clock_recovery) 695 if (!clock_recovery)
696 DRM_ERROR("clock recovery failed\n"); 696 DRM_ERROR("clock recovery failed\n");
697 else 697 else
698 DRM_DEBUG("clock recovery at voltage %d pre-emphasis %d\n", 698 DRM_DEBUG_KMS("clock recovery at voltage %d pre-emphasis %d\n",
699 train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK, 699 train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK,
700 (train_set[0] & DP_TRAIN_PRE_EMPHASIS_MASK) >> 700 (train_set[0] & DP_TRAIN_PRE_EMPHASIS_MASK) >>
701 DP_TRAIN_PRE_EMPHASIS_SHIFT); 701 DP_TRAIN_PRE_EMPHASIS_SHIFT);
@@ -739,7 +739,7 @@ void dp_link_train(struct drm_encoder *encoder,
739 if (!channel_eq) 739 if (!channel_eq)
740 DRM_ERROR("channel eq failed\n"); 740 DRM_ERROR("channel eq failed\n");
741 else 741 else
742 DRM_DEBUG("channel eq at voltage %d pre-emphasis %d\n", 742 DRM_DEBUG_KMS("channel eq at voltage %d pre-emphasis %d\n",
743 train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK, 743 train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK,
744 (train_set[0] & DP_TRAIN_PRE_EMPHASIS_MASK) 744 (train_set[0] & DP_TRAIN_PRE_EMPHASIS_MASK)
745 >> DP_TRAIN_PRE_EMPHASIS_SHIFT); 745 >> DP_TRAIN_PRE_EMPHASIS_SHIFT);
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 1caf625e472b..957d5067ad9c 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -39,6 +39,23 @@
39static void evergreen_gpu_init(struct radeon_device *rdev); 39static void evergreen_gpu_init(struct radeon_device *rdev);
40void evergreen_fini(struct radeon_device *rdev); 40void evergreen_fini(struct radeon_device *rdev);
41 41
42/* get temperature in millidegrees */
43u32 evergreen_get_temp(struct radeon_device *rdev)
44{
45 u32 temp = (RREG32(CG_MULT_THERMAL_STATUS) & ASIC_T_MASK) >>
46 ASIC_T_SHIFT;
47 u32 actual_temp = 0;
48
49 if ((temp >> 10) & 1)
50 actual_temp = 0;
51 else if ((temp >> 9) & 1)
52 actual_temp = 255;
53 else
54 actual_temp = (temp >> 1) & 0xff;
55
56 return actual_temp * 1000;
57}
58
42void evergreen_pm_misc(struct radeon_device *rdev) 59void evergreen_pm_misc(struct radeon_device *rdev)
43{ 60{
44 int req_ps_idx = rdev->pm.requested_power_state_index; 61 int req_ps_idx = rdev->pm.requested_power_state_index;
@@ -1115,6 +1132,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
1115 rdev->config.evergreen.max_backends) & 1132 rdev->config.evergreen.max_backends) &
1116 EVERGREEN_MAX_BACKENDS_MASK)); 1133 EVERGREEN_MAX_BACKENDS_MASK));
1117 1134
1135 rdev->config.evergreen.tile_config = gb_addr_config;
1118 WREG32(GB_BACKEND_MAP, gb_backend_map); 1136 WREG32(GB_BACKEND_MAP, gb_backend_map);
1119 WREG32(GB_ADDR_CONFIG, gb_addr_config); 1137 WREG32(GB_ADDR_CONFIG, gb_addr_config);
1120 WREG32(DMIF_ADDR_CONFIG, gb_addr_config); 1138 WREG32(DMIF_ADDR_CONFIG, gb_addr_config);
@@ -1334,8 +1352,8 @@ int evergreen_mc_init(struct radeon_device *rdev)
1334 } 1352 }
1335 rdev->mc.vram_width = numchan * chansize; 1353 rdev->mc.vram_width = numchan * chansize;
1336 /* Could aper size report 0 ? */ 1354 /* Could aper size report 0 ? */
1337 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 1355 rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);
1338 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); 1356 rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);
1339 /* Setup GPU memory space */ 1357 /* Setup GPU memory space */
1340 /* size in MB on evergreen */ 1358 /* size in MB on evergreen */
1341 rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; 1359 rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;
diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c
index 010963d4570f..345a75a03c96 100644
--- a/drivers/gpu/drm/radeon/evergreen_cs.c
+++ b/drivers/gpu/drm/radeon/evergreen_cs.c
@@ -333,7 +333,6 @@ static int evergreen_cs_packet_parse_vline(struct radeon_cs_parser *p)
333 header = radeon_get_ib_value(p, h_idx); 333 header = radeon_get_ib_value(p, h_idx);
334 crtc_id = radeon_get_ib_value(p, h_idx + 2 + 7 + 1); 334 crtc_id = radeon_get_ib_value(p, h_idx + 2 + 7 + 1);
335 reg = CP_PACKET0_GET_REG(header); 335 reg = CP_PACKET0_GET_REG(header);
336 mutex_lock(&p->rdev->ddev->mode_config.mutex);
337 obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC); 336 obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC);
338 if (!obj) { 337 if (!obj) {
339 DRM_ERROR("cannot find crtc %d\n", crtc_id); 338 DRM_ERROR("cannot find crtc %d\n", crtc_id);
@@ -368,7 +367,6 @@ static int evergreen_cs_packet_parse_vline(struct radeon_cs_parser *p)
368 } 367 }
369 } 368 }
370out: 369out:
371 mutex_unlock(&p->rdev->ddev->mode_config.mutex);
372 return r; 370 return r;
373} 371}
374 372
diff --git a/drivers/gpu/drm/radeon/evergreen_reg.h b/drivers/gpu/drm/radeon/evergreen_reg.h
index e028c1cd9d9b..2330f3a36fd5 100644
--- a/drivers/gpu/drm/radeon/evergreen_reg.h
+++ b/drivers/gpu/drm/radeon/evergreen_reg.h
@@ -61,6 +61,11 @@
61# define EVERGREEN_GRPH_FORMAT_8B_BGRA1010102 5 61# define EVERGREEN_GRPH_FORMAT_8B_BGRA1010102 5
62# define EVERGREEN_GRPH_FORMAT_RGB111110 6 62# define EVERGREEN_GRPH_FORMAT_RGB111110 6
63# define EVERGREEN_GRPH_FORMAT_BGR101111 7 63# define EVERGREEN_GRPH_FORMAT_BGR101111 7
64# define EVERGREEN_GRPH_ARRAY_MODE(x) (((x) & 0x7) << 20)
65# define EVERGREEN_GRPH_ARRAY_LINEAR_GENERAL 0
66# define EVERGREEN_GRPH_ARRAY_LINEAR_ALIGNED 1
67# define EVERGREEN_GRPH_ARRAY_1D_TILED_THIN1 2
68# define EVERGREEN_GRPH_ARRAY_2D_TILED_THIN1 4
64#define EVERGREEN_GRPH_SWAP_CONTROL 0x680c 69#define EVERGREEN_GRPH_SWAP_CONTROL 0x680c
65# define EVERGREEN_GRPH_ENDIAN_SWAP(x) (((x) & 0x3) << 0) 70# define EVERGREEN_GRPH_ENDIAN_SWAP(x) (((x) & 0x3) << 0)
66# define EVERGREEN_GRPH_ENDIAN_NONE 0 71# define EVERGREEN_GRPH_ENDIAN_NONE 0
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index a1cd621780e2..9b7532dd30f7 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -165,6 +165,11 @@
165#define SE_DB_BUSY (1 << 30) 165#define SE_DB_BUSY (1 << 30)
166#define SE_CB_BUSY (1 << 31) 166#define SE_CB_BUSY (1 << 31)
167 167
168#define CG_MULT_THERMAL_STATUS 0x740
169#define ASIC_T(x) ((x) << 16)
170#define ASIC_T_MASK 0x7FF0000
171#define ASIC_T_SHIFT 16
172
168#define HDP_HOST_PATH_CNTL 0x2C00 173#define HDP_HOST_PATH_CNTL 0x2C00
169#define HDP_NONSURFACE_BASE 0x2C04 174#define HDP_NONSURFACE_BASE 0x2C04
170#define HDP_NONSURFACE_INFO 0x2C08 175#define HDP_NONSURFACE_INFO 0x2C08
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 3970e62eaab8..e817a0bb5eb4 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -141,7 +141,7 @@ void r100_pm_get_dynpm_state(struct radeon_device *rdev)
141 /* only one clock mode per power state */ 141 /* only one clock mode per power state */
142 rdev->pm.requested_clock_mode_index = 0; 142 rdev->pm.requested_clock_mode_index = 0;
143 143
144 DRM_DEBUG("Requested: e: %d m: %d p: %d\n", 144 DRM_DEBUG_DRIVER("Requested: e: %d m: %d p: %d\n",
145 rdev->pm.power_state[rdev->pm.requested_power_state_index]. 145 rdev->pm.power_state[rdev->pm.requested_power_state_index].
146 clock_info[rdev->pm.requested_clock_mode_index].sclk, 146 clock_info[rdev->pm.requested_clock_mode_index].sclk,
147 rdev->pm.power_state[rdev->pm.requested_power_state_index]. 147 rdev->pm.power_state[rdev->pm.requested_power_state_index].
@@ -276,7 +276,7 @@ void r100_pm_misc(struct radeon_device *rdev)
276 rdev->pm.power_state[rdev->pm.current_power_state_index].pcie_lanes)) { 276 rdev->pm.power_state[rdev->pm.current_power_state_index].pcie_lanes)) {
277 radeon_set_pcie_lanes(rdev, 277 radeon_set_pcie_lanes(rdev,
278 ps->pcie_lanes); 278 ps->pcie_lanes);
279 DRM_DEBUG("Setting: p: %d\n", ps->pcie_lanes); 279 DRM_DEBUG_DRIVER("Setting: p: %d\n", ps->pcie_lanes);
280 } 280 }
281} 281}
282 282
@@ -849,7 +849,7 @@ static int r100_cp_init_microcode(struct radeon_device *rdev)
849 const char *fw_name = NULL; 849 const char *fw_name = NULL;
850 int err; 850 int err;
851 851
852 DRM_DEBUG("\n"); 852 DRM_DEBUG_KMS("\n");
853 853
854 pdev = platform_device_register_simple("radeon_cp", 0, NULL, 0); 854 pdev = platform_device_register_simple("radeon_cp", 0, NULL, 0);
855 err = IS_ERR(pdev); 855 err = IS_ERR(pdev);
@@ -1230,7 +1230,6 @@ int r100_cs_packet_parse_vline(struct radeon_cs_parser *p)
1230 header = radeon_get_ib_value(p, h_idx); 1230 header = radeon_get_ib_value(p, h_idx);
1231 crtc_id = radeon_get_ib_value(p, h_idx + 5); 1231 crtc_id = radeon_get_ib_value(p, h_idx + 5);
1232 reg = CP_PACKET0_GET_REG(header); 1232 reg = CP_PACKET0_GET_REG(header);
1233 mutex_lock(&p->rdev->ddev->mode_config.mutex);
1234 obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC); 1233 obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC);
1235 if (!obj) { 1234 if (!obj) {
1236 DRM_ERROR("cannot find crtc %d\n", crtc_id); 1235 DRM_ERROR("cannot find crtc %d\n", crtc_id);
@@ -1264,7 +1263,6 @@ int r100_cs_packet_parse_vline(struct radeon_cs_parser *p)
1264 ib[h_idx + 3] |= RADEON_ENG_DISPLAY_SELECT_CRTC1; 1263 ib[h_idx + 3] |= RADEON_ENG_DISPLAY_SELECT_CRTC1;
1265 } 1264 }
1266out: 1265out:
1267 mutex_unlock(&p->rdev->ddev->mode_config.mutex);
1268 return r; 1266 return r;
1269} 1267}
1270 1268
@@ -1805,6 +1803,11 @@ static int r100_packet3_check(struct radeon_cs_parser *p,
1805 return r; 1803 return r;
1806 break; 1804 break;
1807 /* triggers drawing using indices to vertex buffer */ 1805 /* triggers drawing using indices to vertex buffer */
1806 case PACKET3_3D_CLEAR_HIZ:
1807 case PACKET3_3D_CLEAR_ZMASK:
1808 if (p->rdev->hyperz_filp != p->filp)
1809 return -EINVAL;
1810 break;
1808 case PACKET3_NOP: 1811 case PACKET3_NOP:
1809 break; 1812 break;
1810 default: 1813 default:
@@ -2297,8 +2300,8 @@ void r100_vram_init_sizes(struct radeon_device *rdev)
2297 u64 config_aper_size; 2300 u64 config_aper_size;
2298 2301
2299 /* work out accessible VRAM */ 2302 /* work out accessible VRAM */
2300 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 2303 rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);
2301 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); 2304 rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);
2302 rdev->mc.visible_vram_size = r100_get_accessible_vram(rdev); 2305 rdev->mc.visible_vram_size = r100_get_accessible_vram(rdev);
2303 /* FIXME we don't use the second aperture yet when we could use it */ 2306 /* FIXME we don't use the second aperture yet when we could use it */
2304 if (rdev->mc.visible_vram_size > rdev->mc.aper_size) 2307 if (rdev->mc.visible_vram_size > rdev->mc.aper_size)
@@ -2354,6 +2357,7 @@ void r100_mc_init(struct radeon_device *rdev)
2354 if (rdev->flags & RADEON_IS_IGP) 2357 if (rdev->flags & RADEON_IS_IGP)
2355 base = (RREG32(RADEON_NB_TOM) & 0xffff) << 16; 2358 base = (RREG32(RADEON_NB_TOM) & 0xffff) << 16;
2356 radeon_vram_location(rdev, &rdev->mc, base); 2359 radeon_vram_location(rdev, &rdev->mc, base);
2360 rdev->mc.gtt_base_align = 0;
2357 if (!(rdev->flags & RADEON_IS_AGP)) 2361 if (!(rdev->flags & RADEON_IS_AGP))
2358 radeon_gtt_location(rdev, &rdev->mc); 2362 radeon_gtt_location(rdev, &rdev->mc);
2359 radeon_update_bandwidth_info(rdev); 2363 radeon_update_bandwidth_info(rdev);
@@ -2365,11 +2369,10 @@ void r100_mc_init(struct radeon_device *rdev)
2365 */ 2369 */
2366void r100_pll_errata_after_index(struct radeon_device *rdev) 2370void r100_pll_errata_after_index(struct radeon_device *rdev)
2367{ 2371{
2368 if (!(rdev->pll_errata & CHIP_ERRATA_PLL_DUMMYREADS)) { 2372 if (rdev->pll_errata & CHIP_ERRATA_PLL_DUMMYREADS) {
2369 return; 2373 (void)RREG32(RADEON_CLOCK_CNTL_DATA);
2374 (void)RREG32(RADEON_CRTC_GEN_CNTL);
2370 } 2375 }
2371 (void)RREG32(RADEON_CLOCK_CNTL_DATA);
2372 (void)RREG32(RADEON_CRTC_GEN_CNTL);
2373} 2376}
2374 2377
2375static void r100_pll_errata_after_data(struct radeon_device *rdev) 2378static void r100_pll_errata_after_data(struct radeon_device *rdev)
@@ -2644,7 +2647,7 @@ int r100_set_surface_reg(struct radeon_device *rdev, int reg,
2644 flags |= pitch / 8; 2647 flags |= pitch / 8;
2645 2648
2646 2649
2647 DRM_DEBUG("writing surface %d %d %x %x\n", reg, flags, offset, offset+obj_size-1); 2650 DRM_DEBUG_KMS("writing surface %d %d %x %x\n", reg, flags, offset, offset+obj_size-1);
2648 WREG32(RADEON_SURFACE0_INFO + surf_index, flags); 2651 WREG32(RADEON_SURFACE0_INFO + surf_index, flags);
2649 WREG32(RADEON_SURFACE0_LOWER_BOUND + surf_index, offset); 2652 WREG32(RADEON_SURFACE0_LOWER_BOUND + surf_index, offset);
2650 WREG32(RADEON_SURFACE0_UPPER_BOUND + surf_index, offset + obj_size - 1); 2653 WREG32(RADEON_SURFACE0_UPPER_BOUND + surf_index, offset + obj_size - 1);
@@ -3040,7 +3043,7 @@ void r100_bandwidth_update(struct radeon_device *rdev)
3040 } 3043 }
3041#endif 3044#endif
3042 3045
3043 DRM_DEBUG("GRPH_BUFFER_CNTL from to %x\n", 3046 DRM_DEBUG_KMS("GRPH_BUFFER_CNTL from to %x\n",
3044 /* (unsigned int)info->SavedReg->grph_buffer_cntl, */ 3047 /* (unsigned int)info->SavedReg->grph_buffer_cntl, */
3045 (unsigned int)RREG32(RADEON_GRPH_BUFFER_CNTL)); 3048 (unsigned int)RREG32(RADEON_GRPH_BUFFER_CNTL));
3046 } 3049 }
@@ -3136,7 +3139,7 @@ void r100_bandwidth_update(struct radeon_device *rdev)
3136 WREG32(RS400_DISP1_REQ_CNTL1, 0x28FBC3AC); 3139 WREG32(RS400_DISP1_REQ_CNTL1, 0x28FBC3AC);
3137 } 3140 }
3138 3141
3139 DRM_DEBUG("GRPH2_BUFFER_CNTL from to %x\n", 3142 DRM_DEBUG_KMS("GRPH2_BUFFER_CNTL from to %x\n",
3140 (unsigned int)RREG32(RADEON_GRPH2_BUFFER_CNTL)); 3143 (unsigned int)RREG32(RADEON_GRPH2_BUFFER_CNTL));
3141 } 3144 }
3142} 3145}
@@ -3810,6 +3813,31 @@ void r100_fini(struct radeon_device *rdev)
3810 rdev->bios = NULL; 3813 rdev->bios = NULL;
3811} 3814}
3812 3815
3816/*
3817 * Due to how kexec works, it can leave the hw fully initialised when it
3818 * boots the new kernel. However doing our init sequence with the CP and
3819 * WB stuff setup causes GPU hangs on the RN50 at least. So at startup
3820 * do some quick sanity checks and restore sane values to avoid this
3821 * problem.
3822 */
3823void r100_restore_sanity(struct radeon_device *rdev)
3824{
3825 u32 tmp;
3826
3827 tmp = RREG32(RADEON_CP_CSQ_CNTL);
3828 if (tmp) {
3829 WREG32(RADEON_CP_CSQ_CNTL, 0);
3830 }
3831 tmp = RREG32(RADEON_CP_RB_CNTL);
3832 if (tmp) {
3833 WREG32(RADEON_CP_RB_CNTL, 0);
3834 }
3835 tmp = RREG32(RADEON_SCRATCH_UMSK);
3836 if (tmp) {
3837 WREG32(RADEON_SCRATCH_UMSK, 0);
3838 }
3839}
3840
3813int r100_init(struct radeon_device *rdev) 3841int r100_init(struct radeon_device *rdev)
3814{ 3842{
3815 int r; 3843 int r;
@@ -3822,6 +3850,8 @@ int r100_init(struct radeon_device *rdev)
3822 radeon_scratch_init(rdev); 3850 radeon_scratch_init(rdev);
3823 /* Initialize surface registers */ 3851 /* Initialize surface registers */
3824 radeon_surface_init(rdev); 3852 radeon_surface_init(rdev);
3853 /* sanity check some register to avoid hangs like after kexec */
3854 r100_restore_sanity(rdev);
3825 /* TODO: disable VGA need to use VGA request */ 3855 /* TODO: disable VGA need to use VGA request */
3826 /* BIOS*/ 3856 /* BIOS*/
3827 if (!radeon_get_bios(rdev)) { 3857 if (!radeon_get_bios(rdev)) {
diff --git a/drivers/gpu/drm/radeon/r100d.h b/drivers/gpu/drm/radeon/r100d.h
index d016b16fa116..b121b6c678d4 100644
--- a/drivers/gpu/drm/radeon/r100d.h
+++ b/drivers/gpu/drm/radeon/r100d.h
@@ -48,10 +48,12 @@
48#define PACKET3_3D_DRAW_IMMD 0x29 48#define PACKET3_3D_DRAW_IMMD 0x29
49#define PACKET3_3D_DRAW_INDX 0x2A 49#define PACKET3_3D_DRAW_INDX 0x2A
50#define PACKET3_3D_LOAD_VBPNTR 0x2F 50#define PACKET3_3D_LOAD_VBPNTR 0x2F
51#define PACKET3_3D_CLEAR_ZMASK 0x32
51#define PACKET3_INDX_BUFFER 0x33 52#define PACKET3_INDX_BUFFER 0x33
52#define PACKET3_3D_DRAW_VBUF_2 0x34 53#define PACKET3_3D_DRAW_VBUF_2 0x34
53#define PACKET3_3D_DRAW_IMMD_2 0x35 54#define PACKET3_3D_DRAW_IMMD_2 0x35
54#define PACKET3_3D_DRAW_INDX_2 0x36 55#define PACKET3_3D_DRAW_INDX_2 0x36
56#define PACKET3_3D_CLEAR_HIZ 0x37
55#define PACKET3_BITBLT_MULTI 0x9B 57#define PACKET3_BITBLT_MULTI 0x9B
56 58
57#define PACKET0(reg, n) (CP_PACKET0 | \ 59#define PACKET0(reg, n) (CP_PACKET0 | \
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 7e81db5eb804..c827738ad7dd 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -481,6 +481,7 @@ void r300_mc_init(struct radeon_device *rdev)
481 if (rdev->flags & RADEON_IS_IGP) 481 if (rdev->flags & RADEON_IS_IGP)
482 base = (RREG32(RADEON_NB_TOM) & 0xffff) << 16; 482 base = (RREG32(RADEON_NB_TOM) & 0xffff) << 16;
483 radeon_vram_location(rdev, &rdev->mc, base); 483 radeon_vram_location(rdev, &rdev->mc, base);
484 rdev->mc.gtt_base_align = 0;
484 if (!(rdev->flags & RADEON_IS_AGP)) 485 if (!(rdev->flags & RADEON_IS_AGP))
485 radeon_gtt_location(rdev, &rdev->mc); 486 radeon_gtt_location(rdev, &rdev->mc);
486 radeon_update_bandwidth_info(rdev); 487 radeon_update_bandwidth_info(rdev);
@@ -1047,14 +1048,47 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
1047 /* RB3D_COLOR_CHANNEL_MASK */ 1048 /* RB3D_COLOR_CHANNEL_MASK */
1048 track->color_channel_mask = idx_value; 1049 track->color_channel_mask = idx_value;
1049 break; 1050 break;
1050 case 0x4d1c: 1051 case 0x43a4:
1052 /* SC_HYPERZ_EN */
1053 /* r300c emits this register - we need to disable hyperz for it
1054 * without complaining */
1055 if (p->rdev->hyperz_filp != p->filp) {
1056 if (idx_value & 0x1)
1057 ib[idx] = idx_value & ~1;
1058 }
1059 break;
1060 case 0x4f1c:
1051 /* ZB_BW_CNTL */ 1061 /* ZB_BW_CNTL */
1052 track->zb_cb_clear = !!(idx_value & (1 << 5)); 1062 track->zb_cb_clear = !!(idx_value & (1 << 5));
1063 if (p->rdev->hyperz_filp != p->filp) {
1064 if (idx_value & (R300_HIZ_ENABLE |
1065 R300_RD_COMP_ENABLE |
1066 R300_WR_COMP_ENABLE |
1067 R300_FAST_FILL_ENABLE))
1068 goto fail;
1069 }
1053 break; 1070 break;
1054 case 0x4e04: 1071 case 0x4e04:
1055 /* RB3D_BLENDCNTL */ 1072 /* RB3D_BLENDCNTL */
1056 track->blend_read_enable = !!(idx_value & (1 << 2)); 1073 track->blend_read_enable = !!(idx_value & (1 << 2));
1057 break; 1074 break;
1075 case 0x4f28: /* ZB_DEPTHCLEARVALUE */
1076 break;
1077 case 0x4f30: /* ZB_MASK_OFFSET */
1078 case 0x4f34: /* ZB_ZMASK_PITCH */
1079 case 0x4f44: /* ZB_HIZ_OFFSET */
1080 case 0x4f54: /* ZB_HIZ_PITCH */
1081 if (idx_value && (p->rdev->hyperz_filp != p->filp))
1082 goto fail;
1083 break;
1084 case 0x4028:
1085 if (idx_value && (p->rdev->hyperz_filp != p->filp))
1086 goto fail;
1087 /* GB_Z_PEQ_CONFIG */
1088 if (p->rdev->family >= CHIP_RV350)
1089 break;
1090 goto fail;
1091 break;
1058 case 0x4be8: 1092 case 0x4be8:
1059 /* valid register only on RV530 */ 1093 /* valid register only on RV530 */
1060 if (p->rdev->family == CHIP_RV530) 1094 if (p->rdev->family == CHIP_RV530)
@@ -1065,8 +1099,8 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
1065 } 1099 }
1066 return 0; 1100 return 0;
1067fail: 1101fail:
1068 printk(KERN_ERR "Forbidden register 0x%04X in cs at %d\n", 1102 printk(KERN_ERR "Forbidden register 0x%04X in cs at %d (val=%08x)\n",
1069 reg, idx); 1103 reg, idx, idx_value);
1070 return -EINVAL; 1104 return -EINVAL;
1071} 1105}
1072 1106
@@ -1160,6 +1194,11 @@ static int r300_packet3_check(struct radeon_cs_parser *p,
1160 return r; 1194 return r;
1161 } 1195 }
1162 break; 1196 break;
1197 case PACKET3_3D_CLEAR_HIZ:
1198 case PACKET3_3D_CLEAR_ZMASK:
1199 if (p->rdev->hyperz_filp != p->filp)
1200 return -EINVAL;
1201 break;
1163 case PACKET3_NOP: 1202 case PACKET3_NOP:
1164 break; 1203 break;
1165 default: 1204 default:
@@ -1176,6 +1215,8 @@ int r300_cs_parse(struct radeon_cs_parser *p)
1176 int r; 1215 int r;
1177 1216
1178 track = kzalloc(sizeof(*track), GFP_KERNEL); 1217 track = kzalloc(sizeof(*track), GFP_KERNEL);
1218 if (track == NULL)
1219 return -ENOMEM;
1179 r100_cs_track_clear(p->rdev, track); 1220 r100_cs_track_clear(p->rdev, track);
1180 p->track = track; 1221 p->track = track;
1181 do { 1222 do {
@@ -1377,6 +1418,8 @@ int r300_init(struct radeon_device *rdev)
1377 /* Initialize surface registers */ 1418 /* Initialize surface registers */
1378 radeon_surface_init(rdev); 1419 radeon_surface_init(rdev);
1379 /* TODO: disable VGA need to use VGA request */ 1420 /* TODO: disable VGA need to use VGA request */
1421 /* restore some register to sane defaults */
1422 r100_restore_sanity(rdev);
1380 /* BIOS*/ 1423 /* BIOS*/
1381 if (!radeon_get_bios(rdev)) { 1424 if (!radeon_get_bios(rdev)) {
1382 if (ASIC_IS_AVIVO(rdev)) 1425 if (ASIC_IS_AVIVO(rdev))
diff --git a/drivers/gpu/drm/radeon/r300d.h b/drivers/gpu/drm/radeon/r300d.h
index 968a33317fbf..0c036c60d9df 100644
--- a/drivers/gpu/drm/radeon/r300d.h
+++ b/drivers/gpu/drm/radeon/r300d.h
@@ -48,10 +48,12 @@
48#define PACKET3_3D_DRAW_IMMD 0x29 48#define PACKET3_3D_DRAW_IMMD 0x29
49#define PACKET3_3D_DRAW_INDX 0x2A 49#define PACKET3_3D_DRAW_INDX 0x2A
50#define PACKET3_3D_LOAD_VBPNTR 0x2F 50#define PACKET3_3D_LOAD_VBPNTR 0x2F
51#define PACKET3_3D_CLEAR_ZMASK 0x32
51#define PACKET3_INDX_BUFFER 0x33 52#define PACKET3_INDX_BUFFER 0x33
52#define PACKET3_3D_DRAW_VBUF_2 0x34 53#define PACKET3_3D_DRAW_VBUF_2 0x34
53#define PACKET3_3D_DRAW_IMMD_2 0x35 54#define PACKET3_3D_DRAW_IMMD_2 0x35
54#define PACKET3_3D_DRAW_INDX_2 0x36 55#define PACKET3_3D_DRAW_INDX_2 0x36
56#define PACKET3_3D_CLEAR_HIZ 0x37
55#define PACKET3_BITBLT_MULTI 0x9B 57#define PACKET3_BITBLT_MULTI 0x9B
56 58
57#define PACKET0(reg, n) (CP_PACKET0 | \ 59#define PACKET0(reg, n) (CP_PACKET0 | \
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index e6c89142bb4d..59f7bccc5be0 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -343,6 +343,8 @@ int r420_init(struct radeon_device *rdev)
343 /* Initialize surface registers */ 343 /* Initialize surface registers */
344 radeon_surface_init(rdev); 344 radeon_surface_init(rdev);
345 /* TODO: disable VGA need to use VGA request */ 345 /* TODO: disable VGA need to use VGA request */
346 /* restore some register to sane defaults */
347 r100_restore_sanity(rdev);
346 /* BIOS*/ 348 /* BIOS*/
347 if (!radeon_get_bios(rdev)) { 349 if (!radeon_get_bios(rdev)) {
348 if (ASIC_IS_AVIVO(rdev)) 350 if (ASIC_IS_AVIVO(rdev))
diff --git a/drivers/gpu/drm/radeon/r500_reg.h b/drivers/gpu/drm/radeon/r500_reg.h
index 93c9a2bbccf8..6ac1f604e29b 100644
--- a/drivers/gpu/drm/radeon/r500_reg.h
+++ b/drivers/gpu/drm/radeon/r500_reg.h
@@ -386,6 +386,11 @@
386# define AVIVO_D1GRPH_TILED (1 << 20) 386# define AVIVO_D1GRPH_TILED (1 << 20)
387# define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1 << 21) 387# define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1 << 21)
388 388
389# define R600_D1GRPH_ARRAY_MODE_LINEAR_GENERAL (0 << 20)
390# define R600_D1GRPH_ARRAY_MODE_LINEAR_ALIGNED (1 << 20)
391# define R600_D1GRPH_ARRAY_MODE_1D_TILED_THIN1 (2 << 20)
392# define R600_D1GRPH_ARRAY_MODE_2D_TILED_THIN1 (4 << 20)
393
389/* The R7xx *_HIGH surface regs are backwards; the D1 regs are in the D2 394/* The R7xx *_HIGH surface regs are backwards; the D1 regs are in the D2
390 * block and vice versa. This applies to GRPH, CUR, etc. 395 * block and vice versa. This applies to GRPH, CUR, etc.
391 */ 396 */
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index 34330df28483..1458dee902dd 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -125,6 +125,7 @@ void r520_mc_init(struct radeon_device *rdev)
125 r520_vram_get_type(rdev); 125 r520_vram_get_type(rdev);
126 r100_vram_init_sizes(rdev); 126 r100_vram_init_sizes(rdev);
127 radeon_vram_location(rdev, &rdev->mc, 0); 127 radeon_vram_location(rdev, &rdev->mc, 0);
128 rdev->mc.gtt_base_align = 0;
128 if (!(rdev->flags & RADEON_IS_AGP)) 129 if (!(rdev->flags & RADEON_IS_AGP))
129 radeon_gtt_location(rdev, &rdev->mc); 130 radeon_gtt_location(rdev, &rdev->mc);
130 radeon_update_bandwidth_info(rdev); 131 radeon_update_bandwidth_info(rdev);
@@ -230,6 +231,8 @@ int r520_init(struct radeon_device *rdev)
230 radeon_scratch_init(rdev); 231 radeon_scratch_init(rdev);
231 /* Initialize surface registers */ 232 /* Initialize surface registers */
232 radeon_surface_init(rdev); 233 radeon_surface_init(rdev);
234 /* restore some register to sane defaults */
235 r100_restore_sanity(rdev);
233 /* TODO: disable VGA need to use VGA request */ 236 /* TODO: disable VGA need to use VGA request */
234 /* BIOS*/ 237 /* BIOS*/
235 if (!radeon_get_bios(rdev)) { 238 if (!radeon_get_bios(rdev)) {
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 3d6645ce2151..d0ebae9dde25 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -92,6 +92,21 @@ void r600_gpu_init(struct radeon_device *rdev);
92void r600_fini(struct radeon_device *rdev); 92void r600_fini(struct radeon_device *rdev);
93void r600_irq_disable(struct radeon_device *rdev); 93void r600_irq_disable(struct radeon_device *rdev);
94 94
95/* get temperature in millidegrees */
96u32 rv6xx_get_temp(struct radeon_device *rdev)
97{
98 u32 temp = (RREG32(CG_THERMAL_STATUS) & ASIC_T_MASK) >>
99 ASIC_T_SHIFT;
100 u32 actual_temp = 0;
101
102 if ((temp >> 7) & 1)
103 actual_temp = 0;
104 else
105 actual_temp = (temp >> 1) & 0xff;
106
107 return actual_temp * 1000;
108}
109
95void r600_pm_get_dynpm_state(struct radeon_device *rdev) 110void r600_pm_get_dynpm_state(struct radeon_device *rdev)
96{ 111{
97 int i; 112 int i;
@@ -256,7 +271,7 @@ void r600_pm_get_dynpm_state(struct radeon_device *rdev)
256 } 271 }
257 } 272 }
258 273
259 DRM_DEBUG("Requested: e: %d m: %d p: %d\n", 274 DRM_DEBUG_DRIVER("Requested: e: %d m: %d p: %d\n",
260 rdev->pm.power_state[rdev->pm.requested_power_state_index]. 275 rdev->pm.power_state[rdev->pm.requested_power_state_index].
261 clock_info[rdev->pm.requested_clock_mode_index].sclk, 276 clock_info[rdev->pm.requested_clock_mode_index].sclk,
262 rdev->pm.power_state[rdev->pm.requested_power_state_index]. 277 rdev->pm.power_state[rdev->pm.requested_power_state_index].
@@ -571,7 +586,7 @@ void r600_pm_misc(struct radeon_device *rdev)
571 if (voltage->voltage != rdev->pm.current_vddc) { 586 if (voltage->voltage != rdev->pm.current_vddc) {
572 radeon_atom_set_voltage(rdev, voltage->voltage); 587 radeon_atom_set_voltage(rdev, voltage->voltage);
573 rdev->pm.current_vddc = voltage->voltage; 588 rdev->pm.current_vddc = voltage->voltage;
574 DRM_DEBUG("Setting: v: %d\n", voltage->voltage); 589 DRM_DEBUG_DRIVER("Setting: v: %d\n", voltage->voltage);
575 } 590 }
576 } 591 }
577} 592}
@@ -869,7 +884,17 @@ void r600_pcie_gart_tlb_flush(struct radeon_device *rdev)
869 u32 tmp; 884 u32 tmp;
870 885
871 /* flush hdp cache so updates hit vram */ 886 /* flush hdp cache so updates hit vram */
872 WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1); 887 if ((rdev->family >= CHIP_RV770) && (rdev->family <= CHIP_RV740)) {
888 void __iomem *ptr = (void *)rdev->gart.table.vram.ptr;
889 u32 tmp;
890
891 /* r7xx hw bug. write to HDP_DEBUG1 followed by fb read
892 * rather than write to HDP_REG_COHERENCY_FLUSH_CNTL
893 */
894 WREG32(HDP_DEBUG1, 0);
895 tmp = readl((void __iomem *)ptr);
896 } else
897 WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);
873 898
874 WREG32(VM_CONTEXT0_INVALIDATION_LOW_ADDR, rdev->mc.gtt_start >> 12); 899 WREG32(VM_CONTEXT0_INVALIDATION_LOW_ADDR, rdev->mc.gtt_start >> 12);
875 WREG32(VM_CONTEXT0_INVALIDATION_HIGH_ADDR, (rdev->mc.gtt_end - 1) >> 12); 900 WREG32(VM_CONTEXT0_INVALIDATION_HIGH_ADDR, (rdev->mc.gtt_end - 1) >> 12);
@@ -1179,6 +1204,7 @@ void r600_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)
1179 if (rdev->flags & RADEON_IS_IGP) 1204 if (rdev->flags & RADEON_IS_IGP)
1180 base = (RREG32(MC_VM_FB_LOCATION) & 0xFFFF) << 24; 1205 base = (RREG32(MC_VM_FB_LOCATION) & 0xFFFF) << 24;
1181 radeon_vram_location(rdev, &rdev->mc, base); 1206 radeon_vram_location(rdev, &rdev->mc, base);
1207 rdev->mc.gtt_base_align = 0;
1182 radeon_gtt_location(rdev, mc); 1208 radeon_gtt_location(rdev, mc);
1183 } 1209 }
1184} 1210}
@@ -1216,8 +1242,8 @@ int r600_mc_init(struct radeon_device *rdev)
1216 } 1242 }
1217 rdev->mc.vram_width = numchan * chansize; 1243 rdev->mc.vram_width = numchan * chansize;
1218 /* Could aper size report 0 ? */ 1244 /* Could aper size report 0 ? */
1219 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 1245 rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);
1220 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); 1246 rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);
1221 /* Setup GPU memory space */ 1247 /* Setup GPU memory space */
1222 rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); 1248 rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);
1223 rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); 1249 rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);
@@ -1608,7 +1634,7 @@ void r600_gpu_init(struct radeon_device *rdev)
1608 r600_count_pipe_bits((cc_rb_backend_disable & 1634 r600_count_pipe_bits((cc_rb_backend_disable &
1609 R6XX_MAX_BACKENDS_MASK) >> 16)), 1635 R6XX_MAX_BACKENDS_MASK) >> 16)),
1610 (cc_rb_backend_disable >> 16)); 1636 (cc_rb_backend_disable >> 16));
1611 1637 rdev->config.r600.tile_config = tiling_config;
1612 tiling_config |= BACKEND_MAP(backend_map); 1638 tiling_config |= BACKEND_MAP(backend_map);
1613 WREG32(GB_TILING_CONFIG, tiling_config); 1639 WREG32(GB_TILING_CONFIG, tiling_config);
1614 WREG32(DCP_TILING_CONFIG, tiling_config & 0xffff); 1640 WREG32(DCP_TILING_CONFIG, tiling_config & 0xffff);
@@ -3511,5 +3537,15 @@ int r600_debugfs_mc_info_init(struct radeon_device *rdev)
3511 */ 3537 */
3512void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo) 3538void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo)
3513{ 3539{
3514 WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1); 3540 /* r7xx hw bug. write to HDP_DEBUG1 followed by fb read
3541 * rather than write to HDP_REG_COHERENCY_FLUSH_CNTL
3542 */
3543 if ((rdev->family >= CHIP_RV770) && (rdev->family <= CHIP_RV740)) {
3544 void __iomem *ptr = (void *)rdev->gart.table.vram.ptr;
3545 u32 tmp;
3546
3547 WREG32(HDP_DEBUG1, 0);
3548 tmp = readl((void __iomem *)ptr);
3549 } else
3550 WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);
3515} 3551}
diff --git a/drivers/gpu/drm/radeon/r600_audio.c b/drivers/gpu/drm/radeon/r600_audio.c
index 2b26553c352c..b5443fe1c1d1 100644
--- a/drivers/gpu/drm/radeon/r600_audio.c
+++ b/drivers/gpu/drm/radeon/r600_audio.c
@@ -63,7 +63,8 @@ int r600_audio_bits_per_sample(struct radeon_device *rdev)
63 case 0x4: return 32; 63 case 0x4: return 32;
64 } 64 }
65 65
66 DRM_ERROR("Unknown bits per sample 0x%x using 16 instead.\n", (int)value); 66 dev_err(rdev->dev, "Unknown bits per sample 0x%x using 16 instead\n",
67 (int)value);
67 68
68 return 16; 69 return 16;
69} 70}
@@ -150,7 +151,8 @@ static void r600_audio_update_hdmi(unsigned long param)
150 r600_hdmi_update_audio_settings(encoder); 151 r600_hdmi_update_audio_settings(encoder);
151 } 152 }
152 153
153 if(still_going) r600_audio_schedule_polling(rdev); 154 if (still_going)
155 r600_audio_schedule_polling(rdev);
154} 156}
155 157
156/* 158/*
@@ -158,8 +160,9 @@ static void r600_audio_update_hdmi(unsigned long param)
158 */ 160 */
159static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable) 161static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable)
160{ 162{
161 DRM_INFO("%s audio support", enable ? "Enabling" : "Disabling"); 163 DRM_INFO("%s audio support\n", enable ? "Enabling" : "Disabling");
162 WREG32_P(R600_AUDIO_ENABLE, enable ? 0x81000000 : 0x0, ~0x81000000); 164 WREG32_P(R600_AUDIO_ENABLE, enable ? 0x81000000 : 0x0, ~0x81000000);
165 rdev->audio_enabled = enable;
163} 166}
164 167
165/* 168/*
@@ -195,12 +198,14 @@ void r600_audio_enable_polling(struct drm_encoder *encoder)
195 struct radeon_device *rdev = dev->dev_private; 198 struct radeon_device *rdev = dev->dev_private;
196 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 199 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
197 200
198 DRM_DEBUG("r600_audio_enable_polling: %d", radeon_encoder->audio_polling_active); 201 DRM_DEBUG("r600_audio_enable_polling: %d\n",
202 radeon_encoder->audio_polling_active);
199 if (radeon_encoder->audio_polling_active) 203 if (radeon_encoder->audio_polling_active)
200 return; 204 return;
201 205
202 radeon_encoder->audio_polling_active = 1; 206 radeon_encoder->audio_polling_active = 1;
203 mod_timer(&rdev->audio_timer, jiffies + 1); 207 if (rdev->audio_enabled)
208 mod_timer(&rdev->audio_timer, jiffies + 1);
204} 209}
205 210
206/* 211/*
@@ -209,7 +214,8 @@ void r600_audio_enable_polling(struct drm_encoder *encoder)
209void r600_audio_disable_polling(struct drm_encoder *encoder) 214void r600_audio_disable_polling(struct drm_encoder *encoder)
210{ 215{
211 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 216 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
212 DRM_DEBUG("r600_audio_disable_polling: %d", radeon_encoder->audio_polling_active); 217 DRM_DEBUG("r600_audio_disable_polling: %d\n",
218 radeon_encoder->audio_polling_active);
213 radeon_encoder->audio_polling_active = 0; 219 radeon_encoder->audio_polling_active = 0;
214} 220}
215 221
@@ -236,7 +242,7 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
236 WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301); 242 WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
237 break; 243 break;
238 default: 244 default:
239 DRM_ERROR("Unsupported encoder type 0x%02X\n", 245 dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n",
240 radeon_encoder->encoder_id); 246 radeon_encoder->encoder_id);
241 return; 247 return;
242 } 248 }
@@ -266,7 +272,7 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
266 */ 272 */
267void r600_audio_fini(struct radeon_device *rdev) 273void r600_audio_fini(struct radeon_device *rdev)
268{ 274{
269 if (!radeon_audio || !r600_audio_chipset_supported(rdev)) 275 if (!rdev->audio_enabled)
270 return; 276 return;
271 277
272 del_timer(&rdev->audio_timer); 278 del_timer(&rdev->audio_timer);
diff --git a/drivers/gpu/drm/radeon/r600_blit.c b/drivers/gpu/drm/radeon/r600_blit.c
index f4fb88ece2bb..ca5c29f70779 100644
--- a/drivers/gpu/drm/radeon/r600_blit.c
+++ b/drivers/gpu/drm/radeon/r600_blit.c
@@ -538,9 +538,12 @@ int
538r600_prepare_blit_copy(struct drm_device *dev, struct drm_file *file_priv) 538r600_prepare_blit_copy(struct drm_device *dev, struct drm_file *file_priv)
539{ 539{
540 drm_radeon_private_t *dev_priv = dev->dev_private; 540 drm_radeon_private_t *dev_priv = dev->dev_private;
541 int ret;
541 DRM_DEBUG("\n"); 542 DRM_DEBUG("\n");
542 543
543 r600_nomm_get_vb(dev); 544 ret = r600_nomm_get_vb(dev);
545 if (ret)
546 return ret;
544 547
545 dev_priv->blit_vb->file_priv = file_priv; 548 dev_priv->blit_vb->file_priv = file_priv;
546 549
diff --git a/drivers/gpu/drm/radeon/r600_blit_shaders.c b/drivers/gpu/drm/radeon/r600_blit_shaders.c
index 0271b53fa2dd..e8151c1d55b2 100644
--- a/drivers/gpu/drm/radeon/r600_blit_shaders.c
+++ b/drivers/gpu/drm/radeon/r600_blit_shaders.c
@@ -39,37 +39,45 @@
39 39
40const u32 r6xx_default_state[] = 40const u32 r6xx_default_state[] =
41{ 41{
42 0xc0002400, 42 0xc0002400, /* START_3D_CMDBUF */
43 0x00000000, 43 0x00000000,
44 0xc0012800, 44
45 0xc0012800, /* CONTEXT_CONTROL */
45 0x80000000, 46 0x80000000,
46 0x80000000, 47 0x80000000,
48
47 0xc0016800, 49 0xc0016800,
48 0x00000010, 50 0x00000010,
49 0x00008000, 51 0x00008000, /* WAIT_UNTIL */
52
50 0xc0016800, 53 0xc0016800,
51 0x00000542, 54 0x00000542,
52 0x07000003, 55 0x07000003, /* TA_CNTL_AUX */
56
53 0xc0016800, 57 0xc0016800,
54 0x000005c5, 58 0x000005c5,
55 0x00000000, 59 0x00000000, /* VC_ENHANCE */
60
56 0xc0016800, 61 0xc0016800,
57 0x00000363, 62 0x00000363,
58 0x00000000, 63 0x00000000, /* SQ_DYN_GPR_CNTL_PS_FLUSH_REQ */
64
59 0xc0016800, 65 0xc0016800,
60 0x0000060c, 66 0x0000060c,
61 0x82000000, 67 0x82000000, /* DB_DEBUG */
68
62 0xc0016800, 69 0xc0016800,
63 0x0000060e, 70 0x0000060e,
64 0x01020204, 71 0x01020204, /* DB_WATERMARKS */
65 0xc0016f00, 72
66 0x00000000, 73 0xc0026f00,
67 0x00000000,
68 0xc0016f00,
69 0x00000001,
70 0x00000000, 74 0x00000000,
75 0x00000000, /* SQ_VTX_BASE_VTX_LOC */
76 0x00000000, /* SQ_VTX_START_INST_LOC */
77
71 0xc0096900, 78 0xc0096900,
72 0x0000022a, 79 0x0000022a,
80 0x00000000, /* SQ_ESGS_RING_ITEMSIZE */
73 0x00000000, 81 0x00000000,
74 0x00000000, 82 0x00000000,
75 0x00000000, 83 0x00000000,
@@ -78,515 +86,317 @@ const u32 r6xx_default_state[] =
78 0x00000000, 86 0x00000000,
79 0x00000000, 87 0x00000000,
80 0x00000000, 88 0x00000000,
81 0x00000000, 89
82 0xc0016900, 90 0xc0016900,
83 0x00000004, 91 0x00000004,
84 0x00000000, 92 0x00000000, /* DB_DEPTH_INFO */
85 0xc0016900, 93
94 0xc0026900,
86 0x0000000a, 95 0x0000000a,
87 0x00000000, 96 0x00000000, /* DB_STENCIL_CLEAR */
88 0xc0016900, 97 0x00000000, /* DB_DEPTH_CLEAR */
89 0x0000000b, 98
90 0x00000000,
91 0xc0016900,
92 0x0000010c,
93 0x00000000,
94 0xc0016900,
95 0x0000010d,
96 0x00000000,
97 0xc0016900, 99 0xc0016900,
98 0x00000200, 100 0x00000200,
99 0x00000000, 101 0x00000000, /* DB_DEPTH_CONTROL */
100 0xc0016900, 102
103 0xc0026900,
101 0x00000343, 104 0x00000343,
102 0x00000060, 105 0x00000060, /* DB_RENDER_CONTROL */
103 0xc0016900, 106 0x00000040, /* DB_RENDER_OVERRIDE */
104 0x00000344, 107
105 0x00000040,
106 0xc0016900, 108 0xc0016900,
107 0x00000351, 109 0x00000351,
108 0x0000aa00, 110 0x0000aa00, /* DB_ALPHA_TO_MASK */
109 0xc0016900, 111
110 0x00000104, 112 0xc00f6900,
111 0x00000000, 113 0x00000100,
112 0xc0016900, 114 0x00000800, /* VGT_MAX_VTX_INDX */
113 0x0000010e, 115 0x00000000, /* VGT_MIN_VTX_INDX */
114 0x00000000, 116 0x00000000, /* VGT_INDX_OFFSET */
115 0xc0046900, 117 0x00000000, /* VGT_MULTI_PRIM_IB_RESET_INDX */
116 0x00000105, 118 0x00000000, /* SX_ALPHA_TEST_CONTROL */
117 0x00000000, 119 0x00000000, /* CB_BLEND_RED */
118 0x00000000,
119 0x00000000, 120 0x00000000,
120 0x00000000, 121 0x00000000,
121 0xc0036900,
122 0x00000109,
123 0x00000000, 122 0x00000000,
123 0x00000000, /* CB_FOG_RED */
124 0x00000000, 124 0x00000000,
125 0x00000000, 125 0x00000000,
126 0x00000000, /* DB_STENCILREFMASK */
127 0x00000000, /* DB_STENCILREFMASK_BF */
128 0x00000000, /* SX_ALPHA_REF */
129
126 0xc0046900, 130 0xc0046900,
127 0x0000030c, 131 0x0000030c,
128 0x01000000, 132 0x01000000, /* CB_CLRCMP_CNTL */
129 0x00000000, 133 0x00000000,
130 0x00000000, 134 0x00000000,
131 0x00000000, 135 0x00000000,
136
132 0xc0046900, 137 0xc0046900,
133 0x00000048, 138 0x00000048,
134 0x3f800000, 139 0x3f800000, /* CB_CLEAR_RED */
135 0x00000000, 140 0x00000000,
136 0x3f800000, 141 0x3f800000,
137 0x3f800000, 142 0x3f800000,
138 0xc0016900, 143
139 0x0000008e,
140 0x0000000f,
141 0xc0016900, 144 0xc0016900,
142 0x00000080, 145 0x00000080,
143 0x00000000, 146 0x00000000, /* PA_SC_WINDOW_OFFSET */
144 0xc0016900, 147
148 0xc00a6900,
145 0x00000083, 149 0x00000083,
146 0x0000ffff, 150 0x0000ffff, /* PA_SC_CLIP_RECT_RULE */
147 0xc0016900, 151 0x00000000, /* PA_SC_CLIPRECT_0_TL */
148 0x00000084,
149 0x00000000,
150 0xc0016900,
151 0x00000085,
152 0x20002000, 152 0x20002000,
153 0xc0016900,
154 0x00000086,
155 0x00000000, 153 0x00000000,
156 0xc0016900,
157 0x00000087,
158 0x20002000, 154 0x20002000,
159 0xc0016900,
160 0x00000088,
161 0x00000000, 155 0x00000000,
162 0xc0016900,
163 0x00000089,
164 0x20002000, 156 0x20002000,
165 0xc0016900,
166 0x0000008a,
167 0x00000000, 157 0x00000000,
168 0xc0016900,
169 0x0000008b,
170 0x20002000, 158 0x20002000,
171 0xc0016900, 159 0x00000000, /* PA_SC_EDGERULE */
172 0x0000008c, 160
173 0x00000000, 161 0xc0406900,
174 0xc0016900,
175 0x00000094, 162 0x00000094,
176 0x80000000, 163 0x80000000, /* PA_SC_VPORT_SCISSOR_0_TL */
177 0xc0016900, 164 0x20002000, /* PA_SC_VPORT_SCISSOR_0_BR */
178 0x00000095, 165 0x80000000, /* PA_SC_VPORT_SCISSOR_1_TL */
179 0x20002000, 166 0x20002000,
180 0xc0026900,
181 0x000000b4,
182 0x00000000,
183 0x3f800000,
184 0xc0016900,
185 0x00000096,
186 0x80000000, 167 0x80000000,
187 0xc0016900,
188 0x00000097,
189 0x20002000, 168 0x20002000,
190 0xc0026900,
191 0x000000b6,
192 0x00000000,
193 0x3f800000,
194 0xc0016900,
195 0x00000098,
196 0x80000000, 169 0x80000000,
197 0xc0016900,
198 0x00000099,
199 0x20002000, 170 0x20002000,
200 0xc0026900,
201 0x000000b8,
202 0x00000000,
203 0x3f800000,
204 0xc0016900,
205 0x0000009a,
206 0x80000000, 171 0x80000000,
207 0xc0016900,
208 0x0000009b,
209 0x20002000, 172 0x20002000,
210 0xc0026900,
211 0x000000ba,
212 0x00000000,
213 0x3f800000,
214 0xc0016900,
215 0x0000009c,
216 0x80000000, 173 0x80000000,
217 0xc0016900,
218 0x0000009d,
219 0x20002000, 174 0x20002000,
220 0xc0026900,
221 0x000000bc,
222 0x00000000,
223 0x3f800000,
224 0xc0016900,
225 0x0000009e,
226 0x80000000, 175 0x80000000,
227 0xc0016900,
228 0x0000009f,
229 0x20002000, 176 0x20002000,
230 0xc0026900,
231 0x000000be,
232 0x00000000,
233 0x3f800000,
234 0xc0016900,
235 0x000000a0,
236 0x80000000, 177 0x80000000,
237 0xc0016900,
238 0x000000a1,
239 0x20002000, 178 0x20002000,
240 0xc0026900,
241 0x000000c0,
242 0x00000000,
243 0x3f800000,
244 0xc0016900,
245 0x000000a2,
246 0x80000000, 179 0x80000000,
247 0xc0016900,
248 0x000000a3,
249 0x20002000, 180 0x20002000,
250 0xc0026900,
251 0x000000c2,
252 0x00000000,
253 0x3f800000,
254 0xc0016900,
255 0x000000a4,
256 0x80000000, 181 0x80000000,
257 0xc0016900,
258 0x000000a5,
259 0x20002000, 182 0x20002000,
260 0xc0026900,
261 0x000000c4,
262 0x00000000,
263 0x3f800000,
264 0xc0016900,
265 0x000000a6,
266 0x80000000, 183 0x80000000,
267 0xc0016900,
268 0x000000a7,
269 0x20002000, 184 0x20002000,
270 0xc0026900,
271 0x000000c6,
272 0x00000000,
273 0x3f800000,
274 0xc0016900,
275 0x000000a8,
276 0x80000000, 185 0x80000000,
277 0xc0016900,
278 0x000000a9,
279 0x20002000, 186 0x20002000,
280 0xc0026900,
281 0x000000c8,
282 0x00000000,
283 0x3f800000,
284 0xc0016900,
285 0x000000aa,
286 0x80000000, 187 0x80000000,
287 0xc0016900,
288 0x000000ab,
289 0x20002000, 188 0x20002000,
290 0xc0026900,
291 0x000000ca,
292 0x00000000,
293 0x3f800000,
294 0xc0016900,
295 0x000000ac,
296 0x80000000, 189 0x80000000,
297 0xc0016900,
298 0x000000ad,
299 0x20002000, 190 0x20002000,
300 0xc0026900,
301 0x000000cc,
302 0x00000000,
303 0x3f800000,
304 0xc0016900,
305 0x000000ae,
306 0x80000000, 191 0x80000000,
307 0xc0016900,
308 0x000000af,
309 0x20002000, 192 0x20002000,
310 0xc0026900,
311 0x000000ce,
312 0x00000000,
313 0x3f800000,
314 0xc0016900,
315 0x000000b0,
316 0x80000000, 193 0x80000000,
317 0xc0016900,
318 0x000000b1,
319 0x20002000, 194 0x20002000,
320 0xc0026900, 195 0x00000000, /* PA_SC_VPORT_ZMIN_0 */
321 0x000000d0,
322 0x00000000,
323 0x3f800000, 196 0x3f800000,
324 0xc0016900,
325 0x000000b2,
326 0x80000000,
327 0xc0016900,
328 0x000000b3,
329 0x20002000,
330 0xc0026900,
331 0x000000d2,
332 0x00000000, 197 0x00000000,
333 0x3f800000, 198 0x3f800000,
334 0xc0016900,
335 0x00000293,
336 0x00004010,
337 0xc0016900,
338 0x00000300,
339 0x00000000, 199 0x00000000,
340 0xc0016900, 200 0x3f800000,
341 0x00000301,
342 0x00000000,
343 0xc0016900,
344 0x00000312,
345 0xffffffff,
346 0xc0016900,
347 0x00000307,
348 0x00000000, 201 0x00000000,
349 0xc0016900, 202 0x3f800000,
350 0x00000308,
351 0x00000000, 203 0x00000000,
352 0xc0016900, 204 0x3f800000,
353 0x00000283,
354 0x00000000, 205 0x00000000,
355 0xc0016900, 206 0x3f800000,
356 0x00000292,
357 0x00000000, 207 0x00000000,
358 0xc0066900, 208 0x3f800000,
359 0x0000010f,
360 0x00000000, 209 0x00000000,
210 0x3f800000,
361 0x00000000, 211 0x00000000,
212 0x3f800000,
362 0x00000000, 213 0x00000000,
214 0x3f800000,
363 0x00000000, 215 0x00000000,
216 0x3f800000,
364 0x00000000, 217 0x00000000,
218 0x3f800000,
365 0x00000000, 219 0x00000000,
366 0xc0016900, 220 0x3f800000,
367 0x00000206,
368 0x00000000, 221 0x00000000,
369 0xc0016900, 222 0x3f800000,
370 0x00000207,
371 0x00000000, 223 0x00000000,
372 0xc0016900, 224 0x3f800000,
373 0x00000208,
374 0x00000000, 225 0x00000000,
375 0xc0046900,
376 0x00000303,
377 0x3f800000, 226 0x3f800000,
227
228 0xc0026900,
229 0x00000292,
230 0x00000000, /* PA_SC_MPASS_PS_CNTL */
231 0x00004010, /* PA_SC_MODE_CNTL */
232
233 0xc0096900,
234 0x00000300,
235 0x00000000, /* PA_SC_LINE_CNTL */
236 0x00000000, /* PA_SC_AA_CONFIG */
237 0x0000002d, /* PA_SU_VTX_CNTL */
238 0x3f800000, /* PA_CL_GB_VERT_CLIP_ADJ */
378 0x3f800000, 239 0x3f800000,
379 0x3f800000, 240 0x3f800000,
380 0x3f800000, 241 0x3f800000,
381 0xc0016900, 242 0x00000000, /* PA_SC_SAMPLE_LOCS_MCTX */
382 0x00000205,
383 0x00000004,
384 0xc0016900,
385 0x00000280,
386 0x00000000,
387 0xc0016900,
388 0x00000281,
389 0x00000000, 243 0x00000000,
244
390 0xc0016900, 245 0xc0016900,
246 0x00000312,
247 0xffffffff, /* PA_SC_AA_MASK */
248
249 0xc0066900,
391 0x0000037e, 250 0x0000037e,
392 0x00000000, 251 0x00000000, /* PA_SU_POLY_OFFSET_DB_FMT_CNTL */
393 0xc0016900, 252 0x00000000, /* PA_SU_POLY_OFFSET_CLAMP */
394 0x00000382, 253 0x00000000, /* PA_SU_POLY_OFFSET_FRONT_SCALE */
395 0x00000000, 254 0x00000000, /* PA_SU_POLY_OFFSET_FRONT_OFFSET */
396 0xc0016900, 255 0x00000000, /* PA_SU_POLY_OFFSET_BACK_SCALE */
397 0x00000380, 256 0x00000000, /* PA_SU_POLY_OFFSET_BACK_OFFSET */
398 0x00000000, 257
399 0xc0016900, 258 0xc0046900,
400 0x00000383,
401 0x00000000,
402 0xc0016900,
403 0x00000381,
404 0x00000000,
405 0xc0016900,
406 0x00000282,
407 0x00000008,
408 0xc0016900,
409 0x00000302,
410 0x0000002d,
411 0xc0016900,
412 0x0000037f,
413 0x00000000,
414 0xc0016900,
415 0x000001b2,
416 0x00000000,
417 0xc0016900,
418 0x000001b6, 259 0x000001b6,
419 0x00000000, 260 0x00000000, /* SPI_INPUT_Z */
420 0xc0016900, 261 0x00000000, /* SPI_FOG_CNTL */
421 0x000001b7, 262 0x00000000, /* SPI_FOG_FUNC_SCALE */
422 0x00000000, 263 0x00000000, /* SPI_FOG_FUNC_BIAS */
423 0xc0016900, 264
424 0x000001b8,
425 0x00000000,
426 0xc0016900,
427 0x000001b9,
428 0x00000000,
429 0xc0016900, 265 0xc0016900,
430 0x00000225, 266 0x00000225,
431 0x00000000, 267 0x00000000, /* SQ_PGM_START_FS */
268
432 0xc0016900, 269 0xc0016900,
433 0x00000229, 270 0x00000229,
434 0x00000000, 271 0x00000000, /* SQ_PGM_RESOURCES_FS */
272
435 0xc0016900, 273 0xc0016900,
436 0x00000237, 274 0x00000237,
437 0x00000000, 275 0x00000000, /* SQ_PGM_CF_OFFSET_FS */
438 0xc0016900, 276
439 0x00000100, 277 0xc0026900,
440 0x00000800,
441 0xc0016900,
442 0x00000101,
443 0x00000000,
444 0xc0016900,
445 0x00000102,
446 0x00000000,
447 0xc0016900,
448 0x000002a8, 278 0x000002a8,
449 0x00000000, 279 0x00000000, /* VGT_INSTANCE_STEP_RATE_0 */
450 0xc0016900, 280 0x00000000, /* VGT_INSTANCE_STEP_RATE_1 */
451 0x000002a9, 281
452 0x00000000, 282 0xc0116900,
453 0xc0016900, 283 0x00000280,
454 0x00000103, 284 0x00000000, /* PA_SU_POINT_SIZE */
455 0x00000000, 285 0x00000000, /* PA_SU_POINT_MINMAX */
456 0xc0016900, 286 0x00000008, /* PA_SU_LINE_CNTL */
457 0x00000284, 287 0x00000000, /* PA_SC_LINE_STIPPLE */
458 0x00000000, 288 0x00000000, /* VGT_OUTPUT_PATH_CNTL */
459 0xc0016900, 289 0x00000000, /* VGT_HOS_CNTL */
460 0x00000290, 290 0x00000000, /* VGT_HOS_MAX_TESS_LEVEL */
461 0x00000000, 291 0x00000000, /* VGT_HOS_MIN_TESS_LEVEL */
462 0xc0016900, 292 0x00000000, /* VGT_HOS_REUSE_DEPTH */
463 0x00000285, 293 0x00000000, /* VGT_GROUP_PRIM_TYPE */
464 0x00000000, 294 0x00000000, /* VGT_GROUP_FIRST_DECR */
465 0xc0016900, 295 0x00000000, /* VGT_GROUP_DECR */
466 0x00000286, 296 0x00000000, /* VGT_GROUP_VECT_0_CNTL */
467 0x00000000, 297 0x00000000, /* VGT_GROUP_VECT_1_CNTL */
468 0xc0016900, 298 0x00000000, /* VGT_GROUP_VECT_0_FMT_CNTL */
469 0x00000287, 299 0x00000000, /* VGT_GROUP_VECT_1_FMT_CNTL */
470 0x00000000, 300 0x00000000, /* VGT_GS_MODE */
471 0xc0016900, 301
472 0x00000288,
473 0x00000000,
474 0xc0016900,
475 0x00000289,
476 0x00000000,
477 0xc0016900,
478 0x0000028a,
479 0x00000000,
480 0xc0016900,
481 0x0000028b,
482 0x00000000,
483 0xc0016900,
484 0x0000028c,
485 0x00000000,
486 0xc0016900,
487 0x0000028d,
488 0x00000000,
489 0xc0016900,
490 0x0000028e,
491 0x00000000,
492 0xc0016900,
493 0x0000028f,
494 0x00000000,
495 0xc0016900, 302 0xc0016900,
496 0x000002a1, 303 0x000002a1,
497 0x00000000, 304 0x00000000, /* VGT_PRIMITIVEID_EN */
305
498 0xc0016900, 306 0xc0016900,
499 0x000002a5, 307 0x000002a5,
500 0x00000000, 308 0x00000000, /* VGT_MULTI_PRIM_ID_RESET_EN */
501 0xc0016900, 309
310 0xc0036900,
502 0x000002ac, 311 0x000002ac,
503 0x00000000, 312 0x00000000, /* VGT_STRMOUT_EN */
504 0xc0016900, 313 0x00000000, /* VGT_REUSE_OFF */
505 0x000002ad, 314 0x00000000, /* VGT_VTX_CNT_EN */
506 0x00000000, 315
507 0xc0016900,
508 0x000002ae,
509 0x00000000,
510 0xc0016900, 316 0xc0016900,
511 0x000002c8, 317 0x000002c8,
512 0x00000000, 318 0x00000000, /* VGT_STRMOUT_BUFFER_EN */
513 0xc0016900, 319
514 0x00000206, 320 0xc0076900,
515 0x00000100,
516 0xc0016900,
517 0x00000204,
518 0x00010000,
519 0xc0036e00,
520 0x00000000,
521 0x00000012,
522 0x00000000,
523 0x00000000,
524 0xc0016900,
525 0x0000008f,
526 0x0000000f,
527 0xc0016900,
528 0x000001e8,
529 0x00000001,
530 0xc0016900,
531 0x00000202, 321 0x00000202,
532 0x00cc0000, 322 0x00cc0000, /* CB_COLOR_CONTROL */
323 0x00000210, /* DB_SHADER_CNTL */
324 0x00010000, /* PA_CL_CLIP_CNTL */
325 0x00000244, /* PA_SU_SC_MODE_CNTL */
326 0x00000100, /* PA_CL_VTE_CNTL */
327 0x00000000, /* PA_CL_VS_OUT_CNTL */
328 0x00000000, /* PA_CL_NANINF_CNTL */
329
330 0xc0026900,
331 0x0000008e,
332 0x0000000f, /* CB_TARGET_MASK */
333 0x0000000f, /* CB_SHADER_MASK */
334
533 0xc0016900, 335 0xc0016900,
534 0x00000205, 336 0x000001e8,
535 0x00000244, 337 0x00000001, /* CB_SHADER_CONTROL */
338
536 0xc0016900, 339 0xc0016900,
537 0x00000203, 340 0x00000185,
538 0x00000210, 341 0x00000000, /* SPI_VS_OUT_ID_0 */
342
539 0xc0016900, 343 0xc0016900,
344 0x00000191,
345 0x00000b00, /* SPI_PS_INPUT_CNTL_0 */
346
347 0xc0056900,
540 0x000001b1, 348 0x000001b1,
349 0x00000000, /* SPI_VS_OUT_CONFIG */
350 0x00000000, /* SPI_THREAD_GROUPING */
351 0x00000001, /* SPI_PS_IN_CONTROL_0 */
352 0x00000000, /* SPI_PS_IN_CONTROL_1 */
353 0x00000000, /* SPI_INTERP_CONTROL_0 */
354
355 0xc0036e00, /* SET_SAMPLER */
541 0x00000000, 356 0x00000000,
542 0xc0016900, 357 0x00000012,
543 0x00000185,
544 0x00000000,
545 0xc0016900,
546 0x000001b3,
547 0x00000001,
548 0xc0016900,
549 0x000001b4,
550 0x00000000, 358 0x00000000,
551 0xc0016900,
552 0x00000191,
553 0x00000b00,
554 0xc0016900,
555 0x000001b5,
556 0x00000000, 359 0x00000000,
557}; 360};
558 361
559const u32 r7xx_default_state[] = 362const u32 r7xx_default_state[] =
560{ 363{
561 0xc0012800, 364 0xc0012800, /* CONTEXT_CONTROL */
562 0x80000000, 365 0x80000000,
563 0x80000000, 366 0x80000000,
367
564 0xc0016800, 368 0xc0016800,
565 0x00000010, 369 0x00000010,
566 0x00008000, 370 0x00008000, /* WAIT_UNTIL */
371
567 0xc0016800, 372 0xc0016800,
568 0x00000542, 373 0x00000542,
569 0x07000002, 374 0x07000002, /* TA_CNTL_AUX */
375
570 0xc0016800, 376 0xc0016800,
571 0x000005c5, 377 0x000005c5,
572 0x00000000, 378 0x00000000, /* VC_ENHANCE */
379
573 0xc0016800, 380 0xc0016800,
574 0x00000363, 381 0x00000363,
575 0x00004000, 382 0x00004000, /* SQ_DYN_GPR_CNTL_PS_FLUSH_REQ */
383
576 0xc0016800, 384 0xc0016800,
577 0x0000060c, 385 0x0000060c,
578 0x00000000, 386 0x00000000, /* DB_DEBUG */
387
579 0xc0016800, 388 0xc0016800,
580 0x0000060e, 389 0x0000060e,
581 0x00420204, 390 0x00420204, /* DB_WATERMARKS */
582 0xc0016f00, 391
583 0x00000000, 392 0xc0026f00,
584 0x00000000,
585 0xc0016f00,
586 0x00000001,
587 0x00000000, 393 0x00000000,
394 0x00000000, /* SQ_VTX_BASE_VTX_LOC */
395 0x00000000, /* SQ_VTX_START_INST_LOC */
396
588 0xc0096900, 397 0xc0096900,
589 0x0000022a, 398 0x0000022a,
399 0x00000000, /* SQ_ESGS_RING_ITEMSIZE */
590 0x00000000, 400 0x00000000,
591 0x00000000, 401 0x00000000,
592 0x00000000, 402 0x00000000,
@@ -595,470 +405,269 @@ const u32 r7xx_default_state[] =
595 0x00000000, 405 0x00000000,
596 0x00000000, 406 0x00000000,
597 0x00000000, 407 0x00000000,
598 0x00000000, 408
599 0xc0016900, 409 0xc0016900,
600 0x00000004, 410 0x00000004,
601 0x00000000, 411 0x00000000, /* DB_DEPTH_INFO */
602 0xc0016900, 412
413 0xc0026900,
603 0x0000000a, 414 0x0000000a,
604 0x00000000, 415 0x00000000, /* DB_STENCIL_CLEAR */
605 0xc0016900, 416 0x00000000, /* DB_DEPTH_CLEAR */
606 0x0000000b, 417
607 0x00000000,
608 0xc0016900,
609 0x0000010c,
610 0x00000000,
611 0xc0016900,
612 0x0000010d,
613 0x00000000,
614 0xc0016900, 418 0xc0016900,
615 0x00000200, 419 0x00000200,
616 0x00000000, 420 0x00000000, /* DB_DEPTH_CONTROL */
617 0xc0016900, 421
422 0xc0026900,
618 0x00000343, 423 0x00000343,
619 0x00000060, 424 0x00000060, /* DB_RENDER_CONTROL */
620 0xc0016900, 425 0x00000000, /* DB_RENDER_OVERRIDE */
621 0x00000344, 426
622 0x00000000,
623 0xc0016900, 427 0xc0016900,
624 0x00000351, 428 0x00000351,
625 0x0000aa00, 429 0x0000aa00, /* DB_ALPHA_TO_MASK */
626 0xc0016900, 430
627 0x00000104, 431 0xc0096900,
628 0x00000000, 432 0x00000100,
629 0xc0016900, 433 0x00000800, /* VGT_MAX_VTX_INDX */
630 0x0000010e, 434 0x00000000, /* VGT_MIN_VTX_INDX */
631 0x00000000, 435 0x00000000, /* VGT_INDX_OFFSET */
632 0xc0046900, 436 0x00000000, /* VGT_MULTI_PRIM_IB_RESET_INDX */
633 0x00000105, 437 0x00000000, /* SX_ALPHA_TEST_CONTROL */
634 0x00000000, 438 0x00000000, /* CB_BLEND_RED */
635 0x00000000, 439 0x00000000,
636 0x00000000, 440 0x00000000,
637 0x00000000, 441 0x00000000,
442
443 0xc0036900,
444 0x0000010c,
445 0x00000000, /* DB_STENCILREFMASK */
446 0x00000000, /* DB_STENCILREFMASK_BF */
447 0x00000000, /* SX_ALPHA_REF */
448
638 0xc0046900, 449 0xc0046900,
639 0x0000030c, 450 0x0000030c, /* CB_CLRCMP_CNTL */
640 0x01000000, 451 0x01000000,
641 0x00000000, 452 0x00000000,
642 0x00000000, 453 0x00000000,
643 0x00000000, 454 0x00000000,
644 0xc0016900, 455
645 0x0000008e,
646 0x0000000f,
647 0xc0016900, 456 0xc0016900,
648 0x00000080, 457 0x00000080,
649 0x00000000, 458 0x00000000, /* PA_SC_WINDOW_OFFSET */
650 0xc0016900, 459
460 0xc00a6900,
651 0x00000083, 461 0x00000083,
652 0x0000ffff, 462 0x0000ffff, /* PA_SC_CLIP_RECT_RULE */
653 0xc0016900, 463 0x00000000, /* PA_SC_CLIPRECT_0_TL */
654 0x00000084,
655 0x00000000,
656 0xc0016900,
657 0x00000085,
658 0x20002000, 464 0x20002000,
659 0xc0016900,
660 0x00000086,
661 0x00000000, 465 0x00000000,
662 0xc0016900,
663 0x00000087,
664 0x20002000, 466 0x20002000,
665 0xc0016900,
666 0x00000088,
667 0x00000000, 467 0x00000000,
668 0xc0016900,
669 0x00000089,
670 0x20002000, 468 0x20002000,
671 0xc0016900,
672 0x0000008a,
673 0x00000000, 469 0x00000000,
674 0xc0016900,
675 0x0000008b,
676 0x20002000, 470 0x20002000,
677 0xc0016900, 471 0xaaaaaaaa, /* PA_SC_EDGERULE */
678 0x0000008c, 472
679 0xaaaaaaaa, 473 0xc0406900,
680 0xc0016900,
681 0x00000094, 474 0x00000094,
682 0x80000000, 475 0x80000000, /* PA_SC_VPORT_SCISSOR_0_TL */
683 0xc0016900, 476 0x20002000, /* PA_SC_VPORT_SCISSOR_0_BR */
684 0x00000095, 477 0x80000000, /* PA_SC_VPORT_SCISSOR_1_TL */
685 0x20002000, 478 0x20002000,
686 0xc0026900,
687 0x000000b4,
688 0x00000000,
689 0x3f800000,
690 0xc0016900,
691 0x00000096,
692 0x80000000, 479 0x80000000,
693 0xc0016900,
694 0x00000097,
695 0x20002000, 480 0x20002000,
696 0xc0026900,
697 0x000000b6,
698 0x00000000,
699 0x3f800000,
700 0xc0016900,
701 0x00000098,
702 0x80000000, 481 0x80000000,
703 0xc0016900,
704 0x00000099,
705 0x20002000, 482 0x20002000,
706 0xc0026900,
707 0x000000b8,
708 0x00000000,
709 0x3f800000,
710 0xc0016900,
711 0x0000009a,
712 0x80000000, 483 0x80000000,
713 0xc0016900,
714 0x0000009b,
715 0x20002000, 484 0x20002000,
716 0xc0026900,
717 0x000000ba,
718 0x00000000,
719 0x3f800000,
720 0xc0016900,
721 0x0000009c,
722 0x80000000, 485 0x80000000,
723 0xc0016900,
724 0x0000009d,
725 0x20002000, 486 0x20002000,
726 0xc0026900,
727 0x000000bc,
728 0x00000000,
729 0x3f800000,
730 0xc0016900,
731 0x0000009e,
732 0x80000000, 487 0x80000000,
733 0xc0016900,
734 0x0000009f,
735 0x20002000, 488 0x20002000,
736 0xc0026900,
737 0x000000be,
738 0x00000000,
739 0x3f800000,
740 0xc0016900,
741 0x000000a0,
742 0x80000000, 489 0x80000000,
743 0xc0016900,
744 0x000000a1,
745 0x20002000, 490 0x20002000,
746 0xc0026900,
747 0x000000c0,
748 0x00000000,
749 0x3f800000,
750 0xc0016900,
751 0x000000a2,
752 0x80000000, 491 0x80000000,
753 0xc0016900,
754 0x000000a3,
755 0x20002000, 492 0x20002000,
756 0xc0026900,
757 0x000000c2,
758 0x00000000,
759 0x3f800000,
760 0xc0016900,
761 0x000000a4,
762 0x80000000, 493 0x80000000,
763 0xc0016900,
764 0x000000a5,
765 0x20002000, 494 0x20002000,
766 0xc0026900,
767 0x000000c4,
768 0x00000000,
769 0x3f800000,
770 0xc0016900,
771 0x000000a6,
772 0x80000000, 495 0x80000000,
773 0xc0016900,
774 0x000000a7,
775 0x20002000, 496 0x20002000,
776 0xc0026900,
777 0x000000c6,
778 0x00000000,
779 0x3f800000,
780 0xc0016900,
781 0x000000a8,
782 0x80000000, 497 0x80000000,
783 0xc0016900,
784 0x000000a9,
785 0x20002000, 498 0x20002000,
786 0xc0026900,
787 0x000000c8,
788 0x00000000,
789 0x3f800000,
790 0xc0016900,
791 0x000000aa,
792 0x80000000, 499 0x80000000,
793 0xc0016900,
794 0x000000ab,
795 0x20002000, 500 0x20002000,
796 0xc0026900,
797 0x000000ca,
798 0x00000000,
799 0x3f800000,
800 0xc0016900,
801 0x000000ac,
802 0x80000000, 501 0x80000000,
803 0xc0016900,
804 0x000000ad,
805 0x20002000, 502 0x20002000,
806 0xc0026900,
807 0x000000cc,
808 0x00000000,
809 0x3f800000,
810 0xc0016900,
811 0x000000ae,
812 0x80000000, 503 0x80000000,
813 0xc0016900,
814 0x000000af,
815 0x20002000, 504 0x20002000,
816 0xc0026900,
817 0x000000ce,
818 0x00000000,
819 0x3f800000,
820 0xc0016900,
821 0x000000b0,
822 0x80000000, 505 0x80000000,
823 0xc0016900,
824 0x000000b1,
825 0x20002000, 506 0x20002000,
826 0xc0026900, 507 0x00000000, /* PA_SC_VPORT_ZMIN_0 */
827 0x000000d0,
828 0x00000000,
829 0x3f800000, 508 0x3f800000,
830 0xc0016900,
831 0x000000b2,
832 0x80000000,
833 0xc0016900,
834 0x000000b3,
835 0x20002000,
836 0xc0026900,
837 0x000000d2,
838 0x00000000, 509 0x00000000,
839 0x3f800000, 510 0x3f800000,
840 0xc0016900,
841 0x00000293,
842 0x00514000,
843 0xc0016900,
844 0x00000300,
845 0x00000000,
846 0xc0016900,
847 0x00000301,
848 0x00000000, 511 0x00000000,
849 0xc0016900, 512 0x3f800000,
850 0x00000312,
851 0xffffffff,
852 0xc0016900,
853 0x00000307,
854 0x00000000, 513 0x00000000,
855 0xc0016900, 514 0x3f800000,
856 0x00000308,
857 0x00000000, 515 0x00000000,
858 0xc0016900, 516 0x3f800000,
859 0x00000283,
860 0x00000000, 517 0x00000000,
861 0xc0016900, 518 0x3f800000,
862 0x00000292,
863 0x00000000, 519 0x00000000,
864 0xc0066900, 520 0x3f800000,
865 0x0000010f,
866 0x00000000, 521 0x00000000,
522 0x3f800000,
867 0x00000000, 523 0x00000000,
524 0x3f800000,
868 0x00000000, 525 0x00000000,
526 0x3f800000,
869 0x00000000, 527 0x00000000,
528 0x3f800000,
870 0x00000000, 529 0x00000000,
530 0x3f800000,
871 0x00000000, 531 0x00000000,
872 0xc0016900, 532 0x3f800000,
873 0x00000206,
874 0x00000000, 533 0x00000000,
875 0xc0016900, 534 0x3f800000,
876 0x00000207,
877 0x00000000, 535 0x00000000,
878 0xc0016900, 536 0x3f800000,
879 0x00000208,
880 0x00000000, 537 0x00000000,
881 0xc0046900,
882 0x00000303,
883 0x3f800000, 538 0x3f800000,
539
540 0xc0026900,
541 0x00000292,
542 0x00000000, /* PA_SC_MPASS_PS_CNTL */
543 0x00514000, /* PA_SC_MODE_CNTL */
544
545 0xc0096900,
546 0x00000300,
547 0x00000000, /* PA_SC_LINE_CNTL */
548 0x00000000, /* PA_SC_AA_CONFIG */
549 0x0000002d, /* PA_SU_VTX_CNTL */
550 0x3f800000, /* PA_CL_GB_VERT_CLIP_ADJ */
884 0x3f800000, 551 0x3f800000,
885 0x3f800000, 552 0x3f800000,
886 0x3f800000, 553 0x3f800000,
887 0xc0016900, 554 0x00000000, /* PA_SC_SAMPLE_LOCS_MCTX */
888 0x00000205,
889 0x00000004,
890 0xc0016900,
891 0x00000280,
892 0x00000000,
893 0xc0016900,
894 0x00000281,
895 0x00000000, 555 0x00000000,
556
896 0xc0016900, 557 0xc0016900,
558 0x00000312,
559 0xffffffff, /* PA_SC_AA_MASK */
560
561 0xc0066900,
897 0x0000037e, 562 0x0000037e,
898 0x00000000, 563 0x00000000, /* PA_SU_POLY_OFFSET_DB_FMT_CNTL */
899 0xc0016900, 564 0x00000000, /* PA_SU_POLY_OFFSET_CLAMP */
900 0x00000382, 565 0x00000000, /* PA_SU_POLY_OFFSET_FRONT_SCALE */
901 0x00000000, 566 0x00000000, /* PA_SU_POLY_OFFSET_FRONT_OFFSET */
902 0xc0016900, 567 0x00000000, /* PA_SU_POLY_OFFSET_BACK_SCALE */
903 0x00000380, 568 0x00000000, /* PA_SU_POLY_OFFSET_BACK_OFFSET */
904 0x00000000, 569
905 0xc0016900, 570 0xc0046900,
906 0x00000383,
907 0x00000000,
908 0xc0016900,
909 0x00000381,
910 0x00000000,
911 0xc0016900,
912 0x00000282,
913 0x00000008,
914 0xc0016900,
915 0x00000302,
916 0x0000002d,
917 0xc0016900,
918 0x0000037f,
919 0x00000000,
920 0xc0016900,
921 0x000001b2,
922 0x00000001,
923 0xc0016900,
924 0x000001b6, 571 0x000001b6,
925 0x00000000, 572 0x00000000, /* SPI_INPUT_Z */
926 0xc0016900, 573 0x00000000, /* SPI_FOG_CNTL */
927 0x000001b7, 574 0x00000000, /* SPI_FOG_FUNC_SCALE */
928 0x00000000, 575 0x00000000, /* SPI_FOG_FUNC_BIAS */
929 0xc0016900, 576
930 0x000001b8,
931 0x00000000,
932 0xc0016900,
933 0x000001b9,
934 0x00000000,
935 0xc0016900, 577 0xc0016900,
936 0x00000225, 578 0x00000225,
937 0x00000000, 579 0x00000000, /* SQ_PGM_START_FS */
580
938 0xc0016900, 581 0xc0016900,
939 0x00000229, 582 0x00000229,
940 0x00000000, 583 0x00000000, /* SQ_PGM_RESOURCES_FS */
584
941 0xc0016900, 585 0xc0016900,
942 0x00000237, 586 0x00000237,
943 0x00000000, 587 0x00000000, /* SQ_PGM_CF_OFFSET_FS */
944 0xc0016900, 588
945 0x00000100, 589 0xc0026900,
946 0x00000800,
947 0xc0016900,
948 0x00000101,
949 0x00000000,
950 0xc0016900,
951 0x00000102,
952 0x00000000,
953 0xc0016900,
954 0x000002a8, 590 0x000002a8,
955 0x00000000, 591 0x00000000, /* VGT_INSTANCE_STEP_RATE_0 */
956 0xc0016900, 592 0x00000000, /* VGT_INSTANCE_STEP_RATE_1 */
957 0x000002a9, 593
958 0x00000000, 594 0xc0116900,
959 0xc0016900, 595 0x00000280,
960 0x00000103, 596 0x00000000, /* PA_SU_POINT_SIZE */
961 0x00000000, 597 0x00000000, /* PA_SU_POINT_MINMAX */
962 0xc0016900, 598 0x00000008, /* PA_SU_LINE_CNTL */
963 0x00000284, 599 0x00000000, /* PA_SC_LINE_STIPPLE */
964 0x00000000, 600 0x00000000, /* VGT_OUTPUT_PATH_CNTL */
965 0xc0016900, 601 0x00000000, /* VGT_HOS_CNTL */
966 0x00000290, 602 0x00000000, /* VGT_HOS_MAX_TESS_LEVEL */
967 0x00000000, 603 0x00000000, /* VGT_HOS_MIN_TESS_LEVEL */
968 0xc0016900, 604 0x00000000, /* VGT_HOS_REUSE_DEPTH */
969 0x00000285, 605 0x00000000, /* VGT_GROUP_PRIM_TYPE */
970 0x00000000, 606 0x00000000, /* VGT_GROUP_FIRST_DECR */
971 0xc0016900, 607 0x00000000, /* VGT_GROUP_DECR */
972 0x00000286, 608 0x00000000, /* VGT_GROUP_VECT_0_CNTL */
973 0x00000000, 609 0x00000000, /* VGT_GROUP_VECT_1_CNTL */
974 0xc0016900, 610 0x00000000, /* VGT_GROUP_VECT_0_FMT_CNTL */
975 0x00000287, 611 0x00000000, /* VGT_GROUP_VECT_1_FMT_CNTL */
976 0x00000000, 612 0x00000000, /* VGT_GS_MODE */
977 0xc0016900, 613
978 0x00000288,
979 0x00000000,
980 0xc0016900,
981 0x00000289,
982 0x00000000,
983 0xc0016900,
984 0x0000028a,
985 0x00000000,
986 0xc0016900,
987 0x0000028b,
988 0x00000000,
989 0xc0016900,
990 0x0000028c,
991 0x00000000,
992 0xc0016900,
993 0x0000028d,
994 0x00000000,
995 0xc0016900,
996 0x0000028e,
997 0x00000000,
998 0xc0016900,
999 0x0000028f,
1000 0x00000000,
1001 0xc0016900, 614 0xc0016900,
1002 0x000002a1, 615 0x000002a1,
1003 0x00000000, 616 0x00000000, /* VGT_PRIMITIVEID_EN */
617
1004 0xc0016900, 618 0xc0016900,
1005 0x000002a5, 619 0x000002a5,
1006 0x00000000, 620 0x00000000, /* VGT_MULTI_PRIM_ID_RESET_EN */
1007 0xc0016900, 621
622 0xc0036900,
1008 0x000002ac, 623 0x000002ac,
1009 0x00000000, 624 0x00000000, /* VGT_STRMOUT_EN */
1010 0xc0016900, 625 0x00000000, /* VGT_REUSE_OFF */
1011 0x000002ad, 626 0x00000000, /* VGT_VTX_CNT_EN */
1012 0x00000000, 627
1013 0xc0016900,
1014 0x000002ae,
1015 0x00000000,
1016 0xc0016900, 628 0xc0016900,
1017 0x000002c8, 629 0x000002c8,
1018 0x00000000, 630 0x00000000, /* VGT_STRMOUT_BUFFER_EN */
1019 0xc0016900, 631
1020 0x00000206, 632 0xc0076900,
1021 0x00000100,
1022 0xc0016900,
1023 0x00000204,
1024 0x00010000,
1025 0xc0036e00,
1026 0x00000000,
1027 0x00000012,
1028 0x00000000,
1029 0x00000000,
1030 0xc0016900,
1031 0x0000008f,
1032 0x0000000f,
1033 0xc0016900,
1034 0x000001e8,
1035 0x00000001,
1036 0xc0016900,
1037 0x00000202, 633 0x00000202,
1038 0x00cc0000, 634 0x00cc0000, /* CB_COLOR_CONTROL */
635 0x00000210, /* DB_SHADER_CNTL */
636 0x00010000, /* PA_CL_CLIP_CNTL */
637 0x00000244, /* PA_SU_SC_MODE_CNTL */
638 0x00000100, /* PA_CL_VTE_CNTL */
639 0x00000000, /* PA_CL_VS_OUT_CNTL */
640 0x00000000, /* PA_CL_NANINF_CNTL */
641
642 0xc0026900,
643 0x0000008e,
644 0x0000000f, /* CB_TARGET_MASK */
645 0x0000000f, /* CB_SHADER_MASK */
646
1039 0xc0016900, 647 0xc0016900,
1040 0x00000205, 648 0x000001e8,
1041 0x00000244, 649 0x00000001, /* CB_SHADER_CONTROL */
650
1042 0xc0016900, 651 0xc0016900,
1043 0x00000203, 652 0x00000185,
1044 0x00000210, 653 0x00000000, /* SPI_VS_OUT_ID_0 */
654
1045 0xc0016900, 655 0xc0016900,
656 0x00000191,
657 0x00000b00, /* SPI_PS_INPUT_CNTL_0 */
658
659 0xc0056900,
1046 0x000001b1, 660 0x000001b1,
661 0x00000000, /* SPI_VS_OUT_CONFIG */
662 0x00000001, /* SPI_THREAD_GROUPING */
663 0x00000001, /* SPI_PS_IN_CONTROL_0 */
664 0x00000000, /* SPI_PS_IN_CONTROL_1 */
665 0x00000000, /* SPI_INTERP_CONTROL_0 */
666
667 0xc0036e00, /* SET_SAMPLER */
1047 0x00000000, 668 0x00000000,
1048 0xc0016900, 669 0x00000012,
1049 0x00000185,
1050 0x00000000,
1051 0xc0016900,
1052 0x000001b3,
1053 0x00000001,
1054 0xc0016900,
1055 0x000001b4,
1056 0x00000000, 670 0x00000000,
1057 0xc0016900,
1058 0x00000191,
1059 0x00000b00,
1060 0xc0016900,
1061 0x000001b5,
1062 0x00000000, 671 0x00000000,
1063}; 672};
1064 673
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index c39c1bc13016..c3ea212e0c3c 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -25,6 +25,7 @@
25 * Alex Deucher 25 * Alex Deucher
26 * Jerome Glisse 26 * Jerome Glisse
27 */ 27 */
28#include <linux/kernel.h>
28#include "drmP.h" 29#include "drmP.h"
29#include "radeon.h" 30#include "radeon.h"
30#include "r600d.h" 31#include "r600d.h"
@@ -166,7 +167,7 @@ static void r600_cs_track_init(struct r600_cs_track *track)
166static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i) 167static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i)
167{ 168{
168 struct r600_cs_track *track = p->track; 169 struct r600_cs_track *track = p->track;
169 u32 bpe = 0, pitch, slice_tile_max, size, tmp, height; 170 u32 bpe = 0, pitch, slice_tile_max, size, tmp, height, pitch_align;
170 volatile u32 *ib = p->ib->ptr; 171 volatile u32 *ib = p->ib->ptr;
171 172
172 if (G_0280A0_TILE_MODE(track->cb_color_info[i])) { 173 if (G_0280A0_TILE_MODE(track->cb_color_info[i])) {
@@ -180,56 +181,57 @@ static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i)
180 i, track->cb_color_info[i]); 181 i, track->cb_color_info[i]);
181 return -EINVAL; 182 return -EINVAL;
182 } 183 }
183 pitch = (G_028060_PITCH_TILE_MAX(track->cb_color_size[i]) + 1) << 3; 184 /* pitch is the number of 8x8 tiles per row */
185 pitch = G_028060_PITCH_TILE_MAX(track->cb_color_size[i]) + 1;
184 slice_tile_max = G_028060_SLICE_TILE_MAX(track->cb_color_size[i]) + 1; 186 slice_tile_max = G_028060_SLICE_TILE_MAX(track->cb_color_size[i]) + 1;
185 if (!pitch) { 187 height = size / (pitch * 8 * bpe);
186 dev_warn(p->dev, "%s:%d cb pitch (%d) for %d invalid (0x%08X)\n",
187 __func__, __LINE__, pitch, i, track->cb_color_size[i]);
188 return -EINVAL;
189 }
190 height = size / (pitch * bpe);
191 if (height > 8192) 188 if (height > 8192)
192 height = 8192; 189 height = 8192;
190 if (height > 7)
191 height &= ~0x7;
193 switch (G_0280A0_ARRAY_MODE(track->cb_color_info[i])) { 192 switch (G_0280A0_ARRAY_MODE(track->cb_color_info[i])) {
194 case V_0280A0_ARRAY_LINEAR_GENERAL: 193 case V_0280A0_ARRAY_LINEAR_GENERAL:
194 /* technically height & 0x7 */
195 break;
195 case V_0280A0_ARRAY_LINEAR_ALIGNED: 196 case V_0280A0_ARRAY_LINEAR_ALIGNED:
196 if (pitch & 0x3f) { 197 pitch_align = max((u32)64, (u32)(track->group_size / bpe)) / 8;
197 dev_warn(p->dev, "%s:%d cb pitch (%d x %d = %d) invalid\n", 198 if (!IS_ALIGNED(pitch, pitch_align)) {
198 __func__, __LINE__, pitch, bpe, pitch * bpe); 199 dev_warn(p->dev, "%s:%d cb pitch (%d) invalid\n",
200 __func__, __LINE__, pitch);
199 return -EINVAL; 201 return -EINVAL;
200 } 202 }
201 if ((pitch * bpe) & (track->group_size - 1)) { 203 if (!IS_ALIGNED(height, 8)) {
202 dev_warn(p->dev, "%s:%d cb pitch (%d) invalid\n", 204 dev_warn(p->dev, "%s:%d cb height (%d) invalid\n",
203 __func__, __LINE__, pitch); 205 __func__, __LINE__, height);
204 return -EINVAL; 206 return -EINVAL;
205 } 207 }
206 break; 208 break;
207 case V_0280A0_ARRAY_1D_TILED_THIN1: 209 case V_0280A0_ARRAY_1D_TILED_THIN1:
208 if ((pitch * 8 * bpe * track->nsamples) & (track->group_size - 1)) { 210 pitch_align = max((u32)8, (u32)(track->group_size / (8 * bpe * track->nsamples))) / 8;
211 if (!IS_ALIGNED(pitch, pitch_align)) {
209 dev_warn(p->dev, "%s:%d cb pitch (%d) invalid\n", 212 dev_warn(p->dev, "%s:%d cb pitch (%d) invalid\n",
210 __func__, __LINE__, pitch); 213 __func__, __LINE__, pitch);
214 return -EINVAL;
215 }
216 if (!IS_ALIGNED(height, 8)) {
217 dev_warn(p->dev, "%s:%d cb height (%d) invalid\n",
218 __func__, __LINE__, height);
211 return -EINVAL; 219 return -EINVAL;
212 } 220 }
213 height &= ~0x7;
214 if (!height)
215 height = 8;
216 break; 221 break;
217 case V_0280A0_ARRAY_2D_TILED_THIN1: 222 case V_0280A0_ARRAY_2D_TILED_THIN1:
218 if (pitch & ((8 * track->nbanks) - 1)) { 223 pitch_align = max((u32)track->nbanks,
224 (u32)(((track->group_size / 8) / (bpe * track->nsamples)) * track->nbanks));
225 if (!IS_ALIGNED(pitch, pitch_align)) {
219 dev_warn(p->dev, "%s:%d cb pitch (%d) invalid\n", 226 dev_warn(p->dev, "%s:%d cb pitch (%d) invalid\n",
220 __func__, __LINE__, pitch); 227 __func__, __LINE__, pitch);
221 return -EINVAL; 228 return -EINVAL;
222 } 229 }
223 tmp = pitch * 8 * bpe * track->nsamples; 230 if (!IS_ALIGNED((height / 8), track->nbanks)) {
224 tmp = tmp / track->nbanks; 231 dev_warn(p->dev, "%s:%d cb height (%d) invalid\n",
225 if (tmp & (track->group_size - 1)) { 232 __func__, __LINE__, height);
226 dev_warn(p->dev, "%s:%d cb pitch (%d) invalid\n",
227 __func__, __LINE__, pitch);
228 return -EINVAL; 233 return -EINVAL;
229 } 234 }
230 height &= ~((16 * track->npipes) - 1);
231 if (!height)
232 height = 16 * track->npipes;
233 break; 235 break;
234 default: 236 default:
235 dev_warn(p->dev, "%s invalid tiling %d for %d (0x%08X)\n", __func__, 237 dev_warn(p->dev, "%s invalid tiling %d for %d (0x%08X)\n", __func__,
@@ -238,16 +240,20 @@ static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i)
238 return -EINVAL; 240 return -EINVAL;
239 } 241 }
240 /* check offset */ 242 /* check offset */
241 tmp = height * pitch; 243 tmp = height * pitch * 8 * bpe;
242 if ((tmp + track->cb_color_bo_offset[i]) > radeon_bo_size(track->cb_color_bo[i])) { 244 if ((tmp + track->cb_color_bo_offset[i]) > radeon_bo_size(track->cb_color_bo[i])) {
243 dev_warn(p->dev, "%s offset[%d] %d to big\n", __func__, i, track->cb_color_bo_offset[i]); 245 dev_warn(p->dev, "%s offset[%d] %d too big\n", __func__, i, track->cb_color_bo_offset[i]);
246 return -EINVAL;
247 }
248 if (!IS_ALIGNED(track->cb_color_bo_offset[i], track->group_size)) {
249 dev_warn(p->dev, "%s offset[%d] %d not aligned\n", __func__, i, track->cb_color_bo_offset[i]);
244 return -EINVAL; 250 return -EINVAL;
245 } 251 }
246 /* limit max tile */ 252 /* limit max tile */
247 tmp = (height * pitch) >> 6; 253 tmp = (height * pitch * 8) >> 6;
248 if (tmp < slice_tile_max) 254 if (tmp < slice_tile_max)
249 slice_tile_max = tmp; 255 slice_tile_max = tmp;
250 tmp = S_028060_PITCH_TILE_MAX((pitch >> 3) - 1) | 256 tmp = S_028060_PITCH_TILE_MAX(pitch - 1) |
251 S_028060_SLICE_TILE_MAX(slice_tile_max - 1); 257 S_028060_SLICE_TILE_MAX(slice_tile_max - 1);
252 ib[track->cb_color_size_idx[i]] = tmp; 258 ib[track->cb_color_size_idx[i]] = tmp;
253 return 0; 259 return 0;
@@ -289,7 +295,7 @@ static int r600_cs_track_check(struct radeon_cs_parser *p)
289 /* Check depth buffer */ 295 /* Check depth buffer */
290 if (G_028800_STENCIL_ENABLE(track->db_depth_control) || 296 if (G_028800_STENCIL_ENABLE(track->db_depth_control) ||
291 G_028800_Z_ENABLE(track->db_depth_control)) { 297 G_028800_Z_ENABLE(track->db_depth_control)) {
292 u32 nviews, bpe, ntiles; 298 u32 nviews, bpe, ntiles, pitch, pitch_align, height, size;
293 if (track->db_bo == NULL) { 299 if (track->db_bo == NULL) {
294 dev_warn(p->dev, "z/stencil with no depth buffer\n"); 300 dev_warn(p->dev, "z/stencil with no depth buffer\n");
295 return -EINVAL; 301 return -EINVAL;
@@ -332,6 +338,51 @@ static int r600_cs_track_check(struct radeon_cs_parser *p)
332 } 338 }
333 ib[track->db_depth_size_idx] = S_028000_SLICE_TILE_MAX(tmp - 1) | (track->db_depth_size & 0x3FF); 339 ib[track->db_depth_size_idx] = S_028000_SLICE_TILE_MAX(tmp - 1) | (track->db_depth_size & 0x3FF);
334 } else { 340 } else {
341 size = radeon_bo_size(track->db_bo);
342 pitch = G_028000_PITCH_TILE_MAX(track->db_depth_size) + 1;
343 height = size / (pitch * 8 * bpe);
344 height &= ~0x7;
345 if (!height)
346 height = 8;
347
348 switch (G_028010_ARRAY_MODE(track->db_depth_info)) {
349 case V_028010_ARRAY_1D_TILED_THIN1:
350 pitch_align = (max((u32)8, (u32)(track->group_size / (8 * bpe))) / 8);
351 if (!IS_ALIGNED(pitch, pitch_align)) {
352 dev_warn(p->dev, "%s:%d db pitch (%d) invalid\n",
353 __func__, __LINE__, pitch);
354 return -EINVAL;
355 }
356 if (!IS_ALIGNED(height, 8)) {
357 dev_warn(p->dev, "%s:%d db height (%d) invalid\n",
358 __func__, __LINE__, height);
359 return -EINVAL;
360 }
361 break;
362 case V_028010_ARRAY_2D_TILED_THIN1:
363 pitch_align = max((u32)track->nbanks,
364 (u32)(((track->group_size / 8) / bpe) * track->nbanks));
365 if (!IS_ALIGNED(pitch, pitch_align)) {
366 dev_warn(p->dev, "%s:%d db pitch (%d) invalid\n",
367 __func__, __LINE__, pitch);
368 return -EINVAL;
369 }
370 if ((height / 8) & (track->nbanks - 1)) {
371 dev_warn(p->dev, "%s:%d db height (%d) invalid\n",
372 __func__, __LINE__, height);
373 return -EINVAL;
374 }
375 break;
376 default:
377 dev_warn(p->dev, "%s invalid tiling %d (0x%08X)\n", __func__,
378 G_028010_ARRAY_MODE(track->db_depth_info),
379 track->db_depth_info);
380 return -EINVAL;
381 }
382 if (!IS_ALIGNED(track->db_offset, track->group_size)) {
383 dev_warn(p->dev, "%s offset[%d] %d not aligned\n", __func__, i, track->db_offset);
384 return -EINVAL;
385 }
335 ntiles = G_028000_SLICE_TILE_MAX(track->db_depth_size) + 1; 386 ntiles = G_028000_SLICE_TILE_MAX(track->db_depth_size) + 1;
336 nviews = G_028004_SLICE_MAX(track->db_depth_view) + 1; 387 nviews = G_028004_SLICE_MAX(track->db_depth_view) + 1;
337 tmp = ntiles * bpe * 64 * nviews; 388 tmp = ntiles * bpe * 64 * nviews;
@@ -585,7 +636,7 @@ static int r600_cs_packet_parse_vline(struct radeon_cs_parser *p)
585 header = radeon_get_ib_value(p, h_idx); 636 header = radeon_get_ib_value(p, h_idx);
586 crtc_id = radeon_get_ib_value(p, h_idx + 2 + 7 + 1); 637 crtc_id = radeon_get_ib_value(p, h_idx + 2 + 7 + 1);
587 reg = CP_PACKET0_GET_REG(header); 638 reg = CP_PACKET0_GET_REG(header);
588 mutex_lock(&p->rdev->ddev->mode_config.mutex); 639
589 obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC); 640 obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC);
590 if (!obj) { 641 if (!obj) {
591 DRM_ERROR("cannot find crtc %d\n", crtc_id); 642 DRM_ERROR("cannot find crtc %d\n", crtc_id);
@@ -620,7 +671,6 @@ static int r600_cs_packet_parse_vline(struct radeon_cs_parser *p)
620 ib[h_idx + 4] = AVIVO_D2MODE_VLINE_STATUS >> 2; 671 ib[h_idx + 4] = AVIVO_D2MODE_VLINE_STATUS >> 2;
621 } 672 }
622out: 673out:
623 mutex_unlock(&p->rdev->ddev->mode_config.mutex);
624 return r; 674 return r;
625} 675}
626 676
@@ -725,7 +775,25 @@ static inline int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx
725 track->db_depth_control = radeon_get_ib_value(p, idx); 775 track->db_depth_control = radeon_get_ib_value(p, idx);
726 break; 776 break;
727 case R_028010_DB_DEPTH_INFO: 777 case R_028010_DB_DEPTH_INFO:
728 track->db_depth_info = radeon_get_ib_value(p, idx); 778 if (r600_cs_packet_next_is_pkt3_nop(p)) {
779 r = r600_cs_packet_next_reloc(p, &reloc);
780 if (r) {
781 dev_warn(p->dev, "bad SET_CONTEXT_REG "
782 "0x%04X\n", reg);
783 return -EINVAL;
784 }
785 track->db_depth_info = radeon_get_ib_value(p, idx);
786 ib[idx] &= C_028010_ARRAY_MODE;
787 track->db_depth_info &= C_028010_ARRAY_MODE;
788 if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO) {
789 ib[idx] |= S_028010_ARRAY_MODE(V_028010_ARRAY_2D_TILED_THIN1);
790 track->db_depth_info |= S_028010_ARRAY_MODE(V_028010_ARRAY_2D_TILED_THIN1);
791 } else {
792 ib[idx] |= S_028010_ARRAY_MODE(V_028010_ARRAY_1D_TILED_THIN1);
793 track->db_depth_info |= S_028010_ARRAY_MODE(V_028010_ARRAY_1D_TILED_THIN1);
794 }
795 } else
796 track->db_depth_info = radeon_get_ib_value(p, idx);
729 break; 797 break;
730 case R_028004_DB_DEPTH_VIEW: 798 case R_028004_DB_DEPTH_VIEW:
731 track->db_depth_view = radeon_get_ib_value(p, idx); 799 track->db_depth_view = radeon_get_ib_value(p, idx);
@@ -758,8 +826,25 @@ static inline int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx
758 case R_0280B4_CB_COLOR5_INFO: 826 case R_0280B4_CB_COLOR5_INFO:
759 case R_0280B8_CB_COLOR6_INFO: 827 case R_0280B8_CB_COLOR6_INFO:
760 case R_0280BC_CB_COLOR7_INFO: 828 case R_0280BC_CB_COLOR7_INFO:
761 tmp = (reg - R_0280A0_CB_COLOR0_INFO) / 4; 829 if (r600_cs_packet_next_is_pkt3_nop(p)) {
762 track->cb_color_info[tmp] = radeon_get_ib_value(p, idx); 830 r = r600_cs_packet_next_reloc(p, &reloc);
831 if (r) {
832 dev_err(p->dev, "bad SET_CONTEXT_REG 0x%04X\n", reg);
833 return -EINVAL;
834 }
835 tmp = (reg - R_0280A0_CB_COLOR0_INFO) / 4;
836 track->cb_color_info[tmp] = radeon_get_ib_value(p, idx);
837 if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO) {
838 ib[idx] |= S_0280A0_ARRAY_MODE(V_0280A0_ARRAY_2D_TILED_THIN1);
839 track->cb_color_info[tmp] |= S_0280A0_ARRAY_MODE(V_0280A0_ARRAY_2D_TILED_THIN1);
840 } else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO) {
841 ib[idx] |= S_0280A0_ARRAY_MODE(V_0280A0_ARRAY_1D_TILED_THIN1);
842 track->cb_color_info[tmp] |= S_0280A0_ARRAY_MODE(V_0280A0_ARRAY_1D_TILED_THIN1);
843 }
844 } else {
845 tmp = (reg - R_0280A0_CB_COLOR0_INFO) / 4;
846 track->cb_color_info[tmp] = radeon_get_ib_value(p, idx);
847 }
763 break; 848 break;
764 case R_028060_CB_COLOR0_SIZE: 849 case R_028060_CB_COLOR0_SIZE:
765 case R_028064_CB_COLOR1_SIZE: 850 case R_028064_CB_COLOR1_SIZE:
@@ -947,8 +1032,9 @@ static inline unsigned minify(unsigned size, unsigned levels)
947} 1032}
948 1033
949static void r600_texture_size(unsigned nfaces, unsigned blevel, unsigned nlevels, 1034static void r600_texture_size(unsigned nfaces, unsigned blevel, unsigned nlevels,
950 unsigned w0, unsigned h0, unsigned d0, unsigned bpe, 1035 unsigned w0, unsigned h0, unsigned d0, unsigned bpe,
951 unsigned *l0_size, unsigned *mipmap_size) 1036 unsigned pitch_align,
1037 unsigned *l0_size, unsigned *mipmap_size)
952{ 1038{
953 unsigned offset, i, level, face; 1039 unsigned offset, i, level, face;
954 unsigned width, height, depth, rowstride, size; 1040 unsigned width, height, depth, rowstride, size;
@@ -961,13 +1047,13 @@ static void r600_texture_size(unsigned nfaces, unsigned blevel, unsigned nlevels
961 height = minify(h0, i); 1047 height = minify(h0, i);
962 depth = minify(d0, i); 1048 depth = minify(d0, i);
963 for(face = 0; face < nfaces; face++) { 1049 for(face = 0; face < nfaces; face++) {
964 rowstride = ((width * bpe) + 255) & ~255; 1050 rowstride = ALIGN((width * bpe), pitch_align);
965 size = height * rowstride * depth; 1051 size = height * rowstride * depth;
966 offset += size; 1052 offset += size;
967 offset = (offset + 0x1f) & ~0x1f; 1053 offset = (offset + 0x1f) & ~0x1f;
968 } 1054 }
969 } 1055 }
970 *l0_size = (((w0 * bpe) + 255) & ~255) * h0 * d0; 1056 *l0_size = ALIGN((w0 * bpe), pitch_align) * h0 * d0;
971 *mipmap_size = offset; 1057 *mipmap_size = offset;
972 if (!blevel) 1058 if (!blevel)
973 *mipmap_size -= *l0_size; 1059 *mipmap_size -= *l0_size;
@@ -986,16 +1072,23 @@ static void r600_texture_size(unsigned nfaces, unsigned blevel, unsigned nlevels
986 * the texture and mipmap bo object are big enough to cover this resource. 1072 * the texture and mipmap bo object are big enough to cover this resource.
987 */ 1073 */
988static inline int r600_check_texture_resource(struct radeon_cs_parser *p, u32 idx, 1074static inline int r600_check_texture_resource(struct radeon_cs_parser *p, u32 idx,
989 struct radeon_bo *texture, 1075 struct radeon_bo *texture,
990 struct radeon_bo *mipmap) 1076 struct radeon_bo *mipmap,
1077 u32 tiling_flags)
991{ 1078{
1079 struct r600_cs_track *track = p->track;
992 u32 nfaces, nlevels, blevel, w0, h0, d0, bpe = 0; 1080 u32 nfaces, nlevels, blevel, w0, h0, d0, bpe = 0;
993 u32 word0, word1, l0_size, mipmap_size; 1081 u32 word0, word1, l0_size, mipmap_size, pitch, pitch_align;
994 1082
995 /* on legacy kernel we don't perform advanced check */ 1083 /* on legacy kernel we don't perform advanced check */
996 if (p->rdev == NULL) 1084 if (p->rdev == NULL)
997 return 0; 1085 return 0;
1086
998 word0 = radeon_get_ib_value(p, idx + 0); 1087 word0 = radeon_get_ib_value(p, idx + 0);
1088 if (tiling_flags & RADEON_TILING_MACRO)
1089 word0 |= S_038000_TILE_MODE(V_038000_ARRAY_2D_TILED_THIN1);
1090 else if (tiling_flags & RADEON_TILING_MICRO)
1091 word0 |= S_038000_TILE_MODE(V_038000_ARRAY_1D_TILED_THIN1);
999 word1 = radeon_get_ib_value(p, idx + 1); 1092 word1 = radeon_get_ib_value(p, idx + 1);
1000 w0 = G_038000_TEX_WIDTH(word0) + 1; 1093 w0 = G_038000_TEX_WIDTH(word0) + 1;
1001 h0 = G_038004_TEX_HEIGHT(word1) + 1; 1094 h0 = G_038004_TEX_HEIGHT(word1) + 1;
@@ -1022,11 +1115,55 @@ static inline int r600_check_texture_resource(struct radeon_cs_parser *p, u32 i
1022 __func__, __LINE__, G_038004_DATA_FORMAT(word1)); 1115 __func__, __LINE__, G_038004_DATA_FORMAT(word1));
1023 return -EINVAL; 1116 return -EINVAL;
1024 } 1117 }
1118
1119 pitch = G_038000_PITCH(word0) + 1;
1120 switch (G_038000_TILE_MODE(word0)) {
1121 case V_038000_ARRAY_LINEAR_GENERAL:
1122 pitch_align = 1;
1123 /* XXX check height align */
1124 break;
1125 case V_038000_ARRAY_LINEAR_ALIGNED:
1126 pitch_align = max((u32)64, (u32)(track->group_size / bpe)) / 8;
1127 if (!IS_ALIGNED(pitch, pitch_align)) {
1128 dev_warn(p->dev, "%s:%d tex pitch (%d) invalid\n",
1129 __func__, __LINE__, pitch);
1130 return -EINVAL;
1131 }
1132 /* XXX check height align */
1133 break;
1134 case V_038000_ARRAY_1D_TILED_THIN1:
1135 pitch_align = max((u32)8, (u32)(track->group_size / (8 * bpe))) / 8;
1136 if (!IS_ALIGNED(pitch, pitch_align)) {
1137 dev_warn(p->dev, "%s:%d tex pitch (%d) invalid\n",
1138 __func__, __LINE__, pitch);
1139 return -EINVAL;
1140 }
1141 /* XXX check height align */
1142 break;
1143 case V_038000_ARRAY_2D_TILED_THIN1:
1144 pitch_align = max((u32)track->nbanks,
1145 (u32)(((track->group_size / 8) / bpe) * track->nbanks));
1146 if (!IS_ALIGNED(pitch, pitch_align)) {
1147 dev_warn(p->dev, "%s:%d tex pitch (%d) invalid\n",
1148 __func__, __LINE__, pitch);
1149 return -EINVAL;
1150 }
1151 /* XXX check height align */
1152 break;
1153 default:
1154 dev_warn(p->dev, "%s invalid tiling %d (0x%08X)\n", __func__,
1155 G_038000_TILE_MODE(word0), word0);
1156 return -EINVAL;
1157 }
1158 /* XXX check offset align */
1159
1025 word0 = radeon_get_ib_value(p, idx + 4); 1160 word0 = radeon_get_ib_value(p, idx + 4);
1026 word1 = radeon_get_ib_value(p, idx + 5); 1161 word1 = radeon_get_ib_value(p, idx + 5);
1027 blevel = G_038010_BASE_LEVEL(word0); 1162 blevel = G_038010_BASE_LEVEL(word0);
1028 nlevels = G_038014_LAST_LEVEL(word1); 1163 nlevels = G_038014_LAST_LEVEL(word1);
1029 r600_texture_size(nfaces, blevel, nlevels, w0, h0, d0, bpe, &l0_size, &mipmap_size); 1164 r600_texture_size(nfaces, blevel, nlevels, w0, h0, d0, bpe,
1165 (pitch_align * bpe),
1166 &l0_size, &mipmap_size);
1030 /* using get ib will give us the offset into the texture bo */ 1167 /* using get ib will give us the offset into the texture bo */
1031 word0 = radeon_get_ib_value(p, idx + 2); 1168 word0 = radeon_get_ib_value(p, idx + 2);
1032 if ((l0_size + word0) > radeon_bo_size(texture)) { 1169 if ((l0_size + word0) > radeon_bo_size(texture)) {
@@ -1240,6 +1377,10 @@ static int r600_packet3_check(struct radeon_cs_parser *p,
1240 return -EINVAL; 1377 return -EINVAL;
1241 } 1378 }
1242 ib[idx+1+(i*7)+2] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); 1379 ib[idx+1+(i*7)+2] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);
1380 if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
1381 ib[idx+1+(i*7)+0] |= S_038000_TILE_MODE(V_038000_ARRAY_2D_TILED_THIN1);
1382 else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
1383 ib[idx+1+(i*7)+0] |= S_038000_TILE_MODE(V_038000_ARRAY_1D_TILED_THIN1);
1243 texture = reloc->robj; 1384 texture = reloc->robj;
1244 /* tex mip base */ 1385 /* tex mip base */
1245 r = r600_cs_packet_next_reloc(p, &reloc); 1386 r = r600_cs_packet_next_reloc(p, &reloc);
@@ -1250,7 +1391,7 @@ static int r600_packet3_check(struct radeon_cs_parser *p,
1250 ib[idx+1+(i*7)+3] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); 1391 ib[idx+1+(i*7)+3] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);
1251 mipmap = reloc->robj; 1392 mipmap = reloc->robj;
1252 r = r600_check_texture_resource(p, idx+(i*7)+1, 1393 r = r600_check_texture_resource(p, idx+(i*7)+1,
1253 texture, mipmap); 1394 texture, mipmap, reloc->lobj.tiling_flags);
1254 if (r) 1395 if (r)
1255 return r; 1396 return r;
1256 break; 1397 break;
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c
index 26b4bc9d89a5..e6a58ed48dcf 100644
--- a/drivers/gpu/drm/radeon/r600_hdmi.c
+++ b/drivers/gpu/drm/radeon/r600_hdmi.c
@@ -435,7 +435,8 @@ static int r600_hdmi_find_free_block(struct drm_device *dev)
435 } 435 }
436 } 436 }
437 437
438 if (rdev->family == CHIP_RS600 || rdev->family == CHIP_RS690) { 438 if (rdev->family == CHIP_RS600 || rdev->family == CHIP_RS690 ||
439 rdev->family == CHIP_RS740) {
439 return free_blocks[0] ? R600_HDMI_BLOCK1 : 0; 440 return free_blocks[0] ? R600_HDMI_BLOCK1 : 0;
440 } else if (rdev->family >= CHIP_R600) { 441 } else if (rdev->family >= CHIP_R600) {
441 if (free_blocks[0]) 442 if (free_blocks[0])
@@ -466,7 +467,8 @@ static void r600_hdmi_assign_block(struct drm_encoder *encoder)
466 if (ASIC_IS_DCE32(rdev)) 467 if (ASIC_IS_DCE32(rdev))
467 radeon_encoder->hdmi_config_offset = dig->dig_encoder ? 468 radeon_encoder->hdmi_config_offset = dig->dig_encoder ?
468 R600_HDMI_CONFIG2 : R600_HDMI_CONFIG1; 469 R600_HDMI_CONFIG2 : R600_HDMI_CONFIG1;
469 } else if (rdev->family >= CHIP_R600) { 470 } else if (rdev->family >= CHIP_R600 || rdev->family == CHIP_RS600 ||
471 rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
470 radeon_encoder->hdmi_offset = r600_hdmi_find_free_block(dev); 472 radeon_encoder->hdmi_offset = r600_hdmi_find_free_block(dev);
471 } 473 }
472} 474}
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index 59c1f8793e60..858a1920c0d7 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -239,12 +239,18 @@
239#define GRBM_SOFT_RESET 0x8020 239#define GRBM_SOFT_RESET 0x8020
240#define SOFT_RESET_CP (1<<0) 240#define SOFT_RESET_CP (1<<0)
241 241
242#define CG_THERMAL_STATUS 0x7F4
243#define ASIC_T(x) ((x) << 0)
244#define ASIC_T_MASK 0x1FF
245#define ASIC_T_SHIFT 0
246
242#define HDP_HOST_PATH_CNTL 0x2C00 247#define HDP_HOST_PATH_CNTL 0x2C00
243#define HDP_NONSURFACE_BASE 0x2C04 248#define HDP_NONSURFACE_BASE 0x2C04
244#define HDP_NONSURFACE_INFO 0x2C08 249#define HDP_NONSURFACE_INFO 0x2C08
245#define HDP_NONSURFACE_SIZE 0x2C0C 250#define HDP_NONSURFACE_SIZE 0x2C0C
246#define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0 251#define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0
247#define HDP_TILING_CONFIG 0x2F3C 252#define HDP_TILING_CONFIG 0x2F3C
253#define HDP_DEBUG1 0x2F34
248 254
249#define MC_VM_AGP_TOP 0x2184 255#define MC_VM_AGP_TOP 0x2184
250#define MC_VM_AGP_BOT 0x2188 256#define MC_VM_AGP_BOT 0x2188
@@ -1154,6 +1160,10 @@
1154#define S_038000_TILE_MODE(x) (((x) & 0xF) << 3) 1160#define S_038000_TILE_MODE(x) (((x) & 0xF) << 3)
1155#define G_038000_TILE_MODE(x) (((x) >> 3) & 0xF) 1161#define G_038000_TILE_MODE(x) (((x) >> 3) & 0xF)
1156#define C_038000_TILE_MODE 0xFFFFFF87 1162#define C_038000_TILE_MODE 0xFFFFFF87
1163#define V_038000_ARRAY_LINEAR_GENERAL 0x00000000
1164#define V_038000_ARRAY_LINEAR_ALIGNED 0x00000001
1165#define V_038000_ARRAY_1D_TILED_THIN1 0x00000002
1166#define V_038000_ARRAY_2D_TILED_THIN1 0x00000004
1157#define S_038000_TILE_TYPE(x) (((x) & 0x1) << 7) 1167#define S_038000_TILE_TYPE(x) (((x) & 0x1) << 7)
1158#define G_038000_TILE_TYPE(x) (((x) >> 7) & 0x1) 1168#define G_038000_TILE_TYPE(x) (((x) >> 7) & 0x1)
1159#define C_038000_TILE_TYPE 0xFFFFFF7F 1169#define C_038000_TILE_TYPE 0xFFFFFF7F
@@ -1357,6 +1367,8 @@
1357#define S_028010_ARRAY_MODE(x) (((x) & 0xF) << 15) 1367#define S_028010_ARRAY_MODE(x) (((x) & 0xF) << 15)
1358#define G_028010_ARRAY_MODE(x) (((x) >> 15) & 0xF) 1368#define G_028010_ARRAY_MODE(x) (((x) >> 15) & 0xF)
1359#define C_028010_ARRAY_MODE 0xFFF87FFF 1369#define C_028010_ARRAY_MODE 0xFFF87FFF
1370#define V_028010_ARRAY_1D_TILED_THIN1 0x00000002
1371#define V_028010_ARRAY_2D_TILED_THIN1 0x00000004
1360#define S_028010_TILE_SURFACE_ENABLE(x) (((x) & 0x1) << 25) 1372#define S_028010_TILE_SURFACE_ENABLE(x) (((x) & 0x1) << 25)
1361#define G_028010_TILE_SURFACE_ENABLE(x) (((x) >> 25) & 0x1) 1373#define G_028010_TILE_SURFACE_ENABLE(x) (((x) >> 25) & 0x1)
1362#define C_028010_TILE_SURFACE_ENABLE 0xFDFFFFFF 1374#define C_028010_TILE_SURFACE_ENABLE 0xFDFFFFFF
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index ab61aaa887bb..3cd1c470b777 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -178,6 +178,9 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev);
178void radeon_atombios_get_power_modes(struct radeon_device *rdev); 178void radeon_atombios_get_power_modes(struct radeon_device *rdev);
179void radeon_atom_set_voltage(struct radeon_device *rdev, u16 level); 179void radeon_atom_set_voltage(struct radeon_device *rdev, u16 level);
180void rs690_pm_info(struct radeon_device *rdev); 180void rs690_pm_info(struct radeon_device *rdev);
181extern u32 rv6xx_get_temp(struct radeon_device *rdev);
182extern u32 rv770_get_temp(struct radeon_device *rdev);
183extern u32 evergreen_get_temp(struct radeon_device *rdev);
181 184
182/* 185/*
183 * Fences. 186 * Fences.
@@ -232,7 +235,7 @@ struct radeon_surface_reg {
232 */ 235 */
233struct radeon_mman { 236struct radeon_mman {
234 struct ttm_bo_global_ref bo_global_ref; 237 struct ttm_bo_global_ref bo_global_ref;
235 struct ttm_global_reference mem_global_ref; 238 struct drm_global_reference mem_global_ref;
236 struct ttm_bo_device bdev; 239 struct ttm_bo_device bdev;
237 bool mem_global_referenced; 240 bool mem_global_referenced;
238 bool initialized; 241 bool initialized;
@@ -351,6 +354,7 @@ struct radeon_mc {
351 int vram_mtrr; 354 int vram_mtrr;
352 bool vram_is_ddr; 355 bool vram_is_ddr;
353 bool igp_sideport_enabled; 356 bool igp_sideport_enabled;
357 u64 gtt_base_align;
354}; 358};
355 359
356bool radeon_combios_sideport_present(struct radeon_device *rdev); 360bool radeon_combios_sideport_present(struct radeon_device *rdev);
@@ -670,6 +674,13 @@ struct radeon_pm_profile {
670 int dpms_on_cm_idx; 674 int dpms_on_cm_idx;
671}; 675};
672 676
677enum radeon_int_thermal_type {
678 THERMAL_TYPE_NONE,
679 THERMAL_TYPE_RV6XX,
680 THERMAL_TYPE_RV770,
681 THERMAL_TYPE_EVERGREEN,
682};
683
673struct radeon_voltage { 684struct radeon_voltage {
674 enum radeon_voltage_type type; 685 enum radeon_voltage_type type;
675 /* gpio voltage */ 686 /* gpio voltage */
@@ -765,6 +776,9 @@ struct radeon_pm {
765 enum radeon_pm_profile_type profile; 776 enum radeon_pm_profile_type profile;
766 int profile_index; 777 int profile_index;
767 struct radeon_pm_profile profiles[PM_PROFILE_MAX]; 778 struct radeon_pm_profile profiles[PM_PROFILE_MAX];
779 /* internal thermal controller on rv6xx+ */
780 enum radeon_int_thermal_type int_thermal_type;
781 struct device *int_hwmon_dev;
768}; 782};
769 783
770 784
@@ -901,6 +915,7 @@ struct r600_asic {
901 unsigned tiling_nbanks; 915 unsigned tiling_nbanks;
902 unsigned tiling_npipes; 916 unsigned tiling_npipes;
903 unsigned tiling_group_size; 917 unsigned tiling_group_size;
918 unsigned tile_config;
904 struct r100_gpu_lockup lockup; 919 struct r100_gpu_lockup lockup;
905}; 920};
906 921
@@ -925,6 +940,7 @@ struct rv770_asic {
925 unsigned tiling_nbanks; 940 unsigned tiling_nbanks;
926 unsigned tiling_npipes; 941 unsigned tiling_npipes;
927 unsigned tiling_group_size; 942 unsigned tiling_group_size;
943 unsigned tile_config;
928 struct r100_gpu_lockup lockup; 944 struct r100_gpu_lockup lockup;
929}; 945};
930 946
@@ -950,6 +966,7 @@ struct evergreen_asic {
950 unsigned tiling_nbanks; 966 unsigned tiling_nbanks;
951 unsigned tiling_npipes; 967 unsigned tiling_npipes;
952 unsigned tiling_group_size; 968 unsigned tiling_group_size;
969 unsigned tile_config;
953}; 970};
954 971
955union radeon_asic_config { 972union radeon_asic_config {
@@ -1032,6 +1049,9 @@ struct radeon_device {
1032 uint32_t pcie_reg_mask; 1049 uint32_t pcie_reg_mask;
1033 radeon_rreg_t pciep_rreg; 1050 radeon_rreg_t pciep_rreg;
1034 radeon_wreg_t pciep_wreg; 1051 radeon_wreg_t pciep_wreg;
1052 /* io port */
1053 void __iomem *rio_mem;
1054 resource_size_t rio_mem_size;
1035 struct radeon_clock clock; 1055 struct radeon_clock clock;
1036 struct radeon_mc mc; 1056 struct radeon_mc mc;
1037 struct radeon_gart gart; 1057 struct radeon_gart gart;
@@ -1068,6 +1088,7 @@ struct radeon_device {
1068 struct mutex vram_mutex; 1088 struct mutex vram_mutex;
1069 1089
1070 /* audio stuff */ 1090 /* audio stuff */
1091 bool audio_enabled;
1071 struct timer_list audio_timer; 1092 struct timer_list audio_timer;
1072 int audio_channels; 1093 int audio_channels;
1073 int audio_rate; 1094 int audio_rate;
@@ -1077,6 +1098,8 @@ struct radeon_device {
1077 1098
1078 bool powered_down; 1099 bool powered_down;
1079 struct notifier_block acpi_nb; 1100 struct notifier_block acpi_nb;
1101 /* only one userspace can use Hyperz features at a time */
1102 struct drm_file *hyperz_filp;
1080}; 1103};
1081 1104
1082int radeon_device_init(struct radeon_device *rdev, 1105int radeon_device_init(struct radeon_device *rdev,
@@ -1113,6 +1136,26 @@ static inline void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32
1113 } 1136 }
1114} 1137}
1115 1138
1139static inline u32 r100_io_rreg(struct radeon_device *rdev, u32 reg)
1140{
1141 if (reg < rdev->rio_mem_size)
1142 return ioread32(rdev->rio_mem + reg);
1143 else {
1144 iowrite32(reg, rdev->rio_mem + RADEON_MM_INDEX);
1145 return ioread32(rdev->rio_mem + RADEON_MM_DATA);
1146 }
1147}
1148
1149static inline void r100_io_wreg(struct radeon_device *rdev, u32 reg, u32 v)
1150{
1151 if (reg < rdev->rio_mem_size)
1152 iowrite32(v, rdev->rio_mem + reg);
1153 else {
1154 iowrite32(reg, rdev->rio_mem + RADEON_MM_INDEX);
1155 iowrite32(v, rdev->rio_mem + RADEON_MM_DATA);
1156 }
1157}
1158
1116/* 1159/*
1117 * Cast helper 1160 * Cast helper
1118 */ 1161 */
@@ -1151,6 +1194,8 @@ static inline void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32
1151 WREG32_PLL(reg, tmp_); \ 1194 WREG32_PLL(reg, tmp_); \
1152 } while (0) 1195 } while (0)
1153#define DREG32_SYS(sqf, rdev, reg) seq_printf((sqf), #reg " : 0x%08X\n", r100_mm_rreg((rdev), (reg))) 1196#define DREG32_SYS(sqf, rdev, reg) seq_printf((sqf), #reg " : 0x%08X\n", r100_mm_rreg((rdev), (reg)))
1197#define RREG32_IO(reg) r100_io_rreg(rdev, (reg))
1198#define WREG32_IO(reg, v) r100_io_wreg(rdev, (reg), (v))
1154 1199
1155/* 1200/*
1156 * Indirect registers accessor 1201 * Indirect registers accessor
@@ -1414,6 +1459,13 @@ extern void r700_cp_fini(struct radeon_device *rdev);
1414extern void evergreen_disable_interrupt_state(struct radeon_device *rdev); 1459extern void evergreen_disable_interrupt_state(struct radeon_device *rdev);
1415extern int evergreen_irq_set(struct radeon_device *rdev); 1460extern int evergreen_irq_set(struct radeon_device *rdev);
1416 1461
1462/* radeon_acpi.c */
1463#if defined(CONFIG_ACPI)
1464extern int radeon_acpi_init(struct radeon_device *rdev);
1465#else
1466static inline int radeon_acpi_init(struct radeon_device *rdev) { return 0; }
1467#endif
1468
1417/* evergreen */ 1469/* evergreen */
1418struct evergreen_mc_save { 1470struct evergreen_mc_save {
1419 u32 vga_control[6]; 1471 u32 vga_control[6];
diff --git a/drivers/gpu/drm/radeon/radeon_acpi.c b/drivers/gpu/drm/radeon/radeon_acpi.c
new file mode 100644
index 000000000000..3f6636bb2d7f
--- /dev/null
+++ b/drivers/gpu/drm/radeon/radeon_acpi.c
@@ -0,0 +1,67 @@
1#include <linux/pci.h>
2#include <linux/acpi.h>
3#include <linux/slab.h>
4#include <acpi/acpi_drivers.h>
5#include <acpi/acpi_bus.h>
6
7#include "drmP.h"
8#include "drm.h"
9#include "drm_sarea.h"
10#include "drm_crtc_helper.h"
11#include "radeon.h"
12
13#include <linux/vga_switcheroo.h>
14
15/* Call the ATIF method
16 *
17 * Note: currently we discard the output
18 */
19static int radeon_atif_call(acpi_handle handle)
20{
21 acpi_status status;
22 union acpi_object atif_arg_elements[2];
23 struct acpi_object_list atif_arg;
24 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL};
25
26 atif_arg.count = 2;
27 atif_arg.pointer = &atif_arg_elements[0];
28
29 atif_arg_elements[0].type = ACPI_TYPE_INTEGER;
30 atif_arg_elements[0].integer.value = 0;
31 atif_arg_elements[1].type = ACPI_TYPE_INTEGER;
32 atif_arg_elements[1].integer.value = 0;
33
34 status = acpi_evaluate_object(handle, "ATIF", &atif_arg, &buffer);
35
36 /* Fail only if calling the method fails and ATIF is supported */
37 if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
38 printk(KERN_DEBUG "failed to evaluate ATIF got %s\n", acpi_format_exception(status));
39 kfree(buffer.pointer);
40 return 1;
41 }
42
43 kfree(buffer.pointer);
44 return 0;
45}
46
47/* Call all ACPI methods here */
48int radeon_acpi_init(struct radeon_device *rdev)
49{
50 acpi_handle handle;
51 int ret;
52
53 /* No need to proceed if we're sure that ATIF is not supported */
54 if (!ASIC_IS_AVIVO(rdev) || !rdev->bios)
55 return 0;
56
57 /* Get the device handle */
58 handle = DEVICE_ACPI_HANDLE(&rdev->pdev->dev);
59
60 /* Call the ATIF method */
61 ret = radeon_atif_call(handle);
62 if (ret)
63 return ret;
64
65 return 0;
66}
67
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index c0bbaa64157a..a5aff755f0d2 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -113,6 +113,7 @@ void r100_wb_fini(struct radeon_device *rdev);
113int r100_wb_init(struct radeon_device *rdev); 113int r100_wb_init(struct radeon_device *rdev);
114int r100_cp_reset(struct radeon_device *rdev); 114int r100_cp_reset(struct radeon_device *rdev);
115void r100_vga_render_disable(struct radeon_device *rdev); 115void r100_vga_render_disable(struct radeon_device *rdev);
116void r100_restore_sanity(struct radeon_device *rdev);
116int r100_cs_track_check_pkt3_indx_buffer(struct radeon_cs_parser *p, 117int r100_cs_track_check_pkt3_indx_buffer(struct radeon_cs_parser *p,
117 struct radeon_cs_packet *pkt, 118 struct radeon_cs_packet *pkt,
118 struct radeon_bo *robj); 119 struct radeon_bo *robj);
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 99bd8a9c56b3..3bc2bcdf5308 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -280,6 +280,15 @@ static bool radeon_atom_apply_quirks(struct drm_device *dev,
280 } 280 }
281 } 281 }
282 282
283 /* ASUS HD 3600 board lists the DVI port as HDMI */
284 if ((dev->pdev->device == 0x9598) &&
285 (dev->pdev->subsystem_vendor == 0x1043) &&
286 (dev->pdev->subsystem_device == 0x01e4)) {
287 if (*connector_type == DRM_MODE_CONNECTOR_HDMIA) {
288 *connector_type = DRM_MODE_CONNECTOR_DVII;
289 }
290 }
291
283 /* ASUS HD 3450 board lists the DVI port as HDMI */ 292 /* ASUS HD 3450 board lists the DVI port as HDMI */
284 if ((dev->pdev->device == 0x95C5) && 293 if ((dev->pdev->device == 0x95C5) &&
285 (dev->pdev->subsystem_vendor == 0x1043) && 294 (dev->pdev->subsystem_vendor == 0x1043) &&
@@ -714,7 +723,7 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct
714 } 723 }
715 724
716 if (i == ATOM_DEVICE_CV_INDEX) { 725 if (i == ATOM_DEVICE_CV_INDEX) {
717 DRM_DEBUG("Skipping Component Video\n"); 726 DRM_DEBUG_KMS("Skipping Component Video\n");
718 continue; 727 continue;
719 } 728 }
720 729
@@ -1023,13 +1032,17 @@ bool radeon_atombios_sideport_present(struct radeon_device *rdev)
1023 u8 frev, crev; 1032 u8 frev, crev;
1024 u16 data_offset; 1033 u16 data_offset;
1025 1034
1035 /* sideport is AMD only */
1036 if (rdev->family == CHIP_RS600)
1037 return false;
1038
1026 if (atom_parse_data_header(mode_info->atom_context, index, NULL, 1039 if (atom_parse_data_header(mode_info->atom_context, index, NULL,
1027 &frev, &crev, &data_offset)) { 1040 &frev, &crev, &data_offset)) {
1028 igp_info = (union igp_info *)(mode_info->atom_context->bios + 1041 igp_info = (union igp_info *)(mode_info->atom_context->bios +
1029 data_offset); 1042 data_offset);
1030 switch (crev) { 1043 switch (crev) {
1031 case 1: 1044 case 1:
1032 if (igp_info->info.ucMemoryType & 0xf0) 1045 if (igp_info->info.ulBootUpMemoryClock)
1033 return true; 1046 return true;
1034 break; 1047 break;
1035 case 2: 1048 case 2:
@@ -1079,7 +1092,7 @@ bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
1079 (tmds_info->asMiscInfo[i]. 1092 (tmds_info->asMiscInfo[i].
1080 ucPLL_VoltageSwing & 0xf) << 16; 1093 ucPLL_VoltageSwing & 0xf) << 16;
1081 1094
1082 DRM_DEBUG("TMDS PLL From ATOMBIOS %u %x\n", 1095 DRM_DEBUG_KMS("TMDS PLL From ATOMBIOS %u %x\n",
1083 tmds->tmds_pll[i].freq, 1096 tmds->tmds_pll[i].freq,
1084 tmds->tmds_pll[i].value); 1097 tmds->tmds_pll[i].value);
1085 1098
@@ -1773,14 +1786,22 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
1773 } 1786 }
1774 1787
1775 /* add the i2c bus for thermal/fan chip */ 1788 /* add the i2c bus for thermal/fan chip */
1776 /* no support for internal controller yet */
1777 if (controller->ucType > 0) { 1789 if (controller->ucType > 0) {
1778 if ((controller->ucType == ATOM_PP_THERMALCONTROLLER_RV6xx) || 1790 if (controller->ucType == ATOM_PP_THERMALCONTROLLER_RV6xx) {
1779 (controller->ucType == ATOM_PP_THERMALCONTROLLER_RV770) || 1791 DRM_INFO("Internal thermal controller %s fan control\n",
1780 (controller->ucType == ATOM_PP_THERMALCONTROLLER_EVERGREEN)) { 1792 (controller->ucFanParameters &
1793 ATOM_PP_FANPARAMETERS_NOFAN) ? "without" : "with");
1794 rdev->pm.int_thermal_type = THERMAL_TYPE_RV6XX;
1795 } else if (controller->ucType == ATOM_PP_THERMALCONTROLLER_RV770) {
1796 DRM_INFO("Internal thermal controller %s fan control\n",
1797 (controller->ucFanParameters &
1798 ATOM_PP_FANPARAMETERS_NOFAN) ? "without" : "with");
1799 rdev->pm.int_thermal_type = THERMAL_TYPE_RV770;
1800 } else if (controller->ucType == ATOM_PP_THERMALCONTROLLER_EVERGREEN) {
1781 DRM_INFO("Internal thermal controller %s fan control\n", 1801 DRM_INFO("Internal thermal controller %s fan control\n",
1782 (controller->ucFanParameters & 1802 (controller->ucFanParameters &
1783 ATOM_PP_FANPARAMETERS_NOFAN) ? "without" : "with"); 1803 ATOM_PP_FANPARAMETERS_NOFAN) ? "without" : "with");
1804 rdev->pm.int_thermal_type = THERMAL_TYPE_EVERGREEN;
1784 } else if ((controller->ucType == 1805 } else if ((controller->ucType ==
1785 ATOM_PP_THERMALCONTROLLER_EXTERNAL_GPIO) || 1806 ATOM_PP_THERMALCONTROLLER_EXTERNAL_GPIO) ||
1786 (controller->ucType == 1807 (controller->ucType ==
@@ -2163,11 +2184,11 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
2163 if ((radeon_encoder->devices & ATOM_DEVICE_TV1_SUPPORT) && 2184 if ((radeon_encoder->devices & ATOM_DEVICE_TV1_SUPPORT) &&
2164 (radeon_connector->devices & ATOM_DEVICE_TV1_SUPPORT)) { 2185 (radeon_connector->devices & ATOM_DEVICE_TV1_SUPPORT)) {
2165 if (connected) { 2186 if (connected) {
2166 DRM_DEBUG("TV1 connected\n"); 2187 DRM_DEBUG_KMS("TV1 connected\n");
2167 bios_3_scratch |= ATOM_S3_TV1_ACTIVE; 2188 bios_3_scratch |= ATOM_S3_TV1_ACTIVE;
2168 bios_6_scratch |= ATOM_S6_ACC_REQ_TV1; 2189 bios_6_scratch |= ATOM_S6_ACC_REQ_TV1;
2169 } else { 2190 } else {
2170 DRM_DEBUG("TV1 disconnected\n"); 2191 DRM_DEBUG_KMS("TV1 disconnected\n");
2171 bios_0_scratch &= ~ATOM_S0_TV1_MASK; 2192 bios_0_scratch &= ~ATOM_S0_TV1_MASK;
2172 bios_3_scratch &= ~ATOM_S3_TV1_ACTIVE; 2193 bios_3_scratch &= ~ATOM_S3_TV1_ACTIVE;
2173 bios_6_scratch &= ~ATOM_S6_ACC_REQ_TV1; 2194 bios_6_scratch &= ~ATOM_S6_ACC_REQ_TV1;
@@ -2176,11 +2197,11 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
2176 if ((radeon_encoder->devices & ATOM_DEVICE_CV_SUPPORT) && 2197 if ((radeon_encoder->devices & ATOM_DEVICE_CV_SUPPORT) &&
2177 (radeon_connector->devices & ATOM_DEVICE_CV_SUPPORT)) { 2198 (radeon_connector->devices & ATOM_DEVICE_CV_SUPPORT)) {
2178 if (connected) { 2199 if (connected) {
2179 DRM_DEBUG("CV connected\n"); 2200 DRM_DEBUG_KMS("CV connected\n");
2180 bios_3_scratch |= ATOM_S3_CV_ACTIVE; 2201 bios_3_scratch |= ATOM_S3_CV_ACTIVE;
2181 bios_6_scratch |= ATOM_S6_ACC_REQ_CV; 2202 bios_6_scratch |= ATOM_S6_ACC_REQ_CV;
2182 } else { 2203 } else {
2183 DRM_DEBUG("CV disconnected\n"); 2204 DRM_DEBUG_KMS("CV disconnected\n");
2184 bios_0_scratch &= ~ATOM_S0_CV_MASK; 2205 bios_0_scratch &= ~ATOM_S0_CV_MASK;
2185 bios_3_scratch &= ~ATOM_S3_CV_ACTIVE; 2206 bios_3_scratch &= ~ATOM_S3_CV_ACTIVE;
2186 bios_6_scratch &= ~ATOM_S6_ACC_REQ_CV; 2207 bios_6_scratch &= ~ATOM_S6_ACC_REQ_CV;
@@ -2189,12 +2210,12 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
2189 if ((radeon_encoder->devices & ATOM_DEVICE_LCD1_SUPPORT) && 2210 if ((radeon_encoder->devices & ATOM_DEVICE_LCD1_SUPPORT) &&
2190 (radeon_connector->devices & ATOM_DEVICE_LCD1_SUPPORT)) { 2211 (radeon_connector->devices & ATOM_DEVICE_LCD1_SUPPORT)) {
2191 if (connected) { 2212 if (connected) {
2192 DRM_DEBUG("LCD1 connected\n"); 2213 DRM_DEBUG_KMS("LCD1 connected\n");
2193 bios_0_scratch |= ATOM_S0_LCD1; 2214 bios_0_scratch |= ATOM_S0_LCD1;
2194 bios_3_scratch |= ATOM_S3_LCD1_ACTIVE; 2215 bios_3_scratch |= ATOM_S3_LCD1_ACTIVE;
2195 bios_6_scratch |= ATOM_S6_ACC_REQ_LCD1; 2216 bios_6_scratch |= ATOM_S6_ACC_REQ_LCD1;
2196 } else { 2217 } else {
2197 DRM_DEBUG("LCD1 disconnected\n"); 2218 DRM_DEBUG_KMS("LCD1 disconnected\n");
2198 bios_0_scratch &= ~ATOM_S0_LCD1; 2219 bios_0_scratch &= ~ATOM_S0_LCD1;
2199 bios_3_scratch &= ~ATOM_S3_LCD1_ACTIVE; 2220 bios_3_scratch &= ~ATOM_S3_LCD1_ACTIVE;
2200 bios_6_scratch &= ~ATOM_S6_ACC_REQ_LCD1; 2221 bios_6_scratch &= ~ATOM_S6_ACC_REQ_LCD1;
@@ -2203,12 +2224,12 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
2203 if ((radeon_encoder->devices & ATOM_DEVICE_CRT1_SUPPORT) && 2224 if ((radeon_encoder->devices & ATOM_DEVICE_CRT1_SUPPORT) &&
2204 (radeon_connector->devices & ATOM_DEVICE_CRT1_SUPPORT)) { 2225 (radeon_connector->devices & ATOM_DEVICE_CRT1_SUPPORT)) {
2205 if (connected) { 2226 if (connected) {
2206 DRM_DEBUG("CRT1 connected\n"); 2227 DRM_DEBUG_KMS("CRT1 connected\n");
2207 bios_0_scratch |= ATOM_S0_CRT1_COLOR; 2228 bios_0_scratch |= ATOM_S0_CRT1_COLOR;
2208 bios_3_scratch |= ATOM_S3_CRT1_ACTIVE; 2229 bios_3_scratch |= ATOM_S3_CRT1_ACTIVE;
2209 bios_6_scratch |= ATOM_S6_ACC_REQ_CRT1; 2230 bios_6_scratch |= ATOM_S6_ACC_REQ_CRT1;
2210 } else { 2231 } else {
2211 DRM_DEBUG("CRT1 disconnected\n"); 2232 DRM_DEBUG_KMS("CRT1 disconnected\n");
2212 bios_0_scratch &= ~ATOM_S0_CRT1_MASK; 2233 bios_0_scratch &= ~ATOM_S0_CRT1_MASK;
2213 bios_3_scratch &= ~ATOM_S3_CRT1_ACTIVE; 2234 bios_3_scratch &= ~ATOM_S3_CRT1_ACTIVE;
2214 bios_6_scratch &= ~ATOM_S6_ACC_REQ_CRT1; 2235 bios_6_scratch &= ~ATOM_S6_ACC_REQ_CRT1;
@@ -2217,12 +2238,12 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
2217 if ((radeon_encoder->devices & ATOM_DEVICE_CRT2_SUPPORT) && 2238 if ((radeon_encoder->devices & ATOM_DEVICE_CRT2_SUPPORT) &&
2218 (radeon_connector->devices & ATOM_DEVICE_CRT2_SUPPORT)) { 2239 (radeon_connector->devices & ATOM_DEVICE_CRT2_SUPPORT)) {
2219 if (connected) { 2240 if (connected) {
2220 DRM_DEBUG("CRT2 connected\n"); 2241 DRM_DEBUG_KMS("CRT2 connected\n");
2221 bios_0_scratch |= ATOM_S0_CRT2_COLOR; 2242 bios_0_scratch |= ATOM_S0_CRT2_COLOR;
2222 bios_3_scratch |= ATOM_S3_CRT2_ACTIVE; 2243 bios_3_scratch |= ATOM_S3_CRT2_ACTIVE;
2223 bios_6_scratch |= ATOM_S6_ACC_REQ_CRT2; 2244 bios_6_scratch |= ATOM_S6_ACC_REQ_CRT2;
2224 } else { 2245 } else {
2225 DRM_DEBUG("CRT2 disconnected\n"); 2246 DRM_DEBUG_KMS("CRT2 disconnected\n");
2226 bios_0_scratch &= ~ATOM_S0_CRT2_MASK; 2247 bios_0_scratch &= ~ATOM_S0_CRT2_MASK;
2227 bios_3_scratch &= ~ATOM_S3_CRT2_ACTIVE; 2248 bios_3_scratch &= ~ATOM_S3_CRT2_ACTIVE;
2228 bios_6_scratch &= ~ATOM_S6_ACC_REQ_CRT2; 2249 bios_6_scratch &= ~ATOM_S6_ACC_REQ_CRT2;
@@ -2231,12 +2252,12 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
2231 if ((radeon_encoder->devices & ATOM_DEVICE_DFP1_SUPPORT) && 2252 if ((radeon_encoder->devices & ATOM_DEVICE_DFP1_SUPPORT) &&
2232 (radeon_connector->devices & ATOM_DEVICE_DFP1_SUPPORT)) { 2253 (radeon_connector->devices & ATOM_DEVICE_DFP1_SUPPORT)) {
2233 if (connected) { 2254 if (connected) {
2234 DRM_DEBUG("DFP1 connected\n"); 2255 DRM_DEBUG_KMS("DFP1 connected\n");
2235 bios_0_scratch |= ATOM_S0_DFP1; 2256 bios_0_scratch |= ATOM_S0_DFP1;
2236 bios_3_scratch |= ATOM_S3_DFP1_ACTIVE; 2257 bios_3_scratch |= ATOM_S3_DFP1_ACTIVE;
2237 bios_6_scratch |= ATOM_S6_ACC_REQ_DFP1; 2258 bios_6_scratch |= ATOM_S6_ACC_REQ_DFP1;
2238 } else { 2259 } else {
2239 DRM_DEBUG("DFP1 disconnected\n"); 2260 DRM_DEBUG_KMS("DFP1 disconnected\n");
2240 bios_0_scratch &= ~ATOM_S0_DFP1; 2261 bios_0_scratch &= ~ATOM_S0_DFP1;
2241 bios_3_scratch &= ~ATOM_S3_DFP1_ACTIVE; 2262 bios_3_scratch &= ~ATOM_S3_DFP1_ACTIVE;
2242 bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP1; 2263 bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP1;
@@ -2245,12 +2266,12 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
2245 if ((radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT) && 2266 if ((radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT) &&
2246 (radeon_connector->devices & ATOM_DEVICE_DFP2_SUPPORT)) { 2267 (radeon_connector->devices & ATOM_DEVICE_DFP2_SUPPORT)) {
2247 if (connected) { 2268 if (connected) {
2248 DRM_DEBUG("DFP2 connected\n"); 2269 DRM_DEBUG_KMS("DFP2 connected\n");
2249 bios_0_scratch |= ATOM_S0_DFP2; 2270 bios_0_scratch |= ATOM_S0_DFP2;
2250 bios_3_scratch |= ATOM_S3_DFP2_ACTIVE; 2271 bios_3_scratch |= ATOM_S3_DFP2_ACTIVE;
2251 bios_6_scratch |= ATOM_S6_ACC_REQ_DFP2; 2272 bios_6_scratch |= ATOM_S6_ACC_REQ_DFP2;
2252 } else { 2273 } else {
2253 DRM_DEBUG("DFP2 disconnected\n"); 2274 DRM_DEBUG_KMS("DFP2 disconnected\n");
2254 bios_0_scratch &= ~ATOM_S0_DFP2; 2275 bios_0_scratch &= ~ATOM_S0_DFP2;
2255 bios_3_scratch &= ~ATOM_S3_DFP2_ACTIVE; 2276 bios_3_scratch &= ~ATOM_S3_DFP2_ACTIVE;
2256 bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP2; 2277 bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP2;
@@ -2259,12 +2280,12 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
2259 if ((radeon_encoder->devices & ATOM_DEVICE_DFP3_SUPPORT) && 2280 if ((radeon_encoder->devices & ATOM_DEVICE_DFP3_SUPPORT) &&
2260 (radeon_connector->devices & ATOM_DEVICE_DFP3_SUPPORT)) { 2281 (radeon_connector->devices & ATOM_DEVICE_DFP3_SUPPORT)) {
2261 if (connected) { 2282 if (connected) {
2262 DRM_DEBUG("DFP3 connected\n"); 2283 DRM_DEBUG_KMS("DFP3 connected\n");
2263 bios_0_scratch |= ATOM_S0_DFP3; 2284 bios_0_scratch |= ATOM_S0_DFP3;
2264 bios_3_scratch |= ATOM_S3_DFP3_ACTIVE; 2285 bios_3_scratch |= ATOM_S3_DFP3_ACTIVE;
2265 bios_6_scratch |= ATOM_S6_ACC_REQ_DFP3; 2286 bios_6_scratch |= ATOM_S6_ACC_REQ_DFP3;
2266 } else { 2287 } else {
2267 DRM_DEBUG("DFP3 disconnected\n"); 2288 DRM_DEBUG_KMS("DFP3 disconnected\n");
2268 bios_0_scratch &= ~ATOM_S0_DFP3; 2289 bios_0_scratch &= ~ATOM_S0_DFP3;
2269 bios_3_scratch &= ~ATOM_S3_DFP3_ACTIVE; 2290 bios_3_scratch &= ~ATOM_S3_DFP3_ACTIVE;
2270 bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP3; 2291 bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP3;
@@ -2273,12 +2294,12 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
2273 if ((radeon_encoder->devices & ATOM_DEVICE_DFP4_SUPPORT) && 2294 if ((radeon_encoder->devices & ATOM_DEVICE_DFP4_SUPPORT) &&
2274 (radeon_connector->devices & ATOM_DEVICE_DFP4_SUPPORT)) { 2295 (radeon_connector->devices & ATOM_DEVICE_DFP4_SUPPORT)) {
2275 if (connected) { 2296 if (connected) {
2276 DRM_DEBUG("DFP4 connected\n"); 2297 DRM_DEBUG_KMS("DFP4 connected\n");
2277 bios_0_scratch |= ATOM_S0_DFP4; 2298 bios_0_scratch |= ATOM_S0_DFP4;
2278 bios_3_scratch |= ATOM_S3_DFP4_ACTIVE; 2299 bios_3_scratch |= ATOM_S3_DFP4_ACTIVE;
2279 bios_6_scratch |= ATOM_S6_ACC_REQ_DFP4; 2300 bios_6_scratch |= ATOM_S6_ACC_REQ_DFP4;
2280 } else { 2301 } else {
2281 DRM_DEBUG("DFP4 disconnected\n"); 2302 DRM_DEBUG_KMS("DFP4 disconnected\n");
2282 bios_0_scratch &= ~ATOM_S0_DFP4; 2303 bios_0_scratch &= ~ATOM_S0_DFP4;
2283 bios_3_scratch &= ~ATOM_S3_DFP4_ACTIVE; 2304 bios_3_scratch &= ~ATOM_S3_DFP4_ACTIVE;
2284 bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP4; 2305 bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP4;
@@ -2287,12 +2308,12 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
2287 if ((radeon_encoder->devices & ATOM_DEVICE_DFP5_SUPPORT) && 2308 if ((radeon_encoder->devices & ATOM_DEVICE_DFP5_SUPPORT) &&
2288 (radeon_connector->devices & ATOM_DEVICE_DFP5_SUPPORT)) { 2309 (radeon_connector->devices & ATOM_DEVICE_DFP5_SUPPORT)) {
2289 if (connected) { 2310 if (connected) {
2290 DRM_DEBUG("DFP5 connected\n"); 2311 DRM_DEBUG_KMS("DFP5 connected\n");
2291 bios_0_scratch |= ATOM_S0_DFP5; 2312 bios_0_scratch |= ATOM_S0_DFP5;
2292 bios_3_scratch |= ATOM_S3_DFP5_ACTIVE; 2313 bios_3_scratch |= ATOM_S3_DFP5_ACTIVE;
2293 bios_6_scratch |= ATOM_S6_ACC_REQ_DFP5; 2314 bios_6_scratch |= ATOM_S6_ACC_REQ_DFP5;
2294 } else { 2315 } else {
2295 DRM_DEBUG("DFP5 disconnected\n"); 2316 DRM_DEBUG_KMS("DFP5 disconnected\n");
2296 bios_0_scratch &= ~ATOM_S0_DFP5; 2317 bios_0_scratch &= ~ATOM_S0_DFP5;
2297 bios_3_scratch &= ~ATOM_S3_DFP5_ACTIVE; 2318 bios_3_scratch &= ~ATOM_S3_DFP5_ACTIVE;
2298 bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP5; 2319 bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP5;
diff --git a/drivers/gpu/drm/radeon/radeon_bios.c b/drivers/gpu/drm/radeon/radeon_bios.c
index 2c9213739999..654787ec43f4 100644
--- a/drivers/gpu/drm/radeon/radeon_bios.c
+++ b/drivers/gpu/drm/radeon/radeon_bios.c
@@ -53,7 +53,7 @@ static bool igp_read_bios_from_vram(struct radeon_device *rdev)
53 return false; 53 return false;
54 54
55 rdev->bios = NULL; 55 rdev->bios = NULL;
56 vram_base = drm_get_resource_start(rdev->ddev, 0); 56 vram_base = pci_resource_start(rdev->pdev, 0);
57 bios = ioremap(vram_base, size); 57 bios = ioremap(vram_base, size);
58 if (!bios) { 58 if (!bios) {
59 return false; 59 return false;
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index d1c1d8dd93ce..5e1474cde4b4 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -693,6 +693,10 @@ bool radeon_combios_sideport_present(struct radeon_device *rdev)
693 struct drm_device *dev = rdev->ddev; 693 struct drm_device *dev = rdev->ddev;
694 u16 igp_info; 694 u16 igp_info;
695 695
696 /* sideport is AMD only */
697 if (rdev->family == CHIP_RS400)
698 return false;
699
696 igp_info = combios_get_table_offset(dev, COMBIOS_INTEGRATED_SYSTEM_INFO_TABLE); 700 igp_info = combios_get_table_offset(dev, COMBIOS_INTEGRATED_SYSTEM_INFO_TABLE);
697 701
698 if (igp_info) { 702 if (igp_info) {
@@ -1205,7 +1209,7 @@ bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
1205 RBIOS32(tmds_info + i * 10 + 0x08); 1209 RBIOS32(tmds_info + i * 10 + 0x08);
1206 tmds->tmds_pll[i].freq = 1210 tmds->tmds_pll[i].freq =
1207 RBIOS16(tmds_info + i * 10 + 0x10); 1211 RBIOS16(tmds_info + i * 10 + 0x10);
1208 DRM_DEBUG("TMDS PLL From COMBIOS %u %x\n", 1212 DRM_DEBUG_KMS("TMDS PLL From COMBIOS %u %x\n",
1209 tmds->tmds_pll[i].freq, 1213 tmds->tmds_pll[i].freq,
1210 tmds->tmds_pll[i].value); 1214 tmds->tmds_pll[i].value);
1211 } 1215 }
@@ -1223,7 +1227,7 @@ bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
1223 stride += 10; 1227 stride += 10;
1224 else 1228 else
1225 stride += 6; 1229 stride += 6;
1226 DRM_DEBUG("TMDS PLL From COMBIOS %u %x\n", 1230 DRM_DEBUG_KMS("TMDS PLL From COMBIOS %u %x\n",
1227 tmds->tmds_pll[i].freq, 1231 tmds->tmds_pll[i].freq,
1228 tmds->tmds_pll[i].value); 1232 tmds->tmds_pll[i].value);
1229 } 1233 }
@@ -2208,7 +2212,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2208 uint16_t tmds_info = 2212 uint16_t tmds_info =
2209 combios_get_table_offset(dev, COMBIOS_DFP_INFO_TABLE); 2213 combios_get_table_offset(dev, COMBIOS_DFP_INFO_TABLE);
2210 if (tmds_info) { 2214 if (tmds_info) {
2211 DRM_DEBUG("Found DFP table, assuming DVI connector\n"); 2215 DRM_DEBUG_KMS("Found DFP table, assuming DVI connector\n");
2212 2216
2213 radeon_add_legacy_encoder(dev, 2217 radeon_add_legacy_encoder(dev,
2214 radeon_get_encoder_id(dev, 2218 radeon_get_encoder_id(dev,
@@ -2234,7 +2238,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2234 } else { 2238 } else {
2235 uint16_t crt_info = 2239 uint16_t crt_info =
2236 combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE); 2240 combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE);
2237 DRM_DEBUG("Found CRT table, assuming VGA connector\n"); 2241 DRM_DEBUG_KMS("Found CRT table, assuming VGA connector\n");
2238 if (crt_info) { 2242 if (crt_info) {
2239 radeon_add_legacy_encoder(dev, 2243 radeon_add_legacy_encoder(dev,
2240 radeon_get_encoder_id(dev, 2244 radeon_get_encoder_id(dev,
@@ -2251,7 +2255,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2251 CONNECTOR_OBJECT_ID_VGA, 2255 CONNECTOR_OBJECT_ID_VGA,
2252 &hpd); 2256 &hpd);
2253 } else { 2257 } else {
2254 DRM_DEBUG("No connector info found\n"); 2258 DRM_DEBUG_KMS("No connector info found\n");
2255 return false; 2259 return false;
2256 } 2260 }
2257 } 2261 }
@@ -2340,7 +2344,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2340 ddc_i2c.valid = false; 2344 ddc_i2c.valid = false;
2341 break; 2345 break;
2342 } 2346 }
2343 DRM_DEBUG("LCD DDC Info Table found!\n"); 2347 DRM_DEBUG_KMS("LCD DDC Info Table found!\n");
2344 } else 2348 } else
2345 ddc_i2c.valid = false; 2349 ddc_i2c.valid = false;
2346 2350
@@ -2941,9 +2945,8 @@ static void combios_write_ram_size(struct drm_device *dev)
2941 if (rev < 3) { 2945 if (rev < 3) {
2942 mem_cntl = RBIOS32(offset + 1); 2946 mem_cntl = RBIOS32(offset + 1);
2943 mem_size = RBIOS16(offset + 5); 2947 mem_size = RBIOS16(offset + 5);
2944 if (((rdev->flags & RADEON_FAMILY_MASK) < CHIP_R200) && 2948 if ((rdev->family < CHIP_R200) &&
2945 ((dev->pdev->device != 0x515e) 2949 !ASIC_IS_RN50(rdev))
2946 && (dev->pdev->device != 0x5969)))
2947 WREG32(RADEON_MEM_CNTL, mem_cntl); 2950 WREG32(RADEON_MEM_CNTL, mem_cntl);
2948 } 2951 }
2949 } 2952 }
@@ -2954,10 +2957,8 @@ static void combios_write_ram_size(struct drm_device *dev)
2954 if (offset) { 2957 if (offset) {
2955 rev = RBIOS8(offset - 1); 2958 rev = RBIOS8(offset - 1);
2956 if (rev < 1) { 2959 if (rev < 1) {
2957 if (((rdev->flags & RADEON_FAMILY_MASK) < 2960 if ((rdev->family < CHIP_R200)
2958 CHIP_R200) 2961 && !ASIC_IS_RN50(rdev)) {
2959 && ((dev->pdev->device != 0x515e)
2960 && (dev->pdev->device != 0x5969))) {
2961 int ram = 0; 2962 int ram = 0;
2962 int mem_addr_mapping = 0; 2963 int mem_addr_mapping = 0;
2963 2964
@@ -3050,6 +3051,14 @@ void radeon_combios_asic_init(struct drm_device *dev)
3050 rdev->pdev->subsystem_device == 0x308b) 3051 rdev->pdev->subsystem_device == 0x308b)
3051 return; 3052 return;
3052 3053
3054 /* quirk for rs4xx HP dv5000 laptop to make it resume
3055 * - it hangs on resume inside the dynclk 1 table.
3056 */
3057 if (rdev->family == CHIP_RS480 &&
3058 rdev->pdev->subsystem_vendor == 0x103c &&
3059 rdev->pdev->subsystem_device == 0x30a4)
3060 return;
3061
3053 /* DYN CLK 1 */ 3062 /* DYN CLK 1 */
3054 table = combios_get_table_offset(dev, COMBIOS_DYN_CLK_1_TABLE); 3063 table = combios_get_table_offset(dev, COMBIOS_DYN_CLK_1_TABLE);
3055 if (table) 3064 if (table)
@@ -3113,14 +3122,14 @@ radeon_combios_connected_scratch_regs(struct drm_connector *connector,
3113 if ((radeon_encoder->devices & ATOM_DEVICE_TV1_SUPPORT) && 3122 if ((radeon_encoder->devices & ATOM_DEVICE_TV1_SUPPORT) &&
3114 (radeon_connector->devices & ATOM_DEVICE_TV1_SUPPORT)) { 3123 (radeon_connector->devices & ATOM_DEVICE_TV1_SUPPORT)) {
3115 if (connected) { 3124 if (connected) {
3116 DRM_DEBUG("TV1 connected\n"); 3125 DRM_DEBUG_KMS("TV1 connected\n");
3117 /* fix me */ 3126 /* fix me */
3118 bios_4_scratch |= RADEON_TV1_ATTACHED_SVIDEO; 3127 bios_4_scratch |= RADEON_TV1_ATTACHED_SVIDEO;
3119 /*save->bios_4_scratch |= RADEON_TV1_ATTACHED_COMP; */ 3128 /*save->bios_4_scratch |= RADEON_TV1_ATTACHED_COMP; */
3120 bios_5_scratch |= RADEON_TV1_ON; 3129 bios_5_scratch |= RADEON_TV1_ON;
3121 bios_5_scratch |= RADEON_ACC_REQ_TV1; 3130 bios_5_scratch |= RADEON_ACC_REQ_TV1;
3122 } else { 3131 } else {
3123 DRM_DEBUG("TV1 disconnected\n"); 3132 DRM_DEBUG_KMS("TV1 disconnected\n");
3124 bios_4_scratch &= ~RADEON_TV1_ATTACHED_MASK; 3133 bios_4_scratch &= ~RADEON_TV1_ATTACHED_MASK;
3125 bios_5_scratch &= ~RADEON_TV1_ON; 3134 bios_5_scratch &= ~RADEON_TV1_ON;
3126 bios_5_scratch &= ~RADEON_ACC_REQ_TV1; 3135 bios_5_scratch &= ~RADEON_ACC_REQ_TV1;
@@ -3129,12 +3138,12 @@ radeon_combios_connected_scratch_regs(struct drm_connector *connector,
3129 if ((radeon_encoder->devices & ATOM_DEVICE_LCD1_SUPPORT) && 3138 if ((radeon_encoder->devices & ATOM_DEVICE_LCD1_SUPPORT) &&
3130 (radeon_connector->devices & ATOM_DEVICE_LCD1_SUPPORT)) { 3139 (radeon_connector->devices & ATOM_DEVICE_LCD1_SUPPORT)) {
3131 if (connected) { 3140 if (connected) {
3132 DRM_DEBUG("LCD1 connected\n"); 3141 DRM_DEBUG_KMS("LCD1 connected\n");
3133 bios_4_scratch |= RADEON_LCD1_ATTACHED; 3142 bios_4_scratch |= RADEON_LCD1_ATTACHED;
3134 bios_5_scratch |= RADEON_LCD1_ON; 3143 bios_5_scratch |= RADEON_LCD1_ON;
3135 bios_5_scratch |= RADEON_ACC_REQ_LCD1; 3144 bios_5_scratch |= RADEON_ACC_REQ_LCD1;
3136 } else { 3145 } else {
3137 DRM_DEBUG("LCD1 disconnected\n"); 3146 DRM_DEBUG_KMS("LCD1 disconnected\n");
3138 bios_4_scratch &= ~RADEON_LCD1_ATTACHED; 3147 bios_4_scratch &= ~RADEON_LCD1_ATTACHED;
3139 bios_5_scratch &= ~RADEON_LCD1_ON; 3148 bios_5_scratch &= ~RADEON_LCD1_ON;
3140 bios_5_scratch &= ~RADEON_ACC_REQ_LCD1; 3149 bios_5_scratch &= ~RADEON_ACC_REQ_LCD1;
@@ -3143,12 +3152,12 @@ radeon_combios_connected_scratch_regs(struct drm_connector *connector,
3143 if ((radeon_encoder->devices & ATOM_DEVICE_CRT1_SUPPORT) && 3152 if ((radeon_encoder->devices & ATOM_DEVICE_CRT1_SUPPORT) &&
3144 (radeon_connector->devices & ATOM_DEVICE_CRT1_SUPPORT)) { 3153 (radeon_connector->devices & ATOM_DEVICE_CRT1_SUPPORT)) {
3145 if (connected) { 3154 if (connected) {
3146 DRM_DEBUG("CRT1 connected\n"); 3155 DRM_DEBUG_KMS("CRT1 connected\n");
3147 bios_4_scratch |= RADEON_CRT1_ATTACHED_COLOR; 3156 bios_4_scratch |= RADEON_CRT1_ATTACHED_COLOR;
3148 bios_5_scratch |= RADEON_CRT1_ON; 3157 bios_5_scratch |= RADEON_CRT1_ON;
3149 bios_5_scratch |= RADEON_ACC_REQ_CRT1; 3158 bios_5_scratch |= RADEON_ACC_REQ_CRT1;
3150 } else { 3159 } else {
3151 DRM_DEBUG("CRT1 disconnected\n"); 3160 DRM_DEBUG_KMS("CRT1 disconnected\n");
3152 bios_4_scratch &= ~RADEON_CRT1_ATTACHED_MASK; 3161 bios_4_scratch &= ~RADEON_CRT1_ATTACHED_MASK;
3153 bios_5_scratch &= ~RADEON_CRT1_ON; 3162 bios_5_scratch &= ~RADEON_CRT1_ON;
3154 bios_5_scratch &= ~RADEON_ACC_REQ_CRT1; 3163 bios_5_scratch &= ~RADEON_ACC_REQ_CRT1;
@@ -3157,12 +3166,12 @@ radeon_combios_connected_scratch_regs(struct drm_connector *connector,
3157 if ((radeon_encoder->devices & ATOM_DEVICE_CRT2_SUPPORT) && 3166 if ((radeon_encoder->devices & ATOM_DEVICE_CRT2_SUPPORT) &&
3158 (radeon_connector->devices & ATOM_DEVICE_CRT2_SUPPORT)) { 3167 (radeon_connector->devices & ATOM_DEVICE_CRT2_SUPPORT)) {
3159 if (connected) { 3168 if (connected) {
3160 DRM_DEBUG("CRT2 connected\n"); 3169 DRM_DEBUG_KMS("CRT2 connected\n");
3161 bios_4_scratch |= RADEON_CRT2_ATTACHED_COLOR; 3170 bios_4_scratch |= RADEON_CRT2_ATTACHED_COLOR;
3162 bios_5_scratch |= RADEON_CRT2_ON; 3171 bios_5_scratch |= RADEON_CRT2_ON;
3163 bios_5_scratch |= RADEON_ACC_REQ_CRT2; 3172 bios_5_scratch |= RADEON_ACC_REQ_CRT2;
3164 } else { 3173 } else {
3165 DRM_DEBUG("CRT2 disconnected\n"); 3174 DRM_DEBUG_KMS("CRT2 disconnected\n");
3166 bios_4_scratch &= ~RADEON_CRT2_ATTACHED_MASK; 3175 bios_4_scratch &= ~RADEON_CRT2_ATTACHED_MASK;
3167 bios_5_scratch &= ~RADEON_CRT2_ON; 3176 bios_5_scratch &= ~RADEON_CRT2_ON;
3168 bios_5_scratch &= ~RADEON_ACC_REQ_CRT2; 3177 bios_5_scratch &= ~RADEON_ACC_REQ_CRT2;
@@ -3171,12 +3180,12 @@ radeon_combios_connected_scratch_regs(struct drm_connector *connector,
3171 if ((radeon_encoder->devices & ATOM_DEVICE_DFP1_SUPPORT) && 3180 if ((radeon_encoder->devices & ATOM_DEVICE_DFP1_SUPPORT) &&
3172 (radeon_connector->devices & ATOM_DEVICE_DFP1_SUPPORT)) { 3181 (radeon_connector->devices & ATOM_DEVICE_DFP1_SUPPORT)) {
3173 if (connected) { 3182 if (connected) {
3174 DRM_DEBUG("DFP1 connected\n"); 3183 DRM_DEBUG_KMS("DFP1 connected\n");
3175 bios_4_scratch |= RADEON_DFP1_ATTACHED; 3184 bios_4_scratch |= RADEON_DFP1_ATTACHED;
3176 bios_5_scratch |= RADEON_DFP1_ON; 3185 bios_5_scratch |= RADEON_DFP1_ON;
3177 bios_5_scratch |= RADEON_ACC_REQ_DFP1; 3186 bios_5_scratch |= RADEON_ACC_REQ_DFP1;
3178 } else { 3187 } else {
3179 DRM_DEBUG("DFP1 disconnected\n"); 3188 DRM_DEBUG_KMS("DFP1 disconnected\n");
3180 bios_4_scratch &= ~RADEON_DFP1_ATTACHED; 3189 bios_4_scratch &= ~RADEON_DFP1_ATTACHED;
3181 bios_5_scratch &= ~RADEON_DFP1_ON; 3190 bios_5_scratch &= ~RADEON_DFP1_ON;
3182 bios_5_scratch &= ~RADEON_ACC_REQ_DFP1; 3191 bios_5_scratch &= ~RADEON_ACC_REQ_DFP1;
@@ -3185,12 +3194,12 @@ radeon_combios_connected_scratch_regs(struct drm_connector *connector,
3185 if ((radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT) && 3194 if ((radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT) &&
3186 (radeon_connector->devices & ATOM_DEVICE_DFP2_SUPPORT)) { 3195 (radeon_connector->devices & ATOM_DEVICE_DFP2_SUPPORT)) {
3187 if (connected) { 3196 if (connected) {
3188 DRM_DEBUG("DFP2 connected\n"); 3197 DRM_DEBUG_KMS("DFP2 connected\n");
3189 bios_4_scratch |= RADEON_DFP2_ATTACHED; 3198 bios_4_scratch |= RADEON_DFP2_ATTACHED;
3190 bios_5_scratch |= RADEON_DFP2_ON; 3199 bios_5_scratch |= RADEON_DFP2_ON;
3191 bios_5_scratch |= RADEON_ACC_REQ_DFP2; 3200 bios_5_scratch |= RADEON_ACC_REQ_DFP2;
3192 } else { 3201 } else {
3193 DRM_DEBUG("DFP2 disconnected\n"); 3202 DRM_DEBUG_KMS("DFP2 disconnected\n");
3194 bios_4_scratch &= ~RADEON_DFP2_ATTACHED; 3203 bios_4_scratch &= ~RADEON_DFP2_ATTACHED;
3195 bios_5_scratch &= ~RADEON_DFP2_ON; 3204 bios_5_scratch &= ~RADEON_DFP2_ON;
3196 bios_5_scratch &= ~RADEON_ACC_REQ_DFP2; 3205 bios_5_scratch &= ~RADEON_ACC_REQ_DFP2;
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index 0c7ccc6961a3..2395c8600cf4 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -214,7 +214,7 @@ static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encode
214 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; 214 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
215 drm_mode_set_name(mode); 215 drm_mode_set_name(mode);
216 216
217 DRM_DEBUG("Adding native panel mode %s\n", mode->name); 217 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
218 } else if (native_mode->hdisplay != 0 && 218 } else if (native_mode->hdisplay != 0 &&
219 native_mode->vdisplay != 0) { 219 native_mode->vdisplay != 0) {
220 /* mac laptops without an edid */ 220 /* mac laptops without an edid */
@@ -226,7 +226,7 @@ static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encode
226 */ 226 */
227 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); 227 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
228 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; 228 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
229 DRM_DEBUG("Adding cvt approximation of native panel mode %s\n", mode->name); 229 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
230 } 230 }
231 return mode; 231 return mode;
232} 232}
@@ -312,6 +312,20 @@ int radeon_connector_set_property(struct drm_connector *connector, struct drm_pr
312 } 312 }
313 } 313 }
314 314
315 if (property == rdev->mode_info.underscan_property) {
316 /* need to find digital encoder on connector */
317 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
318 if (!encoder)
319 return 0;
320
321 radeon_encoder = to_radeon_encoder(encoder);
322
323 if (radeon_encoder->underscan_type != val) {
324 radeon_encoder->underscan_type = val;
325 radeon_property_change_mode(&radeon_encoder->base);
326 }
327 }
328
315 if (property == rdev->mode_info.tv_std_property) { 329 if (property == rdev->mode_info.tv_std_property) {
316 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC); 330 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
317 if (!encoder) { 331 if (!encoder) {
@@ -522,7 +536,7 @@ static int radeon_lvds_set_property(struct drm_connector *connector,
522 struct radeon_encoder *radeon_encoder; 536 struct radeon_encoder *radeon_encoder;
523 enum radeon_rmx_type rmx_type; 537 enum radeon_rmx_type rmx_type;
524 538
525 DRM_DEBUG("\n"); 539 DRM_DEBUG_KMS("\n");
526 if (property != dev->mode_config.scaling_mode_property) 540 if (property != dev->mode_config.scaling_mode_property)
527 return 0; 541 return 0;
528 542
@@ -771,30 +785,27 @@ static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connect
771 } else 785 } else
772 ret = connector_status_connected; 786 ret = connector_status_connected;
773 787
774 /* multiple connectors on the same encoder with the same ddc line 788 /* This gets complicated. We have boards with VGA + HDMI with a
775 * This tends to be HDMI and DVI on the same encoder with the 789 * shared DDC line and we have boards with DVI-D + HDMI with a shared
776 * same ddc line. If the edid says HDMI, consider the HDMI port 790 * DDC line. The latter is more complex because with DVI<->HDMI adapters
777 * connected and the DVI port disconnected. If the edid doesn't 791 * you don't really know what's connected to which port as both are digital.
778 * say HDMI, vice versa.
779 */ 792 */
780 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) { 793 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
781 struct drm_device *dev = connector->dev; 794 struct drm_device *dev = connector->dev;
795 struct radeon_device *rdev = dev->dev_private;
782 struct drm_connector *list_connector; 796 struct drm_connector *list_connector;
783 struct radeon_connector *list_radeon_connector; 797 struct radeon_connector *list_radeon_connector;
784 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) { 798 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
785 if (connector == list_connector) 799 if (connector == list_connector)
786 continue; 800 continue;
787 list_radeon_connector = to_radeon_connector(list_connector); 801 list_radeon_connector = to_radeon_connector(list_connector);
788 if (radeon_connector->devices == list_radeon_connector->devices) { 802 if (list_radeon_connector->shared_ddc &&
789 if (drm_detect_hdmi_monitor(radeon_connector->edid)) { 803 (list_radeon_connector->ddc_bus->rec.i2c_id ==
790 if (connector->connector_type == DRM_MODE_CONNECTOR_DVID) { 804 radeon_connector->ddc_bus->rec.i2c_id)) {
791 kfree(radeon_connector->edid); 805 /* cases where both connectors are digital */
792 radeon_connector->edid = NULL; 806 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
793 ret = connector_status_disconnected; 807 /* hpd is our only option in this case */
794 } 808 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
795 } else {
796 if ((connector->connector_type == DRM_MODE_CONNECTOR_HDMIA) ||
797 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIB)) {
798 kfree(radeon_connector->edid); 809 kfree(radeon_connector->edid);
799 radeon_connector->edid = NULL; 810 radeon_connector->edid = NULL;
800 ret = connector_status_disconnected; 811 ret = connector_status_disconnected;
@@ -1085,6 +1096,8 @@ radeon_add_atom_connector(struct drm_device *dev,
1085 drm_connector_attach_property(&radeon_connector->base, 1096 drm_connector_attach_property(&radeon_connector->base,
1086 rdev->mode_info.load_detect_property, 1097 rdev->mode_info.load_detect_property,
1087 1); 1098 1);
1099 /* no HPD on analog connectors */
1100 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1088 connector->polled = DRM_CONNECTOR_POLL_CONNECT; 1101 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1089 break; 1102 break;
1090 case DRM_MODE_CONNECTOR_DVIA: 1103 case DRM_MODE_CONNECTOR_DVIA:
@@ -1099,6 +1112,8 @@ radeon_add_atom_connector(struct drm_device *dev,
1099 drm_connector_attach_property(&radeon_connector->base, 1112 drm_connector_attach_property(&radeon_connector->base,
1100 rdev->mode_info.load_detect_property, 1113 rdev->mode_info.load_detect_property,
1101 1); 1114 1);
1115 /* no HPD on analog connectors */
1116 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1102 break; 1117 break;
1103 case DRM_MODE_CONNECTOR_DVII: 1118 case DRM_MODE_CONNECTOR_DVII:
1104 case DRM_MODE_CONNECTOR_DVID: 1119 case DRM_MODE_CONNECTOR_DVID:
@@ -1119,6 +1134,10 @@ radeon_add_atom_connector(struct drm_device *dev,
1119 drm_connector_attach_property(&radeon_connector->base, 1134 drm_connector_attach_property(&radeon_connector->base,
1120 rdev->mode_info.coherent_mode_property, 1135 rdev->mode_info.coherent_mode_property,
1121 1); 1136 1);
1137 if (ASIC_IS_AVIVO(rdev))
1138 drm_connector_attach_property(&radeon_connector->base,
1139 rdev->mode_info.underscan_property,
1140 UNDERSCAN_AUTO);
1122 if (connector_type == DRM_MODE_CONNECTOR_DVII) { 1141 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1123 radeon_connector->dac_load_detect = true; 1142 radeon_connector->dac_load_detect = true;
1124 drm_connector_attach_property(&radeon_connector->base, 1143 drm_connector_attach_property(&radeon_connector->base,
@@ -1144,6 +1163,10 @@ radeon_add_atom_connector(struct drm_device *dev,
1144 drm_connector_attach_property(&radeon_connector->base, 1163 drm_connector_attach_property(&radeon_connector->base,
1145 rdev->mode_info.coherent_mode_property, 1164 rdev->mode_info.coherent_mode_property,
1146 1); 1165 1);
1166 if (ASIC_IS_AVIVO(rdev))
1167 drm_connector_attach_property(&radeon_connector->base,
1168 rdev->mode_info.underscan_property,
1169 UNDERSCAN_AUTO);
1147 subpixel_order = SubPixelHorizontalRGB; 1170 subpixel_order = SubPixelHorizontalRGB;
1148 break; 1171 break;
1149 case DRM_MODE_CONNECTOR_DisplayPort: 1172 case DRM_MODE_CONNECTOR_DisplayPort:
@@ -1175,6 +1198,10 @@ radeon_add_atom_connector(struct drm_device *dev,
1175 drm_connector_attach_property(&radeon_connector->base, 1198 drm_connector_attach_property(&radeon_connector->base,
1176 rdev->mode_info.coherent_mode_property, 1199 rdev->mode_info.coherent_mode_property,
1177 1); 1200 1);
1201 if (ASIC_IS_AVIVO(rdev))
1202 drm_connector_attach_property(&radeon_connector->base,
1203 rdev->mode_info.underscan_property,
1204 UNDERSCAN_AUTO);
1178 break; 1205 break;
1179 case DRM_MODE_CONNECTOR_SVIDEO: 1206 case DRM_MODE_CONNECTOR_SVIDEO:
1180 case DRM_MODE_CONNECTOR_Composite: 1207 case DRM_MODE_CONNECTOR_Composite:
@@ -1189,6 +1216,8 @@ radeon_add_atom_connector(struct drm_device *dev,
1189 drm_connector_attach_property(&radeon_connector->base, 1216 drm_connector_attach_property(&radeon_connector->base,
1190 rdev->mode_info.tv_std_property, 1217 rdev->mode_info.tv_std_property,
1191 radeon_atombios_get_tv_info(rdev)); 1218 radeon_atombios_get_tv_info(rdev));
1219 /* no HPD on analog connectors */
1220 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1192 } 1221 }
1193 break; 1222 break;
1194 case DRM_MODE_CONNECTOR_LVDS: 1223 case DRM_MODE_CONNECTOR_LVDS:
@@ -1212,7 +1241,7 @@ radeon_add_atom_connector(struct drm_device *dev,
1212 break; 1241 break;
1213 } 1242 }
1214 1243
1215 if (hpd->hpd == RADEON_HPD_NONE) { 1244 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
1216 if (i2c_bus->valid) 1245 if (i2c_bus->valid)
1217 connector->polled = DRM_CONNECTOR_POLL_CONNECT; 1246 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1218 } else 1247 } else
@@ -1279,6 +1308,8 @@ radeon_add_legacy_connector(struct drm_device *dev,
1279 drm_connector_attach_property(&radeon_connector->base, 1308 drm_connector_attach_property(&radeon_connector->base,
1280 rdev->mode_info.load_detect_property, 1309 rdev->mode_info.load_detect_property,
1281 1); 1310 1);
1311 /* no HPD on analog connectors */
1312 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1282 connector->polled = DRM_CONNECTOR_POLL_CONNECT; 1313 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1283 break; 1314 break;
1284 case DRM_MODE_CONNECTOR_DVIA: 1315 case DRM_MODE_CONNECTOR_DVIA:
@@ -1293,6 +1324,8 @@ radeon_add_legacy_connector(struct drm_device *dev,
1293 drm_connector_attach_property(&radeon_connector->base, 1324 drm_connector_attach_property(&radeon_connector->base,
1294 rdev->mode_info.load_detect_property, 1325 rdev->mode_info.load_detect_property,
1295 1); 1326 1);
1327 /* no HPD on analog connectors */
1328 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1296 break; 1329 break;
1297 case DRM_MODE_CONNECTOR_DVII: 1330 case DRM_MODE_CONNECTOR_DVII:
1298 case DRM_MODE_CONNECTOR_DVID: 1331 case DRM_MODE_CONNECTOR_DVID:
@@ -1331,6 +1364,8 @@ radeon_add_legacy_connector(struct drm_device *dev,
1331 drm_connector_attach_property(&radeon_connector->base, 1364 drm_connector_attach_property(&radeon_connector->base,
1332 rdev->mode_info.tv_std_property, 1365 rdev->mode_info.tv_std_property,
1333 radeon_combios_get_tv_info(rdev)); 1366 radeon_combios_get_tv_info(rdev));
1367 /* no HPD on analog connectors */
1368 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
1334 } 1369 }
1335 break; 1370 break;
1336 case DRM_MODE_CONNECTOR_LVDS: 1371 case DRM_MODE_CONNECTOR_LVDS:
@@ -1348,7 +1383,7 @@ radeon_add_legacy_connector(struct drm_device *dev,
1348 break; 1383 break;
1349 } 1384 }
1350 1385
1351 if (hpd->hpd == RADEON_HPD_NONE) { 1386 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
1352 if (i2c_bus->valid) 1387 if (i2c_bus->valid)
1353 connector->polled = DRM_CONNECTOR_POLL_CONNECT; 1388 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1354 } else 1389 } else
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
index 2f042a3c0e62..eb6b9eed7349 100644
--- a/drivers/gpu/drm/radeon/radeon_cp.c
+++ b/drivers/gpu/drm/radeon/radeon_cp.c
@@ -2120,8 +2120,8 @@ int radeon_driver_load(struct drm_device *dev, unsigned long flags)
2120 else 2120 else
2121 dev_priv->flags |= RADEON_IS_PCI; 2121 dev_priv->flags |= RADEON_IS_PCI;
2122 2122
2123 ret = drm_addmap(dev, drm_get_resource_start(dev, 2), 2123 ret = drm_addmap(dev, pci_resource_start(dev->pdev, 2),
2124 drm_get_resource_len(dev, 2), _DRM_REGISTERS, 2124 pci_resource_len(dev->pdev, 2), _DRM_REGISTERS,
2125 _DRM_READ_ONLY | _DRM_DRIVER, &dev_priv->mmio); 2125 _DRM_READ_ONLY | _DRM_DRIVER, &dev_priv->mmio);
2126 if (ret != 0) 2126 if (ret != 0)
2127 return ret; 2127 return ret;
@@ -2194,9 +2194,9 @@ int radeon_driver_firstopen(struct drm_device *dev)
2194 2194
2195 dev_priv->gart_info.table_size = RADEON_PCIGART_TABLE_SIZE; 2195 dev_priv->gart_info.table_size = RADEON_PCIGART_TABLE_SIZE;
2196 2196
2197 dev_priv->fb_aper_offset = drm_get_resource_start(dev, 0); 2197 dev_priv->fb_aper_offset = pci_resource_start(dev->pdev, 0);
2198 ret = drm_addmap(dev, dev_priv->fb_aper_offset, 2198 ret = drm_addmap(dev, dev_priv->fb_aper_offset,
2199 drm_get_resource_len(dev, 0), _DRM_FRAME_BUFFER, 2199 pci_resource_len(dev->pdev, 0), _DRM_FRAME_BUFFER,
2200 _DRM_WRITE_COMBINING, &map); 2200 _DRM_WRITE_COMBINING, &map);
2201 if (ret != 0) 2201 if (ret != 0)
2202 return ret; 2202 return ret;
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 5f317317aba2..a64811a94519 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -226,20 +226,20 @@ void radeon_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)
226{ 226{
227 u64 size_af, size_bf; 227 u64 size_af, size_bf;
228 228
229 size_af = 0xFFFFFFFF - mc->vram_end; 229 size_af = ((0xFFFFFFFF - mc->vram_end) + mc->gtt_base_align) & ~mc->gtt_base_align;
230 size_bf = mc->vram_start; 230 size_bf = mc->vram_start & ~mc->gtt_base_align;
231 if (size_bf > size_af) { 231 if (size_bf > size_af) {
232 if (mc->gtt_size > size_bf) { 232 if (mc->gtt_size > size_bf) {
233 dev_warn(rdev->dev, "limiting GTT\n"); 233 dev_warn(rdev->dev, "limiting GTT\n");
234 mc->gtt_size = size_bf; 234 mc->gtt_size = size_bf;
235 } 235 }
236 mc->gtt_start = mc->vram_start - mc->gtt_size; 236 mc->gtt_start = (mc->vram_start & ~mc->gtt_base_align) - mc->gtt_size;
237 } else { 237 } else {
238 if (mc->gtt_size > size_af) { 238 if (mc->gtt_size > size_af) {
239 dev_warn(rdev->dev, "limiting GTT\n"); 239 dev_warn(rdev->dev, "limiting GTT\n");
240 mc->gtt_size = size_af; 240 mc->gtt_size = size_af;
241 } 241 }
242 mc->gtt_start = mc->vram_end + 1; 242 mc->gtt_start = (mc->vram_end + 1 + mc->gtt_base_align) & ~mc->gtt_base_align;
243 } 243 }
244 mc->gtt_end = mc->gtt_start + mc->gtt_size - 1; 244 mc->gtt_end = mc->gtt_start + mc->gtt_size - 1;
245 dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n", 245 dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n",
@@ -415,6 +415,22 @@ static uint32_t cail_reg_read(struct card_info *info, uint32_t reg)
415 return r; 415 return r;
416} 416}
417 417
418static void cail_ioreg_write(struct card_info *info, uint32_t reg, uint32_t val)
419{
420 struct radeon_device *rdev = info->dev->dev_private;
421
422 WREG32_IO(reg*4, val);
423}
424
425static uint32_t cail_ioreg_read(struct card_info *info, uint32_t reg)
426{
427 struct radeon_device *rdev = info->dev->dev_private;
428 uint32_t r;
429
430 r = RREG32_IO(reg*4);
431 return r;
432}
433
418int radeon_atombios_init(struct radeon_device *rdev) 434int radeon_atombios_init(struct radeon_device *rdev)
419{ 435{
420 struct card_info *atom_card_info = 436 struct card_info *atom_card_info =
@@ -427,6 +443,15 @@ int radeon_atombios_init(struct radeon_device *rdev)
427 atom_card_info->dev = rdev->ddev; 443 atom_card_info->dev = rdev->ddev;
428 atom_card_info->reg_read = cail_reg_read; 444 atom_card_info->reg_read = cail_reg_read;
429 atom_card_info->reg_write = cail_reg_write; 445 atom_card_info->reg_write = cail_reg_write;
446 /* needed for iio ops */
447 if (rdev->rio_mem) {
448 atom_card_info->ioreg_read = cail_ioreg_read;
449 atom_card_info->ioreg_write = cail_ioreg_write;
450 } else {
451 DRM_ERROR("Unable to find PCI I/O BAR; using MMIO for ATOM IIO\n");
452 atom_card_info->ioreg_read = cail_reg_read;
453 atom_card_info->ioreg_write = cail_reg_write;
454 }
430 atom_card_info->mc_read = cail_mc_read; 455 atom_card_info->mc_read = cail_mc_read;
431 atom_card_info->mc_write = cail_mc_write; 456 atom_card_info->mc_write = cail_mc_write;
432 atom_card_info->pll_read = cail_pll_read; 457 atom_card_info->pll_read = cail_pll_read;
@@ -573,7 +598,7 @@ int radeon_device_init(struct radeon_device *rdev,
573 struct pci_dev *pdev, 598 struct pci_dev *pdev,
574 uint32_t flags) 599 uint32_t flags)
575{ 600{
576 int r; 601 int r, i;
577 int dma_bits; 602 int dma_bits;
578 603
579 rdev->shutdown = false; 604 rdev->shutdown = false;
@@ -650,8 +675,8 @@ int radeon_device_init(struct radeon_device *rdev,
650 675
651 /* Registers mapping */ 676 /* Registers mapping */
652 /* TODO: block userspace mapping of io register */ 677 /* TODO: block userspace mapping of io register */
653 rdev->rmmio_base = drm_get_resource_start(rdev->ddev, 2); 678 rdev->rmmio_base = pci_resource_start(rdev->pdev, 2);
654 rdev->rmmio_size = drm_get_resource_len(rdev->ddev, 2); 679 rdev->rmmio_size = pci_resource_len(rdev->pdev, 2);
655 rdev->rmmio = ioremap(rdev->rmmio_base, rdev->rmmio_size); 680 rdev->rmmio = ioremap(rdev->rmmio_base, rdev->rmmio_size);
656 if (rdev->rmmio == NULL) { 681 if (rdev->rmmio == NULL) {
657 return -ENOMEM; 682 return -ENOMEM;
@@ -659,6 +684,17 @@ int radeon_device_init(struct radeon_device *rdev,
659 DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)rdev->rmmio_base); 684 DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)rdev->rmmio_base);
660 DRM_INFO("register mmio size: %u\n", (unsigned)rdev->rmmio_size); 685 DRM_INFO("register mmio size: %u\n", (unsigned)rdev->rmmio_size);
661 686
687 /* io port mapping */
688 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
689 if (pci_resource_flags(rdev->pdev, i) & IORESOURCE_IO) {
690 rdev->rio_mem_size = pci_resource_len(rdev->pdev, i);
691 rdev->rio_mem = pci_iomap(rdev->pdev, i, rdev->rio_mem_size);
692 break;
693 }
694 }
695 if (rdev->rio_mem == NULL)
696 DRM_ERROR("Unable to find PCI I/O BAR\n");
697
662 /* if we have > 1 VGA cards, then disable the radeon VGA resources */ 698 /* if we have > 1 VGA cards, then disable the radeon VGA resources */
663 /* this will fail for cards that aren't VGA class devices, just 699 /* this will fail for cards that aren't VGA class devices, just
664 * ignore it */ 700 * ignore it */
@@ -701,6 +737,9 @@ void radeon_device_fini(struct radeon_device *rdev)
701 destroy_workqueue(rdev->wq); 737 destroy_workqueue(rdev->wq);
702 vga_switcheroo_unregister_client(rdev->pdev); 738 vga_switcheroo_unregister_client(rdev->pdev);
703 vga_client_register(rdev->pdev, NULL, NULL, NULL); 739 vga_client_register(rdev->pdev, NULL, NULL, NULL);
740 if (rdev->rio_mem)
741 pci_iounmap(rdev->pdev, rdev->rio_mem);
742 rdev->rio_mem = NULL;
704 iounmap(rdev->rmmio); 743 iounmap(rdev->rmmio);
705 rdev->rmmio = NULL; 744 rdev->rmmio = NULL;
706} 745}
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 8154cdf796e4..74dac9635d70 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -42,7 +42,7 @@ static void avivo_crtc_load_lut(struct drm_crtc *crtc)
42 struct radeon_device *rdev = dev->dev_private; 42 struct radeon_device *rdev = dev->dev_private;
43 int i; 43 int i;
44 44
45 DRM_DEBUG("%d\n", radeon_crtc->crtc_id); 45 DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id);
46 WREG32(AVIVO_DC_LUTA_CONTROL + radeon_crtc->crtc_offset, 0); 46 WREG32(AVIVO_DC_LUTA_CONTROL + radeon_crtc->crtc_offset, 0);
47 47
48 WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0); 48 WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0);
@@ -75,7 +75,7 @@ static void evergreen_crtc_load_lut(struct drm_crtc *crtc)
75 struct radeon_device *rdev = dev->dev_private; 75 struct radeon_device *rdev = dev->dev_private;
76 int i; 76 int i;
77 77
78 DRM_DEBUG("%d\n", radeon_crtc->crtc_id); 78 DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id);
79 WREG32(EVERGREEN_DC_LUT_CONTROL + radeon_crtc->crtc_offset, 0); 79 WREG32(EVERGREEN_DC_LUT_CONTROL + radeon_crtc->crtc_offset, 0);
80 80
81 WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0); 81 WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0);
@@ -469,7 +469,7 @@ static void radeon_compute_pll_legacy(struct radeon_pll *pll,
469 uint32_t post_div; 469 uint32_t post_div;
470 u32 pll_out_min, pll_out_max; 470 u32 pll_out_min, pll_out_max;
471 471
472 DRM_DEBUG("PLL freq %llu %u %u\n", freq, pll->min_ref_div, pll->max_ref_div); 472 DRM_DEBUG_KMS("PLL freq %llu %u %u\n", freq, pll->min_ref_div, pll->max_ref_div);
473 freq = freq * 1000; 473 freq = freq * 1000;
474 474
475 if (pll->flags & RADEON_PLL_IS_LCD) { 475 if (pll->flags & RADEON_PLL_IS_LCD) {
@@ -558,15 +558,17 @@ static void radeon_compute_pll_legacy(struct radeon_pll *pll,
558 current_freq = radeon_div(tmp, ref_div * post_div); 558 current_freq = radeon_div(tmp, ref_div * post_div);
559 559
560 if (pll->flags & RADEON_PLL_PREFER_CLOSEST_LOWER) { 560 if (pll->flags & RADEON_PLL_PREFER_CLOSEST_LOWER) {
561 error = freq - current_freq; 561 if (freq < current_freq)
562 error = error < 0 ? 0xffffffff : error; 562 error = 0xffffffff;
563 else
564 error = freq - current_freq;
563 } else 565 } else
564 error = abs(current_freq - freq); 566 error = abs(current_freq - freq);
565 vco_diff = abs(vco - best_vco); 567 vco_diff = abs(vco - best_vco);
566 568
567 if ((best_vco == 0 && error < best_error) || 569 if ((best_vco == 0 && error < best_error) ||
568 (best_vco != 0 && 570 (best_vco != 0 &&
569 (error < best_error - 100 || 571 ((best_error > 100 && error < best_error - 100) ||
570 (abs(error - best_error) < 100 && vco_diff < best_vco_diff)))) { 572 (abs(error - best_error) < 100 && vco_diff < best_vco_diff)))) {
571 best_post_div = post_div; 573 best_post_div = post_div;
572 best_ref_div = ref_div; 574 best_ref_div = ref_div;
@@ -803,7 +805,7 @@ done:
803 *ref_div_p = ref_div; 805 *ref_div_p = ref_div;
804 *post_div_p = post_div; 806 *post_div_p = post_div;
805 807
806 DRM_DEBUG("%u %d.%d, %d, %d\n", *dot_clock_p, *fb_div_p, *frac_fb_div_p, *ref_div_p, *post_div_p); 808 DRM_DEBUG_KMS("%u %d.%d, %d, %d\n", *dot_clock_p, *fb_div_p, *frac_fb_div_p, *ref_div_p, *post_div_p);
807} 809}
808 810
809void radeon_compute_pll(struct radeon_pll *pll, 811void radeon_compute_pll(struct radeon_pll *pll,
@@ -919,6 +921,12 @@ static struct drm_prop_enum_list radeon_tv_std_enum_list[] =
919 { TV_STD_SECAM, "secam" }, 921 { TV_STD_SECAM, "secam" },
920}; 922};
921 923
924static struct drm_prop_enum_list radeon_underscan_enum_list[] =
925{ { UNDERSCAN_OFF, "off" },
926 { UNDERSCAN_ON, "on" },
927 { UNDERSCAN_AUTO, "auto" },
928};
929
922static int radeon_modeset_create_props(struct radeon_device *rdev) 930static int radeon_modeset_create_props(struct radeon_device *rdev)
923{ 931{
924 int i, sz; 932 int i, sz;
@@ -972,6 +980,18 @@ static int radeon_modeset_create_props(struct radeon_device *rdev)
972 radeon_tv_std_enum_list[i].name); 980 radeon_tv_std_enum_list[i].name);
973 } 981 }
974 982
983 sz = ARRAY_SIZE(radeon_underscan_enum_list);
984 rdev->mode_info.underscan_property =
985 drm_property_create(rdev->ddev,
986 DRM_MODE_PROP_ENUM,
987 "underscan", sz);
988 for (i = 0; i < sz; i++) {
989 drm_property_add_enum(rdev->mode_info.underscan_property,
990 i,
991 radeon_underscan_enum_list[i].type,
992 radeon_underscan_enum_list[i].name);
993 }
994
975 return 0; 995 return 0;
976} 996}
977 997
@@ -1067,15 +1087,26 @@ bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
1067 struct drm_display_mode *adjusted_mode) 1087 struct drm_display_mode *adjusted_mode)
1068{ 1088{
1069 struct drm_device *dev = crtc->dev; 1089 struct drm_device *dev = crtc->dev;
1090 struct radeon_device *rdev = dev->dev_private;
1070 struct drm_encoder *encoder; 1091 struct drm_encoder *encoder;
1071 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); 1092 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
1072 struct radeon_encoder *radeon_encoder; 1093 struct radeon_encoder *radeon_encoder;
1094 struct drm_connector *connector;
1095 struct radeon_connector *radeon_connector;
1073 bool first = true; 1096 bool first = true;
1097 u32 src_v = 1, dst_v = 1;
1098 u32 src_h = 1, dst_h = 1;
1099
1100 radeon_crtc->h_border = 0;
1101 radeon_crtc->v_border = 0;
1074 1102
1075 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 1103 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1076 radeon_encoder = to_radeon_encoder(encoder);
1077 if (encoder->crtc != crtc) 1104 if (encoder->crtc != crtc)
1078 continue; 1105 continue;
1106 radeon_encoder = to_radeon_encoder(encoder);
1107 connector = radeon_get_connector_for_encoder(encoder);
1108 radeon_connector = to_radeon_connector(connector);
1109
1079 if (first) { 1110 if (first) {
1080 /* set scaling */ 1111 /* set scaling */
1081 if (radeon_encoder->rmx_type == RMX_OFF) 1112 if (radeon_encoder->rmx_type == RMX_OFF)
@@ -1085,31 +1116,49 @@ bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
1085 radeon_crtc->rmx_type = radeon_encoder->rmx_type; 1116 radeon_crtc->rmx_type = radeon_encoder->rmx_type;
1086 else 1117 else
1087 radeon_crtc->rmx_type = RMX_OFF; 1118 radeon_crtc->rmx_type = RMX_OFF;
1119 src_v = crtc->mode.vdisplay;
1120 dst_v = radeon_crtc->native_mode.vdisplay;
1121 src_h = crtc->mode.hdisplay;
1122 dst_h = radeon_crtc->native_mode.vdisplay;
1088 /* copy native mode */ 1123 /* copy native mode */
1089 memcpy(&radeon_crtc->native_mode, 1124 memcpy(&radeon_crtc->native_mode,
1090 &radeon_encoder->native_mode, 1125 &radeon_encoder->native_mode,
1091 sizeof(struct drm_display_mode)); 1126 sizeof(struct drm_display_mode));
1127
1128 /* fix up for overscan on hdmi */
1129 if (ASIC_IS_AVIVO(rdev) &&
1130 ((radeon_encoder->underscan_type == UNDERSCAN_ON) ||
1131 ((radeon_encoder->underscan_type == UNDERSCAN_AUTO) &&
1132 drm_detect_hdmi_monitor(radeon_connector->edid)))) {
1133 radeon_crtc->h_border = (mode->hdisplay >> 5) + 16;
1134 radeon_crtc->v_border = (mode->vdisplay >> 5) + 16;
1135 radeon_crtc->rmx_type = RMX_FULL;
1136 src_v = crtc->mode.vdisplay;
1137 dst_v = crtc->mode.vdisplay - (radeon_crtc->v_border * 2);
1138 src_h = crtc->mode.hdisplay;
1139 dst_h = crtc->mode.hdisplay - (radeon_crtc->h_border * 2);
1140 }
1092 first = false; 1141 first = false;
1093 } else { 1142 } else {
1094 if (radeon_crtc->rmx_type != radeon_encoder->rmx_type) { 1143 if (radeon_crtc->rmx_type != radeon_encoder->rmx_type) {
1095 /* WARNING: Right now this can't happen but 1144 /* WARNING: Right now this can't happen but
1096 * in the future we need to check that scaling 1145 * in the future we need to check that scaling
1097 * are consistent accross different encoder 1146 * are consistent across different encoder
1098 * (ie all encoder can work with the same 1147 * (ie all encoder can work with the same
1099 * scaling). 1148 * scaling).
1100 */ 1149 */
1101 DRM_ERROR("Scaling not consistent accross encoder.\n"); 1150 DRM_ERROR("Scaling not consistent across encoder.\n");
1102 return false; 1151 return false;
1103 } 1152 }
1104 } 1153 }
1105 } 1154 }
1106 if (radeon_crtc->rmx_type != RMX_OFF) { 1155 if (radeon_crtc->rmx_type != RMX_OFF) {
1107 fixed20_12 a, b; 1156 fixed20_12 a, b;
1108 a.full = dfixed_const(crtc->mode.vdisplay); 1157 a.full = dfixed_const(src_v);
1109 b.full = dfixed_const(radeon_crtc->native_mode.hdisplay); 1158 b.full = dfixed_const(dst_v);
1110 radeon_crtc->vsc.full = dfixed_div(a, b); 1159 radeon_crtc->vsc.full = dfixed_div(a, b);
1111 a.full = dfixed_const(crtc->mode.hdisplay); 1160 a.full = dfixed_const(src_h);
1112 b.full = dfixed_const(radeon_crtc->native_mode.vdisplay); 1161 b.full = dfixed_const(dst_h);
1113 radeon_crtc->hsc.full = dfixed_div(a, b); 1162 radeon_crtc->hsc.full = dfixed_div(a, b);
1114 } else { 1163 } else {
1115 radeon_crtc->vsc.full = dfixed_const(1); 1164 radeon_crtc->vsc.full = dfixed_const(1);
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index e166fe4d7c30..795403b0e2cd 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -46,9 +46,10 @@
46 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs 46 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
47 * - 2.4.0 - add crtc id query 47 * - 2.4.0 - add crtc id query
48 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen 48 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
49 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
49 */ 50 */
50#define KMS_DRIVER_MAJOR 2 51#define KMS_DRIVER_MAJOR 2
51#define KMS_DRIVER_MINOR 5 52#define KMS_DRIVER_MINOR 6
52#define KMS_DRIVER_PATCHLEVEL 0 53#define KMS_DRIVER_PATCHLEVEL 0
53int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 54int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
54int radeon_driver_unload_kms(struct drm_device *dev); 55int radeon_driver_unload_kms(struct drm_device *dev);
@@ -238,7 +239,7 @@ static struct drm_driver kms_driver;
238static int __devinit 239static int __devinit
239radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 240radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
240{ 241{
241 return drm_get_dev(pdev, ent, &kms_driver); 242 return drm_get_pci_dev(pdev, ent, &kms_driver);
242} 243}
243 244
244static void 245static void
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index e0b30b264c28..263c8098d7dd 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -205,14 +205,14 @@ void radeon_encoder_set_active_device(struct drm_encoder *encoder)
205 if (connector->encoder == encoder) { 205 if (connector->encoder == encoder) {
206 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 206 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
207 radeon_encoder->active_device = radeon_encoder->devices & radeon_connector->devices; 207 radeon_encoder->active_device = radeon_encoder->devices & radeon_connector->devices;
208 DRM_DEBUG("setting active device to %08x from %08x %08x for encoder %d\n", 208 DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
209 radeon_encoder->active_device, radeon_encoder->devices, 209 radeon_encoder->active_device, radeon_encoder->devices,
210 radeon_connector->devices, encoder->encoder_type); 210 radeon_connector->devices, encoder->encoder_type);
211 } 211 }
212 } 212 }
213} 213}
214 214
215static struct drm_connector * 215struct drm_connector *
216radeon_get_connector_for_encoder(struct drm_encoder *encoder) 216radeon_get_connector_for_encoder(struct drm_encoder *encoder)
217{ 217{
218 struct drm_device *dev = encoder->dev; 218 struct drm_device *dev = encoder->dev;
@@ -1021,7 +1021,7 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
1021 1021
1022 memset(&args, 0, sizeof(args)); 1022 memset(&args, 0, sizeof(args));
1023 1023
1024 DRM_DEBUG("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n", 1024 DRM_DEBUG_KMS("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n",
1025 radeon_encoder->encoder_id, mode, radeon_encoder->devices, 1025 radeon_encoder->encoder_id, mode, radeon_encoder->devices,
1026 radeon_encoder->active_device); 1026 radeon_encoder->active_device);
1027 switch (radeon_encoder->encoder_id) { 1027 switch (radeon_encoder->encoder_id) {
@@ -1484,7 +1484,7 @@ radeon_atom_dac_detect(struct drm_encoder *encoder, struct drm_connector *connec
1484 uint32_t bios_0_scratch; 1484 uint32_t bios_0_scratch;
1485 1485
1486 if (!atombios_dac_load_detect(encoder, connector)) { 1486 if (!atombios_dac_load_detect(encoder, connector)) {
1487 DRM_DEBUG("detect returned false \n"); 1487 DRM_DEBUG_KMS("detect returned false \n");
1488 return connector_status_unknown; 1488 return connector_status_unknown;
1489 } 1489 }
1490 1490
@@ -1493,7 +1493,7 @@ radeon_atom_dac_detect(struct drm_encoder *encoder, struct drm_connector *connec
1493 else 1493 else
1494 bios_0_scratch = RREG32(RADEON_BIOS_0_SCRATCH); 1494 bios_0_scratch = RREG32(RADEON_BIOS_0_SCRATCH);
1495 1495
1496 DRM_DEBUG("Bios 0 scratch %x %08x\n", bios_0_scratch, radeon_encoder->devices); 1496 DRM_DEBUG_KMS("Bios 0 scratch %x %08x\n", bios_0_scratch, radeon_encoder->devices);
1497 if (radeon_connector->devices & ATOM_DEVICE_CRT1_SUPPORT) { 1497 if (radeon_connector->devices & ATOM_DEVICE_CRT1_SUPPORT) {
1498 if (bios_0_scratch & ATOM_S0_CRT1_MASK) 1498 if (bios_0_scratch & ATOM_S0_CRT1_MASK)
1499 return connector_status_connected; 1499 return connector_status_connected;
@@ -1694,6 +1694,7 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t su
1694 radeon_encoder->encoder_id = encoder_id; 1694 radeon_encoder->encoder_id = encoder_id;
1695 radeon_encoder->devices = supported_device; 1695 radeon_encoder->devices = supported_device;
1696 radeon_encoder->rmx_type = RMX_OFF; 1696 radeon_encoder->rmx_type = RMX_OFF;
1697 radeon_encoder->underscan_type = UNDERSCAN_OFF;
1697 1698
1698 switch (radeon_encoder->encoder_id) { 1699 switch (radeon_encoder->encoder_id) {
1699 case ENCODER_OBJECT_ID_INTERNAL_LVDS: 1700 case ENCODER_OBJECT_ID_INTERNAL_LVDS:
@@ -1707,6 +1708,8 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t su
1707 } else { 1708 } else {
1708 drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TMDS); 1709 drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TMDS);
1709 radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder); 1710 radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder);
1711 if (ASIC_IS_AVIVO(rdev))
1712 radeon_encoder->underscan_type = UNDERSCAN_AUTO;
1710 } 1713 }
1711 drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs); 1714 drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs);
1712 break; 1715 break;
@@ -1736,6 +1739,8 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t su
1736 } else { 1739 } else {
1737 drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TMDS); 1740 drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TMDS);
1738 radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder); 1741 radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder);
1742 if (ASIC_IS_AVIVO(rdev))
1743 radeon_encoder->underscan_type = UNDERSCAN_AUTO;
1739 } 1744 }
1740 drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs); 1745 drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs);
1741 break; 1746 break;
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
index 6a70c0dc7f92..ddcd3b13f151 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -49,7 +49,7 @@ int radeon_driver_unload_kms(struct drm_device *dev)
49int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags) 49int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
50{ 50{
51 struct radeon_device *rdev; 51 struct radeon_device *rdev;
52 int r; 52 int r, acpi_status;
53 53
54 rdev = kzalloc(sizeof(struct radeon_device), GFP_KERNEL); 54 rdev = kzalloc(sizeof(struct radeon_device), GFP_KERNEL);
55 if (rdev == NULL) { 55 if (rdev == NULL) {
@@ -77,6 +77,12 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
77 dev_err(&dev->pdev->dev, "Fatal error during GPU init\n"); 77 dev_err(&dev->pdev->dev, "Fatal error during GPU init\n");
78 goto out; 78 goto out;
79 } 79 }
80
81 /* Call ACPI methods */
82 acpi_status = radeon_acpi_init(rdev);
83 if (acpi_status)
84 dev_dbg(&dev->pdev->dev, "Error during ACPI methods call\n");
85
80 /* Again modeset_init should fail only on fatal error 86 /* Again modeset_init should fail only on fatal error
81 * otherwise it should provide enough functionalities 87 * otherwise it should provide enough functionalities
82 * for shadowfb to run 88 * for shadowfb to run
@@ -128,21 +134,43 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
128 for (i = 0, found = 0; i < rdev->num_crtc; i++) { 134 for (i = 0, found = 0; i < rdev->num_crtc; i++) {
129 crtc = (struct drm_crtc *)minfo->crtcs[i]; 135 crtc = (struct drm_crtc *)minfo->crtcs[i];
130 if (crtc && crtc->base.id == value) { 136 if (crtc && crtc->base.id == value) {
131 value = i; 137 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
138 value = radeon_crtc->crtc_id;
132 found = 1; 139 found = 1;
133 break; 140 break;
134 } 141 }
135 } 142 }
136 if (!found) { 143 if (!found) {
137 DRM_DEBUG("unknown crtc id %d\n", value); 144 DRM_DEBUG_KMS("unknown crtc id %d\n", value);
138 return -EINVAL; 145 return -EINVAL;
139 } 146 }
140 break; 147 break;
141 case RADEON_INFO_ACCEL_WORKING2: 148 case RADEON_INFO_ACCEL_WORKING2:
142 value = rdev->accel_working; 149 value = rdev->accel_working;
143 break; 150 break;
151 case RADEON_INFO_TILING_CONFIG:
152 if (rdev->family >= CHIP_CEDAR)
153 value = rdev->config.evergreen.tile_config;
154 else if (rdev->family >= CHIP_RV770)
155 value = rdev->config.rv770.tile_config;
156 else if (rdev->family >= CHIP_R600)
157 value = rdev->config.r600.tile_config;
158 else {
159 DRM_DEBUG_KMS("tiling config is r6xx+ only!\n");
160 return -EINVAL;
161 }
162 case RADEON_INFO_WANT_HYPERZ:
163 mutex_lock(&dev->struct_mutex);
164 if (rdev->hyperz_filp)
165 value = 0;
166 else {
167 rdev->hyperz_filp = filp;
168 value = 1;
169 }
170 mutex_unlock(&dev->struct_mutex);
171 break;
144 default: 172 default:
145 DRM_DEBUG("Invalid request %d\n", info->request); 173 DRM_DEBUG_KMS("Invalid request %d\n", info->request);
146 return -EINVAL; 174 return -EINVAL;
147 } 175 }
148 if (DRM_COPY_TO_USER(value_ptr, &value, sizeof(uint32_t))) { 176 if (DRM_COPY_TO_USER(value_ptr, &value, sizeof(uint32_t))) {
@@ -180,9 +208,11 @@ void radeon_driver_postclose_kms(struct drm_device *dev,
180void radeon_driver_preclose_kms(struct drm_device *dev, 208void radeon_driver_preclose_kms(struct drm_device *dev,
181 struct drm_file *file_priv) 209 struct drm_file *file_priv)
182{ 210{
211 struct radeon_device *rdev = dev->dev_private;
212 if (rdev->hyperz_filp == file_priv)
213 rdev->hyperz_filp = NULL;
183} 214}
184 215
185
186/* 216/*
187 * VBlank related functions. 217 * VBlank related functions.
188 */ 218 */
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index e1e5255396ac..989df519a1e4 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -362,10 +362,10 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
362 uint32_t gen_cntl_reg, gen_cntl_val; 362 uint32_t gen_cntl_reg, gen_cntl_val;
363 int r; 363 int r;
364 364
365 DRM_DEBUG("\n"); 365 DRM_DEBUG_KMS("\n");
366 /* no fb bound */ 366 /* no fb bound */
367 if (!crtc->fb) { 367 if (!crtc->fb) {
368 DRM_DEBUG("No FB bound\n"); 368 DRM_DEBUG_KMS("No FB bound\n");
369 return 0; 369 return 0;
370 } 370 }
371 371
@@ -528,7 +528,7 @@ static bool radeon_set_crtc_timing(struct drm_crtc *crtc, struct drm_display_mod
528 uint32_t crtc_v_sync_strt_wid; 528 uint32_t crtc_v_sync_strt_wid;
529 bool is_tv = false; 529 bool is_tv = false;
530 530
531 DRM_DEBUG("\n"); 531 DRM_DEBUG_KMS("\n");
532 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 532 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
533 if (encoder->crtc == crtc) { 533 if (encoder->crtc == crtc) {
534 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 534 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
@@ -757,7 +757,7 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
757 } 757 }
758 } 758 }
759 759
760 DRM_DEBUG("\n"); 760 DRM_DEBUG_KMS("\n");
761 761
762 if (!use_bios_divs) { 762 if (!use_bios_divs) {
763 radeon_compute_pll(pll, mode->clock, 763 radeon_compute_pll(pll, mode->clock,
@@ -772,7 +772,7 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
772 if (!post_div->divider) 772 if (!post_div->divider)
773 post_div = &post_divs[0]; 773 post_div = &post_divs[0];
774 774
775 DRM_DEBUG("dc=%u, fd=%d, rd=%d, pd=%d\n", 775 DRM_DEBUG_KMS("dc=%u, fd=%d, rd=%d, pd=%d\n",
776 (unsigned)freq, 776 (unsigned)freq,
777 feedback_div, 777 feedback_div,
778 reference_div, 778 reference_div,
@@ -841,12 +841,12 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
841 | RADEON_P2PLL_SLEEP 841 | RADEON_P2PLL_SLEEP
842 | RADEON_P2PLL_ATOMIC_UPDATE_EN)); 842 | RADEON_P2PLL_ATOMIC_UPDATE_EN));
843 843
844 DRM_DEBUG("Wrote2: 0x%08x 0x%08x 0x%08x (0x%08x)\n", 844 DRM_DEBUG_KMS("Wrote2: 0x%08x 0x%08x 0x%08x (0x%08x)\n",
845 (unsigned)pll_ref_div, 845 (unsigned)pll_ref_div,
846 (unsigned)pll_fb_post_div, 846 (unsigned)pll_fb_post_div,
847 (unsigned)htotal_cntl, 847 (unsigned)htotal_cntl,
848 RREG32_PLL(RADEON_P2PLL_CNTL)); 848 RREG32_PLL(RADEON_P2PLL_CNTL));
849 DRM_DEBUG("Wrote2: rd=%u, fd=%u, pd=%u\n", 849 DRM_DEBUG_KMS("Wrote2: rd=%u, fd=%u, pd=%u\n",
850 (unsigned)pll_ref_div & RADEON_P2PLL_REF_DIV_MASK, 850 (unsigned)pll_ref_div & RADEON_P2PLL_REF_DIV_MASK,
851 (unsigned)pll_fb_post_div & RADEON_P2PLL_FB0_DIV_MASK, 851 (unsigned)pll_fb_post_div & RADEON_P2PLL_FB0_DIV_MASK,
852 (unsigned)((pll_fb_post_div & 852 (unsigned)((pll_fb_post_div &
@@ -947,12 +947,12 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
947 | RADEON_PPLL_ATOMIC_UPDATE_EN 947 | RADEON_PPLL_ATOMIC_UPDATE_EN
948 | RADEON_PPLL_VGA_ATOMIC_UPDATE_EN)); 948 | RADEON_PPLL_VGA_ATOMIC_UPDATE_EN));
949 949
950 DRM_DEBUG("Wrote: 0x%08x 0x%08x 0x%08x (0x%08x)\n", 950 DRM_DEBUG_KMS("Wrote: 0x%08x 0x%08x 0x%08x (0x%08x)\n",
951 pll_ref_div, 951 pll_ref_div,
952 pll_fb_post_div, 952 pll_fb_post_div,
953 (unsigned)htotal_cntl, 953 (unsigned)htotal_cntl,
954 RREG32_PLL(RADEON_PPLL_CNTL)); 954 RREG32_PLL(RADEON_PPLL_CNTL));
955 DRM_DEBUG("Wrote: rd=%d, fd=%d, pd=%d\n", 955 DRM_DEBUG_KMS("Wrote: rd=%d, fd=%d, pd=%d\n",
956 pll_ref_div & RADEON_PPLL_REF_DIV_MASK, 956 pll_ref_div & RADEON_PPLL_REF_DIV_MASK,
957 pll_fb_post_div & RADEON_PPLL_FB3_DIV_MASK, 957 pll_fb_post_div & RADEON_PPLL_FB3_DIV_MASK,
958 (pll_fb_post_div & RADEON_PPLL_POST3_DIV_MASK) >> 16); 958 (pll_fb_post_div & RADEON_PPLL_POST3_DIV_MASK) >> 16);
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
index bad77f40a9da..b8149cbc0c70 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
@@ -47,7 +47,7 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
47 uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man; 47 uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man;
48 int panel_pwr_delay = 2000; 48 int panel_pwr_delay = 2000;
49 bool is_mac = false; 49 bool is_mac = false;
50 DRM_DEBUG("\n"); 50 DRM_DEBUG_KMS("\n");
51 51
52 if (radeon_encoder->enc_priv) { 52 if (radeon_encoder->enc_priv) {
53 if (rdev->is_atom_bios) { 53 if (rdev->is_atom_bios) {
@@ -108,6 +108,7 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
108 udelay(panel_pwr_delay * 1000); 108 udelay(panel_pwr_delay * 1000);
109 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); 109 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
110 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); 110 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
111 udelay(panel_pwr_delay * 1000);
111 break; 112 break;
112 } 113 }
113 114
@@ -150,7 +151,7 @@ static void radeon_legacy_lvds_mode_set(struct drm_encoder *encoder,
150 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 151 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
151 uint32_t lvds_pll_cntl, lvds_gen_cntl, lvds_ss_gen_cntl; 152 uint32_t lvds_pll_cntl, lvds_gen_cntl, lvds_ss_gen_cntl;
152 153
153 DRM_DEBUG("\n"); 154 DRM_DEBUG_KMS("\n");
154 155
155 lvds_pll_cntl = RREG32(RADEON_LVDS_PLL_CNTL); 156 lvds_pll_cntl = RREG32(RADEON_LVDS_PLL_CNTL);
156 lvds_pll_cntl &= ~RADEON_LVDS_PLL_EN; 157 lvds_pll_cntl &= ~RADEON_LVDS_PLL_EN;
@@ -166,7 +167,7 @@ static void radeon_legacy_lvds_mode_set(struct drm_encoder *encoder,
166 } else { 167 } else {
167 struct radeon_encoder_lvds *lvds = (struct radeon_encoder_lvds *)radeon_encoder->enc_priv; 168 struct radeon_encoder_lvds *lvds = (struct radeon_encoder_lvds *)radeon_encoder->enc_priv;
168 if (lvds) { 169 if (lvds) {
169 DRM_DEBUG("bios LVDS_GEN_CNTL: 0x%x\n", lvds->lvds_gen_cntl); 170 DRM_DEBUG_KMS("bios LVDS_GEN_CNTL: 0x%x\n", lvds->lvds_gen_cntl);
170 lvds_gen_cntl = lvds->lvds_gen_cntl; 171 lvds_gen_cntl = lvds->lvds_gen_cntl;
171 lvds_ss_gen_cntl &= ~((0xf << RADEON_LVDS_PWRSEQ_DELAY1_SHIFT) | 172 lvds_ss_gen_cntl &= ~((0xf << RADEON_LVDS_PWRSEQ_DELAY1_SHIFT) |
172 (0xf << RADEON_LVDS_PWRSEQ_DELAY2_SHIFT)); 173 (0xf << RADEON_LVDS_PWRSEQ_DELAY2_SHIFT));
@@ -249,7 +250,7 @@ static void radeon_legacy_primary_dac_dpms(struct drm_encoder *encoder, int mode
249 uint32_t dac_cntl = RREG32(RADEON_DAC_CNTL); 250 uint32_t dac_cntl = RREG32(RADEON_DAC_CNTL);
250 uint32_t dac_macro_cntl = RREG32(RADEON_DAC_MACRO_CNTL); 251 uint32_t dac_macro_cntl = RREG32(RADEON_DAC_MACRO_CNTL);
251 252
252 DRM_DEBUG("\n"); 253 DRM_DEBUG_KMS("\n");
253 254
254 switch (mode) { 255 switch (mode) {
255 case DRM_MODE_DPMS_ON: 256 case DRM_MODE_DPMS_ON:
@@ -314,7 +315,7 @@ static void radeon_legacy_primary_dac_mode_set(struct drm_encoder *encoder,
314 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 315 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
315 uint32_t disp_output_cntl, dac_cntl, dac2_cntl, dac_macro_cntl; 316 uint32_t disp_output_cntl, dac_cntl, dac2_cntl, dac_macro_cntl;
316 317
317 DRM_DEBUG("\n"); 318 DRM_DEBUG_KMS("\n");
318 319
319 if (radeon_crtc->crtc_id == 0) { 320 if (radeon_crtc->crtc_id == 0) {
320 if (rdev->family == CHIP_R200 || ASIC_IS_R300(rdev)) { 321 if (rdev->family == CHIP_R200 || ASIC_IS_R300(rdev)) {
@@ -445,7 +446,7 @@ static void radeon_legacy_tmds_int_dpms(struct drm_encoder *encoder, int mode)
445 struct drm_device *dev = encoder->dev; 446 struct drm_device *dev = encoder->dev;
446 struct radeon_device *rdev = dev->dev_private; 447 struct radeon_device *rdev = dev->dev_private;
447 uint32_t fp_gen_cntl = RREG32(RADEON_FP_GEN_CNTL); 448 uint32_t fp_gen_cntl = RREG32(RADEON_FP_GEN_CNTL);
448 DRM_DEBUG("\n"); 449 DRM_DEBUG_KMS("\n");
449 450
450 switch (mode) { 451 switch (mode) {
451 case DRM_MODE_DPMS_ON: 452 case DRM_MODE_DPMS_ON:
@@ -501,7 +502,7 @@ static void radeon_legacy_tmds_int_mode_set(struct drm_encoder *encoder,
501 uint32_t tmp, tmds_pll_cntl, tmds_transmitter_cntl, fp_gen_cntl; 502 uint32_t tmp, tmds_pll_cntl, tmds_transmitter_cntl, fp_gen_cntl;
502 int i; 503 int i;
503 504
504 DRM_DEBUG("\n"); 505 DRM_DEBUG_KMS("\n");
505 506
506 tmp = tmds_pll_cntl = RREG32(RADEON_TMDS_PLL_CNTL); 507 tmp = tmds_pll_cntl = RREG32(RADEON_TMDS_PLL_CNTL);
507 tmp &= 0xfffff; 508 tmp &= 0xfffff;
@@ -609,7 +610,7 @@ static void radeon_legacy_tmds_ext_dpms(struct drm_encoder *encoder, int mode)
609 struct drm_device *dev = encoder->dev; 610 struct drm_device *dev = encoder->dev;
610 struct radeon_device *rdev = dev->dev_private; 611 struct radeon_device *rdev = dev->dev_private;
611 uint32_t fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL); 612 uint32_t fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL);
612 DRM_DEBUG("\n"); 613 DRM_DEBUG_KMS("\n");
613 614
614 switch (mode) { 615 switch (mode) {
615 case DRM_MODE_DPMS_ON: 616 case DRM_MODE_DPMS_ON:
@@ -665,7 +666,7 @@ static void radeon_legacy_tmds_ext_mode_set(struct drm_encoder *encoder,
665 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 666 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
666 uint32_t fp2_gen_cntl; 667 uint32_t fp2_gen_cntl;
667 668
668 DRM_DEBUG("\n"); 669 DRM_DEBUG_KMS("\n");
669 670
670 if (rdev->is_atom_bios) { 671 if (rdev->is_atom_bios) {
671 radeon_encoder->pixel_clock = adjusted_mode->clock; 672 radeon_encoder->pixel_clock = adjusted_mode->clock;
@@ -759,7 +760,7 @@ static void radeon_legacy_tv_dac_dpms(struct drm_encoder *encoder, int mode)
759 uint32_t fp2_gen_cntl = 0, crtc2_gen_cntl = 0, tv_dac_cntl = 0; 760 uint32_t fp2_gen_cntl = 0, crtc2_gen_cntl = 0, tv_dac_cntl = 0;
760 uint32_t tv_master_cntl = 0; 761 uint32_t tv_master_cntl = 0;
761 bool is_tv; 762 bool is_tv;
762 DRM_DEBUG("\n"); 763 DRM_DEBUG_KMS("\n");
763 764
764 is_tv = radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT ? true : false; 765 is_tv = radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT ? true : false;
765 766
@@ -877,7 +878,7 @@ static void radeon_legacy_tv_dac_mode_set(struct drm_encoder *encoder,
877 uint32_t disp_hw_debug = 0, fp2_gen_cntl = 0, disp_tv_out_cntl = 0; 878 uint32_t disp_hw_debug = 0, fp2_gen_cntl = 0, disp_tv_out_cntl = 0;
878 bool is_tv = false; 879 bool is_tv = false;
879 880
880 DRM_DEBUG("\n"); 881 DRM_DEBUG_KMS("\n");
881 882
882 is_tv = radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT ? true : false; 883 is_tv = radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT ? true : false;
883 884
@@ -1074,10 +1075,10 @@ static bool r300_legacy_tv_detect(struct drm_encoder *encoder,
1074 tmp = RREG32(RADEON_TV_DAC_CNTL); 1075 tmp = RREG32(RADEON_TV_DAC_CNTL);
1075 if ((tmp & RADEON_TV_DAC_GDACDET) != 0) { 1076 if ((tmp & RADEON_TV_DAC_GDACDET) != 0) {
1076 found = true; 1077 found = true;
1077 DRM_DEBUG("S-video TV connection detected\n"); 1078 DRM_DEBUG_KMS("S-video TV connection detected\n");
1078 } else if ((tmp & RADEON_TV_DAC_BDACDET) != 0) { 1079 } else if ((tmp & RADEON_TV_DAC_BDACDET) != 0) {
1079 found = true; 1080 found = true;
1080 DRM_DEBUG("Composite TV connection detected\n"); 1081 DRM_DEBUG_KMS("Composite TV connection detected\n");
1081 } 1082 }
1082 1083
1083 WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); 1084 WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);
@@ -1140,10 +1141,10 @@ static bool radeon_legacy_tv_detect(struct drm_encoder *encoder,
1140 tmp = RREG32(RADEON_TV_DAC_CNTL); 1141 tmp = RREG32(RADEON_TV_DAC_CNTL);
1141 if (tmp & RADEON_TV_DAC_GDACDET) { 1142 if (tmp & RADEON_TV_DAC_GDACDET) {
1142 found = true; 1143 found = true;
1143 DRM_DEBUG("S-video TV connection detected\n"); 1144 DRM_DEBUG_KMS("S-video TV connection detected\n");
1144 } else if ((tmp & RADEON_TV_DAC_BDACDET) != 0) { 1145 } else if ((tmp & RADEON_TV_DAC_BDACDET) != 0) {
1145 found = true; 1146 found = true;
1146 DRM_DEBUG("Composite TV connection detected\n"); 1147 DRM_DEBUG_KMS("Composite TV connection detected\n");
1147 } 1148 }
1148 1149
1149 WREG32(RADEON_TV_PRE_DAC_MUX_CNTL, tv_pre_dac_mux_cntl); 1150 WREG32(RADEON_TV_PRE_DAC_MUX_CNTL, tv_pre_dac_mux_cntl);
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_tv.c b/drivers/gpu/drm/radeon/radeon_legacy_tv.c
index f2ed27c8055b..c7b6cb428d09 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_tv.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_tv.c
@@ -496,7 +496,7 @@ static bool radeon_legacy_tv_init_restarts(struct drm_encoder *encoder)
496 496
497 restart -= v_offset + h_offset; 497 restart -= v_offset + h_offset;
498 498
499 DRM_DEBUG("compute_restarts: def = %u h = %d v = %d, p1 = %04x, p2 = %04x, restart = %d\n", 499 DRM_DEBUG_KMS("compute_restarts: def = %u h = %d v = %d, p1 = %04x, p2 = %04x, restart = %d\n",
500 const_ptr->def_restart, tv_dac->h_pos, tv_dac->v_pos, p1, p2, restart); 500 const_ptr->def_restart, tv_dac->h_pos, tv_dac->v_pos, p1, p2, restart);
501 501
502 tv_dac->tv.hrestart = restart % h_total; 502 tv_dac->tv.hrestart = restart % h_total;
@@ -505,7 +505,7 @@ static bool radeon_legacy_tv_init_restarts(struct drm_encoder *encoder)
505 restart /= v_total; 505 restart /= v_total;
506 tv_dac->tv.frestart = restart % f_total; 506 tv_dac->tv.frestart = restart % f_total;
507 507
508 DRM_DEBUG("compute_restart: F/H/V=%u,%u,%u\n", 508 DRM_DEBUG_KMS("compute_restart: F/H/V=%u,%u,%u\n",
509 (unsigned)tv_dac->tv.frestart, 509 (unsigned)tv_dac->tv.frestart,
510 (unsigned)tv_dac->tv.vrestart, 510 (unsigned)tv_dac->tv.vrestart,
511 (unsigned)tv_dac->tv.hrestart); 511 (unsigned)tv_dac->tv.hrestart);
@@ -523,7 +523,7 @@ static bool radeon_legacy_tv_init_restarts(struct drm_encoder *encoder)
523 tv_dac->tv.timing_cntl = (tv_dac->tv.timing_cntl & ~RADEON_H_INC_MASK) | 523 tv_dac->tv.timing_cntl = (tv_dac->tv.timing_cntl & ~RADEON_H_INC_MASK) |
524 ((u32)h_inc << RADEON_H_INC_SHIFT); 524 ((u32)h_inc << RADEON_H_INC_SHIFT);
525 525
526 DRM_DEBUG("compute_restart: h_size = %d h_inc = %d\n", tv_dac->h_size, h_inc); 526 DRM_DEBUG_KMS("compute_restart: h_size = %d h_inc = %d\n", tv_dac->h_size, h_inc);
527 527
528 return h_changed; 528 return h_changed;
529} 529}
@@ -642,8 +642,8 @@ void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
642 } 642 }
643 flicker_removal = (tmp + 500) / 1000; 643 flicker_removal = (tmp + 500) / 1000;
644 644
645 if (flicker_removal < 2) 645 if (flicker_removal < 3)
646 flicker_removal = 2; 646 flicker_removal = 3;
647 for (i = 0; i < ARRAY_SIZE(SLOPE_limit); ++i) { 647 for (i = 0; i < ARRAY_SIZE(SLOPE_limit); ++i) {
648 if (flicker_removal == SLOPE_limit[i]) 648 if (flicker_removal == SLOPE_limit[i])
649 break; 649 break;
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 95696aa57ac8..71aea4037e90 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -66,6 +66,12 @@ enum radeon_tv_std {
66 TV_STD_PAL_N, 66 TV_STD_PAL_N,
67}; 67};
68 68
69enum radeon_underscan_type {
70 UNDERSCAN_OFF,
71 UNDERSCAN_ON,
72 UNDERSCAN_AUTO,
73};
74
69enum radeon_hpd_id { 75enum radeon_hpd_id {
70 RADEON_HPD_1 = 0, 76 RADEON_HPD_1 = 0,
71 RADEON_HPD_2, 77 RADEON_HPD_2,
@@ -226,10 +232,12 @@ struct radeon_mode_info {
226 struct drm_property *coherent_mode_property; 232 struct drm_property *coherent_mode_property;
227 /* DAC enable load detect */ 233 /* DAC enable load detect */
228 struct drm_property *load_detect_property; 234 struct drm_property *load_detect_property;
229 /* TV standard load detect */ 235 /* TV standard */
230 struct drm_property *tv_std_property; 236 struct drm_property *tv_std_property;
231 /* legacy TMDS PLL detect */ 237 /* legacy TMDS PLL detect */
232 struct drm_property *tmds_pll_property; 238 struct drm_property *tmds_pll_property;
239 /* underscan */
240 struct drm_property *underscan_property;
233 /* hardcoded DFP edid from BIOS */ 241 /* hardcoded DFP edid from BIOS */
234 struct edid *bios_hardcoded_edid; 242 struct edid *bios_hardcoded_edid;
235 243
@@ -266,6 +274,8 @@ struct radeon_crtc {
266 uint32_t legacy_display_base_addr; 274 uint32_t legacy_display_base_addr;
267 uint32_t legacy_cursor_offset; 275 uint32_t legacy_cursor_offset;
268 enum radeon_rmx_type rmx_type; 276 enum radeon_rmx_type rmx_type;
277 u8 h_border;
278 u8 v_border;
269 fixed20_12 vsc; 279 fixed20_12 vsc;
270 fixed20_12 hsc; 280 fixed20_12 hsc;
271 struct drm_display_mode native_mode; 281 struct drm_display_mode native_mode;
@@ -354,6 +364,7 @@ struct radeon_encoder {
354 uint32_t flags; 364 uint32_t flags;
355 uint32_t pixel_clock; 365 uint32_t pixel_clock;
356 enum radeon_rmx_type rmx_type; 366 enum radeon_rmx_type rmx_type;
367 enum radeon_underscan_type underscan_type;
357 struct drm_display_mode native_mode; 368 struct drm_display_mode native_mode;
358 void *enc_priv; 369 void *enc_priv;
359 int audio_polling_active; 370 int audio_polling_active;
@@ -392,7 +403,7 @@ struct radeon_connector {
392 uint32_t connector_id; 403 uint32_t connector_id;
393 uint32_t devices; 404 uint32_t devices;
394 struct radeon_i2c_chan *ddc_bus; 405 struct radeon_i2c_chan *ddc_bus;
395 /* some systems have a an hdmi and vga port with a shared ddc line */ 406 /* some systems have an hdmi and vga port with a shared ddc line */
396 bool shared_ddc; 407 bool shared_ddc;
397 bool use_digital; 408 bool use_digital;
398 /* we need to mind the EDID between detect 409 /* we need to mind the EDID between detect
@@ -414,6 +425,9 @@ radeon_combios_get_tv_info(struct radeon_device *rdev);
414extern enum radeon_tv_std 425extern enum radeon_tv_std
415radeon_atombios_get_tv_info(struct radeon_device *rdev); 426radeon_atombios_get_tv_info(struct radeon_device *rdev);
416 427
428extern struct drm_connector *
429radeon_get_connector_for_encoder(struct drm_encoder *encoder);
430
417extern void radeon_connector_hotplug(struct drm_connector *connector); 431extern void radeon_connector_hotplug(struct drm_connector *connector);
418extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector); 432extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
419extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector, 433extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector,
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index d5b9373ce06c..0afd1e62347d 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -110,6 +110,7 @@ int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj,
110 bo->surface_reg = -1; 110 bo->surface_reg = -1;
111 INIT_LIST_HEAD(&bo->list); 111 INIT_LIST_HEAD(&bo->list);
112 112
113retry:
113 radeon_ttm_placement_from_domain(bo, domain); 114 radeon_ttm_placement_from_domain(bo, domain);
114 /* Kernel allocation are uninterruptible */ 115 /* Kernel allocation are uninterruptible */
115 mutex_lock(&rdev->vram_mutex); 116 mutex_lock(&rdev->vram_mutex);
@@ -118,10 +119,15 @@ int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj,
118 &radeon_ttm_bo_destroy); 119 &radeon_ttm_bo_destroy);
119 mutex_unlock(&rdev->vram_mutex); 120 mutex_unlock(&rdev->vram_mutex);
120 if (unlikely(r != 0)) { 121 if (unlikely(r != 0)) {
121 if (r != -ERESTARTSYS) 122 if (r != -ERESTARTSYS) {
123 if (domain == RADEON_GEM_DOMAIN_VRAM) {
124 domain |= RADEON_GEM_DOMAIN_GTT;
125 goto retry;
126 }
122 dev_err(rdev->dev, 127 dev_err(rdev->dev,
123 "object_init failed for (%lu, 0x%08X)\n", 128 "object_init failed for (%lu, 0x%08X)\n",
124 size, domain); 129 size, domain);
130 }
125 return r; 131 return r;
126 } 132 }
127 *bo_ptr = bo; 133 *bo_ptr = bo;
@@ -321,6 +327,7 @@ int radeon_bo_list_validate(struct list_head *head)
321{ 327{
322 struct radeon_bo_list *lobj; 328 struct radeon_bo_list *lobj;
323 struct radeon_bo *bo; 329 struct radeon_bo *bo;
330 u32 domain;
324 int r; 331 int r;
325 332
326 list_for_each_entry(lobj, head, list) { 333 list_for_each_entry(lobj, head, list) {
@@ -333,17 +340,19 @@ int radeon_bo_list_validate(struct list_head *head)
333 list_for_each_entry(lobj, head, list) { 340 list_for_each_entry(lobj, head, list) {
334 bo = lobj->bo; 341 bo = lobj->bo;
335 if (!bo->pin_count) { 342 if (!bo->pin_count) {
336 if (lobj->wdomain) { 343 domain = lobj->wdomain ? lobj->wdomain : lobj->rdomain;
337 radeon_ttm_placement_from_domain(bo, 344
338 lobj->wdomain); 345 retry:
339 } else { 346 radeon_ttm_placement_from_domain(bo, domain);
340 radeon_ttm_placement_from_domain(bo,
341 lobj->rdomain);
342 }
343 r = ttm_bo_validate(&bo->tbo, &bo->placement, 347 r = ttm_bo_validate(&bo->tbo, &bo->placement,
344 true, false, false); 348 true, false, false);
345 if (unlikely(r)) 349 if (unlikely(r)) {
350 if (r != -ERESTARTSYS && domain == RADEON_GEM_DOMAIN_VRAM) {
351 domain |= RADEON_GEM_DOMAIN_GTT;
352 goto retry;
353 }
346 return r; 354 return r;
355 }
347 } 356 }
348 lobj->gpu_offset = radeon_bo_gpu_offset(bo); 357 lobj->gpu_offset = radeon_bo_gpu_offset(bo);
349 lobj->tiling_flags = bo->tiling_flags; 358 lobj->tiling_flags = bo->tiling_flags;
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index 115d26b762cc..95f8b3a3c43d 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -27,6 +27,8 @@
27#include <linux/acpi.h> 27#include <linux/acpi.h>
28#endif 28#endif
29#include <linux/power_supply.h> 29#include <linux/power_supply.h>
30#include <linux/hwmon.h>
31#include <linux/hwmon-sysfs.h>
30 32
31#define RADEON_IDLE_LOOP_MS 100 33#define RADEON_IDLE_LOOP_MS 100
32#define RADEON_RECLOCK_DELAY_MS 200 34#define RADEON_RECLOCK_DELAY_MS 200
@@ -60,9 +62,9 @@ static int radeon_acpi_event(struct notifier_block *nb,
60 62
61 if (strcmp(entry->device_class, ACPI_AC_CLASS) == 0) { 63 if (strcmp(entry->device_class, ACPI_AC_CLASS) == 0) {
62 if (power_supply_is_system_supplied() > 0) 64 if (power_supply_is_system_supplied() > 0)
63 DRM_DEBUG("pm: AC\n"); 65 DRM_DEBUG_DRIVER("pm: AC\n");
64 else 66 else
65 DRM_DEBUG("pm: DC\n"); 67 DRM_DEBUG_DRIVER("pm: DC\n");
66 68
67 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { 69 if (rdev->pm.pm_method == PM_METHOD_PROFILE) {
68 if (rdev->pm.profile == PM_PROFILE_AUTO) { 70 if (rdev->pm.profile == PM_PROFILE_AUTO) {
@@ -196,7 +198,7 @@ static void radeon_set_power_state(struct radeon_device *rdev)
196 radeon_set_engine_clock(rdev, sclk); 198 radeon_set_engine_clock(rdev, sclk);
197 radeon_pm_debug_check_in_vbl(rdev, true); 199 radeon_pm_debug_check_in_vbl(rdev, true);
198 rdev->pm.current_sclk = sclk; 200 rdev->pm.current_sclk = sclk;
199 DRM_DEBUG("Setting: e: %d\n", sclk); 201 DRM_DEBUG_DRIVER("Setting: e: %d\n", sclk);
200 } 202 }
201 203
202 /* set memory clock */ 204 /* set memory clock */
@@ -205,7 +207,7 @@ static void radeon_set_power_state(struct radeon_device *rdev)
205 radeon_set_memory_clock(rdev, mclk); 207 radeon_set_memory_clock(rdev, mclk);
206 radeon_pm_debug_check_in_vbl(rdev, true); 208 radeon_pm_debug_check_in_vbl(rdev, true);
207 rdev->pm.current_mclk = mclk; 209 rdev->pm.current_mclk = mclk;
208 DRM_DEBUG("Setting: m: %d\n", mclk); 210 DRM_DEBUG_DRIVER("Setting: m: %d\n", mclk);
209 } 211 }
210 212
211 if (misc_after) 213 if (misc_after)
@@ -217,7 +219,7 @@ static void radeon_set_power_state(struct radeon_device *rdev)
217 rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index; 219 rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index;
218 rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index; 220 rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index;
219 } else 221 } else
220 DRM_DEBUG("pm: GUI not idle!!!\n"); 222 DRM_DEBUG_DRIVER("pm: GUI not idle!!!\n");
221} 223}
222 224
223static void radeon_pm_set_clocks(struct radeon_device *rdev) 225static void radeon_pm_set_clocks(struct radeon_device *rdev)
@@ -292,27 +294,27 @@ static void radeon_pm_print_states(struct radeon_device *rdev)
292 struct radeon_power_state *power_state; 294 struct radeon_power_state *power_state;
293 struct radeon_pm_clock_info *clock_info; 295 struct radeon_pm_clock_info *clock_info;
294 296
295 DRM_DEBUG("%d Power State(s)\n", rdev->pm.num_power_states); 297 DRM_DEBUG_DRIVER("%d Power State(s)\n", rdev->pm.num_power_states);
296 for (i = 0; i < rdev->pm.num_power_states; i++) { 298 for (i = 0; i < rdev->pm.num_power_states; i++) {
297 power_state = &rdev->pm.power_state[i]; 299 power_state = &rdev->pm.power_state[i];
298 DRM_DEBUG("State %d: %s\n", i, 300 DRM_DEBUG_DRIVER("State %d: %s\n", i,
299 radeon_pm_state_type_name[power_state->type]); 301 radeon_pm_state_type_name[power_state->type]);
300 if (i == rdev->pm.default_power_state_index) 302 if (i == rdev->pm.default_power_state_index)
301 DRM_DEBUG("\tDefault"); 303 DRM_DEBUG_DRIVER("\tDefault");
302 if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP)) 304 if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP))
303 DRM_DEBUG("\t%d PCIE Lanes\n", power_state->pcie_lanes); 305 DRM_DEBUG_DRIVER("\t%d PCIE Lanes\n", power_state->pcie_lanes);
304 if (power_state->flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY) 306 if (power_state->flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY)
305 DRM_DEBUG("\tSingle display only\n"); 307 DRM_DEBUG_DRIVER("\tSingle display only\n");
306 DRM_DEBUG("\t%d Clock Mode(s)\n", power_state->num_clock_modes); 308 DRM_DEBUG_DRIVER("\t%d Clock Mode(s)\n", power_state->num_clock_modes);
307 for (j = 0; j < power_state->num_clock_modes; j++) { 309 for (j = 0; j < power_state->num_clock_modes; j++) {
308 clock_info = &(power_state->clock_info[j]); 310 clock_info = &(power_state->clock_info[j]);
309 if (rdev->flags & RADEON_IS_IGP) 311 if (rdev->flags & RADEON_IS_IGP)
310 DRM_DEBUG("\t\t%d e: %d%s\n", 312 DRM_DEBUG_DRIVER("\t\t%d e: %d%s\n",
311 j, 313 j,
312 clock_info->sclk * 10, 314 clock_info->sclk * 10,
313 clock_info->flags & RADEON_PM_MODE_NO_DISPLAY ? "\tNo display only" : ""); 315 clock_info->flags & RADEON_PM_MODE_NO_DISPLAY ? "\tNo display only" : "");
314 else 316 else
315 DRM_DEBUG("\t\t%d e: %d\tm: %d\tv: %d%s\n", 317 DRM_DEBUG_DRIVER("\t\t%d e: %d\tm: %d\tv: %d%s\n",
316 j, 318 j,
317 clock_info->sclk * 10, 319 clock_info->sclk * 10,
318 clock_info->mclk * 10, 320 clock_info->mclk * 10,
@@ -333,6 +335,7 @@ static ssize_t radeon_get_pm_profile(struct device *dev,
333 return snprintf(buf, PAGE_SIZE, "%s\n", 335 return snprintf(buf, PAGE_SIZE, "%s\n",
334 (cp == PM_PROFILE_AUTO) ? "auto" : 336 (cp == PM_PROFILE_AUTO) ? "auto" :
335 (cp == PM_PROFILE_LOW) ? "low" : 337 (cp == PM_PROFILE_LOW) ? "low" :
338 (cp == PM_PROFILE_MID) ? "mid" :
336 (cp == PM_PROFILE_HIGH) ? "high" : "default"); 339 (cp == PM_PROFILE_HIGH) ? "high" : "default");
337} 340}
338 341
@@ -423,6 +426,82 @@ fail:
423static DEVICE_ATTR(power_profile, S_IRUGO | S_IWUSR, radeon_get_pm_profile, radeon_set_pm_profile); 426static DEVICE_ATTR(power_profile, S_IRUGO | S_IWUSR, radeon_get_pm_profile, radeon_set_pm_profile);
424static DEVICE_ATTR(power_method, S_IRUGO | S_IWUSR, radeon_get_pm_method, radeon_set_pm_method); 427static DEVICE_ATTR(power_method, S_IRUGO | S_IWUSR, radeon_get_pm_method, radeon_set_pm_method);
425 428
429static ssize_t radeon_hwmon_show_temp(struct device *dev,
430 struct device_attribute *attr,
431 char *buf)
432{
433 struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev));
434 struct radeon_device *rdev = ddev->dev_private;
435 u32 temp;
436
437 switch (rdev->pm.int_thermal_type) {
438 case THERMAL_TYPE_RV6XX:
439 temp = rv6xx_get_temp(rdev);
440 break;
441 case THERMAL_TYPE_RV770:
442 temp = rv770_get_temp(rdev);
443 break;
444 case THERMAL_TYPE_EVERGREEN:
445 temp = evergreen_get_temp(rdev);
446 break;
447 default:
448 temp = 0;
449 break;
450 }
451
452 return snprintf(buf, PAGE_SIZE, "%d\n", temp);
453}
454
455static ssize_t radeon_hwmon_show_name(struct device *dev,
456 struct device_attribute *attr,
457 char *buf)
458{
459 return sprintf(buf, "radeon\n");
460}
461
462static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, radeon_hwmon_show_temp, NULL, 0);
463static SENSOR_DEVICE_ATTR(name, S_IRUGO, radeon_hwmon_show_name, NULL, 0);
464
465static struct attribute *hwmon_attributes[] = {
466 &sensor_dev_attr_temp1_input.dev_attr.attr,
467 &sensor_dev_attr_name.dev_attr.attr,
468 NULL
469};
470
471static const struct attribute_group hwmon_attrgroup = {
472 .attrs = hwmon_attributes,
473};
474
475static void radeon_hwmon_init(struct radeon_device *rdev)
476{
477 int err;
478
479 rdev->pm.int_hwmon_dev = NULL;
480
481 switch (rdev->pm.int_thermal_type) {
482 case THERMAL_TYPE_RV6XX:
483 case THERMAL_TYPE_RV770:
484 case THERMAL_TYPE_EVERGREEN:
485 rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev);
486 dev_set_drvdata(rdev->pm.int_hwmon_dev, rdev->ddev);
487 err = sysfs_create_group(&rdev->pm.int_hwmon_dev->kobj,
488 &hwmon_attrgroup);
489 if (err)
490 DRM_ERROR("Unable to create hwmon sysfs file: %d\n", err);
491 break;
492 default:
493 break;
494 }
495}
496
497static void radeon_hwmon_fini(struct radeon_device *rdev)
498{
499 if (rdev->pm.int_hwmon_dev) {
500 sysfs_remove_group(&rdev->pm.int_hwmon_dev->kobj, &hwmon_attrgroup);
501 hwmon_device_unregister(rdev->pm.int_hwmon_dev);
502 }
503}
504
426void radeon_pm_suspend(struct radeon_device *rdev) 505void radeon_pm_suspend(struct radeon_device *rdev)
427{ 506{
428 bool flush_wq = false; 507 bool flush_wq = false;
@@ -470,6 +549,7 @@ int radeon_pm_init(struct radeon_device *rdev)
470 rdev->pm.dynpm_can_downclock = true; 549 rdev->pm.dynpm_can_downclock = true;
471 rdev->pm.current_sclk = rdev->clock.default_sclk; 550 rdev->pm.current_sclk = rdev->clock.default_sclk;
472 rdev->pm.current_mclk = rdev->clock.default_mclk; 551 rdev->pm.current_mclk = rdev->clock.default_mclk;
552 rdev->pm.int_thermal_type = THERMAL_TYPE_NONE;
473 553
474 if (rdev->bios) { 554 if (rdev->bios) {
475 if (rdev->is_atom_bios) 555 if (rdev->is_atom_bios)
@@ -480,6 +560,8 @@ int radeon_pm_init(struct radeon_device *rdev)
480 radeon_pm_init_profile(rdev); 560 radeon_pm_init_profile(rdev);
481 } 561 }
482 562
563 /* set up the internal thermal sensor if applicable */
564 radeon_hwmon_init(rdev);
483 if (rdev->pm.num_power_states > 1) { 565 if (rdev->pm.num_power_states > 1) {
484 /* where's the best place to put these? */ 566 /* where's the best place to put these? */
485 ret = device_create_file(rdev->dev, &dev_attr_power_profile); 567 ret = device_create_file(rdev->dev, &dev_attr_power_profile);
@@ -535,6 +617,7 @@ void radeon_pm_fini(struct radeon_device *rdev)
535#endif 617#endif
536 } 618 }
537 619
620 radeon_hwmon_fini(rdev);
538 if (rdev->pm.i2c_bus) 621 if (rdev->pm.i2c_bus)
539 radeon_i2c_destroy(rdev->pm.i2c_bus); 622 radeon_i2c_destroy(rdev->pm.i2c_bus);
540} 623}
@@ -575,7 +658,7 @@ void radeon_pm_compute_clocks(struct radeon_device *rdev)
575 radeon_pm_get_dynpm_state(rdev); 658 radeon_pm_get_dynpm_state(rdev);
576 radeon_pm_set_clocks(rdev); 659 radeon_pm_set_clocks(rdev);
577 660
578 DRM_DEBUG("radeon: dynamic power management deactivated\n"); 661 DRM_DEBUG_DRIVER("radeon: dynamic power management deactivated\n");
579 } 662 }
580 } else if (rdev->pm.active_crtc_count == 1) { 663 } else if (rdev->pm.active_crtc_count == 1) {
581 /* TODO: Increase clocks if needed for current mode */ 664 /* TODO: Increase clocks if needed for current mode */
@@ -592,7 +675,7 @@ void radeon_pm_compute_clocks(struct radeon_device *rdev)
592 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; 675 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE;
593 queue_delayed_work(rdev->wq, &rdev->pm.dynpm_idle_work, 676 queue_delayed_work(rdev->wq, &rdev->pm.dynpm_idle_work,
594 msecs_to_jiffies(RADEON_IDLE_LOOP_MS)); 677 msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
595 DRM_DEBUG("radeon: dynamic power management activated\n"); 678 DRM_DEBUG_DRIVER("radeon: dynamic power management activated\n");
596 } 679 }
597 } else { /* count == 0 */ 680 } else { /* count == 0 */
598 if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) { 681 if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) {
@@ -688,7 +771,7 @@ static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish
688 bool in_vbl = radeon_pm_in_vbl(rdev); 771 bool in_vbl = radeon_pm_in_vbl(rdev);
689 772
690 if (in_vbl == false) 773 if (in_vbl == false)
691 DRM_DEBUG("not in vbl for pm change %08x at %s\n", stat_crtc, 774 DRM_DEBUG_DRIVER("not in vbl for pm change %08x at %s\n", stat_crtc,
692 finish ? "exit" : "entry"); 775 finish ? "exit" : "entry");
693 return in_vbl; 776 return in_vbl;
694} 777}
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index e9918d88f5b0..84c53e41a88f 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -59,28 +59,28 @@ static struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
59/* 59/*
60 * Global memory. 60 * Global memory.
61 */ 61 */
62static int radeon_ttm_mem_global_init(struct ttm_global_reference *ref) 62static int radeon_ttm_mem_global_init(struct drm_global_reference *ref)
63{ 63{
64 return ttm_mem_global_init(ref->object); 64 return ttm_mem_global_init(ref->object);
65} 65}
66 66
67static void radeon_ttm_mem_global_release(struct ttm_global_reference *ref) 67static void radeon_ttm_mem_global_release(struct drm_global_reference *ref)
68{ 68{
69 ttm_mem_global_release(ref->object); 69 ttm_mem_global_release(ref->object);
70} 70}
71 71
72static int radeon_ttm_global_init(struct radeon_device *rdev) 72static int radeon_ttm_global_init(struct radeon_device *rdev)
73{ 73{
74 struct ttm_global_reference *global_ref; 74 struct drm_global_reference *global_ref;
75 int r; 75 int r;
76 76
77 rdev->mman.mem_global_referenced = false; 77 rdev->mman.mem_global_referenced = false;
78 global_ref = &rdev->mman.mem_global_ref; 78 global_ref = &rdev->mman.mem_global_ref;
79 global_ref->global_type = TTM_GLOBAL_TTM_MEM; 79 global_ref->global_type = DRM_GLOBAL_TTM_MEM;
80 global_ref->size = sizeof(struct ttm_mem_global); 80 global_ref->size = sizeof(struct ttm_mem_global);
81 global_ref->init = &radeon_ttm_mem_global_init; 81 global_ref->init = &radeon_ttm_mem_global_init;
82 global_ref->release = &radeon_ttm_mem_global_release; 82 global_ref->release = &radeon_ttm_mem_global_release;
83 r = ttm_global_item_ref(global_ref); 83 r = drm_global_item_ref(global_ref);
84 if (r != 0) { 84 if (r != 0) {
85 DRM_ERROR("Failed setting up TTM memory accounting " 85 DRM_ERROR("Failed setting up TTM memory accounting "
86 "subsystem.\n"); 86 "subsystem.\n");
@@ -90,14 +90,14 @@ static int radeon_ttm_global_init(struct radeon_device *rdev)
90 rdev->mman.bo_global_ref.mem_glob = 90 rdev->mman.bo_global_ref.mem_glob =
91 rdev->mman.mem_global_ref.object; 91 rdev->mman.mem_global_ref.object;
92 global_ref = &rdev->mman.bo_global_ref.ref; 92 global_ref = &rdev->mman.bo_global_ref.ref;
93 global_ref->global_type = TTM_GLOBAL_TTM_BO; 93 global_ref->global_type = DRM_GLOBAL_TTM_BO;
94 global_ref->size = sizeof(struct ttm_bo_global); 94 global_ref->size = sizeof(struct ttm_bo_global);
95 global_ref->init = &ttm_bo_global_init; 95 global_ref->init = &ttm_bo_global_init;
96 global_ref->release = &ttm_bo_global_release; 96 global_ref->release = &ttm_bo_global_release;
97 r = ttm_global_item_ref(global_ref); 97 r = drm_global_item_ref(global_ref);
98 if (r != 0) { 98 if (r != 0) {
99 DRM_ERROR("Failed setting up TTM BO subsystem.\n"); 99 DRM_ERROR("Failed setting up TTM BO subsystem.\n");
100 ttm_global_item_unref(&rdev->mman.mem_global_ref); 100 drm_global_item_unref(&rdev->mman.mem_global_ref);
101 return r; 101 return r;
102 } 102 }
103 103
@@ -108,8 +108,8 @@ static int radeon_ttm_global_init(struct radeon_device *rdev)
108static void radeon_ttm_global_fini(struct radeon_device *rdev) 108static void radeon_ttm_global_fini(struct radeon_device *rdev)
109{ 109{
110 if (rdev->mman.mem_global_referenced) { 110 if (rdev->mman.mem_global_referenced) {
111 ttm_global_item_unref(&rdev->mman.bo_global_ref.ref); 111 drm_global_item_unref(&rdev->mman.bo_global_ref.ref);
112 ttm_global_item_unref(&rdev->mman.mem_global_ref); 112 drm_global_item_unref(&rdev->mman.mem_global_ref);
113 rdev->mman.mem_global_referenced = false; 113 rdev->mman.mem_global_referenced = false;
114 } 114 }
115} 115}
diff --git a/drivers/gpu/drm/radeon/reg_srcs/r300 b/drivers/gpu/drm/radeon/reg_srcs/r300
index 1e97b2d129fd..b506ec1cab4b 100644
--- a/drivers/gpu/drm/radeon/reg_srcs/r300
+++ b/drivers/gpu/drm/radeon/reg_srcs/r300
@@ -187,7 +187,6 @@ r300 0x4f60
1870x4364 RS_INST_13 1870x4364 RS_INST_13
1880x4368 RS_INST_14 1880x4368 RS_INST_14
1890x436C RS_INST_15 1890x436C RS_INST_15
1900x43A4 SC_HYPERZ_EN
1910x43A8 SC_EDGERULE 1900x43A8 SC_EDGERULE
1920x43B0 SC_CLIP_0_A 1910x43B0 SC_CLIP_0_A
1930x43B4 SC_CLIP_0_B 1920x43B4 SC_CLIP_0_B
@@ -716,16 +715,4 @@ r300 0x4f60
7160x4F08 ZB_STENCILREFMASK 7150x4F08 ZB_STENCILREFMASK
7170x4F14 ZB_ZTOP 7160x4F14 ZB_ZTOP
7180x4F18 ZB_ZCACHE_CTLSTAT 7170x4F18 ZB_ZCACHE_CTLSTAT
7190x4F1C ZB_BW_CNTL
7200x4F28 ZB_DEPTHCLEARVALUE
7210x4F30 ZB_ZMASK_OFFSET
7220x4F34 ZB_ZMASK_PITCH
7230x4F38 ZB_ZMASK_WRINDEX
7240x4F3C ZB_ZMASK_DWORD
7250x4F40 ZB_ZMASK_RDINDEX
7260x4F44 ZB_HIZ_OFFSET
7270x4F48 ZB_HIZ_WRINDEX
7280x4F4C ZB_HIZ_DWORD
7290x4F50 ZB_HIZ_RDINDEX
7300x4F54 ZB_HIZ_PITCH
7310x4F58 ZB_ZPASS_DATA 7180x4F58 ZB_ZPASS_DATA
diff --git a/drivers/gpu/drm/radeon/reg_srcs/r420 b/drivers/gpu/drm/radeon/reg_srcs/r420
index e958980d00f1..8c1214c2390f 100644
--- a/drivers/gpu/drm/radeon/reg_srcs/r420
+++ b/drivers/gpu/drm/radeon/reg_srcs/r420
@@ -130,6 +130,7 @@ r420 0x4f60
1300x401C GB_SELECT 1300x401C GB_SELECT
1310x4020 GB_AA_CONFIG 1310x4020 GB_AA_CONFIG
1320x4024 GB_FIFO_SIZE 1320x4024 GB_FIFO_SIZE
1330x4028 GB_Z_PEQ_CONFIG
1330x4100 TX_INVALTAGS 1340x4100 TX_INVALTAGS
1340x4200 GA_POINT_S0 1350x4200 GA_POINT_S0
1350x4204 GA_POINT_T0 1360x4204 GA_POINT_T0
@@ -187,7 +188,6 @@ r420 0x4f60
1870x4364 RS_INST_13 1880x4364 RS_INST_13
1880x4368 RS_INST_14 1890x4368 RS_INST_14
1890x436C RS_INST_15 1900x436C RS_INST_15
1900x43A4 SC_HYPERZ_EN
1910x43A8 SC_EDGERULE 1910x43A8 SC_EDGERULE
1920x43B0 SC_CLIP_0_A 1920x43B0 SC_CLIP_0_A
1930x43B4 SC_CLIP_0_B 1930x43B4 SC_CLIP_0_B
@@ -782,16 +782,4 @@ r420 0x4f60
7820x4F08 ZB_STENCILREFMASK 7820x4F08 ZB_STENCILREFMASK
7830x4F14 ZB_ZTOP 7830x4F14 ZB_ZTOP
7840x4F18 ZB_ZCACHE_CTLSTAT 7840x4F18 ZB_ZCACHE_CTLSTAT
7850x4F1C ZB_BW_CNTL
7860x4F28 ZB_DEPTHCLEARVALUE
7870x4F30 ZB_ZMASK_OFFSET
7880x4F34 ZB_ZMASK_PITCH
7890x4F38 ZB_ZMASK_WRINDEX
7900x4F3C ZB_ZMASK_DWORD
7910x4F40 ZB_ZMASK_RDINDEX
7920x4F44 ZB_HIZ_OFFSET
7930x4F48 ZB_HIZ_WRINDEX
7940x4F4C ZB_HIZ_DWORD
7950x4F50 ZB_HIZ_RDINDEX
7960x4F54 ZB_HIZ_PITCH
7970x4F58 ZB_ZPASS_DATA 7850x4F58 ZB_ZPASS_DATA
diff --git a/drivers/gpu/drm/radeon/reg_srcs/rs600 b/drivers/gpu/drm/radeon/reg_srcs/rs600
index 83e8bc0c2bb2..0828d80396f2 100644
--- a/drivers/gpu/drm/radeon/reg_srcs/rs600
+++ b/drivers/gpu/drm/radeon/reg_srcs/rs600
@@ -187,7 +187,6 @@ rs600 0x6d40
1870x4364 RS_INST_13 1870x4364 RS_INST_13
1880x4368 RS_INST_14 1880x4368 RS_INST_14
1890x436C RS_INST_15 1890x436C RS_INST_15
1900x43A4 SC_HYPERZ_EN
1910x43A8 SC_EDGERULE 1900x43A8 SC_EDGERULE
1920x43B0 SC_CLIP_0_A 1910x43B0 SC_CLIP_0_A
1930x43B4 SC_CLIP_0_B 1920x43B4 SC_CLIP_0_B
@@ -782,16 +781,4 @@ rs600 0x6d40
7820x4F08 ZB_STENCILREFMASK 7810x4F08 ZB_STENCILREFMASK
7830x4F14 ZB_ZTOP 7820x4F14 ZB_ZTOP
7840x4F18 ZB_ZCACHE_CTLSTAT 7830x4F18 ZB_ZCACHE_CTLSTAT
7850x4F1C ZB_BW_CNTL
7860x4F28 ZB_DEPTHCLEARVALUE
7870x4F30 ZB_ZMASK_OFFSET
7880x4F34 ZB_ZMASK_PITCH
7890x4F38 ZB_ZMASK_WRINDEX
7900x4F3C ZB_ZMASK_DWORD
7910x4F40 ZB_ZMASK_RDINDEX
7920x4F44 ZB_HIZ_OFFSET
7930x4F48 ZB_HIZ_WRINDEX
7940x4F4C ZB_HIZ_DWORD
7950x4F50 ZB_HIZ_RDINDEX
7960x4F54 ZB_HIZ_PITCH
7970x4F58 ZB_ZPASS_DATA 7840x4F58 ZB_ZPASS_DATA
diff --git a/drivers/gpu/drm/radeon/reg_srcs/rv515 b/drivers/gpu/drm/radeon/reg_srcs/rv515
index 1e46233985eb..8293855f5f0d 100644
--- a/drivers/gpu/drm/radeon/reg_srcs/rv515
+++ b/drivers/gpu/drm/radeon/reg_srcs/rv515
@@ -235,7 +235,6 @@ rv515 0x6d40
2350x4354 RS_INST_13 2350x4354 RS_INST_13
2360x4358 RS_INST_14 2360x4358 RS_INST_14
2370x435C RS_INST_15 2370x435C RS_INST_15
2380x43A4 SC_HYPERZ_EN
2390x43A8 SC_EDGERULE 2380x43A8 SC_EDGERULE
2400x43B0 SC_CLIP_0_A 2390x43B0 SC_CLIP_0_A
2410x43B4 SC_CLIP_0_B 2400x43B4 SC_CLIP_0_B
@@ -479,17 +478,5 @@ rv515 0x6d40
4790x4F08 ZB_STENCILREFMASK 4780x4F08 ZB_STENCILREFMASK
4800x4F14 ZB_ZTOP 4790x4F14 ZB_ZTOP
4810x4F18 ZB_ZCACHE_CTLSTAT 4800x4F18 ZB_ZCACHE_CTLSTAT
4820x4F1C ZB_BW_CNTL
4830x4F28 ZB_DEPTHCLEARVALUE
4840x4F30 ZB_ZMASK_OFFSET
4850x4F34 ZB_ZMASK_PITCH
4860x4F38 ZB_ZMASK_WRINDEX
4870x4F3C ZB_ZMASK_DWORD
4880x4F40 ZB_ZMASK_RDINDEX
4890x4F44 ZB_HIZ_OFFSET
4900x4F48 ZB_HIZ_WRINDEX
4910x4F4C ZB_HIZ_DWORD
4920x4F50 ZB_HIZ_RDINDEX
4930x4F54 ZB_HIZ_PITCH
4940x4F58 ZB_ZPASS_DATA 4810x4F58 ZB_ZPASS_DATA
4950x4FD4 ZB_STENCILREFMASK_BF 4820x4FD4 ZB_STENCILREFMASK_BF
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index 9e4240b3bf0b..ae2b76b9a388 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -55,12 +55,6 @@ void rs400_gart_adjust_size(struct radeon_device *rdev)
55 rdev->mc.gtt_size = 32 * 1024 * 1024; 55 rdev->mc.gtt_size = 32 * 1024 * 1024;
56 return; 56 return;
57 } 57 }
58 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) {
59 /* FIXME: RS400 & RS480 seems to have issue with GART size
60 * if 4G of system memory (needs more testing) */
61 rdev->mc.gtt_size = 32 * 1024 * 1024;
62 DRM_ERROR("Forcing to 32M GART size (because of ASIC bug ?)\n");
63 }
64} 58}
65 59
66void rs400_gart_tlb_flush(struct radeon_device *rdev) 60void rs400_gart_tlb_flush(struct radeon_device *rdev)
@@ -263,6 +257,7 @@ void rs400_mc_init(struct radeon_device *rdev)
263 r100_vram_init_sizes(rdev); 257 r100_vram_init_sizes(rdev);
264 base = (RREG32(RADEON_NB_TOM) & 0xffff) << 16; 258 base = (RREG32(RADEON_NB_TOM) & 0xffff) << 16;
265 radeon_vram_location(rdev, &rdev->mc, base); 259 radeon_vram_location(rdev, &rdev->mc, base);
260 rdev->mc.gtt_base_align = rdev->mc.gtt_size - 1;
266 radeon_gtt_location(rdev, &rdev->mc); 261 radeon_gtt_location(rdev, &rdev->mc);
267 radeon_update_bandwidth_info(rdev); 262 radeon_update_bandwidth_info(rdev);
268} 263}
@@ -480,6 +475,8 @@ int rs400_init(struct radeon_device *rdev)
480 /* Initialize surface registers */ 475 /* Initialize surface registers */
481 radeon_surface_init(rdev); 476 radeon_surface_init(rdev);
482 /* TODO: disable VGA need to use VGA request */ 477 /* TODO: disable VGA need to use VGA request */
478 /* restore some register to sane defaults */
479 r100_restore_sanity(rdev);
483 /* BIOS*/ 480 /* BIOS*/
484 if (!radeon_get_bios(rdev)) { 481 if (!radeon_get_bios(rdev)) {
485 if (ASIC_IS_AVIVO(rdev)) 482 if (ASIC_IS_AVIVO(rdev))
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 7bb4c3e52f3b..cc05b230d7ef 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -686,8 +686,8 @@ void rs600_mc_init(struct radeon_device *rdev)
686{ 686{
687 u64 base; 687 u64 base;
688 688
689 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 689 rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);
690 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); 690 rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);
691 rdev->mc.vram_is_ddr = true; 691 rdev->mc.vram_is_ddr = true;
692 rdev->mc.vram_width = 128; 692 rdev->mc.vram_width = 128;
693 rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE); 693 rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
@@ -696,8 +696,8 @@ void rs600_mc_init(struct radeon_device *rdev)
696 rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); 696 rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
697 base = RREG32_MC(R_000004_MC_FB_LOCATION); 697 base = RREG32_MC(R_000004_MC_FB_LOCATION);
698 base = G_000004_MC_FB_START(base) << 16; 698 base = G_000004_MC_FB_START(base) << 16;
699 rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
700 radeon_vram_location(rdev, &rdev->mc, base); 699 radeon_vram_location(rdev, &rdev->mc, base);
700 rdev->mc.gtt_base_align = 0;
701 radeon_gtt_location(rdev, &rdev->mc); 701 radeon_gtt_location(rdev, &rdev->mc);
702 radeon_update_bandwidth_info(rdev); 702 radeon_update_bandwidth_info(rdev);
703} 703}
@@ -812,6 +812,13 @@ static int rs600_startup(struct radeon_device *rdev)
812 dev_err(rdev->dev, "failled initializing IB (%d).\n", r); 812 dev_err(rdev->dev, "failled initializing IB (%d).\n", r);
813 return r; 813 return r;
814 } 814 }
815
816 r = r600_audio_init(rdev);
817 if (r) {
818 dev_err(rdev->dev, "failed initializing audio\n");
819 return r;
820 }
821
815 return 0; 822 return 0;
816} 823}
817 824
@@ -838,6 +845,7 @@ int rs600_resume(struct radeon_device *rdev)
838 845
839int rs600_suspend(struct radeon_device *rdev) 846int rs600_suspend(struct radeon_device *rdev)
840{ 847{
848 r600_audio_fini(rdev);
841 r100_cp_disable(rdev); 849 r100_cp_disable(rdev);
842 r100_wb_disable(rdev); 850 r100_wb_disable(rdev);
843 rs600_irq_disable(rdev); 851 rs600_irq_disable(rdev);
@@ -847,6 +855,7 @@ int rs600_suspend(struct radeon_device *rdev)
847 855
848void rs600_fini(struct radeon_device *rdev) 856void rs600_fini(struct radeon_device *rdev)
849{ 857{
858 r600_audio_fini(rdev);
850 r100_cp_fini(rdev); 859 r100_cp_fini(rdev);
851 r100_wb_fini(rdev); 860 r100_wb_fini(rdev);
852 r100_ib_fini(rdev); 861 r100_ib_fini(rdev);
@@ -870,6 +879,8 @@ int rs600_init(struct radeon_device *rdev)
870 radeon_scratch_init(rdev); 879 radeon_scratch_init(rdev);
871 /* Initialize surface registers */ 880 /* Initialize surface registers */
872 radeon_surface_init(rdev); 881 radeon_surface_init(rdev);
882 /* restore some register to sane defaults */
883 r100_restore_sanity(rdev);
873 /* BIOS */ 884 /* BIOS */
874 if (!radeon_get_bios(rdev)) { 885 if (!radeon_get_bios(rdev)) {
875 if (ASIC_IS_AVIVO(rdev)) 886 if (ASIC_IS_AVIVO(rdev))
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index f4f0a61bcdce..3e3f75718be3 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -154,14 +154,15 @@ void rs690_mc_init(struct radeon_device *rdev)
154 rdev->mc.vram_width = 128; 154 rdev->mc.vram_width = 128;
155 rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE); 155 rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
156 rdev->mc.mc_vram_size = rdev->mc.real_vram_size; 156 rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
157 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 157 rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);
158 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); 158 rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);
159 rdev->mc.visible_vram_size = rdev->mc.aper_size; 159 rdev->mc.visible_vram_size = rdev->mc.aper_size;
160 base = RREG32_MC(R_000100_MCCFG_FB_LOCATION); 160 base = RREG32_MC(R_000100_MCCFG_FB_LOCATION);
161 base = G_000100_MC_FB_START(base) << 16; 161 base = G_000100_MC_FB_START(base) << 16;
162 rs690_pm_info(rdev);
163 rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); 162 rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
163 rs690_pm_info(rdev);
164 radeon_vram_location(rdev, &rdev->mc, base); 164 radeon_vram_location(rdev, &rdev->mc, base);
165 rdev->mc.gtt_base_align = rdev->mc.gtt_size - 1;
165 radeon_gtt_location(rdev, &rdev->mc); 166 radeon_gtt_location(rdev, &rdev->mc);
166 radeon_update_bandwidth_info(rdev); 167 radeon_update_bandwidth_info(rdev);
167} 168}
@@ -397,7 +398,9 @@ void rs690_bandwidth_update(struct radeon_device *rdev)
397 struct drm_display_mode *mode1 = NULL; 398 struct drm_display_mode *mode1 = NULL;
398 struct rs690_watermark wm0; 399 struct rs690_watermark wm0;
399 struct rs690_watermark wm1; 400 struct rs690_watermark wm1;
400 u32 tmp, d1mode_priority_a_cnt, d2mode_priority_a_cnt; 401 u32 tmp;
402 u32 d1mode_priority_a_cnt = S_006548_D1MODE_PRIORITY_A_OFF(1);
403 u32 d2mode_priority_a_cnt = S_006548_D1MODE_PRIORITY_A_OFF(1);
401 fixed20_12 priority_mark02, priority_mark12, fill_rate; 404 fixed20_12 priority_mark02, priority_mark12, fill_rate;
402 fixed20_12 a, b; 405 fixed20_12 a, b;
403 406
@@ -494,10 +497,6 @@ void rs690_bandwidth_update(struct radeon_device *rdev)
494 d1mode_priority_a_cnt |= S_006548_D1MODE_PRIORITY_A_ALWAYS_ON(1); 497 d1mode_priority_a_cnt |= S_006548_D1MODE_PRIORITY_A_ALWAYS_ON(1);
495 d2mode_priority_a_cnt |= S_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(1); 498 d2mode_priority_a_cnt |= S_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(1);
496 } 499 }
497 WREG32(R_006548_D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
498 WREG32(R_00654C_D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
499 WREG32(R_006D48_D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
500 WREG32(R_006D4C_D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
501 } else if (mode0) { 500 } else if (mode0) {
502 if (dfixed_trunc(wm0.dbpp) > 64) 501 if (dfixed_trunc(wm0.dbpp) > 64)
503 a.full = dfixed_mul(wm0.dbpp, wm0.num_line_pair); 502 a.full = dfixed_mul(wm0.dbpp, wm0.num_line_pair);
@@ -527,13 +526,7 @@ void rs690_bandwidth_update(struct radeon_device *rdev)
527 d1mode_priority_a_cnt = dfixed_trunc(priority_mark02); 526 d1mode_priority_a_cnt = dfixed_trunc(priority_mark02);
528 if (rdev->disp_priority == 2) 527 if (rdev->disp_priority == 2)
529 d1mode_priority_a_cnt |= S_006548_D1MODE_PRIORITY_A_ALWAYS_ON(1); 528 d1mode_priority_a_cnt |= S_006548_D1MODE_PRIORITY_A_ALWAYS_ON(1);
530 WREG32(R_006548_D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt); 529 } else if (mode1) {
531 WREG32(R_00654C_D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
532 WREG32(R_006D48_D2MODE_PRIORITY_A_CNT,
533 S_006D48_D2MODE_PRIORITY_A_OFF(1));
534 WREG32(R_006D4C_D2MODE_PRIORITY_B_CNT,
535 S_006D4C_D2MODE_PRIORITY_B_OFF(1));
536 } else {
537 if (dfixed_trunc(wm1.dbpp) > 64) 530 if (dfixed_trunc(wm1.dbpp) > 64)
538 a.full = dfixed_mul(wm1.dbpp, wm1.num_line_pair); 531 a.full = dfixed_mul(wm1.dbpp, wm1.num_line_pair);
539 else 532 else
@@ -562,13 +555,12 @@ void rs690_bandwidth_update(struct radeon_device *rdev)
562 d2mode_priority_a_cnt = dfixed_trunc(priority_mark12); 555 d2mode_priority_a_cnt = dfixed_trunc(priority_mark12);
563 if (rdev->disp_priority == 2) 556 if (rdev->disp_priority == 2)
564 d2mode_priority_a_cnt |= S_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(1); 557 d2mode_priority_a_cnt |= S_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(1);
565 WREG32(R_006548_D1MODE_PRIORITY_A_CNT,
566 S_006548_D1MODE_PRIORITY_A_OFF(1));
567 WREG32(R_00654C_D1MODE_PRIORITY_B_CNT,
568 S_00654C_D1MODE_PRIORITY_B_OFF(1));
569 WREG32(R_006D48_D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
570 WREG32(R_006D4C_D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
571 } 558 }
559
560 WREG32(R_006548_D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
561 WREG32(R_00654C_D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
562 WREG32(R_006D48_D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
563 WREG32(R_006D4C_D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
572} 564}
573 565
574uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg) 566uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg)
@@ -640,6 +632,13 @@ static int rs690_startup(struct radeon_device *rdev)
640 dev_err(rdev->dev, "failled initializing IB (%d).\n", r); 632 dev_err(rdev->dev, "failled initializing IB (%d).\n", r);
641 return r; 633 return r;
642 } 634 }
635
636 r = r600_audio_init(rdev);
637 if (r) {
638 dev_err(rdev->dev, "failed initializing audio\n");
639 return r;
640 }
641
643 return 0; 642 return 0;
644} 643}
645 644
@@ -666,6 +665,7 @@ int rs690_resume(struct radeon_device *rdev)
666 665
667int rs690_suspend(struct radeon_device *rdev) 666int rs690_suspend(struct radeon_device *rdev)
668{ 667{
668 r600_audio_fini(rdev);
669 r100_cp_disable(rdev); 669 r100_cp_disable(rdev);
670 r100_wb_disable(rdev); 670 r100_wb_disable(rdev);
671 rs600_irq_disable(rdev); 671 rs600_irq_disable(rdev);
@@ -675,6 +675,7 @@ int rs690_suspend(struct radeon_device *rdev)
675 675
676void rs690_fini(struct radeon_device *rdev) 676void rs690_fini(struct radeon_device *rdev)
677{ 677{
678 r600_audio_fini(rdev);
678 r100_cp_fini(rdev); 679 r100_cp_fini(rdev);
679 r100_wb_fini(rdev); 680 r100_wb_fini(rdev);
680 r100_ib_fini(rdev); 681 r100_ib_fini(rdev);
@@ -698,6 +699,8 @@ int rs690_init(struct radeon_device *rdev)
698 radeon_scratch_init(rdev); 699 radeon_scratch_init(rdev);
699 /* Initialize surface registers */ 700 /* Initialize surface registers */
700 radeon_surface_init(rdev); 701 radeon_surface_init(rdev);
702 /* restore some register to sane defaults */
703 r100_restore_sanity(rdev);
701 /* TODO: disable VGA need to use VGA request */ 704 /* TODO: disable VGA need to use VGA request */
702 /* BIOS*/ 705 /* BIOS*/
703 if (!radeon_get_bios(rdev)) { 706 if (!radeon_get_bios(rdev)) {
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 7d9a7b0a180a..4d6e86041a9f 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -195,6 +195,7 @@ void rv515_mc_init(struct radeon_device *rdev)
195 rv515_vram_get_type(rdev); 195 rv515_vram_get_type(rdev);
196 r100_vram_init_sizes(rdev); 196 r100_vram_init_sizes(rdev);
197 radeon_vram_location(rdev, &rdev->mc, 0); 197 radeon_vram_location(rdev, &rdev->mc, 0);
198 rdev->mc.gtt_base_align = 0;
198 if (!(rdev->flags & RADEON_IS_AGP)) 199 if (!(rdev->flags & RADEON_IS_AGP))
199 radeon_gtt_location(rdev, &rdev->mc); 200 radeon_gtt_location(rdev, &rdev->mc);
200 radeon_update_bandwidth_info(rdev); 201 radeon_update_bandwidth_info(rdev);
@@ -468,6 +469,8 @@ int rv515_init(struct radeon_device *rdev)
468 /* Initialize surface registers */ 469 /* Initialize surface registers */
469 radeon_surface_init(rdev); 470 radeon_surface_init(rdev);
470 /* TODO: disable VGA need to use VGA request */ 471 /* TODO: disable VGA need to use VGA request */
472 /* restore some register to sane defaults */
473 r100_restore_sanity(rdev);
471 /* BIOS*/ 474 /* BIOS*/
472 if (!radeon_get_bios(rdev)) { 475 if (!radeon_get_bios(rdev)) {
473 if (ASIC_IS_AVIVO(rdev)) 476 if (ASIC_IS_AVIVO(rdev))
@@ -924,7 +927,9 @@ void rv515_bandwidth_avivo_update(struct radeon_device *rdev)
924 struct drm_display_mode *mode1 = NULL; 927 struct drm_display_mode *mode1 = NULL;
925 struct rv515_watermark wm0; 928 struct rv515_watermark wm0;
926 struct rv515_watermark wm1; 929 struct rv515_watermark wm1;
927 u32 tmp, d1mode_priority_a_cnt, d2mode_priority_a_cnt; 930 u32 tmp;
931 u32 d1mode_priority_a_cnt = MODE_PRIORITY_OFF;
932 u32 d2mode_priority_a_cnt = MODE_PRIORITY_OFF;
928 fixed20_12 priority_mark02, priority_mark12, fill_rate; 933 fixed20_12 priority_mark02, priority_mark12, fill_rate;
929 fixed20_12 a, b; 934 fixed20_12 a, b;
930 935
@@ -998,10 +1003,6 @@ void rv515_bandwidth_avivo_update(struct radeon_device *rdev)
998 d1mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON; 1003 d1mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON;
999 d2mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON; 1004 d2mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON;
1000 } 1005 }
1001 WREG32(D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
1002 WREG32(D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
1003 WREG32(D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
1004 WREG32(D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
1005 } else if (mode0) { 1006 } else if (mode0) {
1006 if (dfixed_trunc(wm0.dbpp) > 64) 1007 if (dfixed_trunc(wm0.dbpp) > 64)
1007 a.full = dfixed_div(wm0.dbpp, wm0.num_line_pair); 1008 a.full = dfixed_div(wm0.dbpp, wm0.num_line_pair);
@@ -1031,11 +1032,7 @@ void rv515_bandwidth_avivo_update(struct radeon_device *rdev)
1031 d1mode_priority_a_cnt = dfixed_trunc(priority_mark02); 1032 d1mode_priority_a_cnt = dfixed_trunc(priority_mark02);
1032 if (rdev->disp_priority == 2) 1033 if (rdev->disp_priority == 2)
1033 d1mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON; 1034 d1mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON;
1034 WREG32(D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt); 1035 } else if (mode1) {
1035 WREG32(D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
1036 WREG32(D2MODE_PRIORITY_A_CNT, MODE_PRIORITY_OFF);
1037 WREG32(D2MODE_PRIORITY_B_CNT, MODE_PRIORITY_OFF);
1038 } else {
1039 if (dfixed_trunc(wm1.dbpp) > 64) 1036 if (dfixed_trunc(wm1.dbpp) > 64)
1040 a.full = dfixed_div(wm1.dbpp, wm1.num_line_pair); 1037 a.full = dfixed_div(wm1.dbpp, wm1.num_line_pair);
1041 else 1038 else
@@ -1064,11 +1061,12 @@ void rv515_bandwidth_avivo_update(struct radeon_device *rdev)
1064 d2mode_priority_a_cnt = dfixed_trunc(priority_mark12); 1061 d2mode_priority_a_cnt = dfixed_trunc(priority_mark12);
1065 if (rdev->disp_priority == 2) 1062 if (rdev->disp_priority == 2)
1066 d2mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON; 1063 d2mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON;
1067 WREG32(D1MODE_PRIORITY_A_CNT, MODE_PRIORITY_OFF);
1068 WREG32(D1MODE_PRIORITY_B_CNT, MODE_PRIORITY_OFF);
1069 WREG32(D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
1070 WREG32(D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
1071 } 1064 }
1065
1066 WREG32(D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
1067 WREG32(D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
1068 WREG32(D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
1069 WREG32(D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
1072} 1070}
1073 1071
1074void rv515_bandwidth_update(struct radeon_device *rdev) 1072void rv515_bandwidth_update(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index b7fd82064922..f1c796810117 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -42,6 +42,21 @@
42static void rv770_gpu_init(struct radeon_device *rdev); 42static void rv770_gpu_init(struct radeon_device *rdev);
43void rv770_fini(struct radeon_device *rdev); 43void rv770_fini(struct radeon_device *rdev);
44 44
45/* get temperature in millidegrees */
46u32 rv770_get_temp(struct radeon_device *rdev)
47{
48 u32 temp = (RREG32(CG_MULT_THERMAL_STATUS) & ASIC_T_MASK) >>
49 ASIC_T_SHIFT;
50 u32 actual_temp = 0;
51
52 if ((temp >> 9) & 1)
53 actual_temp = 0;
54 else
55 actual_temp = (temp >> 1) & 0xff;
56
57 return actual_temp * 1000;
58}
59
45void rv770_pm_misc(struct radeon_device *rdev) 60void rv770_pm_misc(struct radeon_device *rdev)
46{ 61{
47 int req_ps_idx = rdev->pm.requested_power_state_index; 62 int req_ps_idx = rdev->pm.requested_power_state_index;
@@ -189,7 +204,10 @@ static void rv770_mc_program(struct radeon_device *rdev)
189 WREG32((0x2c20 + j), 0x00000000); 204 WREG32((0x2c20 + j), 0x00000000);
190 WREG32((0x2c24 + j), 0x00000000); 205 WREG32((0x2c24 + j), 0x00000000);
191 } 206 }
192 WREG32(HDP_REG_COHERENCY_FLUSH_CNTL, 0); 207 /* r7xx hw bug. Read from HDP_DEBUG1 rather
208 * than writing to HDP_REG_COHERENCY_FLUSH_CNTL
209 */
210 tmp = RREG32(HDP_DEBUG1);
193 211
194 rv515_mc_stop(rdev, &save); 212 rv515_mc_stop(rdev, &save);
195 if (r600_mc_wait_for_idle(rdev)) { 213 if (r600_mc_wait_for_idle(rdev)) {
@@ -659,8 +677,9 @@ static void rv770_gpu_init(struct radeon_device *rdev)
659 r600_count_pipe_bits((cc_rb_backend_disable & 677 r600_count_pipe_bits((cc_rb_backend_disable &
660 R7XX_MAX_BACKENDS_MASK) >> 16)), 678 R7XX_MAX_BACKENDS_MASK) >> 16)),
661 (cc_rb_backend_disable >> 16)); 679 (cc_rb_backend_disable >> 16));
662 gb_tiling_config |= BACKEND_MAP(backend_map);
663 680
681 rdev->config.rv770.tile_config = gb_tiling_config;
682 gb_tiling_config |= BACKEND_MAP(backend_map);
664 683
665 WREG32(GB_TILING_CONFIG, gb_tiling_config); 684 WREG32(GB_TILING_CONFIG, gb_tiling_config);
666 WREG32(DCP_TILING_CONFIG, (gb_tiling_config & 0xffff)); 685 WREG32(DCP_TILING_CONFIG, (gb_tiling_config & 0xffff));
@@ -919,8 +938,8 @@ int rv770_mc_init(struct radeon_device *rdev)
919 } 938 }
920 rdev->mc.vram_width = numchan * chansize; 939 rdev->mc.vram_width = numchan * chansize;
921 /* Could aper size report 0 ? */ 940 /* Could aper size report 0 ? */
922 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 941 rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);
923 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); 942 rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);
924 /* Setup GPU memory space */ 943 /* Setup GPU memory space */
925 rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); 944 rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);
926 rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); 945 rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h
index 9506f8cb99e0..b7a5a20e81dc 100644
--- a/drivers/gpu/drm/radeon/rv770d.h
+++ b/drivers/gpu/drm/radeon/rv770d.h
@@ -122,12 +122,18 @@
122#define GUI_ACTIVE (1<<31) 122#define GUI_ACTIVE (1<<31)
123#define GRBM_STATUS2 0x8014 123#define GRBM_STATUS2 0x8014
124 124
125#define CG_MULT_THERMAL_STATUS 0x740
126#define ASIC_T(x) ((x) << 16)
127#define ASIC_T_MASK 0x3FF0000
128#define ASIC_T_SHIFT 16
129
125#define HDP_HOST_PATH_CNTL 0x2C00 130#define HDP_HOST_PATH_CNTL 0x2C00
126#define HDP_NONSURFACE_BASE 0x2C04 131#define HDP_NONSURFACE_BASE 0x2C04
127#define HDP_NONSURFACE_INFO 0x2C08 132#define HDP_NONSURFACE_INFO 0x2C08
128#define HDP_NONSURFACE_SIZE 0x2C0C 133#define HDP_NONSURFACE_SIZE 0x2C0C
129#define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0 134#define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0
130#define HDP_TILING_CONFIG 0x2F3C 135#define HDP_TILING_CONFIG 0x2F3C
136#define HDP_DEBUG1 0x2F34
131 137
132#define MC_SHARED_CHMAP 0x2004 138#define MC_SHARED_CHMAP 0x2004
133#define NOOFCHAN_SHIFT 12 139#define NOOFCHAN_SHIFT 12
diff --git a/drivers/gpu/drm/savage/savage_bci.c b/drivers/gpu/drm/savage/savage_bci.c
index 2d0c9ca484c5..976dc8d25280 100644
--- a/drivers/gpu/drm/savage/savage_bci.c
+++ b/drivers/gpu/drm/savage/savage_bci.c
@@ -552,7 +552,7 @@ int savage_driver_load(struct drm_device *dev, unsigned long chipset)
552 552
553 553
554/* 554/*
555 * Initalize mappings. On Savage4 and SavageIX the alignment 555 * Initialize mappings. On Savage4 and SavageIX the alignment
556 * and size of the aperture is not suitable for automatic MTRR setup 556 * and size of the aperture is not suitable for automatic MTRR setup
557 * in drm_addmap. Therefore we add them manually before the maps are 557 * in drm_addmap. Therefore we add them manually before the maps are
558 * initialized, and tear them down on last close. 558 * initialized, and tear them down on last close.
@@ -573,13 +573,13 @@ int savage_driver_firstopen(struct drm_device *dev)
573 dev_priv->mtrr[2].handle = -1; 573 dev_priv->mtrr[2].handle = -1;
574 if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { 574 if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
575 fb_rsrc = 0; 575 fb_rsrc = 0;
576 fb_base = drm_get_resource_start(dev, 0); 576 fb_base = pci_resource_start(dev->pdev, 0);
577 fb_size = SAVAGE_FB_SIZE_S3; 577 fb_size = SAVAGE_FB_SIZE_S3;
578 mmio_base = fb_base + SAVAGE_FB_SIZE_S3; 578 mmio_base = fb_base + SAVAGE_FB_SIZE_S3;
579 aper_rsrc = 0; 579 aper_rsrc = 0;
580 aperture_base = fb_base + SAVAGE_APERTURE_OFFSET; 580 aperture_base = fb_base + SAVAGE_APERTURE_OFFSET;
581 /* this should always be true */ 581 /* this should always be true */
582 if (drm_get_resource_len(dev, 0) == 0x08000000) { 582 if (pci_resource_len(dev->pdev, 0) == 0x08000000) {
583 /* Don't make MMIO write-cobining! We need 3 583 /* Don't make MMIO write-cobining! We need 3
584 * MTRRs. */ 584 * MTRRs. */
585 dev_priv->mtrr[0].base = fb_base; 585 dev_priv->mtrr[0].base = fb_base;
@@ -599,18 +599,19 @@ int savage_driver_firstopen(struct drm_device *dev)
599 dev_priv->mtrr[2].size, DRM_MTRR_WC); 599 dev_priv->mtrr[2].size, DRM_MTRR_WC);
600 } else { 600 } else {
601 DRM_ERROR("strange pci_resource_len %08llx\n", 601 DRM_ERROR("strange pci_resource_len %08llx\n",
602 (unsigned long long)drm_get_resource_len(dev, 0)); 602 (unsigned long long)
603 pci_resource_len(dev->pdev, 0));
603 } 604 }
604 } else if (dev_priv->chipset != S3_SUPERSAVAGE && 605 } else if (dev_priv->chipset != S3_SUPERSAVAGE &&
605 dev_priv->chipset != S3_SAVAGE2000) { 606 dev_priv->chipset != S3_SAVAGE2000) {
606 mmio_base = drm_get_resource_start(dev, 0); 607 mmio_base = pci_resource_start(dev->pdev, 0);
607 fb_rsrc = 1; 608 fb_rsrc = 1;
608 fb_base = drm_get_resource_start(dev, 1); 609 fb_base = pci_resource_start(dev->pdev, 1);
609 fb_size = SAVAGE_FB_SIZE_S4; 610 fb_size = SAVAGE_FB_SIZE_S4;
610 aper_rsrc = 1; 611 aper_rsrc = 1;
611 aperture_base = fb_base + SAVAGE_APERTURE_OFFSET; 612 aperture_base = fb_base + SAVAGE_APERTURE_OFFSET;
612 /* this should always be true */ 613 /* this should always be true */
613 if (drm_get_resource_len(dev, 1) == 0x08000000) { 614 if (pci_resource_len(dev->pdev, 1) == 0x08000000) {
614 /* Can use one MTRR to cover both fb and 615 /* Can use one MTRR to cover both fb and
615 * aperture. */ 616 * aperture. */
616 dev_priv->mtrr[0].base = fb_base; 617 dev_priv->mtrr[0].base = fb_base;
@@ -620,15 +621,16 @@ int savage_driver_firstopen(struct drm_device *dev)
620 dev_priv->mtrr[0].size, DRM_MTRR_WC); 621 dev_priv->mtrr[0].size, DRM_MTRR_WC);
621 } else { 622 } else {
622 DRM_ERROR("strange pci_resource_len %08llx\n", 623 DRM_ERROR("strange pci_resource_len %08llx\n",
623 (unsigned long long)drm_get_resource_len(dev, 1)); 624 (unsigned long long)
625 pci_resource_len(dev->pdev, 1));
624 } 626 }
625 } else { 627 } else {
626 mmio_base = drm_get_resource_start(dev, 0); 628 mmio_base = pci_resource_start(dev->pdev, 0);
627 fb_rsrc = 1; 629 fb_rsrc = 1;
628 fb_base = drm_get_resource_start(dev, 1); 630 fb_base = pci_resource_start(dev->pdev, 1);
629 fb_size = drm_get_resource_len(dev, 1); 631 fb_size = pci_resource_len(dev->pdev, 1);
630 aper_rsrc = 2; 632 aper_rsrc = 2;
631 aperture_base = drm_get_resource_start(dev, 2); 633 aperture_base = pci_resource_start(dev->pdev, 2);
632 /* Automatic MTRR setup will do the right thing. */ 634 /* Automatic MTRR setup will do the right thing. */
633 } 635 }
634 636
diff --git a/drivers/gpu/drm/sis/sis_drv.c b/drivers/gpu/drm/sis/sis_drv.c
index 4fd1f067d380..776bf9e9ea1a 100644
--- a/drivers/gpu/drm/sis/sis_drv.c
+++ b/drivers/gpu/drm/sis/sis_drv.c
@@ -47,9 +47,8 @@ static int sis_driver_load(struct drm_device *dev, unsigned long chipset)
47 dev->dev_private = (void *)dev_priv; 47 dev->dev_private = (void *)dev_priv;
48 dev_priv->chipset = chipset; 48 dev_priv->chipset = chipset;
49 ret = drm_sman_init(&dev_priv->sman, 2, 12, 8); 49 ret = drm_sman_init(&dev_priv->sman, 2, 12, 8);
50 if (ret) { 50 if (ret)
51 kfree(dev_priv); 51 kfree(dev_priv);
52 }
53 52
54 return ret; 53 return ret;
55} 54}
diff --git a/drivers/gpu/drm/sis/sis_mm.c b/drivers/gpu/drm/sis/sis_mm.c
index af22111397d8..07d0f2979cac 100644
--- a/drivers/gpu/drm/sis/sis_mm.c
+++ b/drivers/gpu/drm/sis/sis_mm.c
@@ -78,7 +78,7 @@ static unsigned long sis_sman_mm_offset(void *private, void *ref)
78#else /* CONFIG_FB_SIS[_MODULE] */ 78#else /* CONFIG_FB_SIS[_MODULE] */
79 79
80#define SIS_MM_ALIGN_SHIFT 4 80#define SIS_MM_ALIGN_SHIFT 4
81#define SIS_MM_ALIGN_MASK ( (1 << SIS_MM_ALIGN_SHIFT) - 1) 81#define SIS_MM_ALIGN_MASK ((1 << SIS_MM_ALIGN_SHIFT) - 1)
82 82
83#endif /* CONFIG_FB_SIS[_MODULE] */ 83#endif /* CONFIG_FB_SIS[_MODULE] */
84 84
@@ -225,9 +225,8 @@ static drm_local_map_t *sis_reg_init(struct drm_device *dev)
225 map = entry->map; 225 map = entry->map;
226 if (!map) 226 if (!map)
227 continue; 227 continue;
228 if (map->type == _DRM_REGISTERS) { 228 if (map->type == _DRM_REGISTERS)
229 return map; 229 return map;
230 }
231 } 230 }
232 return NULL; 231 return NULL;
233} 232}
@@ -264,10 +263,10 @@ int sis_idle(struct drm_device *dev)
264 263
265 end = jiffies + (DRM_HZ * 3); 264 end = jiffies + (DRM_HZ * 3);
266 265
267 for (i=0; i<4; ++i) { 266 for (i = 0; i < 4; ++i) {
268 do { 267 do {
269 idle_reg = SIS_READ(0x85cc); 268 idle_reg = SIS_READ(0x85cc);
270 } while ( !time_after_eq(jiffies, end) && 269 } while (!time_after_eq(jiffies, end) &&
271 ((idle_reg & 0x80000000) != 0x80000000)); 270 ((idle_reg & 0x80000000) != 0x80000000));
272 } 271 }
273 272
@@ -301,7 +300,7 @@ void sis_lastclose(struct drm_device *dev)
301 mutex_unlock(&dev->struct_mutex); 300 mutex_unlock(&dev->struct_mutex);
302} 301}
303 302
304void sis_reclaim_buffers_locked(struct drm_device * dev, 303void sis_reclaim_buffers_locked(struct drm_device *dev,
305 struct drm_file *file_priv) 304 struct drm_file *file_priv)
306{ 305{
307 drm_sis_private_t *dev_priv = dev->dev_private; 306 drm_sis_private_t *dev_priv = dev->dev_private;
@@ -312,9 +311,8 @@ void sis_reclaim_buffers_locked(struct drm_device * dev,
312 return; 311 return;
313 } 312 }
314 313
315 if (dev->driver->dma_quiescent) { 314 if (dev->driver->dma_quiescent)
316 dev->driver->dma_quiescent(dev); 315 dev->driver->dma_quiescent(dev);
317 }
318 316
319 drm_sman_owner_cleanup(&dev_priv->sman, (unsigned long)file_priv); 317 drm_sman_owner_cleanup(&dev_priv->sman, (unsigned long)file_priv);
320 mutex_unlock(&dev->struct_mutex); 318 mutex_unlock(&dev->struct_mutex);
diff --git a/drivers/gpu/drm/ttm/Makefile b/drivers/gpu/drm/ttm/Makefile
index 4256e2006476..b256d4adfafe 100644
--- a/drivers/gpu/drm/ttm/Makefile
+++ b/drivers/gpu/drm/ttm/Makefile
@@ -3,7 +3,7 @@
3 3
4ccflags-y := -Iinclude/drm 4ccflags-y := -Iinclude/drm
5ttm-y := ttm_agp_backend.o ttm_memory.o ttm_tt.o ttm_bo.o \ 5ttm-y := ttm_agp_backend.o ttm_memory.o ttm_tt.o ttm_bo.o \
6 ttm_bo_util.o ttm_bo_vm.o ttm_module.o ttm_global.o \ 6 ttm_bo_util.o ttm_bo_vm.o ttm_module.o \
7 ttm_object.o ttm_lock.o ttm_execbuf_util.o ttm_page_alloc.o 7 ttm_object.o ttm_lock.o ttm_execbuf_util.o ttm_page_alloc.o
8 8
9obj-$(CONFIG_DRM_TTM) += ttm.o 9obj-$(CONFIG_DRM_TTM) += ttm.o
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 555ebb12ace8..cb4cf7ef4d1e 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -476,7 +476,6 @@ static int ttm_bo_cleanup_refs(struct ttm_buffer_object *bo, bool remove_all)
476 ++put_count; 476 ++put_count;
477 } 477 }
478 if (bo->mem.mm_node) { 478 if (bo->mem.mm_node) {
479 bo->mem.mm_node->private = NULL;
480 drm_mm_put_block(bo->mem.mm_node); 479 drm_mm_put_block(bo->mem.mm_node);
481 bo->mem.mm_node = NULL; 480 bo->mem.mm_node = NULL;
482 } 481 }
@@ -670,7 +669,6 @@ static int ttm_bo_evict(struct ttm_buffer_object *bo, bool interruptible,
670 printk(KERN_ERR TTM_PFX "Buffer eviction failed\n"); 669 printk(KERN_ERR TTM_PFX "Buffer eviction failed\n");
671 spin_lock(&glob->lru_lock); 670 spin_lock(&glob->lru_lock);
672 if (evict_mem.mm_node) { 671 if (evict_mem.mm_node) {
673 evict_mem.mm_node->private = NULL;
674 drm_mm_put_block(evict_mem.mm_node); 672 drm_mm_put_block(evict_mem.mm_node);
675 evict_mem.mm_node = NULL; 673 evict_mem.mm_node = NULL;
676 } 674 }
@@ -929,8 +927,6 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
929 mem->mm_node = node; 927 mem->mm_node = node;
930 mem->mem_type = mem_type; 928 mem->mem_type = mem_type;
931 mem->placement = cur_flags; 929 mem->placement = cur_flags;
932 if (node)
933 node->private = bo;
934 return 0; 930 return 0;
935 } 931 }
936 932
@@ -973,7 +969,6 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
973 interruptible, no_wait_reserve, no_wait_gpu); 969 interruptible, no_wait_reserve, no_wait_gpu);
974 if (ret == 0 && mem->mm_node) { 970 if (ret == 0 && mem->mm_node) {
975 mem->placement = cur_flags; 971 mem->placement = cur_flags;
976 mem->mm_node->private = bo;
977 return 0; 972 return 0;
978 } 973 }
979 if (ret == -ERESTARTSYS) 974 if (ret == -ERESTARTSYS)
@@ -1029,7 +1024,6 @@ int ttm_bo_move_buffer(struct ttm_buffer_object *bo,
1029out_unlock: 1024out_unlock:
1030 if (ret && mem.mm_node) { 1025 if (ret && mem.mm_node) {
1031 spin_lock(&glob->lru_lock); 1026 spin_lock(&glob->lru_lock);
1032 mem.mm_node->private = NULL;
1033 drm_mm_put_block(mem.mm_node); 1027 drm_mm_put_block(mem.mm_node);
1034 spin_unlock(&glob->lru_lock); 1028 spin_unlock(&glob->lru_lock);
1035 } 1029 }
@@ -1401,7 +1395,7 @@ static void ttm_bo_global_kobj_release(struct kobject *kobj)
1401 kfree(glob); 1395 kfree(glob);
1402} 1396}
1403 1397
1404void ttm_bo_global_release(struct ttm_global_reference *ref) 1398void ttm_bo_global_release(struct drm_global_reference *ref)
1405{ 1399{
1406 struct ttm_bo_global *glob = ref->object; 1400 struct ttm_bo_global *glob = ref->object;
1407 1401
@@ -1410,7 +1404,7 @@ void ttm_bo_global_release(struct ttm_global_reference *ref)
1410} 1404}
1411EXPORT_SYMBOL(ttm_bo_global_release); 1405EXPORT_SYMBOL(ttm_bo_global_release);
1412 1406
1413int ttm_bo_global_init(struct ttm_global_reference *ref) 1407int ttm_bo_global_init(struct drm_global_reference *ref)
1414{ 1408{
1415 struct ttm_bo_global_ref *bo_ref = 1409 struct ttm_bo_global_ref *bo_ref =
1416 container_of(ref, struct ttm_bo_global_ref, ref); 1410 container_of(ref, struct ttm_bo_global_ref, ref);
diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c
index 13012a1f1486..7cffb3e04232 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_util.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
@@ -353,8 +353,6 @@ static int ttm_buffer_object_transfer(struct ttm_buffer_object *bo,
353 fbo->vm_node = NULL; 353 fbo->vm_node = NULL;
354 354
355 fbo->sync_obj = driver->sync_obj_ref(bo->sync_obj); 355 fbo->sync_obj = driver->sync_obj_ref(bo->sync_obj);
356 if (fbo->mem.mm_node)
357 fbo->mem.mm_node->private = (void *)fbo;
358 kref_init(&fbo->list_kref); 356 kref_init(&fbo->list_kref);
359 kref_init(&fbo->kref); 357 kref_init(&fbo->kref);
360 fbo->destroy = &ttm_transfered_destroy; 358 fbo->destroy = &ttm_transfered_destroy;
diff --git a/drivers/gpu/drm/ttm/ttm_module.c b/drivers/gpu/drm/ttm/ttm_module.c
index 9a6edbfeaa9e..902d7cf9fb4e 100644
--- a/drivers/gpu/drm/ttm/ttm_module.c
+++ b/drivers/gpu/drm/ttm/ttm_module.c
@@ -70,8 +70,6 @@ static int __init ttm_init(void)
70 if (unlikely(ret != 0)) 70 if (unlikely(ret != 0))
71 return ret; 71 return ret;
72 72
73 ttm_global_init();
74
75 atomic_set(&device_released, 0); 73 atomic_set(&device_released, 0);
76 ret = drm_class_device_register(&ttm_drm_class_device); 74 ret = drm_class_device_register(&ttm_drm_class_device);
77 if (unlikely(ret != 0)) 75 if (unlikely(ret != 0))
@@ -81,7 +79,6 @@ static int __init ttm_init(void)
81out_no_dev_reg: 79out_no_dev_reg:
82 atomic_set(&device_released, 1); 80 atomic_set(&device_released, 1);
83 wake_up_all(&exit_q); 81 wake_up_all(&exit_q);
84 ttm_global_release();
85 return ret; 82 return ret;
86} 83}
87 84
@@ -95,7 +92,6 @@ static void __exit ttm_exit(void)
95 */ 92 */
96 93
97 wait_event(exit_q, atomic_read(&device_released) == 1); 94 wait_event(exit_q, atomic_read(&device_released) == 1);
98 ttm_global_release();
99} 95}
100 96
101module_init(ttm_init); 97module_init(ttm_init);
diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc.c b/drivers/gpu/drm/ttm/ttm_page_alloc.c
index 2f047577b1e3..ca904799f018 100644
--- a/drivers/gpu/drm/ttm/ttm_page_alloc.c
+++ b/drivers/gpu/drm/ttm/ttm_page_alloc.c
@@ -40,11 +40,13 @@
40#include <linux/slab.h> 40#include <linux/slab.h>
41 41
42#include <asm/atomic.h> 42#include <asm/atomic.h>
43#include <asm/agp.h>
44 43
45#include "ttm/ttm_bo_driver.h" 44#include "ttm/ttm_bo_driver.h"
46#include "ttm/ttm_page_alloc.h" 45#include "ttm/ttm_page_alloc.h"
47 46
47#ifdef TTM_HAS_AGP
48#include <asm/agp.h>
49#endif
48 50
49#define NUM_PAGES_TO_ALLOC (PAGE_SIZE/sizeof(struct page *)) 51#define NUM_PAGES_TO_ALLOC (PAGE_SIZE/sizeof(struct page *))
50#define SMALL_ALLOCATION 16 52#define SMALL_ALLOCATION 16
@@ -104,7 +106,6 @@ struct ttm_pool_opts {
104struct ttm_pool_manager { 106struct ttm_pool_manager {
105 struct kobject kobj; 107 struct kobject kobj;
106 struct shrinker mm_shrink; 108 struct shrinker mm_shrink;
107 atomic_t page_alloc_inited;
108 struct ttm_pool_opts options; 109 struct ttm_pool_opts options;
109 110
110 union { 111 union {
@@ -142,7 +143,7 @@ static void ttm_pool_kobj_release(struct kobject *kobj)
142{ 143{
143 struct ttm_pool_manager *m = 144 struct ttm_pool_manager *m =
144 container_of(kobj, struct ttm_pool_manager, kobj); 145 container_of(kobj, struct ttm_pool_manager, kobj);
145 (void)m; 146 kfree(m);
146} 147}
147 148
148static ssize_t ttm_pool_store(struct kobject *kobj, 149static ssize_t ttm_pool_store(struct kobject *kobj,
@@ -214,9 +215,7 @@ static struct kobj_type ttm_pool_kobj_type = {
214 .default_attrs = ttm_pool_attrs, 215 .default_attrs = ttm_pool_attrs,
215}; 216};
216 217
217static struct ttm_pool_manager _manager = { 218static struct ttm_pool_manager *_manager;
218 .page_alloc_inited = ATOMIC_INIT(0)
219};
220 219
221#ifndef CONFIG_X86 220#ifndef CONFIG_X86
222static int set_pages_array_wb(struct page **pages, int addrinarray) 221static int set_pages_array_wb(struct page **pages, int addrinarray)
@@ -271,7 +270,7 @@ static struct ttm_page_pool *ttm_get_pool(int flags,
271 if (flags & TTM_PAGE_FLAG_DMA32) 270 if (flags & TTM_PAGE_FLAG_DMA32)
272 pool_index |= 0x2; 271 pool_index |= 0x2;
273 272
274 return &_manager.pools[pool_index]; 273 return &_manager->pools[pool_index];
275} 274}
276 275
277/* set memory back to wb and free the pages. */ 276/* set memory back to wb and free the pages. */
@@ -387,7 +386,7 @@ static int ttm_pool_get_num_unused_pages(void)
387 unsigned i; 386 unsigned i;
388 int total = 0; 387 int total = 0;
389 for (i = 0; i < NUM_POOLS; ++i) 388 for (i = 0; i < NUM_POOLS; ++i)
390 total += _manager.pools[i].npages; 389 total += _manager->pools[i].npages;
391 390
392 return total; 391 return total;
393} 392}
@@ -395,7 +394,7 @@ static int ttm_pool_get_num_unused_pages(void)
395/** 394/**
396 * Callback for mm to request pool to reduce number of page held. 395 * Callback for mm to request pool to reduce number of page held.
397 */ 396 */
398static int ttm_pool_mm_shrink(int shrink_pages, gfp_t gfp_mask) 397static int ttm_pool_mm_shrink(struct shrinker *shrink, int shrink_pages, gfp_t gfp_mask)
399{ 398{
400 static atomic_t start_pool = ATOMIC_INIT(0); 399 static atomic_t start_pool = ATOMIC_INIT(0);
401 unsigned i; 400 unsigned i;
@@ -408,7 +407,7 @@ static int ttm_pool_mm_shrink(int shrink_pages, gfp_t gfp_mask)
408 unsigned nr_free = shrink_pages; 407 unsigned nr_free = shrink_pages;
409 if (shrink_pages == 0) 408 if (shrink_pages == 0)
410 break; 409 break;
411 pool = &_manager.pools[(i + pool_offset)%NUM_POOLS]; 410 pool = &_manager->pools[(i + pool_offset)%NUM_POOLS];
412 shrink_pages = ttm_page_pool_free(pool, nr_free); 411 shrink_pages = ttm_page_pool_free(pool, nr_free);
413 } 412 }
414 /* return estimated number of unused pages in pool */ 413 /* return estimated number of unused pages in pool */
@@ -576,10 +575,10 @@ static void ttm_page_pool_fill_locked(struct ttm_page_pool *pool,
576 575
577 /* If allocation request is small and there is not enough 576 /* If allocation request is small and there is not enough
578 * pages in pool we fill the pool first */ 577 * pages in pool we fill the pool first */
579 if (count < _manager.options.small 578 if (count < _manager->options.small
580 && count > pool->npages) { 579 && count > pool->npages) {
581 struct list_head new_pages; 580 struct list_head new_pages;
582 unsigned alloc_size = _manager.options.alloc_size; 581 unsigned alloc_size = _manager->options.alloc_size;
583 582
584 /** 583 /**
585 * Can't change page caching if in irqsave context. We have to 584 * Can't change page caching if in irqsave context. We have to
@@ -759,8 +758,8 @@ void ttm_put_pages(struct list_head *pages, unsigned page_count, int flags,
759 pool->npages += page_count; 758 pool->npages += page_count;
760 /* Check that we don't go over the pool limit */ 759 /* Check that we don't go over the pool limit */
761 page_count = 0; 760 page_count = 0;
762 if (pool->npages > _manager.options.max_size) { 761 if (pool->npages > _manager->options.max_size) {
763 page_count = pool->npages - _manager.options.max_size; 762 page_count = pool->npages - _manager->options.max_size;
764 /* free at least NUM_PAGES_TO_ALLOC number of pages 763 /* free at least NUM_PAGES_TO_ALLOC number of pages
765 * to reduce calls to set_memory_wb */ 764 * to reduce calls to set_memory_wb */
766 if (page_count < NUM_PAGES_TO_ALLOC) 765 if (page_count < NUM_PAGES_TO_ALLOC)
@@ -785,33 +784,36 @@ static void ttm_page_pool_init_locked(struct ttm_page_pool *pool, int flags,
785int ttm_page_alloc_init(struct ttm_mem_global *glob, unsigned max_pages) 784int ttm_page_alloc_init(struct ttm_mem_global *glob, unsigned max_pages)
786{ 785{
787 int ret; 786 int ret;
788 if (atomic_add_return(1, &_manager.page_alloc_inited) > 1) 787
789 return 0; 788 WARN_ON(_manager);
790 789
791 printk(KERN_INFO TTM_PFX "Initializing pool allocator.\n"); 790 printk(KERN_INFO TTM_PFX "Initializing pool allocator.\n");
792 791
793 ttm_page_pool_init_locked(&_manager.wc_pool, GFP_HIGHUSER, "wc"); 792 _manager = kzalloc(sizeof(*_manager), GFP_KERNEL);
793
794 ttm_page_pool_init_locked(&_manager->wc_pool, GFP_HIGHUSER, "wc");
794 795
795 ttm_page_pool_init_locked(&_manager.uc_pool, GFP_HIGHUSER, "uc"); 796 ttm_page_pool_init_locked(&_manager->uc_pool, GFP_HIGHUSER, "uc");
796 797
797 ttm_page_pool_init_locked(&_manager.wc_pool_dma32, GFP_USER | GFP_DMA32, 798 ttm_page_pool_init_locked(&_manager->wc_pool_dma32,
798 "wc dma"); 799 GFP_USER | GFP_DMA32, "wc dma");
799 800
800 ttm_page_pool_init_locked(&_manager.uc_pool_dma32, GFP_USER | GFP_DMA32, 801 ttm_page_pool_init_locked(&_manager->uc_pool_dma32,
801 "uc dma"); 802 GFP_USER | GFP_DMA32, "uc dma");
802 803
803 _manager.options.max_size = max_pages; 804 _manager->options.max_size = max_pages;
804 _manager.options.small = SMALL_ALLOCATION; 805 _manager->options.small = SMALL_ALLOCATION;
805 _manager.options.alloc_size = NUM_PAGES_TO_ALLOC; 806 _manager->options.alloc_size = NUM_PAGES_TO_ALLOC;
806 807
807 kobject_init(&_manager.kobj, &ttm_pool_kobj_type); 808 ret = kobject_init_and_add(&_manager->kobj, &ttm_pool_kobj_type,
808 ret = kobject_add(&_manager.kobj, &glob->kobj, "pool"); 809 &glob->kobj, "pool");
809 if (unlikely(ret != 0)) { 810 if (unlikely(ret != 0)) {
810 kobject_put(&_manager.kobj); 811 kobject_put(&_manager->kobj);
812 _manager = NULL;
811 return ret; 813 return ret;
812 } 814 }
813 815
814 ttm_pool_mm_shrink_init(&_manager); 816 ttm_pool_mm_shrink_init(_manager);
815 817
816 return 0; 818 return 0;
817} 819}
@@ -820,16 +822,14 @@ void ttm_page_alloc_fini()
820{ 822{
821 int i; 823 int i;
822 824
823 if (atomic_sub_return(1, &_manager.page_alloc_inited) > 0)
824 return;
825
826 printk(KERN_INFO TTM_PFX "Finalizing pool allocator.\n"); 825 printk(KERN_INFO TTM_PFX "Finalizing pool allocator.\n");
827 ttm_pool_mm_shrink_fini(&_manager); 826 ttm_pool_mm_shrink_fini(_manager);
828 827
829 for (i = 0; i < NUM_POOLS; ++i) 828 for (i = 0; i < NUM_POOLS; ++i)
830 ttm_page_pool_free(&_manager.pools[i], FREE_ALL_PAGES); 829 ttm_page_pool_free(&_manager->pools[i], FREE_ALL_PAGES);
831 830
832 kobject_put(&_manager.kobj); 831 kobject_put(&_manager->kobj);
832 _manager = NULL;
833} 833}
834 834
835int ttm_page_alloc_debugfs(struct seq_file *m, void *data) 835int ttm_page_alloc_debugfs(struct seq_file *m, void *data)
@@ -837,14 +837,14 @@ int ttm_page_alloc_debugfs(struct seq_file *m, void *data)
837 struct ttm_page_pool *p; 837 struct ttm_page_pool *p;
838 unsigned i; 838 unsigned i;
839 char *h[] = {"pool", "refills", "pages freed", "size"}; 839 char *h[] = {"pool", "refills", "pages freed", "size"};
840 if (atomic_read(&_manager.page_alloc_inited) == 0) { 840 if (!_manager) {
841 seq_printf(m, "No pool allocator running.\n"); 841 seq_printf(m, "No pool allocator running.\n");
842 return 0; 842 return 0;
843 } 843 }
844 seq_printf(m, "%6s %12s %13s %8s\n", 844 seq_printf(m, "%6s %12s %13s %8s\n",
845 h[0], h[1], h[2], h[3]); 845 h[0], h[1], h[2], h[3]);
846 for (i = 0; i < NUM_POOLS; ++i) { 846 for (i = 0; i < NUM_POOLS; ++i) {
847 p = &_manager.pools[i]; 847 p = &_manager->pools[i];
848 848
849 seq_printf(m, "%6s %12ld %13ld %8d\n", 849 seq_printf(m, "%6s %12ld %13ld %8d\n",
850 p->name, p->nrefills, 850 p->name, p->nrefills,
diff --git a/drivers/gpu/drm/via/via_dma.c b/drivers/gpu/drm/via/via_dma.c
index bfb92d283260..68dda74a50ae 100644
--- a/drivers/gpu/drm/via/via_dma.c
+++ b/drivers/gpu/drm/via/via_dma.c
@@ -58,28 +58,29 @@
58 *((uint32_t *)(vb)) = ((nReg) >> 2) | HALCYON_HEADER1; \ 58 *((uint32_t *)(vb)) = ((nReg) >> 2) | HALCYON_HEADER1; \
59 *((uint32_t *)(vb) + 1) = (nData); \ 59 *((uint32_t *)(vb) + 1) = (nData); \
60 vb = ((uint32_t *)vb) + 2; \ 60 vb = ((uint32_t *)vb) + 2; \
61 dev_priv->dma_low +=8; \ 61 dev_priv->dma_low += 8; \
62} 62}
63 63
64#define via_flush_write_combine() DRM_MEMORYBARRIER() 64#define via_flush_write_combine() DRM_MEMORYBARRIER()
65 65
66#define VIA_OUT_RING_QW(w1,w2) \ 66#define VIA_OUT_RING_QW(w1, w2) do { \
67 *vb++ = (w1); \ 67 *vb++ = (w1); \
68 *vb++ = (w2); \ 68 *vb++ = (w2); \
69 dev_priv->dma_low += 8; 69 dev_priv->dma_low += 8; \
70} while (0)
70 71
71static void via_cmdbuf_start(drm_via_private_t * dev_priv); 72static void via_cmdbuf_start(drm_via_private_t *dev_priv);
72static void via_cmdbuf_pause(drm_via_private_t * dev_priv); 73static void via_cmdbuf_pause(drm_via_private_t *dev_priv);
73static void via_cmdbuf_reset(drm_via_private_t * dev_priv); 74static void via_cmdbuf_reset(drm_via_private_t *dev_priv);
74static void via_cmdbuf_rewind(drm_via_private_t * dev_priv); 75static void via_cmdbuf_rewind(drm_via_private_t *dev_priv);
75static int via_wait_idle(drm_via_private_t * dev_priv); 76static int via_wait_idle(drm_via_private_t *dev_priv);
76static void via_pad_cache(drm_via_private_t * dev_priv, int qwords); 77static void via_pad_cache(drm_via_private_t *dev_priv, int qwords);
77 78
78/* 79/*
79 * Free space in command buffer. 80 * Free space in command buffer.
80 */ 81 */
81 82
82static uint32_t via_cmdbuf_space(drm_via_private_t * dev_priv) 83static uint32_t via_cmdbuf_space(drm_via_private_t *dev_priv)
83{ 84{
84 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; 85 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
85 uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; 86 uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base;
@@ -93,7 +94,7 @@ static uint32_t via_cmdbuf_space(drm_via_private_t * dev_priv)
93 * How much does the command regulator lag behind? 94 * How much does the command regulator lag behind?
94 */ 95 */
95 96
96static uint32_t via_cmdbuf_lag(drm_via_private_t * dev_priv) 97static uint32_t via_cmdbuf_lag(drm_via_private_t *dev_priv)
97{ 98{
98 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; 99 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
99 uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; 100 uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base;
@@ -108,7 +109,7 @@ static uint32_t via_cmdbuf_lag(drm_via_private_t * dev_priv)
108 */ 109 */
109 110
110static inline int 111static inline int
111via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size) 112via_cmdbuf_wait(drm_via_private_t *dev_priv, unsigned int size)
112{ 113{
113 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; 114 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
114 uint32_t cur_addr, hw_addr, next_addr; 115 uint32_t cur_addr, hw_addr, next_addr;
@@ -146,14 +147,13 @@ static inline uint32_t *via_check_dma(drm_via_private_t * dev_priv,
146 dev_priv->dma_high) { 147 dev_priv->dma_high) {
147 via_cmdbuf_rewind(dev_priv); 148 via_cmdbuf_rewind(dev_priv);
148 } 149 }
149 if (via_cmdbuf_wait(dev_priv, size) != 0) { 150 if (via_cmdbuf_wait(dev_priv, size) != 0)
150 return NULL; 151 return NULL;
151 }
152 152
153 return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low); 153 return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low);
154} 154}
155 155
156int via_dma_cleanup(struct drm_device * dev) 156int via_dma_cleanup(struct drm_device *dev)
157{ 157{
158 if (dev->dev_private) { 158 if (dev->dev_private) {
159 drm_via_private_t *dev_priv = 159 drm_via_private_t *dev_priv =
@@ -171,9 +171,9 @@ int via_dma_cleanup(struct drm_device * dev)
171 return 0; 171 return 0;
172} 172}
173 173
174static int via_initialize(struct drm_device * dev, 174static int via_initialize(struct drm_device *dev,
175 drm_via_private_t * dev_priv, 175 drm_via_private_t *dev_priv,
176 drm_via_dma_init_t * init) 176 drm_via_dma_init_t *init)
177{ 177{
178 if (!dev_priv || !dev_priv->mmio) { 178 if (!dev_priv || !dev_priv->mmio) {
179 DRM_ERROR("via_dma_init called before via_map_init\n"); 179 DRM_ERROR("via_dma_init called before via_map_init\n");
@@ -258,7 +258,7 @@ static int via_dma_init(struct drm_device *dev, void *data, struct drm_file *fil
258 return retcode; 258 return retcode;
259} 259}
260 260
261static int via_dispatch_cmdbuffer(struct drm_device * dev, drm_via_cmdbuffer_t * cmd) 261static int via_dispatch_cmdbuffer(struct drm_device *dev, drm_via_cmdbuffer_t *cmd)
262{ 262{
263 drm_via_private_t *dev_priv; 263 drm_via_private_t *dev_priv;
264 uint32_t *vb; 264 uint32_t *vb;
@@ -271,9 +271,8 @@ static int via_dispatch_cmdbuffer(struct drm_device * dev, drm_via_cmdbuffer_t *
271 return -EFAULT; 271 return -EFAULT;
272 } 272 }
273 273
274 if (cmd->size > VIA_PCI_BUF_SIZE) { 274 if (cmd->size > VIA_PCI_BUF_SIZE)
275 return -ENOMEM; 275 return -ENOMEM;
276 }
277 276
278 if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size)) 277 if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size))
279 return -EFAULT; 278 return -EFAULT;
@@ -291,9 +290,8 @@ static int via_dispatch_cmdbuffer(struct drm_device * dev, drm_via_cmdbuffer_t *
291 } 290 }
292 291
293 vb = via_check_dma(dev_priv, (cmd->size < 0x100) ? 0x102 : cmd->size); 292 vb = via_check_dma(dev_priv, (cmd->size < 0x100) ? 0x102 : cmd->size);
294 if (vb == NULL) { 293 if (vb == NULL)
295 return -EAGAIN; 294 return -EAGAIN;
296 }
297 295
298 memcpy(vb, dev_priv->pci_buf, cmd->size); 296 memcpy(vb, dev_priv->pci_buf, cmd->size);
299 297
@@ -311,13 +309,12 @@ static int via_dispatch_cmdbuffer(struct drm_device * dev, drm_via_cmdbuffer_t *
311 return 0; 309 return 0;
312} 310}
313 311
314int via_driver_dma_quiescent(struct drm_device * dev) 312int via_driver_dma_quiescent(struct drm_device *dev)
315{ 313{
316 drm_via_private_t *dev_priv = dev->dev_private; 314 drm_via_private_t *dev_priv = dev->dev_private;
317 315
318 if (!via_wait_idle(dev_priv)) { 316 if (!via_wait_idle(dev_priv))
319 return -EBUSY; 317 return -EBUSY;
320 }
321 return 0; 318 return 0;
322} 319}
323 320
@@ -339,22 +336,17 @@ static int via_cmdbuffer(struct drm_device *dev, void *data, struct drm_file *fi
339 DRM_DEBUG("buf %p size %lu\n", cmdbuf->buf, cmdbuf->size); 336 DRM_DEBUG("buf %p size %lu\n", cmdbuf->buf, cmdbuf->size);
340 337
341 ret = via_dispatch_cmdbuffer(dev, cmdbuf); 338 ret = via_dispatch_cmdbuffer(dev, cmdbuf);
342 if (ret) { 339 return ret;
343 return ret;
344 }
345
346 return 0;
347} 340}
348 341
349static int via_dispatch_pci_cmdbuffer(struct drm_device * dev, 342static int via_dispatch_pci_cmdbuffer(struct drm_device *dev,
350 drm_via_cmdbuffer_t * cmd) 343 drm_via_cmdbuffer_t *cmd)
351{ 344{
352 drm_via_private_t *dev_priv = dev->dev_private; 345 drm_via_private_t *dev_priv = dev->dev_private;
353 int ret; 346 int ret;
354 347
355 if (cmd->size > VIA_PCI_BUF_SIZE) { 348 if (cmd->size > VIA_PCI_BUF_SIZE)
356 return -ENOMEM; 349 return -ENOMEM;
357 }
358 if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size)) 350 if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size))
359 return -EFAULT; 351 return -EFAULT;
360 352
@@ -380,19 +372,14 @@ static int via_pci_cmdbuffer(struct drm_device *dev, void *data, struct drm_file
380 DRM_DEBUG("buf %p size %lu\n", cmdbuf->buf, cmdbuf->size); 372 DRM_DEBUG("buf %p size %lu\n", cmdbuf->buf, cmdbuf->size);
381 373
382 ret = via_dispatch_pci_cmdbuffer(dev, cmdbuf); 374 ret = via_dispatch_pci_cmdbuffer(dev, cmdbuf);
383 if (ret) { 375 return ret;
384 return ret;
385 }
386
387 return 0;
388} 376}
389 377
390static inline uint32_t *via_align_buffer(drm_via_private_t * dev_priv, 378static inline uint32_t *via_align_buffer(drm_via_private_t *dev_priv,
391 uint32_t * vb, int qw_count) 379 uint32_t * vb, int qw_count)
392{ 380{
393 for (; qw_count > 0; --qw_count) { 381 for (; qw_count > 0; --qw_count)
394 VIA_OUT_RING_QW(HC_DUMMY, HC_DUMMY); 382 VIA_OUT_RING_QW(HC_DUMMY, HC_DUMMY);
395 }
396 return vb; 383 return vb;
397} 384}
398 385
@@ -401,7 +388,7 @@ static inline uint32_t *via_align_buffer(drm_via_private_t * dev_priv,
401 * 388 *
402 * Returns virtual pointer to ring buffer. 389 * Returns virtual pointer to ring buffer.
403 */ 390 */
404static inline uint32_t *via_get_dma(drm_via_private_t * dev_priv) 391static inline uint32_t *via_get_dma(drm_via_private_t *dev_priv)
405{ 392{
406 return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low); 393 return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low);
407} 394}
@@ -411,18 +398,18 @@ static inline uint32_t *via_get_dma(drm_via_private_t * dev_priv)
411 * modifying the pause address stored in the buffer itself. If 398 * modifying the pause address stored in the buffer itself. If
412 * the regulator has already paused, restart it. 399 * the regulator has already paused, restart it.
413 */ 400 */
414static int via_hook_segment(drm_via_private_t * dev_priv, 401static int via_hook_segment(drm_via_private_t *dev_priv,
415 uint32_t pause_addr_hi, uint32_t pause_addr_lo, 402 uint32_t pause_addr_hi, uint32_t pause_addr_lo,
416 int no_pci_fire) 403 int no_pci_fire)
417{ 404{
418 int paused, count; 405 int paused, count;
419 volatile uint32_t *paused_at = dev_priv->last_pause_ptr; 406 volatile uint32_t *paused_at = dev_priv->last_pause_ptr;
420 uint32_t reader,ptr; 407 uint32_t reader, ptr;
421 uint32_t diff; 408 uint32_t diff;
422 409
423 paused = 0; 410 paused = 0;
424 via_flush_write_combine(); 411 via_flush_write_combine();
425 (void) *(volatile uint32_t *)(via_get_dma(dev_priv) -1); 412 (void) *(volatile uint32_t *)(via_get_dma(dev_priv) - 1);
426 413
427 *paused_at = pause_addr_lo; 414 *paused_at = pause_addr_lo;
428 via_flush_write_combine(); 415 via_flush_write_combine();
@@ -435,7 +422,7 @@ static int via_hook_segment(drm_via_private_t * dev_priv,
435 dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1; 422 dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1;
436 423
437 /* 424 /*
438 * If there is a possibility that the command reader will 425 * If there is a possibility that the command reader will
439 * miss the new pause address and pause on the old one, 426 * miss the new pause address and pause on the old one,
440 * In that case we need to program the new start address 427 * In that case we need to program the new start address
441 * using PCI. 428 * using PCI.
@@ -443,9 +430,9 @@ static int via_hook_segment(drm_via_private_t * dev_priv,
443 430
444 diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff; 431 diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff;
445 count = 10000000; 432 count = 10000000;
446 while(diff == 0 && count--) { 433 while (diff == 0 && count--) {
447 paused = (VIA_READ(0x41c) & 0x80000000); 434 paused = (VIA_READ(0x41c) & 0x80000000);
448 if (paused) 435 if (paused)
449 break; 436 break;
450 reader = *(dev_priv->hw_addr_ptr); 437 reader = *(dev_priv->hw_addr_ptr);
451 diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff; 438 diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff;
@@ -477,7 +464,7 @@ static int via_hook_segment(drm_via_private_t * dev_priv,
477 return paused; 464 return paused;
478} 465}
479 466
480static int via_wait_idle(drm_via_private_t * dev_priv) 467static int via_wait_idle(drm_via_private_t *dev_priv)
481{ 468{
482 int count = 10000000; 469 int count = 10000000;
483 470
@@ -491,9 +478,9 @@ static int via_wait_idle(drm_via_private_t * dev_priv)
491 return count; 478 return count;
492} 479}
493 480
494static uint32_t *via_align_cmd(drm_via_private_t * dev_priv, uint32_t cmd_type, 481static uint32_t *via_align_cmd(drm_via_private_t *dev_priv, uint32_t cmd_type,
495 uint32_t addr, uint32_t * cmd_addr_hi, 482 uint32_t addr, uint32_t *cmd_addr_hi,
496 uint32_t * cmd_addr_lo, int skip_wait) 483 uint32_t *cmd_addr_lo, int skip_wait)
497{ 484{
498 uint32_t agp_base; 485 uint32_t agp_base;
499 uint32_t cmd_addr, addr_lo, addr_hi; 486 uint32_t cmd_addr, addr_lo, addr_hi;
@@ -521,7 +508,7 @@ static uint32_t *via_align_cmd(drm_via_private_t * dev_priv, uint32_t cmd_type,
521 return vb; 508 return vb;
522} 509}
523 510
524static void via_cmdbuf_start(drm_via_private_t * dev_priv) 511static void via_cmdbuf_start(drm_via_private_t *dev_priv)
525{ 512{
526 uint32_t pause_addr_lo, pause_addr_hi; 513 uint32_t pause_addr_lo, pause_addr_hi;
527 uint32_t start_addr, start_addr_lo; 514 uint32_t start_addr, start_addr_lo;
@@ -580,7 +567,7 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv)
580 dev_priv->dma_diff = ptr - reader; 567 dev_priv->dma_diff = ptr - reader;
581} 568}
582 569
583static void via_pad_cache(drm_via_private_t * dev_priv, int qwords) 570static void via_pad_cache(drm_via_private_t *dev_priv, int qwords)
584{ 571{
585 uint32_t *vb; 572 uint32_t *vb;
586 573
@@ -590,7 +577,7 @@ static void via_pad_cache(drm_via_private_t * dev_priv, int qwords)
590 via_align_buffer(dev_priv, vb, qwords); 577 via_align_buffer(dev_priv, vb, qwords);
591} 578}
592 579
593static inline void via_dummy_bitblt(drm_via_private_t * dev_priv) 580static inline void via_dummy_bitblt(drm_via_private_t *dev_priv)
594{ 581{
595 uint32_t *vb = via_get_dma(dev_priv); 582 uint32_t *vb = via_get_dma(dev_priv);
596 SetReg2DAGP(0x0C, (0 | (0 << 16))); 583 SetReg2DAGP(0x0C, (0 | (0 << 16)));
@@ -598,7 +585,7 @@ static inline void via_dummy_bitblt(drm_via_private_t * dev_priv)
598 SetReg2DAGP(0x0, 0x1 | 0x2000 | 0xAA000000); 585 SetReg2DAGP(0x0, 0x1 | 0x2000 | 0xAA000000);
599} 586}
600 587
601static void via_cmdbuf_jump(drm_via_private_t * dev_priv) 588static void via_cmdbuf_jump(drm_via_private_t *dev_priv)
602{ 589{
603 uint32_t agp_base; 590 uint32_t agp_base;
604 uint32_t pause_addr_lo, pause_addr_hi; 591 uint32_t pause_addr_lo, pause_addr_hi;
@@ -617,9 +604,8 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv)
617 */ 604 */
618 605
619 dev_priv->dma_low = 0; 606 dev_priv->dma_low = 0;
620 if (via_cmdbuf_wait(dev_priv, CMDBUF_ALIGNMENT_SIZE) != 0) { 607 if (via_cmdbuf_wait(dev_priv, CMDBUF_ALIGNMENT_SIZE) != 0)
621 DRM_ERROR("via_cmdbuf_jump failed\n"); 608 DRM_ERROR("via_cmdbuf_jump failed\n");
622 }
623 609
624 via_dummy_bitblt(dev_priv); 610 via_dummy_bitblt(dev_priv);
625 via_dummy_bitblt(dev_priv); 611 via_dummy_bitblt(dev_priv);
@@ -657,12 +643,12 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv)
657} 643}
658 644
659 645
660static void via_cmdbuf_rewind(drm_via_private_t * dev_priv) 646static void via_cmdbuf_rewind(drm_via_private_t *dev_priv)
661{ 647{
662 via_cmdbuf_jump(dev_priv); 648 via_cmdbuf_jump(dev_priv);
663} 649}
664 650
665static void via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type) 651static void via_cmdbuf_flush(drm_via_private_t *dev_priv, uint32_t cmd_type)
666{ 652{
667 uint32_t pause_addr_lo, pause_addr_hi; 653 uint32_t pause_addr_lo, pause_addr_hi;
668 654
@@ -670,12 +656,12 @@ static void via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type)
670 via_hook_segment(dev_priv, pause_addr_hi, pause_addr_lo, 0); 656 via_hook_segment(dev_priv, pause_addr_hi, pause_addr_lo, 0);
671} 657}
672 658
673static void via_cmdbuf_pause(drm_via_private_t * dev_priv) 659static void via_cmdbuf_pause(drm_via_private_t *dev_priv)
674{ 660{
675 via_cmdbuf_flush(dev_priv, HC_HAGPBpID_PAUSE); 661 via_cmdbuf_flush(dev_priv, HC_HAGPBpID_PAUSE);
676} 662}
677 663
678static void via_cmdbuf_reset(drm_via_private_t * dev_priv) 664static void via_cmdbuf_reset(drm_via_private_t *dev_priv)
679{ 665{
680 via_cmdbuf_flush(dev_priv, HC_HAGPBpID_STOP); 666 via_cmdbuf_flush(dev_priv, HC_HAGPBpID_STOP);
681 via_wait_idle(dev_priv); 667 via_wait_idle(dev_priv);
@@ -708,9 +694,8 @@ static int via_cmdbuf_size(struct drm_device *dev, void *data, struct drm_file *
708 case VIA_CMDBUF_SPACE: 694 case VIA_CMDBUF_SPACE:
709 while (((tmp_size = via_cmdbuf_space(dev_priv)) < d_siz->size) 695 while (((tmp_size = via_cmdbuf_space(dev_priv)) < d_siz->size)
710 && --count) { 696 && --count) {
711 if (!d_siz->wait) { 697 if (!d_siz->wait)
712 break; 698 break;
713 }
714 } 699 }
715 if (!count) { 700 if (!count) {
716 DRM_ERROR("VIA_CMDBUF_SPACE timed out.\n"); 701 DRM_ERROR("VIA_CMDBUF_SPACE timed out.\n");
@@ -720,9 +705,8 @@ static int via_cmdbuf_size(struct drm_device *dev, void *data, struct drm_file *
720 case VIA_CMDBUF_LAG: 705 case VIA_CMDBUF_LAG:
721 while (((tmp_size = via_cmdbuf_lag(dev_priv)) > d_siz->size) 706 while (((tmp_size = via_cmdbuf_lag(dev_priv)) > d_siz->size)
722 && --count) { 707 && --count) {
723 if (!d_siz->wait) { 708 if (!d_siz->wait)
724 break; 709 break;
725 }
726 } 710 }
727 if (!count) { 711 if (!count) {
728 DRM_ERROR("VIA_CMDBUF_LAG timed out.\n"); 712 DRM_ERROR("VIA_CMDBUF_LAG timed out.\n");
diff --git a/drivers/gpu/drm/via/via_dmablit.c b/drivers/gpu/drm/via/via_dmablit.c
index 4c54f043068e..9b5b4d9dd62c 100644
--- a/drivers/gpu/drm/via/via_dmablit.c
+++ b/drivers/gpu/drm/via/via_dmablit.c
@@ -70,7 +70,7 @@ via_unmap_blit_from_device(struct pci_dev *pdev, drm_via_sg_info_t *vsg)
70 descriptor_this_page; 70 descriptor_this_page;
71 dma_addr_t next = vsg->chain_start; 71 dma_addr_t next = vsg->chain_start;
72 72
73 while(num_desc--) { 73 while (num_desc--) {
74 if (descriptor_this_page-- == 0) { 74 if (descriptor_this_page-- == 0) {
75 cur_descriptor_page--; 75 cur_descriptor_page--;
76 descriptor_this_page = vsg->descriptors_per_page - 1; 76 descriptor_this_page = vsg->descriptors_per_page - 1;
@@ -174,19 +174,19 @@ via_free_sg_info(struct pci_dev *pdev, drm_via_sg_info_t *vsg)
174 struct page *page; 174 struct page *page;
175 int i; 175 int i;
176 176
177 switch(vsg->state) { 177 switch (vsg->state) {
178 case dr_via_device_mapped: 178 case dr_via_device_mapped:
179 via_unmap_blit_from_device(pdev, vsg); 179 via_unmap_blit_from_device(pdev, vsg);
180 case dr_via_desc_pages_alloc: 180 case dr_via_desc_pages_alloc:
181 for (i=0; i<vsg->num_desc_pages; ++i) { 181 for (i = 0; i < vsg->num_desc_pages; ++i) {
182 if (vsg->desc_pages[i] != NULL) 182 if (vsg->desc_pages[i] != NULL)
183 free_page((unsigned long)vsg->desc_pages[i]); 183 free_page((unsigned long)vsg->desc_pages[i]);
184 } 184 }
185 kfree(vsg->desc_pages); 185 kfree(vsg->desc_pages);
186 case dr_via_pages_locked: 186 case dr_via_pages_locked:
187 for (i=0; i<vsg->num_pages; ++i) { 187 for (i = 0; i < vsg->num_pages; ++i) {
188 if ( NULL != (page = vsg->pages[i])) { 188 if (NULL != (page = vsg->pages[i])) {
189 if (! PageReserved(page) && (DMA_FROM_DEVICE == vsg->direction)) 189 if (!PageReserved(page) && (DMA_FROM_DEVICE == vsg->direction))
190 SetPageDirty(page); 190 SetPageDirty(page);
191 page_cache_release(page); 191 page_cache_release(page);
192 } 192 }
@@ -232,7 +232,7 @@ via_lock_all_dma_pages(drm_via_sg_info_t *vsg, drm_via_dmablit_t *xfer)
232{ 232{
233 int ret; 233 int ret;
234 unsigned long first_pfn = VIA_PFN(xfer->mem_addr); 234 unsigned long first_pfn = VIA_PFN(xfer->mem_addr);
235 vsg->num_pages = VIA_PFN(xfer->mem_addr + (xfer->num_lines * xfer->mem_stride -1)) - 235 vsg->num_pages = VIA_PFN(xfer->mem_addr + (xfer->num_lines * xfer->mem_stride - 1)) -
236 first_pfn + 1; 236 first_pfn + 1;
237 237
238 if (NULL == (vsg->pages = vmalloc(sizeof(struct page *) * vsg->num_pages))) 238 if (NULL == (vsg->pages = vmalloc(sizeof(struct page *) * vsg->num_pages)))
@@ -268,7 +268,7 @@ via_alloc_desc_pages(drm_via_sg_info_t *vsg)
268{ 268{
269 int i; 269 int i;
270 270
271 vsg->descriptors_per_page = PAGE_SIZE / sizeof( drm_via_descriptor_t); 271 vsg->descriptors_per_page = PAGE_SIZE / sizeof(drm_via_descriptor_t);
272 vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) / 272 vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) /
273 vsg->descriptors_per_page; 273 vsg->descriptors_per_page;
274 274
@@ -276,7 +276,7 @@ via_alloc_desc_pages(drm_via_sg_info_t *vsg)
276 return -ENOMEM; 276 return -ENOMEM;
277 277
278 vsg->state = dr_via_desc_pages_alloc; 278 vsg->state = dr_via_desc_pages_alloc;
279 for (i=0; i<vsg->num_desc_pages; ++i) { 279 for (i = 0; i < vsg->num_desc_pages; ++i) {
280 if (NULL == (vsg->desc_pages[i] = 280 if (NULL == (vsg->desc_pages[i] =
281 (drm_via_descriptor_t *) __get_free_page(GFP_KERNEL))) 281 (drm_via_descriptor_t *) __get_free_page(GFP_KERNEL)))
282 return -ENOMEM; 282 return -ENOMEM;
@@ -318,21 +318,20 @@ via_dmablit_handler(struct drm_device *dev, int engine, int from_irq)
318 drm_via_blitq_t *blitq = dev_priv->blit_queues + engine; 318 drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
319 int cur; 319 int cur;
320 int done_transfer; 320 int done_transfer;
321 unsigned long irqsave=0; 321 unsigned long irqsave = 0;
322 uint32_t status = 0; 322 uint32_t status = 0;
323 323
324 DRM_DEBUG("DMA blit handler called. engine = %d, from_irq = %d, blitq = 0x%lx\n", 324 DRM_DEBUG("DMA blit handler called. engine = %d, from_irq = %d, blitq = 0x%lx\n",
325 engine, from_irq, (unsigned long) blitq); 325 engine, from_irq, (unsigned long) blitq);
326 326
327 if (from_irq) { 327 if (from_irq)
328 spin_lock(&blitq->blit_lock); 328 spin_lock(&blitq->blit_lock);
329 } else { 329 else
330 spin_lock_irqsave(&blitq->blit_lock, irqsave); 330 spin_lock_irqsave(&blitq->blit_lock, irqsave);
331 }
332 331
333 done_transfer = blitq->is_active && 332 done_transfer = blitq->is_active &&
334 (( status = VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04)) & VIA_DMA_CSR_TD); 333 ((status = VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04)) & VIA_DMA_CSR_TD);
335 done_transfer = done_transfer || ( blitq->aborting && !(status & VIA_DMA_CSR_DE)); 334 done_transfer = done_transfer || (blitq->aborting && !(status & VIA_DMA_CSR_DE));
336 335
337 cur = blitq->cur; 336 cur = blitq->cur;
338 if (done_transfer) { 337 if (done_transfer) {
@@ -377,18 +376,16 @@ via_dmablit_handler(struct drm_device *dev, int engine, int from_irq)
377 if (!timer_pending(&blitq->poll_timer)) 376 if (!timer_pending(&blitq->poll_timer))
378 mod_timer(&blitq->poll_timer, jiffies + 1); 377 mod_timer(&blitq->poll_timer, jiffies + 1);
379 } else { 378 } else {
380 if (timer_pending(&blitq->poll_timer)) { 379 if (timer_pending(&blitq->poll_timer))
381 del_timer(&blitq->poll_timer); 380 del_timer(&blitq->poll_timer);
382 }
383 via_dmablit_engine_off(dev, engine); 381 via_dmablit_engine_off(dev, engine);
384 } 382 }
385 } 383 }
386 384
387 if (from_irq) { 385 if (from_irq)
388 spin_unlock(&blitq->blit_lock); 386 spin_unlock(&blitq->blit_lock);
389 } else { 387 else
390 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 388 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
391 }
392} 389}
393 390
394 391
@@ -414,10 +411,9 @@ via_dmablit_active(drm_via_blitq_t *blitq, int engine, uint32_t handle, wait_que
414 ((blitq->cur_blit_handle - handle) <= (1 << 23)); 411 ((blitq->cur_blit_handle - handle) <= (1 << 23));
415 412
416 if (queue && active) { 413 if (queue && active) {
417 slot = handle - blitq->done_blit_handle + blitq->cur -1; 414 slot = handle - blitq->done_blit_handle + blitq->cur - 1;
418 if (slot >= VIA_NUM_BLIT_SLOTS) { 415 if (slot >= VIA_NUM_BLIT_SLOTS)
419 slot -= VIA_NUM_BLIT_SLOTS; 416 slot -= VIA_NUM_BLIT_SLOTS;
420 }
421 *queue = blitq->blit_queue + slot; 417 *queue = blitq->blit_queue + slot;
422 } 418 }
423 419
@@ -506,12 +502,12 @@ via_dmablit_workqueue(struct work_struct *work)
506 int cur_released; 502 int cur_released;
507 503
508 504
509 DRM_DEBUG("Workqueue task called for blit engine %ld\n",(unsigned long) 505 DRM_DEBUG("Workqueue task called for blit engine %ld\n", (unsigned long)
510 (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues)); 506 (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues));
511 507
512 spin_lock_irqsave(&blitq->blit_lock, irqsave); 508 spin_lock_irqsave(&blitq->blit_lock, irqsave);
513 509
514 while(blitq->serviced != blitq->cur) { 510 while (blitq->serviced != blitq->cur) {
515 511
516 cur_released = blitq->serviced++; 512 cur_released = blitq->serviced++;
517 513
@@ -545,13 +541,13 @@ via_dmablit_workqueue(struct work_struct *work)
545void 541void
546via_init_dmablit(struct drm_device *dev) 542via_init_dmablit(struct drm_device *dev)
547{ 543{
548 int i,j; 544 int i, j;
549 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; 545 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
550 drm_via_blitq_t *blitq; 546 drm_via_blitq_t *blitq;
551 547
552 pci_set_master(dev->pdev); 548 pci_set_master(dev->pdev);
553 549
554 for (i=0; i< VIA_NUM_BLIT_ENGINES; ++i) { 550 for (i = 0; i < VIA_NUM_BLIT_ENGINES; ++i) {
555 blitq = dev_priv->blit_queues + i; 551 blitq = dev_priv->blit_queues + i;
556 blitq->dev = dev; 552 blitq->dev = dev;
557 blitq->cur_blit_handle = 0; 553 blitq->cur_blit_handle = 0;
@@ -564,9 +560,8 @@ via_init_dmablit(struct drm_device *dev)
564 blitq->is_active = 0; 560 blitq->is_active = 0;
565 blitq->aborting = 0; 561 blitq->aborting = 0;
566 spin_lock_init(&blitq->blit_lock); 562 spin_lock_init(&blitq->blit_lock);
567 for (j=0; j<VIA_NUM_BLIT_SLOTS; ++j) { 563 for (j = 0; j < VIA_NUM_BLIT_SLOTS; ++j)
568 DRM_INIT_WAITQUEUE(blitq->blit_queue + j); 564 DRM_INIT_WAITQUEUE(blitq->blit_queue + j);
569 }
570 DRM_INIT_WAITQUEUE(&blitq->busy_queue); 565 DRM_INIT_WAITQUEUE(&blitq->busy_queue);
571 INIT_WORK(&blitq->wq, via_dmablit_workqueue); 566 INIT_WORK(&blitq->wq, via_dmablit_workqueue);
572 setup_timer(&blitq->poll_timer, via_dmablit_timer, 567 setup_timer(&blitq->poll_timer, via_dmablit_timer,
@@ -685,18 +680,17 @@ via_build_sg_info(struct drm_device *dev, drm_via_sg_info_t *vsg, drm_via_dmabli
685static int 680static int
686via_dmablit_grab_slot(drm_via_blitq_t *blitq, int engine) 681via_dmablit_grab_slot(drm_via_blitq_t *blitq, int engine)
687{ 682{
688 int ret=0; 683 int ret = 0;
689 unsigned long irqsave; 684 unsigned long irqsave;
690 685
691 DRM_DEBUG("Num free is %d\n", blitq->num_free); 686 DRM_DEBUG("Num free is %d\n", blitq->num_free);
692 spin_lock_irqsave(&blitq->blit_lock, irqsave); 687 spin_lock_irqsave(&blitq->blit_lock, irqsave);
693 while(blitq->num_free == 0) { 688 while (blitq->num_free == 0) {
694 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 689 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
695 690
696 DRM_WAIT_ON(ret, blitq->busy_queue, DRM_HZ, blitq->num_free > 0); 691 DRM_WAIT_ON(ret, blitq->busy_queue, DRM_HZ, blitq->num_free > 0);
697 if (ret) { 692 if (ret)
698 return (-EINTR == ret) ? -EAGAIN : ret; 693 return (-EINTR == ret) ? -EAGAIN : ret;
699 }
700 694
701 spin_lock_irqsave(&blitq->blit_lock, irqsave); 695 spin_lock_irqsave(&blitq->blit_lock, irqsave);
702 } 696 }
@@ -719,7 +713,7 @@ via_dmablit_release_slot(drm_via_blitq_t *blitq)
719 spin_lock_irqsave(&blitq->blit_lock, irqsave); 713 spin_lock_irqsave(&blitq->blit_lock, irqsave);
720 blitq->num_free++; 714 blitq->num_free++;
721 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 715 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
722 DRM_WAKEUP( &blitq->busy_queue ); 716 DRM_WAKEUP(&blitq->busy_queue);
723} 717}
724 718
725/* 719/*
@@ -744,9 +738,8 @@ via_dmablit(struct drm_device *dev, drm_via_dmablit_t *xfer)
744 738
745 engine = (xfer->to_fb) ? 0 : 1; 739 engine = (xfer->to_fb) ? 0 : 1;
746 blitq = dev_priv->blit_queues + engine; 740 blitq = dev_priv->blit_queues + engine;
747 if (0 != (ret = via_dmablit_grab_slot(blitq, engine))) { 741 if (0 != (ret = via_dmablit_grab_slot(blitq, engine)))
748 return ret; 742 return ret;
749 }
750 if (NULL == (vsg = kmalloc(sizeof(*vsg), GFP_KERNEL))) { 743 if (NULL == (vsg = kmalloc(sizeof(*vsg), GFP_KERNEL))) {
751 via_dmablit_release_slot(blitq); 744 via_dmablit_release_slot(blitq);
752 return -ENOMEM; 745 return -ENOMEM;
@@ -780,7 +773,7 @@ via_dmablit(struct drm_device *dev, drm_via_dmablit_t *xfer)
780 */ 773 */
781 774
782int 775int
783via_dma_blit_sync( struct drm_device *dev, void *data, struct drm_file *file_priv ) 776via_dma_blit_sync(struct drm_device *dev, void *data, struct drm_file *file_priv)
784{ 777{
785 drm_via_blitsync_t *sync = data; 778 drm_via_blitsync_t *sync = data;
786 int err; 779 int err;
@@ -804,7 +797,7 @@ via_dma_blit_sync( struct drm_device *dev, void *data, struct drm_file *file_pri
804 */ 797 */
805 798
806int 799int
807via_dma_blit( struct drm_device *dev, void *data, struct drm_file *file_priv ) 800via_dma_blit(struct drm_device *dev, void *data, struct drm_file *file_priv)
808{ 801{
809 drm_via_dmablit_t *xfer = data; 802 drm_via_dmablit_t *xfer = data;
810 int err; 803 int err;
diff --git a/drivers/gpu/drm/via/via_dmablit.h b/drivers/gpu/drm/via/via_dmablit.h
index 7408a547a036..9b662a327cef 100644
--- a/drivers/gpu/drm/via/via_dmablit.h
+++ b/drivers/gpu/drm/via/via_dmablit.h
@@ -45,12 +45,12 @@ typedef struct _drm_via_sg_info {
45 int num_desc; 45 int num_desc;
46 enum dma_data_direction direction; 46 enum dma_data_direction direction;
47 unsigned char *bounce_buffer; 47 unsigned char *bounce_buffer;
48 dma_addr_t chain_start; 48 dma_addr_t chain_start;
49 uint32_t free_on_sequence; 49 uint32_t free_on_sequence;
50 unsigned int descriptors_per_page; 50 unsigned int descriptors_per_page;
51 int aborted; 51 int aborted;
52 enum { 52 enum {
53 dr_via_device_mapped, 53 dr_via_device_mapped,
54 dr_via_desc_pages_alloc, 54 dr_via_desc_pages_alloc,
55 dr_via_pages_locked, 55 dr_via_pages_locked,
56 dr_via_pages_alloc, 56 dr_via_pages_alloc,
@@ -68,7 +68,7 @@ typedef struct _drm_via_blitq {
68 unsigned num_free; 68 unsigned num_free;
69 unsigned num_outstanding; 69 unsigned num_outstanding;
70 unsigned long end; 70 unsigned long end;
71 int aborting; 71 int aborting;
72 int is_active; 72 int is_active;
73 drm_via_sg_info_t *blits[VIA_NUM_BLIT_SLOTS]; 73 drm_via_sg_info_t *blits[VIA_NUM_BLIT_SLOTS];
74 spinlock_t blit_lock; 74 spinlock_t blit_lock;
diff --git a/drivers/gpu/drm/via/via_drv.h b/drivers/gpu/drm/via/via_drv.h
index cafcb844a223..9cf87d912325 100644
--- a/drivers/gpu/drm/via/via_drv.h
+++ b/drivers/gpu/drm/via/via_drv.h
@@ -107,9 +107,9 @@ enum via_family {
107#define VIA_BASE ((dev_priv->mmio)) 107#define VIA_BASE ((dev_priv->mmio))
108 108
109#define VIA_READ(reg) DRM_READ32(VIA_BASE, reg) 109#define VIA_READ(reg) DRM_READ32(VIA_BASE, reg)
110#define VIA_WRITE(reg,val) DRM_WRITE32(VIA_BASE, reg, val) 110#define VIA_WRITE(reg, val) DRM_WRITE32(VIA_BASE, reg, val)
111#define VIA_READ8(reg) DRM_READ8(VIA_BASE, reg) 111#define VIA_READ8(reg) DRM_READ8(VIA_BASE, reg)
112#define VIA_WRITE8(reg,val) DRM_WRITE8(VIA_BASE, reg, val) 112#define VIA_WRITE8(reg, val) DRM_WRITE8(VIA_BASE, reg, val)
113 113
114extern struct drm_ioctl_desc via_ioctls[]; 114extern struct drm_ioctl_desc via_ioctls[];
115extern int via_max_ioctl; 115extern int via_max_ioctl;
@@ -121,28 +121,28 @@ extern int via_agp_init(struct drm_device *dev, void *data, struct drm_file *fil
121extern int via_map_init(struct drm_device *dev, void *data, struct drm_file *file_priv); 121extern int via_map_init(struct drm_device *dev, void *data, struct drm_file *file_priv);
122extern int via_decoder_futex(struct drm_device *dev, void *data, struct drm_file *file_priv); 122extern int via_decoder_futex(struct drm_device *dev, void *data, struct drm_file *file_priv);
123extern int via_wait_irq(struct drm_device *dev, void *data, struct drm_file *file_priv); 123extern int via_wait_irq(struct drm_device *dev, void *data, struct drm_file *file_priv);
124extern int via_dma_blit_sync( struct drm_device *dev, void *data, struct drm_file *file_priv ); 124extern int via_dma_blit_sync(struct drm_device *dev, void *data, struct drm_file *file_priv);
125extern int via_dma_blit( struct drm_device *dev, void *data, struct drm_file *file_priv ); 125extern int via_dma_blit(struct drm_device *dev, void *data, struct drm_file *file_priv);
126 126
127extern int via_driver_load(struct drm_device *dev, unsigned long chipset); 127extern int via_driver_load(struct drm_device *dev, unsigned long chipset);
128extern int via_driver_unload(struct drm_device *dev); 128extern int via_driver_unload(struct drm_device *dev);
129 129
130extern int via_init_context(struct drm_device * dev, int context); 130extern int via_init_context(struct drm_device *dev, int context);
131extern int via_final_context(struct drm_device * dev, int context); 131extern int via_final_context(struct drm_device *dev, int context);
132 132
133extern int via_do_cleanup_map(struct drm_device * dev); 133extern int via_do_cleanup_map(struct drm_device *dev);
134extern u32 via_get_vblank_counter(struct drm_device *dev, int crtc); 134extern u32 via_get_vblank_counter(struct drm_device *dev, int crtc);
135extern int via_enable_vblank(struct drm_device *dev, int crtc); 135extern int via_enable_vblank(struct drm_device *dev, int crtc);
136extern void via_disable_vblank(struct drm_device *dev, int crtc); 136extern void via_disable_vblank(struct drm_device *dev, int crtc);
137 137
138extern irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS); 138extern irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS);
139extern void via_driver_irq_preinstall(struct drm_device * dev); 139extern void via_driver_irq_preinstall(struct drm_device *dev);
140extern int via_driver_irq_postinstall(struct drm_device *dev); 140extern int via_driver_irq_postinstall(struct drm_device *dev);
141extern void via_driver_irq_uninstall(struct drm_device * dev); 141extern void via_driver_irq_uninstall(struct drm_device *dev);
142 142
143extern int via_dma_cleanup(struct drm_device * dev); 143extern int via_dma_cleanup(struct drm_device *dev);
144extern void via_init_command_verifier(void); 144extern void via_init_command_verifier(void);
145extern int via_driver_dma_quiescent(struct drm_device * dev); 145extern int via_driver_dma_quiescent(struct drm_device *dev);
146extern void via_init_futex(drm_via_private_t *dev_priv); 146extern void via_init_futex(drm_via_private_t *dev_priv);
147extern void via_cleanup_futex(drm_via_private_t *dev_priv); 147extern void via_cleanup_futex(drm_via_private_t *dev_priv);
148extern void via_release_futex(drm_via_private_t *dev_priv, int context); 148extern void via_release_futex(drm_via_private_t *dev_priv, int context);
diff --git a/drivers/gpu/drm/via/via_irq.c b/drivers/gpu/drm/via/via_irq.c
index 34079f251cd4..d391f48ef87a 100644
--- a/drivers/gpu/drm/via/via_irq.c
+++ b/drivers/gpu/drm/via/via_irq.c
@@ -141,11 +141,10 @@ irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
141 atomic_inc(&cur_irq->irq_received); 141 atomic_inc(&cur_irq->irq_received);
142 DRM_WAKEUP(&cur_irq->irq_queue); 142 DRM_WAKEUP(&cur_irq->irq_queue);
143 handled = 1; 143 handled = 1;
144 if (dev_priv->irq_map[drm_via_irq_dma0_td] == i) { 144 if (dev_priv->irq_map[drm_via_irq_dma0_td] == i)
145 via_dmablit_handler(dev, 0, 1); 145 via_dmablit_handler(dev, 0, 1);
146 } else if (dev_priv->irq_map[drm_via_irq_dma1_td] == i) { 146 else if (dev_priv->irq_map[drm_via_irq_dma1_td] == i)
147 via_dmablit_handler(dev, 1, 1); 147 via_dmablit_handler(dev, 1, 1);
148 }
149 } 148 }
150 cur_irq++; 149 cur_irq++;
151 } 150 }
@@ -160,7 +159,7 @@ irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
160 return IRQ_NONE; 159 return IRQ_NONE;
161} 160}
162 161
163static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv) 162static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t *dev_priv)
164{ 163{
165 u32 status; 164 u32 status;
166 165
@@ -207,7 +206,7 @@ void via_disable_vblank(struct drm_device *dev, int crtc)
207} 206}
208 207
209static int 208static int
210via_driver_irq_wait(struct drm_device * dev, unsigned int irq, int force_sequence, 209via_driver_irq_wait(struct drm_device *dev, unsigned int irq, int force_sequence,
211 unsigned int *sequence) 210 unsigned int *sequence)
212{ 211{
213 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; 212 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
@@ -260,7 +259,7 @@ via_driver_irq_wait(struct drm_device * dev, unsigned int irq, int force_sequenc
260 * drm_dma.h hooks 259 * drm_dma.h hooks
261 */ 260 */
262 261
263void via_driver_irq_preinstall(struct drm_device * dev) 262void via_driver_irq_preinstall(struct drm_device *dev)
264{ 263{
265 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; 264 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
266 u32 status; 265 u32 status;
@@ -329,7 +328,7 @@ int via_driver_irq_postinstall(struct drm_device *dev)
329 return 0; 328 return 0;
330} 329}
331 330
332void via_driver_irq_uninstall(struct drm_device * dev) 331void via_driver_irq_uninstall(struct drm_device *dev)
333{ 332{
334 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; 333 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
335 u32 status; 334 u32 status;
diff --git a/drivers/gpu/drm/via/via_map.c b/drivers/gpu/drm/via/via_map.c
index 6e6f91591639..6cca9a709f7a 100644
--- a/drivers/gpu/drm/via/via_map.c
+++ b/drivers/gpu/drm/via/via_map.c
@@ -25,7 +25,7 @@
25#include "via_drm.h" 25#include "via_drm.h"
26#include "via_drv.h" 26#include "via_drv.h"
27 27
28static int via_do_init_map(struct drm_device * dev, drm_via_init_t * init) 28static int via_do_init_map(struct drm_device *dev, drm_via_init_t *init)
29{ 29{
30 drm_via_private_t *dev_priv = dev->dev_private; 30 drm_via_private_t *dev_priv = dev->dev_private;
31 31
@@ -68,7 +68,7 @@ static int via_do_init_map(struct drm_device * dev, drm_via_init_t * init)
68 return 0; 68 return 0;
69} 69}
70 70
71int via_do_cleanup_map(struct drm_device * dev) 71int via_do_cleanup_map(struct drm_device *dev)
72{ 72{
73 via_dma_cleanup(dev); 73 via_dma_cleanup(dev);
74 74
diff --git a/drivers/gpu/drm/via/via_mm.c b/drivers/gpu/drm/via/via_mm.c
index f694cb5ededc..6cc2dadae3ef 100644
--- a/drivers/gpu/drm/via/via_mm.c
+++ b/drivers/gpu/drm/via/via_mm.c
@@ -31,7 +31,7 @@
31#include "drm_sman.h" 31#include "drm_sman.h"
32 32
33#define VIA_MM_ALIGN_SHIFT 4 33#define VIA_MM_ALIGN_SHIFT 4
34#define VIA_MM_ALIGN_MASK ( (1 << VIA_MM_ALIGN_SHIFT) - 1) 34#define VIA_MM_ALIGN_MASK ((1 << VIA_MM_ALIGN_SHIFT) - 1)
35 35
36int via_agp_init(struct drm_device *dev, void *data, struct drm_file *file_priv) 36int via_agp_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
37{ 37{
@@ -172,7 +172,7 @@ int via_mem_free(struct drm_device *dev, void *data, struct drm_file *file_priv)
172} 172}
173 173
174 174
175void via_reclaim_buffers_locked(struct drm_device * dev, 175void via_reclaim_buffers_locked(struct drm_device *dev,
176 struct drm_file *file_priv) 176 struct drm_file *file_priv)
177{ 177{
178 drm_via_private_t *dev_priv = dev->dev_private; 178 drm_via_private_t *dev_priv = dev->dev_private;
@@ -183,9 +183,8 @@ void via_reclaim_buffers_locked(struct drm_device * dev,
183 return; 183 return;
184 } 184 }
185 185
186 if (dev->driver->dma_quiescent) { 186 if (dev->driver->dma_quiescent)
187 dev->driver->dma_quiescent(dev); 187 dev->driver->dma_quiescent(dev);
188 }
189 188
190 drm_sman_owner_cleanup(&dev_priv->sman, (unsigned long)file_priv); 189 drm_sman_owner_cleanup(&dev_priv->sman, (unsigned long)file_priv);
191 mutex_unlock(&dev->struct_mutex); 190 mutex_unlock(&dev->struct_mutex);
diff --git a/drivers/gpu/drm/via/via_verifier.c b/drivers/gpu/drm/via/via_verifier.c
index 46a579198747..48957b856d41 100644
--- a/drivers/gpu/drm/via/via_verifier.c
+++ b/drivers/gpu/drm/via/via_verifier.c
@@ -235,7 +235,7 @@ static hazard_t table2[256];
235static hazard_t table3[256]; 235static hazard_t table3[256];
236 236
237static __inline__ int 237static __inline__ int
238eat_words(const uint32_t ** buf, const uint32_t * buf_end, unsigned num_words) 238eat_words(const uint32_t **buf, const uint32_t *buf_end, unsigned num_words)
239{ 239{
240 if ((buf_end - *buf) >= num_words) { 240 if ((buf_end - *buf) >= num_words) {
241 *buf += num_words; 241 *buf += num_words;
@@ -252,7 +252,7 @@ eat_words(const uint32_t ** buf, const uint32_t * buf_end, unsigned num_words)
252static __inline__ drm_local_map_t *via_drm_lookup_agp_map(drm_via_state_t *seq, 252static __inline__ drm_local_map_t *via_drm_lookup_agp_map(drm_via_state_t *seq,
253 unsigned long offset, 253 unsigned long offset,
254 unsigned long size, 254 unsigned long size,
255 struct drm_device * dev) 255 struct drm_device *dev)
256{ 256{
257 struct drm_map_list *r_list; 257 struct drm_map_list *r_list;
258 drm_local_map_t *map = seq->map_cache; 258 drm_local_map_t *map = seq->map_cache;
@@ -344,7 +344,7 @@ static __inline__ int finish_current_sequence(drm_via_state_t * cur_seq)
344} 344}
345 345
346static __inline__ int 346static __inline__ int
347investigate_hazard(uint32_t cmd, hazard_t hz, drm_via_state_t * cur_seq) 347investigate_hazard(uint32_t cmd, hazard_t hz, drm_via_state_t *cur_seq)
348{ 348{
349 register uint32_t tmp, *tmp_addr; 349 register uint32_t tmp, *tmp_addr;
350 350
@@ -518,7 +518,7 @@ investigate_hazard(uint32_t cmd, hazard_t hz, drm_via_state_t * cur_seq)
518 518
519static __inline__ int 519static __inline__ int
520via_check_prim_list(uint32_t const **buffer, const uint32_t * buf_end, 520via_check_prim_list(uint32_t const **buffer, const uint32_t * buf_end,
521 drm_via_state_t * cur_seq) 521 drm_via_state_t *cur_seq)
522{ 522{
523 drm_via_private_t *dev_priv = 523 drm_via_private_t *dev_priv =
524 (drm_via_private_t *) cur_seq->dev->dev_private; 524 (drm_via_private_t *) cur_seq->dev->dev_private;
@@ -621,8 +621,8 @@ via_check_prim_list(uint32_t const **buffer, const uint32_t * buf_end,
621} 621}
622 622
623static __inline__ verifier_state_t 623static __inline__ verifier_state_t
624via_check_header2(uint32_t const **buffer, const uint32_t * buf_end, 624via_check_header2(uint32_t const **buffer, const uint32_t *buf_end,
625 drm_via_state_t * hc_state) 625 drm_via_state_t *hc_state)
626{ 626{
627 uint32_t cmd; 627 uint32_t cmd;
628 int hz_mode; 628 int hz_mode;
@@ -706,16 +706,15 @@ via_check_header2(uint32_t const **buffer, const uint32_t * buf_end,
706 return state_error; 706 return state_error;
707 } 707 }
708 } 708 }
709 if (hc_state->unfinished && finish_current_sequence(hc_state)) { 709 if (hc_state->unfinished && finish_current_sequence(hc_state))
710 return state_error; 710 return state_error;
711 }
712 *buffer = buf; 711 *buffer = buf;
713 return state_command; 712 return state_command;
714} 713}
715 714
716static __inline__ verifier_state_t 715static __inline__ verifier_state_t
717via_parse_header2(drm_via_private_t * dev_priv, uint32_t const **buffer, 716via_parse_header2(drm_via_private_t *dev_priv, uint32_t const **buffer,
718 const uint32_t * buf_end, int *fire_count) 717 const uint32_t *buf_end, int *fire_count)
719{ 718{
720 uint32_t cmd; 719 uint32_t cmd;
721 const uint32_t *buf = *buffer; 720 const uint32_t *buf = *buffer;
@@ -833,8 +832,8 @@ via_check_header1(uint32_t const **buffer, const uint32_t * buf_end)
833} 832}
834 833
835static __inline__ verifier_state_t 834static __inline__ verifier_state_t
836via_parse_header1(drm_via_private_t * dev_priv, uint32_t const **buffer, 835via_parse_header1(drm_via_private_t *dev_priv, uint32_t const **buffer,
837 const uint32_t * buf_end) 836 const uint32_t *buf_end)
838{ 837{
839 register uint32_t cmd; 838 register uint32_t cmd;
840 const uint32_t *buf = *buffer; 839 const uint32_t *buf = *buffer;
@@ -851,7 +850,7 @@ via_parse_header1(drm_via_private_t * dev_priv, uint32_t const **buffer,
851} 850}
852 851
853static __inline__ verifier_state_t 852static __inline__ verifier_state_t
854via_check_vheader5(uint32_t const **buffer, const uint32_t * buf_end) 853via_check_vheader5(uint32_t const **buffer, const uint32_t *buf_end)
855{ 854{
856 uint32_t data; 855 uint32_t data;
857 const uint32_t *buf = *buffer; 856 const uint32_t *buf = *buffer;
@@ -884,8 +883,8 @@ via_check_vheader5(uint32_t const **buffer, const uint32_t * buf_end)
884} 883}
885 884
886static __inline__ verifier_state_t 885static __inline__ verifier_state_t
887via_parse_vheader5(drm_via_private_t * dev_priv, uint32_t const **buffer, 886via_parse_vheader5(drm_via_private_t *dev_priv, uint32_t const **buffer,
888 const uint32_t * buf_end) 887 const uint32_t *buf_end)
889{ 888{
890 uint32_t addr, count, i; 889 uint32_t addr, count, i;
891 const uint32_t *buf = *buffer; 890 const uint32_t *buf = *buffer;
@@ -893,9 +892,8 @@ via_parse_vheader5(drm_via_private_t * dev_priv, uint32_t const **buffer,
893 addr = *buf++ & ~VIA_VIDEOMASK; 892 addr = *buf++ & ~VIA_VIDEOMASK;
894 i = count = *buf; 893 i = count = *buf;
895 buf += 3; 894 buf += 3;
896 while (i--) { 895 while (i--)
897 VIA_WRITE(addr, *buf++); 896 VIA_WRITE(addr, *buf++);
898 }
899 if (count & 3) 897 if (count & 3)
900 buf += 4 - (count & 3); 898 buf += 4 - (count & 3);
901 *buffer = buf; 899 *buffer = buf;
@@ -940,8 +938,8 @@ via_check_vheader6(uint32_t const **buffer, const uint32_t * buf_end)
940} 938}
941 939
942static __inline__ verifier_state_t 940static __inline__ verifier_state_t
943via_parse_vheader6(drm_via_private_t * dev_priv, uint32_t const **buffer, 941via_parse_vheader6(drm_via_private_t *dev_priv, uint32_t const **buffer,
944 const uint32_t * buf_end) 942 const uint32_t *buf_end)
945{ 943{
946 944
947 uint32_t addr, count, i; 945 uint32_t addr, count, i;
@@ -1037,7 +1035,7 @@ via_verify_command_stream(const uint32_t * buf, unsigned int size,
1037} 1035}
1038 1036
1039int 1037int
1040via_parse_command_stream(struct drm_device * dev, const uint32_t * buf, 1038via_parse_command_stream(struct drm_device *dev, const uint32_t *buf,
1041 unsigned int size) 1039 unsigned int size)
1042{ 1040{
1043 1041
@@ -1085,9 +1083,8 @@ via_parse_command_stream(struct drm_device * dev, const uint32_t * buf,
1085 return -EINVAL; 1083 return -EINVAL;
1086 } 1084 }
1087 } 1085 }
1088 if (state == state_error) { 1086 if (state == state_error)
1089 return -EINVAL; 1087 return -EINVAL;
1090 }
1091 return 0; 1088 return 0;
1092} 1089}
1093 1090
@@ -1096,13 +1093,11 @@ setup_hazard_table(hz_init_t init_table[], hazard_t table[], int size)
1096{ 1093{
1097 int i; 1094 int i;
1098 1095
1099 for (i = 0; i < 256; ++i) { 1096 for (i = 0; i < 256; ++i)
1100 table[i] = forbidden_command; 1097 table[i] = forbidden_command;
1101 }
1102 1098
1103 for (i = 0; i < size; ++i) { 1099 for (i = 0; i < size; ++i)
1104 table[init_table[i].code] = init_table[i].hz; 1100 table[init_table[i].code] = init_table[i].hz;
1105 }
1106} 1101}
1107 1102
1108void via_init_command_verifier(void) 1103void via_init_command_verifier(void)
diff --git a/drivers/gpu/drm/via/via_verifier.h b/drivers/gpu/drm/via/via_verifier.h
index d6f8214b69f5..26b6d361ab95 100644
--- a/drivers/gpu/drm/via/via_verifier.h
+++ b/drivers/gpu/drm/via/via_verifier.h
@@ -54,8 +54,8 @@ typedef struct {
54 const uint32_t *buf_start; 54 const uint32_t *buf_start;
55} drm_via_state_t; 55} drm_via_state_t;
56 56
57extern int via_verify_command_stream(const uint32_t * buf, unsigned int size, 57extern int via_verify_command_stream(const uint32_t *buf, unsigned int size,
58 struct drm_device * dev, int agp); 58 struct drm_device *dev, int agp);
59extern int via_parse_command_stream(struct drm_device *dev, const uint32_t *buf, 59extern int via_parse_command_stream(struct drm_device *dev, const uint32_t *buf,
60 unsigned int size); 60 unsigned int size);
61 61
diff --git a/drivers/gpu/drm/via/via_video.c b/drivers/gpu/drm/via/via_video.c
index 6efac8117c93..675d311f038f 100644
--- a/drivers/gpu/drm/via/via_video.c
+++ b/drivers/gpu/drm/via/via_video.c
@@ -29,7 +29,7 @@
29#include "via_drm.h" 29#include "via_drm.h"
30#include "via_drv.h" 30#include "via_drv.h"
31 31
32void via_init_futex(drm_via_private_t * dev_priv) 32void via_init_futex(drm_via_private_t *dev_priv)
33{ 33{
34 unsigned int i; 34 unsigned int i;
35 35
@@ -41,11 +41,11 @@ void via_init_futex(drm_via_private_t * dev_priv)
41 } 41 }
42} 42}
43 43
44void via_cleanup_futex(drm_via_private_t * dev_priv) 44void via_cleanup_futex(drm_via_private_t *dev_priv)
45{ 45{
46} 46}
47 47
48void via_release_futex(drm_via_private_t * dev_priv, int context) 48void via_release_futex(drm_via_private_t *dev_priv, int context)
49{ 49{
50 unsigned int i; 50 unsigned int i;
51 volatile int *lock; 51 volatile int *lock;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index b793c8c9acb3..9dd395b90216 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -764,7 +764,7 @@ static struct drm_driver driver = {
764 764
765static int vmw_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 765static int vmw_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
766{ 766{
767 return drm_get_dev(pdev, ent, &driver); 767 return drm_get_pci_dev(pdev, ent, &driver);
768} 768}
769 769
770static int __init vmwgfx_init(void) 770static int __init vmwgfx_init(void)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
index eaad52095339..429f917b60bf 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
@@ -164,7 +164,7 @@ struct vmw_vga_topology_state {
164struct vmw_private { 164struct vmw_private {
165 struct ttm_bo_device bdev; 165 struct ttm_bo_device bdev;
166 struct ttm_bo_global_ref bo_global_ref; 166 struct ttm_bo_global_ref bo_global_ref;
167 struct ttm_global_reference mem_global_ref; 167 struct drm_global_reference mem_global_ref;
168 168
169 struct vmw_fifo_state fifo; 169 struct vmw_fifo_state fifo;
170 170
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
index b0866f04ec76..870967a97c15 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
@@ -528,7 +528,7 @@ int vmw_fb_init(struct vmw_private *vmw_priv)
528 * Dirty & Deferred IO 528 * Dirty & Deferred IO
529 */ 529 */
530 par->dirty.x1 = par->dirty.x2 = 0; 530 par->dirty.x1 = par->dirty.x2 = 0;
531 par->dirty.y1 = par->dirty.y1 = 0; 531 par->dirty.y1 = par->dirty.y2 = 0;
532 par->dirty.active = true; 532 par->dirty.active = true;
533 spin_lock_init(&par->dirty.lock); 533 spin_lock_init(&par->dirty.lock);
534 info->fbdefio = &vmw_defio; 534 info->fbdefio = &vmw_defio;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index f1d626112415..437ac786277a 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -972,6 +972,7 @@ int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
972 ret = copy_from_user(rects, user_rects, rects_size); 972 ret = copy_from_user(rects, user_rects, rects_size);
973 if (unlikely(ret != 0)) { 973 if (unlikely(ret != 0)) {
974 DRM_ERROR("Failed to get rects.\n"); 974 DRM_ERROR("Failed to get rects.\n");
975 ret = -EFAULT;
975 goto out_free; 976 goto out_free;
976 } 977 }
977 978
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
index 8612378b131e..5f2d5df01e5c 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
@@ -1017,7 +1017,7 @@ int vmw_gmr_id_alloc(struct vmw_private *dev_priv, uint32_t *p_id)
1017} 1017}
1018 1018
1019/* 1019/*
1020 * Stream managment 1020 * Stream management
1021 */ 1021 */
1022 1022
1023static void vmw_stream_destroy(struct vmw_resource *res) 1023static void vmw_stream_destroy(struct vmw_resource *res)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c
index e3df4adfb4d8..83123287c60c 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c
@@ -44,29 +44,29 @@ int vmw_mmap(struct file *filp, struct vm_area_struct *vma)
44 return ttm_bo_mmap(filp, vma, &dev_priv->bdev); 44 return ttm_bo_mmap(filp, vma, &dev_priv->bdev);
45} 45}
46 46
47static int vmw_ttm_mem_global_init(struct ttm_global_reference *ref) 47static int vmw_ttm_mem_global_init(struct drm_global_reference *ref)
48{ 48{
49 DRM_INFO("global init.\n"); 49 DRM_INFO("global init.\n");
50 return ttm_mem_global_init(ref->object); 50 return ttm_mem_global_init(ref->object);
51} 51}
52 52
53static void vmw_ttm_mem_global_release(struct ttm_global_reference *ref) 53static void vmw_ttm_mem_global_release(struct drm_global_reference *ref)
54{ 54{
55 ttm_mem_global_release(ref->object); 55 ttm_mem_global_release(ref->object);
56} 56}
57 57
58int vmw_ttm_global_init(struct vmw_private *dev_priv) 58int vmw_ttm_global_init(struct vmw_private *dev_priv)
59{ 59{
60 struct ttm_global_reference *global_ref; 60 struct drm_global_reference *global_ref;
61 int ret; 61 int ret;
62 62
63 global_ref = &dev_priv->mem_global_ref; 63 global_ref = &dev_priv->mem_global_ref;
64 global_ref->global_type = TTM_GLOBAL_TTM_MEM; 64 global_ref->global_type = DRM_GLOBAL_TTM_MEM;
65 global_ref->size = sizeof(struct ttm_mem_global); 65 global_ref->size = sizeof(struct ttm_mem_global);
66 global_ref->init = &vmw_ttm_mem_global_init; 66 global_ref->init = &vmw_ttm_mem_global_init;
67 global_ref->release = &vmw_ttm_mem_global_release; 67 global_ref->release = &vmw_ttm_mem_global_release;
68 68
69 ret = ttm_global_item_ref(global_ref); 69 ret = drm_global_item_ref(global_ref);
70 if (unlikely(ret != 0)) { 70 if (unlikely(ret != 0)) {
71 DRM_ERROR("Failed setting up TTM memory accounting.\n"); 71 DRM_ERROR("Failed setting up TTM memory accounting.\n");
72 return ret; 72 return ret;
@@ -75,11 +75,11 @@ int vmw_ttm_global_init(struct vmw_private *dev_priv)
75 dev_priv->bo_global_ref.mem_glob = 75 dev_priv->bo_global_ref.mem_glob =
76 dev_priv->mem_global_ref.object; 76 dev_priv->mem_global_ref.object;
77 global_ref = &dev_priv->bo_global_ref.ref; 77 global_ref = &dev_priv->bo_global_ref.ref;
78 global_ref->global_type = TTM_GLOBAL_TTM_BO; 78 global_ref->global_type = DRM_GLOBAL_TTM_BO;
79 global_ref->size = sizeof(struct ttm_bo_global); 79 global_ref->size = sizeof(struct ttm_bo_global);
80 global_ref->init = &ttm_bo_global_init; 80 global_ref->init = &ttm_bo_global_init;
81 global_ref->release = &ttm_bo_global_release; 81 global_ref->release = &ttm_bo_global_release;
82 ret = ttm_global_item_ref(global_ref); 82 ret = drm_global_item_ref(global_ref);
83 83
84 if (unlikely(ret != 0)) { 84 if (unlikely(ret != 0)) {
85 DRM_ERROR("Failed setting up TTM buffer objects.\n"); 85 DRM_ERROR("Failed setting up TTM buffer objects.\n");
@@ -88,12 +88,12 @@ int vmw_ttm_global_init(struct vmw_private *dev_priv)
88 88
89 return 0; 89 return 0;
90out_no_bo: 90out_no_bo:
91 ttm_global_item_unref(&dev_priv->mem_global_ref); 91 drm_global_item_unref(&dev_priv->mem_global_ref);
92 return ret; 92 return ret;
93} 93}
94 94
95void vmw_ttm_global_release(struct vmw_private *dev_priv) 95void vmw_ttm_global_release(struct vmw_private *dev_priv)
96{ 96{
97 ttm_global_item_unref(&dev_priv->bo_global_ref.ref); 97 drm_global_item_unref(&dev_priv->bo_global_ref.ref);
98 ttm_global_item_unref(&dev_priv->mem_global_ref); 98 drm_global_item_unref(&dev_priv->mem_global_ref);
99} 99}
diff --git a/drivers/hid/Kconfig b/drivers/hid/Kconfig
index 132278fa6240..6369ba7f96f8 100644
--- a/drivers/hid/Kconfig
+++ b/drivers/hid/Kconfig
@@ -68,6 +68,14 @@ config HID_A4TECH
68 ---help--- 68 ---help---
69 Support for A4 tech X5 and WOP-35 / Trust 450L mice. 69 Support for A4 tech X5 and WOP-35 / Trust 450L mice.
70 70
71config HID_ACRUX_FF
72 tristate "ACRUX force feedback support"
73 depends on USB_HID
74 select INPUT_FF_MEMLESS
75 ---help---
76 Say Y here if you want to enable force feedback support for ACRUX
77 game controllers.
78
71config HID_APPLE 79config HID_APPLE
72 tristate "Apple" if EMBEDDED 80 tristate "Apple" if EMBEDDED
73 depends on (USB_HID || BT_HIDP) 81 depends on (USB_HID || BT_HIDP)
@@ -148,6 +156,12 @@ config HID_EGALAX
148 ---help--- 156 ---help---
149 Support for the eGalax dual-touch panel. 157 Support for the eGalax dual-touch panel.
150 158
159config HID_ELECOM
160 tristate "ELECOM"
161 depends on BT_HIDP
162 ---help---
163 Support for the ELECOM BM084 (bluetooth mouse).
164
151config HID_EZKEY 165config HID_EZKEY
152 tristate "Ezkey" if EMBEDDED 166 tristate "Ezkey" if EMBEDDED
153 depends on USB_HID 167 depends on USB_HID
@@ -358,6 +372,7 @@ config HID_ROCCAT
358config HID_ROCCAT_KONE 372config HID_ROCCAT_KONE
359 tristate "Roccat Kone Mouse support" 373 tristate "Roccat Kone Mouse support"
360 depends on USB_HID 374 depends on USB_HID
375 select HID_ROCCAT
361 ---help--- 376 ---help---
362 Support for Roccat Kone mouse. 377 Support for Roccat Kone mouse.
363 378
@@ -416,10 +431,11 @@ config SMARTJOYPLUS_FF
416 enable force feedback support for it. 431 enable force feedback support for it.
417 432
418config HID_TOPSEED 433config HID_TOPSEED
419 tristate "TopSeed Cyberlink remote control support" 434 tristate "TopSeed Cyberlink, BTC Emprex, Conceptronic remote control support"
420 depends on USB_HID 435 depends on USB_HID
421 ---help--- 436 ---help---
422 Say Y if you have a TopSeed Cyberlink or BTC Emprex remote control. 437 Say Y if you have a TopSeed Cyberlink or BTC Emprex or Conceptronic
438 CLLRCMCE remote control.
423 439
424config HID_THRUSTMASTER 440config HID_THRUSTMASTER
425 tristate "ThrustMaster devices support" 441 tristate "ThrustMaster devices support"
diff --git a/drivers/hid/Makefile b/drivers/hid/Makefile
index 987fa0627367..46f037f3df80 100644
--- a/drivers/hid/Makefile
+++ b/drivers/hid/Makefile
@@ -24,6 +24,7 @@ endif
24 24
25obj-$(CONFIG_HID_3M_PCT) += hid-3m-pct.o 25obj-$(CONFIG_HID_3M_PCT) += hid-3m-pct.o
26obj-$(CONFIG_HID_A4TECH) += hid-a4tech.o 26obj-$(CONFIG_HID_A4TECH) += hid-a4tech.o
27obj-$(CONFIG_HID_ACRUX_FF) += hid-axff.o
27obj-$(CONFIG_HID_APPLE) += hid-apple.o 28obj-$(CONFIG_HID_APPLE) += hid-apple.o
28obj-$(CONFIG_HID_BELKIN) += hid-belkin.o 29obj-$(CONFIG_HID_BELKIN) += hid-belkin.o
29obj-$(CONFIG_HID_CANDO) += hid-cando.o 30obj-$(CONFIG_HID_CANDO) += hid-cando.o
@@ -32,6 +33,7 @@ obj-$(CONFIG_HID_CHICONY) += hid-chicony.o
32obj-$(CONFIG_HID_CYPRESS) += hid-cypress.o 33obj-$(CONFIG_HID_CYPRESS) += hid-cypress.o
33obj-$(CONFIG_HID_DRAGONRISE) += hid-drff.o 34obj-$(CONFIG_HID_DRAGONRISE) += hid-drff.o
34obj-$(CONFIG_HID_EGALAX) += hid-egalax.o 35obj-$(CONFIG_HID_EGALAX) += hid-egalax.o
36obj-$(CONFIG_HID_ELECOM) += hid-elecom.o
35obj-$(CONFIG_HID_EZKEY) += hid-ezkey.o 37obj-$(CONFIG_HID_EZKEY) += hid-ezkey.o
36obj-$(CONFIG_HID_GYRATION) += hid-gyration.o 38obj-$(CONFIG_HID_GYRATION) += hid-gyration.o
37obj-$(CONFIG_HID_KENSINGTON) += hid-kensington.o 39obj-$(CONFIG_HID_KENSINGTON) += hid-kensington.o
diff --git a/drivers/hid/hid-axff.c b/drivers/hid/hid-axff.c
new file mode 100644
index 000000000000..f42ee140738a
--- /dev/null
+++ b/drivers/hid/hid-axff.c
@@ -0,0 +1,172 @@
1/*
2 * Force feedback support for ACRUX game controllers
3 *
4 * From what I have gathered, these devices are mass produced in China
5 * by several vendors. They often share the same design as the original
6 * Xbox 360 controller.
7 *
8 * 1a34:0802 "ACRUX USB GAMEPAD 8116"
9 * - tested with a EXEQ EQ-PCU-02090 game controller.
10 *
11 * Copyright (c) 2010 Sergei Kolzun <x0r@dv-life.ru>
12 */
13
14/*
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 */
29
30#include <linux/input.h>
31#include <linux/slab.h>
32#include <linux/usb.h>
33#include <linux/hid.h>
34
35#include "hid-ids.h"
36#include "usbhid/usbhid.h"
37
38struct axff_device {
39 struct hid_report *report;
40};
41
42static int axff_play(struct input_dev *dev, void *data, struct ff_effect *effect)
43{
44 struct hid_device *hid = input_get_drvdata(dev);
45 struct axff_device *axff = data;
46 int left, right;
47
48 left = effect->u.rumble.strong_magnitude;
49 right = effect->u.rumble.weak_magnitude;
50
51 dbg_hid("called with 0x%04x 0x%04x", left, right);
52
53 left = left * 0xff / 0xffff;
54 right = right * 0xff / 0xffff;
55
56 axff->report->field[0]->value[0] = left;
57 axff->report->field[1]->value[0] = right;
58 axff->report->field[2]->value[0] = left;
59 axff->report->field[3]->value[0] = right;
60 dbg_hid("running with 0x%02x 0x%02x", left, right);
61 usbhid_submit_report(hid, axff->report, USB_DIR_OUT);
62
63 return 0;
64}
65
66static int axff_init(struct hid_device *hid)
67{
68 struct axff_device *axff;
69 struct hid_report *report;
70 struct hid_input *hidinput = list_first_entry(&hid->inputs, struct hid_input, list);
71 struct list_head *report_list =&hid->report_enum[HID_OUTPUT_REPORT].report_list;
72 struct input_dev *dev = hidinput->input;
73 int error;
74
75 if (list_empty(report_list)) {
76 dev_err(&hid->dev, "no output reports found\n");
77 return -ENODEV;
78 }
79
80 report = list_first_entry(report_list, struct hid_report, list);
81
82 if (report->maxfield < 4) {
83 dev_err(&hid->dev, "no fields in the report: %d\n", report->maxfield);
84 return -ENODEV;
85 }
86
87 axff = kzalloc(sizeof(struct axff_device), GFP_KERNEL);
88 if (!axff)
89 return -ENOMEM;
90
91 set_bit(FF_RUMBLE, dev->ffbit);
92
93 error = input_ff_create_memless(dev, axff, axff_play);
94 if (error)
95 goto err_free_mem;
96
97 axff->report = report;
98 axff->report->field[0]->value[0] = 0x00;
99 axff->report->field[1]->value[0] = 0x00;
100 axff->report->field[2]->value[0] = 0x00;
101 axff->report->field[3]->value[0] = 0x00;
102 usbhid_submit_report(hid, axff->report, USB_DIR_OUT);
103
104 dev_info(&hid->dev, "Force Feedback for ACRUX game controllers by Sergei Kolzun<x0r@dv-life.ru>\n");
105
106 return 0;
107
108err_free_mem:
109 kfree(axff);
110 return error;
111}
112
113static int ax_probe(struct hid_device *hdev, const struct hid_device_id *id)
114{
115 int error;
116
117 dev_dbg(&hdev->dev, "ACRUX HID hardware probe...");
118
119 error = hid_parse(hdev);
120 if (error) {
121 dev_err(&hdev->dev, "parse failed\n");
122 return error;
123 }
124
125 error = hid_hw_start(hdev, HID_CONNECT_DEFAULT & ~HID_CONNECT_FF);
126 if (error) {
127 dev_err(&hdev->dev, "hw start failed\n");
128 return error;
129 }
130
131 error = axff_init(hdev);
132 if (error) {
133 /*
134 * Do not fail device initialization completely as device
135 * may still be partially operable, just warn.
136 */
137 dev_warn(&hdev->dev,
138 "Failed to enable force feedback support, error: %d\n",
139 error);
140 }
141
142 return 0;
143}
144
145static const struct hid_device_id ax_devices[] = {
146 { HID_USB_DEVICE(USB_VENDOR_ID_ACRUX, 0x0802), },
147 { }
148};
149MODULE_DEVICE_TABLE(hid, ax_devices);
150
151static struct hid_driver ax_driver = {
152 .name = "acrux",
153 .id_table = ax_devices,
154 .probe = ax_probe,
155};
156
157static int __init ax_init(void)
158{
159 return hid_register_driver(&ax_driver);
160}
161
162static void __exit ax_exit(void)
163{
164 hid_unregister_driver(&ax_driver);
165}
166
167module_init(ax_init);
168module_exit(ax_exit);
169
170MODULE_AUTHOR("Sergei Kolzun");
171MODULE_DESCRIPTION("Force feedback support for ACRUX game controllers");
172MODULE_LICENSE("GPL");
diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
index aa0f7dcabcd7..e635199a0cd2 100644
--- a/drivers/hid/hid-core.c
+++ b/drivers/hid/hid-core.c
@@ -1157,6 +1157,8 @@ int hid_connect(struct hid_device *hdev, unsigned int connect_mask)
1157 1157
1158 if (hdev->quirks & HID_QUIRK_HIDDEV_FORCE) 1158 if (hdev->quirks & HID_QUIRK_HIDDEV_FORCE)
1159 connect_mask |= (HID_CONNECT_HIDDEV_FORCE | HID_CONNECT_HIDDEV); 1159 connect_mask |= (HID_CONNECT_HIDDEV_FORCE | HID_CONNECT_HIDDEV);
1160 if (hdev->quirks & HID_QUIRK_HIDINPUT_FORCE)
1161 connect_mask |= HID_CONNECT_HIDINPUT_FORCE;
1160 if (hdev->bus != BUS_USB) 1162 if (hdev->bus != BUS_USB)
1161 connect_mask &= ~HID_CONNECT_HIDDEV; 1163 connect_mask &= ~HID_CONNECT_HIDDEV;
1162 if (hid_hiddev(hdev)) 1164 if (hid_hiddev(hdev))
@@ -1239,6 +1241,9 @@ static const struct hid_device_id hid_blacklist[] = {
1239 { HID_USB_DEVICE(USB_VENDOR_ID_3M, USB_DEVICE_ID_3M2256) }, 1241 { HID_USB_DEVICE(USB_VENDOR_ID_3M, USB_DEVICE_ID_3M2256) },
1240 { HID_USB_DEVICE(USB_VENDOR_ID_A4TECH, USB_DEVICE_ID_A4TECH_WCP32PU) }, 1242 { HID_USB_DEVICE(USB_VENDOR_ID_A4TECH, USB_DEVICE_ID_A4TECH_WCP32PU) },
1241 { HID_USB_DEVICE(USB_VENDOR_ID_A4TECH, USB_DEVICE_ID_A4TECH_X5_005D) }, 1243 { HID_USB_DEVICE(USB_VENDOR_ID_A4TECH, USB_DEVICE_ID_A4TECH_X5_005D) },
1244#if defined(CONFIG_HID_ACRUX_FF) || defined(CONFIG_HID_ACRUX_FF_MODULE)
1245 { HID_USB_DEVICE(USB_VENDOR_ID_ACRUX, 0x0802) },
1246#endif
1242 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ATV_IRCONTROL) }, 1247 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ATV_IRCONTROL) },
1243 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_IRCONTROL4) }, 1248 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_IRCONTROL4) },
1244 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_MIGHTYMOUSE) }, 1249 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_MIGHTYMOUSE) },
@@ -1294,6 +1299,7 @@ static const struct hid_device_id hid_blacklist[] = {
1294 { HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_MOUSE) }, 1299 { HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_MOUSE) },
1295 { HID_USB_DEVICE(USB_VENDOR_ID_DRAGONRISE, 0x0006) }, 1300 { HID_USB_DEVICE(USB_VENDOR_ID_DRAGONRISE, 0x0006) },
1296 { HID_USB_DEVICE(USB_VENDOR_ID_DWAV, USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH) }, 1301 { HID_USB_DEVICE(USB_VENDOR_ID_DWAV, USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH) },
1302 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_ELECOM, USB_DEVICE_ID_ELECOM_BM084) },
1297 { HID_USB_DEVICE(USB_VENDOR_ID_EZKEY, USB_DEVICE_ID_BTC_8193) }, 1303 { HID_USB_DEVICE(USB_VENDOR_ID_EZKEY, USB_DEVICE_ID_BTC_8193) },
1298 { HID_USB_DEVICE(USB_VENDOR_ID_GAMERON, USB_DEVICE_ID_GAMERON_DUAL_PSX_ADAPTOR) }, 1304 { HID_USB_DEVICE(USB_VENDOR_ID_GAMERON, USB_DEVICE_ID_GAMERON_DUAL_PSX_ADAPTOR) },
1299 { HID_USB_DEVICE(USB_VENDOR_ID_GAMERON, USB_DEVICE_ID_GAMERON_DUAL_PCS_ADAPTOR) }, 1305 { HID_USB_DEVICE(USB_VENDOR_ID_GAMERON, USB_DEVICE_ID_GAMERON_DUAL_PCS_ADAPTOR) },
@@ -1337,6 +1343,24 @@ static const struct hid_device_id hid_blacklist[] = {
1337 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_WIRELESS_OPTICAL_DESKTOP_3_0) }, 1343 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_WIRELESS_OPTICAL_DESKTOP_3_0) },
1338 { HID_USB_DEVICE(USB_VENDOR_ID_MONTEREY, USB_DEVICE_ID_GENIUS_KB29E) }, 1344 { HID_USB_DEVICE(USB_VENDOR_ID_MONTEREY, USB_DEVICE_ID_GENIUS_KB29E) },
1339 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN) }, 1345 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN) },
1346 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_1) },
1347 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_2) },
1348 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_3) },
1349 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_4) },
1350 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_5) },
1351 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_6) },
1352 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_7) },
1353 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_8) },
1354 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_9) },
1355 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_10) },
1356 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_11) },
1357 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_12) },
1358 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_13) },
1359 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_14) },
1360 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_15) },
1361 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_16) },
1362 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_17) },
1363 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_18) },
1340 { HID_USB_DEVICE(USB_VENDOR_ID_ORTEK, USB_DEVICE_ID_ORTEK_WKB2000) }, 1364 { HID_USB_DEVICE(USB_VENDOR_ID_ORTEK, USB_DEVICE_ID_ORTEK_WKB2000) },
1341 { HID_USB_DEVICE(USB_VENDOR_ID_PETALYNX, USB_DEVICE_ID_PETALYNX_MAXTER_REMOTE) }, 1365 { HID_USB_DEVICE(USB_VENDOR_ID_PETALYNX, USB_DEVICE_ID_PETALYNX_MAXTER_REMOTE) },
1342 { HID_USB_DEVICE(USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH) }, 1366 { HID_USB_DEVICE(USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH) },
@@ -1357,10 +1381,10 @@ static const struct hid_device_id hid_blacklist[] = {
1357 { HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb653) }, 1381 { HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb653) },
1358 { HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb654) }, 1382 { HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb654) },
1359 { HID_USB_DEVICE(USB_VENDOR_ID_TOPSEED, USB_DEVICE_ID_TOPSEED_CYBERLINK) }, 1383 { HID_USB_DEVICE(USB_VENDOR_ID_TOPSEED, USB_DEVICE_ID_TOPSEED_CYBERLINK) },
1384 { HID_USB_DEVICE(USB_VENDOR_ID_TOPSEED2, USB_DEVICE_ID_TOPSEED2_RF_COMBO) },
1360 { HID_USB_DEVICE(USB_VENDOR_ID_TWINHAN, USB_DEVICE_ID_TWINHAN_IR_REMOTE) }, 1385 { HID_USB_DEVICE(USB_VENDOR_ID_TWINHAN, USB_DEVICE_ID_TWINHAN_IR_REMOTE) },
1361 { HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP, USB_DEVICE_ID_SMARTJOY_PLUS) }, 1386 { HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP, USB_DEVICE_ID_SMARTJOY_PLUS) },
1362 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_WACOM, USB_DEVICE_ID_WACOM_GRAPHIRE_BLUETOOTH) }, 1387 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_WACOM, USB_DEVICE_ID_WACOM_GRAPHIRE_BLUETOOTH) },
1363 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_WACOM, USB_DEVICE_ID_WACOM_INTUOS4_BLUETOOTH) },
1364 { HID_USB_DEVICE(USB_VENDOR_ID_ZEROPLUS, 0x0005) }, 1388 { HID_USB_DEVICE(USB_VENDOR_ID_ZEROPLUS, 0x0005) },
1365 { HID_USB_DEVICE(USB_VENDOR_ID_ZEROPLUS, 0x0030) }, 1389 { HID_USB_DEVICE(USB_VENDOR_ID_ZEROPLUS, 0x0030) },
1366 { HID_USB_DEVICE(USB_VENDOR_ID_ZYDACRON, USB_DEVICE_ID_ZYDACRON_REMOTE_CONTROL) }, 1390 { HID_USB_DEVICE(USB_VENDOR_ID_ZYDACRON, USB_DEVICE_ID_ZYDACRON_REMOTE_CONTROL) },
@@ -1568,6 +1592,7 @@ static const struct hid_device_id hid_ignore_list[] = {
1568 { HID_USB_DEVICE(USB_VENDOR_ID_DELORME, USB_DEVICE_ID_DELORME_EM_LT20) }, 1592 { HID_USB_DEVICE(USB_VENDOR_ID_DELORME, USB_DEVICE_ID_DELORME_EM_LT20) },
1569 { HID_USB_DEVICE(USB_VENDOR_ID_ESSENTIAL_REALITY, USB_DEVICE_ID_ESSENTIAL_REALITY_P5) }, 1593 { HID_USB_DEVICE(USB_VENDOR_ID_ESSENTIAL_REALITY, USB_DEVICE_ID_ESSENTIAL_REALITY_P5) },
1570 { HID_USB_DEVICE(USB_VENDOR_ID_ETT, USB_DEVICE_ID_TC5UH) }, 1594 { HID_USB_DEVICE(USB_VENDOR_ID_ETT, USB_DEVICE_ID_TC5UH) },
1595 { HID_USB_DEVICE(USB_VENDOR_ID_ETT, USB_DEVICE_ID_TC4UM) },
1571 { HID_USB_DEVICE(USB_VENDOR_ID_GENERAL_TOUCH, 0x0001) }, 1596 { HID_USB_DEVICE(USB_VENDOR_ID_GENERAL_TOUCH, 0x0001) },
1572 { HID_USB_DEVICE(USB_VENDOR_ID_GENERAL_TOUCH, 0x0002) }, 1597 { HID_USB_DEVICE(USB_VENDOR_ID_GENERAL_TOUCH, 0x0002) },
1573 { HID_USB_DEVICE(USB_VENDOR_ID_GENERAL_TOUCH, 0x0003) }, 1598 { HID_USB_DEVICE(USB_VENDOR_ID_GENERAL_TOUCH, 0x0003) },
@@ -1760,7 +1785,8 @@ int hid_add_device(struct hid_device *hdev)
1760 1785
1761 /* we need to kill them here, otherwise they will stay allocated to 1786 /* we need to kill them here, otherwise they will stay allocated to
1762 * wait for coming driver */ 1787 * wait for coming driver */
1763 if (!(hdev->quirks & HID_QUIRK_NO_IGNORE) && hid_ignore(hdev)) 1788 if (!(hdev->quirks & HID_QUIRK_NO_IGNORE)
1789 && (hid_ignore(hdev) || (hdev->quirks & HID_QUIRK_IGNORE)))
1764 return -ENODEV; 1790 return -ENODEV;
1765 1791
1766 /* XXX hack, any other cleaner solution after the driver core 1792 /* XXX hack, any other cleaner solution after the driver core
diff --git a/drivers/hid/hid-debug.c b/drivers/hid/hid-debug.c
index c94026768570..850d02a7a925 100644
--- a/drivers/hid/hid-debug.c
+++ b/drivers/hid/hid-debug.c
@@ -949,8 +949,8 @@ static ssize_t hid_debug_events_read(struct file *file, char __user *buffer,
949 int ret = 0, len; 949 int ret = 0, len;
950 DECLARE_WAITQUEUE(wait, current); 950 DECLARE_WAITQUEUE(wait, current);
951 951
952 mutex_lock(&list->read_mutex);
952 while (ret == 0) { 953 while (ret == 0) {
953 mutex_lock(&list->read_mutex);
954 if (list->head == list->tail) { 954 if (list->head == list->tail) {
955 add_wait_queue(&list->hdev->debug_wait, &wait); 955 add_wait_queue(&list->hdev->debug_wait, &wait);
956 set_current_state(TASK_INTERRUPTIBLE); 956 set_current_state(TASK_INTERRUPTIBLE);
diff --git a/drivers/hid/hid-elecom.c b/drivers/hid/hid-elecom.c
new file mode 100644
index 000000000000..7a40878f46b4
--- /dev/null
+++ b/drivers/hid/hid-elecom.c
@@ -0,0 +1,57 @@
1/*
2 * HID driver for Elecom BM084 (bluetooth mouse).
3 * Removes a non-existing horizontal wheel from
4 * the HID descriptor.
5 * (This module is based on "hid-ortek".)
6 *
7 * Copyright (c) 2010 Richard Nauber <Richard.Nauber@gmail.com>
8 */
9
10/*
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the Free
13 * Software Foundation; either version 2 of the License, or (at your option)
14 * any later version.
15 */
16
17#include <linux/device.h>
18#include <linux/hid.h>
19#include <linux/module.h>
20
21#include "hid-ids.h"
22
23static void elecom_report_fixup(struct hid_device *hdev, __u8 *rdesc,
24 unsigned int rsize)
25{
26 if (rsize >= 48 && rdesc[46] == 0x05 && rdesc[47] == 0x0c) {
27 dev_info(&hdev->dev, "Fixing up Elecom BM084 "
28 "report descriptor.\n");
29 rdesc[47] = 0x00;
30 }
31}
32
33static const struct hid_device_id elecom_devices[] = {
34 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_ELECOM, USB_DEVICE_ID_ELECOM_BM084)},
35 { }
36};
37MODULE_DEVICE_TABLE(hid, elecom_devices);
38
39static struct hid_driver elecom_driver = {
40 .name = "elecom",
41 .id_table = elecom_devices,
42 .report_fixup = elecom_report_fixup
43};
44
45static int __init elecom_init(void)
46{
47 return hid_register_driver(&elecom_driver);
48}
49
50static void __exit elecom_exit(void)
51{
52 hid_unregister_driver(&elecom_driver);
53}
54
55module_init(elecom_init);
56module_exit(elecom_exit);
57MODULE_LICENSE("GPL");
diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
index 6af77ed0b555..d3fc13ae094d 100644
--- a/drivers/hid/hid-ids.h
+++ b/drivers/hid/hid-ids.h
@@ -34,6 +34,8 @@
34#define USB_DEVICE_ID_ACECAD_FLAIR 0x0004 34#define USB_DEVICE_ID_ACECAD_FLAIR 0x0004
35#define USB_DEVICE_ID_ACECAD_302 0x0008 35#define USB_DEVICE_ID_ACECAD_302 0x0008
36 36
37#define USB_VENDOR_ID_ACRUX 0x1a34
38
37#define USB_VENDOR_ID_ADS_TECH 0x06e1 39#define USB_VENDOR_ID_ADS_TECH 0x06e1
38#define USB_DEVICE_ID_ADS_TECH_RADIO_SI470X 0xa155 40#define USB_DEVICE_ID_ADS_TECH_RADIO_SI470X 0xa155
39 41
@@ -81,12 +83,12 @@
81#define USB_DEVICE_ID_APPLE_WELLSPRING_ANSI 0x0223 83#define USB_DEVICE_ID_APPLE_WELLSPRING_ANSI 0x0223
82#define USB_DEVICE_ID_APPLE_WELLSPRING_ISO 0x0224 84#define USB_DEVICE_ID_APPLE_WELLSPRING_ISO 0x0224
83#define USB_DEVICE_ID_APPLE_WELLSPRING_JIS 0x0225 85#define USB_DEVICE_ID_APPLE_WELLSPRING_JIS 0x0225
84#define USB_DEVICE_ID_APPLE_GEYSER4_HF_ANSI 0x0229 86#define USB_DEVICE_ID_APPLE_GEYSER4_HF_ANSI 0x0229
85#define USB_DEVICE_ID_APPLE_GEYSER4_HF_ISO 0x022a 87#define USB_DEVICE_ID_APPLE_GEYSER4_HF_ISO 0x022a
86#define USB_DEVICE_ID_APPLE_GEYSER4_HF_JIS 0x022b 88#define USB_DEVICE_ID_APPLE_GEYSER4_HF_JIS 0x022b
87#define USB_DEVICE_ID_APPLE_ALU_WIRELESS_ANSI 0x022c 89#define USB_DEVICE_ID_APPLE_ALU_WIRELESS_ANSI 0x022c
88#define USB_DEVICE_ID_APPLE_ALU_WIRELESS_ISO 0x022d 90#define USB_DEVICE_ID_APPLE_ALU_WIRELESS_ISO 0x022d
89#define USB_DEVICE_ID_APPLE_ALU_WIRELESS_JIS 0x022e 91#define USB_DEVICE_ID_APPLE_ALU_WIRELESS_JIS 0x022e
90#define USB_DEVICE_ID_APPLE_WELLSPRING2_ANSI 0x0230 92#define USB_DEVICE_ID_APPLE_WELLSPRING2_ANSI 0x0230
91#define USB_DEVICE_ID_APPLE_WELLSPRING2_ISO 0x0231 93#define USB_DEVICE_ID_APPLE_WELLSPRING2_ISO 0x0231
92#define USB_DEVICE_ID_APPLE_WELLSPRING2_JIS 0x0232 94#define USB_DEVICE_ID_APPLE_WELLSPRING2_JIS 0x0232
@@ -118,8 +120,8 @@
118#define USB_VENDOR_ID_AVERMEDIA 0x07ca 120#define USB_VENDOR_ID_AVERMEDIA 0x07ca
119#define USB_DEVICE_ID_AVER_FM_MR800 0xb800 121#define USB_DEVICE_ID_AVER_FM_MR800 0xb800
120 122
121#define USB_VENDOR_ID_BELKIN 0x050d 123#define USB_VENDOR_ID_BELKIN 0x050d
122#define USB_DEVICE_ID_FLIP_KVM 0x3201 124#define USB_DEVICE_ID_FLIP_KVM 0x3201
123 125
124#define USB_VENDOR_ID_BERKSHIRE 0x0c98 126#define USB_VENDOR_ID_BERKSHIRE 0x0c98
125#define USB_DEVICE_ID_BERKSHIRE_PCWD 0x1140 127#define USB_DEVICE_ID_BERKSHIRE_PCWD 0x1140
@@ -128,12 +130,13 @@
128#define USB_DEVICE_ID_BTC_EMPREX_REMOTE 0x5578 130#define USB_DEVICE_ID_BTC_EMPREX_REMOTE 0x5578
129 131
130#define USB_VENDOR_ID_CANDO 0x2087 132#define USB_VENDOR_ID_CANDO 0x2087
131#define USB_DEVICE_ID_CANDO_MULTI_TOUCH 0x0a01 133#define USB_DEVICE_ID_CANDO_MULTI_TOUCH 0x0a01
132#define USB_DEVICE_ID_CANDO_MULTI_TOUCH_11_6 0x0b03 134#define USB_DEVICE_ID_CANDO_MULTI_TOUCH_11_6 0x0b03
133 135
134#define USB_VENDOR_ID_CH 0x068e 136#define USB_VENDOR_ID_CH 0x068e
135#define USB_DEVICE_ID_CH_PRO_PEDALS 0x00f2 137#define USB_DEVICE_ID_CH_PRO_PEDALS 0x00f2
136#define USB_DEVICE_ID_CH_COMBATSTICK 0x00f4 138#define USB_DEVICE_ID_CH_COMBATSTICK 0x00f4
139#define USB_DEVICE_ID_CH_FLIGHT_SIM_ECLIPSE_YOKE 0x0051
137#define USB_DEVICE_ID_CH_FLIGHT_SIM_YOKE 0x00ff 140#define USB_DEVICE_ID_CH_FLIGHT_SIM_YOKE 0x00ff
138#define USB_DEVICE_ID_CH_3AXIS_5BUTTON_STICK 0x00d3 141#define USB_DEVICE_ID_CH_3AXIS_5BUTTON_STICK 0x00d3
139 142
@@ -174,7 +177,7 @@
174#define USB_DEVICE_ID_DEALEXTREAME_RADIO_SI4701 0x819a 177#define USB_DEVICE_ID_DEALEXTREAME_RADIO_SI4701 0x819a
175 178
176#define USB_VENDOR_ID_DELORME 0x1163 179#define USB_VENDOR_ID_DELORME 0x1163
177#define USB_DEVICE_ID_DELORME_EARTHMATE 0x0100 180#define USB_DEVICE_ID_DELORME_EARTHMATE 0x0100
178#define USB_DEVICE_ID_DELORME_EM_LT20 0x0200 181#define USB_DEVICE_ID_DELORME_EM_LT20 0x0200
179 182
180#define USB_VENDOR_ID_DMI 0x0c0b 183#define USB_VENDOR_ID_DMI 0x0c0b
@@ -186,19 +189,23 @@
186#define USB_DEVICE_ID_EGALAX_TOUCHCONTROLLER 0x0001 189#define USB_DEVICE_ID_EGALAX_TOUCHCONTROLLER 0x0001
187#define USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH 0x480d 190#define USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH 0x480d
188 191
192#define USB_VENDOR_ID_ELECOM 0x056e
193#define USB_DEVICE_ID_ELECOM_BM084 0x0061
194
189#define USB_VENDOR_ID_ELO 0x04E7 195#define USB_VENDOR_ID_ELO 0x04E7
190#define USB_DEVICE_ID_ELO_TS2700 0x0020 196#define USB_DEVICE_ID_ELO_TS2700 0x0020
191 197
192#define USB_VENDOR_ID_ESSENTIAL_REALITY 0x0d7f 198#define USB_VENDOR_ID_ESSENTIAL_REALITY 0x0d7f
193#define USB_DEVICE_ID_ESSENTIAL_REALITY_P5 0x0100 199#define USB_DEVICE_ID_ESSENTIAL_REALITY_P5 0x0100
194 200
195#define USB_VENDOR_ID_ETURBOTOUCH 0x22b9
196#define USB_DEVICE_ID_ETURBOTOUCH 0x0006
197
198#define USB_VENDOR_ID_ETT 0x0664 201#define USB_VENDOR_ID_ETT 0x0664
199#define USB_DEVICE_ID_TC5UH 0x0309 202#define USB_DEVICE_ID_TC5UH 0x0309
203#define USB_DEVICE_ID_TC4UM 0x0306
204
205#define USB_VENDOR_ID_ETURBOTOUCH 0x22b9
206#define USB_DEVICE_ID_ETURBOTOUCH 0x0006
200 207
201#define USB_VENDOR_ID_EZKEY 0x0518 208#define USB_VENDOR_ID_EZKEY 0x0518
202#define USB_DEVICE_ID_BTC_8193 0x0002 209#define USB_DEVICE_ID_BTC_8193 0x0002
203 210
204#define USB_VENDOR_ID_GAMERON 0x0810 211#define USB_VENDOR_ID_GAMERON 0x0810
@@ -295,9 +302,16 @@
295#define USB_VENDOR_ID_KBGEAR 0x084e 302#define USB_VENDOR_ID_KBGEAR 0x084e
296#define USB_DEVICE_ID_KBGEAR_JAMSTUDIO 0x1001 303#define USB_DEVICE_ID_KBGEAR_JAMSTUDIO 0x1001
297 304
305#define USB_VENDOR_ID_KENSINGTON 0x047d
306#define USB_DEVICE_ID_KS_SLIMBLADE 0x2041
307
298#define USB_VENDOR_ID_KWORLD 0x1b80 308#define USB_VENDOR_ID_KWORLD 0x1b80
299#define USB_DEVICE_ID_KWORLD_RADIO_FM700 0xd700 309#define USB_DEVICE_ID_KWORLD_RADIO_FM700 0xd700
300 310
311#define USB_VENDOR_ID_KYE 0x0458
312#define USB_DEVICE_ID_KYE_ERGO_525V 0x0087
313#define USB_DEVICE_ID_KYE_GPEN_560 0x5003
314
301#define USB_VENDOR_ID_LABTEC 0x1020 315#define USB_VENDOR_ID_LABTEC 0x1020
302#define USB_DEVICE_ID_LABTEC_WIRELESS_KEYBOARD 0x0006 316#define USB_DEVICE_ID_LABTEC_WIRELESS_KEYBOARD 0x0006
303 317
@@ -317,9 +331,6 @@
317#define USB_DEVICE_ID_LD_POWERCONTROL 0x2030 331#define USB_DEVICE_ID_LD_POWERCONTROL 0x2030
318#define USB_DEVICE_ID_LD_MACHINETEST 0x2040 332#define USB_DEVICE_ID_LD_MACHINETEST 0x2040
319 333
320#define USB_VENDOR_ID_KENSINGTON 0x047d
321#define USB_DEVICE_ID_KS_SLIMBLADE 0x2041
322
323#define USB_VENDOR_ID_LOGITECH 0x046d 334#define USB_VENDOR_ID_LOGITECH 0x046d
324#define USB_DEVICE_ID_LOGITECH_RECEIVER 0xc101 335#define USB_DEVICE_ID_LOGITECH_RECEIVER 0xc101
325#define USB_DEVICE_ID_LOGITECH_HARMONY_FIRST 0xc110 336#define USB_DEVICE_ID_LOGITECH_HARMONY_FIRST 0xc110
@@ -369,28 +380,48 @@
369#define USB_DEVICE_ID_MS_PRESENTER_8K_BT 0x0701 380#define USB_DEVICE_ID_MS_PRESENTER_8K_BT 0x0701
370#define USB_DEVICE_ID_MS_PRESENTER_8K_USB 0x0713 381#define USB_DEVICE_ID_MS_PRESENTER_8K_USB 0x0713
371 382
383#define USB_VENDOR_ID_MOJO 0x8282
384#define USB_DEVICE_ID_RETRO_ADAPTER 0x3201
372 385
373#define USB_VENDOR_ID_MONTEREY 0x0566 386#define USB_VENDOR_ID_MONTEREY 0x0566
374#define USB_DEVICE_ID_GENIUS_KB29E 0x3004 387#define USB_DEVICE_ID_GENIUS_KB29E 0x3004
375 388
389#define USB_VENDOR_ID_NATIONAL_SEMICONDUCTOR 0x0400
390#define USB_DEVICE_ID_N_S_HARMONY 0xc359
391
392#define USB_VENDOR_ID_NATSU 0x08b7
393#define USB_DEVICE_ID_NATSU_GAMEPAD 0x0001
394
376#define USB_VENDOR_ID_NCR 0x0404 395#define USB_VENDOR_ID_NCR 0x0404
377#define USB_DEVICE_ID_NCR_FIRST 0x0300 396#define USB_DEVICE_ID_NCR_FIRST 0x0300
378#define USB_DEVICE_ID_NCR_LAST 0x03ff 397#define USB_DEVICE_ID_NCR_LAST 0x03ff
379 398
380#define USB_VENDOR_ID_NATIONAL_SEMICONDUCTOR 0x0400
381#define USB_DEVICE_ID_N_S_HARMONY 0xc359
382
383#define USB_VENDOR_ID_NATSU 0x08b7
384#define USB_DEVICE_ID_NATSU_GAMEPAD 0x0001
385
386#define USB_VENDOR_ID_NEC 0x073e 399#define USB_VENDOR_ID_NEC 0x073e
387#define USB_DEVICE_ID_NEC_USB_GAME_PAD 0x0301 400#define USB_DEVICE_ID_NEC_USB_GAME_PAD 0x0301
388 401
389#define USB_VENDOR_ID_NEXTWINDOW 0x1926 402#define USB_VENDOR_ID_NEXTWINDOW 0x1926
390#define USB_DEVICE_ID_NEXTWINDOW_TOUCHSCREEN 0x0003 403#define USB_DEVICE_ID_NEXTWINDOW_TOUCHSCREEN 0x0003
391 404
392#define USB_VENDOR_ID_NTRIG 0x1b96 405#define USB_VENDOR_ID_NTRIG 0x1b96
393#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN 0x0001 406#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN 0x0001
407#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_1 0x0003
408#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_2 0x0004
409#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_3 0x0005
410#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_4 0x0006
411#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_5 0x0007
412#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_6 0x0008
413#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_7 0x0009
414#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_8 0x000A
415#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_9 0x000B
416#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_10 0x000C
417#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_11 0x000D
418#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_12 0x000E
419#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_13 0x000F
420#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_14 0x0010
421#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_15 0x0011
422#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_16 0x0012
423#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_17 0x0013
424#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_18 0x0014
394 425
395#define USB_VENDOR_ID_ONTRAK 0x0a07 426#define USB_VENDOR_ID_ONTRAK 0x0a07
396#define USB_DEVICE_ID_ONTRAK_ADU100 0x0064 427#define USB_DEVICE_ID_ONTRAK_ADU100 0x0064
@@ -406,9 +437,12 @@
406#define USB_VENDOR_ID_PETALYNX 0x18b1 437#define USB_VENDOR_ID_PETALYNX 0x18b1
407#define USB_DEVICE_ID_PETALYNX_MAXTER_REMOTE 0x0037 438#define USB_DEVICE_ID_PETALYNX_MAXTER_REMOTE 0x0037
408 439
409#define USB_VENDOR_ID_PHILIPS 0x0471 440#define USB_VENDOR_ID_PHILIPS 0x0471
410#define USB_DEVICE_ID_PHILIPS_IEEE802154_DONGLE 0x0617 441#define USB_DEVICE_ID_PHILIPS_IEEE802154_DONGLE 0x0617
411 442
443#define USB_VENDOR_ID_PI_ENGINEERING 0x05f3
444#define USB_DEVICE_ID_PI_ENGINEERING_VEC_USB_FOOTPEDAL 0xff
445
412#define USB_VENDOR_ID_PLAYDOTCOM 0x0b43 446#define USB_VENDOR_ID_PLAYDOTCOM 0x0b43
413#define USB_DEVICE_ID_PLAYDOTCOM_EMS_USBII 0x0003 447#define USB_DEVICE_ID_PLAYDOTCOM_EMS_USBII 0x0003
414 448
@@ -418,16 +452,16 @@
418#define USB_VENDOR_ID_PRODIGE 0x05af 452#define USB_VENDOR_ID_PRODIGE 0x05af
419#define USB_DEVICE_ID_PRODIGE_CORDLESS 0x3062 453#define USB_DEVICE_ID_PRODIGE_CORDLESS 0x3062
420 454
455#define USB_VENDOR_ID_QUANTA 0x0408
456#define USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH 0x3000
457#define USB_DEVICE_ID_PIXART_IMAGING_INC_OPTICAL_TOUCH_SCREEN 0x3001
458
421#define USB_VENDOR_ID_ROCCAT 0x1e7d 459#define USB_VENDOR_ID_ROCCAT 0x1e7d
422#define USB_DEVICE_ID_ROCCAT_KONE 0x2ced 460#define USB_DEVICE_ID_ROCCAT_KONE 0x2ced
423 461
424#define USB_VENDOR_ID_SAITEK 0x06a3 462#define USB_VENDOR_ID_SAITEK 0x06a3
425#define USB_DEVICE_ID_SAITEK_RUMBLEPAD 0xff17 463#define USB_DEVICE_ID_SAITEK_RUMBLEPAD 0xff17
426 464
427#define USB_VENDOR_ID_QUANTA 0x0408
428#define USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH 0x3000
429#define USB_DEVICE_ID_PIXART_IMAGING_INC_OPTICAL_TOUCH_SCREEN 0x3001
430
431#define USB_VENDOR_ID_SAMSUNG 0x0419 465#define USB_VENDOR_ID_SAMSUNG 0x0419
432#define USB_DEVICE_ID_SAMSUNG_IR_REMOTE 0x0001 466#define USB_DEVICE_ID_SAMSUNG_IR_REMOTE 0x0001
433#define USB_DEVICE_ID_SAMSUNG_WIRELESS_KBD_MOUSE 0x0600 467#define USB_DEVICE_ID_SAMSUNG_WIRELESS_KBD_MOUSE 0x0600
@@ -451,20 +485,23 @@
451 485
452#define USB_VENDOR_ID_THRUSTMASTER 0x044f 486#define USB_VENDOR_ID_THRUSTMASTER 0x044f
453 487
454#define USB_VENDOR_ID_TOUCHPACK 0x1bfd 488#define USB_VENDOR_ID_TOPSEED 0x0766
455#define USB_DEVICE_ID_TOUCHPACK_RTS 0x1688 489#define USB_DEVICE_ID_TOPSEED_CYBERLINK 0x0204
490
491#define USB_VENDOR_ID_TOPSEED2 0x1784
492#define USB_DEVICE_ID_TOPSEED2_RF_COMBO 0x0004
456 493
457#define USB_VENDOR_ID_TOPMAX 0x0663 494#define USB_VENDOR_ID_TOPMAX 0x0663
458#define USB_DEVICE_ID_TOPMAX_COBRAPAD 0x0103 495#define USB_DEVICE_ID_TOPMAX_COBRAPAD 0x0103
459 496
460#define USB_VENDOR_ID_TOPSEED 0x0766 497#define USB_VENDOR_ID_TOUCHPACK 0x1bfd
461#define USB_DEVICE_ID_TOPSEED_CYBERLINK 0x0204 498#define USB_DEVICE_ID_TOUCHPACK_RTS 0x1688
462 499
463#define USB_VENDOR_ID_TURBOX 0x062a 500#define USB_VENDOR_ID_TURBOX 0x062a
464#define USB_DEVICE_ID_TURBOX_KEYBOARD 0x0201 501#define USB_DEVICE_ID_TURBOX_KEYBOARD 0x0201
465 502
466#define USB_VENDOR_ID_TWINHAN 0x6253 503#define USB_VENDOR_ID_TWINHAN 0x6253
467#define USB_DEVICE_ID_TWINHAN_IR_REMOTE 0x0100 504#define USB_DEVICE_ID_TWINHAN_IR_REMOTE 0x0100
468 505
469#define USB_VENDOR_ID_UCLOGIC 0x5543 506#define USB_VENDOR_ID_UCLOGIC 0x5543
470#define USB_DEVICE_ID_UCLOGIC_TABLET_PF1209 0x0042 507#define USB_DEVICE_ID_UCLOGIC_TABLET_PF1209 0x0042
@@ -479,7 +516,6 @@
479 516
480#define USB_VENDOR_ID_WACOM 0x056a 517#define USB_VENDOR_ID_WACOM 0x056a
481#define USB_DEVICE_ID_WACOM_GRAPHIRE_BLUETOOTH 0x81 518#define USB_DEVICE_ID_WACOM_GRAPHIRE_BLUETOOTH 0x81
482#define USB_DEVICE_ID_WACOM_INTUOS4_BLUETOOTH 0xbd
483 519
484#define USB_VENDOR_ID_WISEGROUP 0x0925 520#define USB_VENDOR_ID_WISEGROUP 0x0925
485#define USB_DEVICE_ID_SMARTJOY_PLUS 0x0005 521#define USB_DEVICE_ID_SMARTJOY_PLUS 0x0005
@@ -501,9 +537,4 @@
501#define USB_VENDOR_ID_ZYDACRON 0x13EC 537#define USB_VENDOR_ID_ZYDACRON 0x13EC
502#define USB_DEVICE_ID_ZYDACRON_REMOTE_CONTROL 0x0006 538#define USB_DEVICE_ID_ZYDACRON_REMOTE_CONTROL 0x0006
503 539
504#define USB_VENDOR_ID_KYE 0x0458
505#define USB_DEVICE_ID_KYE_ERGO_525V 0x0087
506#define USB_DEVICE_ID_KYE_GPEN_560 0x5003
507
508
509#endif 540#endif
diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c
index 7a0d2e4661a1..6c03dcc5760a 100644
--- a/drivers/hid/hid-input.c
+++ b/drivers/hid/hid-input.c
@@ -199,11 +199,11 @@ static void hidinput_configure_usage(struct hid_input *hidinput, struct hid_fiel
199 case HID_GD_MOUSE: 199 case HID_GD_MOUSE:
200 case HID_GD_POINTER: code += 0x110; break; 200 case HID_GD_POINTER: code += 0x110; break;
201 case HID_GD_JOYSTICK: 201 case HID_GD_JOYSTICK:
202 if (code <= 0xf) 202 if (code <= 0xf)
203 code += BTN_JOYSTICK; 203 code += BTN_JOYSTICK;
204 else 204 else
205 code += BTN_TRIGGER_HAPPY; 205 code += BTN_TRIGGER_HAPPY;
206 break; 206 break;
207 case HID_GD_GAMEPAD: code += 0x130; break; 207 case HID_GD_GAMEPAD: code += 0x130; break;
208 default: 208 default:
209 switch (field->physical) { 209 switch (field->physical) {
@@ -301,6 +301,9 @@ static void hidinput_configure_usage(struct hid_input *hidinput, struct hid_fiel
301 301
302 case HID_UP_DIGITIZER: 302 case HID_UP_DIGITIZER:
303 switch (usage->hid & 0xff) { 303 switch (usage->hid & 0xff) {
304 case 0x00: /* Undefined */
305 goto ignore;
306
304 case 0x30: /* TipPressure */ 307 case 0x30: /* TipPressure */
305 if (!test_bit(BTN_TOUCH, input->keybit)) { 308 if (!test_bit(BTN_TOUCH, input->keybit)) {
306 device->quirks |= HID_QUIRK_NOTOUCH; 309 device->quirks |= HID_QUIRK_NOTOUCH;
@@ -480,7 +483,7 @@ static void hidinput_configure_usage(struct hid_input *hidinput, struct hid_fiel
480 483
481 case HID_UP_LOGIVENDOR: 484 case HID_UP_LOGIVENDOR:
482 goto ignore; 485 goto ignore;
483 486
484 case HID_UP_PID: 487 case HID_UP_PID:
485 switch (usage->hid & HID_USAGE) { 488 switch (usage->hid & HID_USAGE) {
486 case 0xa4: map_key_clear(BTN_DEAD); break; 489 case 0xa4: map_key_clear(BTN_DEAD); break;
@@ -534,6 +537,9 @@ mapped:
534 input_set_abs_params(input, usage->code, a, b, (b - a) >> 8, (b - a) >> 4); 537 input_set_abs_params(input, usage->code, a, b, (b - a) >> 8, (b - a) >> 4);
535 else input_set_abs_params(input, usage->code, a, b, 0, 0); 538 else input_set_abs_params(input, usage->code, a, b, 0, 0);
536 539
540 /* use a larger default input buffer for MT devices */
541 if (usage->code == ABS_MT_POSITION_X && input->hint_events_per_packet == 0)
542 input_set_events_per_packet(input, 60);
537 } 543 }
538 544
539 if (usage->type == EV_ABS && 545 if (usage->type == EV_ABS &&
@@ -586,9 +592,9 @@ void hidinput_hid_event(struct hid_device *hid, struct hid_field *field, struct
586 hat_dir = (value - usage->hat_min) * 8 / (usage->hat_max - usage->hat_min + 1) + 1; 592 hat_dir = (value - usage->hat_min) * 8 / (usage->hat_max - usage->hat_min + 1) + 1;
587 if (hat_dir < 0 || hat_dir > 8) hat_dir = 0; 593 if (hat_dir < 0 || hat_dir > 8) hat_dir = 0;
588 input_event(input, usage->type, usage->code , hid_hat_to_axis[hat_dir].x); 594 input_event(input, usage->type, usage->code , hid_hat_to_axis[hat_dir].x);
589 input_event(input, usage->type, usage->code + 1, hid_hat_to_axis[hat_dir].y); 595 input_event(input, usage->type, usage->code + 1, hid_hat_to_axis[hat_dir].y);
590 return; 596 return;
591 } 597 }
592 598
593 if (usage->hid == (HID_UP_DIGITIZER | 0x003c)) { /* Invert */ 599 if (usage->hid == (HID_UP_DIGITIZER | 0x003c)) { /* Invert */
594 *quirks = value ? (*quirks | HID_QUIRK_INVERT) : (*quirks & ~HID_QUIRK_INVERT); 600 *quirks = value ? (*quirks | HID_QUIRK_INVERT) : (*quirks & ~HID_QUIRK_INVERT);
diff --git a/drivers/hid/hid-magicmouse.c b/drivers/hid/hid-magicmouse.c
index f10d56a15f21..319b0e57ee41 100644
--- a/drivers/hid/hid-magicmouse.c
+++ b/drivers/hid/hid-magicmouse.c
@@ -30,6 +30,21 @@ static bool emulate_scroll_wheel = true;
30module_param(emulate_scroll_wheel, bool, 0644); 30module_param(emulate_scroll_wheel, bool, 0644);
31MODULE_PARM_DESC(emulate_scroll_wheel, "Emulate a scroll wheel"); 31MODULE_PARM_DESC(emulate_scroll_wheel, "Emulate a scroll wheel");
32 32
33static unsigned int scroll_speed = 32;
34static int param_set_scroll_speed(const char *val, struct kernel_param *kp) {
35 unsigned long speed;
36 if (!val || strict_strtoul(val, 0, &speed) || speed > 63)
37 return -EINVAL;
38 scroll_speed = speed;
39 return 0;
40}
41module_param_call(scroll_speed, param_set_scroll_speed, param_get_uint, &scroll_speed, 0644);
42MODULE_PARM_DESC(scroll_speed, "Scroll speed, value from 0 (slow) to 63 (fast)");
43
44static bool scroll_acceleration = false;
45module_param(scroll_acceleration, bool, 0644);
46MODULE_PARM_DESC(scroll_acceleration, "Accelerate sequential scroll events");
47
33static bool report_touches = true; 48static bool report_touches = true;
34module_param(report_touches, bool, 0644); 49module_param(report_touches, bool, 0644);
35MODULE_PARM_DESC(report_touches, "Emit touch records (otherwise, only use them for emulation)"); 50MODULE_PARM_DESC(report_touches, "Emit touch records (otherwise, only use them for emulation)");
@@ -50,6 +65,8 @@ MODULE_PARM_DESC(report_undeciphered, "Report undeciphered multi-touch state fie
50#define TOUCH_STATE_START 0x30 65#define TOUCH_STATE_START 0x30
51#define TOUCH_STATE_DRAG 0x40 66#define TOUCH_STATE_DRAG 0x40
52 67
68#define SCROLL_ACCEL_DEFAULT 7
69
53/** 70/**
54 * struct magicmouse_sc - Tracks Magic Mouse-specific data. 71 * struct magicmouse_sc - Tracks Magic Mouse-specific data.
55 * @input: Input device through which we report events. 72 * @input: Input device through which we report events.
@@ -78,8 +95,10 @@ struct magicmouse_sc {
78 struct { 95 struct {
79 short x; 96 short x;
80 short y; 97 short y;
98 short scroll_x;
81 short scroll_y; 99 short scroll_y;
82 u8 size; 100 u8 size;
101 u8 down;
83 } touches[16]; 102 } touches[16];
84 int tracking_ids[16]; 103 int tracking_ids[16];
85}; 104};
@@ -141,7 +160,7 @@ static void magicmouse_emit_buttons(struct magicmouse_sc *msc, int state)
141 input_report_key(msc->input, BTN_RIGHT, state & 2); 160 input_report_key(msc->input, BTN_RIGHT, state & 2);
142 161
143 if (state != last_state) 162 if (state != last_state)
144 msc->scroll_accel = 0; 163 msc->scroll_accel = SCROLL_ACCEL_DEFAULT;
145} 164}
146 165
147static void magicmouse_emit_touch(struct magicmouse_sc *msc, int raw_id, u8 *tdata) 166static void magicmouse_emit_touch(struct magicmouse_sc *msc, int raw_id, u8 *tdata)
@@ -152,6 +171,7 @@ static void magicmouse_emit_touch(struct magicmouse_sc *msc, int raw_id, u8 *tda
152 int id = (misc >> 6) & 15; 171 int id = (misc >> 6) & 15;
153 int x = x_y << 12 >> 20; 172 int x = x_y << 12 >> 20;
154 int y = -(x_y >> 20); 173 int y = -(x_y >> 20);
174 int down = (tdata[7] & TOUCH_STATE_MASK) != TOUCH_STATE_NONE;
155 175
156 /* Store tracking ID and other fields. */ 176 /* Store tracking ID and other fields. */
157 msc->tracking_ids[raw_id] = id; 177 msc->tracking_ids[raw_id] = id;
@@ -160,42 +180,54 @@ static void magicmouse_emit_touch(struct magicmouse_sc *msc, int raw_id, u8 *tda
160 msc->touches[id].size = misc & 63; 180 msc->touches[id].size = misc & 63;
161 181
162 /* If requested, emulate a scroll wheel by detecting small 182 /* If requested, emulate a scroll wheel by detecting small
163 * vertical touch motions along the middle of the mouse. 183 * vertical touch motions.
164 */ 184 */
165 if (emulate_scroll_wheel && 185 if (emulate_scroll_wheel) {
166 middle_button_start < x && x < middle_button_stop) {
167 static const int accel_profile[] = {
168 256, 228, 192, 160, 128, 96, 64, 32,
169 };
170 unsigned long now = jiffies; 186 unsigned long now = jiffies;
171 int step = msc->touches[id].scroll_y - y; 187 int step_x = msc->touches[id].scroll_x - x;
172 188 int step_y = msc->touches[id].scroll_y - y;
173 /* Reset acceleration after half a second. */
174 if (time_after(now, msc->scroll_jiffies + HZ / 2))
175 msc->scroll_accel = 0;
176 189
177 /* Calculate and apply the scroll motion. */ 190 /* Calculate and apply the scroll motion. */
178 switch (tdata[7] & TOUCH_STATE_MASK) { 191 switch (tdata[7] & TOUCH_STATE_MASK) {
179 case TOUCH_STATE_START: 192 case TOUCH_STATE_START:
193 msc->touches[id].scroll_x = x;
180 msc->touches[id].scroll_y = y; 194 msc->touches[id].scroll_y = y;
181 msc->scroll_accel = min_t(int, msc->scroll_accel + 1, 195
182 ARRAY_SIZE(accel_profile) - 1); 196 /* Reset acceleration after half a second. */
197 if (scroll_acceleration && time_before(now,
198 msc->scroll_jiffies + HZ / 2))
199 msc->scroll_accel = max_t(int,
200 msc->scroll_accel - 1, 1);
201 else
202 msc->scroll_accel = SCROLL_ACCEL_DEFAULT;
203
183 break; 204 break;
184 case TOUCH_STATE_DRAG: 205 case TOUCH_STATE_DRAG:
185 step = step / accel_profile[msc->scroll_accel]; 206 step_x /= (64 - (int)scroll_speed) * msc->scroll_accel;
186 if (step != 0) { 207 if (step_x != 0) {
187 msc->touches[id].scroll_y = y; 208 msc->touches[id].scroll_x -= step_x *
209 (64 - scroll_speed) * msc->scroll_accel;
188 msc->scroll_jiffies = now; 210 msc->scroll_jiffies = now;
189 input_report_rel(input, REL_WHEEL, step); 211 input_report_rel(input, REL_HWHEEL, -step_x);
212 }
213
214 step_y /= (64 - (int)scroll_speed) * msc->scroll_accel;
215 if (step_y != 0) {
216 msc->touches[id].scroll_y -= step_y *
217 (64 - scroll_speed) * msc->scroll_accel;
218 msc->scroll_jiffies = now;
219 input_report_rel(input, REL_WHEEL, step_y);
190 } 220 }
191 break; 221 break;
192 } 222 }
193 } 223 }
194 224
195 /* Generate the input events for this touch. */ 225 /* Generate the input events for this touch. */
196 if (report_touches) { 226 if (report_touches && down) {
197 int orientation = (misc >> 10) - 32; 227 int orientation = (misc >> 10) - 32;
198 228
229 msc->touches[id].down = 1;
230
199 input_report_abs(input, ABS_MT_TRACKING_ID, id); 231 input_report_abs(input, ABS_MT_TRACKING_ID, id);
200 input_report_abs(input, ABS_MT_TOUCH_MAJOR, tdata[3]); 232 input_report_abs(input, ABS_MT_TOUCH_MAJOR, tdata[3]);
201 input_report_abs(input, ABS_MT_TOUCH_MINOR, tdata[4]); 233 input_report_abs(input, ABS_MT_TOUCH_MINOR, tdata[4]);
@@ -215,7 +247,7 @@ static int magicmouse_raw_event(struct hid_device *hdev,
215{ 247{
216 struct magicmouse_sc *msc = hid_get_drvdata(hdev); 248 struct magicmouse_sc *msc = hid_get_drvdata(hdev);
217 struct input_dev *input = msc->input; 249 struct input_dev *input = msc->input;
218 int x, y, ts, ii, clicks; 250 int x, y, ts, ii, clicks, last_up;
219 251
220 switch (data[0]) { 252 switch (data[0]) {
221 case 0x10: 253 case 0x10:
@@ -235,12 +267,26 @@ static int magicmouse_raw_event(struct hid_device *hdev,
235 msc->ntouches = (size - 6) / 8; 267 msc->ntouches = (size - 6) / 8;
236 for (ii = 0; ii < msc->ntouches; ii++) 268 for (ii = 0; ii < msc->ntouches; ii++)
237 magicmouse_emit_touch(msc, ii, data + ii * 8 + 6); 269 magicmouse_emit_touch(msc, ii, data + ii * 8 + 6);
270
271 if (report_touches) {
272 last_up = 1;
273 for (ii = 0; ii < ARRAY_SIZE(msc->touches); ii++) {
274 if (msc->touches[ii].down) {
275 last_up = 0;
276 msc->touches[ii].down = 0;
277 }
278 }
279 if (last_up) {
280 input_mt_sync(input);
281 }
282 }
283
238 /* When emulating three-button mode, it is important 284 /* When emulating three-button mode, it is important
239 * to have the current touch information before 285 * to have the current touch information before
240 * generating a click event. 286 * generating a click event.
241 */ 287 */
242 x = (signed char)data[1]; 288 x = (int)(((data[3] & 0x0c) << 28) | (data[1] << 22)) >> 22;
243 y = (signed char)data[2]; 289 y = (int)(((data[3] & 0x30) << 26) | (data[2] << 22)) >> 22;
244 clicks = data[3]; 290 clicks = data[3];
245 break; 291 break;
246 case 0x20: /* Theoretically battery status (0-100), but I have 292 case 0x20: /* Theoretically battery status (0-100), but I have
@@ -301,8 +347,10 @@ static void magicmouse_setup_input(struct input_dev *input, struct hid_device *h
301 __set_bit(EV_REL, input->evbit); 347 __set_bit(EV_REL, input->evbit);
302 __set_bit(REL_X, input->relbit); 348 __set_bit(REL_X, input->relbit);
303 __set_bit(REL_Y, input->relbit); 349 __set_bit(REL_Y, input->relbit);
304 if (emulate_scroll_wheel) 350 if (emulate_scroll_wheel) {
305 __set_bit(REL_WHEEL, input->relbit); 351 __set_bit(REL_WHEEL, input->relbit);
352 __set_bit(REL_HWHEEL, input->relbit);
353 }
306 354
307 if (report_touches) { 355 if (report_touches) {
308 __set_bit(EV_ABS, input->evbit); 356 __set_bit(EV_ABS, input->evbit);
@@ -345,6 +393,8 @@ static int magicmouse_probe(struct hid_device *hdev,
345 return -ENOMEM; 393 return -ENOMEM;
346 } 394 }
347 395
396 msc->scroll_accel = SCROLL_ACCEL_DEFAULT;
397
348 msc->quirks = id->driver_data; 398 msc->quirks = id->driver_data;
349 hid_set_drvdata(hdev, msc); 399 hid_set_drvdata(hdev, msc);
350 400
diff --git a/drivers/hid/hid-ntrig.c b/drivers/hid/hid-ntrig.c
index b6b0caeeac58..fb69b8c4953f 100644
--- a/drivers/hid/hid-ntrig.c
+++ b/drivers/hid/hid-ntrig.c
@@ -868,6 +868,42 @@ static void ntrig_remove(struct hid_device *hdev)
868static const struct hid_device_id ntrig_devices[] = { 868static const struct hid_device_id ntrig_devices[] = {
869 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN), 869 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN),
870 .driver_data = NTRIG_DUPLICATE_USAGES }, 870 .driver_data = NTRIG_DUPLICATE_USAGES },
871 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_1),
872 .driver_data = NTRIG_DUPLICATE_USAGES },
873 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_2),
874 .driver_data = NTRIG_DUPLICATE_USAGES },
875 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_3),
876 .driver_data = NTRIG_DUPLICATE_USAGES },
877 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_4),
878 .driver_data = NTRIG_DUPLICATE_USAGES },
879 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_5),
880 .driver_data = NTRIG_DUPLICATE_USAGES },
881 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_6),
882 .driver_data = NTRIG_DUPLICATE_USAGES },
883 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_7),
884 .driver_data = NTRIG_DUPLICATE_USAGES },
885 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_8),
886 .driver_data = NTRIG_DUPLICATE_USAGES },
887 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_9),
888 .driver_data = NTRIG_DUPLICATE_USAGES },
889 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_10),
890 .driver_data = NTRIG_DUPLICATE_USAGES },
891 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_11),
892 .driver_data = NTRIG_DUPLICATE_USAGES },
893 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_12),
894 .driver_data = NTRIG_DUPLICATE_USAGES },
895 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_13),
896 .driver_data = NTRIG_DUPLICATE_USAGES },
897 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_14),
898 .driver_data = NTRIG_DUPLICATE_USAGES },
899 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_15),
900 .driver_data = NTRIG_DUPLICATE_USAGES },
901 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_16),
902 .driver_data = NTRIG_DUPLICATE_USAGES },
903 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_17),
904 .driver_data = NTRIG_DUPLICATE_USAGES },
905 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_18),
906 .driver_data = NTRIG_DUPLICATE_USAGES },
871 { } 907 { }
872}; 908};
873MODULE_DEVICE_TABLE(hid, ntrig_devices); 909MODULE_DEVICE_TABLE(hid, ntrig_devices);
diff --git a/drivers/hid/hid-picolcd.c b/drivers/hid/hid-picolcd.c
index 7aabf65c48ef..346f0e34987e 100644
--- a/drivers/hid/hid-picolcd.c
+++ b/drivers/hid/hid-picolcd.c
@@ -127,6 +127,26 @@ static const struct fb_var_screeninfo picolcdfb_var = {
127 .height = 26, 127 .height = 26,
128 .bits_per_pixel = 1, 128 .bits_per_pixel = 1,
129 .grayscale = 1, 129 .grayscale = 1,
130 .red = {
131 .offset = 0,
132 .length = 1,
133 .msb_right = 0,
134 },
135 .green = {
136 .offset = 0,
137 .length = 1,
138 .msb_right = 0,
139 },
140 .blue = {
141 .offset = 0,
142 .length = 1,
143 .msb_right = 0,
144 },
145 .transp = {
146 .offset = 0,
147 .length = 0,
148 .msb_right = 0,
149 },
130}; 150};
131#endif /* CONFIG_HID_PICOLCD_FB */ 151#endif /* CONFIG_HID_PICOLCD_FB */
132 152
@@ -188,6 +208,7 @@ struct picolcd_data {
188 /* Framebuffer stuff */ 208 /* Framebuffer stuff */
189 u8 fb_update_rate; 209 u8 fb_update_rate;
190 u8 fb_bpp; 210 u8 fb_bpp;
211 u8 fb_force;
191 u8 *fb_vbitmap; /* local copy of what was sent to PicoLCD */ 212 u8 *fb_vbitmap; /* local copy of what was sent to PicoLCD */
192 u8 *fb_bitmap; /* framebuffer */ 213 u8 *fb_bitmap; /* framebuffer */
193 struct fb_info *fb_info; 214 struct fb_info *fb_info;
@@ -346,7 +367,7 @@ static int picolcd_fb_update_tile(u8 *vbitmap, const u8 *bitmap, int bpp,
346 const u8 *bdata = bitmap + tile * 256 + chip * 8 + b * 32; 367 const u8 *bdata = bitmap + tile * 256 + chip * 8 + b * 32;
347 for (i = 0; i < 64; i++) { 368 for (i = 0; i < 64; i++) {
348 tdata[i] <<= 1; 369 tdata[i] <<= 1;
349 tdata[i] |= (bdata[i/8] >> (7 - i % 8)) & 0x01; 370 tdata[i] |= (bdata[i/8] >> (i % 8)) & 0x01;
350 } 371 }
351 } 372 }
352 } else if (bpp == 8) { 373 } else if (bpp == 8) {
@@ -399,13 +420,10 @@ static int picolcd_fb_reset(struct picolcd_data *data, int clear)
399 420
400 if (data->fb_bitmap) { 421 if (data->fb_bitmap) {
401 if (clear) { 422 if (clear) {
402 memset(data->fb_vbitmap, 0xff, PICOLCDFB_SIZE); 423 memset(data->fb_vbitmap, 0, PICOLCDFB_SIZE);
403 memset(data->fb_bitmap, 0, PICOLCDFB_SIZE*data->fb_bpp); 424 memset(data->fb_bitmap, 0, PICOLCDFB_SIZE*data->fb_bpp);
404 } else {
405 /* invert 1 byte in each tile to force resend */
406 for (i = 0; i < PICOLCDFB_SIZE; i += 64)
407 data->fb_vbitmap[i] = ~data->fb_vbitmap[i];
408 } 425 }
426 data->fb_force = 1;
409 } 427 }
410 428
411 /* schedule first output of framebuffer */ 429 /* schedule first output of framebuffer */
@@ -421,6 +439,9 @@ static void picolcd_fb_update(struct picolcd_data *data)
421 int chip, tile, n; 439 int chip, tile, n;
422 unsigned long flags; 440 unsigned long flags;
423 441
442 if (!data)
443 return;
444
424 spin_lock_irqsave(&data->lock, flags); 445 spin_lock_irqsave(&data->lock, flags);
425 if (!(data->status & PICOLCD_READY_FB)) { 446 if (!(data->status & PICOLCD_READY_FB)) {
426 spin_unlock_irqrestore(&data->lock, flags); 447 spin_unlock_irqrestore(&data->lock, flags);
@@ -440,14 +461,18 @@ static void picolcd_fb_update(struct picolcd_data *data)
440 for (chip = 0; chip < 4; chip++) 461 for (chip = 0; chip < 4; chip++)
441 for (tile = 0; tile < 8; tile++) 462 for (tile = 0; tile < 8; tile++)
442 if (picolcd_fb_update_tile(data->fb_vbitmap, 463 if (picolcd_fb_update_tile(data->fb_vbitmap,
443 data->fb_bitmap, data->fb_bpp, chip, tile)) { 464 data->fb_bitmap, data->fb_bpp, chip, tile) ||
465 data->fb_force) {
444 n += 2; 466 n += 2;
467 if (!data->fb_info->par)
468 return; /* device lost! */
445 if (n >= HID_OUTPUT_FIFO_SIZE / 2) { 469 if (n >= HID_OUTPUT_FIFO_SIZE / 2) {
446 usbhid_wait_io(data->hdev); 470 usbhid_wait_io(data->hdev);
447 n = 0; 471 n = 0;
448 } 472 }
449 picolcd_fb_send_tile(data->hdev, chip, tile); 473 picolcd_fb_send_tile(data->hdev, chip, tile);
450 } 474 }
475 data->fb_force = false;
451 if (n) 476 if (n)
452 usbhid_wait_io(data->hdev); 477 usbhid_wait_io(data->hdev);
453} 478}
@@ -511,11 +536,23 @@ static int picolcd_fb_blank(int blank, struct fb_info *info)
511static void picolcd_fb_destroy(struct fb_info *info) 536static void picolcd_fb_destroy(struct fb_info *info)
512{ 537{
513 struct picolcd_data *data = info->par; 538 struct picolcd_data *data = info->par;
539 u32 *ref_cnt = info->pseudo_palette;
540 int may_release;
541
514 info->par = NULL; 542 info->par = NULL;
515 if (data) 543 if (data)
516 data->fb_info = NULL; 544 data->fb_info = NULL;
517 fb_deferred_io_cleanup(info); 545 fb_deferred_io_cleanup(info);
518 framebuffer_release(info); 546
547 ref_cnt--;
548 mutex_lock(&info->lock);
549 (*ref_cnt)--;
550 may_release = !ref_cnt;
551 mutex_unlock(&info->lock);
552 if (may_release) {
553 framebuffer_release(info);
554 vfree((u8 *)info->fix.smem_start);
555 }
519} 556}
520 557
521static int picolcd_fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) 558static int picolcd_fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
@@ -526,29 +563,37 @@ static int picolcd_fb_check_var(struct fb_var_screeninfo *var, struct fb_info *i
526 /* only allow 1/8 bit depth (8-bit is grayscale) */ 563 /* only allow 1/8 bit depth (8-bit is grayscale) */
527 *var = picolcdfb_var; 564 *var = picolcdfb_var;
528 var->activate = activate; 565 var->activate = activate;
529 if (bpp >= 8) 566 if (bpp >= 8) {
530 var->bits_per_pixel = 8; 567 var->bits_per_pixel = 8;
531 else 568 var->red.length = 8;
569 var->green.length = 8;
570 var->blue.length = 8;
571 } else {
532 var->bits_per_pixel = 1; 572 var->bits_per_pixel = 1;
573 var->red.length = 1;
574 var->green.length = 1;
575 var->blue.length = 1;
576 }
533 return 0; 577 return 0;
534} 578}
535 579
536static int picolcd_set_par(struct fb_info *info) 580static int picolcd_set_par(struct fb_info *info)
537{ 581{
538 struct picolcd_data *data = info->par; 582 struct picolcd_data *data = info->par;
539 u8 *o_fb, *n_fb; 583 u8 *tmp_fb, *o_fb;
584 if (!data)
585 return -ENODEV;
540 if (info->var.bits_per_pixel == data->fb_bpp) 586 if (info->var.bits_per_pixel == data->fb_bpp)
541 return 0; 587 return 0;
542 /* switch between 1/8 bit depths */ 588 /* switch between 1/8 bit depths */
543 if (info->var.bits_per_pixel != 1 && info->var.bits_per_pixel != 8) 589 if (info->var.bits_per_pixel != 1 && info->var.bits_per_pixel != 8)
544 return -EINVAL; 590 return -EINVAL;
545 591
546 o_fb = data->fb_bitmap; 592 o_fb = data->fb_bitmap;
547 n_fb = vmalloc(PICOLCDFB_SIZE*info->var.bits_per_pixel); 593 tmp_fb = kmalloc(PICOLCDFB_SIZE*info->var.bits_per_pixel, GFP_KERNEL);
548 if (!n_fb) 594 if (!tmp_fb)
549 return -ENOMEM; 595 return -ENOMEM;
550 596
551 fb_deferred_io_cleanup(info);
552 /* translate FB content to new bits-per-pixel */ 597 /* translate FB content to new bits-per-pixel */
553 if (info->var.bits_per_pixel == 1) { 598 if (info->var.bits_per_pixel == 1) {
554 int i, b; 599 int i, b;
@@ -558,24 +603,87 @@ static int picolcd_set_par(struct fb_info *info)
558 p <<= 1; 603 p <<= 1;
559 p |= o_fb[i*8+b] ? 0x01 : 0x00; 604 p |= o_fb[i*8+b] ? 0x01 : 0x00;
560 } 605 }
606 tmp_fb[i] = p;
561 } 607 }
608 memcpy(o_fb, tmp_fb, PICOLCDFB_SIZE);
562 info->fix.visual = FB_VISUAL_MONO01; 609 info->fix.visual = FB_VISUAL_MONO01;
563 info->fix.line_length = PICOLCDFB_WIDTH / 8; 610 info->fix.line_length = PICOLCDFB_WIDTH / 8;
564 } else { 611 } else {
565 int i; 612 int i;
613 memcpy(tmp_fb, o_fb, PICOLCDFB_SIZE);
566 for (i = 0; i < PICOLCDFB_SIZE * 8; i++) 614 for (i = 0; i < PICOLCDFB_SIZE * 8; i++)
567 n_fb[i] = o_fb[i/8] & (0x01 << (7 - i % 8)) ? 0xff : 0x00; 615 o_fb[i] = tmp_fb[i/8] & (0x01 << (7 - i % 8)) ? 0xff : 0x00;
568 info->fix.visual = FB_VISUAL_TRUECOLOR; 616 info->fix.visual = FB_VISUAL_DIRECTCOLOR;
569 info->fix.line_length = PICOLCDFB_WIDTH; 617 info->fix.line_length = PICOLCDFB_WIDTH;
570 } 618 }
571 619
572 data->fb_bitmap = n_fb; 620 kfree(tmp_fb);
573 data->fb_bpp = info->var.bits_per_pixel; 621 data->fb_bpp = info->var.bits_per_pixel;
574 info->screen_base = (char __force __iomem *)n_fb; 622 return 0;
575 info->fix.smem_start = (unsigned long)n_fb; 623}
576 info->fix.smem_len = PICOLCDFB_SIZE*data->fb_bpp; 624
577 fb_deferred_io_init(info); 625/* Do refcounting on our FB and cleanup per worker if FB is
578 vfree(o_fb); 626 * closed after unplug of our device
627 * (fb_release holds info->lock and still touches info after
628 * we return so we can't release it immediately.
629 */
630struct picolcd_fb_cleanup_item {
631 struct fb_info *info;
632 struct picolcd_fb_cleanup_item *next;
633};
634static struct picolcd_fb_cleanup_item *fb_pending;
635DEFINE_SPINLOCK(fb_pending_lock);
636
637static void picolcd_fb_do_cleanup(struct work_struct *data)
638{
639 struct picolcd_fb_cleanup_item *item;
640 unsigned long flags;
641
642 do {
643 spin_lock_irqsave(&fb_pending_lock, flags);
644 item = fb_pending;
645 fb_pending = item ? item->next : NULL;
646 spin_unlock_irqrestore(&fb_pending_lock, flags);
647
648 if (item) {
649 u8 *fb = (u8 *)item->info->fix.smem_start;
650 /* make sure we do not race against fb core when
651 * releasing */
652 mutex_lock(&item->info->lock);
653 mutex_unlock(&item->info->lock);
654 framebuffer_release(item->info);
655 vfree(fb);
656 }
657 } while (item);
658}
659
660DECLARE_WORK(picolcd_fb_cleanup, picolcd_fb_do_cleanup);
661
662static int picolcd_fb_open(struct fb_info *info, int u)
663{
664 u32 *ref_cnt = info->pseudo_palette;
665 ref_cnt--;
666
667 (*ref_cnt)++;
668 return 0;
669}
670
671static int picolcd_fb_release(struct fb_info *info, int u)
672{
673 u32 *ref_cnt = info->pseudo_palette;
674 ref_cnt--;
675
676 (*ref_cnt)++;
677 if (!*ref_cnt) {
678 unsigned long flags;
679 struct picolcd_fb_cleanup_item *item = (struct picolcd_fb_cleanup_item *)ref_cnt;
680 item--;
681 spin_lock_irqsave(&fb_pending_lock, flags);
682 item->next = fb_pending;
683 fb_pending = item;
684 spin_unlock_irqrestore(&fb_pending_lock, flags);
685 schedule_work(&picolcd_fb_cleanup);
686 }
579 return 0; 687 return 0;
580} 688}
581 689
@@ -583,6 +691,8 @@ static int picolcd_set_par(struct fb_info *info)
583static struct fb_ops picolcdfb_ops = { 691static struct fb_ops picolcdfb_ops = {
584 .owner = THIS_MODULE, 692 .owner = THIS_MODULE,
585 .fb_destroy = picolcd_fb_destroy, 693 .fb_destroy = picolcd_fb_destroy,
694 .fb_open = picolcd_fb_open,
695 .fb_release = picolcd_fb_release,
586 .fb_read = fb_sys_read, 696 .fb_read = fb_sys_read,
587 .fb_write = picolcd_fb_write, 697 .fb_write = picolcd_fb_write,
588 .fb_blank = picolcd_fb_blank, 698 .fb_blank = picolcd_fb_blank,
@@ -660,11 +770,12 @@ static int picolcd_init_framebuffer(struct picolcd_data *data)
660{ 770{
661 struct device *dev = &data->hdev->dev; 771 struct device *dev = &data->hdev->dev;
662 struct fb_info *info = NULL; 772 struct fb_info *info = NULL;
663 int error = -ENOMEM; 773 int i, error = -ENOMEM;
664 u8 *fb_vbitmap = NULL; 774 u8 *fb_vbitmap = NULL;
665 u8 *fb_bitmap = NULL; 775 u8 *fb_bitmap = NULL;
776 u32 *palette;
666 777
667 fb_bitmap = vmalloc(PICOLCDFB_SIZE*picolcdfb_var.bits_per_pixel); 778 fb_bitmap = vmalloc(PICOLCDFB_SIZE*8);
668 if (fb_bitmap == NULL) { 779 if (fb_bitmap == NULL) {
669 dev_err(dev, "can't get a free page for framebuffer\n"); 780 dev_err(dev, "can't get a free page for framebuffer\n");
670 goto err_nomem; 781 goto err_nomem;
@@ -678,18 +789,29 @@ static int picolcd_init_framebuffer(struct picolcd_data *data)
678 789
679 data->fb_update_rate = PICOLCDFB_UPDATE_RATE_DEFAULT; 790 data->fb_update_rate = PICOLCDFB_UPDATE_RATE_DEFAULT;
680 data->fb_defio = picolcd_fb_defio; 791 data->fb_defio = picolcd_fb_defio;
681 info = framebuffer_alloc(0, dev); 792 /* The extra memory is:
793 * - struct picolcd_fb_cleanup_item
794 * - u32 for ref_count
795 * - 256*u32 for pseudo_palette
796 */
797 info = framebuffer_alloc(257 * sizeof(u32) + sizeof(struct picolcd_fb_cleanup_item), dev);
682 if (info == NULL) { 798 if (info == NULL) {
683 dev_err(dev, "failed to allocate a framebuffer\n"); 799 dev_err(dev, "failed to allocate a framebuffer\n");
684 goto err_nomem; 800 goto err_nomem;
685 } 801 }
686 802
803 palette = info->par + sizeof(struct picolcd_fb_cleanup_item);
804 *palette = 1;
805 palette++;
806 for (i = 0; i < 256; i++)
807 palette[i] = i > 0 && i < 16 ? 0xff : 0;
808 info->pseudo_palette = palette;
687 info->fbdefio = &data->fb_defio; 809 info->fbdefio = &data->fb_defio;
688 info->screen_base = (char __force __iomem *)fb_bitmap; 810 info->screen_base = (char __force __iomem *)fb_bitmap;
689 info->fbops = &picolcdfb_ops; 811 info->fbops = &picolcdfb_ops;
690 info->var = picolcdfb_var; 812 info->var = picolcdfb_var;
691 info->fix = picolcdfb_fix; 813 info->fix = picolcdfb_fix;
692 info->fix.smem_len = PICOLCDFB_SIZE; 814 info->fix.smem_len = PICOLCDFB_SIZE*8;
693 info->fix.smem_start = (unsigned long)fb_bitmap; 815 info->fix.smem_start = (unsigned long)fb_bitmap;
694 info->par = data; 816 info->par = data;
695 info->flags = FBINFO_FLAG_DEFAULT; 817 info->flags = FBINFO_FLAG_DEFAULT;
@@ -707,18 +829,20 @@ static int picolcd_init_framebuffer(struct picolcd_data *data)
707 dev_err(dev, "failed to create sysfs attributes\n"); 829 dev_err(dev, "failed to create sysfs attributes\n");
708 goto err_cleanup; 830 goto err_cleanup;
709 } 831 }
832 fb_deferred_io_init(info);
710 data->fb_info = info; 833 data->fb_info = info;
711 error = register_framebuffer(info); 834 error = register_framebuffer(info);
712 if (error) { 835 if (error) {
713 dev_err(dev, "failed to register framebuffer\n"); 836 dev_err(dev, "failed to register framebuffer\n");
714 goto err_sysfs; 837 goto err_sysfs;
715 } 838 }
716 fb_deferred_io_init(info);
717 /* schedule first output of framebuffer */ 839 /* schedule first output of framebuffer */
840 data->fb_force = 1;
718 schedule_delayed_work(&info->deferred_work, 0); 841 schedule_delayed_work(&info->deferred_work, 0);
719 return 0; 842 return 0;
720 843
721err_sysfs: 844err_sysfs:
845 fb_deferred_io_cleanup(info);
722 device_remove_file(dev, &dev_attr_fb_update_rate); 846 device_remove_file(dev, &dev_attr_fb_update_rate);
723err_cleanup: 847err_cleanup:
724 data->fb_vbitmap = NULL; 848 data->fb_vbitmap = NULL;
@@ -737,19 +861,17 @@ static void picolcd_exit_framebuffer(struct picolcd_data *data)
737{ 861{
738 struct fb_info *info = data->fb_info; 862 struct fb_info *info = data->fb_info;
739 u8 *fb_vbitmap = data->fb_vbitmap; 863 u8 *fb_vbitmap = data->fb_vbitmap;
740 u8 *fb_bitmap = data->fb_bitmap;
741 864
742 if (!info) 865 if (!info)
743 return; 866 return;
744 867
868 info->par = NULL;
869 device_remove_file(&data->hdev->dev, &dev_attr_fb_update_rate);
870 unregister_framebuffer(info);
745 data->fb_vbitmap = NULL; 871 data->fb_vbitmap = NULL;
746 data->fb_bitmap = NULL; 872 data->fb_bitmap = NULL;
747 data->fb_bpp = 0; 873 data->fb_bpp = 0;
748 data->fb_info = NULL; 874 data->fb_info = NULL;
749 device_remove_file(&data->hdev->dev, &dev_attr_fb_update_rate);
750 fb_deferred_io_cleanup(info);
751 unregister_framebuffer(info);
752 vfree(fb_bitmap);
753 kfree(fb_vbitmap); 875 kfree(fb_vbitmap);
754} 876}
755 877
@@ -2566,6 +2688,13 @@ static void picolcd_remove(struct hid_device *hdev)
2566 spin_lock_irqsave(&data->lock, flags); 2688 spin_lock_irqsave(&data->lock, flags);
2567 data->status |= PICOLCD_FAILED; 2689 data->status |= PICOLCD_FAILED;
2568 spin_unlock_irqrestore(&data->lock, flags); 2690 spin_unlock_irqrestore(&data->lock, flags);
2691#ifdef CONFIG_HID_PICOLCD_FB
2692 /* short-circuit FB as early as possible in order to
2693 * avoid long delays if we host console.
2694 */
2695 if (data->fb_info)
2696 data->fb_info->par = NULL;
2697#endif
2569 2698
2570 picolcd_exit_devfs(data); 2699 picolcd_exit_devfs(data);
2571 device_remove_file(&hdev->dev, &dev_attr_operation_mode); 2700 device_remove_file(&hdev->dev, &dev_attr_operation_mode);
@@ -2623,6 +2752,10 @@ static int __init picolcd_init(void)
2623static void __exit picolcd_exit(void) 2752static void __exit picolcd_exit(void)
2624{ 2753{
2625 hid_unregister_driver(&picolcd_driver); 2754 hid_unregister_driver(&picolcd_driver);
2755#ifdef CONFIG_HID_PICOLCD_FB
2756 flush_scheduled_work();
2757 WARN_ON(fb_pending);
2758#endif
2626} 2759}
2627 2760
2628module_init(picolcd_init); 2761module_init(picolcd_init);
diff --git a/drivers/hid/hid-roccat-kone.c b/drivers/hid/hid-roccat-kone.c
index 17f2dc04f883..f77695762cb5 100644
--- a/drivers/hid/hid-roccat-kone.c
+++ b/drivers/hid/hid-roccat-kone.c
@@ -22,11 +22,6 @@
22 * Is it possible to remove and reinstall the urb in raw-event- or any 22 * Is it possible to remove and reinstall the urb in raw-event- or any
23 * other handler, or to defer this action to be executed somewhere else? 23 * other handler, or to defer this action to be executed somewhere else?
24 * 24 *
25 * TODO implement notification mechanism for overlong macro execution
26 * If user wants to execute an overlong macro only the names of macroset
27 * and macro are given. Should userland tap hidraw or is there an
28 * additional streaming mechanism?
29 *
30 * TODO is it possible to overwrite group for sysfs attributes via udev? 25 * TODO is it possible to overwrite group for sysfs attributes via udev?
31 */ 26 */
32 27
@@ -277,7 +272,7 @@ static ssize_t kone_sysfs_read_settings(struct file *fp, struct kobject *kobj,
277 count = sizeof(struct kone_settings) - off; 272 count = sizeof(struct kone_settings) - off;
278 273
279 mutex_lock(&kone->kone_lock); 274 mutex_lock(&kone->kone_lock);
280 memcpy(buf, &kone->settings + off, count); 275 memcpy(buf, ((char const *)&kone->settings) + off, count);
281 mutex_unlock(&kone->kone_lock); 276 mutex_unlock(&kone->kone_lock);
282 277
283 return count; 278 return count;
@@ -337,7 +332,7 @@ static ssize_t kone_sysfs_read_profilex(struct kobject *kobj,
337 count = sizeof(struct kone_profile) - off; 332 count = sizeof(struct kone_profile) - off;
338 333
339 mutex_lock(&kone->kone_lock); 334 mutex_lock(&kone->kone_lock);
340 memcpy(buf, &kone->profiles[number - 1], sizeof(struct kone_profile)); 335 memcpy(buf, ((char const *)&kone->profiles[number - 1]) + off, count);
341 mutex_unlock(&kone->kone_lock); 336 mutex_unlock(&kone->kone_lock);
342 337
343 return count; 338 return count;
@@ -623,18 +618,6 @@ static ssize_t kone_sysfs_set_startup_profile(struct device *dev,
623} 618}
624 619
625/* 620/*
626 * This file is used by userland software to find devices that are handled by
627 * this driver. This provides a consistent way for actual and older kernels
628 * where this driver replaced usbhid instead of generic-usb.
629 * Driver capabilities are determined by version number.
630 */
631static ssize_t kone_sysfs_show_driver_version(struct device *dev,
632 struct device_attribute *attr, char *buf)
633{
634 return snprintf(buf, PAGE_SIZE, ROCCAT_KONE_DRIVER_VERSION "\n");
635}
636
637/*
638 * Read actual dpi settings. 621 * Read actual dpi settings.
639 * Returns raw value for further processing. Refer to enum kone_polling_rates to 622 * Returns raw value for further processing. Refer to enum kone_polling_rates to
640 * get real value. 623 * get real value.
@@ -671,9 +654,6 @@ static DEVICE_ATTR(startup_profile, 0660,
671 kone_sysfs_show_startup_profile, 654 kone_sysfs_show_startup_profile,
672 kone_sysfs_set_startup_profile); 655 kone_sysfs_set_startup_profile);
673 656
674static DEVICE_ATTR(kone_driver_version, 0440,
675 kone_sysfs_show_driver_version, NULL);
676
677static struct attribute *kone_attributes[] = { 657static struct attribute *kone_attributes[] = {
678 &dev_attr_actual_dpi.attr, 658 &dev_attr_actual_dpi.attr,
679 &dev_attr_actual_profile.attr, 659 &dev_attr_actual_profile.attr,
@@ -681,7 +661,6 @@ static struct attribute *kone_attributes[] = {
681 &dev_attr_firmware_version.attr, 661 &dev_attr_firmware_version.attr,
682 &dev_attr_tcu.attr, 662 &dev_attr_tcu.attr,
683 &dev_attr_startup_profile.attr, 663 &dev_attr_startup_profile.attr,
684 &dev_attr_kone_driver_version.attr,
685 NULL 664 NULL
686}; 665};
687 666
diff --git a/drivers/hid/hid-roccat-kone.h b/drivers/hid/hid-roccat-kone.h
index 003e6f81c195..130d6566ea82 100644
--- a/drivers/hid/hid-roccat-kone.h
+++ b/drivers/hid/hid-roccat-kone.h
@@ -14,8 +14,6 @@
14 14
15#include <linux/types.h> 15#include <linux/types.h>
16 16
17#define ROCCAT_KONE_DRIVER_VERSION "v0.3.1"
18
19#pragma pack(push) 17#pragma pack(push)
20#pragma pack(1) 18#pragma pack(1)
21 19
diff --git a/drivers/hid/hid-roccat.c b/drivers/hid/hid-roccat.c
index e05d48edb66f..f6e80c7ca61e 100644
--- a/drivers/hid/hid-roccat.c
+++ b/drivers/hid/hid-roccat.c
@@ -168,7 +168,7 @@ static int roccat_open(struct inode *inode, struct file *file)
168 printk(KERN_EMERG "roccat device with minor %d doesn't exist\n", 168 printk(KERN_EMERG "roccat device with minor %d doesn't exist\n",
169 minor); 169 minor);
170 error = -ENODEV; 170 error = -ENODEV;
171 goto exit_unlock; 171 goto exit_err;
172 } 172 }
173 173
174 if (!device->open++) { 174 if (!device->open++) {
@@ -178,7 +178,7 @@ static int roccat_open(struct inode *inode, struct file *file)
178 PM_HINT_FULLON); 178 PM_HINT_FULLON);
179 if (error < 0) { 179 if (error < 0) {
180 --device->open; 180 --device->open;
181 goto exit_unlock; 181 goto exit_err;
182 } 182 }
183 } 183 }
184 error = device->hid->ll_driver->open(device->hid); 184 error = device->hid->ll_driver->open(device->hid);
@@ -187,7 +187,7 @@ static int roccat_open(struct inode *inode, struct file *file)
187 device->hid->ll_driver->power(device->hid, 187 device->hid->ll_driver->power(device->hid,
188 PM_HINT_NORMAL); 188 PM_HINT_NORMAL);
189 --device->open; 189 --device->open;
190 goto exit_unlock; 190 goto exit_err;
191 } 191 }
192 } 192 }
193 193
@@ -202,6 +202,9 @@ exit_unlock:
202 mutex_unlock(&device->readers_lock); 202 mutex_unlock(&device->readers_lock);
203 mutex_unlock(&devices_lock); 203 mutex_unlock(&devices_lock);
204 return error; 204 return error;
205exit_err:
206 kfree(reader);
207 goto exit_unlock;
205} 208}
206 209
207static int roccat_release(struct inode *inode, struct file *file) 210static int roccat_release(struct inode *inode, struct file *file)
diff --git a/drivers/hid/hid-roccat.h b/drivers/hid/hid-roccat.h
index d8aae0c1fa7e..09e864e9f79d 100644
--- a/drivers/hid/hid-roccat.h
+++ b/drivers/hid/hid-roccat.h
@@ -15,7 +15,7 @@
15#include <linux/hid.h> 15#include <linux/hid.h>
16#include <linux/types.h> 16#include <linux/types.h>
17 17
18#if defined(CONFIG_HID_ROCCAT) || defined (CONFIG_HID_ROCCAT_MODULE) 18#if defined(CONFIG_HID_ROCCAT) || defined(CONFIG_HID_ROCCAT_MODULE)
19int roccat_connect(struct hid_device *hid); 19int roccat_connect(struct hid_device *hid);
20void roccat_disconnect(int minor); 20void roccat_disconnect(int minor);
21int roccat_report_event(int minor, u8 const *data, int len); 21int roccat_report_event(int minor, u8 const *data, int len);
diff --git a/drivers/hid/hid-topseed.c b/drivers/hid/hid-topseed.c
index 2eebdcc57bcf..5771f851f856 100644
--- a/drivers/hid/hid-topseed.c
+++ b/drivers/hid/hid-topseed.c
@@ -6,6 +6,9 @@
6 * 6 *
7 * Modified to also support BTC "Emprex 3009URF III Vista MCE Remote" by 7 * Modified to also support BTC "Emprex 3009URF III Vista MCE Remote" by
8 * Wayne Thomas 2010. 8 * Wayne Thomas 2010.
9 *
10 * Modified to support Conceptronic CLLRCMCE by
11 * Kees Bakker 2010.
9 */ 12 */
10 13
11/* 14/*
@@ -34,6 +37,7 @@ static int ts_input_mapping(struct hid_device *hdev, struct hid_input *hi,
34 case 0x00d: ts_map_key_clear(KEY_MEDIA); break; 37 case 0x00d: ts_map_key_clear(KEY_MEDIA); break;
35 case 0x024: ts_map_key_clear(KEY_MENU); break; 38 case 0x024: ts_map_key_clear(KEY_MENU); break;
36 case 0x025: ts_map_key_clear(KEY_TV); break; 39 case 0x025: ts_map_key_clear(KEY_TV); break;
40 case 0x027: ts_map_key_clear(KEY_MODE); break;
37 case 0x031: ts_map_key_clear(KEY_AUDIO); break; 41 case 0x031: ts_map_key_clear(KEY_AUDIO); break;
38 case 0x032: ts_map_key_clear(KEY_TEXT); break; 42 case 0x032: ts_map_key_clear(KEY_TEXT); break;
39 case 0x033: ts_map_key_clear(KEY_CHANNEL); break; 43 case 0x033: ts_map_key_clear(KEY_CHANNEL); break;
@@ -60,6 +64,7 @@ static int ts_input_mapping(struct hid_device *hdev, struct hid_input *hi,
60static const struct hid_device_id ts_devices[] = { 64static const struct hid_device_id ts_devices[] = {
61 { HID_USB_DEVICE(USB_VENDOR_ID_TOPSEED, USB_DEVICE_ID_TOPSEED_CYBERLINK) }, 65 { HID_USB_DEVICE(USB_VENDOR_ID_TOPSEED, USB_DEVICE_ID_TOPSEED_CYBERLINK) },
62 { HID_USB_DEVICE(USB_VENDOR_ID_BTC, USB_DEVICE_ID_BTC_EMPREX_REMOTE) }, 66 { HID_USB_DEVICE(USB_VENDOR_ID_BTC, USB_DEVICE_ID_BTC_EMPREX_REMOTE) },
67 { HID_USB_DEVICE(USB_VENDOR_ID_TOPSEED2, USB_DEVICE_ID_TOPSEED2_RF_COMBO) },
63 { } 68 { }
64}; 69};
65MODULE_DEVICE_TABLE(hid, ts_devices); 70MODULE_DEVICE_TABLE(hid, ts_devices);
diff --git a/drivers/hid/hid-wacom.c b/drivers/hid/hid-wacom.c
index 1e051f1171e4..807dcd1555a6 100644
--- a/drivers/hid/hid-wacom.c
+++ b/drivers/hid/hid-wacom.c
@@ -436,7 +436,7 @@ static void wacom_remove(struct hid_device *hdev)
436 436
437static const struct hid_device_id wacom_devices[] = { 437static const struct hid_device_id wacom_devices[] = {
438 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_WACOM, USB_DEVICE_ID_WACOM_GRAPHIRE_BLUETOOTH) }, 438 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_WACOM, USB_DEVICE_ID_WACOM_GRAPHIRE_BLUETOOTH) },
439 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_WACOM, USB_DEVICE_ID_WACOM_INTUOS4_BLUETOOTH) }, 439
440 { } 440 { }
441}; 441};
442MODULE_DEVICE_TABLE(hid, wacom_devices); 442MODULE_DEVICE_TABLE(hid, wacom_devices);
diff --git a/drivers/hid/hidraw.c b/drivers/hid/hidraw.c
index 3ccd47850677..47d70c523d93 100644
--- a/drivers/hid/hidraw.c
+++ b/drivers/hid/hidraw.c
@@ -46,7 +46,6 @@ static ssize_t hidraw_read(struct file *file, char __user *buffer, size_t count,
46{ 46{
47 struct hidraw_list *list = file->private_data; 47 struct hidraw_list *list = file->private_data;
48 int ret = 0, len; 48 int ret = 0, len;
49 char *report;
50 DECLARE_WAITQUEUE(wait, current); 49 DECLARE_WAITQUEUE(wait, current);
51 50
52 mutex_lock(&list->read_mutex); 51 mutex_lock(&list->read_mutex);
@@ -84,7 +83,6 @@ static ssize_t hidraw_read(struct file *file, char __user *buffer, size_t count,
84 if (ret) 83 if (ret)
85 goto out; 84 goto out;
86 85
87 report = list->buffer[list->tail].value;
88 len = list->buffer[list->tail].len > count ? 86 len = list->buffer[list->tail].len > count ?
89 count : list->buffer[list->tail].len; 87 count : list->buffer[list->tail].len;
90 88
diff --git a/drivers/hid/usbhid/hid-core.c b/drivers/hid/usbhid/hid-core.c
index 1ebd3244eb85..b729c0286679 100644
--- a/drivers/hid/usbhid/hid-core.c
+++ b/drivers/hid/usbhid/hid-core.c
@@ -827,14 +827,21 @@ static int usbhid_output_raw_report(struct hid_device *hid, __u8 *buf, size_t co
827 ret++; 827 ret++;
828 } 828 }
829 } else { 829 } else {
830 int skipped_report_id = 0;
831 if (buf[0] == 0x0) {
832 /* Don't send the Report ID */
833 buf++;
834 count--;
835 skipped_report_id = 1;
836 }
830 ret = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), 837 ret = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
831 HID_REQ_SET_REPORT, 838 HID_REQ_SET_REPORT,
832 USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE, 839 USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE,
833 ((report_type + 1) << 8) | *buf, 840 ((report_type + 1) << 8) | *buf,
834 interface->desc.bInterfaceNumber, buf + 1, count - 1, 841 interface->desc.bInterfaceNumber, buf, count,
835 USB_CTRL_SET_TIMEOUT); 842 USB_CTRL_SET_TIMEOUT);
836 /* count also the report id */ 843 /* count also the report id, if this was a numbered report. */
837 if (ret > 0) 844 if (ret > 0 && skipped_report_id)
838 ret++; 845 ret++;
839 } 846 }
840 847
diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c
index 5ff8d327f33a..2643d3147621 100644
--- a/drivers/hid/usbhid/hid-quirks.c
+++ b/drivers/hid/usbhid/hid-quirks.c
@@ -34,6 +34,7 @@ static const struct hid_blacklist {
34 { USB_VENDOR_ID_ALPS, USB_DEVICE_ID_IBM_GAMEPAD, HID_QUIRK_BADPAD }, 34 { USB_VENDOR_ID_ALPS, USB_DEVICE_ID_IBM_GAMEPAD, HID_QUIRK_BADPAD },
35 { USB_VENDOR_ID_CHIC, USB_DEVICE_ID_CHIC_GAMEPAD, HID_QUIRK_BADPAD }, 35 { USB_VENDOR_ID_CHIC, USB_DEVICE_ID_CHIC_GAMEPAD, HID_QUIRK_BADPAD },
36 { USB_VENDOR_ID_DWAV, USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH, HID_QUIRK_MULTI_INPUT }, 36 { USB_VENDOR_ID_DWAV, USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH, HID_QUIRK_MULTI_INPUT },
37 { USB_VENDOR_ID_MOJO, USB_DEVICE_ID_RETRO_ADAPTER, HID_QUIRK_MULTI_INPUT },
37 { USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_DRIVING, HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT }, 38 { USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_DRIVING, HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT },
38 { USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FLYING, HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT }, 39 { USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FLYING, HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT },
39 { USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FIGHTING, HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT }, 40 { USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FIGHTING, HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT },
@@ -56,6 +57,7 @@ static const struct hid_blacklist {
56 { USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_4PORTKVM, HID_QUIRK_NOGET }, 57 { USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_4PORTKVM, HID_QUIRK_NOGET },
57 { USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_4PORTKVMC, HID_QUIRK_NOGET }, 58 { USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_4PORTKVMC, HID_QUIRK_NOGET },
58 { USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_COMBATSTICK, HID_QUIRK_NOGET }, 59 { USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_COMBATSTICK, HID_QUIRK_NOGET },
60 { USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_FLIGHT_SIM_ECLIPSE_YOKE, HID_QUIRK_NOGET },
59 { USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_FLIGHT_SIM_YOKE, HID_QUIRK_NOGET }, 61 { USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_FLIGHT_SIM_YOKE, HID_QUIRK_NOGET },
60 { USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_PRO_PEDALS, HID_QUIRK_NOGET }, 62 { USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_PRO_PEDALS, HID_QUIRK_NOGET },
61 { USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_3AXIS_5BUTTON_STICK, HID_QUIRK_NOGET }, 63 { USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_3AXIS_5BUTTON_STICK, HID_QUIRK_NOGET },
@@ -73,6 +75,8 @@ static const struct hid_blacklist {
73 { USB_VENDOR_ID_WISEGROUP_LTD, USB_DEVICE_ID_SMARTJOY_DUAL_PLUS, HID_QUIRK_NOGET | HID_QUIRK_MULTI_INPUT }, 75 { USB_VENDOR_ID_WISEGROUP_LTD, USB_DEVICE_ID_SMARTJOY_DUAL_PLUS, HID_QUIRK_NOGET | HID_QUIRK_MULTI_INPUT },
74 { USB_VENDOR_ID_WISEGROUP_LTD2, USB_DEVICE_ID_SMARTJOY_DUAL_PLUS, HID_QUIRK_NOGET | HID_QUIRK_MULTI_INPUT }, 76 { USB_VENDOR_ID_WISEGROUP_LTD2, USB_DEVICE_ID_SMARTJOY_DUAL_PLUS, HID_QUIRK_NOGET | HID_QUIRK_MULTI_INPUT },
75 77
78 { USB_VENDOR_ID_PI_ENGINEERING, USB_DEVICE_ID_PI_ENGINEERING_VEC_USB_FOOTPEDAL, HID_QUIRK_HIDINPUT_FORCE },
79
76 { 0, 0 } 80 { 0, 0 }
77}; 81};
78 82
diff --git a/drivers/hid/usbhid/hiddev.c b/drivers/hid/usbhid/hiddev.c
index c24d2fa3e3b6..254a003af048 100644
--- a/drivers/hid/usbhid/hiddev.c
+++ b/drivers/hid/usbhid/hiddev.c
@@ -67,7 +67,7 @@ struct hiddev_list {
67 struct mutex thread_lock; 67 struct mutex thread_lock;
68}; 68};
69 69
70static struct hiddev *hiddev_table[HIDDEV_MINORS]; 70static struct usb_driver hiddev_driver;
71 71
72/* 72/*
73 * Find a report, given the report's type and ID. The ID can be specified 73 * Find a report, given the report's type and ID. The ID can be specified
@@ -265,22 +265,19 @@ static int hiddev_release(struct inode * inode, struct file * file)
265static int hiddev_open(struct inode *inode, struct file *file) 265static int hiddev_open(struct inode *inode, struct file *file)
266{ 266{
267 struct hiddev_list *list; 267 struct hiddev_list *list;
268 int res, i; 268 struct usb_interface *intf;
269 269 struct hiddev *hiddev;
270 /* See comment in hiddev_connect() for BKL explanation */ 270 int res;
271 lock_kernel();
272 i = iminor(inode) - HIDDEV_MINOR_BASE;
273 271
274 if (i >= HIDDEV_MINORS || i < 0 || !hiddev_table[i]) 272 intf = usb_find_interface(&hiddev_driver, iminor(inode));
273 if (!intf)
275 return -ENODEV; 274 return -ENODEV;
275 hiddev = usb_get_intfdata(intf);
276 276
277 if (!(list = kzalloc(sizeof(struct hiddev_list), GFP_KERNEL))) 277 if (!(list = kzalloc(sizeof(struct hiddev_list), GFP_KERNEL)))
278 return -ENOMEM; 278 return -ENOMEM;
279 mutex_init(&list->thread_lock); 279 mutex_init(&list->thread_lock);
280 280 list->hiddev = hiddev;
281 list->hiddev = hiddev_table[i];
282
283
284 file->private_data = list; 281 file->private_data = list;
285 282
286 /* 283 /*
@@ -289,7 +286,7 @@ static int hiddev_open(struct inode *inode, struct file *file)
289 */ 286 */
290 if (list->hiddev->exist) { 287 if (list->hiddev->exist) {
291 if (!list->hiddev->open++) { 288 if (!list->hiddev->open++) {
292 res = usbhid_open(hiddev_table[i]->hid); 289 res = usbhid_open(hiddev->hid);
293 if (res < 0) { 290 if (res < 0) {
294 res = -EIO; 291 res = -EIO;
295 goto bail; 292 goto bail;
@@ -301,12 +298,12 @@ static int hiddev_open(struct inode *inode, struct file *file)
301 } 298 }
302 299
303 spin_lock_irq(&list->hiddev->list_lock); 300 spin_lock_irq(&list->hiddev->list_lock);
304 list_add_tail(&list->node, &hiddev_table[i]->list); 301 list_add_tail(&list->node, &hiddev->list);
305 spin_unlock_irq(&list->hiddev->list_lock); 302 spin_unlock_irq(&list->hiddev->list_lock);
306 303
307 if (!list->hiddev->open++) 304 if (!list->hiddev->open++)
308 if (list->hiddev->exist) { 305 if (list->hiddev->exist) {
309 struct hid_device *hid = hiddev_table[i]->hid; 306 struct hid_device *hid = hiddev->hid;
310 res = usbhid_get_power(hid); 307 res = usbhid_get_power(hid);
311 if (res < 0) { 308 if (res < 0) {
312 res = -EIO; 309 res = -EIO;
@@ -314,13 +311,10 @@ static int hiddev_open(struct inode *inode, struct file *file)
314 } 311 }
315 usbhid_open(hid); 312 usbhid_open(hid);
316 } 313 }
317
318 unlock_kernel();
319 return 0; 314 return 0;
320bail: 315bail:
321 file->private_data = NULL; 316 file->private_data = NULL;
322 kfree(list); 317 kfree(list);
323 unlock_kernel();
324 return res; 318 return res;
325} 319}
326 320
@@ -894,37 +888,14 @@ int hiddev_connect(struct hid_device *hid, unsigned int force)
894 hid->hiddev = hiddev; 888 hid->hiddev = hiddev;
895 hiddev->hid = hid; 889 hiddev->hid = hid;
896 hiddev->exist = 1; 890 hiddev->exist = 1;
897 891 usb_set_intfdata(usbhid->intf, usbhid);
898 /*
899 * BKL here is used to avoid race after usb_register_dev().
900 * Once the device node has been created, open() could happen on it.
901 * The code below will then fail, as hiddev_table hasn't been
902 * updated.
903 *
904 * The obvious fix -- introducing mutex to guard hiddev_table[]
905 * doesn't work, as usb_open() and usb_register_dev() both take
906 * minor_rwsem, thus we'll have ABBA deadlock.
907 *
908 * Before BKL pushdown, usb_open() had been acquiring it in right
909 * order, so _open() was safe to use it to protect from this race.
910 * Now the order is different, but AB-BA deadlock still doesn't occur
911 * as BKL is dropped on schedule() (i.e. while sleeping on
912 * minor_rwsem). Fugly.
913 */
914 lock_kernel();
915 retval = usb_register_dev(usbhid->intf, &hiddev_class); 892 retval = usb_register_dev(usbhid->intf, &hiddev_class);
916 if (retval) { 893 if (retval) {
917 err_hid("Not able to get a minor for this device."); 894 err_hid("Not able to get a minor for this device.");
918 hid->hiddev = NULL; 895 hid->hiddev = NULL;
919 unlock_kernel();
920 kfree(hiddev); 896 kfree(hiddev);
921 return -1; 897 return -1;
922 } else {
923 hid->minor = usbhid->intf->minor;
924 hiddev_table[usbhid->intf->minor - HIDDEV_MINOR_BASE] = hiddev;
925 } 898 }
926 unlock_kernel();
927
928 return 0; 899 return 0;
929} 900}
930 901
@@ -942,7 +913,6 @@ void hiddev_disconnect(struct hid_device *hid)
942 hiddev->exist = 0; 913 hiddev->exist = 0;
943 mutex_unlock(&hiddev->existancelock); 914 mutex_unlock(&hiddev->existancelock);
944 915
945 hiddev_table[hiddev->hid->minor - HIDDEV_MINOR_BASE] = NULL;
946 usb_deregister_dev(usbhid->intf, &hiddev_class); 916 usb_deregister_dev(usbhid->intf, &hiddev_class);
947 917
948 if (hiddev->open) { 918 if (hiddev->open) {
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index e19cf8eb6ccf..c57e530d07c7 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -446,6 +446,16 @@ config SENSORS_IT87
446 This driver can also be built as a module. If so, the module 446 This driver can also be built as a module. If so, the module
447 will be called it87. 447 will be called it87.
448 448
449config SENSORS_JZ4740
450 tristate "Ingenic JZ4740 SoC ADC driver"
451 depends on MACH_JZ4740 && MFD_JZ4740_ADC
452 help
453 If you say yes here you get support for reading adc values from the ADCIN
454 pin on Ingenic JZ4740 SoC based boards.
455
456 This driver can also be build as a module. If so, the module will be
457 called jz4740-hwmon.
458
449config SENSORS_LM63 459config SENSORS_LM63
450 tristate "National Semiconductor LM63 and LM64" 460 tristate "National Semiconductor LM63 and LM64"
451 depends on I2C 461 depends on I2C
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 2138ceb1a713..c5057745b068 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -55,6 +55,7 @@ obj-$(CONFIG_SENSORS_I5K_AMB) += i5k_amb.o
55obj-$(CONFIG_SENSORS_IBMAEM) += ibmaem.o 55obj-$(CONFIG_SENSORS_IBMAEM) += ibmaem.o
56obj-$(CONFIG_SENSORS_IBMPEX) += ibmpex.o 56obj-$(CONFIG_SENSORS_IBMPEX) += ibmpex.o
57obj-$(CONFIG_SENSORS_IT87) += it87.o 57obj-$(CONFIG_SENSORS_IT87) += it87.o
58obj-$(CONFIG_SENSORS_JZ4740) += jz4740-hwmon.o
58obj-$(CONFIG_SENSORS_K8TEMP) += k8temp.o 59obj-$(CONFIG_SENSORS_K8TEMP) += k8temp.o
59obj-$(CONFIG_SENSORS_K10TEMP) += k10temp.o 60obj-$(CONFIG_SENSORS_K10TEMP) += k10temp.o
60obj-$(CONFIG_SENSORS_LIS3LV02D) += lis3lv02d.o hp_accel.o 61obj-$(CONFIG_SENSORS_LIS3LV02D) += lis3lv02d.o hp_accel.o
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index 2988da150ed6..05344af50734 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -53,6 +53,7 @@ struct coretemp_data {
53 struct mutex update_lock; 53 struct mutex update_lock;
54 const char *name; 54 const char *name;
55 u32 id; 55 u32 id;
56 u16 core_id;
56 char valid; /* zero until following fields are valid */ 57 char valid; /* zero until following fields are valid */
57 unsigned long last_updated; /* in jiffies */ 58 unsigned long last_updated; /* in jiffies */
58 int temp; 59 int temp;
@@ -75,7 +76,7 @@ static ssize_t show_name(struct device *dev, struct device_attribute
75 if (attr->index == SHOW_NAME) 76 if (attr->index == SHOW_NAME)
76 ret = sprintf(buf, "%s\n", data->name); 77 ret = sprintf(buf, "%s\n", data->name);
77 else /* show label */ 78 else /* show label */
78 ret = sprintf(buf, "Core %d\n", data->id); 79 ret = sprintf(buf, "Core %d\n", data->core_id);
79 return ret; 80 return ret;
80} 81}
81 82
@@ -304,6 +305,9 @@ static int __devinit coretemp_probe(struct platform_device *pdev)
304 } 305 }
305 306
306 data->id = pdev->id; 307 data->id = pdev->id;
308#ifdef CONFIG_SMP
309 data->core_id = c->cpu_core_id;
310#endif
307 data->name = "coretemp"; 311 data->name = "coretemp";
308 mutex_init(&data->update_lock); 312 mutex_init(&data->update_lock);
309 313
@@ -405,6 +409,10 @@ struct pdev_entry {
405 struct list_head list; 409 struct list_head list;
406 struct platform_device *pdev; 410 struct platform_device *pdev;
407 unsigned int cpu; 411 unsigned int cpu;
412#ifdef CONFIG_SMP
413 u16 phys_proc_id;
414 u16 cpu_core_id;
415#endif
408}; 416};
409 417
410static LIST_HEAD(pdev_list); 418static LIST_HEAD(pdev_list);
@@ -415,6 +423,22 @@ static int __cpuinit coretemp_device_add(unsigned int cpu)
415 int err; 423 int err;
416 struct platform_device *pdev; 424 struct platform_device *pdev;
417 struct pdev_entry *pdev_entry; 425 struct pdev_entry *pdev_entry;
426#ifdef CONFIG_SMP
427 struct cpuinfo_x86 *c = &cpu_data(cpu);
428#endif
429
430 mutex_lock(&pdev_list_mutex);
431
432#ifdef CONFIG_SMP
433 /* Skip second HT entry of each core */
434 list_for_each_entry(pdev_entry, &pdev_list, list) {
435 if (c->phys_proc_id == pdev_entry->phys_proc_id &&
436 c->cpu_core_id == pdev_entry->cpu_core_id) {
437 err = 0; /* Not an error */
438 goto exit;
439 }
440 }
441#endif
418 442
419 pdev = platform_device_alloc(DRVNAME, cpu); 443 pdev = platform_device_alloc(DRVNAME, cpu);
420 if (!pdev) { 444 if (!pdev) {
@@ -438,7 +462,10 @@ static int __cpuinit coretemp_device_add(unsigned int cpu)
438 462
439 pdev_entry->pdev = pdev; 463 pdev_entry->pdev = pdev;
440 pdev_entry->cpu = cpu; 464 pdev_entry->cpu = cpu;
441 mutex_lock(&pdev_list_mutex); 465#ifdef CONFIG_SMP
466 pdev_entry->phys_proc_id = c->phys_proc_id;
467 pdev_entry->cpu_core_id = c->cpu_core_id;
468#endif
442 list_add_tail(&pdev_entry->list, &pdev_list); 469 list_add_tail(&pdev_entry->list, &pdev_list);
443 mutex_unlock(&pdev_list_mutex); 470 mutex_unlock(&pdev_list_mutex);
444 471
@@ -449,6 +476,7 @@ exit_device_free:
449exit_device_put: 476exit_device_put:
450 platform_device_put(pdev); 477 platform_device_put(pdev);
451exit: 478exit:
479 mutex_unlock(&pdev_list_mutex);
452 return err; 480 return err;
453} 481}
454 482
diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c
index 5be09c048c5f..25763d2223b6 100644
--- a/drivers/hwmon/it87.c
+++ b/drivers/hwmon/it87.c
@@ -80,6 +80,13 @@ superio_inb(int reg)
80 return inb(VAL); 80 return inb(VAL);
81} 81}
82 82
83static inline void
84superio_outb(int reg, int val)
85{
86 outb(reg, REG);
87 outb(val, VAL);
88}
89
83static int superio_inw(int reg) 90static int superio_inw(int reg)
84{ 91{
85 int val; 92 int val;
@@ -1517,6 +1524,21 @@ static int __init it87_find(unsigned short *address,
1517 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG); 1524 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
1518 1525
1519 reg = superio_inb(IT87_SIO_PINX2_REG); 1526 reg = superio_inb(IT87_SIO_PINX2_REG);
1527 /*
1528 * The IT8720F has no VIN7 pin, so VCCH should always be
1529 * routed internally to VIN7 with an internal divider.
1530 * Curiously, there still is a configuration bit to control
1531 * this, which means it can be set incorrectly. And even
1532 * more curiously, many boards out there are improperly
1533 * configured, even though the IT8720F datasheet claims
1534 * that the internal routing of VCCH to VIN7 is the default
1535 * setting. So we force the internal routing in this case.
1536 */
1537 if (sio_data->type == it8720 && !(reg & (1 << 1))) {
1538 reg |= (1 << 1);
1539 superio_outb(IT87_SIO_PINX2_REG, reg);
1540 pr_notice("it87: Routing internal VCCH to in7\n");
1541 }
1520 if (reg & (1 << 0)) 1542 if (reg & (1 << 0))
1521 pr_info("it87: in3 is VCC (+5V)\n"); 1543 pr_info("it87: in3 is VCC (+5V)\n");
1522 if (reg & (1 << 1)) 1544 if (reg & (1 << 1))
diff --git a/drivers/hwmon/jz4740-hwmon.c b/drivers/hwmon/jz4740-hwmon.c
new file mode 100644
index 000000000000..1c8b3d9e2051
--- /dev/null
+++ b/drivers/hwmon/jz4740-hwmon.c
@@ -0,0 +1,230 @@
1/*
2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
3 * JZ4740 SoC HWMON driver
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * You should have received a copy of the GNU General Public License along
11 * with this program; if not, write to the Free Software Foundation, Inc.,
12 * 675 Mass Ave, Cambridge, MA 02139, USA.
13 *
14 */
15
16#include <linux/err.h>
17#include <linux/interrupt.h>
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/mutex.h>
21#include <linux/platform_device.h>
22#include <linux/slab.h>
23
24#include <linux/completion.h>
25#include <linux/mfd/core.h>
26
27#include <linux/hwmon.h>
28
29struct jz4740_hwmon {
30 struct resource *mem;
31 void __iomem *base;
32
33 int irq;
34
35 struct mfd_cell *cell;
36 struct device *hwmon;
37
38 struct completion read_completion;
39
40 struct mutex lock;
41};
42
43static ssize_t jz4740_hwmon_show_name(struct device *dev,
44 struct device_attribute *dev_attr, char *buf)
45{
46 return sprintf(buf, "jz4740\n");
47}
48
49static irqreturn_t jz4740_hwmon_irq(int irq, void *data)
50{
51 struct jz4740_hwmon *hwmon = data;
52
53 complete(&hwmon->read_completion);
54 return IRQ_HANDLED;
55}
56
57static ssize_t jz4740_hwmon_read_adcin(struct device *dev,
58 struct device_attribute *dev_attr, char *buf)
59{
60 struct jz4740_hwmon *hwmon = dev_get_drvdata(dev);
61 struct completion *completion = &hwmon->read_completion;
62 unsigned long t;
63 unsigned long val;
64 int ret;
65
66 mutex_lock(&hwmon->lock);
67
68 INIT_COMPLETION(*completion);
69
70 enable_irq(hwmon->irq);
71 hwmon->cell->enable(to_platform_device(dev));
72
73 t = wait_for_completion_interruptible_timeout(completion, HZ);
74
75 if (t > 0) {
76 val = readw(hwmon->base) & 0xfff;
77 val = (val * 3300) >> 12;
78 ret = sprintf(buf, "%lu\n", val);
79 } else {
80 ret = t ? t : -ETIMEDOUT;
81 }
82
83 hwmon->cell->disable(to_platform_device(dev));
84 disable_irq(hwmon->irq);
85
86 mutex_unlock(&hwmon->lock);
87
88 return ret;
89}
90
91static DEVICE_ATTR(name, S_IRUGO, jz4740_hwmon_show_name, NULL);
92static DEVICE_ATTR(in0_input, S_IRUGO, jz4740_hwmon_read_adcin, NULL);
93
94static struct attribute *jz4740_hwmon_attributes[] = {
95 &dev_attr_name.attr,
96 &dev_attr_in0_input.attr,
97 NULL
98};
99
100static const struct attribute_group jz4740_hwmon_attr_group = {
101 .attrs = jz4740_hwmon_attributes,
102};
103
104static int __devinit jz4740_hwmon_probe(struct platform_device *pdev)
105{
106 int ret;
107 struct jz4740_hwmon *hwmon;
108
109 hwmon = kmalloc(sizeof(*hwmon), GFP_KERNEL);
110 if (!hwmon) {
111 dev_err(&pdev->dev, "Failed to allocate driver structure\n");
112 return -ENOMEM;
113 }
114
115 hwmon->cell = pdev->dev.platform_data;
116
117 hwmon->irq = platform_get_irq(pdev, 0);
118 if (hwmon->irq < 0) {
119 ret = hwmon->irq;
120 dev_err(&pdev->dev, "Failed to get platform irq: %d\n", ret);
121 goto err_free;
122 }
123
124 hwmon->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
125 if (!hwmon->mem) {
126 ret = -ENOENT;
127 dev_err(&pdev->dev, "Failed to get platform mmio resource\n");
128 goto err_free;
129 }
130
131 hwmon->mem = request_mem_region(hwmon->mem->start,
132 resource_size(hwmon->mem), pdev->name);
133 if (!hwmon->mem) {
134 ret = -EBUSY;
135 dev_err(&pdev->dev, "Failed to request mmio memory region\n");
136 goto err_free;
137 }
138
139 hwmon->base = ioremap_nocache(hwmon->mem->start,
140 resource_size(hwmon->mem));
141 if (!hwmon->base) {
142 ret = -EBUSY;
143 dev_err(&pdev->dev, "Failed to ioremap mmio memory\n");
144 goto err_release_mem_region;
145 }
146
147 init_completion(&hwmon->read_completion);
148 mutex_init(&hwmon->lock);
149
150 platform_set_drvdata(pdev, hwmon);
151
152 ret = request_irq(hwmon->irq, jz4740_hwmon_irq, 0, pdev->name, hwmon);
153 if (ret) {
154 dev_err(&pdev->dev, "Failed to request irq: %d\n", ret);
155 goto err_iounmap;
156 }
157 disable_irq(hwmon->irq);
158
159 ret = sysfs_create_group(&pdev->dev.kobj, &jz4740_hwmon_attr_group);
160 if (ret) {
161 dev_err(&pdev->dev, "Failed to create sysfs group: %d\n", ret);
162 goto err_free_irq;
163 }
164
165 hwmon->hwmon = hwmon_device_register(&pdev->dev);
166 if (IS_ERR(hwmon->hwmon)) {
167 ret = PTR_ERR(hwmon->hwmon);
168 goto err_remove_file;
169 }
170
171 return 0;
172
173err_remove_file:
174 sysfs_remove_group(&pdev->dev.kobj, &jz4740_hwmon_attr_group);
175err_free_irq:
176 free_irq(hwmon->irq, hwmon);
177err_iounmap:
178 platform_set_drvdata(pdev, NULL);
179 iounmap(hwmon->base);
180err_release_mem_region:
181 release_mem_region(hwmon->mem->start, resource_size(hwmon->mem));
182err_free:
183 kfree(hwmon);
184
185 return ret;
186}
187
188static int __devexit jz4740_hwmon_remove(struct platform_device *pdev)
189{
190 struct jz4740_hwmon *hwmon = platform_get_drvdata(pdev);
191
192 hwmon_device_unregister(hwmon->hwmon);
193 sysfs_remove_group(&pdev->dev.kobj, &jz4740_hwmon_attr_group);
194
195 free_irq(hwmon->irq, hwmon);
196
197 iounmap(hwmon->base);
198 release_mem_region(hwmon->mem->start, resource_size(hwmon->mem));
199
200 platform_set_drvdata(pdev, NULL);
201 kfree(hwmon);
202
203 return 0;
204}
205
206struct platform_driver jz4740_hwmon_driver = {
207 .probe = jz4740_hwmon_probe,
208 .remove = __devexit_p(jz4740_hwmon_remove),
209 .driver = {
210 .name = "jz4740-hwmon",
211 .owner = THIS_MODULE,
212 },
213};
214
215static int __init jz4740_hwmon_init(void)
216{
217 return platform_driver_register(&jz4740_hwmon_driver);
218}
219module_init(jz4740_hwmon_init);
220
221static void __exit jz4740_hwmon_exit(void)
222{
223 platform_driver_unregister(&jz4740_hwmon_driver);
224}
225module_exit(jz4740_hwmon_exit);
226
227MODULE_DESCRIPTION("JZ4740 SoC HWMON driver");
228MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
229MODULE_LICENSE("GPL");
230MODULE_ALIAS("platform:jz4740-hwmon");
diff --git a/drivers/hwmon/k8temp.c b/drivers/hwmon/k8temp.c
index f26acdb11681..8bdf80d91598 100644
--- a/drivers/hwmon/k8temp.c
+++ b/drivers/hwmon/k8temp.c
@@ -180,11 +180,13 @@ static int __devinit k8temp_probe(struct pci_dev *pdev,
180 } 180 }
181 181
182 if ((model >= 0x69) && 182 if ((model >= 0x69) &&
183 !(model == 0xc1 || model == 0x6c || model == 0x7c)) { 183 !(model == 0xc1 || model == 0x6c || model == 0x7c ||
184 model == 0x6b || model == 0x6f || model == 0x7f)) {
184 /* 185 /*
185 * RevG desktop CPUs (i.e. no socket S1G1 parts) 186 * RevG desktop CPUs (i.e. no socket S1G1 or
186 * need additional offset, otherwise reported 187 * ASB1 parts) need additional offset,
187 * temperature is below ambient temperature 188 * otherwise reported temperature is below
189 * ambient temperature
188 */ 190 */
189 data->temp_offset = 21000; 191 data->temp_offset = 21000;
190 } 192 }
diff --git a/drivers/hwmon/ultra45_env.c b/drivers/hwmon/ultra45_env.c
index 5da5942cf970..89643261ccdb 100644
--- a/drivers/hwmon/ultra45_env.c
+++ b/drivers/hwmon/ultra45_env.c
@@ -311,12 +311,12 @@ static struct of_platform_driver env_driver = {
311 311
312static int __init env_init(void) 312static int __init env_init(void)
313{ 313{
314 return of_register_driver(&env_driver, &of_bus_type); 314 return of_register_platform_driver(&env_driver);
315} 315}
316 316
317static void __exit env_exit(void) 317static void __exit env_exit(void)
318{ 318{
319 of_unregister_driver(&env_driver); 319 of_unregister_platform_driver(&env_driver);
320} 320}
321 321
322module_init(env_init); 322module_init(env_init);
diff --git a/drivers/i2c/busses/i2c-cpm.c b/drivers/i2c/busses/i2c-cpm.c
index b02b4533651d..e591de1bc704 100644
--- a/drivers/i2c/busses/i2c-cpm.c
+++ b/drivers/i2c/busses/i2c-cpm.c
@@ -652,6 +652,7 @@ static int __devinit cpm_i2c_probe(struct of_device *ofdev,
652 cpm->adap = cpm_ops; 652 cpm->adap = cpm_ops;
653 i2c_set_adapdata(&cpm->adap, cpm); 653 i2c_set_adapdata(&cpm->adap, cpm);
654 cpm->adap.dev.parent = &ofdev->dev; 654 cpm->adap.dev.parent = &ofdev->dev;
655 cpm->adap.dev.of_node = of_node_get(ofdev->dev.of_node);
655 656
656 result = cpm_i2c_setup(cpm); 657 result = cpm_i2c_setup(cpm);
657 if (result) { 658 if (result) {
@@ -676,11 +677,6 @@ static int __devinit cpm_i2c_probe(struct of_device *ofdev,
676 dev_dbg(&ofdev->dev, "hw routines for %s registered.\n", 677 dev_dbg(&ofdev->dev, "hw routines for %s registered.\n",
677 cpm->adap.name); 678 cpm->adap.name);
678 679
679 /*
680 * register OF I2C devices
681 */
682 of_register_i2c_devices(&cpm->adap, ofdev->dev.of_node);
683
684 return 0; 680 return 0;
685out_shut: 681out_shut:
686 cpm_i2c_shutdown(cpm); 682 cpm_i2c_shutdown(cpm);
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index f4b21f2bb8ed..c60081169cc3 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -655,7 +655,7 @@ static void __devinit dmi_check_onboard_device(u8 type, const char *name,
655 /* & ~0x80, ignore enabled/disabled bit */ 655 /* & ~0x80, ignore enabled/disabled bit */
656 if ((type & ~0x80) != dmi_devices[i].type) 656 if ((type & ~0x80) != dmi_devices[i].type)
657 continue; 657 continue;
658 if (strcmp(name, dmi_devices[i].name)) 658 if (strcasecmp(name, dmi_devices[i].name))
659 continue; 659 continue;
660 660
661 memset(&info, 0, sizeof(struct i2c_board_info)); 661 memset(&info, 0, sizeof(struct i2c_board_info));
@@ -704,9 +704,6 @@ static int __devinit i801_probe(struct pci_dev *dev,
704{ 704{
705 unsigned char temp; 705 unsigned char temp;
706 int err, i; 706 int err, i;
707#if defined CONFIG_SENSORS_FSCHMD || defined CONFIG_SENSORS_FSCHMD_MODULE
708 const char *vendor;
709#endif
710 707
711 I801_dev = dev; 708 I801_dev = dev;
712 i801_features = 0; 709 i801_features = 0;
@@ -808,8 +805,7 @@ static int __devinit i801_probe(struct pci_dev *dev,
808 } 805 }
809#endif 806#endif
810#if defined CONFIG_SENSORS_FSCHMD || defined CONFIG_SENSORS_FSCHMD_MODULE 807#if defined CONFIG_SENSORS_FSCHMD || defined CONFIG_SENSORS_FSCHMD_MODULE
811 vendor = dmi_get_system_info(DMI_BOARD_VENDOR); 808 if (dmi_name_in_vendors("FUJITSU"))
812 if (vendor && !strcmp(vendor, "FUJITSU SIEMENS"))
813 dmi_walk(dmi_check_onboard_devices, &i801_adapter); 809 dmi_walk(dmi_check_onboard_devices, &i801_adapter);
814#endif 810#endif
815 811
diff --git a/drivers/i2c/busses/i2c-ibm_iic.c b/drivers/i2c/busses/i2c-ibm_iic.c
index bf344135647a..1168d61418c9 100644
--- a/drivers/i2c/busses/i2c-ibm_iic.c
+++ b/drivers/i2c/busses/i2c-ibm_iic.c
@@ -745,6 +745,7 @@ static int __devinit iic_probe(struct of_device *ofdev,
745 /* Register it with i2c layer */ 745 /* Register it with i2c layer */
746 adap = &dev->adap; 746 adap = &dev->adap;
747 adap->dev.parent = &ofdev->dev; 747 adap->dev.parent = &ofdev->dev;
748 adap->dev.of_node = of_node_get(np);
748 strlcpy(adap->name, "IBM IIC", sizeof(adap->name)); 749 strlcpy(adap->name, "IBM IIC", sizeof(adap->name));
749 i2c_set_adapdata(adap, dev); 750 i2c_set_adapdata(adap, dev);
750 adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; 751 adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
@@ -760,9 +761,6 @@ static int __devinit iic_probe(struct of_device *ofdev,
760 dev_info(&ofdev->dev, "using %s mode\n", 761 dev_info(&ofdev->dev, "using %s mode\n",
761 dev->fast_mode ? "fast (400 kHz)" : "standard (100 kHz)"); 762 dev->fast_mode ? "fast (400 kHz)" : "standard (100 kHz)");
762 763
763 /* Now register all the child nodes */
764 of_register_i2c_devices(adap, np);
765
766 return 0; 764 return 0;
767 765
768error_cleanup: 766error_cleanup:
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index df00eb1f11f9..6545d1c99b61 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -63,6 +63,7 @@ struct mpc_i2c {
63 wait_queue_head_t queue; 63 wait_queue_head_t queue;
64 struct i2c_adapter adap; 64 struct i2c_adapter adap;
65 int irq; 65 int irq;
66 u32 real_clk;
66}; 67};
67 68
68struct mpc_i2c_divider { 69struct mpc_i2c_divider {
@@ -96,20 +97,23 @@ static irqreturn_t mpc_i2c_isr(int irq, void *dev_id)
96/* Sometimes 9th clock pulse isn't generated, and slave doesn't release 97/* Sometimes 9th clock pulse isn't generated, and slave doesn't release
97 * the bus, because it wants to send ACK. 98 * the bus, because it wants to send ACK.
98 * Following sequence of enabling/disabling and sending start/stop generates 99 * Following sequence of enabling/disabling and sending start/stop generates
99 * the pulse, so it's all OK. 100 * the 9 pulses, so it's all OK.
100 */ 101 */
101static void mpc_i2c_fixup(struct mpc_i2c *i2c) 102static void mpc_i2c_fixup(struct mpc_i2c *i2c)
102{ 103{
103 writeccr(i2c, 0); 104 int k;
104 udelay(30); 105 u32 delay_val = 1000000 / i2c->real_clk + 1;
105 writeccr(i2c, CCR_MEN); 106
106 udelay(30); 107 if (delay_val < 2)
107 writeccr(i2c, CCR_MSTA | CCR_MTX); 108 delay_val = 2;
108 udelay(30); 109
109 writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN); 110 for (k = 9; k; k--) {
110 udelay(30); 111 writeccr(i2c, 0);
111 writeccr(i2c, CCR_MEN); 112 writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);
112 udelay(30); 113 udelay(delay_val);
114 writeccr(i2c, CCR_MEN);
115 udelay(delay_val << 1);
116 }
113} 117}
114 118
115static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing) 119static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
@@ -190,15 +194,18 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] __devinitconst = {
190}; 194};
191 195
192static int __devinit mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, 196static int __devinit mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock,
193 int prescaler) 197 int prescaler, u32 *real_clk)
194{ 198{
195 const struct mpc_i2c_divider *div = NULL; 199 const struct mpc_i2c_divider *div = NULL;
196 unsigned int pvr = mfspr(SPRN_PVR); 200 unsigned int pvr = mfspr(SPRN_PVR);
197 u32 divider; 201 u32 divider;
198 int i; 202 int i;
199 203
200 if (clock == MPC_I2C_CLOCK_LEGACY) 204 if (clock == MPC_I2C_CLOCK_LEGACY) {
205 /* see below - default fdr = 0x3f -> div = 2048 */
206 *real_clk = mpc5xxx_get_bus_frequency(node) / 2048;
201 return -EINVAL; 207 return -EINVAL;
208 }
202 209
203 /* Determine divider value */ 210 /* Determine divider value */
204 divider = mpc5xxx_get_bus_frequency(node) / clock; 211 divider = mpc5xxx_get_bus_frequency(node) / clock;
@@ -216,7 +223,8 @@ static int __devinit mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock,
216 break; 223 break;
217 } 224 }
218 225
219 return div ? (int)div->fdr : -EINVAL; 226 *real_clk = mpc5xxx_get_bus_frequency(node) / div->divider;
227 return (int)div->fdr;
220} 228}
221 229
222static void __devinit mpc_i2c_setup_52xx(struct device_node *node, 230static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
@@ -231,13 +239,14 @@ static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
231 return; 239 return;
232 } 240 }
233 241
234 ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler); 242 ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler, &i2c->real_clk);
235 fdr = (ret >= 0) ? ret : 0x3f; /* backward compatibility */ 243 fdr = (ret >= 0) ? ret : 0x3f; /* backward compatibility */
236 244
237 writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR); 245 writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR);
238 246
239 if (ret >= 0) 247 if (ret >= 0)
240 dev_info(i2c->dev, "clock %d Hz (fdr=%d)\n", clock, fdr); 248 dev_info(i2c->dev, "clock %u Hz (fdr=%d)\n", i2c->real_clk,
249 fdr);
241} 250}
242#else /* !(CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x) */ 251#else /* !(CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x) */
243static void __devinit mpc_i2c_setup_52xx(struct device_node *node, 252static void __devinit mpc_i2c_setup_52xx(struct device_node *node,
@@ -334,14 +343,17 @@ static u32 __devinit mpc_i2c_get_sec_cfg_8xxx(void)
334} 343}
335 344
336static int __devinit mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, 345static int __devinit mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock,
337 u32 prescaler) 346 u32 prescaler, u32 *real_clk)
338{ 347{
339 const struct mpc_i2c_divider *div = NULL; 348 const struct mpc_i2c_divider *div = NULL;
340 u32 divider; 349 u32 divider;
341 int i; 350 int i;
342 351
343 if (clock == MPC_I2C_CLOCK_LEGACY) 352 if (clock == MPC_I2C_CLOCK_LEGACY) {
353 /* see below - default fdr = 0x1031 -> div = 16 * 3072 */
354 *real_clk = fsl_get_sys_freq() / prescaler / (16 * 3072);
344 return -EINVAL; 355 return -EINVAL;
356 }
345 357
346 /* Determine proper divider value */ 358 /* Determine proper divider value */
347 if (of_device_is_compatible(node, "fsl,mpc8544-i2c")) 359 if (of_device_is_compatible(node, "fsl,mpc8544-i2c"))
@@ -364,6 +376,7 @@ static int __devinit mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock,
364 break; 376 break;
365 } 377 }
366 378
379 *real_clk = fsl_get_sys_freq() / prescaler / div->divider;
367 return div ? (int)div->fdr : -EINVAL; 380 return div ? (int)div->fdr : -EINVAL;
368} 381}
369 382
@@ -380,7 +393,7 @@ static void __devinit mpc_i2c_setup_8xxx(struct device_node *node,
380 return; 393 return;
381 } 394 }
382 395
383 ret = mpc_i2c_get_fdr_8xxx(node, clock, prescaler); 396 ret = mpc_i2c_get_fdr_8xxx(node, clock, prescaler, &i2c->real_clk);
384 fdr = (ret >= 0) ? ret : 0x1031; /* backward compatibility */ 397 fdr = (ret >= 0) ? ret : 0x1031; /* backward compatibility */
385 398
386 writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR); 399 writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR);
@@ -388,7 +401,7 @@ static void __devinit mpc_i2c_setup_8xxx(struct device_node *node,
388 401
389 if (ret >= 0) 402 if (ret >= 0)
390 dev_info(i2c->dev, "clock %d Hz (dfsrr=%d fdr=%d)\n", 403 dev_info(i2c->dev, "clock %d Hz (dfsrr=%d fdr=%d)\n",
391 clock, fdr >> 8, fdr & 0xff); 404 i2c->real_clk, fdr >> 8, fdr & 0xff);
392} 405}
393 406
394#else /* !CONFIG_FSL_SOC */ 407#else /* !CONFIG_FSL_SOC */
@@ -500,10 +513,14 @@ static int mpc_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
500 return -EINTR; 513 return -EINTR;
501 } 514 }
502 if (time_after(jiffies, orig_jiffies + HZ)) { 515 if (time_after(jiffies, orig_jiffies + HZ)) {
516 u8 status = readb(i2c->base + MPC_I2C_SR);
517
503 dev_dbg(i2c->dev, "timeout\n"); 518 dev_dbg(i2c->dev, "timeout\n");
504 if (readb(i2c->base + MPC_I2C_SR) == 519 if ((status & (CSR_MCF | CSR_MBB | CSR_RXAK)) != 0) {
505 (CSR_MCF | CSR_MBB | CSR_RXAK)) 520 writeb(status & ~CSR_MAL,
521 i2c->base + MPC_I2C_SR);
506 mpc_i2c_fixup(i2c); 522 mpc_i2c_fixup(i2c);
523 }
507 return -EIO; 524 return -EIO;
508 } 525 }
509 schedule(); 526 schedule();
@@ -595,18 +612,26 @@ static int __devinit fsl_i2c_probe(struct of_device *op,
595 mpc_i2c_setup_8xxx(op->dev.of_node, i2c, clock, 0); 612 mpc_i2c_setup_8xxx(op->dev.of_node, i2c, clock, 0);
596 } 613 }
597 614
615 prop = of_get_property(op->dev.of_node, "fsl,timeout", &plen);
616 if (prop && plen == sizeof(u32)) {
617 mpc_ops.timeout = *prop * HZ / 1000000;
618 if (mpc_ops.timeout < 5)
619 mpc_ops.timeout = 5;
620 }
621 dev_info(i2c->dev, "timeout %u us\n", mpc_ops.timeout * 1000000 / HZ);
622
598 dev_set_drvdata(&op->dev, i2c); 623 dev_set_drvdata(&op->dev, i2c);
599 624
600 i2c->adap = mpc_ops; 625 i2c->adap = mpc_ops;
601 i2c_set_adapdata(&i2c->adap, i2c); 626 i2c_set_adapdata(&i2c->adap, i2c);
602 i2c->adap.dev.parent = &op->dev; 627 i2c->adap.dev.parent = &op->dev;
628 i2c->adap.dev.of_node = of_node_get(op->dev.of_node);
603 629
604 result = i2c_add_adapter(&i2c->adap); 630 result = i2c_add_adapter(&i2c->adap);
605 if (result < 0) { 631 if (result < 0) {
606 dev_err(i2c->dev, "failed to add adapter\n"); 632 dev_err(i2c->dev, "failed to add adapter\n");
607 goto fail_add; 633 goto fail_add;
608 } 634 }
609 of_register_i2c_devices(&i2c->adap, op->dev.of_node);
610 635
611 return result; 636 return result;
612 637
diff --git a/drivers/i2c/busses/i2c-sibyte.c b/drivers/i2c/busses/i2c-sibyte.c
index 3d76a188e42f..0fe505d7abe9 100644
--- a/drivers/i2c/busses/i2c-sibyte.c
+++ b/drivers/i2c/busses/i2c-sibyte.c
@@ -94,7 +94,7 @@ static int smbus_xfer(struct i2c_adapter *i2c_adap, u16 addr,
94 } 94 }
95 break; 95 break;
96 default: 96 default:
97 return -1; /* XXXKW better error code? */ 97 return -EOPNOTSUPP;
98 } 98 }
99 99
100 while (csr_in32(SMB_CSR(adap, R_SMB_STATUS)) & M_SMB_BUSY) 100 while (csr_in32(SMB_CSR(adap, R_SMB_STATUS)) & M_SMB_BUSY)
@@ -104,7 +104,7 @@ static int smbus_xfer(struct i2c_adapter *i2c_adap, u16 addr,
104 if (error & M_SMB_ERROR) { 104 if (error & M_SMB_ERROR) {
105 /* Clear error bit by writing a 1 */ 105 /* Clear error bit by writing a 1 */
106 csr_out32(M_SMB_ERROR, SMB_CSR(adap, R_SMB_STATUS)); 106 csr_out32(M_SMB_ERROR, SMB_CSR(adap, R_SMB_STATUS));
107 return -1; /* XXXKW better error code? */ 107 return (error & M_SMB_ERROR_TYPE) ? -EIO : -ENXIO;
108 } 108 }
109 109
110 if (data_bytes == 1) 110 if (data_bytes == 1)
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index 1cca2631e5b3..df937df845eb 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -30,6 +30,8 @@
30#include <linux/init.h> 30#include <linux/init.h>
31#include <linux/idr.h> 31#include <linux/idr.h>
32#include <linux/mutex.h> 32#include <linux/mutex.h>
33#include <linux/of_i2c.h>
34#include <linux/of_device.h>
33#include <linux/completion.h> 35#include <linux/completion.h>
34#include <linux/hardirq.h> 36#include <linux/hardirq.h>
35#include <linux/irqflags.h> 37#include <linux/irqflags.h>
@@ -70,6 +72,10 @@ static int i2c_device_match(struct device *dev, struct device_driver *drv)
70 if (!client) 72 if (!client)
71 return 0; 73 return 0;
72 74
75 /* Attempt an OF style match */
76 if (of_driver_match_device(dev, drv))
77 return 1;
78
73 driver = to_i2c_driver(drv); 79 driver = to_i2c_driver(drv);
74 /* match on an id table if there is one */ 80 /* match on an id table if there is one */
75 if (driver->id_table) 81 if (driver->id_table)
@@ -790,6 +796,9 @@ static int i2c_register_adapter(struct i2c_adapter *adap)
790 if (adap->nr < __i2c_first_dynamic_bus_num) 796 if (adap->nr < __i2c_first_dynamic_bus_num)
791 i2c_scan_static_board_info(adap); 797 i2c_scan_static_board_info(adap);
792 798
799 /* Register devices from the device tree */
800 of_i2c_register_devices(adap);
801
793 /* Notify drivers */ 802 /* Notify drivers */
794 mutex_lock(&core_lock); 803 mutex_lock(&core_lock);
795 dummy = bus_for_each_drv(&i2c_bus_type, NULL, adap, 804 dummy = bus_for_each_drv(&i2c_bus_type, NULL, adap,
@@ -1428,13 +1437,12 @@ static int i2c_detect(struct i2c_adapter *adapter, struct i2c_driver *driver)
1428 if (!(adapter->class & driver->class)) 1437 if (!(adapter->class & driver->class))
1429 goto exit_free; 1438 goto exit_free;
1430 1439
1431 /* Stop here if we can't use SMBUS_QUICK */ 1440 /* Stop here if the bus doesn't support probing */
1432 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_QUICK)) { 1441 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE)) {
1433 if (address_list[0] == I2C_CLIENT_END) 1442 if (address_list[0] == I2C_CLIENT_END)
1434 goto exit_free; 1443 goto exit_free;
1435 1444
1436 dev_warn(&adapter->dev, "SMBus Quick command not supported, " 1445 dev_warn(&adapter->dev, "Probing not supported\n");
1437 "can't probe for chips\n");
1438 err = -EOPNOTSUPP; 1446 err = -EOPNOTSUPP;
1439 goto exit_free; 1447 goto exit_free;
1440 } 1448 }
diff --git a/drivers/ide/ide-gd.c b/drivers/ide/ide-gd.c
index c102d23d9b38..79399534782c 100644
--- a/drivers/ide/ide-gd.c
+++ b/drivers/ide/ide-gd.c
@@ -92,7 +92,7 @@ static void ide_disk_release(struct device *dev)
92 92
93/* 93/*
94 * On HPA drives the capacity needs to be 94 * On HPA drives the capacity needs to be
95 * reinitilized on resume otherwise the disk 95 * reinitialized on resume otherwise the disk
96 * can not be used and a hard reset is required 96 * can not be used and a hard reset is required
97 */ 97 */
98static void ide_gd_resume(ide_drive_t *drive) 98static void ide_gd_resume(ide_drive_t *drive)
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index 54f0fb4cd5d2..03d202b1ff27 100755
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -231,7 +231,7 @@ static int intel_idle(struct cpuidle_device *dev, struct cpuidle_state *state)
231 231
232 stop_critical_timings(); 232 stop_critical_timings();
233#ifndef MODULE 233#ifndef MODULE
234 trace_power_start(POWER_CSTATE, (eax >> 4) + 1); 234 trace_power_start(POWER_CSTATE, (eax >> 4) + 1, cpu);
235#endif 235#endif
236 if (!need_resched()) { 236 if (!need_resched()) {
237 237
diff --git a/drivers/infiniband/core/addr.c b/drivers/infiniband/core/addr.c
index 0b926e45afe2..a5ea1bce9689 100644
--- a/drivers/infiniband/core/addr.c
+++ b/drivers/infiniband/core/addr.c
@@ -215,7 +215,7 @@ static int addr4_resolve(struct sockaddr_in *src_in,
215 215
216 neigh = neigh_lookup(&arp_tbl, &rt->rt_gateway, rt->idev->dev); 216 neigh = neigh_lookup(&arp_tbl, &rt->rt_gateway, rt->idev->dev);
217 if (!neigh || !(neigh->nud_state & NUD_VALID)) { 217 if (!neigh || !(neigh->nud_state & NUD_VALID)) {
218 neigh_event_send(rt->u.dst.neighbour, NULL); 218 neigh_event_send(rt->dst.neighbour, NULL);
219 ret = -ENODATA; 219 ret = -ENODATA;
220 if (neigh) 220 if (neigh)
221 goto release; 221 goto release;
diff --git a/drivers/infiniband/hw/cxgb3/iwch_cm.c b/drivers/infiniband/hw/cxgb3/iwch_cm.c
index ebfb117ba68b..abd683ea326d 100644
--- a/drivers/infiniband/hw/cxgb3/iwch_cm.c
+++ b/drivers/infiniband/hw/cxgb3/iwch_cm.c
@@ -1364,7 +1364,7 @@ static int pass_accept_req(struct t3cdev *tdev, struct sk_buff *skb, void *ctx)
1364 __func__); 1364 __func__);
1365 goto reject; 1365 goto reject;
1366 } 1366 }
1367 dst = &rt->u.dst; 1367 dst = &rt->dst;
1368 l2t = t3_l2t_get(tdev, dst->neighbour, dst->neighbour->dev); 1368 l2t = t3_l2t_get(tdev, dst->neighbour, dst->neighbour->dev);
1369 if (!l2t) { 1369 if (!l2t) {
1370 printk(KERN_ERR MOD "%s - failed to allocate l2t entry!\n", 1370 printk(KERN_ERR MOD "%s - failed to allocate l2t entry!\n",
@@ -1932,7 +1932,7 @@ int iwch_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
1932 err = -EHOSTUNREACH; 1932 err = -EHOSTUNREACH;
1933 goto fail3; 1933 goto fail3;
1934 } 1934 }
1935 ep->dst = &rt->u.dst; 1935 ep->dst = &rt->dst;
1936 1936
1937 /* get a l2t entry */ 1937 /* get a l2t entry */
1938 ep->l2t = t3_l2t_get(ep->com.tdev, ep->dst->neighbour, 1938 ep->l2t = t3_l2t_get(ep->com.tdev, ep->dst->neighbour,
diff --git a/drivers/infiniband/hw/cxgb3/iwch_qp.c b/drivers/infiniband/hw/cxgb3/iwch_qp.c
index ae47bfd22bd5..9bbb65bba67e 100644
--- a/drivers/infiniband/hw/cxgb3/iwch_qp.c
+++ b/drivers/infiniband/hw/cxgb3/iwch_qp.c
@@ -816,7 +816,7 @@ static void __flush_qp(struct iwch_qp *qhp, unsigned long *flag)
816 atomic_inc(&qhp->refcnt); 816 atomic_inc(&qhp->refcnt);
817 spin_unlock_irqrestore(&qhp->lock, *flag); 817 spin_unlock_irqrestore(&qhp->lock, *flag);
818 818
819 /* locking heirarchy: cq lock first, then qp lock. */ 819 /* locking hierarchy: cq lock first, then qp lock. */
820 spin_lock_irqsave(&rchp->lock, *flag); 820 spin_lock_irqsave(&rchp->lock, *flag);
821 spin_lock(&qhp->lock); 821 spin_lock(&qhp->lock);
822 cxio_flush_hw_cq(&rchp->cq); 822 cxio_flush_hw_cq(&rchp->cq);
@@ -827,7 +827,7 @@ static void __flush_qp(struct iwch_qp *qhp, unsigned long *flag)
827 if (flushed) 827 if (flushed)
828 (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context); 828 (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context);
829 829
830 /* locking heirarchy: cq lock first, then qp lock. */ 830 /* locking hierarchy: cq lock first, then qp lock. */
831 spin_lock_irqsave(&schp->lock, *flag); 831 spin_lock_irqsave(&schp->lock, *flag);
832 spin_lock(&qhp->lock); 832 spin_lock(&qhp->lock);
833 cxio_flush_hw_cq(&schp->cq); 833 cxio_flush_hw_cq(&schp->cq);
diff --git a/drivers/infiniband/hw/cxgb4/cm.c b/drivers/infiniband/hw/cxgb4/cm.c
index 30ce0a8eca09..8c9b483a0d93 100644
--- a/drivers/infiniband/hw/cxgb4/cm.c
+++ b/drivers/infiniband/hw/cxgb4/cm.c
@@ -969,7 +969,8 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb)
969 goto err; 969 goto err;
970 goto out; 970 goto out;
971err: 971err:
972 abort_connection(ep, skb, GFP_KERNEL); 972 state_set(&ep->com, ABORTING);
973 send_abort(ep, skb, GFP_KERNEL);
973out: 974out:
974 connect_reply_upcall(ep, err); 975 connect_reply_upcall(ep, err);
975 return; 976 return;
@@ -1364,7 +1365,7 @@ static int pass_accept_req(struct c4iw_dev *dev, struct sk_buff *skb)
1364 __func__); 1365 __func__);
1365 goto reject; 1366 goto reject;
1366 } 1367 }
1367 dst = &rt->u.dst; 1368 dst = &rt->dst;
1368 if (dst->neighbour->dev->flags & IFF_LOOPBACK) { 1369 if (dst->neighbour->dev->flags & IFF_LOOPBACK) {
1369 pdev = ip_dev_find(&init_net, peer_ip); 1370 pdev = ip_dev_find(&init_net, peer_ip);
1370 BUG_ON(!pdev); 1371 BUG_ON(!pdev);
@@ -1372,7 +1373,7 @@ static int pass_accept_req(struct c4iw_dev *dev, struct sk_buff *skb)
1372 pdev, 0); 1373 pdev, 0);
1373 mtu = pdev->mtu; 1374 mtu = pdev->mtu;
1374 tx_chan = cxgb4_port_chan(pdev); 1375 tx_chan = cxgb4_port_chan(pdev);
1375 smac_idx = tx_chan << 1; 1376 smac_idx = (cxgb4_port_viid(pdev) & 0x7F) << 1;
1376 step = dev->rdev.lldi.ntxq / dev->rdev.lldi.nchan; 1377 step = dev->rdev.lldi.ntxq / dev->rdev.lldi.nchan;
1377 txq_idx = cxgb4_port_idx(pdev) * step; 1378 txq_idx = cxgb4_port_idx(pdev) * step;
1378 step = dev->rdev.lldi.nrxq / dev->rdev.lldi.nchan; 1379 step = dev->rdev.lldi.nrxq / dev->rdev.lldi.nchan;
@@ -1383,7 +1384,7 @@ static int pass_accept_req(struct c4iw_dev *dev, struct sk_buff *skb)
1383 dst->neighbour->dev, 0); 1384 dst->neighbour->dev, 0);
1384 mtu = dst_mtu(dst); 1385 mtu = dst_mtu(dst);
1385 tx_chan = cxgb4_port_chan(dst->neighbour->dev); 1386 tx_chan = cxgb4_port_chan(dst->neighbour->dev);
1386 smac_idx = tx_chan << 1; 1387 smac_idx = (cxgb4_port_viid(dst->neighbour->dev) & 0x7F) << 1;
1387 step = dev->rdev.lldi.ntxq / dev->rdev.lldi.nchan; 1388 step = dev->rdev.lldi.ntxq / dev->rdev.lldi.nchan;
1388 txq_idx = cxgb4_port_idx(dst->neighbour->dev) * step; 1389 txq_idx = cxgb4_port_idx(dst->neighbour->dev) * step;
1389 step = dev->rdev.lldi.nrxq / dev->rdev.lldi.nchan; 1390 step = dev->rdev.lldi.nrxq / dev->rdev.lldi.nchan;
@@ -1938,7 +1939,7 @@ int c4iw_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
1938 err = -EHOSTUNREACH; 1939 err = -EHOSTUNREACH;
1939 goto fail3; 1940 goto fail3;
1940 } 1941 }
1941 ep->dst = &rt->u.dst; 1942 ep->dst = &rt->dst;
1942 1943
1943 /* get a l2t entry */ 1944 /* get a l2t entry */
1944 if (ep->dst->neighbour->dev->flags & IFF_LOOPBACK) { 1945 if (ep->dst->neighbour->dev->flags & IFF_LOOPBACK) {
@@ -1950,7 +1951,7 @@ int c4iw_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
1950 pdev, 0); 1951 pdev, 0);
1951 ep->mtu = pdev->mtu; 1952 ep->mtu = pdev->mtu;
1952 ep->tx_chan = cxgb4_port_chan(pdev); 1953 ep->tx_chan = cxgb4_port_chan(pdev);
1953 ep->smac_idx = ep->tx_chan << 1; 1954 ep->smac_idx = (cxgb4_port_viid(pdev) & 0x7F) << 1;
1954 step = ep->com.dev->rdev.lldi.ntxq / 1955 step = ep->com.dev->rdev.lldi.ntxq /
1955 ep->com.dev->rdev.lldi.nchan; 1956 ep->com.dev->rdev.lldi.nchan;
1956 ep->txq_idx = cxgb4_port_idx(pdev) * step; 1957 ep->txq_idx = cxgb4_port_idx(pdev) * step;
@@ -1965,7 +1966,8 @@ int c4iw_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
1965 ep->dst->neighbour->dev, 0); 1966 ep->dst->neighbour->dev, 0);
1966 ep->mtu = dst_mtu(ep->dst); 1967 ep->mtu = dst_mtu(ep->dst);
1967 ep->tx_chan = cxgb4_port_chan(ep->dst->neighbour->dev); 1968 ep->tx_chan = cxgb4_port_chan(ep->dst->neighbour->dev);
1968 ep->smac_idx = ep->tx_chan << 1; 1969 ep->smac_idx = (cxgb4_port_viid(ep->dst->neighbour->dev) &
1970 0x7F) << 1;
1969 step = ep->com.dev->rdev.lldi.ntxq / 1971 step = ep->com.dev->rdev.lldi.ntxq /
1970 ep->com.dev->rdev.lldi.nchan; 1972 ep->com.dev->rdev.lldi.nchan;
1971 ep->txq_idx = cxgb4_port_idx(ep->dst->neighbour->dev) * step; 1973 ep->txq_idx = cxgb4_port_idx(ep->dst->neighbour->dev) * step;
diff --git a/drivers/infiniband/hw/cxgb4/cq.c b/drivers/infiniband/hw/cxgb4/cq.c
index 2447f5295482..fac5c6e68011 100644
--- a/drivers/infiniband/hw/cxgb4/cq.c
+++ b/drivers/infiniband/hw/cxgb4/cq.c
@@ -77,7 +77,7 @@ static int destroy_cq(struct c4iw_rdev *rdev, struct t4_cq *cq,
77 kfree(cq->sw_queue); 77 kfree(cq->sw_queue);
78 dma_free_coherent(&(rdev->lldi.pdev->dev), 78 dma_free_coherent(&(rdev->lldi.pdev->dev),
79 cq->memsize, cq->queue, 79 cq->memsize, cq->queue,
80 pci_unmap_addr(cq, mapping)); 80 dma_unmap_addr(cq, mapping));
81 c4iw_put_cqid(rdev, cq->cqid, uctx); 81 c4iw_put_cqid(rdev, cq->cqid, uctx);
82 return ret; 82 return ret;
83} 83}
@@ -112,7 +112,7 @@ static int create_cq(struct c4iw_rdev *rdev, struct t4_cq *cq,
112 ret = -ENOMEM; 112 ret = -ENOMEM;
113 goto err3; 113 goto err3;
114 } 114 }
115 pci_unmap_addr_set(cq, mapping, cq->dma_addr); 115 dma_unmap_addr_set(cq, mapping, cq->dma_addr);
116 memset(cq->queue, 0, cq->memsize); 116 memset(cq->queue, 0, cq->memsize);
117 117
118 /* build fw_ri_res_wr */ 118 /* build fw_ri_res_wr */
@@ -179,7 +179,7 @@ static int create_cq(struct c4iw_rdev *rdev, struct t4_cq *cq,
179 return 0; 179 return 0;
180err4: 180err4:
181 dma_free_coherent(&rdev->lldi.pdev->dev, cq->memsize, cq->queue, 181 dma_free_coherent(&rdev->lldi.pdev->dev, cq->memsize, cq->queue,
182 pci_unmap_addr(cq, mapping)); 182 dma_unmap_addr(cq, mapping));
183err3: 183err3:
184 kfree(cq->sw_queue); 184 kfree(cq->sw_queue);
185err2: 185err2:
@@ -764,7 +764,7 @@ struct ib_cq *c4iw_create_cq(struct ib_device *ibdev, int entries,
764 struct c4iw_create_cq_resp uresp; 764 struct c4iw_create_cq_resp uresp;
765 struct c4iw_ucontext *ucontext = NULL; 765 struct c4iw_ucontext *ucontext = NULL;
766 int ret; 766 int ret;
767 size_t memsize; 767 size_t memsize, hwentries;
768 struct c4iw_mm_entry *mm, *mm2; 768 struct c4iw_mm_entry *mm, *mm2;
769 769
770 PDBG("%s ib_dev %p entries %d\n", __func__, ibdev, entries); 770 PDBG("%s ib_dev %p entries %d\n", __func__, ibdev, entries);
@@ -788,14 +788,29 @@ struct ib_cq *c4iw_create_cq(struct ib_device *ibdev, int entries,
788 * entries must be multiple of 16 for HW. 788 * entries must be multiple of 16 for HW.
789 */ 789 */
790 entries = roundup(entries, 16); 790 entries = roundup(entries, 16);
791 memsize = entries * sizeof *chp->cq.queue; 791
792 /*
793 * Make actual HW queue 2x to avoid cdix_inc overflows.
794 */
795 hwentries = entries * 2;
796
797 /*
798 * Make HW queue at least 64 entries so GTS updates aren't too
799 * frequent.
800 */
801 if (hwentries < 64)
802 hwentries = 64;
803
804 memsize = hwentries * sizeof *chp->cq.queue;
792 805
793 /* 806 /*
794 * memsize must be a multiple of the page size if its a user cq. 807 * memsize must be a multiple of the page size if its a user cq.
795 */ 808 */
796 if (ucontext) 809 if (ucontext) {
797 memsize = roundup(memsize, PAGE_SIZE); 810 memsize = roundup(memsize, PAGE_SIZE);
798 chp->cq.size = entries; 811 hwentries = memsize / sizeof *chp->cq.queue;
812 }
813 chp->cq.size = hwentries;
799 chp->cq.memsize = memsize; 814 chp->cq.memsize = memsize;
800 815
801 ret = create_cq(&rhp->rdev, &chp->cq, 816 ret = create_cq(&rhp->rdev, &chp->cq,
@@ -805,7 +820,7 @@ struct ib_cq *c4iw_create_cq(struct ib_device *ibdev, int entries,
805 820
806 chp->rhp = rhp; 821 chp->rhp = rhp;
807 chp->cq.size--; /* status page */ 822 chp->cq.size--; /* status page */
808 chp->ibcq.cqe = chp->cq.size - 1; 823 chp->ibcq.cqe = entries - 2;
809 spin_lock_init(&chp->lock); 824 spin_lock_init(&chp->lock);
810 atomic_set(&chp->refcnt, 1); 825 atomic_set(&chp->refcnt, 1);
811 init_waitqueue_head(&chp->wait); 826 init_waitqueue_head(&chp->wait);
diff --git a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h
index 277ab589b44d..d33e1a668811 100644
--- a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h
+++ b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h
@@ -261,7 +261,7 @@ static inline struct c4iw_mw *to_c4iw_mw(struct ib_mw *ibmw)
261 261
262struct c4iw_fr_page_list { 262struct c4iw_fr_page_list {
263 struct ib_fast_reg_page_list ibpl; 263 struct ib_fast_reg_page_list ibpl;
264 DECLARE_PCI_UNMAP_ADDR(mapping); 264 DEFINE_DMA_UNMAP_ADDR(mapping);
265 dma_addr_t dma_addr; 265 dma_addr_t dma_addr;
266 struct c4iw_dev *dev; 266 struct c4iw_dev *dev;
267 int size; 267 int size;
diff --git a/drivers/infiniband/hw/cxgb4/mem.c b/drivers/infiniband/hw/cxgb4/mem.c
index 7f94da1a2437..82b5703b8947 100644
--- a/drivers/infiniband/hw/cxgb4/mem.c
+++ b/drivers/infiniband/hw/cxgb4/mem.c
@@ -764,7 +764,7 @@ struct ib_fast_reg_page_list *c4iw_alloc_fastreg_pbl(struct ib_device *device,
764 if (!c4pl) 764 if (!c4pl)
765 return ERR_PTR(-ENOMEM); 765 return ERR_PTR(-ENOMEM);
766 766
767 pci_unmap_addr_set(c4pl, mapping, dma_addr); 767 dma_unmap_addr_set(c4pl, mapping, dma_addr);
768 c4pl->dma_addr = dma_addr; 768 c4pl->dma_addr = dma_addr;
769 c4pl->dev = dev; 769 c4pl->dev = dev;
770 c4pl->size = size; 770 c4pl->size = size;
@@ -779,7 +779,7 @@ void c4iw_free_fastreg_pbl(struct ib_fast_reg_page_list *ibpl)
779 struct c4iw_fr_page_list *c4pl = to_c4iw_fr_page_list(ibpl); 779 struct c4iw_fr_page_list *c4pl = to_c4iw_fr_page_list(ibpl);
780 780
781 dma_free_coherent(&c4pl->dev->rdev.lldi.pdev->dev, c4pl->size, 781 dma_free_coherent(&c4pl->dev->rdev.lldi.pdev->dev, c4pl->size,
782 c4pl, pci_unmap_addr(c4pl, mapping)); 782 c4pl, dma_unmap_addr(c4pl, mapping));
783} 783}
784 784
785int c4iw_dereg_mr(struct ib_mr *ib_mr) 785int c4iw_dereg_mr(struct ib_mr *ib_mr)
diff --git a/drivers/infiniband/hw/cxgb4/qp.c b/drivers/infiniband/hw/cxgb4/qp.c
index 0c28ed1eafa6..86b93f2ecca3 100644
--- a/drivers/infiniband/hw/cxgb4/qp.c
+++ b/drivers/infiniband/hw/cxgb4/qp.c
@@ -40,10 +40,10 @@ static int destroy_qp(struct c4iw_rdev *rdev, struct t4_wq *wq,
40 */ 40 */
41 dma_free_coherent(&(rdev->lldi.pdev->dev), 41 dma_free_coherent(&(rdev->lldi.pdev->dev),
42 wq->rq.memsize, wq->rq.queue, 42 wq->rq.memsize, wq->rq.queue,
43 pci_unmap_addr(&wq->rq, mapping)); 43 dma_unmap_addr(&wq->rq, mapping));
44 dma_free_coherent(&(rdev->lldi.pdev->dev), 44 dma_free_coherent(&(rdev->lldi.pdev->dev),
45 wq->sq.memsize, wq->sq.queue, 45 wq->sq.memsize, wq->sq.queue,
46 pci_unmap_addr(&wq->sq, mapping)); 46 dma_unmap_addr(&wq->sq, mapping));
47 c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); 47 c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size);
48 kfree(wq->rq.sw_rq); 48 kfree(wq->rq.sw_rq);
49 kfree(wq->sq.sw_sq); 49 kfree(wq->sq.sw_sq);
@@ -99,7 +99,7 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq,
99 if (!wq->sq.queue) 99 if (!wq->sq.queue)
100 goto err5; 100 goto err5;
101 memset(wq->sq.queue, 0, wq->sq.memsize); 101 memset(wq->sq.queue, 0, wq->sq.memsize);
102 pci_unmap_addr_set(&wq->sq, mapping, wq->sq.dma_addr); 102 dma_unmap_addr_set(&wq->sq, mapping, wq->sq.dma_addr);
103 103
104 wq->rq.queue = dma_alloc_coherent(&(rdev->lldi.pdev->dev), 104 wq->rq.queue = dma_alloc_coherent(&(rdev->lldi.pdev->dev),
105 wq->rq.memsize, &(wq->rq.dma_addr), 105 wq->rq.memsize, &(wq->rq.dma_addr),
@@ -112,7 +112,7 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq,
112 wq->rq.queue, 112 wq->rq.queue,
113 (unsigned long long)virt_to_phys(wq->rq.queue)); 113 (unsigned long long)virt_to_phys(wq->rq.queue));
114 memset(wq->rq.queue, 0, wq->rq.memsize); 114 memset(wq->rq.queue, 0, wq->rq.memsize);
115 pci_unmap_addr_set(&wq->rq, mapping, wq->rq.dma_addr); 115 dma_unmap_addr_set(&wq->rq, mapping, wq->rq.dma_addr);
116 116
117 wq->db = rdev->lldi.db_reg; 117 wq->db = rdev->lldi.db_reg;
118 wq->gts = rdev->lldi.gts_reg; 118 wq->gts = rdev->lldi.gts_reg;
@@ -217,11 +217,11 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq,
217err7: 217err7:
218 dma_free_coherent(&(rdev->lldi.pdev->dev), 218 dma_free_coherent(&(rdev->lldi.pdev->dev),
219 wq->rq.memsize, wq->rq.queue, 219 wq->rq.memsize, wq->rq.queue,
220 pci_unmap_addr(&wq->rq, mapping)); 220 dma_unmap_addr(&wq->rq, mapping));
221err6: 221err6:
222 dma_free_coherent(&(rdev->lldi.pdev->dev), 222 dma_free_coherent(&(rdev->lldi.pdev->dev),
223 wq->sq.memsize, wq->sq.queue, 223 wq->sq.memsize, wq->sq.queue,
224 pci_unmap_addr(&wq->sq, mapping)); 224 dma_unmap_addr(&wq->sq, mapping));
225err5: 225err5:
226 c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); 226 c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size);
227err4: 227err4:
@@ -905,7 +905,7 @@ static void __flush_qp(struct c4iw_qp *qhp, struct c4iw_cq *rchp,
905 atomic_inc(&qhp->refcnt); 905 atomic_inc(&qhp->refcnt);
906 spin_unlock_irqrestore(&qhp->lock, *flag); 906 spin_unlock_irqrestore(&qhp->lock, *flag);
907 907
908 /* locking heirarchy: cq lock first, then qp lock. */ 908 /* locking hierarchy: cq lock first, then qp lock. */
909 spin_lock_irqsave(&rchp->lock, *flag); 909 spin_lock_irqsave(&rchp->lock, *flag);
910 spin_lock(&qhp->lock); 910 spin_lock(&qhp->lock);
911 c4iw_flush_hw_cq(&rchp->cq); 911 c4iw_flush_hw_cq(&rchp->cq);
@@ -916,7 +916,7 @@ static void __flush_qp(struct c4iw_qp *qhp, struct c4iw_cq *rchp,
916 if (flushed) 916 if (flushed)
917 (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context); 917 (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context);
918 918
919 /* locking heirarchy: cq lock first, then qp lock. */ 919 /* locking hierarchy: cq lock first, then qp lock. */
920 spin_lock_irqsave(&schp->lock, *flag); 920 spin_lock_irqsave(&schp->lock, *flag);
921 spin_lock(&qhp->lock); 921 spin_lock(&qhp->lock);
922 c4iw_flush_hw_cq(&schp->cq); 922 c4iw_flush_hw_cq(&schp->cq);
diff --git a/drivers/infiniband/hw/cxgb4/t4.h b/drivers/infiniband/hw/cxgb4/t4.h
index 1057cb96302e..9cf8d85bfcff 100644
--- a/drivers/infiniband/hw/cxgb4/t4.h
+++ b/drivers/infiniband/hw/cxgb4/t4.h
@@ -279,7 +279,7 @@ struct t4_swsqe {
279struct t4_sq { 279struct t4_sq {
280 union t4_wr *queue; 280 union t4_wr *queue;
281 dma_addr_t dma_addr; 281 dma_addr_t dma_addr;
282 DECLARE_PCI_UNMAP_ADDR(mapping); 282 DEFINE_DMA_UNMAP_ADDR(mapping);
283 struct t4_swsqe *sw_sq; 283 struct t4_swsqe *sw_sq;
284 struct t4_swsqe *oldest_read; 284 struct t4_swsqe *oldest_read;
285 u64 udb; 285 u64 udb;
@@ -298,7 +298,7 @@ struct t4_swrqe {
298struct t4_rq { 298struct t4_rq {
299 union t4_recv_wr *queue; 299 union t4_recv_wr *queue;
300 dma_addr_t dma_addr; 300 dma_addr_t dma_addr;
301 DECLARE_PCI_UNMAP_ADDR(mapping); 301 DEFINE_DMA_UNMAP_ADDR(mapping);
302 struct t4_swrqe *sw_rq; 302 struct t4_swrqe *sw_rq;
303 u64 udb; 303 u64 udb;
304 size_t memsize; 304 size_t memsize;
@@ -429,7 +429,7 @@ static inline int t4_wq_db_enabled(struct t4_wq *wq)
429struct t4_cq { 429struct t4_cq {
430 struct t4_cqe *queue; 430 struct t4_cqe *queue;
431 dma_addr_t dma_addr; 431 dma_addr_t dma_addr;
432 DECLARE_PCI_UNMAP_ADDR(mapping); 432 DEFINE_DMA_UNMAP_ADDR(mapping);
433 struct t4_cqe *sw_queue; 433 struct t4_cqe *sw_queue;
434 void __iomem *gts; 434 void __iomem *gts;
435 struct c4iw_rdev *rdev; 435 struct c4iw_rdev *rdev;
diff --git a/drivers/infiniband/hw/ehca/hcp_if.h b/drivers/infiniband/hw/ehca/hcp_if.h
index 39c1c3618ec7..a46e514c367b 100644
--- a/drivers/infiniband/hw/ehca/hcp_if.h
+++ b/drivers/infiniband/hw/ehca/hcp_if.h
@@ -49,7 +49,7 @@
49#include "hipz_hw.h" 49#include "hipz_hw.h"
50 50
51/* 51/*
52 * hipz_h_alloc_resource_eq allocates EQ resources in HW and FW, initalize 52 * hipz_h_alloc_resource_eq allocates EQ resources in HW and FW, initialize
53 * resources, create the empty EQPT (ring). 53 * resources, create the empty EQPT (ring).
54 */ 54 */
55u64 hipz_h_alloc_resource_eq(const struct ipz_adapter_handle adapter_handle, 55u64 hipz_h_alloc_resource_eq(const struct ipz_adapter_handle adapter_handle,
diff --git a/drivers/infiniband/hw/ipath/ipath_file_ops.c b/drivers/infiniband/hw/ipath/ipath_file_ops.c
index 9c5c66d16a23..65eb8929db22 100644
--- a/drivers/infiniband/hw/ipath/ipath_file_ops.c
+++ b/drivers/infiniband/hw/ipath/ipath_file_ops.c
@@ -2055,7 +2055,7 @@ static int ipath_close(struct inode *in, struct file *fp)
2055 2055
2056 mutex_lock(&ipath_mutex); 2056 mutex_lock(&ipath_mutex);
2057 2057
2058 fd = (struct ipath_filedata *) fp->private_data; 2058 fd = fp->private_data;
2059 fp->private_data = NULL; 2059 fp->private_data = NULL;
2060 pd = fd->pd; 2060 pd = fd->pd;
2061 if (!pd) { 2061 if (!pd) {
diff --git a/drivers/infiniband/hw/nes/nes_cm.c b/drivers/infiniband/hw/nes/nes_cm.c
index 986d6f32dded..d876d0435cd4 100644
--- a/drivers/infiniband/hw/nes/nes_cm.c
+++ b/drivers/infiniband/hw/nes/nes_cm.c
@@ -1146,7 +1146,7 @@ static int nes_addr_resolve_neigh(struct nes_vnic *nesvnic, u32 dst_ip, int arpi
1146 } 1146 }
1147 1147
1148 if ((neigh == NULL) || (!(neigh->nud_state & NUD_VALID))) 1148 if ((neigh == NULL) || (!(neigh->nud_state & NUD_VALID)))
1149 neigh_event_send(rt->u.dst.neighbour, NULL); 1149 neigh_event_send(rt->dst.neighbour, NULL);
1150 1150
1151 ip_rt_put(rt); 1151 ip_rt_put(rt);
1152 return rc; 1152 return rc;
diff --git a/drivers/infiniband/hw/nes/nes_nic.c b/drivers/infiniband/hw/nes/nes_nic.c
index 5cc0a9ae5bb1..42e7aad1ec23 100644
--- a/drivers/infiniband/hw/nes/nes_nic.c
+++ b/drivers/infiniband/hw/nes/nes_nic.c
@@ -1567,6 +1567,12 @@ static int nes_netdev_set_settings(struct net_device *netdev, struct ethtool_cmd
1567} 1567}
1568 1568
1569 1569
1570static int nes_netdev_set_flags(struct net_device *netdev, u32 flags)
1571{
1572 return ethtool_op_set_flags(netdev, flags, ETH_FLAG_LRO);
1573}
1574
1575
1570static const struct ethtool_ops nes_ethtool_ops = { 1576static const struct ethtool_ops nes_ethtool_ops = {
1571 .get_link = ethtool_op_get_link, 1577 .get_link = ethtool_op_get_link,
1572 .get_settings = nes_netdev_get_settings, 1578 .get_settings = nes_netdev_get_settings,
@@ -1588,7 +1594,7 @@ static const struct ethtool_ops nes_ethtool_ops = {
1588 .get_tso = ethtool_op_get_tso, 1594 .get_tso = ethtool_op_get_tso,
1589 .set_tso = ethtool_op_set_tso, 1595 .set_tso = ethtool_op_set_tso,
1590 .get_flags = ethtool_op_get_flags, 1596 .get_flags = ethtool_op_get_flags,
1591 .set_flags = ethtool_op_set_flags, 1597 .set_flags = nes_netdev_set_flags,
1592}; 1598};
1593 1599
1594 1600
diff --git a/drivers/infiniband/hw/qib/Makefile b/drivers/infiniband/hw/qib/Makefile
index c6515a1b9a6a..f12d7bb8b39f 100644
--- a/drivers/infiniband/hw/qib/Makefile
+++ b/drivers/infiniband/hw/qib/Makefile
@@ -6,7 +6,7 @@ ib_qib-y := qib_cq.o qib_diag.o qib_dma.o qib_driver.o qib_eeprom.o \
6 qib_qp.o qib_qsfp.o qib_rc.o qib_ruc.o qib_sdma.o qib_srq.o \ 6 qib_qp.o qib_qsfp.o qib_rc.o qib_ruc.o qib_sdma.o qib_srq.o \
7 qib_sysfs.o qib_twsi.o qib_tx.o qib_uc.o qib_ud.o \ 7 qib_sysfs.o qib_twsi.o qib_tx.o qib_uc.o qib_ud.o \
8 qib_user_pages.o qib_user_sdma.o qib_verbs_mcast.o qib_iba7220.o \ 8 qib_user_pages.o qib_user_sdma.o qib_verbs_mcast.o qib_iba7220.o \
9 qib_sd7220.o qib_sd7220_img.o qib_iba7322.o qib_verbs.o 9 qib_sd7220.o qib_iba7322.o qib_verbs.o
10 10
11# 6120 has no fallback if no MSI interrupts, others can do INTx 11# 6120 has no fallback if no MSI interrupts, others can do INTx
12ib_qib-$(CONFIG_PCI_MSI) += qib_iba6120.o 12ib_qib-$(CONFIG_PCI_MSI) += qib_iba6120.o
diff --git a/drivers/infiniband/hw/qib/qib.h b/drivers/infiniband/hw/qib/qib.h
index 32d9208efcff..3593983df7ba 100644
--- a/drivers/infiniband/hw/qib/qib.h
+++ b/drivers/infiniband/hw/qib/qib.h
@@ -686,6 +686,7 @@ struct qib_devdata {
686 void __iomem *piobase; 686 void __iomem *piobase;
687 /* mem-mapped pointer to base of user chip regs (if using WC PAT) */ 687 /* mem-mapped pointer to base of user chip regs (if using WC PAT) */
688 u64 __iomem *userbase; 688 u64 __iomem *userbase;
689 void __iomem *piovl15base; /* base of VL15 buffers, if not WC */
689 /* 690 /*
690 * points to area where PIOavail registers will be DMA'ed. 691 * points to area where PIOavail registers will be DMA'ed.
691 * Has to be on a page of it's own, because the page will be 692 * Has to be on a page of it's own, because the page will be
diff --git a/drivers/infiniband/hw/qib/qib_7220.h b/drivers/infiniband/hw/qib/qib_7220.h
index ea0bfd896f92..21f374aa0631 100644
--- a/drivers/infiniband/hw/qib/qib_7220.h
+++ b/drivers/infiniband/hw/qib/qib_7220.h
@@ -109,10 +109,6 @@ struct qib_chippport_specific {
109 */ 109 */
110int qib_sd7220_presets(struct qib_devdata *dd); 110int qib_sd7220_presets(struct qib_devdata *dd);
111int qib_sd7220_init(struct qib_devdata *dd); 111int qib_sd7220_init(struct qib_devdata *dd);
112int qib_sd7220_prog_ld(struct qib_devdata *dd, int sdnum, u8 *img,
113 int len, int offset);
114int qib_sd7220_prog_vfy(struct qib_devdata *dd, int sdnum, const u8 *img,
115 int len, int offset);
116void qib_sd7220_clr_ibpar(struct qib_devdata *); 112void qib_sd7220_clr_ibpar(struct qib_devdata *);
117/* 113/*
118 * Below used for sdnum parameter, selecting one of the two sections 114 * Below used for sdnum parameter, selecting one of the two sections
@@ -121,9 +117,6 @@ void qib_sd7220_clr_ibpar(struct qib_devdata *);
121 */ 117 */
122#define IB_7220_SERDES 2 118#define IB_7220_SERDES 2
123 119
124int qib_sd7220_ib_load(struct qib_devdata *dd);
125int qib_sd7220_ib_vfy(struct qib_devdata *dd);
126
127static inline u32 qib_read_kreg32(const struct qib_devdata *dd, 120static inline u32 qib_read_kreg32(const struct qib_devdata *dd,
128 const u16 regno) 121 const u16 regno)
129{ 122{
diff --git a/drivers/infiniband/hw/qib/qib_7322_regs.h b/drivers/infiniband/hw/qib/qib_7322_regs.h
index a97440ba924c..32dc81ff8d4a 100644
--- a/drivers/infiniband/hw/qib/qib_7322_regs.h
+++ b/drivers/infiniband/hw/qib/qib_7322_regs.h
@@ -742,15 +742,15 @@
742#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_LSB 0xF 742#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_LSB 0xF
743#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_MSB 0xF 743#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_MSB 0xF
744#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_RMASK 0x1 744#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_RMASK 0x1
745#define QIB_7322_HwErrMask_statusValidNoEopMask_1_LSB 0xE 745#define QIB_7322_HwErrMask_IBCBusToSPCParityErrMask_1_LSB 0xE
746#define QIB_7322_HwErrMask_statusValidNoEopMask_1_MSB 0xE 746#define QIB_7322_HwErrMask_IBCBusToSPCParityErrMask_1_MSB 0xE
747#define QIB_7322_HwErrMask_statusValidNoEopMask_1_RMASK 0x1 747#define QIB_7322_HwErrMask_IBCBusToSPCParityErrMask_1_RMASK 0x1
748#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_LSB 0xD 748#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_LSB 0xD
749#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_MSB 0xD 749#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_MSB 0xD
750#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_RMASK 0x1 750#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_RMASK 0x1
751#define QIB_7322_HwErrMask_statusValidNoEopMask_0_LSB 0xC 751#define QIB_7322_HwErrMask_statusValidNoEopMask_LSB 0xC
752#define QIB_7322_HwErrMask_statusValidNoEopMask_0_MSB 0xC 752#define QIB_7322_HwErrMask_statusValidNoEopMask_MSB 0xC
753#define QIB_7322_HwErrMask_statusValidNoEopMask_0_RMASK 0x1 753#define QIB_7322_HwErrMask_statusValidNoEopMask_RMASK 0x1
754#define QIB_7322_HwErrMask_LATriggeredMask_LSB 0xB 754#define QIB_7322_HwErrMask_LATriggeredMask_LSB 0xB
755#define QIB_7322_HwErrMask_LATriggeredMask_MSB 0xB 755#define QIB_7322_HwErrMask_LATriggeredMask_MSB 0xB
756#define QIB_7322_HwErrMask_LATriggeredMask_RMASK 0x1 756#define QIB_7322_HwErrMask_LATriggeredMask_RMASK 0x1
@@ -796,15 +796,15 @@
796#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_LSB 0xF 796#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_LSB 0xF
797#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_MSB 0xF 797#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_MSB 0xF
798#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_RMASK 0x1 798#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_RMASK 0x1
799#define QIB_7322_HwErrStatus_statusValidNoEop_1_LSB 0xE 799#define QIB_7322_HwErrStatus_IBCBusToSPCParityErr_1_LSB 0xE
800#define QIB_7322_HwErrStatus_statusValidNoEop_1_MSB 0xE 800#define QIB_7322_HwErrStatus_IBCBusToSPCParityErr_1_MSB 0xE
801#define QIB_7322_HwErrStatus_statusValidNoEop_1_RMASK 0x1 801#define QIB_7322_HwErrStatus_IBCBusToSPCParityErr_1_RMASK 0x1
802#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_LSB 0xD 802#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_LSB 0xD
803#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_MSB 0xD 803#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_MSB 0xD
804#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_RMASK 0x1 804#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_RMASK 0x1
805#define QIB_7322_HwErrStatus_statusValidNoEop_0_LSB 0xC 805#define QIB_7322_HwErrStatus_statusValidNoEop_LSB 0xC
806#define QIB_7322_HwErrStatus_statusValidNoEop_0_MSB 0xC 806#define QIB_7322_HwErrStatus_statusValidNoEop_MSB 0xC
807#define QIB_7322_HwErrStatus_statusValidNoEop_0_RMASK 0x1 807#define QIB_7322_HwErrStatus_statusValidNoEop_RMASK 0x1
808#define QIB_7322_HwErrStatus_LATriggered_LSB 0xB 808#define QIB_7322_HwErrStatus_LATriggered_LSB 0xB
809#define QIB_7322_HwErrStatus_LATriggered_MSB 0xB 809#define QIB_7322_HwErrStatus_LATriggered_MSB 0xB
810#define QIB_7322_HwErrStatus_LATriggered_RMASK 0x1 810#define QIB_7322_HwErrStatus_LATriggered_RMASK 0x1
@@ -850,15 +850,15 @@
850#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_LSB 0xF 850#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_LSB 0xF
851#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_MSB 0xF 851#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_MSB 0xF
852#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_RMASK 0x1 852#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_RMASK 0x1
853#define QIB_7322_HwErrClear_IBCBusToSPCparityErrClear_1_LSB 0xE 853#define QIB_7322_HwErrClear_IBCBusToSPCParityErrClear_1_LSB 0xE
854#define QIB_7322_HwErrClear_IBCBusToSPCparityErrClear_1_MSB 0xE 854#define QIB_7322_HwErrClear_IBCBusToSPCParityErrClear_1_MSB 0xE
855#define QIB_7322_HwErrClear_IBCBusToSPCparityErrClear_1_RMASK 0x1 855#define QIB_7322_HwErrClear_IBCBusToSPCParityErrClear_1_RMASK 0x1
856#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_LSB 0xD 856#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_LSB 0xD
857#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_MSB 0xD 857#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_MSB 0xD
858#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_RMASK 0x1 858#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_RMASK 0x1
859#define QIB_7322_HwErrClear_IBCBusToSPCparityErrClear_0_LSB 0xC 859#define QIB_7322_HwErrClear_statusValidNoEopClear_LSB 0xC
860#define QIB_7322_HwErrClear_IBCBusToSPCparityErrClear_0_MSB 0xC 860#define QIB_7322_HwErrClear_statusValidNoEopClear_MSB 0xC
861#define QIB_7322_HwErrClear_IBCBusToSPCparityErrClear_0_RMASK 0x1 861#define QIB_7322_HwErrClear_statusValidNoEopClear_RMASK 0x1
862#define QIB_7322_HwErrClear_LATriggeredClear_LSB 0xB 862#define QIB_7322_HwErrClear_LATriggeredClear_LSB 0xB
863#define QIB_7322_HwErrClear_LATriggeredClear_MSB 0xB 863#define QIB_7322_HwErrClear_LATriggeredClear_MSB 0xB
864#define QIB_7322_HwErrClear_LATriggeredClear_RMASK 0x1 864#define QIB_7322_HwErrClear_LATriggeredClear_RMASK 0x1
@@ -880,15 +880,15 @@
880#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_LSB 0xF 880#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_LSB 0xF
881#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_MSB 0xF 881#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_MSB 0xF
882#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_RMASK 0x1 882#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_RMASK 0x1
883#define QIB_7322_HwDiagCtrl_ForcestatusValidNoEop_1_LSB 0xE 883#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_1_LSB 0xE
884#define QIB_7322_HwDiagCtrl_ForcestatusValidNoEop_1_MSB 0xE 884#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_1_MSB 0xE
885#define QIB_7322_HwDiagCtrl_ForcestatusValidNoEop_1_RMASK 0x1 885#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_1_RMASK 0x1
886#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_LSB 0xD 886#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_LSB 0xD
887#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_MSB 0xD 887#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_MSB 0xD
888#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_RMASK 0x1 888#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_RMASK 0x1
889#define QIB_7322_HwDiagCtrl_ForcestatusValidNoEop_0_LSB 0xC 889#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_0_LSB 0xC
890#define QIB_7322_HwDiagCtrl_ForcestatusValidNoEop_0_MSB 0xC 890#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_0_MSB 0xC
891#define QIB_7322_HwDiagCtrl_ForcestatusValidNoEop_0_RMASK 0x1 891#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_0_RMASK 0x1
892 892
893#define QIB_7322_EXTStatus_OFFS 0xC0 893#define QIB_7322_EXTStatus_OFFS 0xC0
894#define QIB_7322_EXTStatus_DEF 0x000000000000X000 894#define QIB_7322_EXTStatus_DEF 0x000000000000X000
diff --git a/drivers/infiniband/hw/qib/qib_diag.c b/drivers/infiniband/hw/qib/qib_diag.c
index ca98dd523752..05dcf0d9a7d3 100644
--- a/drivers/infiniband/hw/qib/qib_diag.c
+++ b/drivers/infiniband/hw/qib/qib_diag.c
@@ -233,6 +233,7 @@ static u32 __iomem *qib_remap_ioaddr32(struct qib_devdata *dd, u32 offset,
233 u32 __iomem *krb32 = (u32 __iomem *)dd->kregbase; 233 u32 __iomem *krb32 = (u32 __iomem *)dd->kregbase;
234 u32 __iomem *map = NULL; 234 u32 __iomem *map = NULL;
235 u32 cnt = 0; 235 u32 cnt = 0;
236 u32 tot4k, offs4k;
236 237
237 /* First, simplest case, offset is within the first map. */ 238 /* First, simplest case, offset is within the first map. */
238 kreglen = (dd->kregend - dd->kregbase) * sizeof(u64); 239 kreglen = (dd->kregend - dd->kregbase) * sizeof(u64);
@@ -250,7 +251,8 @@ static u32 __iomem *qib_remap_ioaddr32(struct qib_devdata *dd, u32 offset,
250 if (dd->userbase) { 251 if (dd->userbase) {
251 /* If user regs mapped, they are after send, so set limit. */ 252 /* If user regs mapped, they are after send, so set limit. */
252 u32 ulim = (dd->cfgctxts * dd->ureg_align) + dd->uregbase; 253 u32 ulim = (dd->cfgctxts * dd->ureg_align) + dd->uregbase;
253 snd_lim = dd->uregbase; 254 if (!dd->piovl15base)
255 snd_lim = dd->uregbase;
254 krb32 = (u32 __iomem *)dd->userbase; 256 krb32 = (u32 __iomem *)dd->userbase;
255 if (offset >= dd->uregbase && offset < ulim) { 257 if (offset >= dd->uregbase && offset < ulim) {
256 map = krb32 + (offset - dd->uregbase) / sizeof(u32); 258 map = krb32 + (offset - dd->uregbase) / sizeof(u32);
@@ -277,14 +279,14 @@ static u32 __iomem *qib_remap_ioaddr32(struct qib_devdata *dd, u32 offset,
277 /* If 4k buffers exist, account for them by bumping 279 /* If 4k buffers exist, account for them by bumping
278 * appropriate limit. 280 * appropriate limit.
279 */ 281 */
282 tot4k = dd->piobcnt4k * dd->align4k;
283 offs4k = dd->piobufbase >> 32;
280 if (dd->piobcnt4k) { 284 if (dd->piobcnt4k) {
281 u32 tot4k = dd->piobcnt4k * dd->align4k;
282 u32 offs4k = dd->piobufbase >> 32;
283 if (snd_bottom > offs4k) 285 if (snd_bottom > offs4k)
284 snd_bottom = offs4k; 286 snd_bottom = offs4k;
285 else { 287 else {
286 /* 4k above 2k. Bump snd_lim, if needed*/ 288 /* 4k above 2k. Bump snd_lim, if needed*/
287 if (!dd->userbase) 289 if (!dd->userbase || dd->piovl15base)
288 snd_lim = offs4k + tot4k; 290 snd_lim = offs4k + tot4k;
289 } 291 }
290 } 292 }
@@ -298,6 +300,15 @@ static u32 __iomem *qib_remap_ioaddr32(struct qib_devdata *dd, u32 offset,
298 cnt = snd_lim - offset; 300 cnt = snd_lim - offset;
299 } 301 }
300 302
303 if (!map && offs4k && dd->piovl15base) {
304 snd_lim = offs4k + tot4k + 2 * dd->align4k;
305 if (offset >= (offs4k + tot4k) && offset < snd_lim) {
306 map = (u32 __iomem *)dd->piovl15base +
307 ((offset - (offs4k + tot4k)) / sizeof(u32));
308 cnt = snd_lim - offset;
309 }
310 }
311
301mapped: 312mapped:
302 if (cntp) 313 if (cntp)
303 *cntp = cnt; 314 *cntp = cnt;
diff --git a/drivers/infiniband/hw/qib/qib_iba6120.c b/drivers/infiniband/hw/qib/qib_iba6120.c
index 1eadadc13da8..a5e29dbb9537 100644
--- a/drivers/infiniband/hw/qib/qib_iba6120.c
+++ b/drivers/infiniband/hw/qib/qib_iba6120.c
@@ -1355,8 +1355,7 @@ static int qib_6120_bringup_serdes(struct qib_pportdata *ppd)
1355 hwstat = qib_read_kreg64(dd, kr_hwerrstatus); 1355 hwstat = qib_read_kreg64(dd, kr_hwerrstatus);
1356 if (hwstat) { 1356 if (hwstat) {
1357 /* should just have PLL, clear all set, in an case */ 1357 /* should just have PLL, clear all set, in an case */
1358 if (hwstat & ~QLOGIC_IB_HWE_SERDESPLLFAILED) 1358 qib_write_kreg(dd, kr_hwerrclear, hwstat);
1359 qib_write_kreg(dd, kr_hwerrclear, hwstat);
1360 qib_write_kreg(dd, kr_errclear, ERR_MASK(HardwareErr)); 1359 qib_write_kreg(dd, kr_errclear, ERR_MASK(HardwareErr));
1361 } 1360 }
1362 1361
diff --git a/drivers/infiniband/hw/qib/qib_iba7322.c b/drivers/infiniband/hw/qib/qib_iba7322.c
index 503992d9c5ce..5eedf83e2c3b 100644
--- a/drivers/infiniband/hw/qib/qib_iba7322.c
+++ b/drivers/infiniband/hw/qib/qib_iba7322.c
@@ -543,7 +543,7 @@ struct vendor_txdds_ent {
543static void write_tx_serdes_param(struct qib_pportdata *, struct txdds_ent *); 543static void write_tx_serdes_param(struct qib_pportdata *, struct txdds_ent *);
544 544
545#define TXDDS_TABLE_SZ 16 /* number of entries per speed in onchip table */ 545#define TXDDS_TABLE_SZ 16 /* number of entries per speed in onchip table */
546#define TXDDS_EXTRA_SZ 11 /* number of extra tx settings entries */ 546#define TXDDS_EXTRA_SZ 13 /* number of extra tx settings entries */
547#define SERDES_CHANS 4 /* yes, it's obvious, but one less magic number */ 547#define SERDES_CHANS 4 /* yes, it's obvious, but one less magic number */
548 548
549#define H1_FORCE_VAL 8 549#define H1_FORCE_VAL 8
@@ -1100,9 +1100,9 @@ static const struct qib_hwerror_msgs qib_7322_hwerror_msgs[] = {
1100 HWE_AUTO_P(SDmaMemReadErr, 1), 1100 HWE_AUTO_P(SDmaMemReadErr, 1),
1101 HWE_AUTO_P(SDmaMemReadErr, 0), 1101 HWE_AUTO_P(SDmaMemReadErr, 0),
1102 HWE_AUTO_P(IBCBusFromSPCParityErr, 1), 1102 HWE_AUTO_P(IBCBusFromSPCParityErr, 1),
1103 HWE_AUTO_P(IBCBusToSPCParityErr, 1),
1103 HWE_AUTO_P(IBCBusFromSPCParityErr, 0), 1104 HWE_AUTO_P(IBCBusFromSPCParityErr, 0),
1104 HWE_AUTO_P(statusValidNoEop, 1), 1105 HWE_AUTO(statusValidNoEop),
1105 HWE_AUTO_P(statusValidNoEop, 0),
1106 HWE_AUTO(LATriggered), 1106 HWE_AUTO(LATriggered),
1107 { .mask = 0 } 1107 { .mask = 0 }
1108}; 1108};
@@ -4763,6 +4763,8 @@ static void qib_7322_mini_pcs_reset(struct qib_pportdata *ppd)
4763 SYM_MASK(IBPCSConfig_0, tx_rx_reset); 4763 SYM_MASK(IBPCSConfig_0, tx_rx_reset);
4764 4764
4765 val = qib_read_kreg_port(ppd, krp_ib_pcsconfig); 4765 val = qib_read_kreg_port(ppd, krp_ib_pcsconfig);
4766 qib_write_kreg(dd, kr_hwerrmask,
4767 dd->cspec->hwerrmask & ~HWE_MASK(statusValidNoEop));
4766 qib_write_kreg_port(ppd, krp_ibcctrl_a, 4768 qib_write_kreg_port(ppd, krp_ibcctrl_a,
4767 ppd->cpspec->ibcctrl_a & 4769 ppd->cpspec->ibcctrl_a &
4768 ~SYM_MASK(IBCCtrlA_0, IBLinkEn)); 4770 ~SYM_MASK(IBCCtrlA_0, IBLinkEn));
@@ -4772,6 +4774,9 @@ static void qib_7322_mini_pcs_reset(struct qib_pportdata *ppd)
4772 qib_write_kreg_port(ppd, krp_ib_pcsconfig, val & ~reset_bits); 4774 qib_write_kreg_port(ppd, krp_ib_pcsconfig, val & ~reset_bits);
4773 qib_write_kreg_port(ppd, krp_ibcctrl_a, ppd->cpspec->ibcctrl_a); 4775 qib_write_kreg_port(ppd, krp_ibcctrl_a, ppd->cpspec->ibcctrl_a);
4774 qib_write_kreg(dd, kr_scratch, 0ULL); 4776 qib_write_kreg(dd, kr_scratch, 0ULL);
4777 qib_write_kreg(dd, kr_hwerrclear,
4778 SYM_MASK(HwErrClear, statusValidNoEopClear));
4779 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask);
4775} 4780}
4776 4781
4777/* 4782/*
@@ -5624,6 +5629,8 @@ static void set_no_qsfp_atten(struct qib_devdata *dd, int change)
5624 if (ppd->port != port || !ppd->link_speed_supported) 5629 if (ppd->port != port || !ppd->link_speed_supported)
5625 continue; 5630 continue;
5626 ppd->cpspec->no_eep = val; 5631 ppd->cpspec->no_eep = val;
5632 if (seth1)
5633 ppd->cpspec->h1_val = h1;
5627 /* now change the IBC and serdes, overriding generic */ 5634 /* now change the IBC and serdes, overriding generic */
5628 init_txdds_table(ppd, 1); 5635 init_txdds_table(ppd, 1);
5629 any++; 5636 any++;
@@ -6064,9 +6071,9 @@ static int qib_init_7322_variables(struct qib_devdata *dd)
6064 * the "cable info" setup here. Can be overridden 6071 * the "cable info" setup here. Can be overridden
6065 * in adapter-specific routines. 6072 * in adapter-specific routines.
6066 */ 6073 */
6067 if (!(ppd->dd->flags & QIB_HAS_QSFP)) { 6074 if (!(dd->flags & QIB_HAS_QSFP)) {
6068 if (!IS_QMH(ppd->dd) && !IS_QME(ppd->dd)) 6075 if (!IS_QMH(dd) && !IS_QME(dd))
6069 qib_devinfo(ppd->dd->pcidev, "IB%u:%u: " 6076 qib_devinfo(dd->pcidev, "IB%u:%u: "
6070 "Unknown mezzanine card type\n", 6077 "Unknown mezzanine card type\n",
6071 dd->unit, ppd->port); 6078 dd->unit, ppd->port);
6072 cp->h1_val = IS_QMH(dd) ? H1_FORCE_QMH : H1_FORCE_QME; 6079 cp->h1_val = IS_QMH(dd) ? H1_FORCE_QMH : H1_FORCE_QME;
@@ -6119,9 +6126,25 @@ static int qib_init_7322_variables(struct qib_devdata *dd)
6119 qib_set_ctxtcnt(dd); 6126 qib_set_ctxtcnt(dd);
6120 6127
6121 if (qib_wc_pat) { 6128 if (qib_wc_pat) {
6122 ret = init_chip_wc_pat(dd, NUM_VL15_BUFS * dd->align4k); 6129 resource_size_t vl15off;
6130 /*
6131 * We do not set WC on the VL15 buffers to avoid
6132 * a rare problem with unaligned writes from
6133 * interrupt-flushed store buffers, so we need
6134 * to map those separately here. We can't solve
6135 * this for the rarely used mtrr case.
6136 */
6137 ret = init_chip_wc_pat(dd, 0);
6123 if (ret) 6138 if (ret)
6124 goto bail; 6139 goto bail;
6140
6141 /* vl15 buffers start just after the 4k buffers */
6142 vl15off = dd->physaddr + (dd->piobufbase >> 32) +
6143 dd->piobcnt4k * dd->align4k;
6144 dd->piovl15base = ioremap_nocache(vl15off,
6145 NUM_VL15_BUFS * dd->align4k);
6146 if (!dd->piovl15base)
6147 goto bail;
6125 } 6148 }
6126 qib_7322_set_baseaddrs(dd); /* set chip access pointers now */ 6149 qib_7322_set_baseaddrs(dd); /* set chip access pointers now */
6127 6150
@@ -6932,6 +6955,8 @@ static const struct txdds_ent txdds_extra_sdr[TXDDS_EXTRA_SZ] = {
6932 { 0, 0, 0, 11 }, /* QME7342 backplane settings */ 6955 { 0, 0, 0, 11 }, /* QME7342 backplane settings */
6933 { 0, 0, 0, 11 }, /* QME7342 backplane settings */ 6956 { 0, 0, 0, 11 }, /* QME7342 backplane settings */
6934 { 0, 0, 0, 11 }, /* QME7342 backplane settings */ 6957 { 0, 0, 0, 11 }, /* QME7342 backplane settings */
6958 { 0, 0, 0, 3 }, /* QMH7342 backplane settings */
6959 { 0, 0, 0, 4 }, /* QMH7342 backplane settings */
6935}; 6960};
6936 6961
6937static const struct txdds_ent txdds_extra_ddr[TXDDS_EXTRA_SZ] = { 6962static const struct txdds_ent txdds_extra_ddr[TXDDS_EXTRA_SZ] = {
@@ -6947,6 +6972,8 @@ static const struct txdds_ent txdds_extra_ddr[TXDDS_EXTRA_SZ] = {
6947 { 0, 0, 0, 13 }, /* QME7342 backplane settings */ 6972 { 0, 0, 0, 13 }, /* QME7342 backplane settings */
6948 { 0, 0, 0, 13 }, /* QME7342 backplane settings */ 6973 { 0, 0, 0, 13 }, /* QME7342 backplane settings */
6949 { 0, 0, 0, 13 }, /* QME7342 backplane settings */ 6974 { 0, 0, 0, 13 }, /* QME7342 backplane settings */
6975 { 0, 0, 0, 9 }, /* QMH7342 backplane settings */
6976 { 0, 0, 0, 10 }, /* QMH7342 backplane settings */
6950}; 6977};
6951 6978
6952static const struct txdds_ent txdds_extra_qdr[TXDDS_EXTRA_SZ] = { 6979static const struct txdds_ent txdds_extra_qdr[TXDDS_EXTRA_SZ] = {
@@ -6962,6 +6989,8 @@ static const struct txdds_ent txdds_extra_qdr[TXDDS_EXTRA_SZ] = {
6962 { 0, 1, 12, 6 }, /* QME7342 backplane setting */ 6989 { 0, 1, 12, 6 }, /* QME7342 backplane setting */
6963 { 0, 1, 12, 7 }, /* QME7342 backplane setting */ 6990 { 0, 1, 12, 7 }, /* QME7342 backplane setting */
6964 { 0, 1, 12, 8 }, /* QME7342 backplane setting */ 6991 { 0, 1, 12, 8 }, /* QME7342 backplane setting */
6992 { 0, 1, 0, 10 }, /* QMH7342 backplane settings */
6993 { 0, 1, 0, 12 }, /* QMH7342 backplane settings */
6965}; 6994};
6966 6995
6967static const struct txdds_ent *get_atten_table(const struct txdds_ent *txdds, 6996static const struct txdds_ent *get_atten_table(const struct txdds_ent *txdds,
diff --git a/drivers/infiniband/hw/qib/qib_init.c b/drivers/infiniband/hw/qib/qib_init.c
index 9b40f345ac3f..a873dd596e81 100644
--- a/drivers/infiniband/hw/qib/qib_init.c
+++ b/drivers/infiniband/hw/qib/qib_init.c
@@ -1059,7 +1059,7 @@ static int __init qlogic_ib_init(void)
1059 goto bail_dev; 1059 goto bail_dev;
1060 } 1060 }
1061 1061
1062 qib_cq_wq = create_workqueue("qib_cq"); 1062 qib_cq_wq = create_singlethread_workqueue("qib_cq");
1063 if (!qib_cq_wq) { 1063 if (!qib_cq_wq) {
1064 ret = -ENOMEM; 1064 ret = -ENOMEM;
1065 goto bail_wq; 1065 goto bail_wq;
@@ -1289,8 +1289,18 @@ static int __devinit qib_init_one(struct pci_dev *pdev,
1289 1289
1290 if (qib_mini_init || initfail || ret) { 1290 if (qib_mini_init || initfail || ret) {
1291 qib_stop_timers(dd); 1291 qib_stop_timers(dd);
1292 flush_scheduled_work();
1292 for (pidx = 0; pidx < dd->num_pports; ++pidx) 1293 for (pidx = 0; pidx < dd->num_pports; ++pidx)
1293 dd->f_quiet_serdes(dd->pport + pidx); 1294 dd->f_quiet_serdes(dd->pport + pidx);
1295 if (qib_mini_init)
1296 goto bail;
1297 if (!j) {
1298 (void) qibfs_remove(dd);
1299 qib_device_remove(dd);
1300 }
1301 if (!ret)
1302 qib_unregister_ib_device(dd);
1303 qib_postinit_cleanup(dd);
1294 if (initfail) 1304 if (initfail)
1295 ret = initfail; 1305 ret = initfail;
1296 goto bail; 1306 goto bail;
@@ -1472,6 +1482,9 @@ int qib_setup_eagerbufs(struct qib_ctxtdata *rcd)
1472 dma_addr_t pa = rcd->rcvegrbuf_phys[chunk]; 1482 dma_addr_t pa = rcd->rcvegrbuf_phys[chunk];
1473 unsigned i; 1483 unsigned i;
1474 1484
1485 /* clear for security and sanity on each use */
1486 memset(rcd->rcvegrbuf[chunk], 0, size);
1487
1475 for (i = 0; e < egrcnt && i < egrperchunk; e++, i++) { 1488 for (i = 0; e < egrcnt && i < egrperchunk; e++, i++) {
1476 dd->f_put_tid(dd, e + egroff + 1489 dd->f_put_tid(dd, e + egroff +
1477 (u64 __iomem *) 1490 (u64 __iomem *)
@@ -1499,6 +1512,12 @@ bail:
1499 return -ENOMEM; 1512 return -ENOMEM;
1500} 1513}
1501 1514
1515/*
1516 * Note: Changes to this routine should be mirrored
1517 * for the diagnostics routine qib_remap_ioaddr32().
1518 * There is also related code for VL15 buffers in qib_init_7322_variables().
1519 * The teardown code that unmaps is in qib_pcie_ddcleanup()
1520 */
1502int init_chip_wc_pat(struct qib_devdata *dd, u32 vl15buflen) 1521int init_chip_wc_pat(struct qib_devdata *dd, u32 vl15buflen)
1503{ 1522{
1504 u64 __iomem *qib_kregbase = NULL; 1523 u64 __iomem *qib_kregbase = NULL;
diff --git a/drivers/infiniband/hw/qib/qib_pcie.c b/drivers/infiniband/hw/qib/qib_pcie.c
index c926bf4541df..7fa6e5592630 100644
--- a/drivers/infiniband/hw/qib/qib_pcie.c
+++ b/drivers/infiniband/hw/qib/qib_pcie.c
@@ -179,6 +179,8 @@ void qib_pcie_ddcleanup(struct qib_devdata *dd)
179 iounmap(dd->piobase); 179 iounmap(dd->piobase);
180 if (dd->userbase) 180 if (dd->userbase)
181 iounmap(dd->userbase); 181 iounmap(dd->userbase);
182 if (dd->piovl15base)
183 iounmap(dd->piovl15base);
182 184
183 pci_disable_device(dd->pcidev); 185 pci_disable_device(dd->pcidev);
184 pci_release_regions(dd->pcidev); 186 pci_release_regions(dd->pcidev);
diff --git a/drivers/infiniband/hw/qib/qib_sd7220.c b/drivers/infiniband/hw/qib/qib_sd7220.c
index 0aeed0e74cb6..e9f9f8bc3204 100644
--- a/drivers/infiniband/hw/qib/qib_sd7220.c
+++ b/drivers/infiniband/hw/qib/qib_sd7220.c
@@ -1,5 +1,6 @@
1/* 1/*
2 * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved. 2 * Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation.
3 * All rights reserved.
3 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. 4 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
4 * 5 *
5 * This software is available to you under a choice of one of two 6 * This software is available to you under a choice of one of two
@@ -37,10 +38,14 @@
37 38
38#include <linux/pci.h> 39#include <linux/pci.h>
39#include <linux/delay.h> 40#include <linux/delay.h>
41#include <linux/firmware.h>
40 42
41#include "qib.h" 43#include "qib.h"
42#include "qib_7220.h" 44#include "qib_7220.h"
43 45
46#define SD7220_FW_NAME "qlogic/sd7220.fw"
47MODULE_FIRMWARE(SD7220_FW_NAME);
48
44/* 49/*
45 * Same as in qib_iba7220.c, but just the registers needed here. 50 * Same as in qib_iba7220.c, but just the registers needed here.
46 * Could move whole set to qib_7220.h, but decided better to keep 51 * Could move whole set to qib_7220.h, but decided better to keep
@@ -102,6 +107,10 @@ static int qib_internal_presets(struct qib_devdata *dd);
102/* Tweak the register (CMUCTRL5) that contains the TRIMSELF controls */ 107/* Tweak the register (CMUCTRL5) that contains the TRIMSELF controls */
103static int qib_sd_trimself(struct qib_devdata *dd, int val); 108static int qib_sd_trimself(struct qib_devdata *dd, int val);
104static int epb_access(struct qib_devdata *dd, int sdnum, int claim); 109static int epb_access(struct qib_devdata *dd, int sdnum, int claim);
110static int qib_sd7220_ib_load(struct qib_devdata *dd,
111 const struct firmware *fw);
112static int qib_sd7220_ib_vfy(struct qib_devdata *dd,
113 const struct firmware *fw);
105 114
106/* 115/*
107 * Below keeps track of whether the "once per power-on" initialization has 116 * Below keeps track of whether the "once per power-on" initialization has
@@ -110,10 +119,13 @@ static int epb_access(struct qib_devdata *dd, int sdnum, int claim);
110 * state of the reset "pin", is no longer valid. Instead, we check for the 119 * state of the reset "pin", is no longer valid. Instead, we check for the
111 * actual uC code having been loaded. 120 * actual uC code having been loaded.
112 */ 121 */
113static int qib_ibsd_ucode_loaded(struct qib_pportdata *ppd) 122static int qib_ibsd_ucode_loaded(struct qib_pportdata *ppd,
123 const struct firmware *fw)
114{ 124{
115 struct qib_devdata *dd = ppd->dd; 125 struct qib_devdata *dd = ppd->dd;
116 if (!dd->cspec->serdes_first_init_done && (qib_sd7220_ib_vfy(dd) > 0)) 126
127 if (!dd->cspec->serdes_first_init_done &&
128 qib_sd7220_ib_vfy(dd, fw) > 0)
117 dd->cspec->serdes_first_init_done = 1; 129 dd->cspec->serdes_first_init_done = 1;
118 return dd->cspec->serdes_first_init_done; 130 return dd->cspec->serdes_first_init_done;
119} 131}
@@ -377,6 +389,7 @@ static void qib_sd_trimdone_monitor(struct qib_devdata *dd,
377 */ 389 */
378int qib_sd7220_init(struct qib_devdata *dd) 390int qib_sd7220_init(struct qib_devdata *dd)
379{ 391{
392 const struct firmware *fw;
380 int ret = 1; /* default to failure */ 393 int ret = 1; /* default to failure */
381 int first_reset, was_reset; 394 int first_reset, was_reset;
382 395
@@ -387,8 +400,15 @@ int qib_sd7220_init(struct qib_devdata *dd)
387 qib_ibsd_reset(dd, 1); 400 qib_ibsd_reset(dd, 1);
388 qib_sd_trimdone_monitor(dd, "Driver-reload"); 401 qib_sd_trimdone_monitor(dd, "Driver-reload");
389 } 402 }
403
404 ret = request_firmware(&fw, SD7220_FW_NAME, &dd->pcidev->dev);
405 if (ret) {
406 qib_dev_err(dd, "Failed to load IB SERDES image\n");
407 goto done;
408 }
409
390 /* Substitute our deduced value for was_reset */ 410 /* Substitute our deduced value for was_reset */
391 ret = qib_ibsd_ucode_loaded(dd->pport); 411 ret = qib_ibsd_ucode_loaded(dd->pport, fw);
392 if (ret < 0) 412 if (ret < 0)
393 goto bail; 413 goto bail;
394 414
@@ -437,13 +457,13 @@ int qib_sd7220_init(struct qib_devdata *dd)
437 int vfy; 457 int vfy;
438 int trim_done; 458 int trim_done;
439 459
440 ret = qib_sd7220_ib_load(dd); 460 ret = qib_sd7220_ib_load(dd, fw);
441 if (ret < 0) { 461 if (ret < 0) {
442 qib_dev_err(dd, "Failed to load IB SERDES image\n"); 462 qib_dev_err(dd, "Failed to load IB SERDES image\n");
443 goto bail; 463 goto bail;
444 } else { 464 } else {
445 /* Loaded image, try to verify */ 465 /* Loaded image, try to verify */
446 vfy = qib_sd7220_ib_vfy(dd); 466 vfy = qib_sd7220_ib_vfy(dd, fw);
447 if (vfy != ret) { 467 if (vfy != ret) {
448 qib_dev_err(dd, "SERDES PRAM VFY failed\n"); 468 qib_dev_err(dd, "SERDES PRAM VFY failed\n");
449 goto bail; 469 goto bail;
@@ -506,6 +526,8 @@ bail:
506done: 526done:
507 /* start relock timer regardless, but start at 1 second */ 527 /* start relock timer regardless, but start at 1 second */
508 set_7220_relock_poll(dd, -1); 528 set_7220_relock_poll(dd, -1);
529
530 release_firmware(fw);
509 return ret; 531 return ret;
510} 532}
511 533
@@ -829,8 +851,8 @@ static int qib_sd7220_ram_xfer(struct qib_devdata *dd, int sdnum, u32 loc,
829 851
830#define PROG_CHUNK 64 852#define PROG_CHUNK 64
831 853
832int qib_sd7220_prog_ld(struct qib_devdata *dd, int sdnum, 854static int qib_sd7220_prog_ld(struct qib_devdata *dd, int sdnum,
833 u8 *img, int len, int offset) 855 const u8 *img, int len, int offset)
834{ 856{
835 int cnt, sofar, req; 857 int cnt, sofar, req;
836 858
@@ -840,7 +862,7 @@ int qib_sd7220_prog_ld(struct qib_devdata *dd, int sdnum,
840 if (req > PROG_CHUNK) 862 if (req > PROG_CHUNK)
841 req = PROG_CHUNK; 863 req = PROG_CHUNK;
842 cnt = qib_sd7220_ram_xfer(dd, sdnum, offset + sofar, 864 cnt = qib_sd7220_ram_xfer(dd, sdnum, offset + sofar,
843 img + sofar, req, 0); 865 (u8 *)img + sofar, req, 0);
844 if (cnt < req) { 866 if (cnt < req) {
845 sofar = -1; 867 sofar = -1;
846 break; 868 break;
@@ -853,8 +875,8 @@ int qib_sd7220_prog_ld(struct qib_devdata *dd, int sdnum,
853#define VFY_CHUNK 64 875#define VFY_CHUNK 64
854#define SD_PRAM_ERROR_LIMIT 42 876#define SD_PRAM_ERROR_LIMIT 42
855 877
856int qib_sd7220_prog_vfy(struct qib_devdata *dd, int sdnum, 878static int qib_sd7220_prog_vfy(struct qib_devdata *dd, int sdnum,
857 const u8 *img, int len, int offset) 879 const u8 *img, int len, int offset)
858{ 880{
859 int cnt, sofar, req, idx, errors; 881 int cnt, sofar, req, idx, errors;
860 unsigned char readback[VFY_CHUNK]; 882 unsigned char readback[VFY_CHUNK];
@@ -881,6 +903,18 @@ int qib_sd7220_prog_vfy(struct qib_devdata *dd, int sdnum,
881 return errors ? -errors : sofar; 903 return errors ? -errors : sofar;
882} 904}
883 905
906static int
907qib_sd7220_ib_load(struct qib_devdata *dd, const struct firmware *fw)
908{
909 return qib_sd7220_prog_ld(dd, IB_7220_SERDES, fw->data, fw->size, 0);
910}
911
912static int
913qib_sd7220_ib_vfy(struct qib_devdata *dd, const struct firmware *fw)
914{
915 return qib_sd7220_prog_vfy(dd, IB_7220_SERDES, fw->data, fw->size, 0);
916}
917
884/* 918/*
885 * IRQ not set up at this point in init, so we poll. 919 * IRQ not set up at this point in init, so we poll.
886 */ 920 */
diff --git a/drivers/infiniband/hw/qib/qib_sd7220_img.c b/drivers/infiniband/hw/qib/qib_sd7220_img.c
deleted file mode 100644
index a1118fbd2370..000000000000
--- a/drivers/infiniband/hw/qib/qib_sd7220_img.c
+++ /dev/null
@@ -1,1081 +0,0 @@
1/*
2 * Copyright (c) 2007, 2008 QLogic Corporation. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33/*
34 * This file contains the memory image from the vendor, to be copied into
35 * the IB SERDES of the IBA7220 during initialization.
36 * The file also includes the two functions which use this image.
37 */
38#include <linux/pci.h>
39#include <linux/delay.h>
40
41#include "qib.h"
42#include "qib_7220.h"
43
44static unsigned char qib_sd7220_ib_img[] = {
45/*0000*/0x02, 0x0A, 0x29, 0x02, 0x0A, 0x87, 0xE5, 0xE6,
46 0x30, 0xE6, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F,
47/*0010*/0x00, 0xE5, 0xE2, 0x30, 0xE4, 0x04, 0x7E, 0x01,
48 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x5F, 0x60, 0x08,
49/*0020*/0x53, 0xF9, 0xF7, 0xE4, 0xF5, 0xFE, 0x80, 0x08,
50 0x7F, 0x0A, 0x12, 0x17, 0x31, 0x12, 0x0E, 0xA2,
51/*0030*/0x75, 0xFC, 0x08, 0xE4, 0xF5, 0xFD, 0xE5, 0xE7,
52 0x20, 0xE7, 0x03, 0x43, 0xF9, 0x08, 0x22, 0x00,
53/*0040*/0x01, 0x20, 0x11, 0x00, 0x04, 0x20, 0x00, 0x75,
54 0x51, 0x01, 0xE4, 0xF5, 0x52, 0xF5, 0x53, 0xF5,
55/*0050*/0x52, 0xF5, 0x7E, 0x7F, 0x04, 0x02, 0x04, 0x38,
56 0xC2, 0x36, 0x05, 0x52, 0xE5, 0x52, 0xD3, 0x94,
57/*0060*/0x0C, 0x40, 0x05, 0x75, 0x52, 0x01, 0xD2, 0x36,
58 0x90, 0x07, 0x0C, 0x74, 0x07, 0xF0, 0xA3, 0x74,
59/*0070*/0xFF, 0xF0, 0xE4, 0xF5, 0x0C, 0xA3, 0xF0, 0x90,
60 0x07, 0x14, 0xF0, 0xA3, 0xF0, 0x75, 0x0B, 0x20,
61/*0080*/0xF5, 0x09, 0xE4, 0xF5, 0x08, 0xE5, 0x08, 0xD3,
62 0x94, 0x30, 0x40, 0x03, 0x02, 0x04, 0x04, 0x12,
63/*0090*/0x00, 0x06, 0x15, 0x0B, 0xE5, 0x08, 0x70, 0x04,
64 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5, 0x09,
65/*00A0*/0x70, 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00,
66 0xEE, 0x5F, 0x60, 0x05, 0x12, 0x18, 0x71, 0xD2,
67/*00B0*/0x35, 0x53, 0xE1, 0xF7, 0xE5, 0x08, 0x45, 0x09,
68 0xFF, 0xE5, 0x0B, 0x25, 0xE0, 0x25, 0xE0, 0x24,
69/*00C0*/0x83, 0xF5, 0x82, 0xE4, 0x34, 0x07, 0xF5, 0x83,
70 0xEF, 0xF0, 0x85, 0xE2, 0x20, 0xE5, 0x52, 0xD3,
71/*00D0*/0x94, 0x01, 0x40, 0x0D, 0x12, 0x19, 0xF3, 0xE0,
72 0x54, 0xA0, 0x64, 0x40, 0x70, 0x03, 0x02, 0x03,
73/*00E0*/0xFB, 0x53, 0xF9, 0xF8, 0x90, 0x94, 0x70, 0xE4,
74 0xF0, 0xE0, 0xF5, 0x10, 0xAF, 0x09, 0x12, 0x1E,
75/*00F0*/0xB3, 0xAF, 0x08, 0xEF, 0x44, 0x08, 0xF5, 0x82,
76 0x75, 0x83, 0x80, 0xE0, 0xF5, 0x29, 0xEF, 0x44,
77/*0100*/0x07, 0x12, 0x1A, 0x3C, 0xF5, 0x22, 0x54, 0x40,
78 0xD3, 0x94, 0x00, 0x40, 0x1E, 0xE5, 0x29, 0x54,
79/*0110*/0xF0, 0x70, 0x21, 0x12, 0x19, 0xF3, 0xE0, 0x44,
80 0x80, 0xF0, 0xE5, 0x22, 0x54, 0x30, 0x65, 0x08,
81/*0120*/0x70, 0x09, 0x12, 0x19, 0xF3, 0xE0, 0x54, 0xBF,
82 0xF0, 0x80, 0x09, 0x12, 0x19, 0xF3, 0x74, 0x40,
83/*0130*/0xF0, 0x02, 0x03, 0xFB, 0x12, 0x1A, 0x12, 0x75,
84 0x83, 0xAE, 0x74, 0xFF, 0xF0, 0xAF, 0x08, 0x7E,
85/*0140*/0x00, 0xEF, 0x44, 0x07, 0xF5, 0x82, 0xE0, 0xFD,
86 0xE5, 0x0B, 0x25, 0xE0, 0x25, 0xE0, 0x24, 0x81,
87/*0150*/0xF5, 0x82, 0xE4, 0x34, 0x07, 0xF5, 0x83, 0xED,
88 0xF0, 0x90, 0x07, 0x0E, 0xE0, 0x04, 0xF0, 0xEF,
89/*0160*/0x44, 0x07, 0xF5, 0x82, 0x75, 0x83, 0x98, 0xE0,
90 0xF5, 0x28, 0x12, 0x1A, 0x23, 0x40, 0x0C, 0x12,
91/*0170*/0x19, 0xF3, 0xE0, 0x44, 0x01, 0x12, 0x1A, 0x32,
92 0x02, 0x03, 0xF6, 0xAF, 0x08, 0x7E, 0x00, 0x74,
93/*0180*/0x80, 0xCD, 0xEF, 0xCD, 0x8D, 0x82, 0xF5, 0x83,
94 0xE0, 0x30, 0xE0, 0x0A, 0x12, 0x19, 0xF3, 0xE0,
95/*0190*/0x44, 0x20, 0xF0, 0x02, 0x03, 0xFB, 0x12, 0x19,
96 0xF3, 0xE0, 0x54, 0xDF, 0xF0, 0xEE, 0x44, 0xAE,
97/*01A0*/0x12, 0x1A, 0x43, 0x30, 0xE4, 0x03, 0x02, 0x03,
98 0xFB, 0x74, 0x9E, 0x12, 0x1A, 0x05, 0x20, 0xE0,
99/*01B0*/0x03, 0x02, 0x03, 0xFB, 0x8F, 0x82, 0x8E, 0x83,
100 0xE0, 0x20, 0xE0, 0x03, 0x02, 0x03, 0xFB, 0x12,
101/*01C0*/0x19, 0xF3, 0xE0, 0x44, 0x10, 0xF0, 0xE5, 0xE3,
102 0x20, 0xE7, 0x08, 0xE5, 0x08, 0x12, 0x1A, 0x3A,
103/*01D0*/0x44, 0x04, 0xF0, 0xAF, 0x08, 0x7E, 0x00, 0xEF,
104 0x12, 0x1A, 0x3A, 0x20, 0xE2, 0x34, 0x12, 0x19,
105/*01E0*/0xF3, 0xE0, 0x44, 0x08, 0xF0, 0xE5, 0xE4, 0x30,
106 0xE6, 0x04, 0x7D, 0x01, 0x80, 0x02, 0x7D, 0x00,
107/*01F0*/0xE5, 0x7E, 0xC3, 0x94, 0x04, 0x50, 0x04, 0x7C,
108 0x01, 0x80, 0x02, 0x7C, 0x00, 0xEC, 0x4D, 0x60,
109/*0200*/0x05, 0xC2, 0x35, 0x02, 0x03, 0xFB, 0xEE, 0x44,
110 0xD2, 0x12, 0x1A, 0x43, 0x44, 0x40, 0xF0, 0x02,
111/*0210*/0x03, 0xFB, 0x12, 0x19, 0xF3, 0xE0, 0x54, 0xF7,
112 0xF0, 0x12, 0x1A, 0x12, 0x75, 0x83, 0xD2, 0xE0,
113/*0220*/0x54, 0xBF, 0xF0, 0x90, 0x07, 0x14, 0xE0, 0x04,
114 0xF0, 0xE5, 0x7E, 0x70, 0x03, 0x75, 0x7E, 0x01,
115/*0230*/0xAF, 0x08, 0x7E, 0x00, 0x12, 0x1A, 0x23, 0x40,
116 0x12, 0x12, 0x19, 0xF3, 0xE0, 0x44, 0x01, 0x12,
117/*0240*/0x19, 0xF2, 0xE0, 0x54, 0x02, 0x12, 0x1A, 0x32,
118 0x02, 0x03, 0xFB, 0x12, 0x19, 0xF3, 0xE0, 0x44,
119/*0250*/0x02, 0x12, 0x19, 0xF2, 0xE0, 0x54, 0xFE, 0xF0,
120 0xC2, 0x35, 0xEE, 0x44, 0x8A, 0x8F, 0x82, 0xF5,
121/*0260*/0x83, 0xE0, 0xF5, 0x17, 0x54, 0x8F, 0x44, 0x40,
122 0xF0, 0x74, 0x90, 0xFC, 0xE5, 0x08, 0x44, 0x07,
123/*0270*/0xFD, 0xF5, 0x82, 0x8C, 0x83, 0xE0, 0x54, 0x3F,
124 0x90, 0x07, 0x02, 0xF0, 0xE0, 0x54, 0xC0, 0x8D,
125/*0280*/0x82, 0x8C, 0x83, 0xF0, 0x74, 0x92, 0x12, 0x1A,
126 0x05, 0x90, 0x07, 0x03, 0x12, 0x1A, 0x19, 0x74,
127/*0290*/0x82, 0x12, 0x1A, 0x05, 0x90, 0x07, 0x04, 0x12,
128 0x1A, 0x19, 0x74, 0xB4, 0x12, 0x1A, 0x05, 0x90,
129/*02A0*/0x07, 0x05, 0x12, 0x1A, 0x19, 0x74, 0x94, 0xFE,
130 0xE5, 0x08, 0x44, 0x06, 0x12, 0x1A, 0x0A, 0xF5,
131/*02B0*/0x10, 0x30, 0xE0, 0x04, 0xD2, 0x37, 0x80, 0x02,
132 0xC2, 0x37, 0xE5, 0x10, 0x54, 0x7F, 0x8F, 0x82,
133/*02C0*/0x8E, 0x83, 0xF0, 0x30, 0x44, 0x30, 0x12, 0x1A,
134 0x03, 0x54, 0x80, 0xD3, 0x94, 0x00, 0x40, 0x04,
135/*02D0*/0xD2, 0x39, 0x80, 0x02, 0xC2, 0x39, 0x8F, 0x82,
136 0x8E, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0x12, 0x1A,
137/*02E0*/0x03, 0x54, 0x40, 0xD3, 0x94, 0x00, 0x40, 0x04,
138 0xD2, 0x3A, 0x80, 0x02, 0xC2, 0x3A, 0x8F, 0x82,
139/*02F0*/0x8E, 0x83, 0xE0, 0x44, 0x40, 0xF0, 0x74, 0x92,
140 0xFE, 0xE5, 0x08, 0x44, 0x06, 0x12, 0x1A, 0x0A,
141/*0300*/0x30, 0xE7, 0x04, 0xD2, 0x38, 0x80, 0x02, 0xC2,
142 0x38, 0x8F, 0x82, 0x8E, 0x83, 0xE0, 0x54, 0x7F,
143/*0310*/0xF0, 0x12, 0x1E, 0x46, 0xE4, 0xF5, 0x0A, 0x20,
144 0x03, 0x02, 0x80, 0x03, 0x30, 0x43, 0x03, 0x12,
145/*0320*/0x19, 0x95, 0x20, 0x02, 0x02, 0x80, 0x03, 0x30,
146 0x42, 0x03, 0x12, 0x0C, 0x8F, 0x30, 0x30, 0x06,
147/*0330*/0x12, 0x19, 0x95, 0x12, 0x0C, 0x8F, 0x12, 0x0D,
148 0x47, 0x12, 0x19, 0xF3, 0xE0, 0x54, 0xFB, 0xF0,
149/*0340*/0xE5, 0x0A, 0xC3, 0x94, 0x01, 0x40, 0x46, 0x43,
150 0xE1, 0x08, 0x12, 0x19, 0xF3, 0xE0, 0x44, 0x04,
151/*0350*/0xF0, 0xE5, 0xE4, 0x20, 0xE7, 0x2A, 0x12, 0x1A,
152 0x12, 0x75, 0x83, 0xD2, 0xE0, 0x54, 0x08, 0xD3,
153/*0360*/0x94, 0x00, 0x40, 0x04, 0x7F, 0x01, 0x80, 0x02,
154 0x7F, 0x00, 0xE5, 0x0A, 0xC3, 0x94, 0x01, 0x40,
155/*0370*/0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEF,
156 0x5E, 0x60, 0x05, 0x12, 0x1D, 0xD7, 0x80, 0x17,
157/*0380*/0x12, 0x1A, 0x12, 0x75, 0x83, 0xD2, 0xE0, 0x44,
158 0x08, 0xF0, 0x02, 0x03, 0xFB, 0x12, 0x1A, 0x12,
159/*0390*/0x75, 0x83, 0xD2, 0xE0, 0x54, 0xF7, 0xF0, 0x12,
160 0x1E, 0x46, 0x7F, 0x08, 0x12, 0x17, 0x31, 0x74,
161/*03A0*/0x8E, 0xFE, 0x12, 0x1A, 0x12, 0x8E, 0x83, 0xE0,
162 0xF5, 0x10, 0x54, 0xFE, 0xF0, 0xE5, 0x10, 0x44,
163/*03B0*/0x01, 0xFF, 0xE5, 0x08, 0xFD, 0xED, 0x44, 0x07,
164 0xF5, 0x82, 0xEF, 0xF0, 0xE5, 0x10, 0x54, 0xFE,
165/*03C0*/0xFF, 0xED, 0x44, 0x07, 0xF5, 0x82, 0xEF, 0x12,
166 0x1A, 0x11, 0x75, 0x83, 0x86, 0xE0, 0x44, 0x10,
167/*03D0*/0x12, 0x1A, 0x11, 0xE0, 0x44, 0x10, 0xF0, 0x12,
168 0x19, 0xF3, 0xE0, 0x54, 0xFD, 0x44, 0x01, 0xFF,
169/*03E0*/0x12, 0x19, 0xF3, 0xEF, 0x12, 0x1A, 0x32, 0x30,
170 0x32, 0x0C, 0xE5, 0x08, 0x44, 0x08, 0xF5, 0x82,
171/*03F0*/0x75, 0x83, 0x82, 0x74, 0x05, 0xF0, 0xAF, 0x0B,
172 0x12, 0x18, 0xD7, 0x74, 0x10, 0x25, 0x08, 0xF5,
173/*0400*/0x08, 0x02, 0x00, 0x85, 0x05, 0x09, 0xE5, 0x09,
174 0xD3, 0x94, 0x07, 0x50, 0x03, 0x02, 0x00, 0x82,
175/*0410*/0xE5, 0x7E, 0xD3, 0x94, 0x00, 0x40, 0x04, 0x7F,
176 0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5, 0x7E, 0xC3,
177/*0420*/0x94, 0xFA, 0x50, 0x04, 0x7E, 0x01, 0x80, 0x02,
178 0x7E, 0x00, 0xEE, 0x5F, 0x60, 0x02, 0x05, 0x7E,
179/*0430*/0x30, 0x35, 0x0B, 0x43, 0xE1, 0x01, 0x7F, 0x09,
180 0x12, 0x17, 0x31, 0x02, 0x00, 0x58, 0x53, 0xE1,
181/*0440*/0xFE, 0x02, 0x00, 0x58, 0x8E, 0x6A, 0x8F, 0x6B,
182 0x8C, 0x6C, 0x8D, 0x6D, 0x75, 0x6E, 0x01, 0x75,
183/*0450*/0x6F, 0x01, 0x75, 0x70, 0x01, 0xE4, 0xF5, 0x73,
184 0xF5, 0x74, 0xF5, 0x75, 0x90, 0x07, 0x2F, 0xF0,
185/*0460*/0xF5, 0x3C, 0xF5, 0x3E, 0xF5, 0x46, 0xF5, 0x47,
186 0xF5, 0x3D, 0xF5, 0x3F, 0xF5, 0x6F, 0xE5, 0x6F,
187/*0470*/0x70, 0x0F, 0xE5, 0x6B, 0x45, 0x6A, 0x12, 0x07,
188 0x2A, 0x75, 0x83, 0x80, 0x74, 0x3A, 0xF0, 0x80,
189/*0480*/0x09, 0x12, 0x07, 0x2A, 0x75, 0x83, 0x80, 0x74,
190 0x1A, 0xF0, 0xE4, 0xF5, 0x6E, 0xC3, 0x74, 0x3F,
191/*0490*/0x95, 0x6E, 0xFF, 0x12, 0x08, 0x65, 0x75, 0x83,
192 0x82, 0xEF, 0xF0, 0x12, 0x1A, 0x4D, 0x12, 0x08,
193/*04A0*/0xC6, 0xE5, 0x33, 0xF0, 0x12, 0x08, 0xFA, 0x12,
194 0x08, 0xB1, 0x40, 0xE1, 0xE5, 0x6F, 0x70, 0x0B,
195/*04B0*/0x12, 0x07, 0x2A, 0x75, 0x83, 0x80, 0x74, 0x36,
196 0xF0, 0x80, 0x09, 0x12, 0x07, 0x2A, 0x75, 0x83,
197/*04C0*/0x80, 0x74, 0x16, 0xF0, 0x75, 0x6E, 0x01, 0x12,
198 0x07, 0x2A, 0x75, 0x83, 0xB4, 0xE5, 0x6E, 0xF0,
199/*04D0*/0x12, 0x1A, 0x4D, 0x74, 0x3F, 0x25, 0x6E, 0xF5,
200 0x82, 0xE4, 0x34, 0x00, 0xF5, 0x83, 0xE5, 0x33,
201/*04E0*/0xF0, 0x74, 0xBF, 0x25, 0x6E, 0xF5, 0x82, 0xE4,
202 0x34, 0x00, 0x12, 0x08, 0xB1, 0x40, 0xD8, 0xE4,
203/*04F0*/0xF5, 0x70, 0xF5, 0x46, 0xF5, 0x47, 0xF5, 0x6E,
204 0x12, 0x08, 0xFA, 0xF5, 0x83, 0xE0, 0xFE, 0x12,
205/*0500*/0x08, 0xC6, 0xE0, 0x7C, 0x00, 0x24, 0x00, 0xFF,
206 0xEC, 0x3E, 0xFE, 0xAD, 0x3B, 0xD3, 0xEF, 0x9D,
207/*0510*/0xEE, 0x9C, 0x50, 0x04, 0x7B, 0x01, 0x80, 0x02,
208 0x7B, 0x00, 0xE5, 0x70, 0x70, 0x04, 0x7A, 0x01,
209/*0520*/0x80, 0x02, 0x7A, 0x00, 0xEB, 0x5A, 0x60, 0x06,
210 0x85, 0x6E, 0x46, 0x75, 0x70, 0x01, 0xD3, 0xEF,
211/*0530*/0x9D, 0xEE, 0x9C, 0x50, 0x04, 0x7F, 0x01, 0x80,
212 0x02, 0x7F, 0x00, 0xE5, 0x70, 0xB4, 0x01, 0x04,
213/*0540*/0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEF, 0x5E,
214 0x60, 0x03, 0x85, 0x6E, 0x47, 0x05, 0x6E, 0xE5,
215/*0550*/0x6E, 0x64, 0x7F, 0x70, 0xA3, 0xE5, 0x46, 0x60,
216 0x05, 0xE5, 0x47, 0xB4, 0x7E, 0x03, 0x85, 0x46,
217/*0560*/0x47, 0xE5, 0x6F, 0x70, 0x08, 0x85, 0x46, 0x76,
218 0x85, 0x47, 0x77, 0x80, 0x0E, 0xC3, 0x74, 0x7F,
219/*0570*/0x95, 0x46, 0xF5, 0x78, 0xC3, 0x74, 0x7F, 0x95,
220 0x47, 0xF5, 0x79, 0xE5, 0x6F, 0x70, 0x37, 0xE5,
221/*0580*/0x46, 0x65, 0x47, 0x70, 0x0C, 0x75, 0x73, 0x01,
222 0x75, 0x74, 0x01, 0xF5, 0x3C, 0xF5, 0x3D, 0x80,
223/*0590*/0x35, 0xE4, 0xF5, 0x4E, 0xC3, 0xE5, 0x47, 0x95,
224 0x46, 0xF5, 0x3C, 0xC3, 0x13, 0xF5, 0x71, 0x25,
225/*05A0*/0x46, 0xF5, 0x72, 0xC3, 0x94, 0x3F, 0x40, 0x05,
226 0xE4, 0xF5, 0x3D, 0x80, 0x40, 0xC3, 0x74, 0x3F,
227/*05B0*/0x95, 0x72, 0xF5, 0x3D, 0x80, 0x37, 0xE5, 0x46,
228 0x65, 0x47, 0x70, 0x0F, 0x75, 0x73, 0x01, 0x75,
229/*05C0*/0x75, 0x01, 0xF5, 0x3E, 0xF5, 0x3F, 0x75, 0x4E,
230 0x01, 0x80, 0x22, 0xE4, 0xF5, 0x4E, 0xC3, 0xE5,
231/*05D0*/0x47, 0x95, 0x46, 0xF5, 0x3E, 0xC3, 0x13, 0xF5,
232 0x71, 0x25, 0x46, 0xF5, 0x72, 0xD3, 0x94, 0x3F,
233/*05E0*/0x50, 0x05, 0xE4, 0xF5, 0x3F, 0x80, 0x06, 0xE5,
234 0x72, 0x24, 0xC1, 0xF5, 0x3F, 0x05, 0x6F, 0xE5,
235/*05F0*/0x6F, 0xC3, 0x94, 0x02, 0x50, 0x03, 0x02, 0x04,
236 0x6E, 0xE5, 0x6D, 0x45, 0x6C, 0x70, 0x02, 0x80,
237/*0600*/0x04, 0xE5, 0x74, 0x45, 0x75, 0x90, 0x07, 0x2F,
238 0xF0, 0x7F, 0x01, 0xE5, 0x3E, 0x60, 0x04, 0xE5,
239/*0610*/0x3C, 0x70, 0x14, 0xE4, 0xF5, 0x3C, 0xF5, 0x3D,
240 0xF5, 0x3E, 0xF5, 0x3F, 0x12, 0x08, 0xD2, 0x70,
241/*0620*/0x04, 0xF0, 0x02, 0x06, 0xA4, 0x80, 0x7A, 0xE5,
242 0x3C, 0xC3, 0x95, 0x3E, 0x40, 0x07, 0xE5, 0x3C,
243/*0630*/0x95, 0x3E, 0xFF, 0x80, 0x06, 0xC3, 0xE5, 0x3E,
244 0x95, 0x3C, 0xFF, 0xE5, 0x76, 0xD3, 0x95, 0x79,
245/*0640*/0x40, 0x05, 0x85, 0x76, 0x7A, 0x80, 0x03, 0x85,
246 0x79, 0x7A, 0xE5, 0x77, 0xC3, 0x95, 0x78, 0x50,
247/*0650*/0x05, 0x85, 0x77, 0x7B, 0x80, 0x03, 0x85, 0x78,
248 0x7B, 0xE5, 0x7B, 0xD3, 0x95, 0x7A, 0x40, 0x30,
249/*0660*/0xE5, 0x7B, 0x95, 0x7A, 0xF5, 0x3C, 0xF5, 0x3E,
250 0xC3, 0xE5, 0x7B, 0x95, 0x7A, 0x90, 0x07, 0x19,
251/*0670*/0xF0, 0xE5, 0x3C, 0xC3, 0x13, 0xF5, 0x71, 0x25,
252 0x7A, 0xF5, 0x72, 0xC3, 0x94, 0x3F, 0x40, 0x05,
253/*0680*/0xE4, 0xF5, 0x3D, 0x80, 0x1F, 0xC3, 0x74, 0x3F,
254 0x95, 0x72, 0xF5, 0x3D, 0xF5, 0x3F, 0x80, 0x14,
255/*0690*/0xE4, 0xF5, 0x3C, 0xF5, 0x3E, 0x90, 0x07, 0x19,
256 0xF0, 0x12, 0x08, 0xD2, 0x70, 0x03, 0xF0, 0x80,
257/*06A0*/0x03, 0x74, 0x01, 0xF0, 0x12, 0x08, 0x65, 0x75,
258 0x83, 0xD0, 0xE0, 0x54, 0x0F, 0xFE, 0xAD, 0x3C,
259/*06B0*/0x70, 0x02, 0x7E, 0x07, 0xBE, 0x0F, 0x02, 0x7E,
260 0x80, 0xEE, 0xFB, 0xEF, 0xD3, 0x9B, 0x74, 0x80,
261/*06C0*/0xF8, 0x98, 0x40, 0x1F, 0xE4, 0xF5, 0x3C, 0xF5,
262 0x3E, 0x12, 0x08, 0xD2, 0x70, 0x03, 0xF0, 0x80,
263/*06D0*/0x12, 0x74, 0x01, 0xF0, 0xE5, 0x08, 0xFB, 0xEB,
264 0x44, 0x07, 0xF5, 0x82, 0x75, 0x83, 0xD2, 0xE0,
265/*06E0*/0x44, 0x10, 0xF0, 0xE5, 0x08, 0xFB, 0xEB, 0x44,
266 0x09, 0xF5, 0x82, 0x75, 0x83, 0x9E, 0xED, 0xF0,
267/*06F0*/0xEB, 0x44, 0x07, 0xF5, 0x82, 0x75, 0x83, 0xCA,
268 0xED, 0xF0, 0x12, 0x08, 0x65, 0x75, 0x83, 0xCC,
269/*0700*/0xEF, 0xF0, 0x22, 0xE5, 0x08, 0x44, 0x07, 0xF5,
270 0x82, 0x75, 0x83, 0xBC, 0xE0, 0x54, 0xF0, 0xF0,
271/*0710*/0xE5, 0x08, 0x44, 0x07, 0xF5, 0x82, 0x75, 0x83,
272 0xBE, 0xE0, 0x54, 0xF0, 0xF0, 0xE5, 0x08, 0x44,
273/*0720*/0x07, 0xF5, 0x82, 0x75, 0x83, 0xC0, 0xE0, 0x54,
274 0xF0, 0xF0, 0xE5, 0x08, 0x44, 0x07, 0xF5, 0x82,
275/*0730*/0x22, 0xF0, 0x90, 0x07, 0x28, 0xE0, 0xFE, 0xA3,
276 0xE0, 0xF5, 0x82, 0x8E, 0x83, 0x22, 0x85, 0x42,
277/*0740*/0x42, 0x85, 0x41, 0x41, 0x85, 0x40, 0x40, 0x74,
278 0xC0, 0x2F, 0xF5, 0x82, 0x74, 0x02, 0x3E, 0xF5,
279/*0750*/0x83, 0xE5, 0x42, 0xF0, 0x74, 0xE0, 0x2F, 0xF5,
280 0x82, 0x74, 0x02, 0x3E, 0xF5, 0x83, 0x22, 0xE5,
281/*0760*/0x42, 0x29, 0xFD, 0xE4, 0x33, 0xFC, 0xE5, 0x3C,
282 0xC3, 0x9D, 0xEC, 0x64, 0x80, 0xF8, 0x74, 0x80,
283/*0770*/0x98, 0x22, 0xF5, 0x83, 0xE0, 0x90, 0x07, 0x22,
284 0x54, 0x1F, 0xFD, 0xE0, 0xFA, 0xA3, 0xE0, 0xF5,
285/*0780*/0x82, 0x8A, 0x83, 0xED, 0xF0, 0x22, 0x90, 0x07,
286 0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xF5, 0x82, 0x8C,
287/*0790*/0x83, 0x22, 0x90, 0x07, 0x24, 0xFF, 0xED, 0x44,
288 0x07, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x85,
289/*07A0*/0x38, 0x38, 0x85, 0x39, 0x39, 0x85, 0x3A, 0x3A,
290 0x74, 0xC0, 0x2F, 0xF5, 0x82, 0x74, 0x02, 0x3E,
291/*07B0*/0xF5, 0x83, 0x22, 0x90, 0x07, 0x26, 0xFF, 0xED,
292 0x44, 0x07, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x22,
293/*07C0*/0xF0, 0x74, 0xA0, 0x2F, 0xF5, 0x82, 0x74, 0x02,
294 0x3E, 0xF5, 0x83, 0x22, 0x74, 0xC0, 0x25, 0x11,
295/*07D0*/0xF5, 0x82, 0xE4, 0x34, 0x01, 0xF5, 0x83, 0x22,
296 0x74, 0x00, 0x25, 0x11, 0xF5, 0x82, 0xE4, 0x34,
297/*07E0*/0x02, 0xF5, 0x83, 0x22, 0x74, 0x60, 0x25, 0x11,
298 0xF5, 0x82, 0xE4, 0x34, 0x03, 0xF5, 0x83, 0x22,
299/*07F0*/0x74, 0x80, 0x25, 0x11, 0xF5, 0x82, 0xE4, 0x34,
300 0x03, 0xF5, 0x83, 0x22, 0x74, 0xE0, 0x25, 0x11,
301/*0800*/0xF5, 0x82, 0xE4, 0x34, 0x03, 0xF5, 0x83, 0x22,
302 0x74, 0x40, 0x25, 0x11, 0xF5, 0x82, 0xE4, 0x34,
303/*0810*/0x06, 0xF5, 0x83, 0x22, 0x74, 0x80, 0x2F, 0xF5,
304 0x82, 0x74, 0x02, 0x3E, 0xF5, 0x83, 0x22, 0xAF,
305/*0820*/0x08, 0x7E, 0x00, 0xEF, 0x44, 0x07, 0xF5, 0x82,
306 0x22, 0xF5, 0x83, 0xE5, 0x82, 0x44, 0x07, 0xF5,
307/*0830*/0x82, 0xE5, 0x40, 0xF0, 0x22, 0x74, 0x40, 0x25,
308 0x11, 0xF5, 0x82, 0xE4, 0x34, 0x02, 0xF5, 0x83,
309/*0840*/0x22, 0x74, 0xC0, 0x25, 0x11, 0xF5, 0x82, 0xE4,
310 0x34, 0x03, 0xF5, 0x83, 0x22, 0x74, 0x00, 0x25,
311/*0850*/0x11, 0xF5, 0x82, 0xE4, 0x34, 0x06, 0xF5, 0x83,
312 0x22, 0x74, 0x20, 0x25, 0x11, 0xF5, 0x82, 0xE4,
313/*0860*/0x34, 0x06, 0xF5, 0x83, 0x22, 0xE5, 0x08, 0xFD,
314 0xED, 0x44, 0x07, 0xF5, 0x82, 0x22, 0xE5, 0x41,
315/*0870*/0xF0, 0xE5, 0x65, 0x64, 0x01, 0x45, 0x64, 0x22,
316 0x7E, 0x00, 0xFB, 0x7A, 0x00, 0xFD, 0x7C, 0x00,
317/*0880*/0x22, 0x74, 0x20, 0x25, 0x11, 0xF5, 0x82, 0xE4,
318 0x34, 0x02, 0x22, 0x74, 0xA0, 0x25, 0x11, 0xF5,
319/*0890*/0x82, 0xE4, 0x34, 0x03, 0x22, 0x85, 0x3E, 0x42,
320 0x85, 0x3F, 0x41, 0x8F, 0x40, 0x22, 0x85, 0x3C,
321/*08A0*/0x42, 0x85, 0x3D, 0x41, 0x8F, 0x40, 0x22, 0x75,
322 0x45, 0x3F, 0x90, 0x07, 0x20, 0xE4, 0xF0, 0xA3,
323/*08B0*/0x22, 0xF5, 0x83, 0xE5, 0x32, 0xF0, 0x05, 0x6E,
324 0xE5, 0x6E, 0xC3, 0x94, 0x40, 0x22, 0xF0, 0xE5,
325/*08C0*/0x08, 0x44, 0x06, 0xF5, 0x82, 0x22, 0x74, 0x00,
326 0x25, 0x6E, 0xF5, 0x82, 0xE4, 0x34, 0x00, 0xF5,
327/*08D0*/0x83, 0x22, 0xE5, 0x6D, 0x45, 0x6C, 0x90, 0x07,
328 0x2F, 0x22, 0xE4, 0xF9, 0xE5, 0x3C, 0xD3, 0x95,
329/*08E0*/0x3E, 0x22, 0x74, 0x80, 0x2E, 0xF5, 0x82, 0xE4,
330 0x34, 0x02, 0xF5, 0x83, 0xE0, 0x22, 0x74, 0xA0,
331/*08F0*/0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x02, 0xF5, 0x83,
332 0xE0, 0x22, 0x74, 0x80, 0x25, 0x6E, 0xF5, 0x82,
333/*0900*/0xE4, 0x34, 0x00, 0x22, 0x25, 0x42, 0xFD, 0xE4,
334 0x33, 0xFC, 0x22, 0x85, 0x42, 0x42, 0x85, 0x41,
335/*0910*/0x41, 0x85, 0x40, 0x40, 0x22, 0xED, 0x4C, 0x60,
336 0x03, 0x02, 0x09, 0xE5, 0xEF, 0x4E, 0x70, 0x37,
337/*0920*/0x90, 0x07, 0x26, 0x12, 0x07, 0x89, 0xE0, 0xFD,
338 0x12, 0x07, 0xCC, 0xED, 0xF0, 0x90, 0x07, 0x28,
339/*0930*/0x12, 0x07, 0x89, 0xE0, 0xFD, 0x12, 0x07, 0xD8,
340 0xED, 0xF0, 0x12, 0x07, 0x86, 0xE0, 0x54, 0x1F,
341/*0940*/0xFD, 0x12, 0x08, 0x81, 0xF5, 0x83, 0xED, 0xF0,
342 0x90, 0x07, 0x24, 0x12, 0x07, 0x89, 0xE0, 0x54,
343/*0950*/0x1F, 0xFD, 0x12, 0x08, 0x35, 0xED, 0xF0, 0xEF,
344 0x64, 0x04, 0x4E, 0x70, 0x37, 0x90, 0x07, 0x26,
345/*0960*/0x12, 0x07, 0x89, 0xE0, 0xFD, 0x12, 0x07, 0xE4,
346 0xED, 0xF0, 0x90, 0x07, 0x28, 0x12, 0x07, 0x89,
347/*0970*/0xE0, 0xFD, 0x12, 0x07, 0xF0, 0xED, 0xF0, 0x12,
348 0x07, 0x86, 0xE0, 0x54, 0x1F, 0xFD, 0x12, 0x08,
349/*0980*/0x8B, 0xF5, 0x83, 0xED, 0xF0, 0x90, 0x07, 0x24,
350 0x12, 0x07, 0x89, 0xE0, 0x54, 0x1F, 0xFD, 0x12,
351/*0990*/0x08, 0x41, 0xED, 0xF0, 0xEF, 0x64, 0x01, 0x4E,
352 0x70, 0x04, 0x7D, 0x01, 0x80, 0x02, 0x7D, 0x00,
353/*09A0*/0xEF, 0x64, 0x02, 0x4E, 0x70, 0x04, 0x7F, 0x01,
354 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x4D, 0x60, 0x78,
355/*09B0*/0x90, 0x07, 0x26, 0x12, 0x07, 0x35, 0xE0, 0xFF,
356 0x12, 0x07, 0xFC, 0xEF, 0x12, 0x07, 0x31, 0xE0,
357/*09C0*/0xFF, 0x12, 0x08, 0x08, 0xEF, 0xF0, 0x90, 0x07,
358 0x22, 0x12, 0x07, 0x35, 0xE0, 0x54, 0x1F, 0xFF,
359/*09D0*/0x12, 0x08, 0x4D, 0xEF, 0xF0, 0x90, 0x07, 0x24,
360 0x12, 0x07, 0x35, 0xE0, 0x54, 0x1F, 0xFF, 0x12,
361/*09E0*/0x08, 0x59, 0xEF, 0xF0, 0x22, 0x12, 0x07, 0xCC,
362 0xE4, 0xF0, 0x12, 0x07, 0xD8, 0xE4, 0xF0, 0x12,
363/*09F0*/0x08, 0x81, 0xF5, 0x83, 0xE4, 0xF0, 0x12, 0x08,
364 0x35, 0x74, 0x14, 0xF0, 0x12, 0x07, 0xE4, 0xE4,
365/*0A00*/0xF0, 0x12, 0x07, 0xF0, 0xE4, 0xF0, 0x12, 0x08,
366 0x8B, 0xF5, 0x83, 0xE4, 0xF0, 0x12, 0x08, 0x41,
367/*0A10*/0x74, 0x14, 0xF0, 0x12, 0x07, 0xFC, 0xE4, 0xF0,
368 0x12, 0x08, 0x08, 0xE4, 0xF0, 0x12, 0x08, 0x4D,
369/*0A20*/0xE4, 0xF0, 0x12, 0x08, 0x59, 0x74, 0x14, 0xF0,
370 0x22, 0x53, 0xF9, 0xF7, 0x75, 0xFC, 0x10, 0xE4,
371/*0A30*/0xF5, 0xFD, 0x75, 0xFE, 0x30, 0xF5, 0xFF, 0xE5,
372 0xE7, 0x20, 0xE7, 0x03, 0x43, 0xF9, 0x08, 0xE5,
373/*0A40*/0xE6, 0x20, 0xE7, 0x0B, 0x78, 0xFF, 0xE4, 0xF6,
374 0xD8, 0xFD, 0x53, 0xE6, 0xFE, 0x80, 0x09, 0x78,
375/*0A50*/0x08, 0xE4, 0xF6, 0xD8, 0xFD, 0x53, 0xE6, 0xFE,
376 0x75, 0x81, 0x80, 0xE4, 0xF5, 0xA8, 0xD2, 0xA8,
377/*0A60*/0xC2, 0xA9, 0xD2, 0xAF, 0xE5, 0xE2, 0x20, 0xE5,
378 0x05, 0x20, 0xE6, 0x02, 0x80, 0x03, 0x43, 0xE1,
379/*0A70*/0x02, 0xE5, 0xE2, 0x20, 0xE0, 0x0E, 0x90, 0x00,
380 0x00, 0x7F, 0x00, 0x7E, 0x08, 0xE4, 0xF0, 0xA3,
381/*0A80*/0xDF, 0xFC, 0xDE, 0xFA, 0x02, 0x0A, 0xDB, 0x43,
382 0xFA, 0x01, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83,
383/*0A90*/0xC0, 0x82, 0xC0, 0xD0, 0x12, 0x1C, 0xE7, 0xD0,
384 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0,
385/*0AA0*/0xE0, 0x53, 0xFA, 0xFE, 0x32, 0x02, 0x1B, 0x55,
386 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xF6,
387/*0AB0*/0x08, 0xDF, 0xF9, 0x80, 0x29, 0xE4, 0x93, 0xA3,
388 0xF8, 0x54, 0x07, 0x24, 0x0C, 0xC8, 0xC3, 0x33,
389/*0AC0*/0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40,
390 0x04, 0xF4, 0x56, 0x80, 0x01, 0x46, 0xF6, 0xDF,
391/*0AD0*/0xE4, 0x80, 0x0B, 0x01, 0x02, 0x04, 0x08, 0x10,
392 0x20, 0x40, 0x80, 0x90, 0x00, 0x3F, 0xE4, 0x7E,
393/*0AE0*/0x01, 0x93, 0x60, 0xC1, 0xA3, 0xFF, 0x54, 0x3F,
394 0x30, 0xE5, 0x09, 0x54, 0x1F, 0xFE, 0xE4, 0x93,
395/*0AF0*/0xA3, 0x60, 0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25,
396 0xE0, 0x60, 0xAD, 0x40, 0xB8, 0x80, 0xFE, 0x8C,
397/*0B00*/0x64, 0x8D, 0x65, 0x8A, 0x66, 0x8B, 0x67, 0xE4,
398 0xF5, 0x69, 0xEF, 0x4E, 0x70, 0x03, 0x02, 0x1D,
399/*0B10*/0x55, 0xE4, 0xF5, 0x68, 0xE5, 0x67, 0x45, 0x66,
400 0x70, 0x32, 0x12, 0x07, 0x2A, 0x75, 0x83, 0x90,
401/*0B20*/0xE4, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC2, 0xE4,
402 0x12, 0x07, 0x29, 0x75, 0x83, 0xC4, 0xE4, 0x12,
403/*0B30*/0x08, 0x70, 0x70, 0x29, 0x12, 0x07, 0x2A, 0x75,
404 0x83, 0x92, 0xE4, 0x12, 0x07, 0x29, 0x75, 0x83,
405/*0B40*/0xC6, 0xE4, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC8,
406 0xE4, 0xF0, 0x80, 0x11, 0x90, 0x07, 0x26, 0x12,
407/*0B50*/0x07, 0x35, 0xE4, 0x12, 0x08, 0x70, 0x70, 0x05,
408 0x12, 0x07, 0x32, 0xE4, 0xF0, 0x12, 0x1D, 0x55,
409/*0B60*/0x12, 0x1E, 0xBF, 0xE5, 0x67, 0x45, 0x66, 0x70,
410 0x33, 0x12, 0x07, 0x2A, 0x75, 0x83, 0x90, 0xE5,
411/*0B70*/0x41, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC2, 0xE5,
412 0x41, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC4, 0x12,
413/*0B80*/0x08, 0x6E, 0x70, 0x29, 0x12, 0x07, 0x2A, 0x75,
414 0x83, 0x92, 0xE5, 0x40, 0x12, 0x07, 0x29, 0x75,
415/*0B90*/0x83, 0xC6, 0xE5, 0x40, 0x12, 0x07, 0x29, 0x75,
416 0x83, 0xC8, 0x80, 0x0E, 0x90, 0x07, 0x26, 0x12,
417/*0BA0*/0x07, 0x35, 0x12, 0x08, 0x6E, 0x70, 0x06, 0x12,
418 0x07, 0x32, 0xE5, 0x40, 0xF0, 0xAF, 0x69, 0x7E,
419/*0BB0*/0x00, 0xAD, 0x67, 0xAC, 0x66, 0x12, 0x04, 0x44,
420 0x12, 0x07, 0x2A, 0x75, 0x83, 0xCA, 0xE0, 0xD3,
421/*0BC0*/0x94, 0x00, 0x50, 0x0C, 0x05, 0x68, 0xE5, 0x68,
422 0xC3, 0x94, 0x05, 0x50, 0x03, 0x02, 0x0B, 0x14,
423/*0BD0*/0x22, 0x8C, 0x60, 0x8D, 0x61, 0x12, 0x08, 0xDA,
424 0x74, 0x20, 0x40, 0x0D, 0x2F, 0xF5, 0x82, 0x74,
425/*0BE0*/0x03, 0x3E, 0xF5, 0x83, 0xE5, 0x3E, 0xF0, 0x80,
426 0x0B, 0x2F, 0xF5, 0x82, 0x74, 0x03, 0x3E, 0xF5,
427/*0BF0*/0x83, 0xE5, 0x3C, 0xF0, 0xE5, 0x3C, 0xD3, 0x95,
428 0x3E, 0x40, 0x3C, 0xE5, 0x61, 0x45, 0x60, 0x70,
429/*0C00*/0x10, 0xE9, 0x12, 0x09, 0x04, 0xE5, 0x3E, 0x12,
430 0x07, 0x68, 0x40, 0x3B, 0x12, 0x08, 0x95, 0x80,
431/*0C10*/0x18, 0xE5, 0x3E, 0xC3, 0x95, 0x38, 0x40, 0x1D,
432 0x85, 0x3E, 0x38, 0xE5, 0x3E, 0x60, 0x05, 0x85,
433/*0C20*/0x3F, 0x39, 0x80, 0x03, 0x85, 0x39, 0x39, 0x8F,
434 0x3A, 0x12, 0x08, 0x14, 0xE5, 0x3E, 0x12, 0x07,
435/*0C30*/0xC0, 0xE5, 0x3F, 0xF0, 0x22, 0x80, 0x43, 0xE5,
436 0x61, 0x45, 0x60, 0x70, 0x19, 0x12, 0x07, 0x5F,
437/*0C40*/0x40, 0x05, 0x12, 0x08, 0x9E, 0x80, 0x27, 0x12,
438 0x09, 0x0B, 0x12, 0x08, 0x14, 0xE5, 0x42, 0x12,
439/*0C50*/0x07, 0xC0, 0xE5, 0x41, 0xF0, 0x22, 0xE5, 0x3C,
440 0xC3, 0x95, 0x38, 0x40, 0x1D, 0x85, 0x3C, 0x38,
441/*0C60*/0xE5, 0x3C, 0x60, 0x05, 0x85, 0x3D, 0x39, 0x80,
442 0x03, 0x85, 0x39, 0x39, 0x8F, 0x3A, 0x12, 0x08,
443/*0C70*/0x14, 0xE5, 0x3C, 0x12, 0x07, 0xC0, 0xE5, 0x3D,
444 0xF0, 0x22, 0x85, 0x38, 0x38, 0x85, 0x39, 0x39,
445/*0C80*/0x85, 0x3A, 0x3A, 0x12, 0x08, 0x14, 0xE5, 0x38,
446 0x12, 0x07, 0xC0, 0xE5, 0x39, 0xF0, 0x22, 0x7F,
447/*0C90*/0x06, 0x12, 0x17, 0x31, 0x12, 0x1D, 0x23, 0x12,
448 0x0E, 0x04, 0x12, 0x0E, 0x33, 0xE0, 0x44, 0x0A,
449/*0CA0*/0xF0, 0x74, 0x8E, 0xFE, 0x12, 0x0E, 0x04, 0x12,
450 0x0E, 0x0B, 0xEF, 0xF0, 0xE5, 0x28, 0x30, 0xE5,
451/*0CB0*/0x03, 0xD3, 0x80, 0x01, 0xC3, 0x40, 0x05, 0x75,
452 0x14, 0x20, 0x80, 0x03, 0x75, 0x14, 0x08, 0x12,
453/*0CC0*/0x0E, 0x04, 0x75, 0x83, 0x8A, 0xE5, 0x14, 0xF0,
454 0xB4, 0xFF, 0x05, 0x75, 0x12, 0x80, 0x80, 0x06,
455/*0CD0*/0xE5, 0x14, 0xC3, 0x13, 0xF5, 0x12, 0xE4, 0xF5,
456 0x16, 0xF5, 0x7F, 0x12, 0x19, 0x36, 0x12, 0x13,
457/*0CE0*/0xA3, 0xE5, 0x0A, 0xC3, 0x94, 0x01, 0x50, 0x09,
458 0x05, 0x16, 0xE5, 0x16, 0xC3, 0x94, 0x14, 0x40,
459/*0CF0*/0xEA, 0xE5, 0xE4, 0x20, 0xE7, 0x28, 0x12, 0x0E,
460 0x04, 0x75, 0x83, 0xD2, 0xE0, 0x54, 0x08, 0xD3,
461/*0D00*/0x94, 0x00, 0x40, 0x04, 0x7F, 0x01, 0x80, 0x02,
462 0x7F, 0x00, 0xE5, 0x0A, 0xC3, 0x94, 0x01, 0x40,
463/*0D10*/0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEF,
464 0x5E, 0x60, 0x03, 0x12, 0x1D, 0xD7, 0xE5, 0x7F,
465/*0D20*/0xC3, 0x94, 0x11, 0x40, 0x14, 0x12, 0x0E, 0x04,
466 0x75, 0x83, 0xD2, 0xE0, 0x44, 0x80, 0xF0, 0xE5,
467/*0D30*/0xE4, 0x20, 0xE7, 0x0F, 0x12, 0x1D, 0xD7, 0x80,
468 0x0A, 0x12, 0x0E, 0x04, 0x75, 0x83, 0xD2, 0xE0,
469/*0D40*/0x54, 0x7F, 0xF0, 0x12, 0x1D, 0x23, 0x22, 0x74,
470 0x8A, 0x85, 0x08, 0x82, 0xF5, 0x83, 0xE5, 0x17,
471/*0D50*/0xF0, 0x12, 0x0E, 0x3A, 0xE4, 0xF0, 0x90, 0x07,
472 0x02, 0xE0, 0x12, 0x0E, 0x17, 0x75, 0x83, 0x90,
473/*0D60*/0xEF, 0xF0, 0x74, 0x92, 0xFE, 0xE5, 0x08, 0x44,
474 0x07, 0xFF, 0xF5, 0x82, 0x8E, 0x83, 0xE0, 0x54,
475/*0D70*/0xC0, 0xFD, 0x90, 0x07, 0x03, 0xE0, 0x54, 0x3F,
476 0x4D, 0x8F, 0x82, 0x8E, 0x83, 0xF0, 0x90, 0x07,
477/*0D80*/0x04, 0xE0, 0x12, 0x0E, 0x17, 0x75, 0x83, 0x82,
478 0xEF, 0xF0, 0x90, 0x07, 0x05, 0xE0, 0xFF, 0xED,
479/*0D90*/0x44, 0x07, 0xF5, 0x82, 0x75, 0x83, 0xB4, 0xEF,
480 0x12, 0x0E, 0x03, 0x75, 0x83, 0x80, 0xE0, 0x54,
481/*0DA0*/0xBF, 0xF0, 0x30, 0x37, 0x0A, 0x12, 0x0E, 0x91,
482 0x75, 0x83, 0x94, 0xE0, 0x44, 0x80, 0xF0, 0x30,
483/*0DB0*/0x38, 0x0A, 0x12, 0x0E, 0x91, 0x75, 0x83, 0x92,
484 0xE0, 0x44, 0x80, 0xF0, 0xE5, 0x28, 0x30, 0xE4,
485/*0DC0*/0x1A, 0x20, 0x39, 0x0A, 0x12, 0x0E, 0x04, 0x75,
486 0x83, 0x88, 0xE0, 0x54, 0x7F, 0xF0, 0x20, 0x3A,
487/*0DD0*/0x0A, 0x12, 0x0E, 0x04, 0x75, 0x83, 0x88, 0xE0,
488 0x54, 0xBF, 0xF0, 0x74, 0x8C, 0xFE, 0x12, 0x0E,
489/*0DE0*/0x04, 0x8E, 0x83, 0xE0, 0x54, 0x0F, 0x12, 0x0E,
490 0x03, 0x75, 0x83, 0x86, 0xE0, 0x54, 0xBF, 0xF0,
491/*0DF0*/0xE5, 0x08, 0x44, 0x06, 0x12, 0x0D, 0xFD, 0x75,
492 0x83, 0x8A, 0xE4, 0xF0, 0x22, 0xF5, 0x82, 0x75,
493/*0E00*/0x83, 0x82, 0xE4, 0xF0, 0xE5, 0x08, 0x44, 0x07,
494 0xF5, 0x82, 0x22, 0x8E, 0x83, 0xE0, 0xF5, 0x10,
495/*0E10*/0x54, 0xFE, 0xF0, 0xE5, 0x10, 0x44, 0x01, 0xFF,
496 0xE5, 0x08, 0xFD, 0xED, 0x44, 0x07, 0xF5, 0x82,
497/*0E20*/0x22, 0xE5, 0x15, 0xC4, 0x54, 0x07, 0xFF, 0xE5,
498 0x08, 0xFD, 0xED, 0x44, 0x08, 0xF5, 0x82, 0x75,
499/*0E30*/0x83, 0x82, 0x22, 0x75, 0x83, 0x80, 0xE0, 0x44,
500 0x40, 0xF0, 0xE5, 0x08, 0x44, 0x08, 0xF5, 0x82,
501/*0E40*/0x75, 0x83, 0x8A, 0x22, 0xE5, 0x16, 0x25, 0xE0,
502 0x25, 0xE0, 0x24, 0xAF, 0xF5, 0x82, 0xE4, 0x34,
503/*0E50*/0x1A, 0xF5, 0x83, 0xE4, 0x93, 0xF5, 0x0D, 0x22,
504 0x43, 0xE1, 0x10, 0x43, 0xE1, 0x80, 0x53, 0xE1,
505/*0E60*/0xFD, 0x85, 0xE1, 0x10, 0x22, 0xE5, 0x16, 0x25,
506 0xE0, 0x25, 0xE0, 0x24, 0xB2, 0xF5, 0x82, 0xE4,
507/*0E70*/0x34, 0x1A, 0xF5, 0x83, 0xE4, 0x93, 0x22, 0x85,
508 0x55, 0x82, 0x85, 0x54, 0x83, 0xE5, 0x15, 0xF0,
509/*0E80*/0x22, 0xE5, 0xE2, 0x54, 0x20, 0xD3, 0x94, 0x00,
510 0x22, 0xE5, 0xE2, 0x54, 0x40, 0xD3, 0x94, 0x00,
511/*0E90*/0x22, 0xE5, 0x08, 0x44, 0x06, 0xF5, 0x82, 0x22,
512 0xFD, 0xE5, 0x08, 0xFB, 0xEB, 0x44, 0x07, 0xF5,
513/*0EA0*/0x82, 0x22, 0x53, 0xF9, 0xF7, 0x75, 0xFE, 0x30,
514 0x22, 0xEF, 0x4E, 0x70, 0x26, 0x12, 0x07, 0xCC,
515/*0EB0*/0xE0, 0xFD, 0x90, 0x07, 0x26, 0x12, 0x07, 0x7B,
516 0x12, 0x07, 0xD8, 0xE0, 0xFD, 0x90, 0x07, 0x28,
517/*0EC0*/0x12, 0x07, 0x7B, 0x12, 0x08, 0x81, 0x12, 0x07,
518 0x72, 0x12, 0x08, 0x35, 0xE0, 0x90, 0x07, 0x24,
519/*0ED0*/0x12, 0x07, 0x78, 0xEF, 0x64, 0x04, 0x4E, 0x70,
520 0x29, 0x12, 0x07, 0xE4, 0xE0, 0xFD, 0x90, 0x07,
521/*0EE0*/0x26, 0x12, 0x07, 0x7B, 0x12, 0x07, 0xF0, 0xE0,
522 0xFD, 0x90, 0x07, 0x28, 0x12, 0x07, 0x7B, 0x12,
523/*0EF0*/0x08, 0x8B, 0x12, 0x07, 0x72, 0x12, 0x08, 0x41,
524 0xE0, 0x54, 0x1F, 0xFD, 0x90, 0x07, 0x24, 0x12,
525/*0F00*/0x07, 0x7B, 0xEF, 0x64, 0x01, 0x4E, 0x70, 0x04,
526 0x7D, 0x01, 0x80, 0x02, 0x7D, 0x00, 0xEF, 0x64,
527/*0F10*/0x02, 0x4E, 0x70, 0x04, 0x7F, 0x01, 0x80, 0x02,
528 0x7F, 0x00, 0xEF, 0x4D, 0x60, 0x35, 0x12, 0x07,
529/*0F20*/0xFC, 0xE0, 0xFF, 0x90, 0x07, 0x26, 0x12, 0x07,
530 0x89, 0xEF, 0xF0, 0x12, 0x08, 0x08, 0xE0, 0xFF,
531/*0F30*/0x90, 0x07, 0x28, 0x12, 0x07, 0x89, 0xEF, 0xF0,
532 0x12, 0x08, 0x4D, 0xE0, 0x54, 0x1F, 0xFF, 0x12,
533/*0F40*/0x07, 0x86, 0xEF, 0xF0, 0x12, 0x08, 0x59, 0xE0,
534 0x54, 0x1F, 0xFF, 0x90, 0x07, 0x24, 0x12, 0x07,
535/*0F50*/0x89, 0xEF, 0xF0, 0x22, 0xE4, 0xF5, 0x53, 0x12,
536 0x0E, 0x81, 0x40, 0x04, 0x7F, 0x01, 0x80, 0x02,
537/*0F60*/0x7F, 0x00, 0x12, 0x0E, 0x89, 0x40, 0x04, 0x7E,
538 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x4F, 0x70,
539/*0F70*/0x03, 0x02, 0x0F, 0xF6, 0x85, 0xE1, 0x10, 0x43,
540 0xE1, 0x02, 0x53, 0xE1, 0x0F, 0x85, 0xE1, 0x10,
541/*0F80*/0xE4, 0xF5, 0x51, 0xE5, 0xE3, 0x54, 0x3F, 0xF5,
542 0x52, 0x12, 0x0E, 0x89, 0x40, 0x1D, 0xAD, 0x52,
543/*0F90*/0xAF, 0x51, 0x12, 0x11, 0x18, 0xEF, 0x60, 0x08,
544 0x85, 0xE1, 0x10, 0x43, 0xE1, 0x40, 0x80, 0x0B,
545/*0FA0*/0x53, 0xE1, 0xBF, 0x12, 0x0E, 0x58, 0x12, 0x00,
546 0x06, 0x80, 0xFB, 0xE5, 0xE3, 0x54, 0x3F, 0xF5,
547/*0FB0*/0x51, 0xE5, 0xE4, 0x54, 0x3F, 0xF5, 0x52, 0x12,
548 0x0E, 0x81, 0x40, 0x1D, 0xAD, 0x52, 0xAF, 0x51,
549/*0FC0*/0x12, 0x11, 0x18, 0xEF, 0x60, 0x08, 0x85, 0xE1,
550 0x10, 0x43, 0xE1, 0x20, 0x80, 0x0B, 0x53, 0xE1,
551/*0FD0*/0xDF, 0x12, 0x0E, 0x58, 0x12, 0x00, 0x06, 0x80,
552 0xFB, 0x12, 0x0E, 0x81, 0x40, 0x04, 0x7F, 0x01,
553/*0FE0*/0x80, 0x02, 0x7F, 0x00, 0x12, 0x0E, 0x89, 0x40,
554 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE,
555/*0FF0*/0x4F, 0x60, 0x03, 0x12, 0x0E, 0x5B, 0x22, 0x12,
556 0x0E, 0x21, 0xEF, 0xF0, 0x12, 0x10, 0x91, 0x22,
557/*1000*/0x02, 0x11, 0x00, 0x02, 0x10, 0x40, 0x02, 0x10,
558 0x90, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
559/*1010*/0x01, 0x20, 0x01, 0x20, 0xE4, 0xF5, 0x57, 0x12,
560 0x16, 0xBD, 0x12, 0x16, 0x44, 0xE4, 0x12, 0x10,
561/*1020*/0x56, 0x12, 0x14, 0xB7, 0x90, 0x07, 0x26, 0x12,
562 0x07, 0x35, 0xE4, 0x12, 0x07, 0x31, 0xE4, 0xF0,
563/*1030*/0x12, 0x10, 0x56, 0x12, 0x14, 0xB7, 0x90, 0x07,
564 0x26, 0x12, 0x07, 0x35, 0xE5, 0x41, 0x12, 0x07,
565/*1040*/0x31, 0xE5, 0x40, 0xF0, 0xAF, 0x57, 0x7E, 0x00,
566 0xAD, 0x56, 0x7C, 0x00, 0x12, 0x04, 0x44, 0xAF,
567/*1050*/0x56, 0x7E, 0x00, 0x02, 0x11, 0xEE, 0xFF, 0x90,
568 0x07, 0x20, 0xA3, 0xE0, 0xFD, 0xE4, 0xF5, 0x56,
569/*1060*/0xF5, 0x40, 0xFE, 0xFC, 0xAB, 0x56, 0xFA, 0x12,
570 0x11, 0x51, 0x7F, 0x0F, 0x7D, 0x18, 0xE4, 0xF5,
571/*1070*/0x56, 0xF5, 0x40, 0xFE, 0xFC, 0xAB, 0x56, 0xFA,
572 0x12, 0x15, 0x41, 0xAF, 0x56, 0x7E, 0x00, 0x12,
573/*1080*/0x1A, 0xFF, 0xE4, 0xFF, 0xF5, 0x56, 0x7D, 0x1F,
574 0xF5, 0x40, 0xFE, 0xFC, 0xAB, 0x56, 0xFA, 0x22,
575/*1090*/0x22, 0xE4, 0xF5, 0x55, 0xE5, 0x08, 0xFD, 0x74,
576 0xA0, 0xF5, 0x56, 0xED, 0x44, 0x07, 0xF5, 0x57,
577/*10A0*/0xE5, 0x28, 0x30, 0xE5, 0x03, 0xD3, 0x80, 0x01,
578 0xC3, 0x40, 0x05, 0x7F, 0x28, 0xEF, 0x80, 0x04,
579/*10B0*/0x7F, 0x14, 0xEF, 0xC3, 0x13, 0xF5, 0x54, 0xE4,
580 0xF9, 0x12, 0x0E, 0x18, 0x75, 0x83, 0x8E, 0xE0,
581/*10C0*/0xF5, 0x10, 0xCE, 0xEF, 0xCE, 0xEE, 0xD3, 0x94,
582 0x00, 0x40, 0x26, 0xE5, 0x10, 0x54, 0xFE, 0x12,
583/*10D0*/0x0E, 0x98, 0x75, 0x83, 0x8E, 0xED, 0xF0, 0xE5,
584 0x10, 0x44, 0x01, 0xFD, 0xEB, 0x44, 0x07, 0xF5,
585/*10E0*/0x82, 0xED, 0xF0, 0x85, 0x57, 0x82, 0x85, 0x56,
586 0x83, 0xE0, 0x30, 0xE3, 0x01, 0x09, 0x1E, 0x80,
587/*10F0*/0xD4, 0xC2, 0x34, 0xE9, 0xC3, 0x95, 0x54, 0x40,
588 0x02, 0xD2, 0x34, 0x22, 0x02, 0x00, 0x06, 0x22,
589/*1100*/0x30, 0x30, 0x11, 0x90, 0x10, 0x00, 0xE4, 0x93,
590 0xF5, 0x10, 0x90, 0x10, 0x10, 0xE4, 0x93, 0xF5,
591/*1110*/0x10, 0x12, 0x10, 0x90, 0x12, 0x11, 0x50, 0x22,
592 0xE4, 0xFC, 0xC3, 0xED, 0x9F, 0xFA, 0xEF, 0xF5,
593/*1120*/0x83, 0x75, 0x82, 0x00, 0x79, 0xFF, 0xE4, 0x93,
594 0xCC, 0x6C, 0xCC, 0xA3, 0xD9, 0xF8, 0xDA, 0xF6,
595/*1130*/0xE5, 0xE2, 0x30, 0xE4, 0x02, 0x8C, 0xE5, 0xED,
596 0x24, 0xFF, 0xFF, 0xEF, 0x75, 0x82, 0xFF, 0xF5,
597/*1140*/0x83, 0xE4, 0x93, 0x6C, 0x70, 0x03, 0x7F, 0x01,
598 0x22, 0x7F, 0x00, 0x22, 0x22, 0x11, 0x00, 0x00,
599/*1150*/0x22, 0x8E, 0x58, 0x8F, 0x59, 0x8C, 0x5A, 0x8D,
600 0x5B, 0x8A, 0x5C, 0x8B, 0x5D, 0x75, 0x5E, 0x01,
601/*1160*/0xE4, 0xF5, 0x5F, 0xF5, 0x60, 0xF5, 0x62, 0x12,
602 0x07, 0x2A, 0x75, 0x83, 0xD0, 0xE0, 0xFF, 0xC4,
603/*1170*/0x54, 0x0F, 0xF5, 0x61, 0x12, 0x1E, 0xA5, 0x85,
604 0x59, 0x5E, 0xD3, 0xE5, 0x5E, 0x95, 0x5B, 0xE5,
605/*1180*/0x5A, 0x12, 0x07, 0x6B, 0x50, 0x4B, 0x12, 0x07,
606 0x03, 0x75, 0x83, 0xBC, 0xE0, 0x45, 0x5E, 0x12,
607/*1190*/0x07, 0x29, 0x75, 0x83, 0xBE, 0xE0, 0x45, 0x5E,
608 0x12, 0x07, 0x29, 0x75, 0x83, 0xC0, 0xE0, 0x45,
609/*11A0*/0x5E, 0xF0, 0xAF, 0x5F, 0xE5, 0x60, 0x12, 0x08,
610 0x78, 0x12, 0x0A, 0xFF, 0xAF, 0x62, 0x7E, 0x00,
611/*11B0*/0xAD, 0x5D, 0xAC, 0x5C, 0x12, 0x04, 0x44, 0xE5,
612 0x61, 0xAF, 0x5E, 0x7E, 0x00, 0xB4, 0x03, 0x05,
613/*11C0*/0x12, 0x1E, 0x21, 0x80, 0x07, 0xAD, 0x5D, 0xAC,
614 0x5C, 0x12, 0x13, 0x17, 0x05, 0x5E, 0x02, 0x11,
615/*11D0*/0x7A, 0x12, 0x07, 0x03, 0x75, 0x83, 0xBC, 0xE0,
616 0x45, 0x40, 0x12, 0x07, 0x29, 0x75, 0x83, 0xBE,
617/*11E0*/0xE0, 0x45, 0x40, 0x12, 0x07, 0x29, 0x75, 0x83,
618 0xC0, 0xE0, 0x45, 0x40, 0xF0, 0x22, 0x8E, 0x58,
619/*11F0*/0x8F, 0x59, 0x75, 0x5A, 0x01, 0x79, 0x01, 0x75,
620 0x5B, 0x01, 0xE4, 0xFB, 0x12, 0x07, 0x2A, 0x75,
621/*1200*/0x83, 0xAE, 0xE0, 0x54, 0x1A, 0xFF, 0x12, 0x08,
622 0x65, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0xFE, 0xEF,
623/*1210*/0x70, 0x0C, 0xEE, 0x65, 0x35, 0x70, 0x07, 0x90,
624 0x07, 0x2F, 0xE0, 0xB4, 0x01, 0x0D, 0xAF, 0x35,
625/*1220*/0x7E, 0x00, 0x12, 0x0E, 0xA9, 0xCF, 0xEB, 0xCF,
626 0x02, 0x1E, 0x60, 0xE5, 0x59, 0x64, 0x02, 0x45,
627/*1230*/0x58, 0x70, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F,
628 0x00, 0xE5, 0x59, 0x45, 0x58, 0x70, 0x04, 0x7E,
629/*1240*/0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x4F, 0x60,
630 0x23, 0x85, 0x41, 0x49, 0x85, 0x40, 0x4B, 0xE5,
631/*1250*/0x59, 0x45, 0x58, 0x70, 0x2C, 0xAF, 0x5A, 0xFE,
632 0xCD, 0xE9, 0xCD, 0xFC, 0xAB, 0x59, 0xAA, 0x58,
633/*1260*/0x12, 0x0A, 0xFF, 0xAF, 0x5B, 0x7E, 0x00, 0x12,
634 0x1E, 0x60, 0x80, 0x15, 0xAF, 0x5B, 0x7E, 0x00,
635/*1270*/0x12, 0x1E, 0x60, 0x90, 0x07, 0x26, 0x12, 0x07,
636 0x35, 0xE5, 0x49, 0x12, 0x07, 0x31, 0xE5, 0x4B,
637/*1280*/0xF0, 0xE4, 0xFD, 0xAF, 0x35, 0xFE, 0xFC, 0x12,
638 0x09, 0x15, 0x22, 0x8C, 0x64, 0x8D, 0x65, 0x12,
639/*1290*/0x08, 0xDA, 0x40, 0x3C, 0xE5, 0x65, 0x45, 0x64,
640 0x70, 0x10, 0x12, 0x09, 0x04, 0xC3, 0xE5, 0x3E,
641/*12A0*/0x12, 0x07, 0x69, 0x40, 0x3B, 0x12, 0x08, 0x95,
642 0x80, 0x18, 0xE5, 0x3E, 0xC3, 0x95, 0x38, 0x40,
643/*12B0*/0x1D, 0x85, 0x3E, 0x38, 0xE5, 0x3E, 0x60, 0x05,
644 0x85, 0x3F, 0x39, 0x80, 0x03, 0x85, 0x39, 0x39,
645/*12C0*/0x8F, 0x3A, 0x12, 0x07, 0xA8, 0xE5, 0x3E, 0x12,
646 0x07, 0x53, 0xE5, 0x3F, 0xF0, 0x22, 0x80, 0x3B,
647/*12D0*/0xE5, 0x65, 0x45, 0x64, 0x70, 0x11, 0x12, 0x07,
648 0x5F, 0x40, 0x05, 0x12, 0x08, 0x9E, 0x80, 0x1F,
649/*12E0*/0x12, 0x07, 0x3E, 0xE5, 0x41, 0xF0, 0x22, 0xE5,
650 0x3C, 0xC3, 0x95, 0x38, 0x40, 0x1D, 0x85, 0x3C,
651/*12F0*/0x38, 0xE5, 0x3C, 0x60, 0x05, 0x85, 0x3D, 0x39,
652 0x80, 0x03, 0x85, 0x39, 0x39, 0x8F, 0x3A, 0x12,
653/*1300*/0x07, 0xA8, 0xE5, 0x3C, 0x12, 0x07, 0x53, 0xE5,
654 0x3D, 0xF0, 0x22, 0x12, 0x07, 0x9F, 0xE5, 0x38,
655/*1310*/0x12, 0x07, 0x53, 0xE5, 0x39, 0xF0, 0x22, 0x8C,
656 0x63, 0x8D, 0x64, 0x12, 0x08, 0xDA, 0x40, 0x3C,
657/*1320*/0xE5, 0x64, 0x45, 0x63, 0x70, 0x10, 0x12, 0x09,
658 0x04, 0xC3, 0xE5, 0x3E, 0x12, 0x07, 0x69, 0x40,
659/*1330*/0x3B, 0x12, 0x08, 0x95, 0x80, 0x18, 0xE5, 0x3E,
660 0xC3, 0x95, 0x38, 0x40, 0x1D, 0x85, 0x3E, 0x38,
661/*1340*/0xE5, 0x3E, 0x60, 0x05, 0x85, 0x3F, 0x39, 0x80,
662 0x03, 0x85, 0x39, 0x39, 0x8F, 0x3A, 0x12, 0x07,
663/*1350*/0xA8, 0xE5, 0x3E, 0x12, 0x07, 0x53, 0xE5, 0x3F,
664 0xF0, 0x22, 0x80, 0x3B, 0xE5, 0x64, 0x45, 0x63,
665/*1360*/0x70, 0x11, 0x12, 0x07, 0x5F, 0x40, 0x05, 0x12,
666 0x08, 0x9E, 0x80, 0x1F, 0x12, 0x07, 0x3E, 0xE5,
667/*1370*/0x41, 0xF0, 0x22, 0xE5, 0x3C, 0xC3, 0x95, 0x38,
668 0x40, 0x1D, 0x85, 0x3C, 0x38, 0xE5, 0x3C, 0x60,
669/*1380*/0x05, 0x85, 0x3D, 0x39, 0x80, 0x03, 0x85, 0x39,
670 0x39, 0x8F, 0x3A, 0x12, 0x07, 0xA8, 0xE5, 0x3C,
671/*1390*/0x12, 0x07, 0x53, 0xE5, 0x3D, 0xF0, 0x22, 0x12,
672 0x07, 0x9F, 0xE5, 0x38, 0x12, 0x07, 0x53, 0xE5,
673/*13A0*/0x39, 0xF0, 0x22, 0xE5, 0x0D, 0xFE, 0xE5, 0x08,
674 0x8E, 0x54, 0x44, 0x05, 0xF5, 0x55, 0x75, 0x15,
675/*13B0*/0x0F, 0xF5, 0x82, 0x12, 0x0E, 0x7A, 0x12, 0x17,
676 0xA3, 0x20, 0x31, 0x05, 0x75, 0x15, 0x03, 0x80,
677/*13C0*/0x03, 0x75, 0x15, 0x0B, 0xE5, 0x0A, 0xC3, 0x94,
678 0x01, 0x50, 0x38, 0x12, 0x14, 0x20, 0x20, 0x31,
679/*13D0*/0x06, 0x05, 0x15, 0x05, 0x15, 0x80, 0x04, 0x15,
680 0x15, 0x15, 0x15, 0xE5, 0x0A, 0xC3, 0x94, 0x01,
681/*13E0*/0x50, 0x21, 0x12, 0x14, 0x20, 0x20, 0x31, 0x04,
682 0x05, 0x15, 0x80, 0x02, 0x15, 0x15, 0xE5, 0x0A,
683/*13F0*/0xC3, 0x94, 0x01, 0x50, 0x0E, 0x12, 0x0E, 0x77,
684 0x12, 0x17, 0xA3, 0x20, 0x31, 0x05, 0x05, 0x15,
685/*1400*/0x12, 0x0E, 0x77, 0xE5, 0x15, 0xB4, 0x08, 0x04,
686 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5, 0x15,
687/*1410*/0xB4, 0x07, 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E,
688 0x00, 0xEE, 0x4F, 0x60, 0x02, 0x05, 0x7F, 0x22,
689/*1420*/0x85, 0x55, 0x82, 0x85, 0x54, 0x83, 0xE5, 0x15,
690 0xF0, 0x12, 0x17, 0xA3, 0x22, 0x12, 0x07, 0x2A,
691/*1430*/0x75, 0x83, 0xAE, 0x74, 0xFF, 0x12, 0x07, 0x29,
692 0xE0, 0x54, 0x1A, 0xF5, 0x34, 0xE0, 0xC4, 0x13,
693/*1440*/0x54, 0x07, 0xF5, 0x35, 0x24, 0xFE, 0x60, 0x24,
694 0x24, 0xFE, 0x60, 0x3C, 0x24, 0x04, 0x70, 0x63,
695/*1450*/0x75, 0x31, 0x2D, 0xE5, 0x08, 0xFD, 0x74, 0xB6,
696 0x12, 0x07, 0x92, 0x74, 0xBC, 0x90, 0x07, 0x22,
697/*1460*/0x12, 0x07, 0x95, 0x74, 0x90, 0x12, 0x07, 0xB3,
698 0x74, 0x92, 0x80, 0x3C, 0x75, 0x31, 0x3A, 0xE5,
699/*1470*/0x08, 0xFD, 0x74, 0xBA, 0x12, 0x07, 0x92, 0x74,
700 0xC0, 0x90, 0x07, 0x22, 0x12, 0x07, 0xB6, 0x74,
701/*1480*/0xC4, 0x12, 0x07, 0xB3, 0x74, 0xC8, 0x80, 0x20,
702 0x75, 0x31, 0x35, 0xE5, 0x08, 0xFD, 0x74, 0xB8,
703/*1490*/0x12, 0x07, 0x92, 0x74, 0xBE, 0xFF, 0xED, 0x44,
704 0x07, 0x90, 0x07, 0x22, 0xCF, 0xF0, 0xA3, 0xEF,
705/*14A0*/0xF0, 0x74, 0xC2, 0x12, 0x07, 0xB3, 0x74, 0xC6,
706 0xFF, 0xED, 0x44, 0x07, 0xA3, 0xCF, 0xF0, 0xA3,
707/*14B0*/0xEF, 0xF0, 0x22, 0x75, 0x34, 0x01, 0x22, 0x8E,
708 0x58, 0x8F, 0x59, 0x8C, 0x5A, 0x8D, 0x5B, 0x8A,
709/*14C0*/0x5C, 0x8B, 0x5D, 0x75, 0x5E, 0x01, 0xE4, 0xF5,
710 0x5F, 0x12, 0x1E, 0xA5, 0x85, 0x59, 0x5E, 0xD3,
711/*14D0*/0xE5, 0x5E, 0x95, 0x5B, 0xE5, 0x5A, 0x12, 0x07,
712 0x6B, 0x50, 0x57, 0xE5, 0x5D, 0x45, 0x5C, 0x70,
713/*14E0*/0x30, 0x12, 0x07, 0x2A, 0x75, 0x83, 0x92, 0xE5,
714 0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC6, 0xE5,
715/*14F0*/0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC8, 0xE5,
716 0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0x90, 0xE5,
717/*1500*/0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC2, 0xE5,
718 0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC4, 0x80,
719/*1510*/0x03, 0x12, 0x07, 0x32, 0xE5, 0x5E, 0xF0, 0xAF,
720 0x5F, 0x7E, 0x00, 0xAD, 0x5D, 0xAC, 0x5C, 0x12,
721/*1520*/0x04, 0x44, 0xAF, 0x5E, 0x7E, 0x00, 0xAD, 0x5D,
722 0xAC, 0x5C, 0x12, 0x0B, 0xD1, 0x05, 0x5E, 0x02,
723/*1530*/0x14, 0xCF, 0xAB, 0x5D, 0xAA, 0x5C, 0xAD, 0x5B,
724 0xAC, 0x5A, 0xAF, 0x59, 0xAE, 0x58, 0x02, 0x1B,
725/*1540*/0xFB, 0x8C, 0x5C, 0x8D, 0x5D, 0x8A, 0x5E, 0x8B,
726 0x5F, 0x75, 0x60, 0x01, 0xE4, 0xF5, 0x61, 0xF5,
727/*1550*/0x62, 0xF5, 0x63, 0x12, 0x1E, 0xA5, 0x8F, 0x60,
728 0xD3, 0xE5, 0x60, 0x95, 0x5D, 0xE5, 0x5C, 0x12,
729/*1560*/0x07, 0x6B, 0x50, 0x61, 0xE5, 0x5F, 0x45, 0x5E,
730 0x70, 0x27, 0x12, 0x07, 0x2A, 0x75, 0x83, 0xB6,
731/*1570*/0xE5, 0x60, 0x12, 0x07, 0x29, 0x75, 0x83, 0xB8,
732 0xE5, 0x60, 0x12, 0x07, 0x29, 0x75, 0x83, 0xBA,
733/*1580*/0xE5, 0x60, 0xF0, 0xAF, 0x61, 0x7E, 0x00, 0xE5,
734 0x62, 0x12, 0x08, 0x7A, 0x12, 0x0A, 0xFF, 0x80,
735/*1590*/0x19, 0x90, 0x07, 0x24, 0x12, 0x07, 0x35, 0xE5,
736 0x60, 0x12, 0x07, 0x29, 0x75, 0x83, 0x8E, 0xE4,
737/*15A0*/0x12, 0x07, 0x29, 0x74, 0x01, 0x12, 0x07, 0x29,
738 0xE4, 0xF0, 0xAF, 0x63, 0x7E, 0x00, 0xAD, 0x5F,
739/*15B0*/0xAC, 0x5E, 0x12, 0x04, 0x44, 0xAF, 0x60, 0x7E,
740 0x00, 0xAD, 0x5F, 0xAC, 0x5E, 0x12, 0x12, 0x8B,
741/*15C0*/0x05, 0x60, 0x02, 0x15, 0x58, 0x22, 0x90, 0x11,
742 0x4D, 0xE4, 0x93, 0x90, 0x07, 0x2E, 0xF0, 0x12,
743/*15D0*/0x08, 0x1F, 0x75, 0x83, 0xAE, 0xE0, 0x54, 0x1A,
744 0xF5, 0x34, 0x70, 0x67, 0xEF, 0x44, 0x07, 0xF5,
745/*15E0*/0x82, 0x75, 0x83, 0xCE, 0xE0, 0xFF, 0x13, 0x13,
746 0x13, 0x54, 0x07, 0xF5, 0x36, 0x54, 0x0F, 0xD3,
747/*15F0*/0x94, 0x00, 0x40, 0x06, 0x12, 0x14, 0x2D, 0x12,
748 0x1B, 0xA9, 0xE5, 0x36, 0x54, 0x0F, 0x24, 0xFE,
749/*1600*/0x60, 0x0C, 0x14, 0x60, 0x0C, 0x14, 0x60, 0x19,
750 0x24, 0x03, 0x70, 0x37, 0x80, 0x10, 0x02, 0x1E,
751/*1610*/0x91, 0x12, 0x1E, 0x91, 0x12, 0x07, 0x2A, 0x75,
752 0x83, 0xCE, 0xE0, 0x54, 0xEF, 0xF0, 0x02, 0x1D,
753/*1620*/0xAE, 0x12, 0x10, 0x14, 0xE4, 0xF5, 0x55, 0x12,
754 0x1D, 0x85, 0x05, 0x55, 0xE5, 0x55, 0xC3, 0x94,
755/*1630*/0x05, 0x40, 0xF4, 0x12, 0x07, 0x2A, 0x75, 0x83,
756 0xCE, 0xE0, 0x54, 0xC7, 0x12, 0x07, 0x29, 0xE0,
757/*1640*/0x44, 0x08, 0xF0, 0x22, 0xE4, 0xF5, 0x58, 0xF5,
758 0x59, 0xAF, 0x08, 0xEF, 0x44, 0x07, 0xF5, 0x82,
759/*1650*/0x75, 0x83, 0xD0, 0xE0, 0xFD, 0xC4, 0x54, 0x0F,
760 0xF5, 0x5A, 0xEF, 0x44, 0x07, 0xF5, 0x82, 0x75,
761/*1660*/0x83, 0x80, 0x74, 0x01, 0xF0, 0x12, 0x08, 0x21,
762 0x75, 0x83, 0x82, 0xE5, 0x45, 0xF0, 0xEF, 0x44,
763/*1670*/0x07, 0xF5, 0x82, 0x75, 0x83, 0x8A, 0x74, 0xFF,
764 0xF0, 0x12, 0x1A, 0x4D, 0x12, 0x07, 0x2A, 0x75,
765/*1680*/0x83, 0xBC, 0xE0, 0x54, 0xEF, 0x12, 0x07, 0x29,
766 0x75, 0x83, 0xBE, 0xE0, 0x54, 0xEF, 0x12, 0x07,
767/*1690*/0x29, 0x75, 0x83, 0xC0, 0xE0, 0x54, 0xEF, 0x12,
768 0x07, 0x29, 0x75, 0x83, 0xBC, 0xE0, 0x44, 0x10,
769/*16A0*/0x12, 0x07, 0x29, 0x75, 0x83, 0xBE, 0xE0, 0x44,
770 0x10, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC0, 0xE0,
771/*16B0*/0x44, 0x10, 0xF0, 0xAF, 0x58, 0xE5, 0x59, 0x12,
772 0x08, 0x78, 0x02, 0x0A, 0xFF, 0xE4, 0xF5, 0x58,
773/*16C0*/0x7D, 0x01, 0xF5, 0x59, 0xAF, 0x35, 0xFE, 0xFC,
774 0x12, 0x09, 0x15, 0x12, 0x07, 0x2A, 0x75, 0x83,
775/*16D0*/0xB6, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83,
776 0xB8, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83,
777/*16E0*/0xBA, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83,
778 0xBC, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83,
779/*16F0*/0xBE, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83,
780 0xC0, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83,
781/*1700*/0x90, 0xE4, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC2,
782 0xE4, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC4, 0xE4,
783/*1710*/0x12, 0x07, 0x29, 0x75, 0x83, 0x92, 0xE4, 0x12,
784 0x07, 0x29, 0x75, 0x83, 0xC6, 0xE4, 0x12, 0x07,
785/*1720*/0x29, 0x75, 0x83, 0xC8, 0xE4, 0xF0, 0xAF, 0x58,
786 0xFE, 0xE5, 0x59, 0x12, 0x08, 0x7A, 0x02, 0x0A,
787/*1730*/0xFF, 0xE5, 0xE2, 0x30, 0xE4, 0x6C, 0xE5, 0xE7,
788 0x54, 0xC0, 0x64, 0x40, 0x70, 0x64, 0xE5, 0x09,
789/*1740*/0xC4, 0x54, 0x30, 0xFE, 0xE5, 0x08, 0x25, 0xE0,
790 0x25, 0xE0, 0x54, 0xC0, 0x4E, 0xFE, 0xEF, 0x54,
791/*1750*/0x3F, 0x4E, 0xFD, 0xE5, 0x2B, 0xAE, 0x2A, 0x78,
792 0x02, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9,
793/*1760*/0xF5, 0x82, 0x8E, 0x83, 0xED, 0xF0, 0xE5, 0x2B,
794 0xAE, 0x2A, 0x78, 0x02, 0xC3, 0x33, 0xCE, 0x33,
795/*1770*/0xCE, 0xD8, 0xF9, 0xFF, 0xF5, 0x82, 0x8E, 0x83,
796 0xA3, 0xE5, 0xFE, 0xF0, 0x8F, 0x82, 0x8E, 0x83,
797/*1780*/0xA3, 0xA3, 0xE5, 0xFD, 0xF0, 0x8F, 0x82, 0x8E,
798 0x83, 0xA3, 0xA3, 0xA3, 0xE5, 0xFC, 0xF0, 0xC3,
799/*1790*/0xE5, 0x2B, 0x94, 0xFA, 0xE5, 0x2A, 0x94, 0x00,
800 0x50, 0x08, 0x05, 0x2B, 0xE5, 0x2B, 0x70, 0x02,
801/*17A0*/0x05, 0x2A, 0x22, 0xE4, 0xFF, 0xE4, 0xF5, 0x58,
802 0xF5, 0x56, 0xF5, 0x57, 0x74, 0x82, 0xFC, 0x12,
803/*17B0*/0x0E, 0x04, 0x8C, 0x83, 0xE0, 0xF5, 0x10, 0x54,
804 0x7F, 0xF0, 0xE5, 0x10, 0x44, 0x80, 0x12, 0x0E,
805/*17C0*/0x98, 0xED, 0xF0, 0x7E, 0x0A, 0x12, 0x0E, 0x04,
806 0x75, 0x83, 0xA0, 0xE0, 0x20, 0xE0, 0x26, 0xDE,
807/*17D0*/0xF4, 0x05, 0x57, 0xE5, 0x57, 0x70, 0x02, 0x05,
808 0x56, 0xE5, 0x14, 0x24, 0x01, 0xFD, 0xE4, 0x33,
809/*17E0*/0xFC, 0xD3, 0xE5, 0x57, 0x9D, 0xE5, 0x56, 0x9C,
810 0x40, 0xD9, 0xE5, 0x0A, 0x94, 0x20, 0x50, 0x02,
811/*17F0*/0x05, 0x0A, 0x43, 0xE1, 0x08, 0xC2, 0x31, 0x12,
812 0x0E, 0x04, 0x75, 0x83, 0xA6, 0xE0, 0x55, 0x12,
813/*1800*/0x65, 0x12, 0x70, 0x03, 0xD2, 0x31, 0x22, 0xC2,
814 0x31, 0x22, 0x90, 0x07, 0x26, 0xE0, 0xFA, 0xA3,
815/*1810*/0xE0, 0xF5, 0x82, 0x8A, 0x83, 0xE0, 0xF5, 0x41,
816 0xE5, 0x39, 0xC3, 0x95, 0x41, 0x40, 0x26, 0xE5,
817/*1820*/0x39, 0x95, 0x41, 0xC3, 0x9F, 0xEE, 0x12, 0x07,
818 0x6B, 0x40, 0x04, 0x7C, 0x01, 0x80, 0x02, 0x7C,
819/*1830*/0x00, 0xE5, 0x41, 0x64, 0x3F, 0x60, 0x04, 0x7B,
820 0x01, 0x80, 0x02, 0x7B, 0x00, 0xEC, 0x5B, 0x60,
821/*1840*/0x29, 0x05, 0x41, 0x80, 0x28, 0xC3, 0xE5, 0x41,
822 0x95, 0x39, 0xC3, 0x9F, 0xEE, 0x12, 0x07, 0x6B,
823/*1850*/0x40, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00,
824 0xE5, 0x41, 0x60, 0x04, 0x7E, 0x01, 0x80, 0x02,
825/*1860*/0x7E, 0x00, 0xEF, 0x5E, 0x60, 0x04, 0x15, 0x41,
826 0x80, 0x03, 0x85, 0x39, 0x41, 0x85, 0x3A, 0x40,
827/*1870*/0x22, 0xE5, 0xE2, 0x30, 0xE4, 0x60, 0xE5, 0xE1,
828 0x30, 0xE2, 0x5B, 0xE5, 0x09, 0x70, 0x04, 0x7F,
829/*1880*/0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5, 0x08, 0x70,
830 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE,
831/*1890*/0x5F, 0x60, 0x43, 0x53, 0xF9, 0xF8, 0xE5, 0xE2,
832 0x30, 0xE4, 0x3B, 0xE5, 0xE1, 0x30, 0xE2, 0x2E,
833/*18A0*/0x43, 0xFA, 0x02, 0x53, 0xFA, 0xFB, 0xE4, 0xF5,
834 0x10, 0x90, 0x94, 0x70, 0xE5, 0x10, 0xF0, 0xE5,
835/*18B0*/0xE1, 0x30, 0xE2, 0xE7, 0x90, 0x94, 0x70, 0xE0,
836 0x65, 0x10, 0x60, 0x03, 0x43, 0xFA, 0x04, 0x05,
837/*18C0*/0x10, 0x90, 0x94, 0x70, 0xE5, 0x10, 0xF0, 0x70,
838 0xE6, 0x12, 0x00, 0x06, 0x80, 0xE1, 0x53, 0xFA,
839/*18D0*/0xFD, 0x53, 0xFA, 0xFB, 0x80, 0xC0, 0x22, 0x8F,
840 0x54, 0x12, 0x00, 0x06, 0xE5, 0xE1, 0x30, 0xE0,
841/*18E0*/0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5,
842 0x7E, 0xD3, 0x94, 0x05, 0x40, 0x04, 0x7E, 0x01,
843/*18F0*/0x80, 0x02, 0x7E, 0x00, 0xEE, 0x4F, 0x60, 0x3D,
844 0x85, 0x54, 0x11, 0xE5, 0xE2, 0x20, 0xE1, 0x32,
845/*1900*/0x74, 0xCE, 0x12, 0x1A, 0x05, 0x30, 0xE7, 0x04,
846 0x7D, 0x01, 0x80, 0x02, 0x7D, 0x00, 0x8F, 0x82,
847/*1910*/0x8E, 0x83, 0xE0, 0x30, 0xE6, 0x04, 0x7F, 0x01,
848 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x5D, 0x70, 0x15,
849/*1920*/0x12, 0x15, 0xC6, 0x74, 0xCE, 0x12, 0x1A, 0x05,
850 0x30, 0xE6, 0x07, 0xE0, 0x44, 0x80, 0xF0, 0x43,
851/*1930*/0xF9, 0x80, 0x12, 0x18, 0x71, 0x22, 0x12, 0x0E,
852 0x44, 0xE5, 0x16, 0x25, 0xE0, 0x25, 0xE0, 0x24,
853/*1940*/0xB0, 0xF5, 0x82, 0xE4, 0x34, 0x1A, 0xF5, 0x83,
854 0xE4, 0x93, 0xF5, 0x0F, 0xE5, 0x16, 0x25, 0xE0,
855/*1950*/0x25, 0xE0, 0x24, 0xB1, 0xF5, 0x82, 0xE4, 0x34,
856 0x1A, 0xF5, 0x83, 0xE4, 0x93, 0xF5, 0x0E, 0x12,
857/*1960*/0x0E, 0x65, 0xF5, 0x10, 0xE5, 0x0F, 0x54, 0xF0,
858 0x12, 0x0E, 0x17, 0x75, 0x83, 0x8C, 0xEF, 0xF0,
859/*1970*/0xE5, 0x0F, 0x30, 0xE0, 0x0C, 0x12, 0x0E, 0x04,
860 0x75, 0x83, 0x86, 0xE0, 0x44, 0x40, 0xF0, 0x80,
861/*1980*/0x0A, 0x12, 0x0E, 0x04, 0x75, 0x83, 0x86, 0xE0,
862 0x54, 0xBF, 0xF0, 0x12, 0x0E, 0x91, 0x75, 0x83,
863/*1990*/0x82, 0xE5, 0x0E, 0xF0, 0x22, 0x7F, 0x05, 0x12,
864 0x17, 0x31, 0x12, 0x0E, 0x04, 0x12, 0x0E, 0x33,
865/*19A0*/0x74, 0x02, 0xF0, 0x74, 0x8E, 0xFE, 0x12, 0x0E,
866 0x04, 0x12, 0x0E, 0x0B, 0xEF, 0xF0, 0x75, 0x15,
867/*19B0*/0x70, 0x12, 0x0F, 0xF7, 0x20, 0x34, 0x05, 0x75,
868 0x15, 0x10, 0x80, 0x03, 0x75, 0x15, 0x50, 0x12,
869/*19C0*/0x0F, 0xF7, 0x20, 0x34, 0x04, 0x74, 0x10, 0x80,
870 0x02, 0x74, 0xF0, 0x25, 0x15, 0xF5, 0x15, 0x12,
871/*19D0*/0x0E, 0x21, 0xEF, 0xF0, 0x12, 0x10, 0x91, 0x20,
872 0x34, 0x17, 0xE5, 0x15, 0x64, 0x30, 0x60, 0x0C,
873/*19E0*/0x74, 0x10, 0x25, 0x15, 0xF5, 0x15, 0xB4, 0x80,
874 0x03, 0xE4, 0xF5, 0x15, 0x12, 0x0E, 0x21, 0xEF,
875/*19F0*/0xF0, 0x22, 0xF0, 0xE5, 0x0B, 0x25, 0xE0, 0x25,
876 0xE0, 0x24, 0x82, 0xF5, 0x82, 0xE4, 0x34, 0x07,
877/*1A00*/0xF5, 0x83, 0x22, 0x74, 0x88, 0xFE, 0xE5, 0x08,
878 0x44, 0x07, 0xFF, 0xF5, 0x82, 0x8E, 0x83, 0xE0,
879/*1A10*/0x22, 0xF0, 0xE5, 0x08, 0x44, 0x07, 0xF5, 0x82,
880 0x22, 0xF0, 0xE0, 0x54, 0xC0, 0x8F, 0x82, 0x8E,
881/*1A20*/0x83, 0xF0, 0x22, 0xEF, 0x44, 0x07, 0xF5, 0x82,
882 0x75, 0x83, 0x86, 0xE0, 0x54, 0x10, 0xD3, 0x94,
883/*1A30*/0x00, 0x22, 0xF0, 0x90, 0x07, 0x15, 0xE0, 0x04,
884 0xF0, 0x22, 0x44, 0x06, 0xF5, 0x82, 0x75, 0x83,
885/*1A40*/0x9E, 0xE0, 0x22, 0xFE, 0xEF, 0x44, 0x07, 0xF5,
886 0x82, 0x8E, 0x83, 0xE0, 0x22, 0xE4, 0x90, 0x07,
887/*1A50*/0x2A, 0xF0, 0xA3, 0xF0, 0x12, 0x07, 0x2A, 0x75,
888 0x83, 0x82, 0xE0, 0x54, 0x7F, 0x12, 0x07, 0x29,
889/*1A60*/0xE0, 0x44, 0x80, 0xF0, 0x12, 0x10, 0xFC, 0x12,
890 0x08, 0x1F, 0x75, 0x83, 0xA0, 0xE0, 0x20, 0xE0,
891/*1A70*/0x1A, 0x90, 0x07, 0x2B, 0xE0, 0x04, 0xF0, 0x70,
892 0x06, 0x90, 0x07, 0x2A, 0xE0, 0x04, 0xF0, 0x90,
893/*1A80*/0x07, 0x2A, 0xE0, 0xB4, 0x10, 0xE1, 0xA3, 0xE0,
894 0xB4, 0x00, 0xDC, 0xEE, 0x44, 0xA6, 0xFC, 0xEF,
895/*1A90*/0x44, 0x07, 0xF5, 0x82, 0x8C, 0x83, 0xE0, 0xF5,
896 0x32, 0xEE, 0x44, 0xA8, 0xFE, 0xEF, 0x44, 0x07,
897/*1AA0*/0xF5, 0x82, 0x8E, 0x83, 0xE0, 0xF5, 0x33, 0x22,
898 0x01, 0x20, 0x11, 0x00, 0x04, 0x20, 0x00, 0x90,
899/*1AB0*/0x00, 0x20, 0x0F, 0x92, 0x00, 0x21, 0x0F, 0x94,
900 0x00, 0x22, 0x0F, 0x96, 0x00, 0x23, 0x0F, 0x98,
901/*1AC0*/0x00, 0x24, 0x0F, 0x9A, 0x00, 0x25, 0x0F, 0x9C,
902 0x00, 0x26, 0x0F, 0x9E, 0x00, 0x27, 0x0F, 0xA0,
903/*1AD0*/0x01, 0x20, 0x01, 0xA2, 0x01, 0x21, 0x01, 0xA4,
904 0x01, 0x22, 0x01, 0xA6, 0x01, 0x23, 0x01, 0xA8,
905/*1AE0*/0x01, 0x24, 0x01, 0xAA, 0x01, 0x25, 0x01, 0xAC,
906 0x01, 0x26, 0x01, 0xAE, 0x01, 0x27, 0x01, 0xB0,
907/*1AF0*/0x01, 0x28, 0x01, 0xB4, 0x00, 0x28, 0x0F, 0xB6,
908 0x40, 0x28, 0x0F, 0xB8, 0x61, 0x28, 0x01, 0xCB,
909/*1B00*/0xEF, 0xCB, 0xCA, 0xEE, 0xCA, 0x7F, 0x01, 0xE4,
910 0xFD, 0xEB, 0x4A, 0x70, 0x24, 0xE5, 0x08, 0xF5,
911/*1B10*/0x82, 0x74, 0xB6, 0x12, 0x08, 0x29, 0xE5, 0x08,
912 0xF5, 0x82, 0x74, 0xB8, 0x12, 0x08, 0x29, 0xE5,
913/*1B20*/0x08, 0xF5, 0x82, 0x74, 0xBA, 0x12, 0x08, 0x29,
914 0x7E, 0x00, 0x7C, 0x00, 0x12, 0x0A, 0xFF, 0x80,
915/*1B30*/0x12, 0x90, 0x07, 0x26, 0x12, 0x07, 0x35, 0xE5,
916 0x41, 0xF0, 0x90, 0x07, 0x24, 0x12, 0x07, 0x35,
917/*1B40*/0xE5, 0x40, 0xF0, 0x12, 0x07, 0x2A, 0x75, 0x83,
918 0x8E, 0xE4, 0x12, 0x07, 0x29, 0x74, 0x01, 0x12,
919/*1B50*/0x07, 0x29, 0xE4, 0xF0, 0x22, 0xE4, 0xF5, 0x26,
920 0xF5, 0x27, 0x53, 0xE1, 0xFE, 0xF5, 0x2A, 0x75,
921/*1B60*/0x2B, 0x01, 0xF5, 0x08, 0x7F, 0x01, 0x12, 0x17,
922 0x31, 0x30, 0x30, 0x1C, 0x90, 0x1A, 0xA9, 0xE4,
923/*1B70*/0x93, 0xF5, 0x10, 0x90, 0x1F, 0xF9, 0xE4, 0x93,
924 0xF5, 0x10, 0x90, 0x00, 0x41, 0xE4, 0x93, 0xF5,
925/*1B80*/0x10, 0x90, 0x1E, 0xCA, 0xE4, 0x93, 0xF5, 0x10,
926 0x7F, 0x02, 0x12, 0x17, 0x31, 0x12, 0x0F, 0x54,
927/*1B90*/0x7F, 0x03, 0x12, 0x17, 0x31, 0x12, 0x00, 0x06,
928 0xE5, 0xE2, 0x30, 0xE7, 0x09, 0x12, 0x10, 0x00,
929/*1BA0*/0x30, 0x30, 0x03, 0x12, 0x11, 0x00, 0x02, 0x00,
930 0x47, 0x12, 0x08, 0x1F, 0x75, 0x83, 0xD0, 0xE0,
931/*1BB0*/0xC4, 0x54, 0x0F, 0xFD, 0x75, 0x43, 0x01, 0x75,
932 0x44, 0xFF, 0x12, 0x08, 0xAA, 0x74, 0x04, 0xF0,
933/*1BC0*/0x75, 0x3B, 0x01, 0xED, 0x14, 0x60, 0x0C, 0x14,
934 0x60, 0x0B, 0x14, 0x60, 0x0F, 0x24, 0x03, 0x70,
935/*1BD0*/0x0B, 0x80, 0x09, 0x80, 0x00, 0x12, 0x08, 0xA7,
936 0x04, 0xF0, 0x80, 0x06, 0x12, 0x08, 0xA7, 0x74,
937/*1BE0*/0x04, 0xF0, 0xEE, 0x44, 0x82, 0xFE, 0xEF, 0x44,
938 0x07, 0xF5, 0x82, 0x8E, 0x83, 0xE5, 0x45, 0x12,
939/*1BF0*/0x08, 0xBE, 0x75, 0x83, 0x82, 0xE5, 0x31, 0xF0,
940 0x02, 0x11, 0x4C, 0x8E, 0x60, 0x8F, 0x61, 0x12,
941/*1C00*/0x1E, 0xA5, 0xE4, 0xFF, 0xCE, 0xED, 0xCE, 0xEE,
942 0xD3, 0x95, 0x61, 0xE5, 0x60, 0x12, 0x07, 0x6B,
943/*1C10*/0x40, 0x39, 0x74, 0x20, 0x2E, 0xF5, 0x82, 0xE4,
944 0x34, 0x03, 0xF5, 0x83, 0xE0, 0x70, 0x03, 0xFF,
945/*1C20*/0x80, 0x26, 0x12, 0x08, 0xE2, 0xFD, 0xC3, 0x9F,
946 0x40, 0x1E, 0xCF, 0xED, 0xCF, 0xEB, 0x4A, 0x70,
947/*1C30*/0x0B, 0x8D, 0x42, 0x12, 0x08, 0xEE, 0xF5, 0x41,
948 0x8E, 0x40, 0x80, 0x0C, 0x12, 0x08, 0xE2, 0xF5,
949/*1C40*/0x38, 0x12, 0x08, 0xEE, 0xF5, 0x39, 0x8E, 0x3A,
950 0x1E, 0x80, 0xBC, 0x22, 0x75, 0x58, 0x01, 0xE5,
951/*1C50*/0x35, 0x70, 0x0C, 0x12, 0x07, 0xCC, 0xE0, 0xF5,
952 0x4A, 0x12, 0x07, 0xD8, 0xE0, 0xF5, 0x4C, 0xE5,
953/*1C60*/0x35, 0xB4, 0x04, 0x0C, 0x12, 0x07, 0xE4, 0xE0,
954 0xF5, 0x4A, 0x12, 0x07, 0xF0, 0xE0, 0xF5, 0x4C,
955/*1C70*/0xE5, 0x35, 0xB4, 0x01, 0x04, 0x7F, 0x01, 0x80,
956 0x02, 0x7F, 0x00, 0xE5, 0x35, 0xB4, 0x02, 0x04,
957/*1C80*/0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x4F,
958 0x60, 0x0C, 0x12, 0x07, 0xFC, 0xE0, 0xF5, 0x4A,
959/*1C90*/0x12, 0x08, 0x08, 0xE0, 0xF5, 0x4C, 0x85, 0x41,
960 0x49, 0x85, 0x40, 0x4B, 0x22, 0x75, 0x5B, 0x01,
961/*1CA0*/0x90, 0x07, 0x24, 0x12, 0x07, 0x35, 0xE0, 0x54,
962 0x1F, 0xFF, 0xD3, 0x94, 0x02, 0x50, 0x04, 0x8F,
963/*1CB0*/0x58, 0x80, 0x05, 0xEF, 0x24, 0xFE, 0xF5, 0x58,
964 0xEF, 0xC3, 0x94, 0x18, 0x40, 0x05, 0x75, 0x59,
965/*1CC0*/0x18, 0x80, 0x04, 0xEF, 0x04, 0xF5, 0x59, 0x85,
966 0x43, 0x5A, 0xAF, 0x58, 0x7E, 0x00, 0xAD, 0x59,
967/*1CD0*/0x7C, 0x00, 0xAB, 0x5B, 0x7A, 0x00, 0x12, 0x15,
968 0x41, 0xAF, 0x5A, 0x7E, 0x00, 0x12, 0x18, 0x0A,
969/*1CE0*/0xAF, 0x5B, 0x7E, 0x00, 0x02, 0x1A, 0xFF, 0xE5,
970 0xE2, 0x30, 0xE7, 0x0E, 0x12, 0x10, 0x03, 0xC2,
971/*1CF0*/0x30, 0x30, 0x30, 0x03, 0x12, 0x10, 0xFF, 0x20,
972 0x33, 0x28, 0xE5, 0xE7, 0x30, 0xE7, 0x05, 0x12,
973/*1D00*/0x0E, 0xA2, 0x80, 0x0D, 0xE5, 0xFE, 0xC3, 0x94,
974 0x20, 0x50, 0x06, 0x12, 0x0E, 0xA2, 0x43, 0xF9,
975/*1D10*/0x08, 0xE5, 0xF2, 0x30, 0xE7, 0x03, 0x53, 0xF9,
976 0x7F, 0xE5, 0xF1, 0x54, 0x70, 0xD3, 0x94, 0x00,
977/*1D20*/0x50, 0xD8, 0x22, 0x12, 0x0E, 0x04, 0x75, 0x83,
978 0x80, 0xE4, 0xF0, 0xE5, 0x08, 0x44, 0x07, 0x12,
979/*1D30*/0x0D, 0xFD, 0x75, 0x83, 0x84, 0x12, 0x0E, 0x02,
980 0x75, 0x83, 0x86, 0x12, 0x0E, 0x02, 0x75, 0x83,
981/*1D40*/0x8C, 0xE0, 0x54, 0xF3, 0x12, 0x0E, 0x03, 0x75,
982 0x83, 0x8E, 0x12, 0x0E, 0x02, 0x75, 0x83, 0x94,
983/*1D50*/0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x12, 0x07, 0x2A,
984 0x75, 0x83, 0x8E, 0xE4, 0x12, 0x07, 0x29, 0x74,
985/*1D60*/0x01, 0x12, 0x07, 0x29, 0xE4, 0x12, 0x08, 0xBE,
986 0x75, 0x83, 0x8C, 0xE0, 0x44, 0x20, 0x12, 0x08,
987/*1D70*/0xBE, 0xE0, 0x54, 0xDF, 0xF0, 0x74, 0x84, 0x85,
988 0x08, 0x82, 0xF5, 0x83, 0xE0, 0x54, 0x7F, 0xF0,
989/*1D80*/0xE0, 0x44, 0x80, 0xF0, 0x22, 0x75, 0x56, 0x01,
990 0xE4, 0xFD, 0xF5, 0x57, 0xAF, 0x35, 0xFE, 0xFC,
991/*1D90*/0x12, 0x09, 0x15, 0x12, 0x1C, 0x9D, 0x12, 0x1E,
992 0x7A, 0x12, 0x1C, 0x4C, 0xAF, 0x57, 0x7E, 0x00,
993/*1DA0*/0xAD, 0x56, 0x7C, 0x00, 0x12, 0x04, 0x44, 0xAF,
994 0x56, 0x7E, 0x00, 0x02, 0x11, 0xEE, 0x75, 0x56,
995/*1DB0*/0x01, 0xE4, 0xFD, 0xF5, 0x57, 0xAF, 0x35, 0xFE,
996 0xFC, 0x12, 0x09, 0x15, 0x12, 0x1C, 0x9D, 0x12,
997/*1DC0*/0x1E, 0x7A, 0x12, 0x1C, 0x4C, 0xAF, 0x57, 0x7E,
998 0x00, 0xAD, 0x56, 0x7C, 0x00, 0x12, 0x04, 0x44,
999/*1DD0*/0xAF, 0x56, 0x7E, 0x00, 0x02, 0x11, 0xEE, 0xE4,
1000 0xF5, 0x16, 0x12, 0x0E, 0x44, 0xFE, 0xE5, 0x08,
1001/*1DE0*/0x44, 0x05, 0xFF, 0x12, 0x0E, 0x65, 0x8F, 0x82,
1002 0x8E, 0x83, 0xF0, 0x05, 0x16, 0xE5, 0x16, 0xC3,
1003/*1DF0*/0x94, 0x14, 0x40, 0xE6, 0xE5, 0x08, 0x12, 0x0E,
1004 0x2B, 0xE4, 0xF0, 0x22, 0xE4, 0xF5, 0x58, 0xF5,
1005/*1E00*/0x59, 0xF5, 0x5A, 0xFF, 0xFE, 0xAD, 0x58, 0xFC,
1006 0x12, 0x09, 0x15, 0x7F, 0x04, 0x7E, 0x00, 0xAD,
1007/*1E10*/0x58, 0x7C, 0x00, 0x12, 0x09, 0x15, 0x7F, 0x02,
1008 0x7E, 0x00, 0xAD, 0x58, 0x7C, 0x00, 0x02, 0x09,
1009/*1E20*/0x15, 0xE5, 0x3C, 0x25, 0x3E, 0xFC, 0xE5, 0x42,
1010 0x24, 0x00, 0xFB, 0xE4, 0x33, 0xFA, 0xEC, 0xC3,
1011/*1E30*/0x9B, 0xEA, 0x12, 0x07, 0x6B, 0x40, 0x0B, 0x8C,
1012 0x42, 0xE5, 0x3D, 0x25, 0x3F, 0xF5, 0x41, 0x8F,
1013/*1E40*/0x40, 0x22, 0x12, 0x09, 0x0B, 0x22, 0x74, 0x84,
1014 0xF5, 0x18, 0x85, 0x08, 0x19, 0x85, 0x19, 0x82,
1015/*1E50*/0x85, 0x18, 0x83, 0xE0, 0x54, 0x7F, 0xF0, 0xE0,
1016 0x44, 0x80, 0xF0, 0xE0, 0x44, 0x80, 0xF0, 0x22,
1017/*1E60*/0xEF, 0x4E, 0x70, 0x0B, 0x12, 0x07, 0x2A, 0x75,
1018 0x83, 0xD2, 0xE0, 0x54, 0xDF, 0xF0, 0x22, 0x12,
1019/*1E70*/0x07, 0x2A, 0x75, 0x83, 0xD2, 0xE0, 0x44, 0x20,
1020 0xF0, 0x22, 0x75, 0x58, 0x01, 0x90, 0x07, 0x26,
1021/*1E80*/0x12, 0x07, 0x35, 0xE0, 0x54, 0x3F, 0xF5, 0x41,
1022 0x12, 0x07, 0x32, 0xE0, 0x54, 0x3F, 0xF5, 0x40,
1023/*1E90*/0x22, 0x75, 0x56, 0x02, 0xE4, 0xF5, 0x57, 0x12,
1024 0x1D, 0xFC, 0xAF, 0x57, 0x7E, 0x00, 0xAD, 0x56,
1025/*1EA0*/0x7C, 0x00, 0x02, 0x04, 0x44, 0xE4, 0xF5, 0x42,
1026 0xF5, 0x41, 0xF5, 0x40, 0xF5, 0x38, 0xF5, 0x39,
1027/*1EB0*/0xF5, 0x3A, 0x22, 0xEF, 0x54, 0x07, 0xFF, 0xE5,
1028 0xF9, 0x54, 0xF8, 0x4F, 0xF5, 0xF9, 0x22, 0x7F,
1029/*1EC0*/0x01, 0xE4, 0xFE, 0x0F, 0x0E, 0xBE, 0xFF, 0xFB,
1030 0x22, 0x01, 0x20, 0x00, 0x01, 0x04, 0x20, 0x00,
1031/*1ED0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1032 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1033/*1EE0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1034 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1035/*1EF0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1036 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1037/*1F00*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1038 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1039/*1F10*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1040 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1041/*1F20*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1042 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1043/*1F30*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1044 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1045/*1F40*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1046 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1047/*1F50*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1048 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1049/*1F60*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1050 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1051/*1F70*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1052 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1053/*1F80*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1054 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1055/*1F90*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1056 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1057/*1FA0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1058 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1059/*1FB0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1060 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1061/*1FC0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1062 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1063/*1FD0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1064 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1065/*1FE0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1066 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1067/*1FF0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1068 0x01, 0x20, 0x11, 0x00, 0x04, 0x20, 0x00, 0x81
1069};
1070
1071int qib_sd7220_ib_load(struct qib_devdata *dd)
1072{
1073 return qib_sd7220_prog_ld(dd, IB_7220_SERDES, qib_sd7220_ib_img,
1074 sizeof(qib_sd7220_ib_img), 0);
1075}
1076
1077int qib_sd7220_ib_vfy(struct qib_devdata *dd)
1078{
1079 return qib_sd7220_prog_vfy(dd, IB_7220_SERDES, qib_sd7220_ib_img,
1080 sizeof(qib_sd7220_ib_img), 0);
1081}
diff --git a/drivers/infiniband/hw/qib/qib_tx.c b/drivers/infiniband/hw/qib/qib_tx.c
index f7eb1ddff5f3..af30232b6831 100644
--- a/drivers/infiniband/hw/qib/qib_tx.c
+++ b/drivers/infiniband/hw/qib/qib_tx.c
@@ -340,9 +340,13 @@ rescan:
340 if (i < dd->piobcnt2k) 340 if (i < dd->piobcnt2k)
341 buf = (u32 __iomem *)(dd->pio2kbase + 341 buf = (u32 __iomem *)(dd->pio2kbase +
342 i * dd->palign); 342 i * dd->palign);
343 else 343 else if (i < dd->piobcnt2k + dd->piobcnt4k || !dd->piovl15base)
344 buf = (u32 __iomem *)(dd->pio4kbase + 344 buf = (u32 __iomem *)(dd->pio4kbase +
345 (i - dd->piobcnt2k) * dd->align4k); 345 (i - dd->piobcnt2k) * dd->align4k);
346 else
347 buf = (u32 __iomem *)(dd->piovl15base +
348 (i - (dd->piobcnt2k + dd->piobcnt4k)) *
349 dd->align4k);
346 if (pbufnum) 350 if (pbufnum)
347 *pbufnum = i; 351 *pbufnum = i;
348 dd->upd_pio_shadow = 0; 352 dd->upd_pio_shadow = 0;
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_ethtool.c b/drivers/infiniband/ulp/ipoib/ipoib_ethtool.c
index 40e858492f90..1a1657c82edd 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_ethtool.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_ethtool.c
@@ -147,6 +147,11 @@ static void ipoib_get_ethtool_stats(struct net_device *dev,
147 data[index++] = priv->lro.lro_mgr.stats.no_desc; 147 data[index++] = priv->lro.lro_mgr.stats.no_desc;
148} 148}
149 149
150static int ipoib_set_flags(struct net_device *dev, u32 flags)
151{
152 return ethtool_op_set_flags(dev, flags, ETH_FLAG_LRO);
153}
154
150static const struct ethtool_ops ipoib_ethtool_ops = { 155static const struct ethtool_ops ipoib_ethtool_ops = {
151 .get_drvinfo = ipoib_get_drvinfo, 156 .get_drvinfo = ipoib_get_drvinfo,
152 .get_rx_csum = ipoib_get_rx_csum, 157 .get_rx_csum = ipoib_get_rx_csum,
@@ -154,7 +159,7 @@ static const struct ethtool_ops ipoib_ethtool_ops = {
154 .get_coalesce = ipoib_get_coalesce, 159 .get_coalesce = ipoib_get_coalesce,
155 .set_coalesce = ipoib_set_coalesce, 160 .set_coalesce = ipoib_set_coalesce,
156 .get_flags = ethtool_op_get_flags, 161 .get_flags = ethtool_op_get_flags,
157 .set_flags = ethtool_op_set_flags, 162 .set_flags = ipoib_set_flags,
158 .get_strings = ipoib_get_strings, 163 .get_strings = ipoib_get_strings,
159 .get_sset_count = ipoib_get_sset_count, 164 .get_sset_count = ipoib_get_sset_count,
160 .get_ethtool_stats = ipoib_get_ethtool_stats, 165 .get_ethtool_stats = ipoib_get_ethtool_stats,
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_main.c b/drivers/infiniband/ulp/ipoib/ipoib_main.c
index df3eb8c9fd96..b4b22576f12a 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_main.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_main.c
@@ -1163,7 +1163,7 @@ static ssize_t create_child(struct device *dev,
1163 1163
1164 return ret ? ret : count; 1164 return ret ? ret : count;
1165} 1165}
1166static DEVICE_ATTR(create_child, S_IWUGO, NULL, create_child); 1166static DEVICE_ATTR(create_child, S_IWUSR, NULL, create_child);
1167 1167
1168static ssize_t delete_child(struct device *dev, 1168static ssize_t delete_child(struct device *dev,
1169 struct device_attribute *attr, 1169 struct device_attribute *attr,
@@ -1183,7 +1183,7 @@ static ssize_t delete_child(struct device *dev,
1183 return ret ? ret : count; 1183 return ret ? ret : count;
1184 1184
1185} 1185}
1186static DEVICE_ATTR(delete_child, S_IWUGO, NULL, delete_child); 1186static DEVICE_ATTR(delete_child, S_IWUSR, NULL, delete_child);
1187 1187
1188int ipoib_add_pkey_attr(struct net_device *dev) 1188int ipoib_add_pkey_attr(struct net_device *dev)
1189{ 1189{
diff --git a/drivers/input/evdev.c b/drivers/input/evdev.c
index 2ee6c7a68bdc..054edf346e0b 100644
--- a/drivers/input/evdev.c
+++ b/drivers/input/evdev.c
@@ -10,7 +10,8 @@
10 10
11#define EVDEV_MINOR_BASE 64 11#define EVDEV_MINOR_BASE 64
12#define EVDEV_MINORS 32 12#define EVDEV_MINORS 32
13#define EVDEV_BUFFER_SIZE 64 13#define EVDEV_MIN_BUFFER_SIZE 64U
14#define EVDEV_BUF_PACKETS 8
14 15
15#include <linux/poll.h> 16#include <linux/poll.h>
16#include <linux/sched.h> 17#include <linux/sched.h>
@@ -23,7 +24,6 @@
23#include "input-compat.h" 24#include "input-compat.h"
24 25
25struct evdev { 26struct evdev {
26 int exist;
27 int open; 27 int open;
28 int minor; 28 int minor;
29 struct input_handle handle; 29 struct input_handle handle;
@@ -33,16 +33,18 @@ struct evdev {
33 spinlock_t client_lock; /* protects client_list */ 33 spinlock_t client_lock; /* protects client_list */
34 struct mutex mutex; 34 struct mutex mutex;
35 struct device dev; 35 struct device dev;
36 bool exist;
36}; 37};
37 38
38struct evdev_client { 39struct evdev_client {
39 struct input_event buffer[EVDEV_BUFFER_SIZE];
40 int head; 40 int head;
41 int tail; 41 int tail;
42 spinlock_t buffer_lock; /* protects access to buffer, head and tail */ 42 spinlock_t buffer_lock; /* protects access to buffer, head and tail */
43 struct fasync_struct *fasync; 43 struct fasync_struct *fasync;
44 struct evdev *evdev; 44 struct evdev *evdev;
45 struct list_head node; 45 struct list_head node;
46 int bufsize;
47 struct input_event buffer[];
46}; 48};
47 49
48static struct evdev *evdev_table[EVDEV_MINORS]; 50static struct evdev *evdev_table[EVDEV_MINORS];
@@ -52,11 +54,15 @@ static void evdev_pass_event(struct evdev_client *client,
52 struct input_event *event) 54 struct input_event *event)
53{ 55{
54 /* 56 /*
55 * Interrupts are disabled, just acquire the lock 57 * Interrupts are disabled, just acquire the lock.
58 * Make sure we don't leave with the client buffer
59 * "empty" by having client->head == client->tail.
56 */ 60 */
57 spin_lock(&client->buffer_lock); 61 spin_lock(&client->buffer_lock);
58 client->buffer[client->head++] = *event; 62 do {
59 client->head &= EVDEV_BUFFER_SIZE - 1; 63 client->buffer[client->head++] = *event;
64 client->head &= client->bufsize - 1;
65 } while (client->head == client->tail);
60 spin_unlock(&client->buffer_lock); 66 spin_unlock(&client->buffer_lock);
61 67
62 if (event->type == EV_SYN) 68 if (event->type == EV_SYN)
@@ -242,11 +248,21 @@ static int evdev_release(struct inode *inode, struct file *file)
242 return 0; 248 return 0;
243} 249}
244 250
251static unsigned int evdev_compute_buffer_size(struct input_dev *dev)
252{
253 unsigned int n_events =
254 max(dev->hint_events_per_packet * EVDEV_BUF_PACKETS,
255 EVDEV_MIN_BUFFER_SIZE);
256
257 return roundup_pow_of_two(n_events);
258}
259
245static int evdev_open(struct inode *inode, struct file *file) 260static int evdev_open(struct inode *inode, struct file *file)
246{ 261{
247 struct evdev *evdev; 262 struct evdev *evdev;
248 struct evdev_client *client; 263 struct evdev_client *client;
249 int i = iminor(inode) - EVDEV_MINOR_BASE; 264 int i = iminor(inode) - EVDEV_MINOR_BASE;
265 unsigned int bufsize;
250 int error; 266 int error;
251 267
252 if (i >= EVDEV_MINORS) 268 if (i >= EVDEV_MINORS)
@@ -263,12 +279,17 @@ static int evdev_open(struct inode *inode, struct file *file)
263 if (!evdev) 279 if (!evdev)
264 return -ENODEV; 280 return -ENODEV;
265 281
266 client = kzalloc(sizeof(struct evdev_client), GFP_KERNEL); 282 bufsize = evdev_compute_buffer_size(evdev->handle.dev);
283
284 client = kzalloc(sizeof(struct evdev_client) +
285 bufsize * sizeof(struct input_event),
286 GFP_KERNEL);
267 if (!client) { 287 if (!client) {
268 error = -ENOMEM; 288 error = -ENOMEM;
269 goto err_put_evdev; 289 goto err_put_evdev;
270 } 290 }
271 291
292 client->bufsize = bufsize;
272 spin_lock_init(&client->buffer_lock); 293 spin_lock_init(&client->buffer_lock);
273 client->evdev = evdev; 294 client->evdev = evdev;
274 evdev_attach_client(evdev, client); 295 evdev_attach_client(evdev, client);
@@ -334,7 +355,7 @@ static int evdev_fetch_next_event(struct evdev_client *client,
334 have_event = client->head != client->tail; 355 have_event = client->head != client->tail;
335 if (have_event) { 356 if (have_event) {
336 *event = client->buffer[client->tail++]; 357 *event = client->buffer[client->tail++];
337 client->tail &= EVDEV_BUFFER_SIZE - 1; 358 client->tail &= client->bufsize - 1;
338 } 359 }
339 360
340 spin_unlock_irq(&client->buffer_lock); 361 spin_unlock_irq(&client->buffer_lock);
@@ -382,10 +403,15 @@ static unsigned int evdev_poll(struct file *file, poll_table *wait)
382{ 403{
383 struct evdev_client *client = file->private_data; 404 struct evdev_client *client = file->private_data;
384 struct evdev *evdev = client->evdev; 405 struct evdev *evdev = client->evdev;
406 unsigned int mask;
385 407
386 poll_wait(file, &evdev->wait, wait); 408 poll_wait(file, &evdev->wait, wait);
387 return ((client->head == client->tail) ? 0 : (POLLIN | POLLRDNORM)) | 409
388 (evdev->exist ? 0 : (POLLHUP | POLLERR)); 410 mask = evdev->exist ? POLLOUT | POLLWRNORM : POLLHUP | POLLERR;
411 if (client->head != client->tail)
412 mask |= POLLIN | POLLRDNORM;
413
414 return mask;
389} 415}
390 416
391#ifdef CONFIG_COMPAT 417#ifdef CONFIG_COMPAT
@@ -665,6 +691,10 @@ static long evdev_do_ioctl(struct file *file, unsigned int cmd,
665 sizeof(struct input_absinfo)))) 691 sizeof(struct input_absinfo))))
666 return -EFAULT; 692 return -EFAULT;
667 693
694 /* We can't change number of reserved MT slots */
695 if (t == ABS_MT_SLOT)
696 return -EINVAL;
697
668 /* 698 /*
669 * Take event lock to ensure that we are not 699 * Take event lock to ensure that we are not
670 * changing device parameters in the middle 700 * changing device parameters in the middle
@@ -768,7 +798,7 @@ static void evdev_remove_chrdev(struct evdev *evdev)
768static void evdev_mark_dead(struct evdev *evdev) 798static void evdev_mark_dead(struct evdev *evdev)
769{ 799{
770 mutex_lock(&evdev->mutex); 800 mutex_lock(&evdev->mutex);
771 evdev->exist = 0; 801 evdev->exist = false;
772 mutex_unlock(&evdev->mutex); 802 mutex_unlock(&evdev->mutex);
773} 803}
774 804
@@ -817,7 +847,7 @@ static int evdev_connect(struct input_handler *handler, struct input_dev *dev,
817 init_waitqueue_head(&evdev->wait); 847 init_waitqueue_head(&evdev->wait);
818 848
819 dev_set_name(&evdev->dev, "event%d", minor); 849 dev_set_name(&evdev->dev, "event%d", minor);
820 evdev->exist = 1; 850 evdev->exist = true;
821 evdev->minor = minor; 851 evdev->minor = minor;
822 852
823 evdev->handle.dev = input_get_device(dev); 853 evdev->handle.dev = input_get_device(dev);
diff --git a/drivers/input/input.c b/drivers/input/input.c
index 9c79bd56b51a..e1243b4b32a5 100644
--- a/drivers/input/input.c
+++ b/drivers/input/input.c
@@ -33,25 +33,6 @@ MODULE_LICENSE("GPL");
33 33
34#define INPUT_DEVICES 256 34#define INPUT_DEVICES 256
35 35
36/*
37 * EV_ABS events which should not be cached are listed here.
38 */
39static unsigned int input_abs_bypass_init_data[] __initdata = {
40 ABS_MT_TOUCH_MAJOR,
41 ABS_MT_TOUCH_MINOR,
42 ABS_MT_WIDTH_MAJOR,
43 ABS_MT_WIDTH_MINOR,
44 ABS_MT_ORIENTATION,
45 ABS_MT_POSITION_X,
46 ABS_MT_POSITION_Y,
47 ABS_MT_TOOL_TYPE,
48 ABS_MT_BLOB_ID,
49 ABS_MT_TRACKING_ID,
50 ABS_MT_PRESSURE,
51 0
52};
53static unsigned long input_abs_bypass[BITS_TO_LONGS(ABS_CNT)];
54
55static LIST_HEAD(input_dev_list); 36static LIST_HEAD(input_dev_list);
56static LIST_HEAD(input_handler_list); 37static LIST_HEAD(input_handler_list);
57 38
@@ -181,6 +162,56 @@ static void input_stop_autorepeat(struct input_dev *dev)
181#define INPUT_PASS_TO_DEVICE 2 162#define INPUT_PASS_TO_DEVICE 2
182#define INPUT_PASS_TO_ALL (INPUT_PASS_TO_HANDLERS | INPUT_PASS_TO_DEVICE) 163#define INPUT_PASS_TO_ALL (INPUT_PASS_TO_HANDLERS | INPUT_PASS_TO_DEVICE)
183 164
165static int input_handle_abs_event(struct input_dev *dev,
166 unsigned int code, int *pval)
167{
168 bool is_mt_event;
169 int *pold;
170
171 if (code == ABS_MT_SLOT) {
172 /*
173 * "Stage" the event; we'll flush it later, when we
174 * get actiual touch data.
175 */
176 if (*pval >= 0 && *pval < dev->mtsize)
177 dev->slot = *pval;
178
179 return INPUT_IGNORE_EVENT;
180 }
181
182 is_mt_event = code >= ABS_MT_FIRST && code <= ABS_MT_LAST;
183
184 if (!is_mt_event) {
185 pold = &dev->abs[code];
186 } else if (dev->mt) {
187 struct input_mt_slot *mtslot = &dev->mt[dev->slot];
188 pold = &mtslot->abs[code - ABS_MT_FIRST];
189 } else {
190 /*
191 * Bypass filtering for multitouch events when
192 * not employing slots.
193 */
194 pold = NULL;
195 }
196
197 if (pold) {
198 *pval = input_defuzz_abs_event(*pval, *pold,
199 dev->absfuzz[code]);
200 if (*pold == *pval)
201 return INPUT_IGNORE_EVENT;
202
203 *pold = *pval;
204 }
205
206 /* Flush pending "slot" event */
207 if (is_mt_event && dev->slot != dev->abs[ABS_MT_SLOT]) {
208 dev->abs[ABS_MT_SLOT] = dev->slot;
209 input_pass_event(dev, EV_ABS, ABS_MT_SLOT, dev->slot);
210 }
211
212 return INPUT_PASS_TO_HANDLERS;
213}
214
184static void input_handle_event(struct input_dev *dev, 215static void input_handle_event(struct input_dev *dev,
185 unsigned int type, unsigned int code, int value) 216 unsigned int type, unsigned int code, int value)
186{ 217{
@@ -196,12 +227,12 @@ static void input_handle_event(struct input_dev *dev,
196 227
197 case SYN_REPORT: 228 case SYN_REPORT:
198 if (!dev->sync) { 229 if (!dev->sync) {
199 dev->sync = 1; 230 dev->sync = true;
200 disposition = INPUT_PASS_TO_HANDLERS; 231 disposition = INPUT_PASS_TO_HANDLERS;
201 } 232 }
202 break; 233 break;
203 case SYN_MT_REPORT: 234 case SYN_MT_REPORT:
204 dev->sync = 0; 235 dev->sync = false;
205 disposition = INPUT_PASS_TO_HANDLERS; 236 disposition = INPUT_PASS_TO_HANDLERS;
206 break; 237 break;
207 } 238 }
@@ -233,21 +264,9 @@ static void input_handle_event(struct input_dev *dev,
233 break; 264 break;
234 265
235 case EV_ABS: 266 case EV_ABS:
236 if (is_event_supported(code, dev->absbit, ABS_MAX)) { 267 if (is_event_supported(code, dev->absbit, ABS_MAX))
237 268 disposition = input_handle_abs_event(dev, code, &value);
238 if (test_bit(code, input_abs_bypass)) {
239 disposition = INPUT_PASS_TO_HANDLERS;
240 break;
241 }
242 269
243 value = input_defuzz_abs_event(value,
244 dev->abs[code], dev->absfuzz[code]);
245
246 if (dev->abs[code] != value) {
247 dev->abs[code] = value;
248 disposition = INPUT_PASS_TO_HANDLERS;
249 }
250 }
251 break; 270 break;
252 271
253 case EV_REL: 272 case EV_REL:
@@ -298,7 +317,7 @@ static void input_handle_event(struct input_dev *dev,
298 } 317 }
299 318
300 if (disposition != INPUT_IGNORE_EVENT && type != EV_SYN) 319 if (disposition != INPUT_IGNORE_EVENT && type != EV_SYN)
301 dev->sync = 0; 320 dev->sync = false;
302 321
303 if ((disposition & INPUT_PASS_TO_DEVICE) && dev->event) 322 if ((disposition & INPUT_PASS_TO_DEVICE) && dev->event)
304 dev->event(dev, type, code, value); 323 dev->event(dev, type, code, value);
@@ -528,12 +547,30 @@ void input_close_device(struct input_handle *handle)
528EXPORT_SYMBOL(input_close_device); 547EXPORT_SYMBOL(input_close_device);
529 548
530/* 549/*
550 * Simulate keyup events for all keys that are marked as pressed.
551 * The function must be called with dev->event_lock held.
552 */
553static void input_dev_release_keys(struct input_dev *dev)
554{
555 int code;
556
557 if (is_event_supported(EV_KEY, dev->evbit, EV_MAX)) {
558 for (code = 0; code <= KEY_MAX; code++) {
559 if (is_event_supported(code, dev->keybit, KEY_MAX) &&
560 __test_and_clear_bit(code, dev->key)) {
561 input_pass_event(dev, EV_KEY, code, 0);
562 }
563 }
564 input_pass_event(dev, EV_SYN, SYN_REPORT, 1);
565 }
566}
567
568/*
531 * Prepare device for unregistering 569 * Prepare device for unregistering
532 */ 570 */
533static void input_disconnect_device(struct input_dev *dev) 571static void input_disconnect_device(struct input_dev *dev)
534{ 572{
535 struct input_handle *handle; 573 struct input_handle *handle;
536 int code;
537 574
538 /* 575 /*
539 * Mark device as going away. Note that we take dev->mutex here 576 * Mark device as going away. Note that we take dev->mutex here
@@ -552,15 +589,7 @@ static void input_disconnect_device(struct input_dev *dev)
552 * generate events even after we done here but they will not 589 * generate events even after we done here but they will not
553 * reach any handlers. 590 * reach any handlers.
554 */ 591 */
555 if (is_event_supported(EV_KEY, dev->evbit, EV_MAX)) { 592 input_dev_release_keys(dev);
556 for (code = 0; code <= KEY_MAX; code++) {
557 if (is_event_supported(code, dev->keybit, KEY_MAX) &&
558 __test_and_clear_bit(code, dev->key)) {
559 input_pass_event(dev, EV_KEY, code, 0);
560 }
561 }
562 input_pass_event(dev, EV_SYN, SYN_REPORT, 1);
563 }
564 593
565 list_for_each_entry(handle, &dev->h_list, d_node) 594 list_for_each_entry(handle, &dev->h_list, d_node)
566 handle->open = 0; 595 handle->open = 0;
@@ -684,7 +713,7 @@ int input_set_keycode(struct input_dev *dev,
684 unsigned int scancode, unsigned int keycode) 713 unsigned int scancode, unsigned int keycode)
685{ 714{
686 unsigned long flags; 715 unsigned long flags;
687 int old_keycode; 716 unsigned int old_keycode;
688 int retval; 717 int retval;
689 718
690 if (keycode > KEY_MAX) 719 if (keycode > KEY_MAX)
@@ -1278,6 +1307,7 @@ static void input_dev_release(struct device *device)
1278 struct input_dev *dev = to_input_dev(device); 1307 struct input_dev *dev = to_input_dev(device);
1279 1308
1280 input_ff_destroy(dev); 1309 input_ff_destroy(dev);
1310 input_mt_destroy_slots(dev);
1281 kfree(dev); 1311 kfree(dev);
1282 1312
1283 module_put(THIS_MODULE); 1313 module_put(THIS_MODULE);
@@ -1433,6 +1463,15 @@ static int input_dev_resume(struct device *dev)
1433 1463
1434 mutex_lock(&input_dev->mutex); 1464 mutex_lock(&input_dev->mutex);
1435 input_dev_reset(input_dev, true); 1465 input_dev_reset(input_dev, true);
1466
1467 /*
1468 * Keys that have been pressed at suspend time are unlikely
1469 * to be still pressed when we resume.
1470 */
1471 spin_lock_irq(&input_dev->event_lock);
1472 input_dev_release_keys(input_dev);
1473 spin_unlock_irq(&input_dev->event_lock);
1474
1436 mutex_unlock(&input_dev->mutex); 1475 mutex_unlock(&input_dev->mutex);
1437 1476
1438 return 0; 1477 return 0;
@@ -1518,6 +1557,45 @@ void input_free_device(struct input_dev *dev)
1518EXPORT_SYMBOL(input_free_device); 1557EXPORT_SYMBOL(input_free_device);
1519 1558
1520/** 1559/**
1560 * input_mt_create_slots() - create MT input slots
1561 * @dev: input device supporting MT events and finger tracking
1562 * @num_slots: number of slots used by the device
1563 *
1564 * This function allocates all necessary memory for MT slot handling
1565 * in the input device, and adds ABS_MT_SLOT to the device capabilities.
1566 */
1567int input_mt_create_slots(struct input_dev *dev, unsigned int num_slots)
1568{
1569 if (!num_slots)
1570 return 0;
1571
1572 dev->mt = kcalloc(num_slots, sizeof(struct input_mt_slot), GFP_KERNEL);
1573 if (!dev->mt)
1574 return -ENOMEM;
1575
1576 dev->mtsize = num_slots;
1577 input_set_abs_params(dev, ABS_MT_SLOT, 0, num_slots - 1, 0, 0);
1578
1579 return 0;
1580}
1581EXPORT_SYMBOL(input_mt_create_slots);
1582
1583/**
1584 * input_mt_destroy_slots() - frees the MT slots of the input device
1585 * @dev: input device with allocated MT slots
1586 *
1587 * This function is only needed in error path as the input core will
1588 * automatically free the MT slots when the device is destroyed.
1589 */
1590void input_mt_destroy_slots(struct input_dev *dev)
1591{
1592 kfree(dev->mt);
1593 dev->mt = NULL;
1594 dev->mtsize = 0;
1595}
1596EXPORT_SYMBOL(input_mt_destroy_slots);
1597
1598/**
1521 * input_set_capability - mark device as capable of a certain event 1599 * input_set_capability - mark device as capable of a certain event
1522 * @dev: device that is capable of emitting or accepting event 1600 * @dev: device that is capable of emitting or accepting event
1523 * @type: type of the event (EV_KEY, EV_REL, etc...) 1601 * @type: type of the event (EV_KEY, EV_REL, etc...)
@@ -1926,20 +2004,10 @@ static const struct file_operations input_fops = {
1926 .open = input_open_file, 2004 .open = input_open_file,
1927}; 2005};
1928 2006
1929static void __init input_init_abs_bypass(void)
1930{
1931 const unsigned int *p;
1932
1933 for (p = input_abs_bypass_init_data; *p; p++)
1934 input_abs_bypass[BIT_WORD(*p)] |= BIT_MASK(*p);
1935}
1936
1937static int __init input_init(void) 2007static int __init input_init(void)
1938{ 2008{
1939 int err; 2009 int err;
1940 2010
1941 input_init_abs_bypass();
1942
1943 err = class_register(&input_class); 2011 err = class_register(&input_class);
1944 if (err) { 2012 if (err) {
1945 printk(KERN_ERR "input: unable to register input_dev class\n"); 2013 printk(KERN_ERR "input: unable to register input_dev class\n");
diff --git a/drivers/input/joydev.c b/drivers/input/joydev.c
index 34157bb97ed6..63834585c283 100644
--- a/drivers/input/joydev.c
+++ b/drivers/input/joydev.c
@@ -37,7 +37,6 @@ MODULE_LICENSE("GPL");
37#define JOYDEV_BUFFER_SIZE 64 37#define JOYDEV_BUFFER_SIZE 64
38 38
39struct joydev { 39struct joydev {
40 int exist;
41 int open; 40 int open;
42 int minor; 41 int minor;
43 struct input_handle handle; 42 struct input_handle handle;
@@ -46,6 +45,7 @@ struct joydev {
46 spinlock_t client_lock; /* protects client_list */ 45 spinlock_t client_lock; /* protects client_list */
47 struct mutex mutex; 46 struct mutex mutex;
48 struct device dev; 47 struct device dev;
48 bool exist;
49 49
50 struct js_corr corr[ABS_CNT]; 50 struct js_corr corr[ABS_CNT];
51 struct JS_DATA_SAVE_TYPE glue; 51 struct JS_DATA_SAVE_TYPE glue;
@@ -760,7 +760,7 @@ static void joydev_remove_chrdev(struct joydev *joydev)
760static void joydev_mark_dead(struct joydev *joydev) 760static void joydev_mark_dead(struct joydev *joydev)
761{ 761{
762 mutex_lock(&joydev->mutex); 762 mutex_lock(&joydev->mutex);
763 joydev->exist = 0; 763 joydev->exist = false;
764 mutex_unlock(&joydev->mutex); 764 mutex_unlock(&joydev->mutex);
765} 765}
766 766
@@ -817,10 +817,9 @@ static int joydev_connect(struct input_handler *handler, struct input_dev *dev,
817 init_waitqueue_head(&joydev->wait); 817 init_waitqueue_head(&joydev->wait);
818 818
819 dev_set_name(&joydev->dev, "js%d", minor); 819 dev_set_name(&joydev->dev, "js%d", minor);
820 joydev->exist = 1; 820 joydev->exist = true;
821 joydev->minor = minor; 821 joydev->minor = minor;
822 822
823 joydev->exist = 1;
824 joydev->handle.dev = input_get_device(dev); 823 joydev->handle.dev = input_get_device(dev);
825 joydev->handle.name = dev_name(&joydev->dev); 824 joydev->handle.name = dev_name(&joydev->dev);
826 joydev->handle.handler = handler; 825 joydev->handle.handler = handler;
diff --git a/drivers/input/joystick/gamecon.c b/drivers/input/joystick/gamecon.c
index fbd62abb66f9..0ffaf2c77a19 100644
--- a/drivers/input/joystick/gamecon.c
+++ b/drivers/input/joystick/gamecon.c
@@ -89,7 +89,6 @@ struct gc_pad {
89struct gc { 89struct gc {
90 struct pardevice *pd; 90 struct pardevice *pd;
91 struct gc_pad pads[GC_MAX_DEVICES]; 91 struct gc_pad pads[GC_MAX_DEVICES];
92 struct input_dev *dev[GC_MAX_DEVICES];
93 struct timer_list timer; 92 struct timer_list timer;
94 int pad_count[GC_MAX]; 93 int pad_count[GC_MAX];
95 int used; 94 int used;
@@ -387,7 +386,7 @@ static void gc_nes_process_packet(struct gc *gc)
387 for (i = 0; i < GC_MAX_DEVICES; i++) { 386 for (i = 0; i < GC_MAX_DEVICES; i++) {
388 387
389 pad = &gc->pads[i]; 388 pad = &gc->pads[i];
390 dev = gc->dev[i]; 389 dev = pad->dev;
391 s = gc_status_bit[i]; 390 s = gc_status_bit[i];
392 391
393 switch (pad->type) { 392 switch (pad->type) {
@@ -579,7 +578,7 @@ static void gc_psx_command(struct gc *gc, int b, unsigned char *data)
579 read = parport_read_status(port) ^ 0x80; 578 read = parport_read_status(port) ^ 0x80;
580 579
581 for (j = 0; j < GC_MAX_DEVICES; j++) { 580 for (j = 0; j < GC_MAX_DEVICES; j++) {
582 struct gc_pad *pad = &gc->pads[i]; 581 struct gc_pad *pad = &gc->pads[j];
583 582
584 if (pad->type == GC_PSX || pad->type == GC_DDR) 583 if (pad->type == GC_PSX || pad->type == GC_DDR)
585 data[j] |= (read & gc_status_bit[j]) ? (1 << i) : 0; 584 data[j] |= (read & gc_status_bit[j]) ? (1 << i) : 0;
diff --git a/drivers/input/joystick/xpad.c b/drivers/input/joystick/xpad.c
index c1087ce4cef9..269a846f3694 100644
--- a/drivers/input/joystick/xpad.c
+++ b/drivers/input/joystick/xpad.c
@@ -9,6 +9,7 @@
9 * 2005 Dominic Cerquetti <binary1230@yahoo.com> 9 * 2005 Dominic Cerquetti <binary1230@yahoo.com>
10 * 2006 Adam Buchbinder <adam.buchbinder@gmail.com> 10 * 2006 Adam Buchbinder <adam.buchbinder@gmail.com>
11 * 2007 Jan Kratochvil <honza@jikos.cz> 11 * 2007 Jan Kratochvil <honza@jikos.cz>
12 * 2010 Christoph Fritz <chf.fritz@googlemail.com>
12 * 13 *
13 * This program is free software; you can redistribute it and/or 14 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as 15 * modify it under the terms of the GNU General Public License as
@@ -88,6 +89,9 @@
88 but we map them to axes when possible to simplify things */ 89 but we map them to axes when possible to simplify things */
89#define MAP_DPAD_TO_BUTTONS (1 << 0) 90#define MAP_DPAD_TO_BUTTONS (1 << 0)
90#define MAP_TRIGGERS_TO_BUTTONS (1 << 1) 91#define MAP_TRIGGERS_TO_BUTTONS (1 << 1)
92#define MAP_STICKS_TO_NULL (1 << 2)
93#define DANCEPAD_MAP_CONFIG (MAP_DPAD_TO_BUTTONS | \
94 MAP_TRIGGERS_TO_BUTTONS | MAP_STICKS_TO_NULL)
91 95
92#define XTYPE_XBOX 0 96#define XTYPE_XBOX 0
93#define XTYPE_XBOX360 1 97#define XTYPE_XBOX360 1
@@ -102,6 +106,10 @@ static int triggers_to_buttons;
102module_param(triggers_to_buttons, bool, S_IRUGO); 106module_param(triggers_to_buttons, bool, S_IRUGO);
103MODULE_PARM_DESC(triggers_to_buttons, "Map triggers to buttons rather than axes for unknown pads"); 107MODULE_PARM_DESC(triggers_to_buttons, "Map triggers to buttons rather than axes for unknown pads");
104 108
109static int sticks_to_null;
110module_param(sticks_to_null, bool, S_IRUGO);
111MODULE_PARM_DESC(sticks_to_null, "Do not map sticks at all for unknown pads");
112
105static const struct xpad_device { 113static const struct xpad_device {
106 u16 idVendor; 114 u16 idVendor;
107 u16 idProduct; 115 u16 idProduct;
@@ -114,7 +122,7 @@ static const struct xpad_device {
114 { 0x045e, 0x0285, "Microsoft X-Box pad (Japan)", 0, XTYPE_XBOX }, 122 { 0x045e, 0x0285, "Microsoft X-Box pad (Japan)", 0, XTYPE_XBOX },
115 { 0x045e, 0x0287, "Microsoft Xbox Controller S", 0, XTYPE_XBOX }, 123 { 0x045e, 0x0287, "Microsoft Xbox Controller S", 0, XTYPE_XBOX },
116 { 0x045e, 0x0719, "Xbox 360 Wireless Receiver", MAP_DPAD_TO_BUTTONS, XTYPE_XBOX360W }, 124 { 0x045e, 0x0719, "Xbox 360 Wireless Receiver", MAP_DPAD_TO_BUTTONS, XTYPE_XBOX360W },
117 { 0x0c12, 0x8809, "RedOctane Xbox Dance Pad", MAP_DPAD_TO_BUTTONS, XTYPE_XBOX }, 125 { 0x0c12, 0x8809, "RedOctane Xbox Dance Pad", DANCEPAD_MAP_CONFIG, XTYPE_XBOX },
118 { 0x044f, 0x0f07, "Thrustmaster, Inc. Controller", 0, XTYPE_XBOX }, 126 { 0x044f, 0x0f07, "Thrustmaster, Inc. Controller", 0, XTYPE_XBOX },
119 { 0x046d, 0xc242, "Logitech Chillstream Controller", 0, XTYPE_XBOX360 }, 127 { 0x046d, 0xc242, "Logitech Chillstream Controller", 0, XTYPE_XBOX360 },
120 { 0x046d, 0xca84, "Logitech Xbox Cordless Controller", 0, XTYPE_XBOX }, 128 { 0x046d, 0xca84, "Logitech Xbox Cordless Controller", 0, XTYPE_XBOX },
@@ -151,6 +159,7 @@ static const struct xpad_device {
151 { 0x045e, 0x028e, "Microsoft X-Box 360 pad", 0, XTYPE_XBOX360 }, 159 { 0x045e, 0x028e, "Microsoft X-Box 360 pad", 0, XTYPE_XBOX360 },
152 { 0x1bad, 0x0003, "Harmonix Rock Band Drumkit", MAP_DPAD_TO_BUTTONS, XTYPE_XBOX360 }, 160 { 0x1bad, 0x0003, "Harmonix Rock Band Drumkit", MAP_DPAD_TO_BUTTONS, XTYPE_XBOX360 },
153 { 0x0f0d, 0x0016, "Hori Real Arcade Pro.EX", MAP_TRIGGERS_TO_BUTTONS, XTYPE_XBOX360 }, 161 { 0x0f0d, 0x0016, "Hori Real Arcade Pro.EX", MAP_TRIGGERS_TO_BUTTONS, XTYPE_XBOX360 },
162 { 0x0f0d, 0x000d, "Hori Fighting Stick EX2", MAP_TRIGGERS_TO_BUTTONS, XTYPE_XBOX360 },
154 { 0xffff, 0xffff, "Chinese-made Xbox Controller", 0, XTYPE_XBOX }, 163 { 0xffff, 0xffff, "Chinese-made Xbox Controller", 0, XTYPE_XBOX },
155 { 0x0000, 0x0000, "Generic X-Box pad", 0, XTYPE_UNKNOWN } 164 { 0x0000, 0x0000, "Generic X-Box pad", 0, XTYPE_UNKNOWN }
156}; 165};
@@ -158,7 +167,7 @@ static const struct xpad_device {
158/* buttons shared with xbox and xbox360 */ 167/* buttons shared with xbox and xbox360 */
159static const signed short xpad_common_btn[] = { 168static const signed short xpad_common_btn[] = {
160 BTN_A, BTN_B, BTN_X, BTN_Y, /* "analog" buttons */ 169 BTN_A, BTN_B, BTN_X, BTN_Y, /* "analog" buttons */
161 BTN_START, BTN_BACK, BTN_THUMBL, BTN_THUMBR, /* start/back/sticks */ 170 BTN_START, BTN_SELECT, BTN_THUMBL, BTN_THUMBR, /* start/back/sticks */
162 -1 /* terminating entry */ 171 -1 /* terminating entry */
163}; 172};
164 173
@@ -168,10 +177,10 @@ static const signed short xpad_btn[] = {
168 -1 /* terminating entry */ 177 -1 /* terminating entry */
169}; 178};
170 179
171/* used when dpad is mapped to nuttons */ 180/* used when dpad is mapped to buttons */
172static const signed short xpad_btn_pad[] = { 181static const signed short xpad_btn_pad[] = {
173 BTN_LEFT, BTN_RIGHT, /* d-pad left, right */ 182 BTN_TRIGGER_HAPPY1, BTN_TRIGGER_HAPPY2, /* d-pad left, right */
174 BTN_0, BTN_1, /* d-pad up, down (XXX names??) */ 183 BTN_TRIGGER_HAPPY3, BTN_TRIGGER_HAPPY4, /* d-pad up, down */
175 -1 /* terminating entry */ 184 -1 /* terminating entry */
176}; 185};
177 186
@@ -279,17 +288,19 @@ static void xpad_process_packet(struct usb_xpad *xpad, u16 cmd, unsigned char *d
279{ 288{
280 struct input_dev *dev = xpad->dev; 289 struct input_dev *dev = xpad->dev;
281 290
282 /* left stick */ 291 if (!(xpad->mapping & MAP_STICKS_TO_NULL)) {
283 input_report_abs(dev, ABS_X, 292 /* left stick */
284 (__s16) le16_to_cpup((__le16 *)(data + 12))); 293 input_report_abs(dev, ABS_X,
285 input_report_abs(dev, ABS_Y, 294 (__s16) le16_to_cpup((__le16 *)(data + 12)));
286 ~(__s16) le16_to_cpup((__le16 *)(data + 14))); 295 input_report_abs(dev, ABS_Y,
287 296 ~(__s16) le16_to_cpup((__le16 *)(data + 14)));
288 /* right stick */ 297
289 input_report_abs(dev, ABS_RX, 298 /* right stick */
290 (__s16) le16_to_cpup((__le16 *)(data + 16))); 299 input_report_abs(dev, ABS_RX,
291 input_report_abs(dev, ABS_RY, 300 (__s16) le16_to_cpup((__le16 *)(data + 16)));
292 ~(__s16) le16_to_cpup((__le16 *)(data + 18))); 301 input_report_abs(dev, ABS_RY,
302 ~(__s16) le16_to_cpup((__le16 *)(data + 18)));
303 }
293 304
294 /* triggers left/right */ 305 /* triggers left/right */
295 if (xpad->mapping & MAP_TRIGGERS_TO_BUTTONS) { 306 if (xpad->mapping & MAP_TRIGGERS_TO_BUTTONS) {
@@ -302,10 +313,11 @@ static void xpad_process_packet(struct usb_xpad *xpad, u16 cmd, unsigned char *d
302 313
303 /* digital pad */ 314 /* digital pad */
304 if (xpad->mapping & MAP_DPAD_TO_BUTTONS) { 315 if (xpad->mapping & MAP_DPAD_TO_BUTTONS) {
305 input_report_key(dev, BTN_LEFT, data[2] & 0x04); 316 /* dpad as buttons (left, right, up, down) */
306 input_report_key(dev, BTN_RIGHT, data[2] & 0x08); 317 input_report_key(dev, BTN_TRIGGER_HAPPY1, data[2] & 0x04);
307 input_report_key(dev, BTN_0, data[2] & 0x01); /* up */ 318 input_report_key(dev, BTN_TRIGGER_HAPPY2, data[2] & 0x08);
308 input_report_key(dev, BTN_1, data[2] & 0x02); /* down */ 319 input_report_key(dev, BTN_TRIGGER_HAPPY3, data[2] & 0x01);
320 input_report_key(dev, BTN_TRIGGER_HAPPY4, data[2] & 0x02);
309 } else { 321 } else {
310 input_report_abs(dev, ABS_HAT0X, 322 input_report_abs(dev, ABS_HAT0X,
311 !!(data[2] & 0x08) - !!(data[2] & 0x04)); 323 !!(data[2] & 0x08) - !!(data[2] & 0x04));
@@ -315,7 +327,7 @@ static void xpad_process_packet(struct usb_xpad *xpad, u16 cmd, unsigned char *d
315 327
316 /* start/back buttons and stick press left/right */ 328 /* start/back buttons and stick press left/right */
317 input_report_key(dev, BTN_START, data[2] & 0x10); 329 input_report_key(dev, BTN_START, data[2] & 0x10);
318 input_report_key(dev, BTN_BACK, data[2] & 0x20); 330 input_report_key(dev, BTN_SELECT, data[2] & 0x20);
319 input_report_key(dev, BTN_THUMBL, data[2] & 0x40); 331 input_report_key(dev, BTN_THUMBL, data[2] & 0x40);
320 input_report_key(dev, BTN_THUMBR, data[2] & 0x80); 332 input_report_key(dev, BTN_THUMBR, data[2] & 0x80);
321 333
@@ -349,11 +361,11 @@ static void xpad360_process_packet(struct usb_xpad *xpad,
349 361
350 /* digital pad */ 362 /* digital pad */
351 if (xpad->mapping & MAP_DPAD_TO_BUTTONS) { 363 if (xpad->mapping & MAP_DPAD_TO_BUTTONS) {
352 /* dpad as buttons (right, left, down, up) */ 364 /* dpad as buttons (left, right, up, down) */
353 input_report_key(dev, BTN_LEFT, data[2] & 0x04); 365 input_report_key(dev, BTN_TRIGGER_HAPPY1, data[2] & 0x04);
354 input_report_key(dev, BTN_RIGHT, data[2] & 0x08); 366 input_report_key(dev, BTN_TRIGGER_HAPPY2, data[2] & 0x08);
355 input_report_key(dev, BTN_0, data[2] & 0x01); /* up */ 367 input_report_key(dev, BTN_TRIGGER_HAPPY3, data[2] & 0x01);
356 input_report_key(dev, BTN_1, data[2] & 0x02); /* down */ 368 input_report_key(dev, BTN_TRIGGER_HAPPY4, data[2] & 0x02);
357 } else { 369 } else {
358 input_report_abs(dev, ABS_HAT0X, 370 input_report_abs(dev, ABS_HAT0X,
359 !!(data[2] & 0x08) - !!(data[2] & 0x04)); 371 !!(data[2] & 0x08) - !!(data[2] & 0x04));
@@ -363,7 +375,7 @@ static void xpad360_process_packet(struct usb_xpad *xpad,
363 375
364 /* start/back buttons */ 376 /* start/back buttons */
365 input_report_key(dev, BTN_START, data[2] & 0x10); 377 input_report_key(dev, BTN_START, data[2] & 0x10);
366 input_report_key(dev, BTN_BACK, data[2] & 0x20); 378 input_report_key(dev, BTN_SELECT, data[2] & 0x20);
367 379
368 /* stick press left/right */ 380 /* stick press left/right */
369 input_report_key(dev, BTN_THUMBL, data[2] & 0x40); 381 input_report_key(dev, BTN_THUMBL, data[2] & 0x40);
@@ -378,17 +390,19 @@ static void xpad360_process_packet(struct usb_xpad *xpad,
378 input_report_key(dev, BTN_TR, data[3] & 0x02); 390 input_report_key(dev, BTN_TR, data[3] & 0x02);
379 input_report_key(dev, BTN_MODE, data[3] & 0x04); 391 input_report_key(dev, BTN_MODE, data[3] & 0x04);
380 392
381 /* left stick */ 393 if (!(xpad->mapping & MAP_STICKS_TO_NULL)) {
382 input_report_abs(dev, ABS_X, 394 /* left stick */
383 (__s16) le16_to_cpup((__le16 *)(data + 6))); 395 input_report_abs(dev, ABS_X,
384 input_report_abs(dev, ABS_Y, 396 (__s16) le16_to_cpup((__le16 *)(data + 6)));
385 ~(__s16) le16_to_cpup((__le16 *)(data + 8))); 397 input_report_abs(dev, ABS_Y,
386 398 ~(__s16) le16_to_cpup((__le16 *)(data + 8)));
387 /* right stick */ 399
388 input_report_abs(dev, ABS_RX, 400 /* right stick */
389 (__s16) le16_to_cpup((__le16 *)(data + 10))); 401 input_report_abs(dev, ABS_RX,
390 input_report_abs(dev, ABS_RY, 402 (__s16) le16_to_cpup((__le16 *)(data + 10)));
391 ~(__s16) le16_to_cpup((__le16 *)(data + 12))); 403 input_report_abs(dev, ABS_RY,
404 ~(__s16) le16_to_cpup((__le16 *)(data + 12)));
405 }
392 406
393 /* triggers left/right */ 407 /* triggers left/right */
394 if (xpad->mapping & MAP_TRIGGERS_TO_BUTTONS) { 408 if (xpad->mapping & MAP_TRIGGERS_TO_BUTTONS) {
@@ -814,6 +828,8 @@ static int xpad_probe(struct usb_interface *intf, const struct usb_device_id *id
814 xpad->mapping |= MAP_DPAD_TO_BUTTONS; 828 xpad->mapping |= MAP_DPAD_TO_BUTTONS;
815 if (triggers_to_buttons) 829 if (triggers_to_buttons)
816 xpad->mapping |= MAP_TRIGGERS_TO_BUTTONS; 830 xpad->mapping |= MAP_TRIGGERS_TO_BUTTONS;
831 if (sticks_to_null)
832 xpad->mapping |= MAP_STICKS_TO_NULL;
817 } 833 }
818 834
819 xpad->dev = input_dev; 835 xpad->dev = input_dev;
@@ -830,16 +846,20 @@ static int xpad_probe(struct usb_interface *intf, const struct usb_device_id *id
830 input_dev->open = xpad_open; 846 input_dev->open = xpad_open;
831 input_dev->close = xpad_close; 847 input_dev->close = xpad_close;
832 848
833 input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS); 849 input_dev->evbit[0] = BIT_MASK(EV_KEY);
850
851 if (!(xpad->mapping & MAP_STICKS_TO_NULL)) {
852 input_dev->evbit[0] |= BIT_MASK(EV_ABS);
853 /* set up axes */
854 for (i = 0; xpad_abs[i] >= 0; i++)
855 xpad_set_up_abs(input_dev, xpad_abs[i]);
856 }
834 857
835 /* set up standard buttons and axes */ 858 /* set up standard buttons */
836 for (i = 0; xpad_common_btn[i] >= 0; i++) 859 for (i = 0; xpad_common_btn[i] >= 0; i++)
837 __set_bit(xpad_common_btn[i], input_dev->keybit); 860 __set_bit(xpad_common_btn[i], input_dev->keybit);
838 861
839 for (i = 0; xpad_abs[i] >= 0; i++) 862 /* set up model-specific ones */
840 xpad_set_up_abs(input_dev, xpad_abs[i]);
841
842 /* Now set up model-specific ones */
843 if (xpad->xtype == XTYPE_XBOX360 || xpad->xtype == XTYPE_XBOX360W) { 863 if (xpad->xtype == XTYPE_XBOX360 || xpad->xtype == XTYPE_XBOX360W) {
844 for (i = 0; xpad360_btn[i] >= 0; i++) 864 for (i = 0; xpad360_btn[i] >= 0; i++)
845 __set_bit(xpad360_btn[i], input_dev->keybit); 865 __set_bit(xpad360_btn[i], input_dev->keybit);
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index 0f9a4785d798..b171f63fe4d7 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -69,11 +69,11 @@ config KEYBOARD_ATARI
69 module will be called atakbd. 69 module will be called atakbd.
70 70
71config KEYBOARD_ATKBD 71config KEYBOARD_ATKBD
72 tristate "AT keyboard" if EMBEDDED || !X86 || X86_MRST 72 tristate "AT keyboard" if EMBEDDED || !X86
73 default y 73 default y
74 select SERIO 74 select SERIO
75 select SERIO_LIBPS2 75 select SERIO_LIBPS2
76 select SERIO_I8042 if X86 && !X86_MRST 76 select SERIO_I8042 if X86
77 select SERIO_GSCPS2 if GSC 77 select SERIO_GSCPS2 if GSC
78 help 78 help
79 Say Y here if you want to use a standard AT or PS/2 keyboard. Usually 79 Say Y here if you want to use a standard AT or PS/2 keyboard. Usually
@@ -124,7 +124,7 @@ config KEYBOARD_ATKBD_RDI_KEYCODES
124 right-hand column will be interpreted as the key shown in the 124 right-hand column will be interpreted as the key shown in the
125 left-hand column. 125 left-hand column.
126 126
127config QT2160 127config KEYBOARD_QT2160
128 tristate "Atmel AT42QT2160 Touch Sensor Chip" 128 tristate "Atmel AT42QT2160 Touch Sensor Chip"
129 depends on I2C && EXPERIMENTAL 129 depends on I2C && EXPERIMENTAL
130 help 130 help
@@ -297,6 +297,18 @@ config KEYBOARD_MAX7359
297 To compile this driver as a module, choose M here: the 297 To compile this driver as a module, choose M here: the
298 module will be called max7359_keypad. 298 module will be called max7359_keypad.
299 299
300config KEYBOARD_MCS
301 tristate "MELFAS MCS Touchkey"
302 depends on I2C
303 help
304 Say Y here if you have the MELFAS MCS5000/5080 touchkey controller
305 chip in your system.
306
307 If unsure, say N.
308
309 To compile this driver as a module, choose M here: the
310 module will be called mcs_touchkey.
311
300config KEYBOARD_IMX 312config KEYBOARD_IMX
301 tristate "IMX keypad support" 313 tristate "IMX keypad support"
302 depends on ARCH_MXC 314 depends on ARCH_MXC
@@ -342,6 +354,15 @@ config KEYBOARD_PXA930_ROTARY
342 To compile this driver as a module, choose M here: the 354 To compile this driver as a module, choose M here: the
343 module will be called pxa930_rotary. 355 module will be called pxa930_rotary.
344 356
357config KEYBOARD_SAMSUNG
358 tristate "Samsung keypad support"
359 depends on SAMSUNG_DEV_KEYPAD
360 help
361 Say Y here if you want to use the Samsung keypad.
362
363 To compile this driver as a module, choose M here: the
364 module will be called samsung-keypad.
365
345config KEYBOARD_STOWAWAY 366config KEYBOARD_STOWAWAY
346 tristate "Stowaway keyboard" 367 tristate "Stowaway keyboard"
347 select SERIO 368 select SERIO
diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile
index 4596d0c6f922..1a66d5f1ca8b 100644
--- a/drivers/input/keyboard/Makefile
+++ b/drivers/input/keyboard/Makefile
@@ -26,12 +26,14 @@ obj-$(CONFIG_KEYBOARD_LOCOMO) += locomokbd.o
26obj-$(CONFIG_KEYBOARD_MAPLE) += maple_keyb.o 26obj-$(CONFIG_KEYBOARD_MAPLE) += maple_keyb.o
27obj-$(CONFIG_KEYBOARD_MATRIX) += matrix_keypad.o 27obj-$(CONFIG_KEYBOARD_MATRIX) += matrix_keypad.o
28obj-$(CONFIG_KEYBOARD_MAX7359) += max7359_keypad.o 28obj-$(CONFIG_KEYBOARD_MAX7359) += max7359_keypad.o
29obj-$(CONFIG_KEYBOARD_MCS) += mcs_touchkey.o
29obj-$(CONFIG_KEYBOARD_NEWTON) += newtonkbd.o 30obj-$(CONFIG_KEYBOARD_NEWTON) += newtonkbd.o
30obj-$(CONFIG_KEYBOARD_OMAP) += omap-keypad.o 31obj-$(CONFIG_KEYBOARD_OMAP) += omap-keypad.o
31obj-$(CONFIG_KEYBOARD_OPENCORES) += opencores-kbd.o 32obj-$(CONFIG_KEYBOARD_OPENCORES) += opencores-kbd.o
32obj-$(CONFIG_KEYBOARD_PXA27x) += pxa27x_keypad.o 33obj-$(CONFIG_KEYBOARD_PXA27x) += pxa27x_keypad.o
33obj-$(CONFIG_KEYBOARD_PXA930_ROTARY) += pxa930_rotary.o 34obj-$(CONFIG_KEYBOARD_PXA930_ROTARY) += pxa930_rotary.o
34obj-$(CONFIG_KEYBOARD_QT2160) += qt2160.o 35obj-$(CONFIG_KEYBOARD_QT2160) += qt2160.o
36obj-$(CONFIG_KEYBOARD_SAMSUNG) += samsung-keypad.o
35obj-$(CONFIG_KEYBOARD_SH_KEYSC) += sh_keysc.o 37obj-$(CONFIG_KEYBOARD_SH_KEYSC) += sh_keysc.o
36obj-$(CONFIG_KEYBOARD_STOWAWAY) += stowaway.o 38obj-$(CONFIG_KEYBOARD_STOWAWAY) += stowaway.o
37obj-$(CONFIG_KEYBOARD_SUNKBD) += sunkbd.o 39obj-$(CONFIG_KEYBOARD_SUNKBD) += sunkbd.o
diff --git a/drivers/input/keyboard/adp5588-keys.c b/drivers/input/keyboard/adp5588-keys.c
index 744600eff222..d6918cb966c0 100644
--- a/drivers/input/keyboard/adp5588-keys.c
+++ b/drivers/input/keyboard/adp5588-keys.c
@@ -19,6 +19,7 @@
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/input.h> 20#include <linux/input.h>
21#include <linux/i2c.h> 21#include <linux/i2c.h>
22#include <linux/gpio.h>
22#include <linux/slab.h> 23#include <linux/slab.h>
23 24
24#include <linux/i2c/adp5588.h> 25#include <linux/i2c/adp5588.h>
@@ -54,6 +55,10 @@
54 55
55#define KEYP_MAX_EVENT 10 56#define KEYP_MAX_EVENT 10
56 57
58#define MAXGPIO 18
59#define ADP_BANK(offs) ((offs) >> 3)
60#define ADP_BIT(offs) (1u << ((offs) & 0x7))
61
57/* 62/*
58 * Early pre 4.0 Silicon required to delay readout by at least 25ms, 63 * Early pre 4.0 Silicon required to delay readout by at least 25ms,
59 * since the Event Counter Register updated 25ms after the interrupt 64 * since the Event Counter Register updated 25ms after the interrupt
@@ -67,6 +72,16 @@ struct adp5588_kpad {
67 struct delayed_work work; 72 struct delayed_work work;
68 unsigned long delay; 73 unsigned long delay;
69 unsigned short keycode[ADP5588_KEYMAPSIZE]; 74 unsigned short keycode[ADP5588_KEYMAPSIZE];
75 const struct adp5588_gpi_map *gpimap;
76 unsigned short gpimapsize;
77#ifdef CONFIG_GPIOLIB
78 unsigned char gpiomap[MAXGPIO];
79 bool export_gpio;
80 struct gpio_chip gc;
81 struct mutex gpio_lock; /* Protect cached dir, dat_out */
82 u8 dat_out[3];
83 u8 dir[3];
84#endif
70}; 85};
71 86
72static int adp5588_read(struct i2c_client *client, u8 reg) 87static int adp5588_read(struct i2c_client *client, u8 reg)
@@ -84,12 +99,222 @@ static int adp5588_write(struct i2c_client *client, u8 reg, u8 val)
84 return i2c_smbus_write_byte_data(client, reg, val); 99 return i2c_smbus_write_byte_data(client, reg, val);
85} 100}
86 101
102#ifdef CONFIG_GPIOLIB
103static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
104{
105 struct adp5588_kpad *kpad = container_of(chip, struct adp5588_kpad, gc);
106 unsigned int bank = ADP_BANK(kpad->gpiomap[off]);
107 unsigned int bit = ADP_BIT(kpad->gpiomap[off]);
108
109 return !!(adp5588_read(kpad->client, GPIO_DAT_STAT1 + bank) & bit);
110}
111
112static void adp5588_gpio_set_value(struct gpio_chip *chip,
113 unsigned off, int val)
114{
115 struct adp5588_kpad *kpad = container_of(chip, struct adp5588_kpad, gc);
116 unsigned int bank = ADP_BANK(kpad->gpiomap[off]);
117 unsigned int bit = ADP_BIT(kpad->gpiomap[off]);
118
119 mutex_lock(&kpad->gpio_lock);
120
121 if (val)
122 kpad->dat_out[bank] |= bit;
123 else
124 kpad->dat_out[bank] &= ~bit;
125
126 adp5588_write(kpad->client, GPIO_DAT_OUT1 + bank,
127 kpad->dat_out[bank]);
128
129 mutex_unlock(&kpad->gpio_lock);
130}
131
132static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
133{
134 struct adp5588_kpad *kpad = container_of(chip, struct adp5588_kpad, gc);
135 unsigned int bank = ADP_BANK(kpad->gpiomap[off]);
136 unsigned int bit = ADP_BIT(kpad->gpiomap[off]);
137 int ret;
138
139 mutex_lock(&kpad->gpio_lock);
140
141 kpad->dir[bank] &= ~bit;
142 ret = adp5588_write(kpad->client, GPIO_DIR1 + bank, kpad->dir[bank]);
143
144 mutex_unlock(&kpad->gpio_lock);
145
146 return ret;
147}
148
149static int adp5588_gpio_direction_output(struct gpio_chip *chip,
150 unsigned off, int val)
151{
152 struct adp5588_kpad *kpad = container_of(chip, struct adp5588_kpad, gc);
153 unsigned int bank = ADP_BANK(kpad->gpiomap[off]);
154 unsigned int bit = ADP_BIT(kpad->gpiomap[off]);
155 int ret;
156
157 mutex_lock(&kpad->gpio_lock);
158
159 kpad->dir[bank] |= bit;
160
161 if (val)
162 kpad->dat_out[bank] |= bit;
163 else
164 kpad->dat_out[bank] &= ~bit;
165
166 ret = adp5588_write(kpad->client, GPIO_DAT_OUT1 + bank,
167 kpad->dat_out[bank]);
168 ret |= adp5588_write(kpad->client, GPIO_DIR1 + bank,
169 kpad->dir[bank]);
170
171 mutex_unlock(&kpad->gpio_lock);
172
173 return ret;
174}
175
176static int __devinit adp5588_build_gpiomap(struct adp5588_kpad *kpad,
177 const struct adp5588_kpad_platform_data *pdata)
178{
179 bool pin_used[MAXGPIO];
180 int n_unused = 0;
181 int i;
182
183 memset(pin_used, 0, sizeof(pin_used));
184
185 for (i = 0; i < pdata->rows; i++)
186 pin_used[i] = true;
187
188 for (i = 0; i < pdata->cols; i++)
189 pin_used[i + GPI_PIN_COL_BASE - GPI_PIN_BASE] = true;
190
191 for (i = 0; i < kpad->gpimapsize; i++)
192 pin_used[kpad->gpimap[i].pin - GPI_PIN_BASE] = true;
193
194 for (i = 0; i < MAXGPIO; i++)
195 if (!pin_used[i])
196 kpad->gpiomap[n_unused++] = i;
197
198 return n_unused;
199}
200
201static int __devinit adp5588_gpio_add(struct adp5588_kpad *kpad)
202{
203 struct device *dev = &kpad->client->dev;
204 const struct adp5588_kpad_platform_data *pdata = dev->platform_data;
205 const struct adp5588_gpio_platform_data *gpio_data = pdata->gpio_data;
206 int i, error;
207
208 if (!gpio_data)
209 return 0;
210
211 kpad->gc.ngpio = adp5588_build_gpiomap(kpad, pdata);
212 if (kpad->gc.ngpio == 0) {
213 dev_info(dev, "No unused gpios left to export\n");
214 return 0;
215 }
216
217 kpad->export_gpio = true;
218
219 kpad->gc.direction_input = adp5588_gpio_direction_input;
220 kpad->gc.direction_output = adp5588_gpio_direction_output;
221 kpad->gc.get = adp5588_gpio_get_value;
222 kpad->gc.set = adp5588_gpio_set_value;
223 kpad->gc.can_sleep = 1;
224
225 kpad->gc.base = gpio_data->gpio_start;
226 kpad->gc.label = kpad->client->name;
227 kpad->gc.owner = THIS_MODULE;
228
229 mutex_init(&kpad->gpio_lock);
230
231 error = gpiochip_add(&kpad->gc);
232 if (error) {
233 dev_err(dev, "gpiochip_add failed, err: %d\n", error);
234 return error;
235 }
236
237 for (i = 0; i <= ADP_BANK(MAXGPIO); i++) {
238 kpad->dat_out[i] = adp5588_read(kpad->client,
239 GPIO_DAT_OUT1 + i);
240 kpad->dir[i] = adp5588_read(kpad->client, GPIO_DIR1 + i);
241 }
242
243 if (gpio_data->setup) {
244 error = gpio_data->setup(kpad->client,
245 kpad->gc.base, kpad->gc.ngpio,
246 gpio_data->context);
247 if (error)
248 dev_warn(dev, "setup failed, %d\n", error);
249 }
250
251 return 0;
252}
253
254static void __devexit adp5588_gpio_remove(struct adp5588_kpad *kpad)
255{
256 struct device *dev = &kpad->client->dev;
257 const struct adp5588_kpad_platform_data *pdata = dev->platform_data;
258 const struct adp5588_gpio_platform_data *gpio_data = pdata->gpio_data;
259 int error;
260
261 if (!kpad->export_gpio)
262 return;
263
264 if (gpio_data->teardown) {
265 error = gpio_data->teardown(kpad->client,
266 kpad->gc.base, kpad->gc.ngpio,
267 gpio_data->context);
268 if (error)
269 dev_warn(dev, "teardown failed %d\n", error);
270 }
271
272 error = gpiochip_remove(&kpad->gc);
273 if (error)
274 dev_warn(dev, "gpiochip_remove failed %d\n", error);
275}
276#else
277static inline int adp5588_gpio_add(struct adp5588_kpad *kpad)
278{
279 return 0;
280}
281
282static inline void adp5588_gpio_remove(struct adp5588_kpad *kpad)
283{
284}
285#endif
286
287static void adp5588_report_events(struct adp5588_kpad *kpad, int ev_cnt)
288{
289 int i, j;
290
291 for (i = 0; i < ev_cnt; i++) {
292 int key = adp5588_read(kpad->client, Key_EVENTA + i);
293 int key_val = key & KEY_EV_MASK;
294
295 if (key_val >= GPI_PIN_BASE && key_val <= GPI_PIN_END) {
296 for (j = 0; j < kpad->gpimapsize; j++) {
297 if (key_val == kpad->gpimap[j].pin) {
298 input_report_switch(kpad->input,
299 kpad->gpimap[j].sw_evt,
300 key & KEY_EV_PRESSED);
301 break;
302 }
303 }
304 } else {
305 input_report_key(kpad->input,
306 kpad->keycode[key_val - 1],
307 key & KEY_EV_PRESSED);
308 }
309 }
310}
311
87static void adp5588_work(struct work_struct *work) 312static void adp5588_work(struct work_struct *work)
88{ 313{
89 struct adp5588_kpad *kpad = container_of(work, 314 struct adp5588_kpad *kpad = container_of(work,
90 struct adp5588_kpad, work.work); 315 struct adp5588_kpad, work.work);
91 struct i2c_client *client = kpad->client; 316 struct i2c_client *client = kpad->client;
92 int i, key, status, ev_cnt; 317 int status, ev_cnt;
93 318
94 status = adp5588_read(client, INT_STAT); 319 status = adp5588_read(client, INT_STAT);
95 320
@@ -99,12 +324,7 @@ static void adp5588_work(struct work_struct *work)
99 if (status & KE_INT) { 324 if (status & KE_INT) {
100 ev_cnt = adp5588_read(client, KEY_LCK_EC_STAT) & KEC; 325 ev_cnt = adp5588_read(client, KEY_LCK_EC_STAT) & KEC;
101 if (ev_cnt) { 326 if (ev_cnt) {
102 for (i = 0; i < ev_cnt; i++) { 327 adp5588_report_events(kpad, ev_cnt);
103 key = adp5588_read(client, Key_EVENTA + i);
104 input_report_key(kpad->input,
105 kpad->keycode[(key & KEY_EV_MASK) - 1],
106 key & KEY_EV_PRESSED);
107 }
108 input_sync(kpad->input); 328 input_sync(kpad->input);
109 } 329 }
110 } 330 }
@@ -128,8 +348,10 @@ static irqreturn_t adp5588_irq(int irq, void *handle)
128 348
129static int __devinit adp5588_setup(struct i2c_client *client) 349static int __devinit adp5588_setup(struct i2c_client *client)
130{ 350{
131 struct adp5588_kpad_platform_data *pdata = client->dev.platform_data; 351 const struct adp5588_kpad_platform_data *pdata = client->dev.platform_data;
352 const struct adp5588_gpio_platform_data *gpio_data = pdata->gpio_data;
132 int i, ret; 353 int i, ret;
354 unsigned char evt_mode1 = 0, evt_mode2 = 0, evt_mode3 = 0;
133 355
134 ret = adp5588_write(client, KP_GPIO1, KP_SEL(pdata->rows)); 356 ret = adp5588_write(client, KP_GPIO1, KP_SEL(pdata->rows));
135 ret |= adp5588_write(client, KP_GPIO2, KP_SEL(pdata->cols) & 0xFF); 357 ret |= adp5588_write(client, KP_GPIO2, KP_SEL(pdata->cols) & 0xFF);
@@ -144,6 +366,32 @@ static int __devinit adp5588_setup(struct i2c_client *client)
144 for (i = 0; i < KEYP_MAX_EVENT; i++) 366 for (i = 0; i < KEYP_MAX_EVENT; i++)
145 ret |= adp5588_read(client, Key_EVENTA); 367 ret |= adp5588_read(client, Key_EVENTA);
146 368
369 for (i = 0; i < pdata->gpimapsize; i++) {
370 unsigned short pin = pdata->gpimap[i].pin;
371
372 if (pin <= GPI_PIN_ROW_END) {
373 evt_mode1 |= (1 << (pin - GPI_PIN_ROW_BASE));
374 } else {
375 evt_mode2 |= ((1 << (pin - GPI_PIN_COL_BASE)) & 0xFF);
376 evt_mode3 |= ((1 << (pin - GPI_PIN_COL_BASE)) >> 8);
377 }
378 }
379
380 if (pdata->gpimapsize) {
381 ret |= adp5588_write(client, GPI_EM1, evt_mode1);
382 ret |= adp5588_write(client, GPI_EM2, evt_mode2);
383 ret |= adp5588_write(client, GPI_EM3, evt_mode3);
384 }
385
386 if (gpio_data) {
387 for (i = 0; i <= ADP_BANK(MAXGPIO); i++) {
388 int pull_mask = gpio_data->pullup_dis_mask;
389
390 ret |= adp5588_write(client, GPIO_PULL1 + i,
391 (pull_mask >> (8 * i)) & 0xFF);
392 }
393 }
394
147 ret |= adp5588_write(client, INT_STAT, CMP2_INT | CMP1_INT | 395 ret |= adp5588_write(client, INT_STAT, CMP2_INT | CMP1_INT |
148 OVR_FLOW_INT | K_LCK_INT | 396 OVR_FLOW_INT | K_LCK_INT |
149 GPI_INT | KE_INT); /* Status is W1C */ 397 GPI_INT | KE_INT); /* Status is W1C */
@@ -158,11 +406,49 @@ static int __devinit adp5588_setup(struct i2c_client *client)
158 return 0; 406 return 0;
159} 407}
160 408
409static void __devinit adp5588_report_switch_state(struct adp5588_kpad *kpad)
410{
411 int gpi_stat1 = adp5588_read(kpad->client, GPIO_DAT_STAT1);
412 int gpi_stat2 = adp5588_read(kpad->client, GPIO_DAT_STAT2);
413 int gpi_stat3 = adp5588_read(kpad->client, GPIO_DAT_STAT3);
414 int gpi_stat_tmp, pin_loc;
415 int i;
416
417 for (i = 0; i < kpad->gpimapsize; i++) {
418 unsigned short pin = kpad->gpimap[i].pin;
419
420 if (pin <= GPI_PIN_ROW_END) {
421 gpi_stat_tmp = gpi_stat1;
422 pin_loc = pin - GPI_PIN_ROW_BASE;
423 } else if ((pin - GPI_PIN_COL_BASE) < 8) {
424 gpi_stat_tmp = gpi_stat2;
425 pin_loc = pin - GPI_PIN_COL_BASE;
426 } else {
427 gpi_stat_tmp = gpi_stat3;
428 pin_loc = pin - GPI_PIN_COL_BASE - 8;
429 }
430
431 if (gpi_stat_tmp < 0) {
432 dev_err(&kpad->client->dev,
433 "Can't read GPIO_DAT_STAT switch %d default to OFF\n",
434 pin);
435 gpi_stat_tmp = 0;
436 }
437
438 input_report_switch(kpad->input,
439 kpad->gpimap[i].sw_evt,
440 !(gpi_stat_tmp & (1 << pin_loc)));
441 }
442
443 input_sync(kpad->input);
444}
445
446
161static int __devinit adp5588_probe(struct i2c_client *client, 447static int __devinit adp5588_probe(struct i2c_client *client,
162 const struct i2c_device_id *id) 448 const struct i2c_device_id *id)
163{ 449{
164 struct adp5588_kpad *kpad; 450 struct adp5588_kpad *kpad;
165 struct adp5588_kpad_platform_data *pdata = client->dev.platform_data; 451 const struct adp5588_kpad_platform_data *pdata = client->dev.platform_data;
166 struct input_dev *input; 452 struct input_dev *input;
167 unsigned int revid; 453 unsigned int revid;
168 int ret, i; 454 int ret, i;
@@ -189,6 +475,37 @@ static int __devinit adp5588_probe(struct i2c_client *client,
189 return -EINVAL; 475 return -EINVAL;
190 } 476 }
191 477
478 if (!pdata->gpimap && pdata->gpimapsize) {
479 dev_err(&client->dev, "invalid gpimap from pdata\n");
480 return -EINVAL;
481 }
482
483 if (pdata->gpimapsize > ADP5588_GPIMAPSIZE_MAX) {
484 dev_err(&client->dev, "invalid gpimapsize\n");
485 return -EINVAL;
486 }
487
488 for (i = 0; i < pdata->gpimapsize; i++) {
489 unsigned short pin = pdata->gpimap[i].pin;
490
491 if (pin < GPI_PIN_BASE || pin > GPI_PIN_END) {
492 dev_err(&client->dev, "invalid gpi pin data\n");
493 return -EINVAL;
494 }
495
496 if (pin <= GPI_PIN_ROW_END) {
497 if (pin - GPI_PIN_ROW_BASE + 1 <= pdata->rows) {
498 dev_err(&client->dev, "invalid gpi row data\n");
499 return -EINVAL;
500 }
501 } else {
502 if (pin - GPI_PIN_COL_BASE + 1 <= pdata->cols) {
503 dev_err(&client->dev, "invalid gpi col data\n");
504 return -EINVAL;
505 }
506 }
507 }
508
192 if (!client->irq) { 509 if (!client->irq) {
193 dev_err(&client->dev, "no IRQ?\n"); 510 dev_err(&client->dev, "no IRQ?\n");
194 return -EINVAL; 511 return -EINVAL;
@@ -233,6 +550,9 @@ static int __devinit adp5588_probe(struct i2c_client *client,
233 memcpy(kpad->keycode, pdata->keymap, 550 memcpy(kpad->keycode, pdata->keymap,
234 pdata->keymapsize * input->keycodesize); 551 pdata->keymapsize * input->keycodesize);
235 552
553 kpad->gpimap = pdata->gpimap;
554 kpad->gpimapsize = pdata->gpimapsize;
555
236 /* setup input device */ 556 /* setup input device */
237 __set_bit(EV_KEY, input->evbit); 557 __set_bit(EV_KEY, input->evbit);
238 558
@@ -243,6 +563,11 @@ static int __devinit adp5588_probe(struct i2c_client *client,
243 __set_bit(kpad->keycode[i] & KEY_MAX, input->keybit); 563 __set_bit(kpad->keycode[i] & KEY_MAX, input->keybit);
244 __clear_bit(KEY_RESERVED, input->keybit); 564 __clear_bit(KEY_RESERVED, input->keybit);
245 565
566 if (kpad->gpimapsize)
567 __set_bit(EV_SW, input->evbit);
568 for (i = 0; i < kpad->gpimapsize; i++)
569 __set_bit(kpad->gpimap[i].sw_evt, input->swbit);
570
246 error = input_register_device(input); 571 error = input_register_device(input);
247 if (error) { 572 if (error) {
248 dev_err(&client->dev, "unable to register input device\n"); 573 dev_err(&client->dev, "unable to register input device\n");
@@ -261,6 +586,13 @@ static int __devinit adp5588_probe(struct i2c_client *client,
261 if (error) 586 if (error)
262 goto err_free_irq; 587 goto err_free_irq;
263 588
589 if (kpad->gpimapsize)
590 adp5588_report_switch_state(kpad);
591
592 error = adp5588_gpio_add(kpad);
593 if (error)
594 goto err_free_irq;
595
264 device_init_wakeup(&client->dev, 1); 596 device_init_wakeup(&client->dev, 1);
265 i2c_set_clientdata(client, kpad); 597 i2c_set_clientdata(client, kpad);
266 598
@@ -287,6 +619,7 @@ static int __devexit adp5588_remove(struct i2c_client *client)
287 free_irq(client->irq, kpad); 619 free_irq(client->irq, kpad);
288 cancel_delayed_work_sync(&kpad->work); 620 cancel_delayed_work_sync(&kpad->work);
289 input_unregister_device(kpad->input); 621 input_unregister_device(kpad->input);
622 adp5588_gpio_remove(kpad);
290 kfree(kpad); 623 kfree(kpad);
291 624
292 return 0; 625 return 0;
diff --git a/drivers/input/keyboard/gpio_keys.c b/drivers/input/keyboard/gpio_keys.c
index b8213fd13c3f..a9fd147f2ba7 100644
--- a/drivers/input/keyboard/gpio_keys.c
+++ b/drivers/input/keyboard/gpio_keys.c
@@ -31,6 +31,7 @@ struct gpio_button_data {
31 struct input_dev *input; 31 struct input_dev *input;
32 struct timer_list timer; 32 struct timer_list timer;
33 struct work_struct work; 33 struct work_struct work;
34 int timer_debounce; /* in msecs */
34 bool disabled; 35 bool disabled;
35}; 36};
36 37
@@ -109,7 +110,7 @@ static void gpio_keys_disable_button(struct gpio_button_data *bdata)
109 * Disable IRQ and possible debouncing timer. 110 * Disable IRQ and possible debouncing timer.
110 */ 111 */
111 disable_irq(gpio_to_irq(bdata->button->gpio)); 112 disable_irq(gpio_to_irq(bdata->button->gpio));
112 if (bdata->button->debounce_interval) 113 if (bdata->timer_debounce)
113 del_timer_sync(&bdata->timer); 114 del_timer_sync(&bdata->timer);
114 115
115 bdata->disabled = true; 116 bdata->disabled = true;
@@ -347,9 +348,9 @@ static irqreturn_t gpio_keys_isr(int irq, void *dev_id)
347 348
348 BUG_ON(irq != gpio_to_irq(button->gpio)); 349 BUG_ON(irq != gpio_to_irq(button->gpio));
349 350
350 if (button->debounce_interval) 351 if (bdata->timer_debounce)
351 mod_timer(&bdata->timer, 352 mod_timer(&bdata->timer,
352 jiffies + msecs_to_jiffies(button->debounce_interval)); 353 jiffies + msecs_to_jiffies(bdata->timer_debounce));
353 else 354 else
354 schedule_work(&bdata->work); 355 schedule_work(&bdata->work);
355 356
@@ -383,6 +384,14 @@ static int __devinit gpio_keys_setup_key(struct platform_device *pdev,
383 goto fail3; 384 goto fail3;
384 } 385 }
385 386
387 if (button->debounce_interval) {
388 error = gpio_set_debounce(button->gpio,
389 button->debounce_interval * 1000);
390 /* use timer if gpiolib doesn't provide debounce */
391 if (error < 0)
392 bdata->timer_debounce = button->debounce_interval;
393 }
394
386 irq = gpio_to_irq(button->gpio); 395 irq = gpio_to_irq(button->gpio);
387 if (irq < 0) { 396 if (irq < 0) {
388 error = irq; 397 error = irq;
@@ -498,7 +507,7 @@ static int __devinit gpio_keys_probe(struct platform_device *pdev)
498 fail2: 507 fail2:
499 while (--i >= 0) { 508 while (--i >= 0) {
500 free_irq(gpio_to_irq(pdata->buttons[i].gpio), &ddata->data[i]); 509 free_irq(gpio_to_irq(pdata->buttons[i].gpio), &ddata->data[i]);
501 if (pdata->buttons[i].debounce_interval) 510 if (ddata->data[i].timer_debounce)
502 del_timer_sync(&ddata->data[i].timer); 511 del_timer_sync(&ddata->data[i].timer);
503 cancel_work_sync(&ddata->data[i].work); 512 cancel_work_sync(&ddata->data[i].work);
504 gpio_free(pdata->buttons[i].gpio); 513 gpio_free(pdata->buttons[i].gpio);
@@ -526,7 +535,7 @@ static int __devexit gpio_keys_remove(struct platform_device *pdev)
526 for (i = 0; i < pdata->nbuttons; i++) { 535 for (i = 0; i < pdata->nbuttons; i++) {
527 int irq = gpio_to_irq(pdata->buttons[i].gpio); 536 int irq = gpio_to_irq(pdata->buttons[i].gpio);
528 free_irq(irq, &ddata->data[i]); 537 free_irq(irq, &ddata->data[i]);
529 if (pdata->buttons[i].debounce_interval) 538 if (ddata->data[i].timer_debounce)
530 del_timer_sync(&ddata->data[i].timer); 539 del_timer_sync(&ddata->data[i].timer);
531 cancel_work_sync(&ddata->data[i].work); 540 cancel_work_sync(&ddata->data[i].work);
532 gpio_free(pdata->buttons[i].gpio); 541 gpio_free(pdata->buttons[i].gpio);
diff --git a/drivers/input/keyboard/lm8323.c b/drivers/input/keyboard/lm8323.c
index 40b032f0e32c..f7c2a166576b 100644
--- a/drivers/input/keyboard/lm8323.c
+++ b/drivers/input/keyboard/lm8323.c
@@ -642,6 +642,7 @@ static int __devinit lm8323_probe(struct i2c_client *client,
642 struct lm8323_platform_data *pdata = client->dev.platform_data; 642 struct lm8323_platform_data *pdata = client->dev.platform_data;
643 struct input_dev *idev; 643 struct input_dev *idev;
644 struct lm8323_chip *lm; 644 struct lm8323_chip *lm;
645 int pwm;
645 int i, err; 646 int i, err;
646 unsigned long tmo; 647 unsigned long tmo;
647 u8 data[2]; 648 u8 data[2];
@@ -710,8 +711,9 @@ static int __devinit lm8323_probe(struct i2c_client *client,
710 goto fail1; 711 goto fail1;
711 } 712 }
712 713
713 for (i = 0; i < LM8323_NUM_PWMS; i++) { 714 for (pwm = 0; pwm < LM8323_NUM_PWMS; pwm++) {
714 err = init_pwm(lm, i + 1, &client->dev, pdata->pwm_names[i]); 715 err = init_pwm(lm, pwm + 1, &client->dev,
716 pdata->pwm_names[pwm]);
715 if (err < 0) 717 if (err < 0)
716 goto fail2; 718 goto fail2;
717 } 719 }
@@ -764,9 +766,9 @@ fail4:
764fail3: 766fail3:
765 device_remove_file(&client->dev, &dev_attr_disable_kp); 767 device_remove_file(&client->dev, &dev_attr_disable_kp);
766fail2: 768fail2:
767 while (--i >= 0) 769 while (--pwm >= 0)
768 if (lm->pwm[i].enabled) 770 if (lm->pwm[pwm].enabled)
769 led_classdev_unregister(&lm->pwm[i].cdev); 771 led_classdev_unregister(&lm->pwm[pwm].cdev);
770fail1: 772fail1:
771 input_free_device(idev); 773 input_free_device(idev);
772 kfree(lm); 774 kfree(lm);
diff --git a/drivers/input/keyboard/matrix_keypad.c b/drivers/input/keyboard/matrix_keypad.c
index b443e088fd3c..b02e4268e18f 100644
--- a/drivers/input/keyboard/matrix_keypad.c
+++ b/drivers/input/keyboard/matrix_keypad.c
@@ -37,6 +37,7 @@ struct matrix_keypad {
37 spinlock_t lock; 37 spinlock_t lock;
38 bool scan_pending; 38 bool scan_pending;
39 bool stopped; 39 bool stopped;
40 bool gpio_all_disabled;
40}; 41};
41 42
42/* 43/*
@@ -87,8 +88,12 @@ static void enable_row_irqs(struct matrix_keypad *keypad)
87 const struct matrix_keypad_platform_data *pdata = keypad->pdata; 88 const struct matrix_keypad_platform_data *pdata = keypad->pdata;
88 int i; 89 int i;
89 90
90 for (i = 0; i < pdata->num_row_gpios; i++) 91 if (pdata->clustered_irq > 0)
91 enable_irq(gpio_to_irq(pdata->row_gpios[i])); 92 enable_irq(pdata->clustered_irq);
93 else {
94 for (i = 0; i < pdata->num_row_gpios; i++)
95 enable_irq(gpio_to_irq(pdata->row_gpios[i]));
96 }
92} 97}
93 98
94static void disable_row_irqs(struct matrix_keypad *keypad) 99static void disable_row_irqs(struct matrix_keypad *keypad)
@@ -96,8 +101,12 @@ static void disable_row_irqs(struct matrix_keypad *keypad)
96 const struct matrix_keypad_platform_data *pdata = keypad->pdata; 101 const struct matrix_keypad_platform_data *pdata = keypad->pdata;
97 int i; 102 int i;
98 103
99 for (i = 0; i < pdata->num_row_gpios; i++) 104 if (pdata->clustered_irq > 0)
100 disable_irq_nosync(gpio_to_irq(pdata->row_gpios[i])); 105 disable_irq_nosync(pdata->clustered_irq);
106 else {
107 for (i = 0; i < pdata->num_row_gpios; i++)
108 disable_irq_nosync(gpio_to_irq(pdata->row_gpios[i]));
109 }
101} 110}
102 111
103/* 112/*
@@ -216,45 +225,69 @@ static void matrix_keypad_stop(struct input_dev *dev)
216} 225}
217 226
218#ifdef CONFIG_PM 227#ifdef CONFIG_PM
219static int matrix_keypad_suspend(struct device *dev) 228static void matrix_keypad_enable_wakeup(struct matrix_keypad *keypad)
220{ 229{
221 struct platform_device *pdev = to_platform_device(dev);
222 struct matrix_keypad *keypad = platform_get_drvdata(pdev);
223 const struct matrix_keypad_platform_data *pdata = keypad->pdata; 230 const struct matrix_keypad_platform_data *pdata = keypad->pdata;
231 unsigned int gpio;
224 int i; 232 int i;
225 233
226 matrix_keypad_stop(keypad->input_dev); 234 if (pdata->clustered_irq > 0) {
235 if (enable_irq_wake(pdata->clustered_irq) == 0)
236 keypad->gpio_all_disabled = true;
237 } else {
227 238
228 if (device_may_wakeup(&pdev->dev)) {
229 for (i = 0; i < pdata->num_row_gpios; i++) { 239 for (i = 0; i < pdata->num_row_gpios; i++) {
230 if (!test_bit(i, keypad->disabled_gpios)) { 240 if (!test_bit(i, keypad->disabled_gpios)) {
231 unsigned int gpio = pdata->row_gpios[i]; 241 gpio = pdata->row_gpios[i];
232 242
233 if (enable_irq_wake(gpio_to_irq(gpio)) == 0) 243 if (enable_irq_wake(gpio_to_irq(gpio)) == 0)
234 __set_bit(i, keypad->disabled_gpios); 244 __set_bit(i, keypad->disabled_gpios);
235 } 245 }
236 } 246 }
237 } 247 }
238
239 return 0;
240} 248}
241 249
242static int matrix_keypad_resume(struct device *dev) 250static void matrix_keypad_disable_wakeup(struct matrix_keypad *keypad)
243{ 251{
244 struct platform_device *pdev = to_platform_device(dev);
245 struct matrix_keypad *keypad = platform_get_drvdata(pdev);
246 const struct matrix_keypad_platform_data *pdata = keypad->pdata; 252 const struct matrix_keypad_platform_data *pdata = keypad->pdata;
253 unsigned int gpio;
247 int i; 254 int i;
248 255
249 if (device_may_wakeup(&pdev->dev)) { 256 if (pdata->clustered_irq > 0) {
257 if (keypad->gpio_all_disabled) {
258 disable_irq_wake(pdata->clustered_irq);
259 keypad->gpio_all_disabled = false;
260 }
261 } else {
250 for (i = 0; i < pdata->num_row_gpios; i++) { 262 for (i = 0; i < pdata->num_row_gpios; i++) {
251 if (test_and_clear_bit(i, keypad->disabled_gpios)) { 263 if (test_and_clear_bit(i, keypad->disabled_gpios)) {
252 unsigned int gpio = pdata->row_gpios[i]; 264 gpio = pdata->row_gpios[i];
253
254 disable_irq_wake(gpio_to_irq(gpio)); 265 disable_irq_wake(gpio_to_irq(gpio));
255 } 266 }
256 } 267 }
257 } 268 }
269}
270
271static int matrix_keypad_suspend(struct device *dev)
272{
273 struct platform_device *pdev = to_platform_device(dev);
274 struct matrix_keypad *keypad = platform_get_drvdata(pdev);
275
276 matrix_keypad_stop(keypad->input_dev);
277
278 if (device_may_wakeup(&pdev->dev))
279 matrix_keypad_enable_wakeup(keypad);
280
281 return 0;
282}
283
284static int matrix_keypad_resume(struct device *dev)
285{
286 struct platform_device *pdev = to_platform_device(dev);
287 struct matrix_keypad *keypad = platform_get_drvdata(pdev);
288
289 if (device_may_wakeup(&pdev->dev))
290 matrix_keypad_disable_wakeup(keypad);
258 291
259 matrix_keypad_start(keypad->input_dev); 292 matrix_keypad_start(keypad->input_dev);
260 293
@@ -296,17 +329,31 @@ static int __devinit init_matrix_gpio(struct platform_device *pdev,
296 gpio_direction_input(pdata->row_gpios[i]); 329 gpio_direction_input(pdata->row_gpios[i]);
297 } 330 }
298 331
299 for (i = 0; i < pdata->num_row_gpios; i++) { 332 if (pdata->clustered_irq > 0) {
300 err = request_irq(gpio_to_irq(pdata->row_gpios[i]), 333 err = request_irq(pdata->clustered_irq,
301 matrix_keypad_interrupt, 334 matrix_keypad_interrupt,
302 IRQF_DISABLED | 335 pdata->clustered_irq_flags,
303 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
304 "matrix-keypad", keypad); 336 "matrix-keypad", keypad);
305 if (err) { 337 if (err) {
306 dev_err(&pdev->dev, 338 dev_err(&pdev->dev,
307 "Unable to acquire interrupt for GPIO line %i\n", 339 "Unable to acquire clustered interrupt\n");
308 pdata->row_gpios[i]); 340 goto err_free_rows;
309 goto err_free_irqs; 341 }
342 } else {
343 for (i = 0; i < pdata->num_row_gpios; i++) {
344 err = request_irq(gpio_to_irq(pdata->row_gpios[i]),
345 matrix_keypad_interrupt,
346 IRQF_DISABLED |
347 IRQF_TRIGGER_RISING |
348 IRQF_TRIGGER_FALLING,
349 "matrix-keypad", keypad);
350 if (err) {
351 dev_err(&pdev->dev,
352 "Unable to acquire interrupt "
353 "for GPIO line %i\n",
354 pdata->row_gpios[i]);
355 goto err_free_irqs;
356 }
310 } 357 }
311 } 358 }
312 359
@@ -418,11 +465,16 @@ static int __devexit matrix_keypad_remove(struct platform_device *pdev)
418 465
419 device_init_wakeup(&pdev->dev, 0); 466 device_init_wakeup(&pdev->dev, 0);
420 467
421 for (i = 0; i < pdata->num_row_gpios; i++) { 468 if (pdata->clustered_irq > 0) {
422 free_irq(gpio_to_irq(pdata->row_gpios[i]), keypad); 469 free_irq(pdata->clustered_irq, keypad);
423 gpio_free(pdata->row_gpios[i]); 470 } else {
471 for (i = 0; i < pdata->num_row_gpios; i++)
472 free_irq(gpio_to_irq(pdata->row_gpios[i]), keypad);
424 } 473 }
425 474
475 for (i = 0; i < pdata->num_row_gpios; i++)
476 gpio_free(pdata->row_gpios[i]);
477
426 for (i = 0; i < pdata->num_col_gpios; i++) 478 for (i = 0; i < pdata->num_col_gpios; i++)
427 gpio_free(pdata->col_gpios[i]); 479 gpio_free(pdata->col_gpios[i]);
428 480
diff --git a/drivers/input/keyboard/mcs_touchkey.c b/drivers/input/keyboard/mcs_touchkey.c
new file mode 100644
index 000000000000..63b849d7e90b
--- /dev/null
+++ b/drivers/input/keyboard/mcs_touchkey.c
@@ -0,0 +1,239 @@
1/*
2 * mcs_touchkey.c - Touchkey driver for MELFAS MCS5000/5080 controller
3 *
4 * Copyright (C) 2010 Samsung Electronics Co.Ltd
5 * Author: HeungJun Kim <riverful.kim@samsung.com>
6 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/i2c.h>
17#include <linux/i2c/mcs.h>
18#include <linux/interrupt.h>
19#include <linux/input.h>
20#include <linux/irq.h>
21#include <linux/slab.h>
22
23/* MCS5000 Touchkey */
24#define MCS5000_TOUCHKEY_STATUS 0x04
25#define MCS5000_TOUCHKEY_STATUS_PRESS 7
26#define MCS5000_TOUCHKEY_FW 0x0a
27#define MCS5000_TOUCHKEY_BASE_VAL 0x61
28
29/* MCS5080 Touchkey */
30#define MCS5080_TOUCHKEY_STATUS 0x00
31#define MCS5080_TOUCHKEY_STATUS_PRESS 3
32#define MCS5080_TOUCHKEY_FW 0x01
33#define MCS5080_TOUCHKEY_BASE_VAL 0x1
34
35enum mcs_touchkey_type {
36 MCS5000_TOUCHKEY,
37 MCS5080_TOUCHKEY,
38};
39
40struct mcs_touchkey_chip {
41 unsigned int status_reg;
42 unsigned int pressbit;
43 unsigned int press_invert;
44 unsigned int baseval;
45};
46
47struct mcs_touchkey_data {
48 struct i2c_client *client;
49 struct input_dev *input_dev;
50 struct mcs_touchkey_chip chip;
51 unsigned int key_code;
52 unsigned int key_val;
53 unsigned short keycodes[];
54};
55
56static irqreturn_t mcs_touchkey_interrupt(int irq, void *dev_id)
57{
58 struct mcs_touchkey_data *data = dev_id;
59 struct mcs_touchkey_chip *chip = &data->chip;
60 struct i2c_client *client = data->client;
61 struct input_dev *input = data->input_dev;
62 unsigned int key_val;
63 unsigned int pressed;
64 int val;
65
66 val = i2c_smbus_read_byte_data(client, chip->status_reg);
67 if (val < 0) {
68 dev_err(&client->dev, "i2c read error [%d]\n", val);
69 goto out;
70 }
71
72 pressed = (val & (1 << chip->pressbit)) >> chip->pressbit;
73 if (chip->press_invert)
74 pressed ^= chip->press_invert;
75
76 /* key_val is 0 when released, so we should use key_val of press. */
77 if (pressed) {
78 key_val = val & (0xff >> (8 - chip->pressbit));
79 if (!key_val)
80 goto out;
81 key_val -= chip->baseval;
82 data->key_code = data->keycodes[key_val];
83 data->key_val = key_val;
84 }
85
86 input_event(input, EV_MSC, MSC_SCAN, data->key_val);
87 input_report_key(input, data->key_code, pressed);
88 input_sync(input);
89
90 dev_dbg(&client->dev, "key %d %d %s\n", data->key_val, data->key_code,
91 pressed ? "pressed" : "released");
92
93 out:
94 return IRQ_HANDLED;
95}
96
97static int __devinit mcs_touchkey_probe(struct i2c_client *client,
98 const struct i2c_device_id *id)
99{
100 const struct mcs_platform_data *pdata;
101 struct mcs_touchkey_data *data;
102 struct input_dev *input_dev;
103 unsigned int fw_reg;
104 int fw_ver;
105 int error;
106 int i;
107
108 pdata = client->dev.platform_data;
109 if (!pdata) {
110 dev_err(&client->dev, "no platform data defined\n");
111 return -EINVAL;
112 }
113
114 data = kzalloc(sizeof(struct mcs_touchkey_data) +
115 sizeof(data->keycodes[0]) * (pdata->key_maxval + 1),
116 GFP_KERNEL);
117 input_dev = input_allocate_device();
118 if (!data || !input_dev) {
119 dev_err(&client->dev, "Failed to allocate memory\n");
120 error = -ENOMEM;
121 goto err_free_mem;
122 }
123
124 data->client = client;
125 data->input_dev = input_dev;
126
127 if (id->driver_data == MCS5000_TOUCHKEY) {
128 data->chip.status_reg = MCS5000_TOUCHKEY_STATUS;
129 data->chip.pressbit = MCS5000_TOUCHKEY_STATUS_PRESS;
130 data->chip.baseval = MCS5000_TOUCHKEY_BASE_VAL;
131 fw_reg = MCS5000_TOUCHKEY_FW;
132 } else {
133 data->chip.status_reg = MCS5080_TOUCHKEY_STATUS;
134 data->chip.pressbit = MCS5080_TOUCHKEY_STATUS_PRESS;
135 data->chip.press_invert = 1;
136 data->chip.baseval = MCS5080_TOUCHKEY_BASE_VAL;
137 fw_reg = MCS5080_TOUCHKEY_FW;
138 }
139
140 fw_ver = i2c_smbus_read_byte_data(client, fw_reg);
141 if (fw_ver < 0) {
142 error = fw_ver;
143 dev_err(&client->dev, "i2c read error[%d]\n", error);
144 goto err_free_mem;
145 }
146 dev_info(&client->dev, "Firmware version: %d\n", fw_ver);
147
148 input_dev->name = "MELPAS MCS Touchkey";
149 input_dev->id.bustype = BUS_I2C;
150 input_dev->dev.parent = &client->dev;
151 input_dev->evbit[0] = BIT_MASK(EV_KEY);
152 if (!pdata->no_autorepeat)
153 input_dev->evbit[0] |= BIT_MASK(EV_REP);
154 input_dev->keycode = data->keycodes;
155 input_dev->keycodesize = sizeof(data->keycodes[0]);
156 input_dev->keycodemax = pdata->key_maxval + 1;
157
158 for (i = 0; i < pdata->keymap_size; i++) {
159 unsigned int val = MCS_KEY_VAL(pdata->keymap[i]);
160 unsigned int code = MCS_KEY_CODE(pdata->keymap[i]);
161
162 data->keycodes[val] = code;
163 __set_bit(code, input_dev->keybit);
164 }
165
166 input_set_capability(input_dev, EV_MSC, MSC_SCAN);
167 input_set_drvdata(input_dev, data);
168
169 if (pdata->cfg_pin)
170 pdata->cfg_pin();
171
172 error = request_threaded_irq(client->irq, NULL, mcs_touchkey_interrupt,
173 IRQF_TRIGGER_FALLING, client->dev.driver->name, data);
174 if (error) {
175 dev_err(&client->dev, "Failed to register interrupt\n");
176 goto err_free_mem;
177 }
178
179 error = input_register_device(input_dev);
180 if (error)
181 goto err_free_irq;
182
183 i2c_set_clientdata(client, data);
184 return 0;
185
186err_free_irq:
187 free_irq(client->irq, data);
188err_free_mem:
189 input_free_device(input_dev);
190 kfree(data);
191 return error;
192}
193
194static int __devexit mcs_touchkey_remove(struct i2c_client *client)
195{
196 struct mcs_touchkey_data *data = i2c_get_clientdata(client);
197
198 free_irq(client->irq, data);
199 input_unregister_device(data->input_dev);
200 kfree(data);
201
202 return 0;
203}
204
205static const struct i2c_device_id mcs_touchkey_id[] = {
206 { "mcs5000_touchkey", MCS5000_TOUCHKEY },
207 { "mcs5080_touchkey", MCS5080_TOUCHKEY },
208 { }
209};
210MODULE_DEVICE_TABLE(i2c, mcs_touchkey_id);
211
212static struct i2c_driver mcs_touchkey_driver = {
213 .driver = {
214 .name = "mcs_touchkey",
215 .owner = THIS_MODULE,
216 },
217 .probe = mcs_touchkey_probe,
218 .remove = __devexit_p(mcs_touchkey_remove),
219 .id_table = mcs_touchkey_id,
220};
221
222static int __init mcs_touchkey_init(void)
223{
224 return i2c_add_driver(&mcs_touchkey_driver);
225}
226
227static void __exit mcs_touchkey_exit(void)
228{
229 i2c_del_driver(&mcs_touchkey_driver);
230}
231
232module_init(mcs_touchkey_init);
233module_exit(mcs_touchkey_exit);
234
235/* Module information */
236MODULE_AUTHOR("Joonyoung Shim <jy0922.shim@samsung.com>");
237MODULE_AUTHOR("HeungJun Kim <riverful.kim@samsung.com>");
238MODULE_DESCRIPTION("Touchkey driver for MELFAS MCS5000/5080 controller");
239MODULE_LICENSE("GPL");
diff --git a/drivers/input/keyboard/samsung-keypad.c b/drivers/input/keyboard/samsung-keypad.c
new file mode 100644
index 000000000000..f689f49e3109
--- /dev/null
+++ b/drivers/input/keyboard/samsung-keypad.c
@@ -0,0 +1,491 @@
1/*
2 * Samsung keypad driver
3 *
4 * Copyright (C) 2010 Samsung Electronics Co.Ltd
5 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
6 * Author: Donghwa Lee <dh09.lee@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/err.h>
17#include <linux/init.h>
18#include <linux/input.h>
19#include <linux/interrupt.h>
20#include <linux/io.h>
21#include <linux/module.h>
22#include <linux/platform_device.h>
23#include <linux/slab.h>
24#include <linux/sched.h>
25#include <plat/keypad.h>
26
27#define SAMSUNG_KEYIFCON 0x00
28#define SAMSUNG_KEYIFSTSCLR 0x04
29#define SAMSUNG_KEYIFCOL 0x08
30#define SAMSUNG_KEYIFROW 0x0c
31#define SAMSUNG_KEYIFFC 0x10
32
33/* SAMSUNG_KEYIFCON */
34#define SAMSUNG_KEYIFCON_INT_F_EN (1 << 0)
35#define SAMSUNG_KEYIFCON_INT_R_EN (1 << 1)
36#define SAMSUNG_KEYIFCON_DF_EN (1 << 2)
37#define SAMSUNG_KEYIFCON_FC_EN (1 << 3)
38#define SAMSUNG_KEYIFCON_WAKEUPEN (1 << 4)
39
40/* SAMSUNG_KEYIFSTSCLR */
41#define SAMSUNG_KEYIFSTSCLR_P_INT_MASK (0xff << 0)
42#define SAMSUNG_KEYIFSTSCLR_R_INT_MASK (0xff << 8)
43#define SAMSUNG_KEYIFSTSCLR_R_INT_OFFSET 8
44#define S5PV210_KEYIFSTSCLR_P_INT_MASK (0x3fff << 0)
45#define S5PV210_KEYIFSTSCLR_R_INT_MASK (0x3fff << 16)
46#define S5PV210_KEYIFSTSCLR_R_INT_OFFSET 16
47
48/* SAMSUNG_KEYIFCOL */
49#define SAMSUNG_KEYIFCOL_MASK (0xff << 0)
50#define S5PV210_KEYIFCOLEN_MASK (0xff << 8)
51
52/* SAMSUNG_KEYIFROW */
53#define SAMSUNG_KEYIFROW_MASK (0xff << 0)
54#define S5PV210_KEYIFROW_MASK (0x3fff << 0)
55
56/* SAMSUNG_KEYIFFC */
57#define SAMSUNG_KEYIFFC_MASK (0x3ff << 0)
58
59enum samsung_keypad_type {
60 KEYPAD_TYPE_SAMSUNG,
61 KEYPAD_TYPE_S5PV210,
62};
63
64struct samsung_keypad {
65 struct input_dev *input_dev;
66 struct clk *clk;
67 void __iomem *base;
68 wait_queue_head_t wait;
69 bool stopped;
70 int irq;
71 unsigned int row_shift;
72 unsigned int rows;
73 unsigned int cols;
74 unsigned int row_state[SAMSUNG_MAX_COLS];
75 unsigned short keycodes[];
76};
77
78static int samsung_keypad_is_s5pv210(struct device *dev)
79{
80 struct platform_device *pdev = to_platform_device(dev);
81 enum samsung_keypad_type type =
82 platform_get_device_id(pdev)->driver_data;
83
84 return type == KEYPAD_TYPE_S5PV210;
85}
86
87static void samsung_keypad_scan(struct samsung_keypad *keypad,
88 unsigned int *row_state)
89{
90 struct device *dev = keypad->input_dev->dev.parent;
91 unsigned int col;
92 unsigned int val;
93
94 for (col = 0; col < keypad->cols; col++) {
95 if (samsung_keypad_is_s5pv210(dev)) {
96 val = S5PV210_KEYIFCOLEN_MASK;
97 val &= ~(1 << col) << 8;
98 } else {
99 val = SAMSUNG_KEYIFCOL_MASK;
100 val &= ~(1 << col);
101 }
102
103 writel(val, keypad->base + SAMSUNG_KEYIFCOL);
104 mdelay(1);
105
106 val = readl(keypad->base + SAMSUNG_KEYIFROW);
107 row_state[col] = ~val & ((1 << keypad->rows) - 1);
108 }
109
110 /* KEYIFCOL reg clear */
111 writel(0, keypad->base + SAMSUNG_KEYIFCOL);
112}
113
114static bool samsung_keypad_report(struct samsung_keypad *keypad,
115 unsigned int *row_state)
116{
117 struct input_dev *input_dev = keypad->input_dev;
118 unsigned int changed;
119 unsigned int pressed;
120 unsigned int key_down = 0;
121 unsigned int val;
122 unsigned int col, row;
123
124 for (col = 0; col < keypad->cols; col++) {
125 changed = row_state[col] ^ keypad->row_state[col];
126 key_down |= row_state[col];
127 if (!changed)
128 continue;
129
130 for (row = 0; row < keypad->rows; row++) {
131 if (!(changed & (1 << row)))
132 continue;
133
134 pressed = row_state[col] & (1 << row);
135
136 dev_dbg(&keypad->input_dev->dev,
137 "key %s, row: %d, col: %d\n",
138 pressed ? "pressed" : "released", row, col);
139
140 val = MATRIX_SCAN_CODE(row, col, keypad->row_shift);
141
142 input_event(input_dev, EV_MSC, MSC_SCAN, val);
143 input_report_key(input_dev,
144 keypad->keycodes[val], pressed);
145 }
146 input_sync(keypad->input_dev);
147 }
148
149 memcpy(keypad->row_state, row_state, sizeof(keypad->row_state));
150
151 return key_down;
152}
153
154static irqreturn_t samsung_keypad_irq(int irq, void *dev_id)
155{
156 struct samsung_keypad *keypad = dev_id;
157 unsigned int row_state[SAMSUNG_MAX_COLS];
158 unsigned int val;
159 bool key_down;
160
161 do {
162 val = readl(keypad->base + SAMSUNG_KEYIFSTSCLR);
163 /* Clear interrupt. */
164 writel(~0x0, keypad->base + SAMSUNG_KEYIFSTSCLR);
165
166 samsung_keypad_scan(keypad, row_state);
167
168 key_down = samsung_keypad_report(keypad, row_state);
169 if (key_down)
170 wait_event_timeout(keypad->wait, keypad->stopped,
171 msecs_to_jiffies(50));
172
173 } while (key_down && !keypad->stopped);
174
175 return IRQ_HANDLED;
176}
177
178static void samsung_keypad_start(struct samsung_keypad *keypad)
179{
180 unsigned int val;
181
182 /* Tell IRQ thread that it may poll the device. */
183 keypad->stopped = false;
184
185 clk_enable(keypad->clk);
186
187 /* Enable interrupt bits. */
188 val = readl(keypad->base + SAMSUNG_KEYIFCON);
189 val |= SAMSUNG_KEYIFCON_INT_F_EN | SAMSUNG_KEYIFCON_INT_R_EN;
190 writel(val, keypad->base + SAMSUNG_KEYIFCON);
191
192 /* KEYIFCOL reg clear. */
193 writel(0, keypad->base + SAMSUNG_KEYIFCOL);
194}
195
196static void samsung_keypad_stop(struct samsung_keypad *keypad)
197{
198 unsigned int val;
199
200 /* Signal IRQ thread to stop polling and disable the handler. */
201 keypad->stopped = true;
202 wake_up(&keypad->wait);
203 disable_irq(keypad->irq);
204
205 /* Clear interrupt. */
206 writel(~0x0, keypad->base + SAMSUNG_KEYIFSTSCLR);
207
208 /* Disable interrupt bits. */
209 val = readl(keypad->base + SAMSUNG_KEYIFCON);
210 val &= ~(SAMSUNG_KEYIFCON_INT_F_EN | SAMSUNG_KEYIFCON_INT_R_EN);
211 writel(val, keypad->base + SAMSUNG_KEYIFCON);
212
213 clk_disable(keypad->clk);
214
215 /*
216 * Now that chip should not generate interrupts we can safely
217 * re-enable the handler.
218 */
219 enable_irq(keypad->irq);
220}
221
222static int samsung_keypad_open(struct input_dev *input_dev)
223{
224 struct samsung_keypad *keypad = input_get_drvdata(input_dev);
225
226 samsung_keypad_start(keypad);
227
228 return 0;
229}
230
231static void samsung_keypad_close(struct input_dev *input_dev)
232{
233 struct samsung_keypad *keypad = input_get_drvdata(input_dev);
234
235 samsung_keypad_stop(keypad);
236}
237
238static int __devinit samsung_keypad_probe(struct platform_device *pdev)
239{
240 const struct samsung_keypad_platdata *pdata;
241 const struct matrix_keymap_data *keymap_data;
242 struct samsung_keypad *keypad;
243 struct resource *res;
244 struct input_dev *input_dev;
245 unsigned int row_shift;
246 unsigned int keymap_size;
247 int error;
248
249 pdata = pdev->dev.platform_data;
250 if (!pdata) {
251 dev_err(&pdev->dev, "no platform data defined\n");
252 return -EINVAL;
253 }
254
255 keymap_data = pdata->keymap_data;
256 if (!keymap_data) {
257 dev_err(&pdev->dev, "no keymap data defined\n");
258 return -EINVAL;
259 }
260
261 if (!pdata->rows || pdata->rows > SAMSUNG_MAX_ROWS)
262 return -EINVAL;
263
264 if (!pdata->cols || pdata->cols > SAMSUNG_MAX_COLS)
265 return -EINVAL;
266
267 /* initialize the gpio */
268 if (pdata->cfg_gpio)
269 pdata->cfg_gpio(pdata->rows, pdata->cols);
270
271 row_shift = get_count_order(pdata->cols);
272 keymap_size = (pdata->rows << row_shift) * sizeof(keypad->keycodes[0]);
273
274 keypad = kzalloc(sizeof(*keypad) + keymap_size, GFP_KERNEL);
275 input_dev = input_allocate_device();
276 if (!keypad || !input_dev) {
277 error = -ENOMEM;
278 goto err_free_mem;
279 }
280
281 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
282 if (!res) {
283 error = -ENODEV;
284 goto err_free_mem;
285 }
286
287 keypad->base = ioremap(res->start, resource_size(res));
288 if (!keypad->base) {
289 error = -EBUSY;
290 goto err_free_mem;
291 }
292
293 keypad->clk = clk_get(&pdev->dev, "keypad");
294 if (IS_ERR(keypad->clk)) {
295 dev_err(&pdev->dev, "failed to get keypad clk\n");
296 error = PTR_ERR(keypad->clk);
297 goto err_unmap_base;
298 }
299
300 keypad->input_dev = input_dev;
301 keypad->row_shift = row_shift;
302 keypad->rows = pdata->rows;
303 keypad->cols = pdata->cols;
304 init_waitqueue_head(&keypad->wait);
305
306 input_dev->name = pdev->name;
307 input_dev->id.bustype = BUS_HOST;
308 input_dev->dev.parent = &pdev->dev;
309 input_set_drvdata(input_dev, keypad);
310
311 input_dev->open = samsung_keypad_open;
312 input_dev->close = samsung_keypad_close;
313
314 input_dev->evbit[0] = BIT_MASK(EV_KEY);
315 if (!pdata->no_autorepeat)
316 input_dev->evbit[0] |= BIT_MASK(EV_REP);
317
318 input_set_capability(input_dev, EV_MSC, MSC_SCAN);
319
320 input_dev->keycode = keypad->keycodes;
321 input_dev->keycodesize = sizeof(keypad->keycodes[0]);
322 input_dev->keycodemax = pdata->rows << row_shift;
323
324 matrix_keypad_build_keymap(keymap_data, row_shift,
325 input_dev->keycode, input_dev->keybit);
326
327 keypad->irq = platform_get_irq(pdev, 0);
328 if (keypad->irq < 0) {
329 error = keypad->irq;
330 goto err_put_clk;
331 }
332
333 error = request_threaded_irq(keypad->irq, NULL, samsung_keypad_irq,
334 IRQF_ONESHOT, dev_name(&pdev->dev), keypad);
335 if (error) {
336 dev_err(&pdev->dev, "failed to register keypad interrupt\n");
337 goto err_put_clk;
338 }
339
340 error = input_register_device(keypad->input_dev);
341 if (error)
342 goto err_free_irq;
343
344 device_init_wakeup(&pdev->dev, pdata->wakeup);
345 platform_set_drvdata(pdev, keypad);
346 return 0;
347
348err_free_irq:
349 free_irq(keypad->irq, keypad);
350err_put_clk:
351 clk_put(keypad->clk);
352err_unmap_base:
353 iounmap(keypad->base);
354err_free_mem:
355 input_free_device(input_dev);
356 kfree(keypad);
357
358 return error;
359}
360
361static int __devexit samsung_keypad_remove(struct platform_device *pdev)
362{
363 struct samsung_keypad *keypad = platform_get_drvdata(pdev);
364
365 device_init_wakeup(&pdev->dev, 0);
366 platform_set_drvdata(pdev, NULL);
367
368 input_unregister_device(keypad->input_dev);
369
370 /*
371 * It is safe to free IRQ after unregistering device because
372 * samsung_keypad_close will shut off interrupts.
373 */
374 free_irq(keypad->irq, keypad);
375
376 clk_put(keypad->clk);
377
378 iounmap(keypad->base);
379 kfree(keypad);
380
381 return 0;
382}
383
384#ifdef CONFIG_PM
385static void samsung_keypad_toggle_wakeup(struct samsung_keypad *keypad,
386 bool enable)
387{
388 struct device *dev = keypad->input_dev->dev.parent;
389 unsigned int val;
390
391 clk_enable(keypad->clk);
392
393 val = readl(keypad->base + SAMSUNG_KEYIFCON);
394 if (enable) {
395 val |= SAMSUNG_KEYIFCON_WAKEUPEN;
396 if (device_may_wakeup(dev))
397 enable_irq_wake(keypad->irq);
398 } else {
399 val &= ~SAMSUNG_KEYIFCON_WAKEUPEN;
400 if (device_may_wakeup(dev))
401 disable_irq_wake(keypad->irq);
402 }
403 writel(val, keypad->base + SAMSUNG_KEYIFCON);
404
405 clk_disable(keypad->clk);
406}
407
408static int samsung_keypad_suspend(struct device *dev)
409{
410 struct platform_device *pdev = to_platform_device(dev);
411 struct samsung_keypad *keypad = platform_get_drvdata(pdev);
412 struct input_dev *input_dev = keypad->input_dev;
413
414 mutex_lock(&input_dev->mutex);
415
416 if (input_dev->users)
417 samsung_keypad_stop(keypad);
418
419 samsung_keypad_toggle_wakeup(keypad, true);
420
421 mutex_unlock(&input_dev->mutex);
422
423 return 0;
424}
425
426static int samsung_keypad_resume(struct device *dev)
427{
428 struct platform_device *pdev = to_platform_device(dev);
429 struct samsung_keypad *keypad = platform_get_drvdata(pdev);
430 struct input_dev *input_dev = keypad->input_dev;
431
432 mutex_lock(&input_dev->mutex);
433
434 samsung_keypad_toggle_wakeup(keypad, false);
435
436 if (input_dev->users)
437 samsung_keypad_start(keypad);
438
439 mutex_unlock(&input_dev->mutex);
440
441 return 0;
442}
443
444static const struct dev_pm_ops samsung_keypad_pm_ops = {
445 .suspend = samsung_keypad_suspend,
446 .resume = samsung_keypad_resume,
447};
448#endif
449
450static struct platform_device_id samsung_keypad_driver_ids[] = {
451 {
452 .name = "samsung-keypad",
453 .driver_data = KEYPAD_TYPE_SAMSUNG,
454 }, {
455 .name = "s5pv210-keypad",
456 .driver_data = KEYPAD_TYPE_S5PV210,
457 },
458 { },
459};
460MODULE_DEVICE_TABLE(platform, samsung_keypad_driver_ids);
461
462static struct platform_driver samsung_keypad_driver = {
463 .probe = samsung_keypad_probe,
464 .remove = __devexit_p(samsung_keypad_remove),
465 .driver = {
466 .name = "samsung-keypad",
467 .owner = THIS_MODULE,
468#ifdef CONFIG_PM
469 .pm = &samsung_keypad_pm_ops,
470#endif
471 },
472 .id_table = samsung_keypad_driver_ids,
473};
474
475static int __init samsung_keypad_init(void)
476{
477 return platform_driver_register(&samsung_keypad_driver);
478}
479module_init(samsung_keypad_init);
480
481static void __exit samsung_keypad_exit(void)
482{
483 platform_driver_unregister(&samsung_keypad_driver);
484}
485module_exit(samsung_keypad_exit);
486
487MODULE_DESCRIPTION("Samsung keypad driver");
488MODULE_AUTHOR("Joonyoung Shim <jy0922.shim@samsung.com>");
489MODULE_AUTHOR("Donghwa Lee <dh09.lee@samsung.com>");
490MODULE_LICENSE("GPL");
491MODULE_ALIAS("platform:samsung-keypad");
diff --git a/drivers/input/keyboard/twl4030_keypad.c b/drivers/input/keyboard/twl4030_keypad.c
index 7aa59e07b689..fb16b5e5ea13 100644
--- a/drivers/input/keyboard/twl4030_keypad.c
+++ b/drivers/input/keyboard/twl4030_keypad.c
@@ -51,8 +51,12 @@
51 */ 51 */
52#define TWL4030_MAX_ROWS 8 /* TWL4030 hard limit */ 52#define TWL4030_MAX_ROWS 8 /* TWL4030 hard limit */
53#define TWL4030_MAX_COLS 8 53#define TWL4030_MAX_COLS 8
54#define TWL4030_ROW_SHIFT 3 54/*
55#define TWL4030_KEYMAP_SIZE (TWL4030_MAX_ROWS * TWL4030_MAX_COLS) 55 * Note that we add space for an extra column so that we can handle
56 * row lines connected to the gnd (see twl4030_col_xlate()).
57 */
58#define TWL4030_ROW_SHIFT 4
59#define TWL4030_KEYMAP_SIZE (TWL4030_MAX_ROWS << TWL4030_ROW_SHIFT)
56 60
57struct twl4030_keypad { 61struct twl4030_keypad {
58 unsigned short keymap[TWL4030_KEYMAP_SIZE]; 62 unsigned short keymap[TWL4030_KEYMAP_SIZE];
@@ -182,7 +186,7 @@ static int twl4030_read_kp_matrix_state(struct twl4030_keypad *kp, u16 *state)
182 return ret; 186 return ret;
183} 187}
184 188
185static int twl4030_is_in_ghost_state(struct twl4030_keypad *kp, u16 *key_state) 189static bool twl4030_is_in_ghost_state(struct twl4030_keypad *kp, u16 *key_state)
186{ 190{
187 int i; 191 int i;
188 u16 check = 0; 192 u16 check = 0;
@@ -191,12 +195,12 @@ static int twl4030_is_in_ghost_state(struct twl4030_keypad *kp, u16 *key_state)
191 u16 col = key_state[i]; 195 u16 col = key_state[i];
192 196
193 if ((col & check) && hweight16(col) > 1) 197 if ((col & check) && hweight16(col) > 1)
194 return 1; 198 return true;
195 199
196 check |= col; 200 check |= col;
197 } 201 }
198 202
199 return 0; 203 return false;
200} 204}
201 205
202static void twl4030_kp_scan(struct twl4030_keypad *kp, bool release_all) 206static void twl4030_kp_scan(struct twl4030_keypad *kp, bool release_all)
@@ -225,7 +229,8 @@ static void twl4030_kp_scan(struct twl4030_keypad *kp, bool release_all)
225 if (!changed) 229 if (!changed)
226 continue; 230 continue;
227 231
228 for (col = 0; col < kp->n_cols; col++) { 232 /* Extra column handles "all gnd" rows */
233 for (col = 0; col < kp->n_cols + 1; col++) {
229 int code; 234 int code;
230 235
231 if (!(changed & (1 << col))) 236 if (!(changed & (1 << col)))
diff --git a/drivers/input/keyboard/w90p910_keypad.c b/drivers/input/keyboard/w90p910_keypad.c
index 4ef764cc493c..ee2bf6bcf291 100644
--- a/drivers/input/keyboard/w90p910_keypad.c
+++ b/drivers/input/keyboard/w90p910_keypad.c
@@ -258,7 +258,7 @@ static struct platform_driver w90p910_keypad_driver = {
258 .probe = w90p910_keypad_probe, 258 .probe = w90p910_keypad_probe,
259 .remove = __devexit_p(w90p910_keypad_remove), 259 .remove = __devexit_p(w90p910_keypad_remove),
260 .driver = { 260 .driver = {
261 .name = "nuc900-keypad", 261 .name = "nuc900-kpi",
262 .owner = THIS_MODULE, 262 .owner = THIS_MODULE,
263 }, 263 },
264}; 264};
diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
index c44b9eafc556..b49e23379723 100644
--- a/drivers/input/misc/Kconfig
+++ b/drivers/input/misc/Kconfig
@@ -327,6 +327,17 @@ config INPUT_PCF8574
327 To compile this driver as a module, choose M here: the 327 To compile this driver as a module, choose M here: the
328 module will be called pcf8574_keypad. 328 module will be called pcf8574_keypad.
329 329
330config INPUT_PWM_BEEPER
331 tristate "PWM beeper support"
332 depends on HAVE_PWM
333 help
334 Say Y here to get support for PWM based beeper devices.
335
336 If unsure, say N.
337
338 To compile this driver as a module, choose M here: the module will be
339 called pwm-beeper.
340
330config INPUT_GPIO_ROTARY_ENCODER 341config INPUT_GPIO_ROTARY_ENCODER
331 tristate "Rotary encoders connected to GPIO pins" 342 tristate "Rotary encoders connected to GPIO pins"
332 depends on GPIOLIB && GENERIC_GPIO 343 depends on GPIOLIB && GENERIC_GPIO
@@ -390,4 +401,41 @@ config INPUT_PCAP
390 To compile this driver as a module, choose M here: the 401 To compile this driver as a module, choose M here: the
391 module will be called pcap_keys. 402 module will be called pcap_keys.
392 403
404config INPUT_ADXL34X
405 tristate "Analog Devices ADXL34x Three-Axis Digital Accelerometer"
406 default n
407 help
408 Say Y here if you have a Accelerometer interface using the
409 ADXL345/6 controller, and your board-specific initialization
410 code includes that in its table of devices.
411
412 This driver can use either I2C or SPI communication to the
413 ADXL345/6 controller. Select the appropriate method for
414 your system.
415
416 If unsure, say N (but it's safe to say "Y").
417
418 To compile this driver as a module, choose M here: the
419 module will be called adxl34x.
420
421config INPUT_ADXL34X_I2C
422 tristate "support I2C bus connection"
423 depends on INPUT_ADXL34X && I2C
424 default y
425 help
426 Say Y here if you have ADXL345/6 hooked to an I2C bus.
427
428 To compile this driver as a module, choose M here: the
429 module will be called adxl34x-i2c.
430
431config INPUT_ADXL34X_SPI
432 tristate "support SPI bus connection"
433 depends on INPUT_ADXL34X && SPI
434 default y
435 help
436 Say Y here if you have ADXL345/6 hooked to a SPI bus.
437
438 To compile this driver as a module, choose M here: the
439 module will be called adxl34x-spi.
440
393endif 441endif
diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile
index 71fe57d8023f..19ccca78fa76 100644
--- a/drivers/input/misc/Makefile
+++ b/drivers/input/misc/Makefile
@@ -8,6 +8,9 @@ obj-$(CONFIG_INPUT_88PM860X_ONKEY) += 88pm860x_onkey.o
8obj-$(CONFIG_INPUT_AD714X) += ad714x.o 8obj-$(CONFIG_INPUT_AD714X) += ad714x.o
9obj-$(CONFIG_INPUT_AD714X_I2C) += ad714x-i2c.o 9obj-$(CONFIG_INPUT_AD714X_I2C) += ad714x-i2c.o
10obj-$(CONFIG_INPUT_AD714X_SPI) += ad714x-spi.o 10obj-$(CONFIG_INPUT_AD714X_SPI) += ad714x-spi.o
11obj-$(CONFIG_INPUT_ADXL34X) += adxl34x.o
12obj-$(CONFIG_INPUT_ADXL34X_I2C) += adxl34x-i2c.o
13obj-$(CONFIG_INPUT_ADXL34X_SPI) += adxl34x-spi.o
11obj-$(CONFIG_INPUT_APANEL) += apanel.o 14obj-$(CONFIG_INPUT_APANEL) += apanel.o
12obj-$(CONFIG_INPUT_ATI_REMOTE) += ati_remote.o 15obj-$(CONFIG_INPUT_ATI_REMOTE) += ati_remote.o
13obj-$(CONFIG_INPUT_ATI_REMOTE2) += ati_remote2.o 16obj-$(CONFIG_INPUT_ATI_REMOTE2) += ati_remote2.o
@@ -26,6 +29,7 @@ obj-$(CONFIG_INPUT_PCF50633_PMU) += pcf50633-input.o
26obj-$(CONFIG_INPUT_PCF8574) += pcf8574_keypad.o 29obj-$(CONFIG_INPUT_PCF8574) += pcf8574_keypad.o
27obj-$(CONFIG_INPUT_PCSPKR) += pcspkr.o 30obj-$(CONFIG_INPUT_PCSPKR) += pcspkr.o
28obj-$(CONFIG_INPUT_POWERMATE) += powermate.o 31obj-$(CONFIG_INPUT_POWERMATE) += powermate.o
32obj-$(CONFIG_INPUT_PWM_BEEPER) += pwm-beeper.o
29obj-$(CONFIG_INPUT_RB532_BUTTON) += rb532_button.o 33obj-$(CONFIG_INPUT_RB532_BUTTON) += rb532_button.o
30obj-$(CONFIG_INPUT_GPIO_ROTARY_ENCODER) += rotary_encoder.o 34obj-$(CONFIG_INPUT_GPIO_ROTARY_ENCODER) += rotary_encoder.o
31obj-$(CONFIG_INPUT_SGI_BTNS) += sgi_btns.o 35obj-$(CONFIG_INPUT_SGI_BTNS) += sgi_btns.o
diff --git a/drivers/input/misc/ad714x.c b/drivers/input/misc/ad714x.c
index 0fe27baf5e72..c431d09e401a 100644
--- a/drivers/input/misc/ad714x.c
+++ b/drivers/input/misc/ad714x.c
@@ -1118,7 +1118,7 @@ struct ad714x_chip *ad714x_probe(struct device *dev, u16 bus_type, int irq,
1118 if (error) 1118 if (error)
1119 goto err_free_mem; 1119 goto err_free_mem;
1120 1120
1121 /* initilize and request sw/hw resources */ 1121 /* initialize and request sw/hw resources */
1122 1122
1123 ad714x_hw_init(ad714x); 1123 ad714x_hw_init(ad714x);
1124 mutex_init(&ad714x->mutex); 1124 mutex_init(&ad714x->mutex);
diff --git a/drivers/input/misc/adxl34x-i2c.c b/drivers/input/misc/adxl34x-i2c.c
new file mode 100644
index 000000000000..0779724af7e7
--- /dev/null
+++ b/drivers/input/misc/adxl34x-i2c.c
@@ -0,0 +1,163 @@
1/*
2 * ADLX345/346 Three-Axis Digital Accelerometers (I2C Interface)
3 *
4 * Enter bugs at http://blackfin.uclinux.org/
5 *
6 * Copyright (C) 2009 Michael Hennerich, Analog Devices Inc.
7 * Licensed under the GPL-2 or later.
8 */
9
10#include <linux/input.h> /* BUS_I2C */
11#include <linux/i2c.h>
12#include <linux/module.h>
13#include <linux/types.h>
14#include "adxl34x.h"
15
16static int adxl34x_smbus_read(struct device *dev, unsigned char reg)
17{
18 struct i2c_client *client = to_i2c_client(dev);
19
20 return i2c_smbus_read_byte_data(client, reg);
21}
22
23static int adxl34x_smbus_write(struct device *dev,
24 unsigned char reg, unsigned char val)
25{
26 struct i2c_client *client = to_i2c_client(dev);
27
28 return i2c_smbus_write_byte_data(client, reg, val);
29}
30
31static int adxl34x_smbus_read_block(struct device *dev,
32 unsigned char reg, int count,
33 void *buf)
34{
35 struct i2c_client *client = to_i2c_client(dev);
36
37 return i2c_smbus_read_i2c_block_data(client, reg, count, buf);
38}
39
40static int adxl34x_i2c_read_block(struct device *dev,
41 unsigned char reg, int count,
42 void *buf)
43{
44 struct i2c_client *client = to_i2c_client(dev);
45 int ret;
46
47 ret = i2c_master_send(client, &reg, 1);
48 if (ret < 0)
49 return ret;
50
51 ret = i2c_master_recv(client, buf, count);
52 if (ret < 0)
53 return ret;
54
55 if (ret != count)
56 return -EIO;
57
58 return 0;
59}
60
61static const struct adxl34x_bus_ops adxl34x_smbus_bops = {
62 .bustype = BUS_I2C,
63 .write = adxl34x_smbus_write,
64 .read = adxl34x_smbus_read,
65 .read_block = adxl34x_smbus_read_block,
66};
67
68static const struct adxl34x_bus_ops adxl34x_i2c_bops = {
69 .bustype = BUS_I2C,
70 .write = adxl34x_smbus_write,
71 .read = adxl34x_smbus_read,
72 .read_block = adxl34x_i2c_read_block,
73};
74
75static int __devinit adxl34x_i2c_probe(struct i2c_client *client,
76 const struct i2c_device_id *id)
77{
78 struct adxl34x *ac;
79 int error;
80
81 error = i2c_check_functionality(client->adapter,
82 I2C_FUNC_SMBUS_BYTE_DATA);
83 if (!error) {
84 dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
85 return -EIO;
86 }
87
88 ac = adxl34x_probe(&client->dev, client->irq, false,
89 i2c_check_functionality(client->adapter,
90 I2C_FUNC_SMBUS_READ_I2C_BLOCK) ?
91 &adxl34x_smbus_bops : &adxl34x_i2c_bops);
92 if (IS_ERR(ac))
93 return PTR_ERR(ac);
94
95 i2c_set_clientdata(client, ac);
96
97 return 0;
98}
99
100static int __devexit adxl34x_i2c_remove(struct i2c_client *client)
101{
102 struct adxl34x *ac = i2c_get_clientdata(client);
103
104 return adxl34x_remove(ac);
105}
106
107#ifdef CONFIG_PM
108static int adxl34x_i2c_suspend(struct i2c_client *client, pm_message_t message)
109{
110 struct adxl34x *ac = i2c_get_clientdata(client);
111
112 adxl34x_suspend(ac);
113
114 return 0;
115}
116
117static int adxl34x_i2c_resume(struct i2c_client *client)
118{
119 struct adxl34x *ac = i2c_get_clientdata(client);
120
121 adxl34x_resume(ac);
122
123 return 0;
124}
125#else
126# define adxl34x_i2c_suspend NULL
127# define adxl34x_i2c_resume NULL
128#endif
129
130static const struct i2c_device_id adxl34x_id[] = {
131 { "adxl34x", 0 },
132 { }
133};
134
135MODULE_DEVICE_TABLE(i2c, adxl34x_id);
136
137static struct i2c_driver adxl34x_driver = {
138 .driver = {
139 .name = "adxl34x",
140 .owner = THIS_MODULE,
141 },
142 .probe = adxl34x_i2c_probe,
143 .remove = __devexit_p(adxl34x_i2c_remove),
144 .suspend = adxl34x_i2c_suspend,
145 .resume = adxl34x_i2c_resume,
146 .id_table = adxl34x_id,
147};
148
149static int __init adxl34x_i2c_init(void)
150{
151 return i2c_add_driver(&adxl34x_driver);
152}
153module_init(adxl34x_i2c_init);
154
155static void __exit adxl34x_i2c_exit(void)
156{
157 i2c_del_driver(&adxl34x_driver);
158}
159module_exit(adxl34x_i2c_exit);
160
161MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
162MODULE_DESCRIPTION("ADXL345/346 Three-Axis Digital Accelerometer I2C Bus Driver");
163MODULE_LICENSE("GPL");
diff --git a/drivers/input/misc/adxl34x-spi.c b/drivers/input/misc/adxl34x-spi.c
new file mode 100644
index 000000000000..782de9e89828
--- /dev/null
+++ b/drivers/input/misc/adxl34x-spi.c
@@ -0,0 +1,145 @@
1/*
2 * ADLX345/346 Three-Axis Digital Accelerometers (SPI Interface)
3 *
4 * Enter bugs at http://blackfin.uclinux.org/
5 *
6 * Copyright (C) 2009 Michael Hennerich, Analog Devices Inc.
7 * Licensed under the GPL-2 or later.
8 */
9
10#include <linux/input.h> /* BUS_SPI */
11#include <linux/module.h>
12#include <linux/spi/spi.h>
13#include <linux/types.h>
14#include "adxl34x.h"
15
16#define MAX_SPI_FREQ_HZ 5000000
17#define MAX_FREQ_NO_FIFODELAY 1500000
18#define ADXL34X_CMD_MULTB (1 << 6)
19#define ADXL34X_CMD_READ (1 << 7)
20#define ADXL34X_WRITECMD(reg) (reg & 0x3F)
21#define ADXL34X_READCMD(reg) (ADXL34X_CMD_READ | (reg & 0x3F))
22#define ADXL34X_READMB_CMD(reg) (ADXL34X_CMD_READ | ADXL34X_CMD_MULTB \
23 | (reg & 0x3F))
24
25static int adxl34x_spi_read(struct device *dev, unsigned char reg)
26{
27 struct spi_device *spi = to_spi_device(dev);
28 unsigned char cmd;
29
30 cmd = ADXL34X_READCMD(reg);
31
32 return spi_w8r8(spi, cmd);
33}
34
35static int adxl34x_spi_write(struct device *dev,
36 unsigned char reg, unsigned char val)
37{
38 struct spi_device *spi = to_spi_device(dev);
39 unsigned char buf[2];
40
41 buf[0] = ADXL34X_WRITECMD(reg);
42 buf[1] = val;
43
44 return spi_write(spi, buf, sizeof(buf));
45}
46
47static int adxl34x_spi_read_block(struct device *dev,
48 unsigned char reg, int count,
49 void *buf)
50{
51 struct spi_device *spi = to_spi_device(dev);
52 ssize_t status;
53
54 reg = ADXL34X_READMB_CMD(reg);
55 status = spi_write_then_read(spi, &reg, 1, buf, count);
56
57 return (status < 0) ? status : 0;
58}
59
60static const struct adxl34x_bus_ops adx134x_spi_bops = {
61 .bustype = BUS_SPI,
62 .write = adxl34x_spi_write,
63 .read = adxl34x_spi_read,
64 .read_block = adxl34x_spi_read_block,
65};
66
67static int __devinit adxl34x_spi_probe(struct spi_device *spi)
68{
69 struct adxl34x *ac;
70
71 /* don't exceed max specified SPI CLK frequency */
72 if (spi->max_speed_hz > MAX_SPI_FREQ_HZ) {
73 dev_err(&spi->dev, "SPI CLK %d Hz too fast\n", spi->max_speed_hz);
74 return -EINVAL;
75 }
76
77 ac = adxl34x_probe(&spi->dev, spi->irq,
78 spi->max_speed_hz > MAX_FREQ_NO_FIFODELAY,
79 &adx134x_spi_bops);
80
81 if (IS_ERR(ac))
82 return PTR_ERR(ac);
83
84 spi_set_drvdata(spi, ac);
85
86 return 0;
87}
88
89static int __devexit adxl34x_spi_remove(struct spi_device *spi)
90{
91 struct adxl34x *ac = dev_get_drvdata(&spi->dev);
92
93 return adxl34x_remove(ac);
94}
95
96#ifdef CONFIG_PM
97static int adxl34x_spi_suspend(struct spi_device *spi, pm_message_t message)
98{
99 struct adxl34x *ac = dev_get_drvdata(&spi->dev);
100
101 adxl34x_suspend(ac);
102
103 return 0;
104}
105
106static int adxl34x_spi_resume(struct spi_device *spi)
107{
108 struct adxl34x *ac = dev_get_drvdata(&spi->dev);
109
110 adxl34x_resume(ac);
111
112 return 0;
113}
114#else
115# define adxl34x_spi_suspend NULL
116# define adxl34x_spi_resume NULL
117#endif
118
119static struct spi_driver adxl34x_driver = {
120 .driver = {
121 .name = "adxl34x",
122 .bus = &spi_bus_type,
123 .owner = THIS_MODULE,
124 },
125 .probe = adxl34x_spi_probe,
126 .remove = __devexit_p(adxl34x_spi_remove),
127 .suspend = adxl34x_spi_suspend,
128 .resume = adxl34x_spi_resume,
129};
130
131static int __init adxl34x_spi_init(void)
132{
133 return spi_register_driver(&adxl34x_driver);
134}
135module_init(adxl34x_spi_init);
136
137static void __exit adxl34x_spi_exit(void)
138{
139 spi_unregister_driver(&adxl34x_driver);
140}
141module_exit(adxl34x_spi_exit);
142
143MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
144MODULE_DESCRIPTION("ADXL345/346 Three-Axis Digital Accelerometer SPI Bus Driver");
145MODULE_LICENSE("GPL");
diff --git a/drivers/input/misc/adxl34x.c b/drivers/input/misc/adxl34x.c
new file mode 100644
index 000000000000..e2ca01708080
--- /dev/null
+++ b/drivers/input/misc/adxl34x.c
@@ -0,0 +1,915 @@
1/*
2 * ADXL345/346 Three-Axis Digital Accelerometers
3 *
4 * Enter bugs at http://blackfin.uclinux.org/
5 *
6 * Copyright (C) 2009 Michael Hennerich, Analog Devices Inc.
7 * Licensed under the GPL-2 or later.
8 */
9
10#include <linux/device.h>
11#include <linux/init.h>
12#include <linux/delay.h>
13#include <linux/input.h>
14#include <linux/interrupt.h>
15#include <linux/irq.h>
16#include <linux/slab.h>
17#include <linux/workqueue.h>
18#include <linux/input/adxl34x.h>
19
20#include "adxl34x.h"
21
22/* ADXL345/6 Register Map */
23#define DEVID 0x00 /* R Device ID */
24#define THRESH_TAP 0x1D /* R/W Tap threshold */
25#define OFSX 0x1E /* R/W X-axis offset */
26#define OFSY 0x1F /* R/W Y-axis offset */
27#define OFSZ 0x20 /* R/W Z-axis offset */
28#define DUR 0x21 /* R/W Tap duration */
29#define LATENT 0x22 /* R/W Tap latency */
30#define WINDOW 0x23 /* R/W Tap window */
31#define THRESH_ACT 0x24 /* R/W Activity threshold */
32#define THRESH_INACT 0x25 /* R/W Inactivity threshold */
33#define TIME_INACT 0x26 /* R/W Inactivity time */
34#define ACT_INACT_CTL 0x27 /* R/W Axis enable control for activity and */
35 /* inactivity detection */
36#define THRESH_FF 0x28 /* R/W Free-fall threshold */
37#define TIME_FF 0x29 /* R/W Free-fall time */
38#define TAP_AXES 0x2A /* R/W Axis control for tap/double tap */
39#define ACT_TAP_STATUS 0x2B /* R Source of tap/double tap */
40#define BW_RATE 0x2C /* R/W Data rate and power mode control */
41#define POWER_CTL 0x2D /* R/W Power saving features control */
42#define INT_ENABLE 0x2E /* R/W Interrupt enable control */
43#define INT_MAP 0x2F /* R/W Interrupt mapping control */
44#define INT_SOURCE 0x30 /* R Source of interrupts */
45#define DATA_FORMAT 0x31 /* R/W Data format control */
46#define DATAX0 0x32 /* R X-Axis Data 0 */
47#define DATAX1 0x33 /* R X-Axis Data 1 */
48#define DATAY0 0x34 /* R Y-Axis Data 0 */
49#define DATAY1 0x35 /* R Y-Axis Data 1 */
50#define DATAZ0 0x36 /* R Z-Axis Data 0 */
51#define DATAZ1 0x37 /* R Z-Axis Data 1 */
52#define FIFO_CTL 0x38 /* R/W FIFO control */
53#define FIFO_STATUS 0x39 /* R FIFO status */
54#define TAP_SIGN 0x3A /* R Sign and source for tap/double tap */
55/* Orientation ADXL346 only */
56#define ORIENT_CONF 0x3B /* R/W Orientation configuration */
57#define ORIENT 0x3C /* R Orientation status */
58
59/* DEVIDs */
60#define ID_ADXL345 0xE5
61#define ID_ADXL346 0xE6
62
63/* INT_ENABLE/INT_MAP/INT_SOURCE Bits */
64#define DATA_READY (1 << 7)
65#define SINGLE_TAP (1 << 6)
66#define DOUBLE_TAP (1 << 5)
67#define ACTIVITY (1 << 4)
68#define INACTIVITY (1 << 3)
69#define FREE_FALL (1 << 2)
70#define WATERMARK (1 << 1)
71#define OVERRUN (1 << 0)
72
73/* ACT_INACT_CONTROL Bits */
74#define ACT_ACDC (1 << 7)
75#define ACT_X_EN (1 << 6)
76#define ACT_Y_EN (1 << 5)
77#define ACT_Z_EN (1 << 4)
78#define INACT_ACDC (1 << 3)
79#define INACT_X_EN (1 << 2)
80#define INACT_Y_EN (1 << 1)
81#define INACT_Z_EN (1 << 0)
82
83/* TAP_AXES Bits */
84#define SUPPRESS (1 << 3)
85#define TAP_X_EN (1 << 2)
86#define TAP_Y_EN (1 << 1)
87#define TAP_Z_EN (1 << 0)
88
89/* ACT_TAP_STATUS Bits */
90#define ACT_X_SRC (1 << 6)
91#define ACT_Y_SRC (1 << 5)
92#define ACT_Z_SRC (1 << 4)
93#define ASLEEP (1 << 3)
94#define TAP_X_SRC (1 << 2)
95#define TAP_Y_SRC (1 << 1)
96#define TAP_Z_SRC (1 << 0)
97
98/* BW_RATE Bits */
99#define LOW_POWER (1 << 4)
100#define RATE(x) ((x) & 0xF)
101
102/* POWER_CTL Bits */
103#define PCTL_LINK (1 << 5)
104#define PCTL_AUTO_SLEEP (1 << 4)
105#define PCTL_MEASURE (1 << 3)
106#define PCTL_SLEEP (1 << 2)
107#define PCTL_WAKEUP(x) ((x) & 0x3)
108
109/* DATA_FORMAT Bits */
110#define SELF_TEST (1 << 7)
111#define SPI (1 << 6)
112#define INT_INVERT (1 << 5)
113#define FULL_RES (1 << 3)
114#define JUSTIFY (1 << 2)
115#define RANGE(x) ((x) & 0x3)
116#define RANGE_PM_2g 0
117#define RANGE_PM_4g 1
118#define RANGE_PM_8g 2
119#define RANGE_PM_16g 3
120
121/*
122 * Maximum value our axis may get in full res mode for the input device
123 * (signed 13 bits)
124 */
125#define ADXL_FULLRES_MAX_VAL 4096
126
127/*
128 * Maximum value our axis may get in fixed res mode for the input device
129 * (signed 10 bits)
130 */
131#define ADXL_FIXEDRES_MAX_VAL 512
132
133/* FIFO_CTL Bits */
134#define FIFO_MODE(x) (((x) & 0x3) << 6)
135#define FIFO_BYPASS 0
136#define FIFO_FIFO 1
137#define FIFO_STREAM 2
138#define FIFO_TRIGGER 3
139#define TRIGGER (1 << 5)
140#define SAMPLES(x) ((x) & 0x1F)
141
142/* FIFO_STATUS Bits */
143#define FIFO_TRIG (1 << 7)
144#define ENTRIES(x) ((x) & 0x3F)
145
146/* TAP_SIGN Bits ADXL346 only */
147#define XSIGN (1 << 6)
148#define YSIGN (1 << 5)
149#define ZSIGN (1 << 4)
150#define XTAP (1 << 3)
151#define YTAP (1 << 2)
152#define ZTAP (1 << 1)
153
154/* ORIENT_CONF ADXL346 only */
155#define ORIENT_DEADZONE(x) (((x) & 0x7) << 4)
156#define ORIENT_DIVISOR(x) ((x) & 0x7)
157
158/* ORIENT ADXL346 only */
159#define ADXL346_2D_VALID (1 << 6)
160#define ADXL346_2D_ORIENT(x) (((x) & 0x3) >> 4)
161#define ADXL346_3D_VALID (1 << 3)
162#define ADXL346_3D_ORIENT(x) ((x) & 0x7)
163#define ADXL346_2D_PORTRAIT_POS 0 /* +X */
164#define ADXL346_2D_PORTRAIT_NEG 1 /* -X */
165#define ADXL346_2D_LANDSCAPE_POS 2 /* +Y */
166#define ADXL346_2D_LANDSCAPE_NEG 3 /* -Y */
167
168#define ADXL346_3D_FRONT 3 /* +X */
169#define ADXL346_3D_BACK 4 /* -X */
170#define ADXL346_3D_RIGHT 2 /* +Y */
171#define ADXL346_3D_LEFT 5 /* -Y */
172#define ADXL346_3D_TOP 1 /* +Z */
173#define ADXL346_3D_BOTTOM 6 /* -Z */
174
175#undef ADXL_DEBUG
176
177#define ADXL_X_AXIS 0
178#define ADXL_Y_AXIS 1
179#define ADXL_Z_AXIS 2
180
181#define AC_READ(ac, reg) ((ac)->bops->read((ac)->dev, reg))
182#define AC_WRITE(ac, reg, val) ((ac)->bops->write((ac)->dev, reg, val))
183
184struct axis_triple {
185 int x;
186 int y;
187 int z;
188};
189
190struct adxl34x {
191 struct device *dev;
192 struct input_dev *input;
193 struct mutex mutex; /* reentrant protection for struct */
194 struct adxl34x_platform_data pdata;
195 struct axis_triple swcal;
196 struct axis_triple hwcal;
197 struct axis_triple saved;
198 char phys[32];
199 unsigned orient2d_saved;
200 unsigned orient3d_saved;
201 bool disabled; /* P: mutex */
202 bool opened; /* P: mutex */
203 bool suspended; /* P: mutex */
204 bool fifo_delay;
205 int irq;
206 unsigned model;
207 unsigned int_mask;
208
209 const struct adxl34x_bus_ops *bops;
210};
211
212static const struct adxl34x_platform_data adxl34x_default_init = {
213 .tap_threshold = 35,
214 .tap_duration = 3,
215 .tap_latency = 20,
216 .tap_window = 20,
217 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
218 .act_axis_control = 0xFF,
219 .activity_threshold = 6,
220 .inactivity_threshold = 4,
221 .inactivity_time = 3,
222 .free_fall_threshold = 8,
223 .free_fall_time = 0x20,
224 .data_rate = 8,
225 .data_range = ADXL_FULL_RES,
226
227 .ev_type = EV_ABS,
228 .ev_code_x = ABS_X, /* EV_REL */
229 .ev_code_y = ABS_Y, /* EV_REL */
230 .ev_code_z = ABS_Z, /* EV_REL */
231
232 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY {x,y,z} */
233 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
234 .fifo_mode = FIFO_STREAM,
235 .watermark = 0,
236};
237
238static void adxl34x_get_triple(struct adxl34x *ac, struct axis_triple *axis)
239{
240 short buf[3];
241
242 ac->bops->read_block(ac->dev, DATAX0, DATAZ1 - DATAX0 + 1, buf);
243
244 mutex_lock(&ac->mutex);
245 ac->saved.x = (s16) le16_to_cpu(buf[0]);
246 axis->x = ac->saved.x;
247
248 ac->saved.y = (s16) le16_to_cpu(buf[1]);
249 axis->y = ac->saved.y;
250
251 ac->saved.z = (s16) le16_to_cpu(buf[2]);
252 axis->z = ac->saved.z;
253 mutex_unlock(&ac->mutex);
254}
255
256static void adxl34x_service_ev_fifo(struct adxl34x *ac)
257{
258 struct adxl34x_platform_data *pdata = &ac->pdata;
259 struct axis_triple axis;
260
261 adxl34x_get_triple(ac, &axis);
262
263 input_event(ac->input, pdata->ev_type, pdata->ev_code_x,
264 axis.x - ac->swcal.x);
265 input_event(ac->input, pdata->ev_type, pdata->ev_code_y,
266 axis.y - ac->swcal.y);
267 input_event(ac->input, pdata->ev_type, pdata->ev_code_z,
268 axis.z - ac->swcal.z);
269}
270
271static void adxl34x_report_key_single(struct input_dev *input, int key)
272{
273 input_report_key(input, key, true);
274 input_sync(input);
275 input_report_key(input, key, false);
276}
277
278static void adxl34x_send_key_events(struct adxl34x *ac,
279 struct adxl34x_platform_data *pdata, int status, int press)
280{
281 int i;
282
283 for (i = ADXL_X_AXIS; i <= ADXL_Z_AXIS; i++) {
284 if (status & (1 << (ADXL_Z_AXIS - i)))
285 input_report_key(ac->input,
286 pdata->ev_code_tap[i], press);
287 }
288}
289
290static void adxl34x_do_tap(struct adxl34x *ac,
291 struct adxl34x_platform_data *pdata, int status)
292{
293 adxl34x_send_key_events(ac, pdata, status, true);
294 input_sync(ac->input);
295 adxl34x_send_key_events(ac, pdata, status, false);
296}
297
298static irqreturn_t adxl34x_irq(int irq, void *handle)
299{
300 struct adxl34x *ac = handle;
301 struct adxl34x_platform_data *pdata = &ac->pdata;
302 int int_stat, tap_stat, samples, orient, orient_code;
303
304 /*
305 * ACT_TAP_STATUS should be read before clearing the interrupt
306 * Avoid reading ACT_TAP_STATUS in case TAP detection is disabled
307 */
308
309 if (pdata->tap_axis_control & (TAP_X_EN | TAP_Y_EN | TAP_Z_EN))
310 tap_stat = AC_READ(ac, ACT_TAP_STATUS);
311 else
312 tap_stat = 0;
313
314 int_stat = AC_READ(ac, INT_SOURCE);
315
316 if (int_stat & FREE_FALL)
317 adxl34x_report_key_single(ac->input, pdata->ev_code_ff);
318
319 if (int_stat & OVERRUN)
320 dev_dbg(ac->dev, "OVERRUN\n");
321
322 if (int_stat & (SINGLE_TAP | DOUBLE_TAP)) {
323 adxl34x_do_tap(ac, pdata, tap_stat);
324
325 if (int_stat & DOUBLE_TAP)
326 adxl34x_do_tap(ac, pdata, tap_stat);
327 }
328
329 if (pdata->ev_code_act_inactivity) {
330 if (int_stat & ACTIVITY)
331 input_report_key(ac->input,
332 pdata->ev_code_act_inactivity, 1);
333 if (int_stat & INACTIVITY)
334 input_report_key(ac->input,
335 pdata->ev_code_act_inactivity, 0);
336 }
337
338 /*
339 * ORIENTATION SENSING ADXL346 only
340 */
341 if (pdata->orientation_enable) {
342 orient = AC_READ(ac, ORIENT);
343 if ((pdata->orientation_enable & ADXL_EN_ORIENTATION_2D) &&
344 (orient & ADXL346_2D_VALID)) {
345
346 orient_code = ADXL346_2D_ORIENT(orient);
347 /* Report orientation only when it changes */
348 if (ac->orient2d_saved != orient_code) {
349 ac->orient2d_saved = orient_code;
350 adxl34x_report_key_single(ac->input,
351 pdata->ev_codes_orient_2d[orient_code]);
352 }
353 }
354
355 if ((pdata->orientation_enable & ADXL_EN_ORIENTATION_3D) &&
356 (orient & ADXL346_3D_VALID)) {
357
358 orient_code = ADXL346_3D_ORIENT(orient) - 1;
359 /* Report orientation only when it changes */
360 if (ac->orient3d_saved != orient_code) {
361 ac->orient3d_saved = orient_code;
362 adxl34x_report_key_single(ac->input,
363 pdata->ev_codes_orient_3d[orient_code]);
364 }
365 }
366 }
367
368 if (int_stat & (DATA_READY | WATERMARK)) {
369
370 if (pdata->fifo_mode)
371 samples = ENTRIES(AC_READ(ac, FIFO_STATUS)) + 1;
372 else
373 samples = 1;
374
375 for (; samples > 0; samples--) {
376 adxl34x_service_ev_fifo(ac);
377 /*
378 * To ensure that the FIFO has
379 * completely popped, there must be at least 5 us between
380 * the end of reading the data registers, signified by the
381 * transition to register 0x38 from 0x37 or the CS pin
382 * going high, and the start of new reads of the FIFO or
383 * reading the FIFO_STATUS register. For SPI operation at
384 * 1.5 MHz or lower, the register addressing portion of the
385 * transmission is sufficient delay to ensure the FIFO has
386 * completely popped. It is necessary for SPI operation
387 * greater than 1.5 MHz to de-assert the CS pin to ensure a
388 * total of 5 us, which is at most 3.4 us at 5 MHz
389 * operation.
390 */
391 if (ac->fifo_delay && (samples > 1))
392 udelay(3);
393 }
394 }
395
396 input_sync(ac->input);
397
398 return IRQ_HANDLED;
399}
400
401static void __adxl34x_disable(struct adxl34x *ac)
402{
403 /*
404 * A '0' places the ADXL34x into standby mode
405 * with minimum power consumption.
406 */
407 AC_WRITE(ac, POWER_CTL, 0);
408}
409
410static void __adxl34x_enable(struct adxl34x *ac)
411{
412 AC_WRITE(ac, POWER_CTL, ac->pdata.power_mode | PCTL_MEASURE);
413}
414
415void adxl34x_suspend(struct adxl34x *ac)
416{
417 mutex_lock(&ac->mutex);
418
419 if (!ac->suspended && !ac->disabled && ac->opened)
420 __adxl34x_disable(ac);
421
422 ac->suspended = true;
423
424 mutex_unlock(&ac->mutex);
425}
426EXPORT_SYMBOL_GPL(adxl34x_suspend);
427
428void adxl34x_resume(struct adxl34x *ac)
429{
430 mutex_lock(&ac->mutex);
431
432 if (ac->suspended && !ac->disabled && ac->opened)
433 __adxl34x_enable(ac);
434
435 ac->suspended = false;
436
437 mutex_unlock(&ac->mutex);
438}
439EXPORT_SYMBOL_GPL(adxl34x_resume);
440
441static ssize_t adxl34x_disable_show(struct device *dev,
442 struct device_attribute *attr, char *buf)
443{
444 struct adxl34x *ac = dev_get_drvdata(dev);
445
446 return sprintf(buf, "%u\n", ac->disabled);
447}
448
449static ssize_t adxl34x_disable_store(struct device *dev,
450 struct device_attribute *attr,
451 const char *buf, size_t count)
452{
453 struct adxl34x *ac = dev_get_drvdata(dev);
454 unsigned long val;
455 int error;
456
457 error = strict_strtoul(buf, 10, &val);
458 if (error)
459 return error;
460
461 mutex_lock(&ac->mutex);
462
463 if (!ac->suspended && ac->opened) {
464 if (val) {
465 if (!ac->disabled)
466 __adxl34x_disable(ac);
467 } else {
468 if (ac->disabled)
469 __adxl34x_enable(ac);
470 }
471 }
472
473 ac->disabled = !!val;
474
475 mutex_unlock(&ac->mutex);
476
477 return count;
478}
479
480static DEVICE_ATTR(disable, 0664, adxl34x_disable_show, adxl34x_disable_store);
481
482static ssize_t adxl34x_calibrate_show(struct device *dev,
483 struct device_attribute *attr, char *buf)
484{
485 struct adxl34x *ac = dev_get_drvdata(dev);
486 ssize_t count;
487
488 mutex_lock(&ac->mutex);
489 count = sprintf(buf, "%d,%d,%d\n",
490 ac->hwcal.x * 4 + ac->swcal.x,
491 ac->hwcal.y * 4 + ac->swcal.y,
492 ac->hwcal.z * 4 + ac->swcal.z);
493 mutex_unlock(&ac->mutex);
494
495 return count;
496}
497
498static ssize_t adxl34x_calibrate_store(struct device *dev,
499 struct device_attribute *attr,
500 const char *buf, size_t count)
501{
502 struct adxl34x *ac = dev_get_drvdata(dev);
503
504 /*
505 * Hardware offset calibration has a resolution of 15.6 mg/LSB.
506 * We use HW calibration and handle the remaining bits in SW. (4mg/LSB)
507 */
508
509 mutex_lock(&ac->mutex);
510 ac->hwcal.x -= (ac->saved.x / 4);
511 ac->swcal.x = ac->saved.x % 4;
512
513 ac->hwcal.y -= (ac->saved.y / 4);
514 ac->swcal.y = ac->saved.y % 4;
515
516 ac->hwcal.z -= (ac->saved.z / 4);
517 ac->swcal.z = ac->saved.z % 4;
518
519 AC_WRITE(ac, OFSX, (s8) ac->hwcal.x);
520 AC_WRITE(ac, OFSY, (s8) ac->hwcal.y);
521 AC_WRITE(ac, OFSZ, (s8) ac->hwcal.z);
522 mutex_unlock(&ac->mutex);
523
524 return count;
525}
526
527static DEVICE_ATTR(calibrate, 0664,
528 adxl34x_calibrate_show, adxl34x_calibrate_store);
529
530static ssize_t adxl34x_rate_show(struct device *dev,
531 struct device_attribute *attr, char *buf)
532{
533 struct adxl34x *ac = dev_get_drvdata(dev);
534
535 return sprintf(buf, "%u\n", RATE(ac->pdata.data_rate));
536}
537
538static ssize_t adxl34x_rate_store(struct device *dev,
539 struct device_attribute *attr,
540 const char *buf, size_t count)
541{
542 struct adxl34x *ac = dev_get_drvdata(dev);
543 unsigned long val;
544 int error;
545
546 error = strict_strtoul(buf, 10, &val);
547 if (error)
548 return error;
549
550 mutex_lock(&ac->mutex);
551
552 ac->pdata.data_rate = RATE(val);
553 AC_WRITE(ac, BW_RATE,
554 ac->pdata.data_rate |
555 (ac->pdata.low_power_mode ? LOW_POWER : 0));
556
557 mutex_unlock(&ac->mutex);
558
559 return count;
560}
561
562static DEVICE_ATTR(rate, 0664, adxl34x_rate_show, adxl34x_rate_store);
563
564static ssize_t adxl34x_autosleep_show(struct device *dev,
565 struct device_attribute *attr, char *buf)
566{
567 struct adxl34x *ac = dev_get_drvdata(dev);
568
569 return sprintf(buf, "%u\n",
570 ac->pdata.power_mode & (PCTL_AUTO_SLEEP | PCTL_LINK) ? 1 : 0);
571}
572
573static ssize_t adxl34x_autosleep_store(struct device *dev,
574 struct device_attribute *attr,
575 const char *buf, size_t count)
576{
577 struct adxl34x *ac = dev_get_drvdata(dev);
578 unsigned long val;
579 int error;
580
581 error = strict_strtoul(buf, 10, &val);
582 if (error)
583 return error;
584
585 mutex_lock(&ac->mutex);
586
587 if (val)
588 ac->pdata.power_mode |= (PCTL_AUTO_SLEEP | PCTL_LINK);
589 else
590 ac->pdata.power_mode &= ~(PCTL_AUTO_SLEEP | PCTL_LINK);
591
592 if (!ac->disabled && !ac->suspended && ac->opened)
593 AC_WRITE(ac, POWER_CTL, ac->pdata.power_mode | PCTL_MEASURE);
594
595 mutex_unlock(&ac->mutex);
596
597 return count;
598}
599
600static DEVICE_ATTR(autosleep, 0664,
601 adxl34x_autosleep_show, adxl34x_autosleep_store);
602
603static ssize_t adxl34x_position_show(struct device *dev,
604 struct device_attribute *attr, char *buf)
605{
606 struct adxl34x *ac = dev_get_drvdata(dev);
607 ssize_t count;
608
609 mutex_lock(&ac->mutex);
610 count = sprintf(buf, "(%d, %d, %d)\n",
611 ac->saved.x, ac->saved.y, ac->saved.z);
612 mutex_unlock(&ac->mutex);
613
614 return count;
615}
616
617static DEVICE_ATTR(position, S_IRUGO, adxl34x_position_show, NULL);
618
619#ifdef ADXL_DEBUG
620static ssize_t adxl34x_write_store(struct device *dev,
621 struct device_attribute *attr,
622 const char *buf, size_t count)
623{
624 struct adxl34x *ac = dev_get_drvdata(dev);
625 unsigned long val;
626 int error;
627
628 /*
629 * This allows basic ADXL register write access for debug purposes.
630 */
631 error = strict_strtoul(buf, 16, &val);
632 if (error)
633 return error;
634
635 mutex_lock(&ac->mutex);
636 AC_WRITE(ac, val >> 8, val & 0xFF);
637 mutex_unlock(&ac->mutex);
638
639 return count;
640}
641
642static DEVICE_ATTR(write, 0664, NULL, adxl34x_write_store);
643#endif
644
645static struct attribute *adxl34x_attributes[] = {
646 &dev_attr_disable.attr,
647 &dev_attr_calibrate.attr,
648 &dev_attr_rate.attr,
649 &dev_attr_autosleep.attr,
650 &dev_attr_position.attr,
651#ifdef ADXL_DEBUG
652 &dev_attr_write.attr,
653#endif
654 NULL
655};
656
657static const struct attribute_group adxl34x_attr_group = {
658 .attrs = adxl34x_attributes,
659};
660
661static int adxl34x_input_open(struct input_dev *input)
662{
663 struct adxl34x *ac = input_get_drvdata(input);
664
665 mutex_lock(&ac->mutex);
666
667 if (!ac->suspended && !ac->disabled)
668 __adxl34x_enable(ac);
669
670 ac->opened = true;
671
672 mutex_unlock(&ac->mutex);
673
674 return 0;
675}
676
677static void adxl34x_input_close(struct input_dev *input)
678{
679 struct adxl34x *ac = input_get_drvdata(input);
680
681 mutex_lock(&ac->mutex);
682
683 if (!ac->suspended && !ac->disabled)
684 __adxl34x_disable(ac);
685
686 ac->opened = false;
687
688 mutex_unlock(&ac->mutex);
689}
690
691struct adxl34x *adxl34x_probe(struct device *dev, int irq,
692 bool fifo_delay_default,
693 const struct adxl34x_bus_ops *bops)
694{
695 struct adxl34x *ac;
696 struct input_dev *input_dev;
697 const struct adxl34x_platform_data *pdata;
698 int err, range, i;
699 unsigned char revid;
700
701 if (!irq) {
702 dev_err(dev, "no IRQ?\n");
703 err = -ENODEV;
704 goto err_out;
705 }
706
707 ac = kzalloc(sizeof(*ac), GFP_KERNEL);
708 input_dev = input_allocate_device();
709 if (!ac || !input_dev) {
710 err = -ENOMEM;
711 goto err_free_mem;
712 }
713
714 ac->fifo_delay = fifo_delay_default;
715
716 pdata = dev->platform_data;
717 if (!pdata) {
718 dev_dbg(dev,
719 "No platfrom data: Using default initialization\n");
720 pdata = &adxl34x_default_init;
721 }
722
723 ac->pdata = *pdata;
724 pdata = &ac->pdata;
725
726 ac->input = input_dev;
727 ac->disabled = true;
728 ac->dev = dev;
729 ac->irq = irq;
730 ac->bops = bops;
731
732 mutex_init(&ac->mutex);
733
734 input_dev->name = "ADXL34x accelerometer";
735 revid = ac->bops->read(dev, DEVID);
736
737 switch (revid) {
738 case ID_ADXL345:
739 ac->model = 345;
740 break;
741 case ID_ADXL346:
742 ac->model = 346;
743 break;
744 default:
745 dev_err(dev, "Failed to probe %s\n", input_dev->name);
746 err = -ENODEV;
747 goto err_free_mem;
748 }
749
750 snprintf(ac->phys, sizeof(ac->phys), "%s/input0", dev_name(dev));
751
752 input_dev->phys = ac->phys;
753 input_dev->dev.parent = dev;
754 input_dev->id.product = ac->model;
755 input_dev->id.bustype = bops->bustype;
756 input_dev->open = adxl34x_input_open;
757 input_dev->close = adxl34x_input_close;
758
759 input_set_drvdata(input_dev, ac);
760
761 __set_bit(ac->pdata.ev_type, input_dev->evbit);
762
763 if (ac->pdata.ev_type == EV_REL) {
764 __set_bit(REL_X, input_dev->relbit);
765 __set_bit(REL_Y, input_dev->relbit);
766 __set_bit(REL_Z, input_dev->relbit);
767 } else {
768 /* EV_ABS */
769 __set_bit(ABS_X, input_dev->absbit);
770 __set_bit(ABS_Y, input_dev->absbit);
771 __set_bit(ABS_Z, input_dev->absbit);
772
773 if (pdata->data_range & FULL_RES)
774 range = ADXL_FULLRES_MAX_VAL; /* Signed 13-bit */
775 else
776 range = ADXL_FIXEDRES_MAX_VAL; /* Signed 10-bit */
777
778 input_set_abs_params(input_dev, ABS_X, -range, range, 3, 3);
779 input_set_abs_params(input_dev, ABS_Y, -range, range, 3, 3);
780 input_set_abs_params(input_dev, ABS_Z, -range, range, 3, 3);
781 }
782
783 __set_bit(EV_KEY, input_dev->evbit);
784 __set_bit(pdata->ev_code_tap[ADXL_X_AXIS], input_dev->keybit);
785 __set_bit(pdata->ev_code_tap[ADXL_Y_AXIS], input_dev->keybit);
786 __set_bit(pdata->ev_code_tap[ADXL_Z_AXIS], input_dev->keybit);
787
788 if (pdata->ev_code_ff) {
789 ac->int_mask = FREE_FALL;
790 __set_bit(pdata->ev_code_ff, input_dev->keybit);
791 }
792
793 if (pdata->ev_code_act_inactivity)
794 __set_bit(pdata->ev_code_act_inactivity, input_dev->keybit);
795
796 ac->int_mask |= ACTIVITY | INACTIVITY;
797
798 if (pdata->watermark) {
799 ac->int_mask |= WATERMARK;
800 if (!FIFO_MODE(pdata->fifo_mode))
801 ac->pdata.fifo_mode |= FIFO_STREAM;
802 } else {
803 ac->int_mask |= DATA_READY;
804 }
805
806 if (pdata->tap_axis_control & (TAP_X_EN | TAP_Y_EN | TAP_Z_EN))
807 ac->int_mask |= SINGLE_TAP | DOUBLE_TAP;
808
809 if (FIFO_MODE(pdata->fifo_mode) == FIFO_BYPASS)
810 ac->fifo_delay = false;
811
812 ac->bops->write(dev, POWER_CTL, 0);
813
814 err = request_threaded_irq(ac->irq, NULL, adxl34x_irq,
815 IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
816 dev_name(dev), ac);
817 if (err) {
818 dev_err(dev, "irq %d busy?\n", ac->irq);
819 goto err_free_mem;
820 }
821
822 err = sysfs_create_group(&dev->kobj, &adxl34x_attr_group);
823 if (err)
824 goto err_free_irq;
825
826 err = input_register_device(input_dev);
827 if (err)
828 goto err_remove_attr;
829
830 AC_WRITE(ac, THRESH_TAP, pdata->tap_threshold);
831 AC_WRITE(ac, OFSX, pdata->x_axis_offset);
832 ac->hwcal.x = pdata->x_axis_offset;
833 AC_WRITE(ac, OFSY, pdata->y_axis_offset);
834 ac->hwcal.y = pdata->y_axis_offset;
835 AC_WRITE(ac, OFSZ, pdata->z_axis_offset);
836 ac->hwcal.z = pdata->z_axis_offset;
837 AC_WRITE(ac, THRESH_TAP, pdata->tap_threshold);
838 AC_WRITE(ac, DUR, pdata->tap_duration);
839 AC_WRITE(ac, LATENT, pdata->tap_latency);
840 AC_WRITE(ac, WINDOW, pdata->tap_window);
841 AC_WRITE(ac, THRESH_ACT, pdata->activity_threshold);
842 AC_WRITE(ac, THRESH_INACT, pdata->inactivity_threshold);
843 AC_WRITE(ac, TIME_INACT, pdata->inactivity_time);
844 AC_WRITE(ac, THRESH_FF, pdata->free_fall_threshold);
845 AC_WRITE(ac, TIME_FF, pdata->free_fall_time);
846 AC_WRITE(ac, TAP_AXES, pdata->tap_axis_control);
847 AC_WRITE(ac, ACT_INACT_CTL, pdata->act_axis_control);
848 AC_WRITE(ac, BW_RATE, RATE(ac->pdata.data_rate) |
849 (pdata->low_power_mode ? LOW_POWER : 0));
850 AC_WRITE(ac, DATA_FORMAT, pdata->data_range);
851 AC_WRITE(ac, FIFO_CTL, FIFO_MODE(pdata->fifo_mode) |
852 SAMPLES(pdata->watermark));
853
854 if (pdata->use_int2) {
855 /* Map all INTs to INT2 */
856 AC_WRITE(ac, INT_MAP, ac->int_mask | OVERRUN);
857 } else {
858 /* Map all INTs to INT1 */
859 AC_WRITE(ac, INT_MAP, 0);
860 }
861
862 if (ac->model == 346 && ac->pdata.orientation_enable) {
863 AC_WRITE(ac, ORIENT_CONF,
864 ORIENT_DEADZONE(ac->pdata.deadzone_angle) |
865 ORIENT_DIVISOR(ac->pdata.divisor_length));
866
867 ac->orient2d_saved = 1234;
868 ac->orient3d_saved = 1234;
869
870 if (pdata->orientation_enable & ADXL_EN_ORIENTATION_3D)
871 for (i = 0; i < ARRAY_SIZE(pdata->ev_codes_orient_3d); i++)
872 __set_bit(pdata->ev_codes_orient_3d[i],
873 input_dev->keybit);
874
875 if (pdata->orientation_enable & ADXL_EN_ORIENTATION_2D)
876 for (i = 0; i < ARRAY_SIZE(pdata->ev_codes_orient_2d); i++)
877 __set_bit(pdata->ev_codes_orient_2d[i],
878 input_dev->keybit);
879 } else {
880 ac->pdata.orientation_enable = 0;
881 }
882
883 AC_WRITE(ac, INT_ENABLE, ac->int_mask | OVERRUN);
884
885 ac->pdata.power_mode &= (PCTL_AUTO_SLEEP | PCTL_LINK);
886
887 return ac;
888
889 err_remove_attr:
890 sysfs_remove_group(&dev->kobj, &adxl34x_attr_group);
891 err_free_irq:
892 free_irq(ac->irq, ac);
893 err_free_mem:
894 input_free_device(input_dev);
895 kfree(ac);
896 err_out:
897 return ERR_PTR(err);
898}
899EXPORT_SYMBOL_GPL(adxl34x_probe);
900
901int adxl34x_remove(struct adxl34x *ac)
902{
903 sysfs_remove_group(&ac->dev->kobj, &adxl34x_attr_group);
904 free_irq(ac->irq, ac);
905 input_unregister_device(ac->input);
906 dev_dbg(ac->dev, "unregistered accelerometer\n");
907 kfree(ac);
908
909 return 0;
910}
911EXPORT_SYMBOL_GPL(adxl34x_remove);
912
913MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
914MODULE_DESCRIPTION("ADXL345/346 Three-Axis Digital Accelerometer Driver");
915MODULE_LICENSE("GPL");
diff --git a/drivers/input/misc/adxl34x.h b/drivers/input/misc/adxl34x.h
new file mode 100644
index 000000000000..bbbc80fda164
--- /dev/null
+++ b/drivers/input/misc/adxl34x.h
@@ -0,0 +1,30 @@
1/*
2 * ADXL345/346 Three-Axis Digital Accelerometers (I2C/SPI Interface)
3 *
4 * Enter bugs at http://blackfin.uclinux.org/
5 *
6 * Copyright (C) 2009 Michael Hennerich, Analog Devices Inc.
7 * Licensed under the GPL-2 or later.
8 */
9
10#ifndef _ADXL34X_H_
11#define _ADXL34X_H_
12
13struct device;
14struct adxl34x;
15
16struct adxl34x_bus_ops {
17 u16 bustype;
18 int (*read)(struct device *, unsigned char);
19 int (*read_block)(struct device *, unsigned char, int, void *);
20 int (*write)(struct device *, unsigned char, unsigned char);
21};
22
23void adxl34x_suspend(struct adxl34x *ac);
24void adxl34x_resume(struct adxl34x *ac);
25struct adxl34x *adxl34x_probe(struct device *dev, int irq,
26 bool fifo_delay_default,
27 const struct adxl34x_bus_ops *bops);
28int adxl34x_remove(struct adxl34x *ac);
29
30#endif
diff --git a/drivers/input/misc/atlas_btns.c b/drivers/input/misc/atlas_btns.c
index dfaa9a045ed8..601f7372f9c4 100644
--- a/drivers/input/misc/atlas_btns.c
+++ b/drivers/input/misc/atlas_btns.c
@@ -21,6 +21,8 @@
21 * 21 *
22 */ 22 */
23 23
24#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25
24#include <linux/kernel.h> 26#include <linux/kernel.h>
25#include <linux/module.h> 27#include <linux/module.h>
26#include <linux/init.h> 28#include <linux/init.h>
@@ -60,12 +62,11 @@ static acpi_status acpi_atlas_button_handler(u32 function,
60 input_report_key(input_dev, atlas_keymap[code], key_down); 62 input_report_key(input_dev, atlas_keymap[code], key_down);
61 input_sync(input_dev); 63 input_sync(input_dev);
62 64
63 status = 0; 65 status = AE_OK;
64 } else { 66 } else {
65 printk(KERN_WARNING "atlas: shrugged on unexpected function" 67 pr_warn("shrugged on unexpected function: function=%x,address=%lx,value=%x\n",
66 ":function=%x,address=%lx,value=%x\n",
67 function, (unsigned long)address, (u32)*value); 68 function, (unsigned long)address, (u32)*value);
68 status = -EINVAL; 69 status = AE_BAD_PARAMETER;
69 } 70 }
70 71
71 return status; 72 return status;
@@ -79,7 +80,7 @@ static int atlas_acpi_button_add(struct acpi_device *device)
79 80
80 input_dev = input_allocate_device(); 81 input_dev = input_allocate_device();
81 if (!input_dev) { 82 if (!input_dev) {
82 printk(KERN_ERR "atlas: unable to allocate input device\n"); 83 pr_err("unable to allocate input device\n");
83 return -ENOMEM; 84 return -ENOMEM;
84 } 85 }
85 86
@@ -102,7 +103,7 @@ static int atlas_acpi_button_add(struct acpi_device *device)
102 103
103 err = input_register_device(input_dev); 104 err = input_register_device(input_dev);
104 if (err) { 105 if (err) {
105 printk(KERN_ERR "atlas: couldn't register input device\n"); 106 pr_err("couldn't register input device\n");
106 input_free_device(input_dev); 107 input_free_device(input_dev);
107 return err; 108 return err;
108 } 109 }
@@ -112,12 +113,12 @@ static int atlas_acpi_button_add(struct acpi_device *device)
112 0x81, &acpi_atlas_button_handler, 113 0x81, &acpi_atlas_button_handler,
113 &acpi_atlas_button_setup, device); 114 &acpi_atlas_button_setup, device);
114 if (ACPI_FAILURE(status)) { 115 if (ACPI_FAILURE(status)) {
115 printk(KERN_ERR "Atlas: Error installing addr spc handler\n"); 116 pr_err("error installing addr spc handler\n");
116 input_unregister_device(input_dev); 117 input_unregister_device(input_dev);
117 status = -EINVAL; 118 err = -EINVAL;
118 } 119 }
119 120
120 return status; 121 return err;
121} 122}
122 123
123static int atlas_acpi_button_remove(struct acpi_device *device, int type) 124static int atlas_acpi_button_remove(struct acpi_device *device, int type)
@@ -126,14 +127,12 @@ static int atlas_acpi_button_remove(struct acpi_device *device, int type)
126 127
127 status = acpi_remove_address_space_handler(device->handle, 128 status = acpi_remove_address_space_handler(device->handle,
128 0x81, &acpi_atlas_button_handler); 129 0x81, &acpi_atlas_button_handler);
129 if (ACPI_FAILURE(status)) { 130 if (ACPI_FAILURE(status))
130 printk(KERN_ERR "Atlas: Error removing addr spc handler\n"); 131 pr_err("error removing addr spc handler\n");
131 status = -EINVAL;
132 }
133 132
134 input_unregister_device(input_dev); 133 input_unregister_device(input_dev);
135 134
136 return status; 135 return 0;
137} 136}
138 137
139static const struct acpi_device_id atlas_device_ids[] = { 138static const struct acpi_device_id atlas_device_ids[] = {
@@ -145,6 +144,7 @@ MODULE_DEVICE_TABLE(acpi, atlas_device_ids);
145static struct acpi_driver atlas_acpi_driver = { 144static struct acpi_driver atlas_acpi_driver = {
146 .name = ACPI_ATLAS_NAME, 145 .name = ACPI_ATLAS_NAME,
147 .class = ACPI_ATLAS_CLASS, 146 .class = ACPI_ATLAS_CLASS,
147 .owner = THIS_MODULE,
148 .ids = atlas_device_ids, 148 .ids = atlas_device_ids,
149 .ops = { 149 .ops = {
150 .add = atlas_acpi_button_add, 150 .add = atlas_acpi_button_add,
@@ -154,18 +154,10 @@ static struct acpi_driver atlas_acpi_driver = {
154 154
155static int __init atlas_acpi_init(void) 155static int __init atlas_acpi_init(void)
156{ 156{
157 int result;
158
159 if (acpi_disabled) 157 if (acpi_disabled)
160 return -ENODEV; 158 return -ENODEV;
161 159
162 result = acpi_bus_register_driver(&atlas_acpi_driver); 160 return acpi_bus_register_driver(&atlas_acpi_driver);
163 if (result < 0) {
164 printk(KERN_ERR "Atlas ACPI: Unable to register driver\n");
165 return -ENODEV;
166 }
167
168 return 0;
169} 161}
170 162
171static void __exit atlas_acpi_exit(void) 163static void __exit atlas_acpi_exit(void)
diff --git a/drivers/input/misc/pwm-beeper.c b/drivers/input/misc/pwm-beeper.c
new file mode 100644
index 000000000000..57c294f07198
--- /dev/null
+++ b/drivers/input/misc/pwm-beeper.c
@@ -0,0 +1,199 @@
1/*
2 * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
3 * PWM beeper driver
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * You should have received a copy of the GNU General Public License along
11 * with this program; if not, write to the Free Software Foundation, Inc.,
12 * 675 Mass Ave, Cambridge, MA 02139, USA.
13 *
14 */
15
16#include <linux/input.h>
17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/platform_device.h>
20#include <linux/pwm.h>
21#include <linux/slab.h>
22
23struct pwm_beeper {
24 struct input_dev *input;
25 struct pwm_device *pwm;
26 unsigned long period;
27};
28
29#define HZ_TO_NANOSECONDS(x) (1000000000UL/(x))
30
31static int pwm_beeper_event(struct input_dev *input,
32 unsigned int type, unsigned int code, int value)
33{
34 int ret = 0;
35 struct pwm_beeper *beeper = input_get_drvdata(input);
36 unsigned long period;
37
38 if (type != EV_SND || value < 0)
39 return -EINVAL;
40
41 switch (code) {
42 case SND_BELL:
43 value = value ? 1000 : 0;
44 break;
45 case SND_TONE:
46 break;
47 default:
48 return -EINVAL;
49 }
50
51 if (value == 0) {
52 pwm_config(beeper->pwm, 0, 0);
53 pwm_disable(beeper->pwm);
54 } else {
55 period = HZ_TO_NANOSECONDS(value);
56 ret = pwm_config(beeper->pwm, period / 2, period);
57 if (ret)
58 return ret;
59 ret = pwm_enable(beeper->pwm);
60 if (ret)
61 return ret;
62 beeper->period = period;
63 }
64
65 return 0;
66}
67
68static int __devinit pwm_beeper_probe(struct platform_device *pdev)
69{
70 unsigned long pwm_id = (unsigned long)pdev->dev.platform_data;
71 struct pwm_beeper *beeper;
72 int error;
73
74 beeper = kzalloc(sizeof(*beeper), GFP_KERNEL);
75 if (!beeper)
76 return -ENOMEM;
77
78 beeper->pwm = pwm_request(pwm_id, "pwm beeper");
79
80 if (IS_ERR(beeper->pwm)) {
81 error = PTR_ERR(beeper->pwm);
82 dev_err(&pdev->dev, "Failed to request pwm device: %d\n", error);
83 goto err_free;
84 }
85
86 beeper->input = input_allocate_device();
87 if (!beeper->input) {
88 dev_err(&pdev->dev, "Failed to allocate input device\n");
89 error = -ENOMEM;
90 goto err_pwm_free;
91 }
92 beeper->input->dev.parent = &pdev->dev;
93
94 beeper->input->name = "pwm-beeper";
95 beeper->input->phys = "pwm/input0";
96 beeper->input->id.bustype = BUS_HOST;
97 beeper->input->id.vendor = 0x001f;
98 beeper->input->id.product = 0x0001;
99 beeper->input->id.version = 0x0100;
100
101 beeper->input->evbit[0] = BIT(EV_SND);
102 beeper->input->sndbit[0] = BIT(SND_TONE) | BIT(SND_BELL);
103
104 beeper->input->event = pwm_beeper_event;
105
106 input_set_drvdata(beeper->input, beeper);
107
108 error = input_register_device(beeper->input);
109 if (error) {
110 dev_err(&pdev->dev, "Failed to register input device: %d\n", error);
111 goto err_input_free;
112 }
113
114 platform_set_drvdata(pdev, beeper);
115
116 return 0;
117
118err_input_free:
119 input_free_device(beeper->input);
120err_pwm_free:
121 pwm_free(beeper->pwm);
122err_free:
123 kfree(beeper);
124
125 return error;
126}
127
128static int __devexit pwm_beeper_remove(struct platform_device *pdev)
129{
130 struct pwm_beeper *beeper = platform_get_drvdata(pdev);
131
132 platform_set_drvdata(pdev, NULL);
133 input_unregister_device(beeper->input);
134
135 pwm_disable(beeper->pwm);
136 pwm_free(beeper->pwm);
137
138 kfree(beeper);
139
140 return 0;
141}
142
143#ifdef CONFIG_PM
144static int pwm_beeper_suspend(struct device *dev)
145{
146 struct pwm_beeper *beeper = dev_get_drvdata(dev);
147
148 if (beeper->period)
149 pwm_disable(beeper->pwm);
150
151 return 0;
152}
153
154static int pwm_beeper_resume(struct device *dev)
155{
156 struct pwm_beeper *beeper = dev_get_drvdata(dev);
157
158 if (beeper->period) {
159 pwm_config(beeper->pwm, beeper->period / 2, beeper->period);
160 pwm_enable(beeper->pwm);
161 }
162
163 return 0;
164}
165
166static SIMPLE_DEV_PM_OPS(pwm_beeper_pm_ops,
167 pwm_beeper_suspend, pwm_beeper_resume);
168
169#define PWM_BEEPER_PM_OPS (&pwm_beeper_pm_ops)
170#else
171#define PWM_BEEPER_PM_OPS NULL
172#endif
173
174static struct platform_driver pwm_beeper_driver = {
175 .probe = pwm_beeper_probe,
176 .remove = __devexit_p(pwm_beeper_remove),
177 .driver = {
178 .name = "pwm-beeper",
179 .owner = THIS_MODULE,
180 .pm = PWM_BEEPER_PM_OPS,
181 },
182};
183
184static int __init pwm_beeper_init(void)
185{
186 return platform_driver_register(&pwm_beeper_driver);
187}
188module_init(pwm_beeper_init);
189
190static void __exit pwm_beeper_exit(void)
191{
192 platform_driver_unregister(&pwm_beeper_driver);
193}
194module_exit(pwm_beeper_exit);
195
196MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
197MODULE_DESCRIPTION("PWM beeper driver");
198MODULE_LICENSE("GPL");
199MODULE_ALIAS("platform:pwm-beeper");
diff --git a/drivers/input/misc/sparcspkr.c b/drivers/input/misc/sparcspkr.c
index 1dacae4b43f0..f3bb92e9755f 100644
--- a/drivers/input/misc/sparcspkr.c
+++ b/drivers/input/misc/sparcspkr.c
@@ -353,14 +353,12 @@ static struct of_platform_driver grover_beep_driver = {
353 353
354static int __init sparcspkr_init(void) 354static int __init sparcspkr_init(void)
355{ 355{
356 int err = of_register_driver(&bbc_beep_driver, 356 int err = of_register_platform_driver(&bbc_beep_driver);
357 &of_platform_bus_type);
358 357
359 if (!err) { 358 if (!err) {
360 err = of_register_driver(&grover_beep_driver, 359 err = of_register_platform_driver(&grover_beep_driver);
361 &of_platform_bus_type);
362 if (err) 360 if (err)
363 of_unregister_driver(&bbc_beep_driver); 361 of_unregister_platform_driver(&bbc_beep_driver);
364 } 362 }
365 363
366 return err; 364 return err;
@@ -368,8 +366,8 @@ static int __init sparcspkr_init(void)
368 366
369static void __exit sparcspkr_exit(void) 367static void __exit sparcspkr_exit(void)
370{ 368{
371 of_unregister_driver(&bbc_beep_driver); 369 of_unregister_platform_driver(&bbc_beep_driver);
372 of_unregister_driver(&grover_beep_driver); 370 of_unregister_platform_driver(&grover_beep_driver);
373} 371}
374 372
375module_init(sparcspkr_init); 373module_init(sparcspkr_init);
diff --git a/drivers/input/misc/twl4030-pwrbutton.c b/drivers/input/misc/twl4030-pwrbutton.c
index e9069b87fde2..f16972bddca4 100644
--- a/drivers/input/misc/twl4030-pwrbutton.c
+++ b/drivers/input/misc/twl4030-pwrbutton.c
@@ -52,7 +52,7 @@ static irqreturn_t powerbutton_irq(int irq, void *_pwr)
52 return IRQ_HANDLED; 52 return IRQ_HANDLED;
53} 53}
54 54
55static int __devinit twl4030_pwrbutton_probe(struct platform_device *pdev) 55static int __init twl4030_pwrbutton_probe(struct platform_device *pdev)
56{ 56{
57 struct input_dev *pwr; 57 struct input_dev *pwr;
58 int irq = platform_get_irq(pdev, 0); 58 int irq = platform_get_irq(pdev, 0);
@@ -95,7 +95,7 @@ free_input_dev:
95 return err; 95 return err;
96} 96}
97 97
98static int __devexit twl4030_pwrbutton_remove(struct platform_device *pdev) 98static int __exit twl4030_pwrbutton_remove(struct platform_device *pdev)
99{ 99{
100 struct input_dev *pwr = platform_get_drvdata(pdev); 100 struct input_dev *pwr = platform_get_drvdata(pdev);
101 int irq = platform_get_irq(pdev, 0); 101 int irq = platform_get_irq(pdev, 0);
@@ -106,9 +106,8 @@ static int __devexit twl4030_pwrbutton_remove(struct platform_device *pdev)
106 return 0; 106 return 0;
107} 107}
108 108
109struct platform_driver twl4030_pwrbutton_driver = { 109static struct platform_driver twl4030_pwrbutton_driver = {
110 .probe = twl4030_pwrbutton_probe, 110 .remove = __exit_p(twl4030_pwrbutton_remove),
111 .remove = __devexit_p(twl4030_pwrbutton_remove),
112 .driver = { 111 .driver = {
113 .name = "twl4030_pwrbutton", 112 .name = "twl4030_pwrbutton",
114 .owner = THIS_MODULE, 113 .owner = THIS_MODULE,
@@ -117,7 +116,8 @@ struct platform_driver twl4030_pwrbutton_driver = {
117 116
118static int __init twl4030_pwrbutton_init(void) 117static int __init twl4030_pwrbutton_init(void)
119{ 118{
120 return platform_driver_register(&twl4030_pwrbutton_driver); 119 return platform_driver_probe(&twl4030_pwrbutton_driver,
120 twl4030_pwrbutton_probe);
121} 121}
122module_init(twl4030_pwrbutton_init); 122module_init(twl4030_pwrbutton_init);
123 123
diff --git a/drivers/input/misc/wistron_btns.c b/drivers/input/misc/wistron_btns.c
index 4dac8b79fcd4..12501de0c5cd 100644
--- a/drivers/input/misc/wistron_btns.c
+++ b/drivers/input/misc/wistron_btns.c
@@ -1347,7 +1347,7 @@ static int __init wb_module_init(void)
1347 1347
1348 err = map_bios(); 1348 err = map_bios();
1349 if (err) 1349 if (err)
1350 return err; 1350 goto err_free_keymap;
1351 1351
1352 err = platform_driver_register(&wistron_driver); 1352 err = platform_driver_register(&wistron_driver);
1353 if (err) 1353 if (err)
@@ -1371,6 +1371,8 @@ static int __init wb_module_init(void)
1371 platform_driver_unregister(&wistron_driver); 1371 platform_driver_unregister(&wistron_driver);
1372 err_unmap_bios: 1372 err_unmap_bios:
1373 unmap_bios(); 1373 unmap_bios();
1374 err_free_keymap:
1375 kfree(keymap);
1374 1376
1375 return err; 1377 return err;
1376} 1378}
diff --git a/drivers/input/mouse/Kconfig b/drivers/input/mouse/Kconfig
index eeb58c1cac16..c714ca2407f8 100644
--- a/drivers/input/mouse/Kconfig
+++ b/drivers/input/mouse/Kconfig
@@ -17,7 +17,7 @@ config MOUSE_PS2
17 default y 17 default y
18 select SERIO 18 select SERIO
19 select SERIO_LIBPS2 19 select SERIO_LIBPS2
20 select SERIO_I8042 if X86 && !X86_MRST 20 select SERIO_I8042 if X86
21 select SERIO_GSCPS2 if GSC 21 select SERIO_GSCPS2 if GSC
22 help 22 help
23 Say Y here if you have a PS/2 mouse connected to your system. This 23 Say Y here if you have a PS/2 mouse connected to your system. This
diff --git a/drivers/input/mouse/bcm5974.c b/drivers/input/mouse/bcm5974.c
index 6dedded27222..ea67c49146a3 100644
--- a/drivers/input/mouse/bcm5974.c
+++ b/drivers/input/mouse/bcm5974.c
@@ -312,6 +312,8 @@ static void setup_events_to_report(struct input_dev *input_dev,
312 __set_bit(BTN_TOOL_TRIPLETAP, input_dev->keybit); 312 __set_bit(BTN_TOOL_TRIPLETAP, input_dev->keybit);
313 __set_bit(BTN_TOOL_QUADTAP, input_dev->keybit); 313 __set_bit(BTN_TOOL_QUADTAP, input_dev->keybit);
314 __set_bit(BTN_LEFT, input_dev->keybit); 314 __set_bit(BTN_LEFT, input_dev->keybit);
315
316 input_set_events_per_packet(input_dev, 60);
315} 317}
316 318
317/* report button data as logical button state */ 319/* report button data as logical button state */
@@ -580,23 +582,30 @@ exit:
580 */ 582 */
581static int bcm5974_start_traffic(struct bcm5974 *dev) 583static int bcm5974_start_traffic(struct bcm5974 *dev)
582{ 584{
583 if (bcm5974_wellspring_mode(dev, true)) { 585 int error;
586
587 error = bcm5974_wellspring_mode(dev, true);
588 if (error) {
584 dprintk(1, "bcm5974: mode switch failed\n"); 589 dprintk(1, "bcm5974: mode switch failed\n");
585 goto error; 590 goto err_out;
586 } 591 }
587 592
588 if (usb_submit_urb(dev->bt_urb, GFP_KERNEL)) 593 error = usb_submit_urb(dev->bt_urb, GFP_KERNEL);
589 goto error; 594 if (error)
595 goto err_reset_mode;
590 596
591 if (usb_submit_urb(dev->tp_urb, GFP_KERNEL)) 597 error = usb_submit_urb(dev->tp_urb, GFP_KERNEL);
598 if (error)
592 goto err_kill_bt; 599 goto err_kill_bt;
593 600
594 return 0; 601 return 0;
595 602
596err_kill_bt: 603err_kill_bt:
597 usb_kill_urb(dev->bt_urb); 604 usb_kill_urb(dev->bt_urb);
598error: 605err_reset_mode:
599 return -EIO; 606 bcm5974_wellspring_mode(dev, false);
607err_out:
608 return error;
600} 609}
601 610
602static void bcm5974_pause_traffic(struct bcm5974 *dev) 611static void bcm5974_pause_traffic(struct bcm5974 *dev)
diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c
index 40cea334ad13..8c324403b9f2 100644
--- a/drivers/input/mouse/synaptics.c
+++ b/drivers/input/mouse/synaptics.c
@@ -141,8 +141,13 @@ static int synaptics_capability(struct psmouse *psmouse)
141 priv->capabilities = (cap[0] << 16) | (cap[1] << 8) | cap[2]; 141 priv->capabilities = (cap[0] << 16) | (cap[1] << 8) | cap[2];
142 priv->ext_cap = priv->ext_cap_0c = 0; 142 priv->ext_cap = priv->ext_cap_0c = 0;
143 143
144 if (!SYN_CAP_VALID(priv->capabilities)) 144 /*
145 * Older firmwares had submodel ID fixed to 0x47
146 */
147 if (SYN_ID_FULL(priv->identity) < 0x705 &&
148 SYN_CAP_SUBMODEL_ID(priv->capabilities) != 0x47) {
145 return -1; 149 return -1;
150 }
146 151
147 /* 152 /*
148 * Unless capExtended is set the rest of the flags should be ignored 153 * Unless capExtended is set the rest of the flags should be ignored
@@ -206,6 +211,7 @@ static int synaptics_resolution(struct psmouse *psmouse)
206 unsigned char max[3]; 211 unsigned char max[3];
207 212
208 if (SYN_ID_MAJOR(priv->identity) < 4) 213 if (SYN_ID_MAJOR(priv->identity) < 4)
214 return 0;
209 215
210 if (synaptics_send_cmd(psmouse, SYN_QUE_RESOLUTION, res) == 0) { 216 if (synaptics_send_cmd(psmouse, SYN_QUE_RESOLUTION, res) == 0) {
211 if (res[0] != 0 && (res[1] & 0x80) && res[2] != 0) { 217 if (res[0] != 0 && (res[1] & 0x80) && res[2] != 0) {
@@ -496,7 +502,9 @@ static void synaptics_process_packet(struct psmouse *psmouse)
496 } 502 }
497 input_report_abs(dev, ABS_PRESSURE, hw.z); 503 input_report_abs(dev, ABS_PRESSURE, hw.z);
498 504
499 input_report_abs(dev, ABS_TOOL_WIDTH, finger_width); 505 if (SYN_CAP_PALMDETECT(priv->capabilities))
506 input_report_abs(dev, ABS_TOOL_WIDTH, finger_width);
507
500 input_report_key(dev, BTN_TOOL_FINGER, num_fingers == 1); 508 input_report_key(dev, BTN_TOOL_FINGER, num_fingers == 1);
501 input_report_key(dev, BTN_LEFT, hw.left); 509 input_report_key(dev, BTN_LEFT, hw.left);
502 input_report_key(dev, BTN_RIGHT, hw.right); 510 input_report_key(dev, BTN_RIGHT, hw.right);
@@ -596,7 +604,9 @@ static void set_input_params(struct input_dev *dev, struct synaptics_data *priv)
596 input_set_abs_params(dev, ABS_Y, 604 input_set_abs_params(dev, ABS_Y,
597 YMIN_NOMINAL, priv->y_max ?: YMAX_NOMINAL, 0, 0); 605 YMIN_NOMINAL, priv->y_max ?: YMAX_NOMINAL, 0, 0);
598 input_set_abs_params(dev, ABS_PRESSURE, 0, 255, 0, 0); 606 input_set_abs_params(dev, ABS_PRESSURE, 0, 255, 0, 0);
599 __set_bit(ABS_TOOL_WIDTH, dev->absbit); 607
608 if (SYN_CAP_PALMDETECT(priv->capabilities))
609 input_set_abs_params(dev, ABS_TOOL_WIDTH, 0, 15, 0, 0);
600 610
601 __set_bit(EV_KEY, dev->evbit); 611 __set_bit(EV_KEY, dev->evbit);
602 __set_bit(BTN_TOUCH, dev->keybit); 612 __set_bit(BTN_TOUCH, dev->keybit);
diff --git a/drivers/input/mouse/synaptics.h b/drivers/input/mouse/synaptics.h
index 7d4d5e12c0df..b6aa7d20d8a3 100644
--- a/drivers/input/mouse/synaptics.h
+++ b/drivers/input/mouse/synaptics.h
@@ -47,7 +47,7 @@
47#define SYN_CAP_FOUR_BUTTON(c) ((c) & (1 << 3)) 47#define SYN_CAP_FOUR_BUTTON(c) ((c) & (1 << 3))
48#define SYN_CAP_MULTIFINGER(c) ((c) & (1 << 1)) 48#define SYN_CAP_MULTIFINGER(c) ((c) & (1 << 1))
49#define SYN_CAP_PALMDETECT(c) ((c) & (1 << 0)) 49#define SYN_CAP_PALMDETECT(c) ((c) & (1 << 0))
50#define SYN_CAP_VALID(c) ((((c) & 0x00ff00) >> 8) == 0x47) 50#define SYN_CAP_SUBMODEL_ID(c) (((c) & 0x00ff00) >> 8)
51#define SYN_EXT_CAP_REQUESTS(c) (((c) & 0x700000) >> 20) 51#define SYN_EXT_CAP_REQUESTS(c) (((c) & 0x700000) >> 20)
52#define SYN_CAP_MULTI_BUTTON_NO(ec) (((ec) & 0x00f000) >> 12) 52#define SYN_CAP_MULTI_BUTTON_NO(ec) (((ec) & 0x00f000) >> 12)
53#define SYN_CAP_PRODUCT_ID(ec) (((ec) & 0xff0000) >> 16) 53#define SYN_CAP_PRODUCT_ID(ec) (((ec) & 0xff0000) >> 16)
@@ -66,6 +66,7 @@
66#define SYN_ID_MODEL(i) (((i) >> 4) & 0x0f) 66#define SYN_ID_MODEL(i) (((i) >> 4) & 0x0f)
67#define SYN_ID_MAJOR(i) ((i) & 0x0f) 67#define SYN_ID_MAJOR(i) ((i) & 0x0f)
68#define SYN_ID_MINOR(i) (((i) >> 16) & 0xff) 68#define SYN_ID_MINOR(i) (((i) >> 16) & 0xff)
69#define SYN_ID_FULL(i) ((SYN_ID_MAJOR(i) << 8) | SYN_ID_MINOR(i))
69#define SYN_ID_IS_SYNAPTICS(i) ((((i) >> 8) & 0xff) == 0x47) 70#define SYN_ID_IS_SYNAPTICS(i) ((((i) >> 8) & 0xff) == 0x47)
70 71
71/* synaptics special commands */ 72/* synaptics special commands */
diff --git a/drivers/input/mousedev.c b/drivers/input/mousedev.c
index f34b22bce4ff..d8f68f77007b 100644
--- a/drivers/input/mousedev.c
+++ b/drivers/input/mousedev.c
@@ -57,7 +57,6 @@ struct mousedev_hw_data {
57}; 57};
58 58
59struct mousedev { 59struct mousedev {
60 int exist;
61 int open; 60 int open;
62 int minor; 61 int minor;
63 struct input_handle handle; 62 struct input_handle handle;
@@ -66,6 +65,7 @@ struct mousedev {
66 spinlock_t client_lock; /* protects client_list */ 65 spinlock_t client_lock; /* protects client_list */
67 struct mutex mutex; 66 struct mutex mutex;
68 struct device dev; 67 struct device dev;
68 bool exist;
69 69
70 struct list_head mixdev_node; 70 struct list_head mixdev_node;
71 int mixdev_open; 71 int mixdev_open;
@@ -765,10 +765,15 @@ static unsigned int mousedev_poll(struct file *file, poll_table *wait)
765{ 765{
766 struct mousedev_client *client = file->private_data; 766 struct mousedev_client *client = file->private_data;
767 struct mousedev *mousedev = client->mousedev; 767 struct mousedev *mousedev = client->mousedev;
768 unsigned int mask;
768 769
769 poll_wait(file, &mousedev->wait, wait); 770 poll_wait(file, &mousedev->wait, wait);
770 return ((client->ready || client->buffer) ? (POLLIN | POLLRDNORM) : 0) | 771
771 (mousedev->exist ? 0 : (POLLHUP | POLLERR)); 772 mask = mousedev->exist ? POLLOUT | POLLWRNORM : POLLHUP | POLLERR;
773 if (client->ready || client->buffer)
774 mask |= POLLIN | POLLRDNORM;
775
776 return mask;
772} 777}
773 778
774static const struct file_operations mousedev_fops = { 779static const struct file_operations mousedev_fops = {
@@ -802,7 +807,7 @@ static void mousedev_remove_chrdev(struct mousedev *mousedev)
802static void mousedev_mark_dead(struct mousedev *mousedev) 807static void mousedev_mark_dead(struct mousedev *mousedev)
803{ 808{
804 mutex_lock(&mousedev->mutex); 809 mutex_lock(&mousedev->mutex);
805 mousedev->exist = 0; 810 mousedev->exist = false;
806 mutex_unlock(&mousedev->mutex); 811 mutex_unlock(&mousedev->mutex);
807} 812}
808 813
@@ -862,7 +867,7 @@ static struct mousedev *mousedev_create(struct input_dev *dev,
862 dev_set_name(&mousedev->dev, "mouse%d", minor); 867 dev_set_name(&mousedev->dev, "mouse%d", minor);
863 868
864 mousedev->minor = minor; 869 mousedev->minor = minor;
865 mousedev->exist = 1; 870 mousedev->exist = true;
866 mousedev->handle.dev = input_get_device(dev); 871 mousedev->handle.dev = input_get_device(dev);
867 mousedev->handle.name = dev_name(&mousedev->dev); 872 mousedev->handle.name = dev_name(&mousedev->dev);
868 mousedev->handle.handler = handler; 873 mousedev->handle.handler = handler;
diff --git a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig
index 256b9e9394dc..3bfe8fafc6ad 100644
--- a/drivers/input/serio/Kconfig
+++ b/drivers/input/serio/Kconfig
@@ -22,7 +22,7 @@ config SERIO_I8042
22 tristate "i8042 PC Keyboard controller" if EMBEDDED || !X86 22 tristate "i8042 PC Keyboard controller" if EMBEDDED || !X86
23 default y 23 default y
24 depends on !PARISC && (!ARM || ARCH_SHARK || FOOTBRIDGE_HOST) && \ 24 depends on !PARISC && (!ARM || ARCH_SHARK || FOOTBRIDGE_HOST) && \
25 (!SUPERH || SH_CAYMAN) && !M68K && !BLACKFIN && !X86_MRST 25 (!SUPERH || SH_CAYMAN) && !M68K && !BLACKFIN
26 help 26 help
27 i8042 is the chip over which the standard AT keyboard and PS/2 27 i8042 is the chip over which the standard AT keyboard and PS/2
28 mouse are connected to the computer. If you use these devices, 28 mouse are connected to the computer. If you use these devices,
diff --git a/drivers/input/serio/i8042-io.h b/drivers/input/serio/i8042-io.h
index 847f4aad7ed5..5d48bb66aa73 100644
--- a/drivers/input/serio/i8042-io.h
+++ b/drivers/input/serio/i8042-io.h
@@ -27,6 +27,11 @@
27#include <asm/irq.h> 27#include <asm/irq.h>
28#elif defined(CONFIG_SH_CAYMAN) 28#elif defined(CONFIG_SH_CAYMAN)
29#include <asm/irq.h> 29#include <asm/irq.h>
30#elif defined(CONFIG_PPC)
31extern int of_i8042_kbd_irq;
32extern int of_i8042_aux_irq;
33# define I8042_KBD_IRQ of_i8042_kbd_irq
34# define I8042_AUX_IRQ of_i8042_aux_irq
30#else 35#else
31# define I8042_KBD_IRQ 1 36# define I8042_KBD_IRQ 1
32# define I8042_AUX_IRQ 12 37# define I8042_AUX_IRQ 12
diff --git a/drivers/input/serio/i8042-ppcio.h b/drivers/input/serio/i8042-ppcio.h
index 2906e1b60c04..f708c75d16f1 100644
--- a/drivers/input/serio/i8042-ppcio.h
+++ b/drivers/input/serio/i8042-ppcio.h
@@ -52,81 +52,6 @@ static inline void i8042_platform_exit(void)
52{ 52{
53} 53}
54 54
55#elif defined(CONFIG_SPRUCE)
56
57#define I8042_KBD_IRQ 22
58#define I8042_AUX_IRQ 21
59
60#define I8042_KBD_PHYS_DESC "spruceps2/serio0"
61#define I8042_AUX_PHYS_DESC "spruceps2/serio1"
62#define I8042_MUX_PHYS_DESC "spruceps2/serio%d"
63
64#define I8042_COMMAND_REG 0xff810000
65#define I8042_DATA_REG 0xff810001
66
67static inline int i8042_read_data(void)
68{
69 unsigned long kbd_data;
70
71 __raw_writel(0x00000088, 0xff500008);
72 eieio();
73
74 __raw_writel(0x03000000, 0xff50000c);
75 eieio();
76
77 asm volatile("lis 7,0xff88 \n\
78 lswi 6,7,0x8 \n\
79 mr %0,6"
80 : "=r" (kbd_data) :: "6", "7");
81
82 __raw_writel(0x00000000, 0xff50000c);
83 eieio();
84
85 return (unsigned char)(kbd_data >> 24);
86}
87
88static inline int i8042_read_status(void)
89{
90 unsigned long kbd_status;
91
92 __raw_writel(0x00000088, 0xff500008);
93 eieio();
94
95 __raw_writel(0x03000000, 0xff50000c);
96 eieio();
97
98 asm volatile("lis 7,0xff88 \n\
99 ori 7,7,0x8 \n\
100 lswi 6,7,0x8 \n\
101 mr %0,6"
102 : "=r" (kbd_status) :: "6", "7");
103
104 __raw_writel(0x00000000, 0xff50000c);
105 eieio();
106
107 return (unsigned char)(kbd_status >> 24);
108}
109
110static inline void i8042_write_data(int val)
111{
112 *((unsigned char *)0xff810000) = (char)val;
113}
114
115static inline void i8042_write_command(int val)
116{
117 *((unsigned char *)0xff810001) = (char)val;
118}
119
120static inline int i8042_platform_init(void)
121{
122 i8042_reset = 1;
123 return 0;
124}
125
126static inline void i8042_platform_exit(void)
127{
128}
129
130#else 55#else
131 56
132#include "i8042-io.h" 57#include "i8042-io.h"
diff --git a/drivers/input/serio/i8042-sparcio.h b/drivers/input/serio/i8042-sparcio.h
index 04e32f2d1241..cb2a24b94746 100644
--- a/drivers/input/serio/i8042-sparcio.h
+++ b/drivers/input/serio/i8042-sparcio.h
@@ -58,9 +58,9 @@ static int __devinit sparc_i8042_probe(struct of_device *op, const struct of_dev
58 if (!strcmp(dp->name, OBP_PS2KBD_NAME1) || 58 if (!strcmp(dp->name, OBP_PS2KBD_NAME1) ||
59 !strcmp(dp->name, OBP_PS2KBD_NAME2)) { 59 !strcmp(dp->name, OBP_PS2KBD_NAME2)) {
60 struct of_device *kbd = of_find_device_by_node(dp); 60 struct of_device *kbd = of_find_device_by_node(dp);
61 unsigned int irq = kbd->irqs[0]; 61 unsigned int irq = kbd->archdata.irqs[0];
62 if (irq == 0xffffffff) 62 if (irq == 0xffffffff)
63 irq = op->irqs[0]; 63 irq = op->archdata.irqs[0];
64 i8042_kbd_irq = irq; 64 i8042_kbd_irq = irq;
65 kbd_iobase = of_ioremap(&kbd->resource[0], 65 kbd_iobase = of_ioremap(&kbd->resource[0],
66 0, 8, "kbd"); 66 0, 8, "kbd");
@@ -68,9 +68,9 @@ static int __devinit sparc_i8042_probe(struct of_device *op, const struct of_dev
68 } else if (!strcmp(dp->name, OBP_PS2MS_NAME1) || 68 } else if (!strcmp(dp->name, OBP_PS2MS_NAME1) ||
69 !strcmp(dp->name, OBP_PS2MS_NAME2)) { 69 !strcmp(dp->name, OBP_PS2MS_NAME2)) {
70 struct of_device *ms = of_find_device_by_node(dp); 70 struct of_device *ms = of_find_device_by_node(dp);
71 unsigned int irq = ms->irqs[0]; 71 unsigned int irq = ms->archdata.irqs[0];
72 if (irq == 0xffffffff) 72 if (irq == 0xffffffff)
73 irq = op->irqs[0]; 73 irq = op->archdata.irqs[0];
74 i8042_aux_irq = irq; 74 i8042_aux_irq = irq;
75 } 75 }
76 76
@@ -116,8 +116,7 @@ static int __init i8042_platform_init(void)
116 if (!kbd_iobase) 116 if (!kbd_iobase)
117 return -ENODEV; 117 return -ENODEV;
118 } else { 118 } else {
119 int err = of_register_driver(&sparc_i8042_driver, 119 int err = of_register_platform_driver(&sparc_i8042_driver);
120 &of_bus_type);
121 if (err) 120 if (err)
122 return err; 121 return err;
123 122
@@ -141,7 +140,7 @@ static inline void i8042_platform_exit(void)
141 struct device_node *root = of_find_node_by_path("/"); 140 struct device_node *root = of_find_node_by_path("/");
142 141
143 if (strcmp(root->name, "SUNW,JavaStation-1")) 142 if (strcmp(root->name, "SUNW,JavaStation-1"))
144 of_unregister_driver(&sparc_i8042_driver); 143 of_unregister_platform_driver(&sparc_i8042_driver);
145} 144}
146 145
147#else /* !CONFIG_PCI */ 146#else /* !CONFIG_PCI */
diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h
index 6168469ad1a6..ed7ad7416b24 100644
--- a/drivers/input/serio/i8042-x86ia64io.h
+++ b/drivers/input/serio/i8042-x86ia64io.h
@@ -7,6 +7,10 @@
7 * the Free Software Foundation. 7 * the Free Software Foundation.
8 */ 8 */
9 9
10#ifdef CONFIG_X86
11#include <asm/x86_init.h>
12#endif
13
10/* 14/*
11 * Names. 15 * Names.
12 */ 16 */
@@ -166,6 +170,13 @@ static const struct dmi_system_id __initconst i8042_dmi_noloop_table[] = {
166 }, 170 },
167 }, 171 },
168 { 172 {
173 /* Gigabyte Spring Peak - defines wrong chassis type */
174 .matches = {
175 DMI_MATCH(DMI_SYS_VENDOR, "GIGABYTE"),
176 DMI_MATCH(DMI_PRODUCT_NAME, "Spring Peak"),
177 },
178 },
179 {
169 .matches = { 180 .matches = {
170 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 181 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
171 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv9700"), 182 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv9700"),
@@ -840,6 +851,12 @@ static int __init i8042_platform_init(void)
840{ 851{
841 int retval; 852 int retval;
842 853
854#ifdef CONFIG_X86
855 /* Just return if pre-detection shows no i8042 controller exist */
856 if (!x86_platform.i8042_detect())
857 return -ENODEV;
858#endif
859
843/* 860/*
844 * On ix86 platforms touching the i8042 data register region can do really 861 * On ix86 platforms touching the i8042 data register region can do really
845 * bad things. Because of this the region is always reserved on ix86 boxes. 862 * bad things. Because of this the region is always reserved on ix86 boxes.
diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c
index 6440a8f55686..258b98b9d7c2 100644
--- a/drivers/input/serio/i8042.c
+++ b/drivers/input/serio/i8042.c
@@ -861,9 +861,6 @@ static int i8042_controller_selftest(void)
861 unsigned char param; 861 unsigned char param;
862 int i = 0; 862 int i = 0;
863 863
864 if (!i8042_reset)
865 return 0;
866
867 /* 864 /*
868 * We try this 5 times; on some really fragile systems this does not 865 * We try this 5 times; on some really fragile systems this does not
869 * take the first time... 866 * take the first time...
@@ -1020,7 +1017,8 @@ static void i8042_controller_reset(void)
1020 * Reset the controller if requested. 1017 * Reset the controller if requested.
1021 */ 1018 */
1022 1019
1023 i8042_controller_selftest(); 1020 if (i8042_reset)
1021 i8042_controller_selftest();
1024 1022
1025/* 1023/*
1026 * Restore the original control register setting. 1024 * Restore the original control register setting.
@@ -1094,23 +1092,11 @@ static void i8042_dritek_enable(void)
1094#ifdef CONFIG_PM 1092#ifdef CONFIG_PM
1095 1093
1096/* 1094/*
1097 * Here we try to restore the original BIOS settings to avoid
1098 * upsetting it.
1099 */
1100
1101static int i8042_pm_reset(struct device *dev)
1102{
1103 i8042_controller_reset();
1104
1105 return 0;
1106}
1107
1108/*
1109 * Here we try to reset everything back to a state we had 1095 * Here we try to reset everything back to a state we had
1110 * before suspending. 1096 * before suspending.
1111 */ 1097 */
1112 1098
1113static int i8042_pm_restore(struct device *dev) 1099static int i8042_controller_resume(bool force_reset)
1114{ 1100{
1115 int error; 1101 int error;
1116 1102
@@ -1118,9 +1104,11 @@ static int i8042_pm_restore(struct device *dev)
1118 if (error) 1104 if (error)
1119 return error; 1105 return error;
1120 1106
1121 error = i8042_controller_selftest(); 1107 if (i8042_reset || force_reset) {
1122 if (error) 1108 error = i8042_controller_selftest();
1123 return error; 1109 if (error)
1110 return error;
1111 }
1124 1112
1125/* 1113/*
1126 * Restore original CTR value and disable all ports 1114 * Restore original CTR value and disable all ports
@@ -1162,6 +1150,28 @@ static int i8042_pm_restore(struct device *dev)
1162 return 0; 1150 return 0;
1163} 1151}
1164 1152
1153/*
1154 * Here we try to restore the original BIOS settings to avoid
1155 * upsetting it.
1156 */
1157
1158static int i8042_pm_reset(struct device *dev)
1159{
1160 i8042_controller_reset();
1161
1162 return 0;
1163}
1164
1165static int i8042_pm_resume(struct device *dev)
1166{
1167 /*
1168 * On resume from S2R we always try to reset the controller
1169 * to bring it in a sane state. (In case of S2D we expect
1170 * BIOS to reset the controller for us.)
1171 */
1172 return i8042_controller_resume(true);
1173}
1174
1165static int i8042_pm_thaw(struct device *dev) 1175static int i8042_pm_thaw(struct device *dev)
1166{ 1176{
1167 i8042_interrupt(0, NULL); 1177 i8042_interrupt(0, NULL);
@@ -1169,9 +1179,14 @@ static int i8042_pm_thaw(struct device *dev)
1169 return 0; 1179 return 0;
1170} 1180}
1171 1181
1182static int i8042_pm_restore(struct device *dev)
1183{
1184 return i8042_controller_resume(false);
1185}
1186
1172static const struct dev_pm_ops i8042_pm_ops = { 1187static const struct dev_pm_ops i8042_pm_ops = {
1173 .suspend = i8042_pm_reset, 1188 .suspend = i8042_pm_reset,
1174 .resume = i8042_pm_restore, 1189 .resume = i8042_pm_resume,
1175 .thaw = i8042_pm_thaw, 1190 .thaw = i8042_pm_thaw,
1176 .poweroff = i8042_pm_reset, 1191 .poweroff = i8042_pm_reset,
1177 .restore = i8042_pm_restore, 1192 .restore = i8042_pm_restore,
@@ -1389,9 +1404,11 @@ static int __init i8042_probe(struct platform_device *dev)
1389 1404
1390 i8042_platform_device = dev; 1405 i8042_platform_device = dev;
1391 1406
1392 error = i8042_controller_selftest(); 1407 if (i8042_reset) {
1393 if (error) 1408 error = i8042_controller_selftest();
1394 return error; 1409 if (error)
1410 return error;
1411 }
1395 1412
1396 error = i8042_controller_init(); 1413 error = i8042_controller_init();
1397 if (error) 1414 if (error)
diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c
index 415f6306105d..ce0b4608dad9 100644
--- a/drivers/input/tablet/wacom_wac.c
+++ b/drivers/input/tablet/wacom_wac.c
@@ -158,6 +158,39 @@ static int wacom_ptu_irq(struct wacom_wac *wacom)
158 return 1; 158 return 1;
159} 159}
160 160
161static int wacom_dtu_irq(struct wacom_wac *wacom)
162{
163 struct wacom_features *features = &wacom->features;
164 char *data = wacom->data;
165 struct input_dev *input = wacom->input;
166 int prox = data[1] & 0x20, pressure;
167
168 dbg("wacom_dtu_irq: received report #%d", data[0]);
169
170 if (prox) {
171 /* Going into proximity select tool */
172 wacom->tool[0] = (data[1] & 0x0c) ? BTN_TOOL_RUBBER : BTN_TOOL_PEN;
173 if (wacom->tool[0] == BTN_TOOL_PEN)
174 wacom->id[0] = STYLUS_DEVICE_ID;
175 else
176 wacom->id[0] = ERASER_DEVICE_ID;
177 }
178 input_report_key(input, BTN_STYLUS, data[1] & 0x02);
179 input_report_key(input, BTN_STYLUS2, data[1] & 0x10);
180 input_report_abs(input, ABS_X, le16_to_cpup((__le16 *)&data[2]));
181 input_report_abs(input, ABS_Y, le16_to_cpup((__le16 *)&data[4]));
182 pressure = ((data[7] & 0x01) << 8) | data[6];
183 if (pressure < 0)
184 pressure = features->pressure_max + pressure + 1;
185 input_report_abs(input, ABS_PRESSURE, pressure);
186 input_report_key(input, BTN_TOUCH, data[1] & 0x05);
187 if (!prox) /* out-prox */
188 wacom->id[0] = 0;
189 input_report_key(input, wacom->tool[0], prox);
190 input_report_abs(input, ABS_MISC, wacom->id[0]);
191 return 1;
192}
193
161static int wacom_graphire_irq(struct wacom_wac *wacom) 194static int wacom_graphire_irq(struct wacom_wac *wacom)
162{ 195{
163 struct wacom_features *features = &wacom->features; 196 struct wacom_features *features = &wacom->features;
@@ -845,6 +878,10 @@ void wacom_wac_irq(struct wacom_wac *wacom_wac, size_t len)
845 sync = wacom_ptu_irq(wacom_wac); 878 sync = wacom_ptu_irq(wacom_wac);
846 break; 879 break;
847 880
881 case DTU:
882 sync = wacom_dtu_irq(wacom_wac);
883 break;
884
848 case INTUOS: 885 case INTUOS:
849 case INTUOS3S: 886 case INTUOS3S:
850 case INTUOS3: 887 case INTUOS3:
@@ -1030,6 +1067,7 @@ void wacom_setup_input_capabilities(struct input_dev *input_dev,
1030 1067
1031 case PL: 1068 case PL:
1032 case PTU: 1069 case PTU:
1070 case DTU:
1033 __set_bit(BTN_TOOL_PEN, input_dev->keybit); 1071 __set_bit(BTN_TOOL_PEN, input_dev->keybit);
1034 __set_bit(BTN_STYLUS, input_dev->keybit); 1072 __set_bit(BTN_STYLUS, input_dev->keybit);
1035 __set_bit(BTN_STYLUS2, input_dev->keybit); 1073 __set_bit(BTN_STYLUS2, input_dev->keybit);
@@ -1155,6 +1193,10 @@ static const struct wacom_features wacom_features_0xC6 =
1155 { "Wacom Cintiq 12WX", WACOM_PKGLEN_INTUOS, 53020, 33440, 1023, 63, WACOM_BEE }; 1193 { "Wacom Cintiq 12WX", WACOM_PKGLEN_INTUOS, 53020, 33440, 1023, 63, WACOM_BEE };
1156static const struct wacom_features wacom_features_0xC7 = 1194static const struct wacom_features wacom_features_0xC7 =
1157 { "Wacom DTU1931", WACOM_PKGLEN_GRAPHIRE, 37832, 30305, 511, 0, PL }; 1195 { "Wacom DTU1931", WACOM_PKGLEN_GRAPHIRE, 37832, 30305, 511, 0, PL };
1196static const struct wacom_features wacom_features_0xCE =
1197 { "Wacom DTU2231", WACOM_PKGLEN_GRAPHIRE, 47864, 27011, 511, 0, DTU };
1198static const struct wacom_features wacom_features_0xF0 =
1199 { "Wacom DTU1631", WACOM_PKGLEN_GRAPHIRE, 34623, 19553, 511, 0, DTU };
1158static const struct wacom_features wacom_features_0xCC = 1200static const struct wacom_features wacom_features_0xCC =
1159 { "Wacom Cintiq 21UX2", WACOM_PKGLEN_INTUOS, 87200, 65600, 2047, 63, WACOM_21UX2 }; 1201 { "Wacom Cintiq 21UX2", WACOM_PKGLEN_INTUOS, 87200, 65600, 2047, 63, WACOM_21UX2 };
1160static const struct wacom_features wacom_features_0x90 = 1202static const struct wacom_features wacom_features_0x90 =
@@ -1234,6 +1276,8 @@ const struct usb_device_id wacom_ids[] = {
1234 { USB_DEVICE_WACOM(0xC5) }, 1276 { USB_DEVICE_WACOM(0xC5) },
1235 { USB_DEVICE_WACOM(0xC6) }, 1277 { USB_DEVICE_WACOM(0xC6) },
1236 { USB_DEVICE_WACOM(0xC7) }, 1278 { USB_DEVICE_WACOM(0xC7) },
1279 { USB_DEVICE_WACOM(0xCE) },
1280 { USB_DEVICE_WACOM(0xF0) },
1237 { USB_DEVICE_WACOM(0xCC) }, 1281 { USB_DEVICE_WACOM(0xCC) },
1238 { USB_DEVICE_WACOM(0x90) }, 1282 { USB_DEVICE_WACOM(0x90) },
1239 { USB_DEVICE_WACOM(0x93) }, 1283 { USB_DEVICE_WACOM(0x93) },
diff --git a/drivers/input/tablet/wacom_wac.h b/drivers/input/tablet/wacom_wac.h
index 854b92092dfc..99e1a54cd305 100644
--- a/drivers/input/tablet/wacom_wac.h
+++ b/drivers/input/tablet/wacom_wac.h
@@ -43,6 +43,7 @@ enum {
43 WACOM_G4, 43 WACOM_G4,
44 PTU, 44 PTU,
45 PL, 45 PL,
46 DTU,
46 INTUOS, 47 INTUOS,
47 INTUOS3S, 48 INTUOS3S,
48 INTUOS3, 49 INTUOS3,
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
index 3b9d5e2105d7..61f35184f76c 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -55,37 +55,36 @@ config TOUCHSCREEN_AD7877
55 To compile this driver as a module, choose M here: the 55 To compile this driver as a module, choose M here: the
56 module will be called ad7877. 56 module will be called ad7877.
57 57
58config TOUCHSCREEN_AD7879_I2C 58config TOUCHSCREEN_AD7879
59 tristate "AD7879 based touchscreens: AD7879-1 I2C Interface" 59 tristate "Analog Devices AD7879-1/AD7889-1 touchscreen interface"
60 depends on I2C
61 select TOUCHSCREEN_AD7879
62 help 60 help
63 Say Y here if you have a touchscreen interface using the 61 Say Y here if you want to support a touchscreen interface using
64 AD7879-1/AD7889-1 controller, and your board-specific 62 the AD7879-1/AD7889-1 controller.
65 initialization code includes that in its table of I2C devices.
66 63
67 If unsure, say N (but it's safe to say "Y"). 64 You should select a bus connection too.
68 65
69 To compile this driver as a module, choose M here: the 66 To compile this driver as a module, choose M here: the
70 module will be called ad7879. 67 module will be called ad7879.
71 68
69config TOUCHSCREEN_AD7879_I2C
70 tristate "support I2C bus connection"
71 depends on TOUCHSCREEN_AD7879 && I2C
72 help
73 Say Y here if you have AD7879-1/AD7889-1 hooked to an I2C bus.
74
75 To compile this driver as a module, choose M here: the
76 module will be called ad7879-i2c.
77
72config TOUCHSCREEN_AD7879_SPI 78config TOUCHSCREEN_AD7879_SPI
73 tristate "AD7879 based touchscreens: AD7879 SPI Interface" 79 tristate "support SPI bus connection"
74 depends on SPI_MASTER && TOUCHSCREEN_AD7879_I2C = n 80 depends on TOUCHSCREEN_AD7879 && SPI_MASTER
75 select TOUCHSCREEN_AD7879
76 help 81 help
77 Say Y here if you have a touchscreen interface using the 82 Say Y here if you have AD7879-1/AD7889-1 hooked to a SPI bus.
78 AD7879/AD7889 controller, and your board-specific initialization
79 code includes that in its table of SPI devices.
80 83
81 If unsure, say N (but it's safe to say "Y"). 84 If unsure, say N (but it's safe to say "Y").
82 85
83 To compile this driver as a module, choose M here: the 86 To compile this driver as a module, choose M here: the
84 module will be called ad7879. 87 module will be called ad7879-spi.
85
86config TOUCHSCREEN_AD7879
87 tristate
88 default n
89 88
90config TOUCHSCREEN_BITSY 89config TOUCHSCREEN_BITSY
91 tristate "Compaq iPAQ H3600 (Bitsy) touchscreen" 90 tristate "Compaq iPAQ H3600 (Bitsy) touchscreen"
@@ -99,6 +98,20 @@ config TOUCHSCREEN_BITSY
99 To compile this driver as a module, choose M here: the 98 To compile this driver as a module, choose M here: the
100 module will be called h3600_ts_input. 99 module will be called h3600_ts_input.
101 100
101config TOUCHSCREEN_CY8CTMG110
102 tristate "cy8ctmg110 touchscreen"
103 depends on I2C
104 depends on GPIOLIB
105
106 help
107 Say Y here if you have a cy8ctmg110 capacitive touchscreen on
108 an AAVA device.
109
110 If unsure, say N.
111
112 To compile this driver as a module, choose M here: the
113 module will be called cy8ctmg110_ts.
114
102config TOUCHSCREEN_DA9034 115config TOUCHSCREEN_DA9034
103 tristate "Touchscreen support for Dialog Semiconductor DA9034" 116 tristate "Touchscreen support for Dialog Semiconductor DA9034"
104 depends on PMIC_DA903X 117 depends on PMIC_DA903X
@@ -292,6 +305,18 @@ config TOUCHSCREEN_PENMOUNT
292 To compile this driver as a module, choose M here: the 305 To compile this driver as a module, choose M here: the
293 module will be called penmount. 306 module will be called penmount.
294 307
308config TOUCHSCREEN_QT602240
309 tristate "QT602240 I2C Touchscreen"
310 depends on I2C
311 help
312 Say Y here if you have the AT42QT602240/ATMXT224 I2C touchscreen
313 connected to your system.
314
315 If unsure, say N.
316
317 To compile this driver as a module, choose M here: the
318 module will be called qt602240_ts.
319
295config TOUCHSCREEN_MIGOR 320config TOUCHSCREEN_MIGOR
296 tristate "Renesas MIGO-R touchscreen" 321 tristate "Renesas MIGO-R touchscreen"
297 depends on SH_MIGOR && I2C 322 depends on SH_MIGOR && I2C
@@ -540,9 +565,9 @@ config TOUCHSCREEN_USB_ZYTRONIC
540 bool "Zytronic controller" if EMBEDDED 565 bool "Zytronic controller" if EMBEDDED
541 depends on TOUCHSCREEN_USB_COMPOSITE 566 depends on TOUCHSCREEN_USB_COMPOSITE
542 567
543config TOUCHSCREEN_USB_ETT_TC5UH 568config TOUCHSCREEN_USB_ETT_TC45USB
544 default y 569 default y
545 bool "ET&T TC5UH touchscreen controler support" if EMBEDDED 570 bool "ET&T USB series TC4UM/TC5UH touchscreen controler support" if EMBEDDED
546 depends on TOUCHSCREEN_USB_COMPOSITE 571 depends on TOUCHSCREEN_USB_COMPOSITE
547 572
548config TOUCHSCREEN_USB_NEXIO 573config TOUCHSCREEN_USB_NEXIO
diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
index 497964a7a214..bd6f30b4ff70 100644
--- a/drivers/input/touchscreen/Makefile
+++ b/drivers/input/touchscreen/Makefile
@@ -9,9 +9,13 @@ wm97xx-ts-y := wm97xx-core.o
9obj-$(CONFIG_TOUCHSCREEN_88PM860X) += 88pm860x-ts.o 9obj-$(CONFIG_TOUCHSCREEN_88PM860X) += 88pm860x-ts.o
10obj-$(CONFIG_TOUCHSCREEN_AD7877) += ad7877.o 10obj-$(CONFIG_TOUCHSCREEN_AD7877) += ad7877.o
11obj-$(CONFIG_TOUCHSCREEN_AD7879) += ad7879.o 11obj-$(CONFIG_TOUCHSCREEN_AD7879) += ad7879.o
12obj-$(CONFIG_TOUCHSCREEN_AD7879_I2C) += ad7879-i2c.o
13obj-$(CONFIG_TOUCHSCREEN_AD7879_SPI) += ad7879-spi.o
12obj-$(CONFIG_TOUCHSCREEN_ADS7846) += ads7846.o 14obj-$(CONFIG_TOUCHSCREEN_ADS7846) += ads7846.o
13obj-$(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) += atmel_tsadcc.o 15obj-$(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) += atmel_tsadcc.o
14obj-$(CONFIG_TOUCHSCREEN_BITSY) += h3600_ts_input.o 16obj-$(CONFIG_TOUCHSCREEN_BITSY) += h3600_ts_input.o
17obj-$(CONFIG_TOUCHSCREEN_CY8CTMG110) += cy8ctmg110_ts.o
18obj-$(CONFIG_TOUCHSCREEN_DA9034) += da9034-ts.o
15obj-$(CONFIG_TOUCHSCREEN_DYNAPRO) += dynapro.o 19obj-$(CONFIG_TOUCHSCREEN_DYNAPRO) += dynapro.o
16obj-$(CONFIG_TOUCHSCREEN_HAMPSHIRE) += hampshire.o 20obj-$(CONFIG_TOUCHSCREEN_HAMPSHIRE) += hampshire.o
17obj-$(CONFIG_TOUCHSCREEN_GUNZE) += gunze.o 21obj-$(CONFIG_TOUCHSCREEN_GUNZE) += gunze.o
@@ -30,6 +34,7 @@ obj-$(CONFIG_TOUCHSCREEN_HTCPEN) += htcpen.o
30obj-$(CONFIG_TOUCHSCREEN_USB_COMPOSITE) += usbtouchscreen.o 34obj-$(CONFIG_TOUCHSCREEN_USB_COMPOSITE) += usbtouchscreen.o
31obj-$(CONFIG_TOUCHSCREEN_PCAP) += pcap_ts.o 35obj-$(CONFIG_TOUCHSCREEN_PCAP) += pcap_ts.o
32obj-$(CONFIG_TOUCHSCREEN_PENMOUNT) += penmount.o 36obj-$(CONFIG_TOUCHSCREEN_PENMOUNT) += penmount.o
37obj-$(CONFIG_TOUCHSCREEN_QT602240) += qt602240_ts.o
33obj-$(CONFIG_TOUCHSCREEN_S3C2410) += s3c2410_ts.o 38obj-$(CONFIG_TOUCHSCREEN_S3C2410) += s3c2410_ts.o
34obj-$(CONFIG_TOUCHSCREEN_TOUCHIT213) += touchit213.o 39obj-$(CONFIG_TOUCHSCREEN_TOUCHIT213) += touchit213.o
35obj-$(CONFIG_TOUCHSCREEN_TOUCHRIGHT) += touchright.o 40obj-$(CONFIG_TOUCHSCREEN_TOUCHRIGHT) += touchright.o
@@ -38,7 +43,6 @@ obj-$(CONFIG_TOUCHSCREEN_TSC2007) += tsc2007.o
38obj-$(CONFIG_TOUCHSCREEN_UCB1400) += ucb1400_ts.o 43obj-$(CONFIG_TOUCHSCREEN_UCB1400) += ucb1400_ts.o
39obj-$(CONFIG_TOUCHSCREEN_WACOM_W8001) += wacom_w8001.o 44obj-$(CONFIG_TOUCHSCREEN_WACOM_W8001) += wacom_w8001.o
40obj-$(CONFIG_TOUCHSCREEN_WM97XX) += wm97xx-ts.o 45obj-$(CONFIG_TOUCHSCREEN_WM97XX) += wm97xx-ts.o
41obj-$(CONFIG_TOUCHSCREEN_DA9034) += da9034-ts.o
42wm97xx-ts-$(CONFIG_TOUCHSCREEN_WM9705) += wm9705.o 46wm97xx-ts-$(CONFIG_TOUCHSCREEN_WM9705) += wm9705.o
43wm97xx-ts-$(CONFIG_TOUCHSCREEN_WM9712) += wm9712.o 47wm97xx-ts-$(CONFIG_TOUCHSCREEN_WM9712) += wm9712.o
44wm97xx-ts-$(CONFIG_TOUCHSCREEN_WM9713) += wm9713.o 48wm97xx-ts-$(CONFIG_TOUCHSCREEN_WM9713) += wm9713.o
diff --git a/drivers/input/touchscreen/ad7879-i2c.c b/drivers/input/touchscreen/ad7879-i2c.c
new file mode 100644
index 000000000000..d82a38ee9a3e
--- /dev/null
+++ b/drivers/input/touchscreen/ad7879-i2c.c
@@ -0,0 +1,143 @@
1/*
2 * AD7879-1/AD7889-1 touchscreen (I2C bus)
3 *
4 * Copyright (C) 2008-2010 Michael Hennerich, Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <linux/input.h> /* BUS_I2C */
10#include <linux/i2c.h>
11#include <linux/module.h>
12#include <linux/types.h>
13
14#include "ad7879.h"
15
16#define AD7879_DEVID 0x79 /* AD7879-1/AD7889-1 */
17
18#ifdef CONFIG_PM
19static int ad7879_i2c_suspend(struct i2c_client *client, pm_message_t message)
20{
21 struct ad7879 *ts = i2c_get_clientdata(client);
22
23 ad7879_suspend(ts);
24
25 return 0;
26}
27
28static int ad7879_i2c_resume(struct i2c_client *client)
29{
30 struct ad7879 *ts = i2c_get_clientdata(client);
31
32 ad7879_resume(ts);
33
34 return 0;
35}
36#else
37# define ad7879_i2c_suspend NULL
38# define ad7879_i2c_resume NULL
39#endif
40
41/* All registers are word-sized.
42 * AD7879 uses a high-byte first convention.
43 */
44static int ad7879_i2c_read(struct device *dev, u8 reg)
45{
46 struct i2c_client *client = to_i2c_client(dev);
47
48 return swab16(i2c_smbus_read_word_data(client, reg));
49}
50
51static int ad7879_i2c_multi_read(struct device *dev,
52 u8 first_reg, u8 count, u16 *buf)
53{
54 struct i2c_client *client = to_i2c_client(dev);
55 u8 idx;
56
57 i2c_smbus_read_i2c_block_data(client, first_reg, count * 2, (u8 *)buf);
58
59 for (idx = 0; idx < count; ++idx)
60 buf[idx] = swab16(buf[idx]);
61
62 return 0;
63}
64
65static int ad7879_i2c_write(struct device *dev, u8 reg, u16 val)
66{
67 struct i2c_client *client = to_i2c_client(dev);
68
69 return i2c_smbus_write_word_data(client, reg, swab16(val));
70}
71
72static const struct ad7879_bus_ops ad7879_i2c_bus_ops = {
73 .bustype = BUS_I2C,
74 .read = ad7879_i2c_read,
75 .multi_read = ad7879_i2c_multi_read,
76 .write = ad7879_i2c_write,
77};
78
79static int __devinit ad7879_i2c_probe(struct i2c_client *client,
80 const struct i2c_device_id *id)
81{
82 struct ad7879 *ts;
83
84 if (!i2c_check_functionality(client->adapter,
85 I2C_FUNC_SMBUS_WORD_DATA)) {
86 dev_err(&client->dev, "SMBUS Word Data not Supported\n");
87 return -EIO;
88 }
89
90 ts = ad7879_probe(&client->dev, AD7879_DEVID, client->irq,
91 &ad7879_i2c_bus_ops);
92 if (IS_ERR(ts))
93 return PTR_ERR(ts);
94
95 i2c_set_clientdata(client, ts);
96
97 return 0;
98}
99
100static int __devexit ad7879_i2c_remove(struct i2c_client *client)
101{
102 struct ad7879 *ts = i2c_get_clientdata(client);
103
104 ad7879_remove(ts);
105
106 return 0;
107}
108
109static const struct i2c_device_id ad7879_id[] = {
110 { "ad7879", 0 },
111 { "ad7889", 0 },
112 { }
113};
114MODULE_DEVICE_TABLE(i2c, ad7879_id);
115
116static struct i2c_driver ad7879_i2c_driver = {
117 .driver = {
118 .name = "ad7879",
119 .owner = THIS_MODULE,
120 },
121 .probe = ad7879_i2c_probe,
122 .remove = __devexit_p(ad7879_i2c_remove),
123 .suspend = ad7879_i2c_suspend,
124 .resume = ad7879_i2c_resume,
125 .id_table = ad7879_id,
126};
127
128static int __init ad7879_i2c_init(void)
129{
130 return i2c_add_driver(&ad7879_i2c_driver);
131}
132module_init(ad7879_i2c_init);
133
134static void __exit ad7879_i2c_exit(void)
135{
136 i2c_del_driver(&ad7879_i2c_driver);
137}
138module_exit(ad7879_i2c_exit);
139
140MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
141MODULE_DESCRIPTION("AD7879(-1) touchscreen I2C bus driver");
142MODULE_LICENSE("GPL");
143MODULE_ALIAS("i2c:ad7879");
diff --git a/drivers/input/touchscreen/ad7879-spi.c b/drivers/input/touchscreen/ad7879-spi.c
new file mode 100644
index 000000000000..59c6e68c4325
--- /dev/null
+++ b/drivers/input/touchscreen/ad7879-spi.c
@@ -0,0 +1,198 @@
1/*
2 * AD7879/AD7889 touchscreen (SPI bus)
3 *
4 * Copyright (C) 2008-2010 Michael Hennerich, Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <linux/input.h> /* BUS_SPI */
10#include <linux/spi/spi.h>
11
12#include "ad7879.h"
13
14#define AD7879_DEVID 0x7A /* AD7879/AD7889 */
15
16#define MAX_SPI_FREQ_HZ 5000000
17#define AD7879_CMD_MAGIC 0xE000
18#define AD7879_CMD_READ (1 << 10)
19#define AD7879_CMD(reg) (AD7879_CMD_MAGIC | ((reg) & 0xF))
20#define AD7879_WRITECMD(reg) (AD7879_CMD(reg))
21#define AD7879_READCMD(reg) (AD7879_CMD(reg) | AD7879_CMD_READ)
22
23#ifdef CONFIG_PM
24static int ad7879_spi_suspend(struct spi_device *spi, pm_message_t message)
25{
26 struct ad7879 *ts = spi_get_drvdata(spi);
27
28 ad7879_suspend(ts);
29
30 return 0;
31}
32
33static int ad7879_spi_resume(struct spi_device *spi)
34{
35 struct ad7879 *ts = spi_get_drvdata(spi);
36
37 ad7879_resume(ts);
38
39 return 0;
40}
41#else
42# define ad7879_spi_suspend NULL
43# define ad7879_spi_resume NULL
44#endif
45
46/*
47 * ad7879_read/write are only used for initial setup and for sysfs controls.
48 * The main traffic is done in ad7879_collect().
49 */
50
51static int ad7879_spi_xfer(struct spi_device *spi,
52 u16 cmd, u8 count, u16 *tx_buf, u16 *rx_buf)
53{
54 struct spi_message msg;
55 struct spi_transfer *xfers;
56 void *spi_data;
57 u16 *command;
58 u16 *_rx_buf = _rx_buf; /* shut gcc up */
59 u8 idx;
60 int ret;
61
62 xfers = spi_data = kzalloc(sizeof(*xfers) * (count + 2), GFP_KERNEL);
63 if (!spi_data)
64 return -ENOMEM;
65
66 spi_message_init(&msg);
67
68 command = spi_data;
69 command[0] = cmd;
70 if (count == 1) {
71 /* ad7879_spi_{read,write} gave us buf on stack */
72 command[1] = *tx_buf;
73 tx_buf = &command[1];
74 _rx_buf = rx_buf;
75 rx_buf = &command[2];
76 }
77
78 ++xfers;
79 xfers[0].tx_buf = command;
80 xfers[0].len = 2;
81 spi_message_add_tail(&xfers[0], &msg);
82 ++xfers;
83
84 for (idx = 0; idx < count; ++idx) {
85 if (rx_buf)
86 xfers[idx].rx_buf = &rx_buf[idx];
87 if (tx_buf)
88 xfers[idx].tx_buf = &tx_buf[idx];
89 xfers[idx].len = 2;
90 spi_message_add_tail(&xfers[idx], &msg);
91 }
92
93 ret = spi_sync(spi, &msg);
94
95 if (count == 1)
96 _rx_buf[0] = command[2];
97
98 kfree(spi_data);
99
100 return ret;
101}
102
103static int ad7879_spi_multi_read(struct device *dev,
104 u8 first_reg, u8 count, u16 *buf)
105{
106 struct spi_device *spi = to_spi_device(dev);
107
108 return ad7879_spi_xfer(spi, AD7879_READCMD(first_reg), count, NULL, buf);
109}
110
111static int ad7879_spi_read(struct device *dev, u8 reg)
112{
113 struct spi_device *spi = to_spi_device(dev);
114 u16 ret, dummy;
115
116 return ad7879_spi_xfer(spi, AD7879_READCMD(reg), 1, &dummy, &ret) ? : ret;
117}
118
119static int ad7879_spi_write(struct device *dev, u8 reg, u16 val)
120{
121 struct spi_device *spi = to_spi_device(dev);
122 u16 dummy;
123
124 return ad7879_spi_xfer(spi, AD7879_WRITECMD(reg), 1, &val, &dummy);
125}
126
127static const struct ad7879_bus_ops ad7879_spi_bus_ops = {
128 .bustype = BUS_SPI,
129 .read = ad7879_spi_read,
130 .multi_read = ad7879_spi_multi_read,
131 .write = ad7879_spi_write,
132};
133
134static int __devinit ad7879_spi_probe(struct spi_device *spi)
135{
136 struct ad7879 *ts;
137 int err;
138
139 /* don't exceed max specified SPI CLK frequency */
140 if (spi->max_speed_hz > MAX_SPI_FREQ_HZ) {
141 dev_err(&spi->dev, "SPI CLK %d Hz?\n", spi->max_speed_hz);
142 return -EINVAL;
143 }
144
145 spi->bits_per_word = 16;
146 err = spi_setup(spi);
147 if (err) {
148 dev_dbg(&spi->dev, "spi master doesn't support 16 bits/word\n");
149 return err;
150 }
151
152 ts = ad7879_probe(&spi->dev, AD7879_DEVID, spi->irq, &ad7879_spi_bus_ops);
153 if (IS_ERR(ts))
154 return PTR_ERR(ts);
155
156 spi_set_drvdata(spi, ts);
157
158 return 0;
159}
160
161static int __devexit ad7879_spi_remove(struct spi_device *spi)
162{
163 struct ad7879 *ts = spi_get_drvdata(spi);
164
165 ad7879_remove(ts);
166 spi_set_drvdata(spi, NULL);
167
168 return 0;
169}
170
171static struct spi_driver ad7879_spi_driver = {
172 .driver = {
173 .name = "ad7879",
174 .bus = &spi_bus_type,
175 .owner = THIS_MODULE,
176 },
177 .probe = ad7879_spi_probe,
178 .remove = __devexit_p(ad7879_spi_remove),
179 .suspend = ad7879_spi_suspend,
180 .resume = ad7879_spi_resume,
181};
182
183static int __init ad7879_spi_init(void)
184{
185 return spi_register_driver(&ad7879_spi_driver);
186}
187module_init(ad7879_spi_init);
188
189static void __exit ad7879_spi_exit(void)
190{
191 spi_unregister_driver(&ad7879_spi_driver);
192}
193module_exit(ad7879_spi_exit);
194
195MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
196MODULE_DESCRIPTION("AD7879(-1) touchscreen SPI bus driver");
197MODULE_LICENSE("GPL");
198MODULE_ALIAS("spi:ad7879");
diff --git a/drivers/input/touchscreen/ad7879.c b/drivers/input/touchscreen/ad7879.c
index 4b32fb4704cd..ba6f0bd1e762 100644
--- a/drivers/input/touchscreen/ad7879.c
+++ b/drivers/input/touchscreen/ad7879.c
@@ -1,25 +1,9 @@
1/* 1/*
2 * Copyright (C) 2008-2009 Michael Hennerich, Analog Devices Inc. 2 * AD7879/AD7889 based touchscreen and GPIO driver
3 * 3 *
4 * Description: AD7879/AD7889 based touchscreen, and GPIO driver 4 * Copyright (C) 2008-2010 Michael Hennerich, Analog Devices Inc.
5 * (I2C/SPI Interface)
6 * 5 *
7 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 6 * Licensed under the GPL-2 or later.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, see the file COPYING, or write
21 * to the Free Software Foundation, Inc.,
22 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
23 * 7 *
24 * History: 8 * History:
25 * Copyright (c) 2005 David Brownell 9 * Copyright (c) 2005 David Brownell
@@ -44,12 +28,12 @@
44#include <linux/interrupt.h> 28#include <linux/interrupt.h>
45#include <linux/irq.h> 29#include <linux/irq.h>
46#include <linux/slab.h> 30#include <linux/slab.h>
47#include <linux/workqueue.h>
48#include <linux/spi/spi.h> 31#include <linux/spi/spi.h>
49#include <linux/i2c.h> 32#include <linux/i2c.h>
50#include <linux/gpio.h> 33#include <linux/gpio.h>
51 34
52#include <linux/spi/ad7879.h> 35#include <linux/spi/ad7879.h>
36#include "ad7879.h"
53 37
54#define AD7879_REG_ZEROS 0 38#define AD7879_REG_ZEROS 0
55#define AD7879_REG_CTRL1 1 39#define AD7879_REG_CTRL1 1
@@ -120,30 +104,19 @@ enum {
120#define MAX_12BIT ((1<<12)-1) 104#define MAX_12BIT ((1<<12)-1)
121#define TS_PEN_UP_TIMEOUT msecs_to_jiffies(50) 105#define TS_PEN_UP_TIMEOUT msecs_to_jiffies(50)
122 106
123#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
124#define AD7879_DEVID 0x7A
125typedef struct spi_device bus_device;
126#elif defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
127#define AD7879_DEVID 0x79
128typedef struct i2c_client bus_device;
129#endif
130
131struct ad7879 { 107struct ad7879 {
132 bus_device *bus; 108 const struct ad7879_bus_ops *bops;
109
110 struct device *dev;
133 struct input_dev *input; 111 struct input_dev *input;
134 struct work_struct work;
135 struct timer_list timer; 112 struct timer_list timer;
136#ifdef CONFIG_GPIOLIB 113#ifdef CONFIG_GPIOLIB
137 struct gpio_chip gc; 114 struct gpio_chip gc;
138#endif
139 struct mutex mutex; 115 struct mutex mutex;
140 unsigned disabled:1; /* P: mutex */
141
142#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
143 struct spi_message msg;
144 struct spi_transfer xfer[AD7879_NR_SENSE + 1];
145 u16 cmd;
146#endif 116#endif
117 unsigned int irq;
118 bool disabled; /* P: input->mutex */
119 bool suspended; /* P: input->mutex */
147 u16 conversion_data[AD7879_NR_SENSE]; 120 u16 conversion_data[AD7879_NR_SENSE];
148 char phys[32]; 121 char phys[32];
149 u8 first_conversion_delay; 122 u8 first_conversion_delay;
@@ -158,11 +131,22 @@ struct ad7879 {
158 u16 cmd_crtl3; 131 u16 cmd_crtl3;
159}; 132};
160 133
161static int ad7879_read(bus_device *, u8); 134static int ad7879_read(struct ad7879 *ts, u8 reg)
162static int ad7879_write(bus_device *, u8, u16); 135{
163static void ad7879_collect(struct ad7879 *); 136 return ts->bops->read(ts->dev, reg);
137}
138
139static int ad7879_multi_read(struct ad7879 *ts, u8 first_reg, u8 count, u16 *buf)
140{
141 return ts->bops->multi_read(ts->dev, first_reg, count, buf);
142}
164 143
165static void ad7879_report(struct ad7879 *ts) 144static int ad7879_write(struct ad7879 *ts, u8 reg, u16 val)
145{
146 return ts->bops->write(ts->dev, reg, val);
147}
148
149static int ad7879_report(struct ad7879 *ts)
166{ 150{
167 struct input_dev *input_dev = ts->input; 151 struct input_dev *input_dev = ts->input;
168 unsigned Rt; 152 unsigned Rt;
@@ -175,12 +159,14 @@ static void ad7879_report(struct ad7879 *ts)
175 159
176 /* 160 /*
177 * The samples processed here are already preprocessed by the AD7879. 161 * The samples processed here are already preprocessed by the AD7879.
178 * The preprocessing function consists of a median and an averaging filter. 162 * The preprocessing function consists of a median and an averaging
179 * The combination of these two techniques provides a robust solution, 163 * filter. The combination of these two techniques provides a robust
180 * discarding the spurious noise in the signal and keeping only the data of interest. 164 * solution, discarding the spurious noise in the signal and keeping
181 * The size of both filters is programmable. (dev.platform_data, see linux/spi/ad7879.h) 165 * only the data of interest. The size of both filters is
182 * Other user-programmable conversion controls include variable acquisition time, 166 * programmable. (dev.platform_data, see linux/spi/ad7879.h) Other
183 * and first conversion delay. Up to 16 averages can be taken per conversion. 167 * user-programmable conversion controls include variable acquisition
168 * time, and first conversion delay. Up to 16 averages can be taken
169 * per conversion.
184 */ 170 */
185 171
186 if (likely(x && z1)) { 172 if (likely(x && z1)) {
@@ -189,21 +175,17 @@ static void ad7879_report(struct ad7879 *ts)
189 Rt /= z1; 175 Rt /= z1;
190 Rt = (Rt + 2047) >> 12; 176 Rt = (Rt + 2047) >> 12;
191 177
178 if (!timer_pending(&ts->timer))
179 input_report_key(input_dev, BTN_TOUCH, 1);
180
192 input_report_abs(input_dev, ABS_X, x); 181 input_report_abs(input_dev, ABS_X, x);
193 input_report_abs(input_dev, ABS_Y, y); 182 input_report_abs(input_dev, ABS_Y, y);
194 input_report_abs(input_dev, ABS_PRESSURE, Rt); 183 input_report_abs(input_dev, ABS_PRESSURE, Rt);
195 input_sync(input_dev); 184 input_sync(input_dev);
185 return 0;
196 } 186 }
197}
198
199static void ad7879_work(struct work_struct *work)
200{
201 struct ad7879 *ts = container_of(work, struct ad7879, work);
202 187
203 /* use keventd context to read the result registers */ 188 return -EINVAL;
204 ad7879_collect(ts);
205 ad7879_report(ts);
206 mod_timer(&ts->timer, jiffies + TS_PEN_UP_TIMEOUT);
207} 189}
208 190
209static void ad7879_ts_event_release(struct ad7879 *ts) 191static void ad7879_ts_event_release(struct ad7879 *ts)
@@ -211,6 +193,7 @@ static void ad7879_ts_event_release(struct ad7879 *ts)
211 struct input_dev *input_dev = ts->input; 193 struct input_dev *input_dev = ts->input;
212 194
213 input_report_abs(input_dev, ABS_PRESSURE, 0); 195 input_report_abs(input_dev, ABS_PRESSURE, 0);
196 input_report_key(input_dev, BTN_TOUCH, 0);
214 input_sync(input_dev); 197 input_sync(input_dev);
215} 198}
216 199
@@ -225,56 +208,98 @@ static irqreturn_t ad7879_irq(int irq, void *handle)
225{ 208{
226 struct ad7879 *ts = handle; 209 struct ad7879 *ts = handle;
227 210
228 /* The repeated conversion sequencer controlled by TMR kicked off too fast. 211 ad7879_multi_read(ts, AD7879_REG_XPLUS, AD7879_NR_SENSE, ts->conversion_data);
229 * We ignore the last and process the sample sequence currently in the queue.
230 * It can't be older than 9.4ms
231 */
232 212
233 if (!work_pending(&ts->work)) 213 if (!ad7879_report(ts))
234 schedule_work(&ts->work); 214 mod_timer(&ts->timer, jiffies + TS_PEN_UP_TIMEOUT);
235 215
236 return IRQ_HANDLED; 216 return IRQ_HANDLED;
237} 217}
238 218
239static void ad7879_setup(struct ad7879 *ts) 219static void __ad7879_enable(struct ad7879 *ts)
240{ 220{
241 ad7879_write(ts->bus, AD7879_REG_CTRL2, ts->cmd_crtl2); 221 ad7879_write(ts, AD7879_REG_CTRL2, ts->cmd_crtl2);
242 ad7879_write(ts->bus, AD7879_REG_CTRL3, ts->cmd_crtl3); 222 ad7879_write(ts, AD7879_REG_CTRL3, ts->cmd_crtl3);
243 ad7879_write(ts->bus, AD7879_REG_CTRL1, ts->cmd_crtl1); 223 ad7879_write(ts, AD7879_REG_CTRL1, ts->cmd_crtl1);
224
225 enable_irq(ts->irq);
244} 226}
245 227
246static void ad7879_disable(struct ad7879 *ts) 228static void __ad7879_disable(struct ad7879 *ts)
247{ 229{
248 mutex_lock(&ts->mutex); 230 disable_irq(ts->irq);
231
232 if (del_timer_sync(&ts->timer))
233 ad7879_ts_event_release(ts);
234
235 ad7879_write(ts, AD7879_REG_CTRL2, AD7879_PM(AD7879_PM_SHUTDOWN));
236}
249 237
250 if (!ts->disabled) {
251 238
252 ts->disabled = 1; 239static int ad7879_open(struct input_dev *input)
253 disable_irq(ts->bus->irq); 240{
241 struct ad7879 *ts = input_get_drvdata(input);
254 242
255 cancel_work_sync(&ts->work); 243 /* protected by input->mutex */
244 if (!ts->disabled && !ts->suspended)
245 __ad7879_enable(ts);
256 246
257 if (del_timer_sync(&ts->timer)) 247 return 0;
258 ad7879_ts_event_release(ts); 248}
259 249
260 ad7879_write(ts->bus, AD7879_REG_CTRL2, 250static void ad7879_close(struct input_dev* input)
261 AD7879_PM(AD7879_PM_SHUTDOWN)); 251{
262 } 252 struct ad7879 *ts = input_get_drvdata(input);
263 253
264 mutex_unlock(&ts->mutex); 254 /* protected by input->mutex */
255 if (!ts->disabled && !ts->suspended)
256 __ad7879_disable(ts);
265} 257}
266 258
267static void ad7879_enable(struct ad7879 *ts) 259void ad7879_suspend(struct ad7879 *ts)
268{ 260{
269 mutex_lock(&ts->mutex); 261 mutex_lock(&ts->input->mutex);
262
263 if (!ts->suspended && !ts->disabled && ts->input->users)
264 __ad7879_disable(ts);
265
266 ts->suspended = true;
270 267
271 if (ts->disabled) { 268 mutex_unlock(&ts->input->mutex);
272 ad7879_setup(ts); 269}
273 ts->disabled = 0; 270EXPORT_SYMBOL(ad7879_suspend);
274 enable_irq(ts->bus->irq); 271
272void ad7879_resume(struct ad7879 *ts)
273{
274 mutex_lock(&ts->input->mutex);
275
276 if (ts->suspended && !ts->disabled && ts->input->users)
277 __ad7879_enable(ts);
278
279 ts->suspended = false;
280
281 mutex_unlock(&ts->input->mutex);
282}
283EXPORT_SYMBOL(ad7879_resume);
284
285static void ad7879_toggle(struct ad7879 *ts, bool disable)
286{
287 mutex_lock(&ts->input->mutex);
288
289 if (!ts->suspended && ts->input->users != 0) {
290
291 if (disable) {
292 if (ts->disabled)
293 __ad7879_enable(ts);
294 } else {
295 if (!ts->disabled)
296 __ad7879_disable(ts);
297 }
275 } 298 }
276 299
277 mutex_unlock(&ts->mutex); 300 ts->disabled = disable;
301
302 mutex_unlock(&ts->input->mutex);
278} 303}
279 304
280static ssize_t ad7879_disable_show(struct device *dev, 305static ssize_t ad7879_disable_show(struct device *dev,
@@ -297,10 +322,7 @@ static ssize_t ad7879_disable_store(struct device *dev,
297 if (error) 322 if (error)
298 return error; 323 return error;
299 324
300 if (val) 325 ad7879_toggle(ts, val);
301 ad7879_disable(ts);
302 else
303 ad7879_enable(ts);
304 326
305 return count; 327 return count;
306} 328}
@@ -325,7 +347,7 @@ static int ad7879_gpio_direction_input(struct gpio_chip *chip,
325 347
326 mutex_lock(&ts->mutex); 348 mutex_lock(&ts->mutex);
327 ts->cmd_crtl2 |= AD7879_GPIO_EN | AD7879_GPIODIR | AD7879_GPIOPOL; 349 ts->cmd_crtl2 |= AD7879_GPIO_EN | AD7879_GPIODIR | AD7879_GPIOPOL;
328 err = ad7879_write(ts->bus, AD7879_REG_CTRL2, ts->cmd_crtl2); 350 err = ad7879_write(ts, AD7879_REG_CTRL2, ts->cmd_crtl2);
329 mutex_unlock(&ts->mutex); 351 mutex_unlock(&ts->mutex);
330 352
331 return err; 353 return err;
@@ -345,7 +367,7 @@ static int ad7879_gpio_direction_output(struct gpio_chip *chip,
345 else 367 else
346 ts->cmd_crtl2 &= ~AD7879_GPIO_DATA; 368 ts->cmd_crtl2 &= ~AD7879_GPIO_DATA;
347 369
348 err = ad7879_write(ts->bus, AD7879_REG_CTRL2, ts->cmd_crtl2); 370 err = ad7879_write(ts, AD7879_REG_CTRL2, ts->cmd_crtl2);
349 mutex_unlock(&ts->mutex); 371 mutex_unlock(&ts->mutex);
350 372
351 return err; 373 return err;
@@ -357,7 +379,7 @@ static int ad7879_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
357 u16 val; 379 u16 val;
358 380
359 mutex_lock(&ts->mutex); 381 mutex_lock(&ts->mutex);
360 val = ad7879_read(ts->bus, AD7879_REG_CTRL2); 382 val = ad7879_read(ts, AD7879_REG_CTRL2);
361 mutex_unlock(&ts->mutex); 383 mutex_unlock(&ts->mutex);
362 384
363 return !!(val & AD7879_GPIO_DATA); 385 return !!(val & AD7879_GPIO_DATA);
@@ -374,16 +396,17 @@ static void ad7879_gpio_set_value(struct gpio_chip *chip,
374 else 396 else
375 ts->cmd_crtl2 &= ~AD7879_GPIO_DATA; 397 ts->cmd_crtl2 &= ~AD7879_GPIO_DATA;
376 398
377 ad7879_write(ts->bus, AD7879_REG_CTRL2, ts->cmd_crtl2); 399 ad7879_write(ts, AD7879_REG_CTRL2, ts->cmd_crtl2);
378 mutex_unlock(&ts->mutex); 400 mutex_unlock(&ts->mutex);
379} 401}
380 402
381static int __devinit ad7879_gpio_add(struct device *dev) 403static int ad7879_gpio_add(struct ad7879 *ts,
404 const struct ad7879_platform_data *pdata)
382{ 405{
383 struct ad7879 *ts = dev_get_drvdata(dev);
384 struct ad7879_platform_data *pdata = dev->platform_data;
385 int ret = 0; 406 int ret = 0;
386 407
408 mutex_init(&ts->mutex);
409
387 if (pdata->gpio_export) { 410 if (pdata->gpio_export) {
388 ts->gc.direction_input = ad7879_gpio_direction_input; 411 ts->gc.direction_input = ad7879_gpio_direction_input;
389 ts->gc.direction_output = ad7879_gpio_direction_output; 412 ts->gc.direction_output = ad7879_gpio_direction_output;
@@ -394,72 +417,75 @@ static int __devinit ad7879_gpio_add(struct device *dev)
394 ts->gc.ngpio = 1; 417 ts->gc.ngpio = 1;
395 ts->gc.label = "AD7879-GPIO"; 418 ts->gc.label = "AD7879-GPIO";
396 ts->gc.owner = THIS_MODULE; 419 ts->gc.owner = THIS_MODULE;
397 ts->gc.dev = dev; 420 ts->gc.dev = ts->dev;
398 421
399 ret = gpiochip_add(&ts->gc); 422 ret = gpiochip_add(&ts->gc);
400 if (ret) 423 if (ret)
401 dev_err(dev, "failed to register gpio %d\n", 424 dev_err(ts->dev, "failed to register gpio %d\n",
402 ts->gc.base); 425 ts->gc.base);
403 } 426 }
404 427
405 return ret; 428 return ret;
406} 429}
407 430
408/* 431static void ad7879_gpio_remove(struct ad7879 *ts)
409 * We mark ad7879_gpio_remove inline so there is a chance the code
410 * gets discarded when not needed. We can't do __devinit/__devexit
411 * markup since it is used in both probe and remove methods.
412 */
413static inline void ad7879_gpio_remove(struct device *dev)
414{ 432{
415 struct ad7879 *ts = dev_get_drvdata(dev); 433 const struct ad7879_platform_data *pdata = ts->dev->platform_data;
416 struct ad7879_platform_data *pdata = dev->platform_data;
417 int ret; 434 int ret;
418 435
419 if (pdata->gpio_export) { 436 if (pdata->gpio_export) {
420 ret = gpiochip_remove(&ts->gc); 437 ret = gpiochip_remove(&ts->gc);
421 if (ret) 438 if (ret)
422 dev_err(dev, "failed to remove gpio %d\n", 439 dev_err(ts->dev, "failed to remove gpio %d\n",
423 ts->gc.base); 440 ts->gc.base);
424 } 441 }
425} 442}
426#else 443#else
427static inline int ad7879_gpio_add(struct device *dev) 444static inline int ad7879_gpio_add(struct ad7879 *ts,
445 const struct ad7879_platform_data *pdata)
428{ 446{
429 return 0; 447 return 0;
430} 448}
431 449
432static inline void ad7879_gpio_remove(struct device *dev) 450static inline void ad7879_gpio_remove(struct ad7879 *ts)
433{ 451{
434} 452}
435#endif 453#endif
436 454
437static int __devinit ad7879_construct(bus_device *bus, struct ad7879 *ts) 455struct ad7879 *ad7879_probe(struct device *dev, u8 devid, unsigned int irq,
456 const struct ad7879_bus_ops *bops)
438{ 457{
458 struct ad7879_platform_data *pdata = dev->platform_data;
459 struct ad7879 *ts;
439 struct input_dev *input_dev; 460 struct input_dev *input_dev;
440 struct ad7879_platform_data *pdata = bus->dev.platform_data;
441 int err; 461 int err;
442 u16 revid; 462 u16 revid;
443 463
444 if (!bus->irq) { 464 if (!irq) {
445 dev_err(&bus->dev, "no IRQ?\n"); 465 dev_err(dev, "no IRQ?\n");
446 return -ENODEV; 466 err = -EINVAL;
467 goto err_out;
447 } 468 }
448 469
449 if (!pdata) { 470 if (!pdata) {
450 dev_err(&bus->dev, "no platform data?\n"); 471 dev_err(dev, "no platform data?\n");
451 return -ENODEV; 472 err = -EINVAL;
473 goto err_out;
452 } 474 }
453 475
476 ts = kzalloc(sizeof(*ts), GFP_KERNEL);
454 input_dev = input_allocate_device(); 477 input_dev = input_allocate_device();
455 if (!input_dev) 478 if (!ts || !input_dev) {
456 return -ENOMEM; 479 err = -ENOMEM;
480 goto err_free_mem;
481 }
457 482
483 ts->bops = bops;
484 ts->dev = dev;
458 ts->input = input_dev; 485 ts->input = input_dev;
486 ts->irq = irq;
459 487
460 setup_timer(&ts->timer, ad7879_timer, (unsigned long) ts); 488 setup_timer(&ts->timer, ad7879_timer, (unsigned long) ts);
461 INIT_WORK(&ts->work, ad7879_work);
462 mutex_init(&ts->mutex);
463 489
464 ts->x_plate_ohms = pdata->x_plate_ohms ? : 400; 490 ts->x_plate_ohms = pdata->x_plate_ohms ? : 400;
465 ts->pressure_max = pdata->pressure_max ? : ~0; 491 ts->pressure_max = pdata->pressure_max ? : ~0;
@@ -470,17 +496,26 @@ static int __devinit ad7879_construct(bus_device *bus, struct ad7879 *ts)
470 ts->pen_down_acc_interval = pdata->pen_down_acc_interval; 496 ts->pen_down_acc_interval = pdata->pen_down_acc_interval;
471 ts->median = pdata->median; 497 ts->median = pdata->median;
472 498
473 snprintf(ts->phys, sizeof(ts->phys), "%s/input0", dev_name(&bus->dev)); 499 snprintf(ts->phys, sizeof(ts->phys), "%s/input0", dev_name(dev));
474 500
475 input_dev->name = "AD7879 Touchscreen"; 501 input_dev->name = "AD7879 Touchscreen";
476 input_dev->phys = ts->phys; 502 input_dev->phys = ts->phys;
477 input_dev->dev.parent = &bus->dev; 503 input_dev->dev.parent = dev;
504 input_dev->id.bustype = bops->bustype;
505
506 input_dev->open = ad7879_open;
507 input_dev->close = ad7879_close;
508
509 input_set_drvdata(input_dev, ts);
478 510
479 __set_bit(EV_ABS, input_dev->evbit); 511 __set_bit(EV_ABS, input_dev->evbit);
480 __set_bit(ABS_X, input_dev->absbit); 512 __set_bit(ABS_X, input_dev->absbit);
481 __set_bit(ABS_Y, input_dev->absbit); 513 __set_bit(ABS_Y, input_dev->absbit);
482 __set_bit(ABS_PRESSURE, input_dev->absbit); 514 __set_bit(ABS_PRESSURE, input_dev->absbit);
483 515
516 __set_bit(EV_KEY, input_dev->evbit);
517 __set_bit(BTN_TOUCH, input_dev->keybit);
518
484 input_set_abs_params(input_dev, ABS_X, 519 input_set_abs_params(input_dev, ABS_X,
485 pdata->x_min ? : 0, 520 pdata->x_min ? : 0,
486 pdata->x_max ? : MAX_12BIT, 521 pdata->x_max ? : MAX_12BIT,
@@ -492,17 +527,18 @@ static int __devinit ad7879_construct(bus_device *bus, struct ad7879 *ts)
492 input_set_abs_params(input_dev, ABS_PRESSURE, 527 input_set_abs_params(input_dev, ABS_PRESSURE,
493 pdata->pressure_min, pdata->pressure_max, 0, 0); 528 pdata->pressure_min, pdata->pressure_max, 0, 0);
494 529
495 err = ad7879_write(bus, AD7879_REG_CTRL2, AD7879_RESET); 530 err = ad7879_write(ts, AD7879_REG_CTRL2, AD7879_RESET);
496
497 if (err < 0) { 531 if (err < 0) {
498 dev_err(&bus->dev, "Failed to write %s\n", input_dev->name); 532 dev_err(dev, "Failed to write %s\n", input_dev->name);
499 goto err_free_mem; 533 goto err_free_mem;
500 } 534 }
501 535
502 revid = ad7879_read(bus, AD7879_REG_REVID); 536 revid = ad7879_read(ts, AD7879_REG_REVID);
503 537 input_dev->id.product = (revid & 0xff);
504 if ((revid & 0xFF) != AD7879_DEVID) { 538 input_dev->id.version = revid >> 8;
505 dev_err(&bus->dev, "Failed to probe %s\n", input_dev->name); 539 if (input_dev->id.product != devid) {
540 dev_err(dev, "Failed to probe %s (%x vs %x)\n",
541 input_dev->name, devid, revid);
506 err = -ENODEV; 542 err = -ENODEV;
507 goto err_free_mem; 543 goto err_free_mem;
508 } 544 }
@@ -524,21 +560,21 @@ static int __devinit ad7879_construct(bus_device *bus, struct ad7879 *ts)
524 AD7879_ACQ(ts->acquisition_time) | 560 AD7879_ACQ(ts->acquisition_time) |
525 AD7879_TMR(ts->pen_down_acc_interval); 561 AD7879_TMR(ts->pen_down_acc_interval);
526 562
527 ad7879_setup(ts); 563 err = request_threaded_irq(ts->irq, NULL, ad7879_irq,
528 564 IRQF_TRIGGER_FALLING,
529 err = request_irq(bus->irq, ad7879_irq, 565 dev_name(dev), ts);
530 IRQF_TRIGGER_FALLING, bus->dev.driver->name, ts);
531
532 if (err) { 566 if (err) {
533 dev_err(&bus->dev, "irq %d busy?\n", bus->irq); 567 dev_err(dev, "irq %d busy?\n", ts->irq);
534 goto err_free_mem; 568 goto err_free_mem;
535 } 569 }
536 570
537 err = sysfs_create_group(&bus->dev.kobj, &ad7879_attr_group); 571 __ad7879_disable(ts);
572
573 err = sysfs_create_group(&dev->kobj, &ad7879_attr_group);
538 if (err) 574 if (err)
539 goto err_free_irq; 575 goto err_free_irq;
540 576
541 err = ad7879_gpio_add(&bus->dev); 577 err = ad7879_gpio_add(ts, pdata);
542 if (err) 578 if (err)
543 goto err_remove_attr; 579 goto err_remove_attr;
544 580
@@ -546,321 +582,32 @@ static int __devinit ad7879_construct(bus_device *bus, struct ad7879 *ts)
546 if (err) 582 if (err)
547 goto err_remove_gpio; 583 goto err_remove_gpio;
548 584
549 dev_info(&bus->dev, "Rev.%d touchscreen, irq %d\n", 585 return ts;
550 revid >> 8, bus->irq);
551
552 return 0;
553 586
554err_remove_gpio: 587err_remove_gpio:
555 ad7879_gpio_remove(&bus->dev); 588 ad7879_gpio_remove(ts);
556err_remove_attr: 589err_remove_attr:
557 sysfs_remove_group(&bus->dev.kobj, &ad7879_attr_group); 590 sysfs_remove_group(&dev->kobj, &ad7879_attr_group);
558err_free_irq: 591err_free_irq:
559 free_irq(bus->irq, ts); 592 free_irq(ts->irq, ts);
560err_free_mem: 593err_free_mem:
561 input_free_device(input_dev); 594 input_free_device(input_dev);
562
563 return err;
564}
565
566static int __devexit ad7879_destroy(bus_device *bus, struct ad7879 *ts)
567{
568 ad7879_gpio_remove(&bus->dev);
569 ad7879_disable(ts);
570 sysfs_remove_group(&ts->bus->dev.kobj, &ad7879_attr_group);
571 free_irq(ts->bus->irq, ts);
572 input_unregister_device(ts->input);
573 dev_dbg(&bus->dev, "unregistered touchscreen\n");
574
575 return 0;
576}
577
578#ifdef CONFIG_PM
579static int ad7879_suspend(bus_device *bus, pm_message_t message)
580{
581 struct ad7879 *ts = dev_get_drvdata(&bus->dev);
582
583 ad7879_disable(ts);
584
585 return 0;
586}
587
588static int ad7879_resume(bus_device *bus)
589{
590 struct ad7879 *ts = dev_get_drvdata(&bus->dev);
591
592 ad7879_enable(ts);
593
594 return 0;
595}
596#else
597#define ad7879_suspend NULL
598#define ad7879_resume NULL
599#endif
600
601#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
602#define MAX_SPI_FREQ_HZ 5000000
603#define AD7879_CMD_MAGIC 0xE000
604#define AD7879_CMD_READ (1 << 10)
605#define AD7879_WRITECMD(reg) (AD7879_CMD_MAGIC | (reg & 0xF))
606#define AD7879_READCMD(reg) (AD7879_CMD_MAGIC | AD7879_CMD_READ | (reg & 0xF))
607
608struct ser_req {
609 u16 command;
610 u16 data;
611 struct spi_message msg;
612 struct spi_transfer xfer[2];
613};
614
615/*
616 * ad7879_read/write are only used for initial setup and for sysfs controls.
617 * The main traffic is done in ad7879_collect().
618 */
619
620static int ad7879_read(struct spi_device *spi, u8 reg)
621{
622 struct ser_req *req;
623 int status, ret;
624
625 req = kzalloc(sizeof *req, GFP_KERNEL);
626 if (!req)
627 return -ENOMEM;
628
629 spi_message_init(&req->msg);
630
631 req->command = (u16) AD7879_READCMD(reg);
632 req->xfer[0].tx_buf = &req->command;
633 req->xfer[0].len = 2;
634
635 req->xfer[1].rx_buf = &req->data;
636 req->xfer[1].len = 2;
637
638 spi_message_add_tail(&req->xfer[0], &req->msg);
639 spi_message_add_tail(&req->xfer[1], &req->msg);
640
641 status = spi_sync(spi, &req->msg);
642 ret = status ? : req->data;
643
644 kfree(req);
645
646 return ret;
647}
648
649static int ad7879_write(struct spi_device *spi, u8 reg, u16 val)
650{
651 struct ser_req *req;
652 int status;
653
654 req = kzalloc(sizeof *req, GFP_KERNEL);
655 if (!req)
656 return -ENOMEM;
657
658 spi_message_init(&req->msg);
659
660 req->command = (u16) AD7879_WRITECMD(reg);
661 req->xfer[0].tx_buf = &req->command;
662 req->xfer[0].len = 2;
663
664 req->data = val;
665 req->xfer[1].tx_buf = &req->data;
666 req->xfer[1].len = 2;
667
668 spi_message_add_tail(&req->xfer[0], &req->msg);
669 spi_message_add_tail(&req->xfer[1], &req->msg);
670
671 status = spi_sync(spi, &req->msg);
672
673 kfree(req);
674
675 return status;
676}
677
678static void ad7879_collect(struct ad7879 *ts)
679{
680 int status = spi_sync(ts->bus, &ts->msg);
681
682 if (status)
683 dev_err(&ts->bus->dev, "spi_sync --> %d\n", status);
684}
685
686static void ad7879_setup_ts_def_msg(struct ad7879 *ts)
687{
688 struct spi_message *m;
689 int i;
690
691 ts->cmd = (u16) AD7879_READCMD(AD7879_REG_XPLUS);
692
693 m = &ts->msg;
694 spi_message_init(m);
695 ts->xfer[0].tx_buf = &ts->cmd;
696 ts->xfer[0].len = 2;
697
698 spi_message_add_tail(&ts->xfer[0], m);
699
700 for (i = 0; i < AD7879_NR_SENSE; i++) {
701 ts->xfer[i + 1].rx_buf = &ts->conversion_data[i];
702 ts->xfer[i + 1].len = 2;
703 spi_message_add_tail(&ts->xfer[i + 1], m);
704 }
705}
706
707static int __devinit ad7879_probe(struct spi_device *spi)
708{
709 struct ad7879 *ts;
710 int error;
711
712 /* don't exceed max specified SPI CLK frequency */
713 if (spi->max_speed_hz > MAX_SPI_FREQ_HZ) {
714 dev_err(&spi->dev, "SPI CLK %d Hz?\n", spi->max_speed_hz);
715 return -EINVAL;
716 }
717
718 ts = kzalloc(sizeof(struct ad7879), GFP_KERNEL);
719 if (!ts)
720 return -ENOMEM;
721
722 dev_set_drvdata(&spi->dev, ts);
723 ts->bus = spi;
724
725 ad7879_setup_ts_def_msg(ts);
726
727 error = ad7879_construct(spi, ts);
728 if (error) {
729 dev_set_drvdata(&spi->dev, NULL);
730 kfree(ts);
731 }
732
733 return error;
734}
735
736static int __devexit ad7879_remove(struct spi_device *spi)
737{
738 struct ad7879 *ts = dev_get_drvdata(&spi->dev);
739
740 ad7879_destroy(spi, ts);
741 dev_set_drvdata(&spi->dev, NULL);
742 kfree(ts); 595 kfree(ts);
743 596err_out:
744 return 0; 597 return ERR_PTR(err);
745} 598}
599EXPORT_SYMBOL(ad7879_probe);
746 600
747static struct spi_driver ad7879_driver = { 601void ad7879_remove(struct ad7879 *ts)
748 .driver = {
749 .name = "ad7879",
750 .bus = &spi_bus_type,
751 .owner = THIS_MODULE,
752 },
753 .probe = ad7879_probe,
754 .remove = __devexit_p(ad7879_remove),
755 .suspend = ad7879_suspend,
756 .resume = ad7879_resume,
757};
758
759static int __init ad7879_init(void)
760{
761 return spi_register_driver(&ad7879_driver);
762}
763module_init(ad7879_init);
764
765static void __exit ad7879_exit(void)
766{
767 spi_unregister_driver(&ad7879_driver);
768}
769module_exit(ad7879_exit);
770
771#elif defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
772
773/* All registers are word-sized.
774 * AD7879 uses a high-byte first convention.
775 */
776static int ad7879_read(struct i2c_client *client, u8 reg)
777{ 602{
778 return swab16(i2c_smbus_read_word_data(client, reg)); 603 ad7879_gpio_remove(ts);
779} 604 sysfs_remove_group(&ts->dev->kobj, &ad7879_attr_group);
780 605 free_irq(ts->irq, ts);
781static int ad7879_write(struct i2c_client *client, u8 reg, u16 val) 606 input_unregister_device(ts->input);
782{
783 return i2c_smbus_write_word_data(client, reg, swab16(val));
784}
785
786static void ad7879_collect(struct ad7879 *ts)
787{
788 int i;
789
790 for (i = 0; i < AD7879_NR_SENSE; i++)
791 ts->conversion_data[i] = ad7879_read(ts->bus,
792 AD7879_REG_XPLUS + i);
793}
794
795static int __devinit ad7879_probe(struct i2c_client *client,
796 const struct i2c_device_id *id)
797{
798 struct ad7879 *ts;
799 int error;
800
801 if (!i2c_check_functionality(client->adapter,
802 I2C_FUNC_SMBUS_WORD_DATA)) {
803 dev_err(&client->dev, "SMBUS Word Data not Supported\n");
804 return -EIO;
805 }
806
807 ts = kzalloc(sizeof(struct ad7879), GFP_KERNEL);
808 if (!ts)
809 return -ENOMEM;
810
811 i2c_set_clientdata(client, ts);
812 ts->bus = client;
813
814 error = ad7879_construct(client, ts);
815 if (error)
816 kfree(ts);
817
818 return error;
819}
820
821static int __devexit ad7879_remove(struct i2c_client *client)
822{
823 struct ad7879 *ts = dev_get_drvdata(&client->dev);
824
825 ad7879_destroy(client, ts);
826 kfree(ts); 607 kfree(ts);
827
828 return 0;
829}
830
831static const struct i2c_device_id ad7879_id[] = {
832 { "ad7879", 0 },
833 { "ad7889", 0 },
834 { }
835};
836MODULE_DEVICE_TABLE(i2c, ad7879_id);
837
838static struct i2c_driver ad7879_driver = {
839 .driver = {
840 .name = "ad7879",
841 .owner = THIS_MODULE,
842 },
843 .probe = ad7879_probe,
844 .remove = __devexit_p(ad7879_remove),
845 .suspend = ad7879_suspend,
846 .resume = ad7879_resume,
847 .id_table = ad7879_id,
848};
849
850static int __init ad7879_init(void)
851{
852 return i2c_add_driver(&ad7879_driver);
853}
854module_init(ad7879_init);
855
856static void __exit ad7879_exit(void)
857{
858 i2c_del_driver(&ad7879_driver);
859} 608}
860module_exit(ad7879_exit); 609EXPORT_SYMBOL(ad7879_remove);
861#endif
862 610
863MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 611MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
864MODULE_DESCRIPTION("AD7879(-1) touchscreen Driver"); 612MODULE_DESCRIPTION("AD7879(-1) touchscreen Driver");
865MODULE_LICENSE("GPL"); 613MODULE_LICENSE("GPL");
866MODULE_ALIAS("spi:ad7879");
diff --git a/drivers/input/touchscreen/ad7879.h b/drivers/input/touchscreen/ad7879.h
new file mode 100644
index 000000000000..6b45a27236c7
--- /dev/null
+++ b/drivers/input/touchscreen/ad7879.h
@@ -0,0 +1,30 @@
1/*
2 * AD7879/AD7889 touchscreen (bus interfaces)
3 *
4 * Copyright (C) 2008-2010 Michael Hennerich, Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#ifndef _AD7879_H_
10#define _AD7879_H_
11
12#include <linux/types.h>
13
14struct ad7879;
15struct device;
16
17struct ad7879_bus_ops {
18 u16 bustype;
19 int (*read)(struct device *dev, u8 reg);
20 int (*multi_read)(struct device *dev, u8 first_reg, u8 count, u16 *buf);
21 int (*write)(struct device *dev, u8 reg, u16 val);
22};
23
24void ad7879_suspend(struct ad7879 *);
25void ad7879_resume(struct ad7879 *);
26struct ad7879 *ad7879_probe(struct device *dev, u8 devid, unsigned irq,
27 const struct ad7879_bus_ops *bops);
28void ad7879_remove(struct ad7879 *);
29
30#endif
diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c
index a9fdf55c0238..16031933a8f6 100644
--- a/drivers/input/touchscreen/ads7846.c
+++ b/drivers/input/touchscreen/ads7846.c
@@ -68,6 +68,8 @@ struct ts_event {
68 u16 y; 68 u16 y;
69 u16 z1, z2; 69 u16 z1, z2;
70 int ignore; 70 int ignore;
71 u8 x_buf[3];
72 u8 y_buf[3];
71}; 73};
72 74
73/* 75/*
@@ -79,6 +81,8 @@ struct ads7846_packet {
79 u8 read_x, read_y, read_z1, read_z2, pwrdown; 81 u8 read_x, read_y, read_z1, read_z2, pwrdown;
80 u16 dummy; /* for the pwrdown read */ 82 u16 dummy; /* for the pwrdown read */
81 struct ts_event tc; 83 struct ts_event tc;
84 /* for ads7845 with mpc5121 psc spi we use 3-byte buffers */
85 u8 read_x_cmd[3], read_y_cmd[3], pwrdown_cmd[3];
82}; 86};
83 87
84struct ads7846 { 88struct ads7846 {
@@ -207,6 +211,14 @@ struct ser_req {
207 struct spi_transfer xfer[6]; 211 struct spi_transfer xfer[6];
208}; 212};
209 213
214struct ads7845_ser_req {
215 u8 command[3];
216 u8 pwrdown[3];
217 u8 sample[3];
218 struct spi_message msg;
219 struct spi_transfer xfer[2];
220};
221
210static void ads7846_enable(struct ads7846 *ts); 222static void ads7846_enable(struct ads7846 *ts);
211static void ads7846_disable(struct ads7846 *ts); 223static void ads7846_disable(struct ads7846 *ts);
212 224
@@ -287,6 +299,41 @@ static int ads7846_read12_ser(struct device *dev, unsigned command)
287 return status; 299 return status;
288} 300}
289 301
302static int ads7845_read12_ser(struct device *dev, unsigned command)
303{
304 struct spi_device *spi = to_spi_device(dev);
305 struct ads7846 *ts = dev_get_drvdata(dev);
306 struct ads7845_ser_req *req = kzalloc(sizeof *req, GFP_KERNEL);
307 int status;
308
309 if (!req)
310 return -ENOMEM;
311
312 spi_message_init(&req->msg);
313
314 req->command[0] = (u8) command;
315 req->xfer[0].tx_buf = req->command;
316 req->xfer[0].rx_buf = req->sample;
317 req->xfer[0].len = 3;
318 spi_message_add_tail(&req->xfer[0], &req->msg);
319
320 ts->irq_disabled = 1;
321 disable_irq(spi->irq);
322 status = spi_sync(spi, &req->msg);
323 ts->irq_disabled = 0;
324 enable_irq(spi->irq);
325
326 if (status == 0) {
327 /* BE12 value, then padding */
328 status = be16_to_cpu(*((u16 *)&req->sample[1]));
329 status = status >> 3;
330 status &= 0x0fff;
331 }
332
333 kfree(req);
334 return status;
335}
336
290#if defined(CONFIG_HWMON) || defined(CONFIG_HWMON_MODULE) 337#if defined(CONFIG_HWMON) || defined(CONFIG_HWMON_MODULE)
291 338
292#define SHOW(name, var, adjust) static ssize_t \ 339#define SHOW(name, var, adjust) static ssize_t \
@@ -540,10 +587,17 @@ static void ads7846_rx(void *ads)
540 /* ads7846_rx_val() did in-place conversion (including byteswap) from 587 /* ads7846_rx_val() did in-place conversion (including byteswap) from
541 * on-the-wire format as part of debouncing to get stable readings. 588 * on-the-wire format as part of debouncing to get stable readings.
542 */ 589 */
543 x = packet->tc.x; 590 if (ts->model == 7845) {
544 y = packet->tc.y; 591 x = *(u16 *)packet->tc.x_buf;
545 z1 = packet->tc.z1; 592 y = *(u16 *)packet->tc.y_buf;
546 z2 = packet->tc.z2; 593 z1 = 0;
594 z2 = 0;
595 } else {
596 x = packet->tc.x;
597 y = packet->tc.y;
598 z1 = packet->tc.z1;
599 z2 = packet->tc.z2;
600 }
547 601
548 /* range filtering */ 602 /* range filtering */
549 if (x == MAX_12BIT) 603 if (x == MAX_12BIT)
@@ -551,6 +605,12 @@ static void ads7846_rx(void *ads)
551 605
552 if (ts->model == 7843) { 606 if (ts->model == 7843) {
553 Rt = ts->pressure_max / 2; 607 Rt = ts->pressure_max / 2;
608 } else if (ts->model == 7845) {
609 if (get_pendown_state(ts))
610 Rt = ts->pressure_max / 2;
611 else
612 Rt = 0;
613 dev_vdbg(&ts->spi->dev, "x/y: %d/%d, PD %d\n", x, y, Rt);
554 } else if (likely(x && z1)) { 614 } else if (likely(x && z1)) {
555 /* compute touch pressure resistance using equation #2 */ 615 /* compute touch pressure resistance using equation #2 */
556 Rt = z2; 616 Rt = z2;
@@ -671,10 +731,14 @@ static void ads7846_rx_val(void *ads)
671 m = &ts->msg[ts->msg_idx]; 731 m = &ts->msg[ts->msg_idx];
672 t = list_entry(m->transfers.prev, struct spi_transfer, transfer_list); 732 t = list_entry(m->transfers.prev, struct spi_transfer, transfer_list);
673 733
674 /* adjust: on-wire is a must-ignore bit, a BE12 value, then padding; 734 if (ts->model == 7845) {
675 * built from two 8 bit values written msb-first. 735 val = be16_to_cpup((__be16 *)&(((char*)t->rx_buf)[1])) >> 3;
676 */ 736 } else {
677 val = be16_to_cpup((__be16 *)t->rx_buf) >> 3; 737 /* adjust: on-wire is a must-ignore bit, a BE12 value, then
738 * padding; built from two 8 bit values written msb-first.
739 */
740 val = be16_to_cpup((__be16 *)t->rx_buf) >> 3;
741 }
678 742
679 action = ts->filter(ts->filter_data, ts->msg_idx, &val); 743 action = ts->filter(ts->filter_data, ts->msg_idx, &val);
680 switch (action) { 744 switch (action) {
@@ -878,14 +942,15 @@ static int __devinit setup_pendown(struct spi_device *spi, struct ads7846 *ts)
878 942
879static int __devinit ads7846_probe(struct spi_device *spi) 943static int __devinit ads7846_probe(struct spi_device *spi)
880{ 944{
881 struct ads7846 *ts; 945 struct ads7846 *ts;
882 struct ads7846_packet *packet; 946 struct ads7846_packet *packet;
883 struct input_dev *input_dev; 947 struct input_dev *input_dev;
884 struct ads7846_platform_data *pdata = spi->dev.platform_data; 948 const struct ads7846_platform_data *pdata = spi->dev.platform_data;
885 struct spi_message *m; 949 struct spi_message *m;
886 struct spi_transfer *x; 950 struct spi_transfer *x;
887 int vref; 951 unsigned long irq_flags;
888 int err; 952 int vref;
953 int err;
889 954
890 if (!spi->irq) { 955 if (!spi->irq) {
891 dev_dbg(&spi->dev, "no IRQ?\n"); 956 dev_dbg(&spi->dev, "no IRQ?\n");
@@ -1008,16 +1073,26 @@ static int __devinit ads7846_probe(struct spi_device *spi)
1008 1073
1009 spi_message_init(m); 1074 spi_message_init(m);
1010 1075
1011 /* y- still on; turn on only y+ (and ADC) */ 1076 if (ts->model == 7845) {
1012 packet->read_y = READ_Y(vref); 1077 packet->read_y_cmd[0] = READ_Y(vref);
1013 x->tx_buf = &packet->read_y; 1078 packet->read_y_cmd[1] = 0;
1014 x->len = 1; 1079 packet->read_y_cmd[2] = 0;
1015 spi_message_add_tail(x, m); 1080 x->tx_buf = &packet->read_y_cmd[0];
1081 x->rx_buf = &packet->tc.y_buf[0];
1082 x->len = 3;
1083 spi_message_add_tail(x, m);
1084 } else {
1085 /* y- still on; turn on only y+ (and ADC) */
1086 packet->read_y = READ_Y(vref);
1087 x->tx_buf = &packet->read_y;
1088 x->len = 1;
1089 spi_message_add_tail(x, m);
1016 1090
1017 x++; 1091 x++;
1018 x->rx_buf = &packet->tc.y; 1092 x->rx_buf = &packet->tc.y;
1019 x->len = 2; 1093 x->len = 2;
1020 spi_message_add_tail(x, m); 1094 spi_message_add_tail(x, m);
1095 }
1021 1096
1022 /* the first sample after switching drivers can be low quality; 1097 /* the first sample after switching drivers can be low quality;
1023 * optionally discard it, using a second one after the signals 1098 * optionally discard it, using a second one after the signals
@@ -1043,17 +1118,28 @@ static int __devinit ads7846_probe(struct spi_device *spi)
1043 m++; 1118 m++;
1044 spi_message_init(m); 1119 spi_message_init(m);
1045 1120
1046 /* turn y- off, x+ on, then leave in lowpower */ 1121 if (ts->model == 7845) {
1047 x++; 1122 x++;
1048 packet->read_x = READ_X(vref); 1123 packet->read_x_cmd[0] = READ_X(vref);
1049 x->tx_buf = &packet->read_x; 1124 packet->read_x_cmd[1] = 0;
1050 x->len = 1; 1125 packet->read_x_cmd[2] = 0;
1051 spi_message_add_tail(x, m); 1126 x->tx_buf = &packet->read_x_cmd[0];
1127 x->rx_buf = &packet->tc.x_buf[0];
1128 x->len = 3;
1129 spi_message_add_tail(x, m);
1130 } else {
1131 /* turn y- off, x+ on, then leave in lowpower */
1132 x++;
1133 packet->read_x = READ_X(vref);
1134 x->tx_buf = &packet->read_x;
1135 x->len = 1;
1136 spi_message_add_tail(x, m);
1052 1137
1053 x++; 1138 x++;
1054 x->rx_buf = &packet->tc.x; 1139 x->rx_buf = &packet->tc.x;
1055 x->len = 2; 1140 x->len = 2;
1056 spi_message_add_tail(x, m); 1141 spi_message_add_tail(x, m);
1142 }
1057 1143
1058 /* ... maybe discard first sample ... */ 1144 /* ... maybe discard first sample ... */
1059 if (pdata->settle_delay_usecs) { 1145 if (pdata->settle_delay_usecs) {
@@ -1144,15 +1230,25 @@ static int __devinit ads7846_probe(struct spi_device *spi)
1144 m++; 1230 m++;
1145 spi_message_init(m); 1231 spi_message_init(m);
1146 1232
1147 x++; 1233 if (ts->model == 7845) {
1148 packet->pwrdown = PWRDOWN; 1234 x++;
1149 x->tx_buf = &packet->pwrdown; 1235 packet->pwrdown_cmd[0] = PWRDOWN;
1150 x->len = 1; 1236 packet->pwrdown_cmd[1] = 0;
1151 spi_message_add_tail(x, m); 1237 packet->pwrdown_cmd[2] = 0;
1238 x->tx_buf = &packet->pwrdown_cmd[0];
1239 x->len = 3;
1240 } else {
1241 x++;
1242 packet->pwrdown = PWRDOWN;
1243 x->tx_buf = &packet->pwrdown;
1244 x->len = 1;
1245 spi_message_add_tail(x, m);
1246
1247 x++;
1248 x->rx_buf = &packet->dummy;
1249 x->len = 2;
1250 }
1152 1251
1153 x++;
1154 x->rx_buf = &packet->dummy;
1155 x->len = 2;
1156 CS_CHANGE(*x); 1252 CS_CHANGE(*x);
1157 spi_message_add_tail(x, m); 1253 spi_message_add_tail(x, m);
1158 1254
@@ -1174,17 +1270,22 @@ static int __devinit ads7846_probe(struct spi_device *spi)
1174 goto err_put_regulator; 1270 goto err_put_regulator;
1175 } 1271 }
1176 1272
1177 if (request_irq(spi->irq, ads7846_irq, IRQF_TRIGGER_FALLING, 1273 irq_flags = pdata->irq_flags ? : IRQF_TRIGGER_FALLING;
1178 spi->dev.driver->name, ts)) { 1274
1275 err = request_irq(spi->irq, ads7846_irq, irq_flags,
1276 spi->dev.driver->name, ts);
1277
1278 if (err && !pdata->irq_flags) {
1179 dev_info(&spi->dev, 1279 dev_info(&spi->dev,
1180 "trying pin change workaround on irq %d\n", spi->irq); 1280 "trying pin change workaround on irq %d\n", spi->irq);
1181 err = request_irq(spi->irq, ads7846_irq, 1281 err = request_irq(spi->irq, ads7846_irq,
1182 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, 1282 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
1183 spi->dev.driver->name, ts); 1283 spi->dev.driver->name, ts);
1184 if (err) { 1284 }
1185 dev_dbg(&spi->dev, "irq %d busy?\n", spi->irq); 1285
1186 goto err_disable_regulator; 1286 if (err) {
1187 } 1287 dev_dbg(&spi->dev, "irq %d busy?\n", spi->irq);
1288 goto err_disable_regulator;
1188 } 1289 }
1189 1290
1190 err = ads784x_hwmon_register(spi, ts); 1291 err = ads784x_hwmon_register(spi, ts);
@@ -1196,8 +1297,11 @@ static int __devinit ads7846_probe(struct spi_device *spi)
1196 /* take a first sample, leaving nPENIRQ active and vREF off; avoid 1297 /* take a first sample, leaving nPENIRQ active and vREF off; avoid
1197 * the touchscreen, in case it's not connected. 1298 * the touchscreen, in case it's not connected.
1198 */ 1299 */
1199 (void) ads7846_read12_ser(&spi->dev, 1300 if (ts->model == 7845)
1200 READ_12BIT_SER(vaux) | ADS_PD10_ALL_ON); 1301 ads7845_read12_ser(&spi->dev, PWRDOWN);
1302 else
1303 (void) ads7846_read12_ser(&spi->dev,
1304 READ_12BIT_SER(vaux) | ADS_PD10_ALL_ON);
1201 1305
1202 err = sysfs_create_group(&spi->dev.kobj, &ads784x_attr_group); 1306 err = sysfs_create_group(&spi->dev.kobj, &ads784x_attr_group);
1203 if (err) 1307 if (err)
diff --git a/drivers/input/touchscreen/cy8ctmg110_ts.c b/drivers/input/touchscreen/cy8ctmg110_ts.c
new file mode 100644
index 000000000000..4eb7df0b7f87
--- /dev/null
+++ b/drivers/input/touchscreen/cy8ctmg110_ts.c
@@ -0,0 +1,363 @@
1/*
2 * Driver for cypress touch screen controller
3 *
4 * Copyright (c) 2009 Aava Mobile
5 *
6 * Some cleanups by Alan Cox <alan@linux.intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/module.h>
23#include <linux/kernel.h>
24#include <linux/input.h>
25#include <linux/slab.h>
26#include <linux/interrupt.h>
27#include <linux/io.h>
28#include <linux/i2c.h>
29#include <linux/gpio.h>
30#include <linux/input/cy8ctmg110_pdata.h>
31
32#define CY8CTMG110_DRIVER_NAME "cy8ctmg110"
33
34/* Touch coordinates */
35#define CY8CTMG110_X_MIN 0
36#define CY8CTMG110_Y_MIN 0
37#define CY8CTMG110_X_MAX 759
38#define CY8CTMG110_Y_MAX 465
39
40
41/* cy8ctmg110 register definitions */
42#define CY8CTMG110_TOUCH_WAKEUP_TIME 0
43#define CY8CTMG110_TOUCH_SLEEP_TIME 2
44#define CY8CTMG110_TOUCH_X1 3
45#define CY8CTMG110_TOUCH_Y1 5
46#define CY8CTMG110_TOUCH_X2 7
47#define CY8CTMG110_TOUCH_Y2 9
48#define CY8CTMG110_FINGERS 11
49#define CY8CTMG110_GESTURE 12
50#define CY8CTMG110_REG_MAX 13
51
52
53/*
54 * The touch driver structure.
55 */
56struct cy8ctmg110 {
57 struct input_dev *input;
58 char phys[32];
59 struct i2c_client *client;
60 int reset_pin;
61 int irq_pin;
62};
63
64/*
65 * cy8ctmg110_power is the routine that is called when touch hardware
66 * will powered off or on.
67 */
68static void cy8ctmg110_power(struct cy8ctmg110 *ts, bool poweron)
69{
70 if (ts->reset_pin)
71 gpio_direction_output(ts->reset_pin, 1 - poweron);
72}
73
74static int cy8ctmg110_write_regs(struct cy8ctmg110 *tsc, unsigned char reg,
75 unsigned char len, unsigned char *value)
76{
77 struct i2c_client *client = tsc->client;
78 unsigned int ret;
79 unsigned char i2c_data[6];
80
81 BUG_ON(len > 5);
82
83 i2c_data[0] = reg;
84 memcpy(i2c_data + 1, value, len);
85
86 ret = i2c_master_send(client, i2c_data, len + 1);
87 if (ret != 1) {
88 dev_err(&client->dev, "i2c write data cmd failed\n");
89 return ret;
90 }
91
92 return 0;
93}
94
95static int cy8ctmg110_read_regs(struct cy8ctmg110 *tsc,
96 unsigned char *data, unsigned char len, unsigned char cmd)
97{
98 struct i2c_client *client = tsc->client;
99 unsigned int ret;
100 struct i2c_msg msg[2] = {
101 /* first write slave position to i2c devices */
102 { client->addr, 0, 1, &cmd },
103 /* Second read data from position */
104 { client->addr, I2C_M_RD, len, data }
105 };
106
107 ret = i2c_transfer(client->adapter, msg, 2);
108 if (ret < 0)
109 return ret;
110
111 return 0;
112}
113
114static int cy8ctmg110_touch_pos(struct cy8ctmg110 *tsc)
115{
116 struct input_dev *input = tsc->input;
117 unsigned char reg_p[CY8CTMG110_REG_MAX];
118 int x, y;
119
120 memset(reg_p, 0, CY8CTMG110_REG_MAX);
121
122 /* Reading coordinates */
123 if (cy8ctmg110_read_regs(tsc, reg_p, 9, CY8CTMG110_TOUCH_X1) != 0)
124 return -EIO;
125
126 y = reg_p[2] << 8 | reg_p[3];
127 x = reg_p[0] << 8 | reg_p[1];
128
129 /* Number of touch */
130 if (reg_p[8] == 0) {
131 input_report_key(input, BTN_TOUCH, 0);
132 } else {
133 input_report_key(input, BTN_TOUCH, 1);
134 input_report_abs(input, ABS_X, x);
135 input_report_abs(input, ABS_Y, y);
136 }
137
138 input_sync(input);
139
140 return 0;
141}
142
143static int cy8ctmg110_set_sleepmode(struct cy8ctmg110 *ts, bool sleep)
144{
145 unsigned char reg_p[3];
146
147 if (sleep) {
148 reg_p[0] = 0x00;
149 reg_p[1] = 0xff;
150 reg_p[2] = 5;
151 } else {
152 reg_p[0] = 0x10;
153 reg_p[1] = 0xff;
154 reg_p[2] = 0;
155 }
156
157 return cy8ctmg110_write_regs(ts, CY8CTMG110_TOUCH_WAKEUP_TIME, 3, reg_p);
158}
159
160static irqreturn_t cy8ctmg110_irq_thread(int irq, void *dev_id)
161{
162 struct cy8ctmg110 *tsc = dev_id;
163
164 cy8ctmg110_touch_pos(tsc);
165
166 return IRQ_HANDLED;
167}
168
169static int __devinit cy8ctmg110_probe(struct i2c_client *client,
170 const struct i2c_device_id *id)
171{
172 const struct cy8ctmg110_pdata *pdata = client->dev.platform_data;
173 struct cy8ctmg110 *ts;
174 struct input_dev *input_dev;
175 int err;
176
177 /* No pdata no way forward */
178 if (pdata == NULL) {
179 dev_err(&client->dev, "no pdata\n");
180 return -ENODEV;
181 }
182
183 if (!i2c_check_functionality(client->adapter,
184 I2C_FUNC_SMBUS_READ_WORD_DATA))
185 return -EIO;
186
187 ts = kzalloc(sizeof(struct cy8ctmg110), GFP_KERNEL);
188 input_dev = input_allocate_device();
189 if (!ts || !input_dev) {
190 err = -ENOMEM;
191 goto err_free_mem;
192 }
193
194 ts->client = client;
195 ts->input = input_dev;
196
197 snprintf(ts->phys, sizeof(ts->phys),
198 "%s/input0", dev_name(&client->dev));
199
200 input_dev->name = CY8CTMG110_DRIVER_NAME " Touchscreen";
201 input_dev->phys = ts->phys;
202 input_dev->id.bustype = BUS_I2C;
203 input_dev->dev.parent = &client->dev;
204
205 input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
206 input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
207
208 input_set_abs_params(input_dev, ABS_X,
209 CY8CTMG110_X_MIN, CY8CTMG110_X_MAX, 0, 0);
210 input_set_abs_params(input_dev, ABS_Y,
211 CY8CTMG110_Y_MIN, CY8CTMG110_Y_MAX, 0, 0);
212
213 if (ts->reset_pin) {
214 err = gpio_request(ts->reset_pin, NULL);
215 if (err) {
216 dev_err(&client->dev,
217 "Unable to request GPIO pin %d.\n",
218 ts->reset_pin);
219 goto err_free_mem;
220 }
221 }
222
223 cy8ctmg110_power(ts, true);
224 cy8ctmg110_set_sleepmode(ts, false);
225
226 err = gpio_request(ts->irq_pin, "touch_irq_key");
227 if (err < 0) {
228 dev_err(&client->dev,
229 "Failed to request GPIO %d, error %d\n",
230 ts->irq_pin, err);
231 goto err_shutoff_device;
232 }
233
234 err = gpio_direction_input(ts->irq_pin);
235 if (err < 0) {
236 dev_err(&client->dev,
237 "Failed to configure input direction for GPIO %d, error %d\n",
238 ts->irq_pin, err);
239 goto err_free_irq_gpio;
240 }
241
242 client->irq = gpio_to_irq(ts->irq_pin);
243 if (client->irq < 0) {
244 err = client->irq;
245 dev_err(&client->dev,
246 "Unable to get irq number for GPIO %d, error %d\n",
247 ts->irq_pin, err);
248 goto err_free_irq_gpio;
249 }
250
251 err = request_threaded_irq(client->irq, NULL, cy8ctmg110_irq_thread,
252 IRQF_TRIGGER_RISING, "touch_reset_key", ts);
253 if (err < 0) {
254 dev_err(&client->dev,
255 "irq %d busy? error %d\n", client->irq, err);
256 goto err_free_irq_gpio;
257 }
258
259 err = input_register_device(input_dev);
260 if (err)
261 goto err_free_irq;
262
263 i2c_set_clientdata(client, ts);
264 device_init_wakeup(&client->dev, 1);
265 return 0;
266
267err_free_irq:
268 free_irq(client->irq, ts);
269err_free_irq_gpio:
270 gpio_free(ts->irq_pin);
271err_shutoff_device:
272 cy8ctmg110_set_sleepmode(ts, true);
273 cy8ctmg110_power(ts, false);
274 if (ts->reset_pin)
275 gpio_free(ts->reset_pin);
276err_free_mem:
277 input_free_device(input_dev);
278 kfree(ts);
279 return err;
280}
281
282#ifdef CONFIG_PM
283static int cy8ctmg110_suspend(struct i2c_client *client, pm_message_t mesg)
284{
285 struct cy8ctmg110 *ts = i2c_get_clientdata(client);
286
287 if (device_may_wakeup(&client->dev))
288 enable_irq_wake(client->irq);
289 else {
290 cy8ctmg110_set_sleepmode(ts, true);
291 cy8ctmg110_power(ts, false);
292 }
293 return 0;
294}
295
296static int cy8ctmg110_resume(struct i2c_client *client)
297{
298 struct cy8ctmg110 *ts = i2c_get_clientdata(client);
299
300 if (device_may_wakeup(&client->dev))
301 disable_irq_wake(client->irq);
302 else {
303 cy8ctmg110_power(ts, true);
304 cy8ctmg110_set_sleepmode(ts, false);
305 }
306 return 0;
307}
308#endif
309
310static int __devexit cy8ctmg110_remove(struct i2c_client *client)
311{
312 struct cy8ctmg110 *ts = i2c_get_clientdata(client);
313
314 cy8ctmg110_set_sleepmode(ts, true);
315 cy8ctmg110_power(ts, false);
316
317 free_irq(client->irq, ts);
318 input_unregister_device(ts->input);
319 gpio_free(ts->irq_pin);
320 if (ts->reset_pin)
321 gpio_free(ts->reset_pin);
322 kfree(ts);
323
324 return 0;
325}
326
327static struct i2c_device_id cy8ctmg110_idtable[] = {
328 { CY8CTMG110_DRIVER_NAME, 1 },
329 { }
330};
331
332MODULE_DEVICE_TABLE(i2c, cy8ctmg110_idtable);
333
334static struct i2c_driver cy8ctmg110_driver = {
335 .driver = {
336 .owner = THIS_MODULE,
337 .name = CY8CTMG110_DRIVER_NAME,
338 },
339 .id_table = cy8ctmg110_idtable,
340 .probe = cy8ctmg110_probe,
341 .remove = __devexit_p(cy8ctmg110_remove),
342#ifdef CONFIG_PM
343 .suspend = cy8ctmg110_suspend,
344 .resume = cy8ctmg110_resume,
345#endif
346};
347
348static int __init cy8ctmg110_init(void)
349{
350 return i2c_add_driver(&cy8ctmg110_driver);
351}
352
353static void __exit cy8ctmg110_exit(void)
354{
355 i2c_del_driver(&cy8ctmg110_driver);
356}
357
358module_init(cy8ctmg110_init);
359module_exit(cy8ctmg110_exit);
360
361MODULE_AUTHOR("Samuli Konttila <samuli.konttila@aavamobile.com>");
362MODULE_DESCRIPTION("cy8ctmg110 TouchScreen Driver");
363MODULE_LICENSE("GPL v2");
diff --git a/drivers/input/touchscreen/mcs5000_ts.c b/drivers/input/touchscreen/mcs5000_ts.c
index 1fb0c2f06a44..6ee9940aaf5b 100644
--- a/drivers/input/touchscreen/mcs5000_ts.c
+++ b/drivers/input/touchscreen/mcs5000_ts.c
@@ -16,7 +16,7 @@
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/i2c.h> 18#include <linux/i2c.h>
19#include <linux/i2c/mcs5000_ts.h> 19#include <linux/i2c/mcs.h>
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/input.h> 21#include <linux/input.h>
22#include <linux/irq.h> 22#include <linux/irq.h>
@@ -105,7 +105,7 @@ enum mcs5000_ts_read_offset {
105struct mcs5000_ts_data { 105struct mcs5000_ts_data {
106 struct i2c_client *client; 106 struct i2c_client *client;
107 struct input_dev *input_dev; 107 struct input_dev *input_dev;
108 const struct mcs5000_ts_platform_data *platform_data; 108 const struct mcs_platform_data *platform_data;
109}; 109};
110 110
111static irqreturn_t mcs5000_ts_interrupt(int irq, void *dev_id) 111static irqreturn_t mcs5000_ts_interrupt(int irq, void *dev_id)
@@ -164,7 +164,7 @@ static irqreturn_t mcs5000_ts_interrupt(int irq, void *dev_id)
164 164
165static void mcs5000_ts_phys_init(struct mcs5000_ts_data *data) 165static void mcs5000_ts_phys_init(struct mcs5000_ts_data *data)
166{ 166{
167 const struct mcs5000_ts_platform_data *platform_data = 167 const struct mcs_platform_data *platform_data =
168 data->platform_data; 168 data->platform_data;
169 struct i2c_client *client = data->client; 169 struct i2c_client *client = data->client;
170 170
diff --git a/drivers/input/touchscreen/qt602240_ts.c b/drivers/input/touchscreen/qt602240_ts.c
new file mode 100644
index 000000000000..66b26ad3032a
--- /dev/null
+++ b/drivers/input/touchscreen/qt602240_ts.c
@@ -0,0 +1,1401 @@
1/*
2 * AT42QT602240/ATMXT224 Touchscreen driver
3 *
4 * Copyright (C) 2010 Samsung Electronics Co.Ltd
5 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 */
13
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/firmware.h>
18#include <linux/i2c.h>
19#include <linux/i2c/qt602240_ts.h>
20#include <linux/input.h>
21#include <linux/interrupt.h>
22#include <linux/slab.h>
23
24/* Version */
25#define QT602240_VER_20 20
26#define QT602240_VER_21 21
27#define QT602240_VER_22 22
28
29/* Slave addresses */
30#define QT602240_APP_LOW 0x4a
31#define QT602240_APP_HIGH 0x4b
32#define QT602240_BOOT_LOW 0x24
33#define QT602240_BOOT_HIGH 0x25
34
35/* Firmware */
36#define QT602240_FW_NAME "qt602240.fw"
37
38/* Registers */
39#define QT602240_FAMILY_ID 0x00
40#define QT602240_VARIANT_ID 0x01
41#define QT602240_VERSION 0x02
42#define QT602240_BUILD 0x03
43#define QT602240_MATRIX_X_SIZE 0x04
44#define QT602240_MATRIX_Y_SIZE 0x05
45#define QT602240_OBJECT_NUM 0x06
46#define QT602240_OBJECT_START 0x07
47
48#define QT602240_OBJECT_SIZE 6
49
50/* Object types */
51#define QT602240_DEBUG_DIAGNOSTIC 37
52#define QT602240_GEN_MESSAGE 5
53#define QT602240_GEN_COMMAND 6
54#define QT602240_GEN_POWER 7
55#define QT602240_GEN_ACQUIRE 8
56#define QT602240_TOUCH_MULTI 9
57#define QT602240_TOUCH_KEYARRAY 15
58#define QT602240_TOUCH_PROXIMITY 23
59#define QT602240_PROCI_GRIPFACE 20
60#define QT602240_PROCG_NOISE 22
61#define QT602240_PROCI_ONETOUCH 24
62#define QT602240_PROCI_TWOTOUCH 27
63#define QT602240_SPT_COMMSCONFIG 18 /* firmware ver 21 over */
64#define QT602240_SPT_GPIOPWM 19
65#define QT602240_SPT_SELFTEST 25
66#define QT602240_SPT_CTECONFIG 28
67#define QT602240_SPT_USERDATA 38 /* firmware ver 21 over */
68
69/* QT602240_GEN_COMMAND field */
70#define QT602240_COMMAND_RESET 0
71#define QT602240_COMMAND_BACKUPNV 1
72#define QT602240_COMMAND_CALIBRATE 2
73#define QT602240_COMMAND_REPORTALL 3
74#define QT602240_COMMAND_DIAGNOSTIC 5
75
76/* QT602240_GEN_POWER field */
77#define QT602240_POWER_IDLEACQINT 0
78#define QT602240_POWER_ACTVACQINT 1
79#define QT602240_POWER_ACTV2IDLETO 2
80
81/* QT602240_GEN_ACQUIRE field */
82#define QT602240_ACQUIRE_CHRGTIME 0
83#define QT602240_ACQUIRE_TCHDRIFT 2
84#define QT602240_ACQUIRE_DRIFTST 3
85#define QT602240_ACQUIRE_TCHAUTOCAL 4
86#define QT602240_ACQUIRE_SYNC 5
87#define QT602240_ACQUIRE_ATCHCALST 6
88#define QT602240_ACQUIRE_ATCHCALSTHR 7
89
90/* QT602240_TOUCH_MULTI field */
91#define QT602240_TOUCH_CTRL 0
92#define QT602240_TOUCH_XORIGIN 1
93#define QT602240_TOUCH_YORIGIN 2
94#define QT602240_TOUCH_XSIZE 3
95#define QT602240_TOUCH_YSIZE 4
96#define QT602240_TOUCH_BLEN 6
97#define QT602240_TOUCH_TCHTHR 7
98#define QT602240_TOUCH_TCHDI 8
99#define QT602240_TOUCH_ORIENT 9
100#define QT602240_TOUCH_MOVHYSTI 11
101#define QT602240_TOUCH_MOVHYSTN 12
102#define QT602240_TOUCH_NUMTOUCH 14
103#define QT602240_TOUCH_MRGHYST 15
104#define QT602240_TOUCH_MRGTHR 16
105#define QT602240_TOUCH_AMPHYST 17
106#define QT602240_TOUCH_XRANGE_LSB 18
107#define QT602240_TOUCH_XRANGE_MSB 19
108#define QT602240_TOUCH_YRANGE_LSB 20
109#define QT602240_TOUCH_YRANGE_MSB 21
110#define QT602240_TOUCH_XLOCLIP 22
111#define QT602240_TOUCH_XHICLIP 23
112#define QT602240_TOUCH_YLOCLIP 24
113#define QT602240_TOUCH_YHICLIP 25
114#define QT602240_TOUCH_XEDGECTRL 26
115#define QT602240_TOUCH_XEDGEDIST 27
116#define QT602240_TOUCH_YEDGECTRL 28
117#define QT602240_TOUCH_YEDGEDIST 29
118#define QT602240_TOUCH_JUMPLIMIT 30 /* firmware ver 22 over */
119
120/* QT602240_PROCI_GRIPFACE field */
121#define QT602240_GRIPFACE_CTRL 0
122#define QT602240_GRIPFACE_XLOGRIP 1
123#define QT602240_GRIPFACE_XHIGRIP 2
124#define QT602240_GRIPFACE_YLOGRIP 3
125#define QT602240_GRIPFACE_YHIGRIP 4
126#define QT602240_GRIPFACE_MAXTCHS 5
127#define QT602240_GRIPFACE_SZTHR1 7
128#define QT602240_GRIPFACE_SZTHR2 8
129#define QT602240_GRIPFACE_SHPTHR1 9
130#define QT602240_GRIPFACE_SHPTHR2 10
131#define QT602240_GRIPFACE_SUPEXTTO 11
132
133/* QT602240_PROCI_NOISE field */
134#define QT602240_NOISE_CTRL 0
135#define QT602240_NOISE_OUTFLEN 1
136#define QT602240_NOISE_GCAFUL_LSB 3
137#define QT602240_NOISE_GCAFUL_MSB 4
138#define QT602240_NOISE_GCAFLL_LSB 5
139#define QT602240_NOISE_GCAFLL_MSB 6
140#define QT602240_NOISE_ACTVGCAFVALID 7
141#define QT602240_NOISE_NOISETHR 8
142#define QT602240_NOISE_FREQHOPSCALE 10
143#define QT602240_NOISE_FREQ0 11
144#define QT602240_NOISE_FREQ1 12
145#define QT602240_NOISE_FREQ2 13
146#define QT602240_NOISE_FREQ3 14
147#define QT602240_NOISE_FREQ4 15
148#define QT602240_NOISE_IDLEGCAFVALID 16
149
150/* QT602240_SPT_COMMSCONFIG */
151#define QT602240_COMMS_CTRL 0
152#define QT602240_COMMS_CMD 1
153
154/* QT602240_SPT_CTECONFIG field */
155#define QT602240_CTE_CTRL 0
156#define QT602240_CTE_CMD 1
157#define QT602240_CTE_MODE 2
158#define QT602240_CTE_IDLEGCAFDEPTH 3
159#define QT602240_CTE_ACTVGCAFDEPTH 4
160#define QT602240_CTE_VOLTAGE 5 /* firmware ver 21 over */
161
162#define QT602240_VOLTAGE_DEFAULT 2700000
163#define QT602240_VOLTAGE_STEP 10000
164
165/* Define for QT602240_GEN_COMMAND */
166#define QT602240_BOOT_VALUE 0xa5
167#define QT602240_BACKUP_VALUE 0x55
168#define QT602240_BACKUP_TIME 25 /* msec */
169#define QT602240_RESET_TIME 65 /* msec */
170
171#define QT602240_FWRESET_TIME 175 /* msec */
172
173/* Command to unlock bootloader */
174#define QT602240_UNLOCK_CMD_MSB 0xaa
175#define QT602240_UNLOCK_CMD_LSB 0xdc
176
177/* Bootloader mode status */
178#define QT602240_WAITING_BOOTLOAD_CMD 0xc0 /* valid 7 6 bit only */
179#define QT602240_WAITING_FRAME_DATA 0x80 /* valid 7 6 bit only */
180#define QT602240_FRAME_CRC_CHECK 0x02
181#define QT602240_FRAME_CRC_FAIL 0x03
182#define QT602240_FRAME_CRC_PASS 0x04
183#define QT602240_APP_CRC_FAIL 0x40 /* valid 7 8 bit only */
184#define QT602240_BOOT_STATUS_MASK 0x3f
185
186/* Touch status */
187#define QT602240_SUPPRESS (1 << 1)
188#define QT602240_AMP (1 << 2)
189#define QT602240_VECTOR (1 << 3)
190#define QT602240_MOVE (1 << 4)
191#define QT602240_RELEASE (1 << 5)
192#define QT602240_PRESS (1 << 6)
193#define QT602240_DETECT (1 << 7)
194
195/* Touchscreen absolute values */
196#define QT602240_MAX_XC 0x3ff
197#define QT602240_MAX_YC 0x3ff
198#define QT602240_MAX_AREA 0xff
199
200#define QT602240_MAX_FINGER 10
201
202/* Initial register values recommended from chip vendor */
203static const u8 init_vals_ver_20[] = {
204 /* QT602240_GEN_COMMAND(6) */
205 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
206 /* QT602240_GEN_POWER(7) */
207 0x20, 0xff, 0x32,
208 /* QT602240_GEN_ACQUIRE(8) */
209 0x08, 0x05, 0x05, 0x00, 0x00, 0x00, 0x05, 0x14,
210 /* QT602240_TOUCH_MULTI(9) */
211 0x00, 0x00, 0x00, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x02, 0x00,
212 0x00, 0x01, 0x01, 0x0e, 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00,
213 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x88, 0x64,
214 /* QT602240_TOUCH_KEYARRAY(15) */
215 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
216 0x00,
217 /* QT602240_SPT_GPIOPWM(19) */
218 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
219 0x00, 0x00,
220 /* QT602240_PROCI_GRIPFACE(20) */
221 0x00, 0x64, 0x64, 0x64, 0x64, 0x00, 0x00, 0x1e, 0x14, 0x04,
222 0x1e, 0x00,
223 /* QT602240_PROCG_NOISE(22) */
224 0x05, 0x00, 0x00, 0x19, 0x00, 0xe7, 0xff, 0x04, 0x32, 0x00,
225 0x01, 0x0a, 0x0f, 0x14, 0x00, 0x00, 0xe8,
226 /* QT602240_TOUCH_PROXIMITY(23) */
227 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
228 0x00, 0x00, 0x00,
229 /* QT602240_PROCI_ONETOUCH(24) */
230 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
231 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
232 /* QT602240_SPT_SELFTEST(25) */
233 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
234 0x00, 0x00, 0x00, 0x00,
235 /* QT602240_PROCI_TWOTOUCH(27) */
236 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
237 /* QT602240_SPT_CTECONFIG(28) */
238 0x00, 0x00, 0x00, 0x04, 0x08,
239};
240
241static const u8 init_vals_ver_21[] = {
242 /* QT602240_GEN_COMMAND(6) */
243 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
244 /* QT602240_GEN_POWER(7) */
245 0x20, 0xff, 0x32,
246 /* QT602240_GEN_ACQUIRE(8) */
247 0x0a, 0x00, 0x05, 0x00, 0x00, 0x00, 0x09, 0x23,
248 /* QT602240_TOUCH_MULTI(9) */
249 0x00, 0x00, 0x00, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x02, 0x00,
250 0x00, 0x01, 0x01, 0x0e, 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00,
251 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
252 /* QT602240_TOUCH_KEYARRAY(15) */
253 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
254 0x00,
255 /* QT602240_SPT_GPIOPWM(19) */
256 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
257 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
258 /* QT602240_PROCI_GRIPFACE(20) */
259 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x28, 0x04,
260 0x0f, 0x0a,
261 /* QT602240_PROCG_NOISE(22) */
262 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x23, 0x00,
263 0x00, 0x05, 0x0f, 0x19, 0x23, 0x2d, 0x03,
264 /* QT602240_TOUCH_PROXIMITY(23) */
265 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
266 0x00, 0x00, 0x00,
267 /* QT602240_PROCI_ONETOUCH(24) */
268 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
269 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
270 /* QT602240_SPT_SELFTEST(25) */
271 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
272 0x00, 0x00, 0x00, 0x00,
273 /* QT602240_PROCI_TWOTOUCH(27) */
274 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
275 /* QT602240_SPT_CTECONFIG(28) */
276 0x00, 0x00, 0x00, 0x08, 0x10, 0x00,
277};
278
279static const u8 init_vals_ver_22[] = {
280 /* QT602240_GEN_COMMAND(6) */
281 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
282 /* QT602240_GEN_POWER(7) */
283 0x20, 0xff, 0x32,
284 /* QT602240_GEN_ACQUIRE(8) */
285 0x0a, 0x00, 0x05, 0x00, 0x00, 0x00, 0x09, 0x23,
286 /* QT602240_TOUCH_MULTI(9) */
287 0x00, 0x00, 0x00, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x02, 0x00,
288 0x00, 0x01, 0x01, 0x0e, 0x0a, 0x0a, 0x0a, 0x0a, 0x00, 0x00,
289 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
290 0x00,
291 /* QT602240_TOUCH_KEYARRAY(15) */
292 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
293 0x00,
294 /* QT602240_SPT_GPIOPWM(19) */
295 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
296 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
297 /* QT602240_PROCI_GRIPFACE(20) */
298 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x28, 0x04,
299 0x0f, 0x0a,
300 /* QT602240_PROCG_NOISE(22) */
301 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x23, 0x00,
302 0x00, 0x05, 0x0f, 0x19, 0x23, 0x2d, 0x03,
303 /* QT602240_TOUCH_PROXIMITY(23) */
304 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
305 0x00, 0x00, 0x00, 0x00, 0x00,
306 /* QT602240_PROCI_ONETOUCH(24) */
307 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
308 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
309 /* QT602240_SPT_SELFTEST(25) */
310 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
311 0x00, 0x00, 0x00, 0x00,
312 /* QT602240_PROCI_TWOTOUCH(27) */
313 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
314 /* QT602240_SPT_CTECONFIG(28) */
315 0x00, 0x00, 0x00, 0x08, 0x10, 0x00,
316};
317
318struct qt602240_info {
319 u8 family_id;
320 u8 variant_id;
321 u8 version;
322 u8 build;
323 u8 matrix_xsize;
324 u8 matrix_ysize;
325 u8 object_num;
326};
327
328struct qt602240_object {
329 u8 type;
330 u16 start_address;
331 u8 size;
332 u8 instances;
333 u8 num_report_ids;
334
335 /* to map object and message */
336 u8 max_reportid;
337};
338
339struct qt602240_message {
340 u8 reportid;
341 u8 message[7];
342 u8 checksum;
343};
344
345struct qt602240_finger {
346 int status;
347 int x;
348 int y;
349 int area;
350};
351
352/* Each client has this additional data */
353struct qt602240_data {
354 struct i2c_client *client;
355 struct input_dev *input_dev;
356 const struct qt602240_platform_data *pdata;
357 struct qt602240_object *object_table;
358 struct qt602240_info info;
359 struct qt602240_finger finger[QT602240_MAX_FINGER];
360 unsigned int irq;
361};
362
363static bool qt602240_object_readable(unsigned int type)
364{
365 switch (type) {
366 case QT602240_GEN_MESSAGE:
367 case QT602240_GEN_COMMAND:
368 case QT602240_GEN_POWER:
369 case QT602240_GEN_ACQUIRE:
370 case QT602240_TOUCH_MULTI:
371 case QT602240_TOUCH_KEYARRAY:
372 case QT602240_TOUCH_PROXIMITY:
373 case QT602240_PROCI_GRIPFACE:
374 case QT602240_PROCG_NOISE:
375 case QT602240_PROCI_ONETOUCH:
376 case QT602240_PROCI_TWOTOUCH:
377 case QT602240_SPT_COMMSCONFIG:
378 case QT602240_SPT_GPIOPWM:
379 case QT602240_SPT_SELFTEST:
380 case QT602240_SPT_CTECONFIG:
381 case QT602240_SPT_USERDATA:
382 return true;
383 default:
384 return false;
385 }
386}
387
388static bool qt602240_object_writable(unsigned int type)
389{
390 switch (type) {
391 case QT602240_GEN_COMMAND:
392 case QT602240_GEN_POWER:
393 case QT602240_GEN_ACQUIRE:
394 case QT602240_TOUCH_MULTI:
395 case QT602240_TOUCH_KEYARRAY:
396 case QT602240_TOUCH_PROXIMITY:
397 case QT602240_PROCI_GRIPFACE:
398 case QT602240_PROCG_NOISE:
399 case QT602240_PROCI_ONETOUCH:
400 case QT602240_PROCI_TWOTOUCH:
401 case QT602240_SPT_GPIOPWM:
402 case QT602240_SPT_SELFTEST:
403 case QT602240_SPT_CTECONFIG:
404 return true;
405 default:
406 return false;
407 }
408}
409
410static void qt602240_dump_message(struct device *dev,
411 struct qt602240_message *message)
412{
413 dev_dbg(dev, "reportid:\t0x%x\n", message->reportid);
414 dev_dbg(dev, "message1:\t0x%x\n", message->message[0]);
415 dev_dbg(dev, "message2:\t0x%x\n", message->message[1]);
416 dev_dbg(dev, "message3:\t0x%x\n", message->message[2]);
417 dev_dbg(dev, "message4:\t0x%x\n", message->message[3]);
418 dev_dbg(dev, "message5:\t0x%x\n", message->message[4]);
419 dev_dbg(dev, "message6:\t0x%x\n", message->message[5]);
420 dev_dbg(dev, "message7:\t0x%x\n", message->message[6]);
421 dev_dbg(dev, "checksum:\t0x%x\n", message->checksum);
422}
423
424static int qt602240_check_bootloader(struct i2c_client *client,
425 unsigned int state)
426{
427 u8 val;
428
429recheck:
430 if (i2c_master_recv(client, &val, 1) != 1) {
431 dev_err(&client->dev, "%s: i2c recv failed\n", __func__);
432 return -EIO;
433 }
434
435 switch (state) {
436 case QT602240_WAITING_BOOTLOAD_CMD:
437 case QT602240_WAITING_FRAME_DATA:
438 val &= ~QT602240_BOOT_STATUS_MASK;
439 break;
440 case QT602240_FRAME_CRC_PASS:
441 if (val == QT602240_FRAME_CRC_CHECK)
442 goto recheck;
443 break;
444 default:
445 return -EINVAL;
446 }
447
448 if (val != state) {
449 dev_err(&client->dev, "Unvalid bootloader mode state\n");
450 return -EINVAL;
451 }
452
453 return 0;
454}
455
456static int qt602240_unlock_bootloader(struct i2c_client *client)
457{
458 u8 buf[2];
459
460 buf[0] = QT602240_UNLOCK_CMD_LSB;
461 buf[1] = QT602240_UNLOCK_CMD_MSB;
462
463 if (i2c_master_send(client, buf, 2) != 2) {
464 dev_err(&client->dev, "%s: i2c send failed\n", __func__);
465 return -EIO;
466 }
467
468 return 0;
469}
470
471static int qt602240_fw_write(struct i2c_client *client,
472 const u8 *data, unsigned int frame_size)
473{
474 if (i2c_master_send(client, data, frame_size) != frame_size) {
475 dev_err(&client->dev, "%s: i2c send failed\n", __func__);
476 return -EIO;
477 }
478
479 return 0;
480}
481
482static int __qt602240_read_reg(struct i2c_client *client,
483 u16 reg, u16 len, void *val)
484{
485 struct i2c_msg xfer[2];
486 u8 buf[2];
487
488 buf[0] = reg & 0xff;
489 buf[1] = (reg >> 8) & 0xff;
490
491 /* Write register */
492 xfer[0].addr = client->addr;
493 xfer[0].flags = 0;
494 xfer[0].len = 2;
495 xfer[0].buf = buf;
496
497 /* Read data */
498 xfer[1].addr = client->addr;
499 xfer[1].flags = I2C_M_RD;
500 xfer[1].len = len;
501 xfer[1].buf = val;
502
503 if (i2c_transfer(client->adapter, xfer, 2) != 2) {
504 dev_err(&client->dev, "%s: i2c transfer failed\n", __func__);
505 return -EIO;
506 }
507
508 return 0;
509}
510
511static int qt602240_read_reg(struct i2c_client *client, u16 reg, u8 *val)
512{
513 return __qt602240_read_reg(client, reg, 1, val);
514}
515
516static int qt602240_write_reg(struct i2c_client *client, u16 reg, u8 val)
517{
518 u8 buf[3];
519
520 buf[0] = reg & 0xff;
521 buf[1] = (reg >> 8) & 0xff;
522 buf[2] = val;
523
524 if (i2c_master_send(client, buf, 3) != 3) {
525 dev_err(&client->dev, "%s: i2c send failed\n", __func__);
526 return -EIO;
527 }
528
529 return 0;
530}
531
532static int qt602240_read_object_table(struct i2c_client *client,
533 u16 reg, u8 *object_buf)
534{
535 return __qt602240_read_reg(client, reg, QT602240_OBJECT_SIZE,
536 object_buf);
537}
538
539static struct qt602240_object *
540qt602240_get_object(struct qt602240_data *data, u8 type)
541{
542 struct qt602240_object *object;
543 int i;
544
545 for (i = 0; i < data->info.object_num; i++) {
546 object = data->object_table + i;
547 if (object->type == type)
548 return object;
549 }
550
551 dev_err(&data->client->dev, "Invalid object type\n");
552 return NULL;
553}
554
555static int qt602240_read_message(struct qt602240_data *data,
556 struct qt602240_message *message)
557{
558 struct qt602240_object *object;
559 u16 reg;
560
561 object = qt602240_get_object(data, QT602240_GEN_MESSAGE);
562 if (!object)
563 return -EINVAL;
564
565 reg = object->start_address;
566 return __qt602240_read_reg(data->client, reg,
567 sizeof(struct qt602240_message), message);
568}
569
570static int qt602240_read_object(struct qt602240_data *data,
571 u8 type, u8 offset, u8 *val)
572{
573 struct qt602240_object *object;
574 u16 reg;
575
576 object = qt602240_get_object(data, type);
577 if (!object)
578 return -EINVAL;
579
580 reg = object->start_address;
581 return __qt602240_read_reg(data->client, reg + offset, 1, val);
582}
583
584static int qt602240_write_object(struct qt602240_data *data,
585 u8 type, u8 offset, u8 val)
586{
587 struct qt602240_object *object;
588 u16 reg;
589
590 object = qt602240_get_object(data, type);
591 if (!object)
592 return -EINVAL;
593
594 reg = object->start_address;
595 return qt602240_write_reg(data->client, reg + offset, val);
596}
597
598static void qt602240_input_report(struct qt602240_data *data, int single_id)
599{
600 struct qt602240_finger *finger = data->finger;
601 struct input_dev *input_dev = data->input_dev;
602 int status = finger[single_id].status;
603 int finger_num = 0;
604 int id;
605
606 for (id = 0; id < QT602240_MAX_FINGER; id++) {
607 if (!finger[id].status)
608 continue;
609
610 input_report_abs(input_dev, ABS_MT_TOUCH_MAJOR,
611 finger[id].status != QT602240_RELEASE ?
612 finger[id].area : 0);
613 input_report_abs(input_dev, ABS_MT_POSITION_X,
614 finger[id].x);
615 input_report_abs(input_dev, ABS_MT_POSITION_Y,
616 finger[id].y);
617 input_mt_sync(input_dev);
618
619 if (finger[id].status == QT602240_RELEASE)
620 finger[id].status = 0;
621 else
622 finger_num++;
623 }
624
625 input_report_key(input_dev, BTN_TOUCH, finger_num > 0);
626
627 if (status != QT602240_RELEASE) {
628 input_report_abs(input_dev, ABS_X, finger[single_id].x);
629 input_report_abs(input_dev, ABS_Y, finger[single_id].y);
630 }
631
632 input_sync(input_dev);
633}
634
635static void qt602240_input_touchevent(struct qt602240_data *data,
636 struct qt602240_message *message, int id)
637{
638 struct qt602240_finger *finger = data->finger;
639 struct device *dev = &data->client->dev;
640 u8 status = message->message[0];
641 int x;
642 int y;
643 int area;
644
645 /* Check the touch is present on the screen */
646 if (!(status & QT602240_DETECT)) {
647 if (status & QT602240_RELEASE) {
648 dev_dbg(dev, "[%d] released\n", id);
649
650 finger[id].status = QT602240_RELEASE;
651 qt602240_input_report(data, id);
652 }
653 return;
654 }
655
656 /* Check only AMP detection */
657 if (!(status & (QT602240_PRESS | QT602240_MOVE)))
658 return;
659
660 x = (message->message[1] << 2) | ((message->message[3] & ~0x3f) >> 6);
661 y = (message->message[2] << 2) | ((message->message[3] & ~0xf3) >> 2);
662 area = message->message[4];
663
664 dev_dbg(dev, "[%d] %s x: %d, y: %d, area: %d\n", id,
665 status & QT602240_MOVE ? "moved" : "pressed",
666 x, y, area);
667
668 finger[id].status = status & QT602240_MOVE ?
669 QT602240_MOVE : QT602240_PRESS;
670 finger[id].x = x;
671 finger[id].y = y;
672 finger[id].area = area;
673
674 qt602240_input_report(data, id);
675}
676
677static irqreturn_t qt602240_interrupt(int irq, void *dev_id)
678{
679 struct qt602240_data *data = dev_id;
680 struct qt602240_message message;
681 struct qt602240_object *object;
682 struct device *dev = &data->client->dev;
683 int id;
684 u8 reportid;
685 u8 max_reportid;
686 u8 min_reportid;
687
688 do {
689 if (qt602240_read_message(data, &message)) {
690 dev_err(dev, "Failed to read message\n");
691 goto end;
692 }
693
694 reportid = message.reportid;
695
696 /* whether reportid is thing of QT602240_TOUCH_MULTI */
697 object = qt602240_get_object(data, QT602240_TOUCH_MULTI);
698 if (!object)
699 goto end;
700
701 max_reportid = object->max_reportid;
702 min_reportid = max_reportid - object->num_report_ids + 1;
703 id = reportid - min_reportid;
704
705 if (reportid >= min_reportid && reportid <= max_reportid)
706 qt602240_input_touchevent(data, &message, id);
707 else
708 qt602240_dump_message(dev, &message);
709 } while (reportid != 0xff);
710
711end:
712 return IRQ_HANDLED;
713}
714
715static int qt602240_check_reg_init(struct qt602240_data *data)
716{
717 struct qt602240_object *object;
718 struct device *dev = &data->client->dev;
719 int index = 0;
720 int i, j;
721 u8 version = data->info.version;
722 u8 *init_vals;
723
724 switch (version) {
725 case QT602240_VER_20:
726 init_vals = (u8 *)init_vals_ver_20;
727 break;
728 case QT602240_VER_21:
729 init_vals = (u8 *)init_vals_ver_21;
730 break;
731 case QT602240_VER_22:
732 init_vals = (u8 *)init_vals_ver_22;
733 break;
734 default:
735 dev_err(dev, "Firmware version %d doesn't support\n", version);
736 return -EINVAL;
737 }
738
739 for (i = 0; i < data->info.object_num; i++) {
740 object = data->object_table + i;
741
742 if (!qt602240_object_writable(object->type))
743 continue;
744
745 for (j = 0; j < object->size + 1; j++)
746 qt602240_write_object(data, object->type, j,
747 init_vals[index + j]);
748
749 index += object->size + 1;
750 }
751
752 return 0;
753}
754
755static int qt602240_check_matrix_size(struct qt602240_data *data)
756{
757 const struct qt602240_platform_data *pdata = data->pdata;
758 struct device *dev = &data->client->dev;
759 int mode = -1;
760 int error;
761 u8 val;
762
763 dev_dbg(dev, "Number of X lines: %d\n", pdata->x_line);
764 dev_dbg(dev, "Number of Y lines: %d\n", pdata->y_line);
765
766 switch (pdata->x_line) {
767 case 0 ... 15:
768 if (pdata->y_line <= 14)
769 mode = 0;
770 break;
771 case 16:
772 if (pdata->y_line <= 12)
773 mode = 1;
774 if (pdata->y_line == 13 || pdata->y_line == 14)
775 mode = 0;
776 break;
777 case 17:
778 if (pdata->y_line <= 11)
779 mode = 2;
780 if (pdata->y_line == 12 || pdata->y_line == 13)
781 mode = 1;
782 break;
783 case 18:
784 if (pdata->y_line <= 10)
785 mode = 3;
786 if (pdata->y_line == 11 || pdata->y_line == 12)
787 mode = 2;
788 break;
789 case 19:
790 if (pdata->y_line <= 9)
791 mode = 4;
792 if (pdata->y_line == 10 || pdata->y_line == 11)
793 mode = 3;
794 break;
795 case 20:
796 mode = 4;
797 }
798
799 if (mode < 0) {
800 dev_err(dev, "Invalid X/Y lines\n");
801 return -EINVAL;
802 }
803
804 error = qt602240_read_object(data, QT602240_SPT_CTECONFIG,
805 QT602240_CTE_MODE, &val);
806 if (error)
807 return error;
808
809 if (mode == val)
810 return 0;
811
812 /* Change the CTE configuration */
813 qt602240_write_object(data, QT602240_SPT_CTECONFIG,
814 QT602240_CTE_CTRL, 1);
815 qt602240_write_object(data, QT602240_SPT_CTECONFIG,
816 QT602240_CTE_MODE, mode);
817 qt602240_write_object(data, QT602240_SPT_CTECONFIG,
818 QT602240_CTE_CTRL, 0);
819
820 return 0;
821}
822
823static int qt602240_make_highchg(struct qt602240_data *data)
824{
825 struct device *dev = &data->client->dev;
826 int count = 10;
827 int error;
828 u8 val;
829
830 /* Read dummy message to make high CHG pin */
831 do {
832 error = qt602240_read_object(data, QT602240_GEN_MESSAGE, 0, &val);
833 if (error)
834 return error;
835 } while ((val != 0xff) && --count);
836
837 if (!count) {
838 dev_err(dev, "CHG pin isn't cleared\n");
839 return -EBUSY;
840 }
841
842 return 0;
843}
844
845static void qt602240_handle_pdata(struct qt602240_data *data)
846{
847 const struct qt602240_platform_data *pdata = data->pdata;
848 u8 voltage;
849
850 /* Set touchscreen lines */
851 qt602240_write_object(data, QT602240_TOUCH_MULTI, QT602240_TOUCH_XSIZE,
852 pdata->x_line);
853 qt602240_write_object(data, QT602240_TOUCH_MULTI, QT602240_TOUCH_YSIZE,
854 pdata->y_line);
855
856 /* Set touchscreen orient */
857 qt602240_write_object(data, QT602240_TOUCH_MULTI, QT602240_TOUCH_ORIENT,
858 pdata->orient);
859
860 /* Set touchscreen burst length */
861 qt602240_write_object(data, QT602240_TOUCH_MULTI,
862 QT602240_TOUCH_BLEN, pdata->blen);
863
864 /* Set touchscreen threshold */
865 qt602240_write_object(data, QT602240_TOUCH_MULTI,
866 QT602240_TOUCH_TCHTHR, pdata->threshold);
867
868 /* Set touchscreen resolution */
869 qt602240_write_object(data, QT602240_TOUCH_MULTI,
870 QT602240_TOUCH_XRANGE_LSB, (pdata->x_size - 1) & 0xff);
871 qt602240_write_object(data, QT602240_TOUCH_MULTI,
872 QT602240_TOUCH_XRANGE_MSB, (pdata->x_size - 1) >> 8);
873 qt602240_write_object(data, QT602240_TOUCH_MULTI,
874 QT602240_TOUCH_YRANGE_LSB, (pdata->y_size - 1) & 0xff);
875 qt602240_write_object(data, QT602240_TOUCH_MULTI,
876 QT602240_TOUCH_YRANGE_MSB, (pdata->y_size - 1) >> 8);
877
878 /* Set touchscreen voltage */
879 if (data->info.version >= QT602240_VER_21 && pdata->voltage) {
880 if (pdata->voltage < QT602240_VOLTAGE_DEFAULT) {
881 voltage = (QT602240_VOLTAGE_DEFAULT - pdata->voltage) /
882 QT602240_VOLTAGE_STEP;
883 voltage = 0xff - voltage + 1;
884 } else
885 voltage = (pdata->voltage - QT602240_VOLTAGE_DEFAULT) /
886 QT602240_VOLTAGE_STEP;
887
888 qt602240_write_object(data, QT602240_SPT_CTECONFIG,
889 QT602240_CTE_VOLTAGE, voltage);
890 }
891}
892
893static int qt602240_get_info(struct qt602240_data *data)
894{
895 struct i2c_client *client = data->client;
896 struct qt602240_info *info = &data->info;
897 int error;
898 u8 val;
899
900 error = qt602240_read_reg(client, QT602240_FAMILY_ID, &val);
901 if (error)
902 return error;
903 info->family_id = val;
904
905 error = qt602240_read_reg(client, QT602240_VARIANT_ID, &val);
906 if (error)
907 return error;
908 info->variant_id = val;
909
910 error = qt602240_read_reg(client, QT602240_VERSION, &val);
911 if (error)
912 return error;
913 info->version = val;
914
915 error = qt602240_read_reg(client, QT602240_BUILD, &val);
916 if (error)
917 return error;
918 info->build = val;
919
920 error = qt602240_read_reg(client, QT602240_OBJECT_NUM, &val);
921 if (error)
922 return error;
923 info->object_num = val;
924
925 return 0;
926}
927
928static int qt602240_get_object_table(struct qt602240_data *data)
929{
930 int error;
931 int i;
932 u16 reg;
933 u8 reportid = 0;
934 u8 buf[QT602240_OBJECT_SIZE];
935
936 for (i = 0; i < data->info.object_num; i++) {
937 struct qt602240_object *object = data->object_table + i;
938
939 reg = QT602240_OBJECT_START + QT602240_OBJECT_SIZE * i;
940 error = qt602240_read_object_table(data->client, reg, buf);
941 if (error)
942 return error;
943
944 object->type = buf[0];
945 object->start_address = (buf[2] << 8) | buf[1];
946 object->size = buf[3];
947 object->instances = buf[4];
948 object->num_report_ids = buf[5];
949
950 if (object->num_report_ids) {
951 reportid += object->num_report_ids *
952 (object->instances + 1);
953 object->max_reportid = reportid;
954 }
955 }
956
957 return 0;
958}
959
960static int qt602240_initialize(struct qt602240_data *data)
961{
962 struct i2c_client *client = data->client;
963 struct qt602240_info *info = &data->info;
964 int error;
965 u8 val;
966
967 error = qt602240_get_info(data);
968 if (error)
969 return error;
970
971 data->object_table = kcalloc(info->object_num,
972 sizeof(struct qt602240_data),
973 GFP_KERNEL);
974 if (!data->object_table) {
975 dev_err(&client->dev, "Failed to allocate memory\n");
976 return -ENOMEM;
977 }
978
979 /* Get object table information */
980 error = qt602240_get_object_table(data);
981 if (error)
982 return error;
983
984 /* Check register init values */
985 error = qt602240_check_reg_init(data);
986 if (error)
987 return error;
988
989 /* Check X/Y matrix size */
990 error = qt602240_check_matrix_size(data);
991 if (error)
992 return error;
993
994 error = qt602240_make_highchg(data);
995 if (error)
996 return error;
997
998 qt602240_handle_pdata(data);
999
1000 /* Backup to memory */
1001 qt602240_write_object(data, QT602240_GEN_COMMAND,
1002 QT602240_COMMAND_BACKUPNV,
1003 QT602240_BACKUP_VALUE);
1004 msleep(QT602240_BACKUP_TIME);
1005
1006 /* Soft reset */
1007 qt602240_write_object(data, QT602240_GEN_COMMAND,
1008 QT602240_COMMAND_RESET, 1);
1009 msleep(QT602240_RESET_TIME);
1010
1011 /* Update matrix size at info struct */
1012 error = qt602240_read_reg(client, QT602240_MATRIX_X_SIZE, &val);
1013 if (error)
1014 return error;
1015 info->matrix_xsize = val;
1016
1017 error = qt602240_read_reg(client, QT602240_MATRIX_Y_SIZE, &val);
1018 if (error)
1019 return error;
1020 info->matrix_ysize = val;
1021
1022 dev_info(&client->dev,
1023 "Family ID: %d Variant ID: %d Version: %d Build: %d\n",
1024 info->family_id, info->variant_id, info->version,
1025 info->build);
1026
1027 dev_info(&client->dev,
1028 "Matrix X Size: %d Matrix Y Size: %d Object Num: %d\n",
1029 info->matrix_xsize, info->matrix_ysize,
1030 info->object_num);
1031
1032 return 0;
1033}
1034
1035static ssize_t qt602240_object_show(struct device *dev,
1036 struct device_attribute *attr, char *buf)
1037{
1038 struct qt602240_data *data = dev_get_drvdata(dev);
1039 struct qt602240_object *object;
1040 int count = 0;
1041 int i, j;
1042 int error;
1043 u8 val;
1044
1045 for (i = 0; i < data->info.object_num; i++) {
1046 object = data->object_table + i;
1047
1048 count += sprintf(buf + count,
1049 "Object Table Element %d(Type %d)\n",
1050 i + 1, object->type);
1051
1052 if (!qt602240_object_readable(object->type)) {
1053 count += sprintf(buf + count, "\n");
1054 continue;
1055 }
1056
1057 for (j = 0; j < object->size + 1; j++) {
1058 error = qt602240_read_object(data,
1059 object->type, j, &val);
1060 if (error)
1061 return error;
1062
1063 count += sprintf(buf + count,
1064 " Byte %d: 0x%x (%d)\n", j, val, val);
1065 }
1066
1067 count += sprintf(buf + count, "\n");
1068 }
1069
1070 return count;
1071}
1072
1073static int qt602240_load_fw(struct device *dev, const char *fn)
1074{
1075 struct qt602240_data *data = dev_get_drvdata(dev);
1076 struct i2c_client *client = data->client;
1077 const struct firmware *fw = NULL;
1078 unsigned int frame_size;
1079 unsigned int pos = 0;
1080 int ret;
1081
1082 ret = request_firmware(&fw, fn, dev);
1083 if (ret) {
1084 dev_err(dev, "Unable to open firmware %s\n", fn);
1085 return ret;
1086 }
1087
1088 /* Change to the bootloader mode */
1089 qt602240_write_object(data, QT602240_GEN_COMMAND,
1090 QT602240_COMMAND_RESET, QT602240_BOOT_VALUE);
1091 msleep(QT602240_RESET_TIME);
1092
1093 /* Change to slave address of bootloader */
1094 if (client->addr == QT602240_APP_LOW)
1095 client->addr = QT602240_BOOT_LOW;
1096 else
1097 client->addr = QT602240_BOOT_HIGH;
1098
1099 ret = qt602240_check_bootloader(client, QT602240_WAITING_BOOTLOAD_CMD);
1100 if (ret)
1101 goto out;
1102
1103 /* Unlock bootloader */
1104 qt602240_unlock_bootloader(client);
1105
1106 while (pos < fw->size) {
1107 ret = qt602240_check_bootloader(client,
1108 QT602240_WAITING_FRAME_DATA);
1109 if (ret)
1110 goto out;
1111
1112 frame_size = ((*(fw->data + pos) << 8) | *(fw->data + pos + 1));
1113
1114 /* We should add 2 at frame size as the the firmware data is not
1115 * included the CRC bytes.
1116 */
1117 frame_size += 2;
1118
1119 /* Write one frame to device */
1120 qt602240_fw_write(client, fw->data + pos, frame_size);
1121
1122 ret = qt602240_check_bootloader(client,
1123 QT602240_FRAME_CRC_PASS);
1124 if (ret)
1125 goto out;
1126
1127 pos += frame_size;
1128
1129 dev_dbg(dev, "Updated %d bytes / %zd bytes\n", pos, fw->size);
1130 }
1131
1132out:
1133 release_firmware(fw);
1134
1135 /* Change to slave address of application */
1136 if (client->addr == QT602240_BOOT_LOW)
1137 client->addr = QT602240_APP_LOW;
1138 else
1139 client->addr = QT602240_APP_HIGH;
1140
1141 return ret;
1142}
1143
1144static ssize_t qt602240_update_fw_store(struct device *dev,
1145 struct device_attribute *attr,
1146 const char *buf, size_t count)
1147{
1148 struct qt602240_data *data = dev_get_drvdata(dev);
1149 unsigned int version;
1150 int error;
1151
1152 if (sscanf(buf, "%u", &version) != 1) {
1153 dev_err(dev, "Invalid values\n");
1154 return -EINVAL;
1155 }
1156
1157 if (data->info.version < QT602240_VER_21 || version < QT602240_VER_21) {
1158 dev_err(dev, "FW update supported starting with version 21\n");
1159 return -EINVAL;
1160 }
1161
1162 disable_irq(data->irq);
1163
1164 error = qt602240_load_fw(dev, QT602240_FW_NAME);
1165 if (error) {
1166 dev_err(dev, "The firmware update failed(%d)\n", error);
1167 count = error;
1168 } else {
1169 dev_dbg(dev, "The firmware update succeeded\n");
1170
1171 /* Wait for reset */
1172 msleep(QT602240_FWRESET_TIME);
1173
1174 kfree(data->object_table);
1175 data->object_table = NULL;
1176
1177 qt602240_initialize(data);
1178 }
1179
1180 enable_irq(data->irq);
1181
1182 return count;
1183}
1184
1185static DEVICE_ATTR(object, 0444, qt602240_object_show, NULL);
1186static DEVICE_ATTR(update_fw, 0664, NULL, qt602240_update_fw_store);
1187
1188static struct attribute *qt602240_attrs[] = {
1189 &dev_attr_object.attr,
1190 &dev_attr_update_fw.attr,
1191 NULL
1192};
1193
1194static const struct attribute_group qt602240_attr_group = {
1195 .attrs = qt602240_attrs,
1196};
1197
1198static void qt602240_start(struct qt602240_data *data)
1199{
1200 /* Touch enable */
1201 qt602240_write_object(data,
1202 QT602240_TOUCH_MULTI, QT602240_TOUCH_CTRL, 0x83);
1203}
1204
1205static void qt602240_stop(struct qt602240_data *data)
1206{
1207 /* Touch disable */
1208 qt602240_write_object(data,
1209 QT602240_TOUCH_MULTI, QT602240_TOUCH_CTRL, 0);
1210}
1211
1212static int qt602240_input_open(struct input_dev *dev)
1213{
1214 struct qt602240_data *data = input_get_drvdata(dev);
1215
1216 qt602240_start(data);
1217
1218 return 0;
1219}
1220
1221static void qt602240_input_close(struct input_dev *dev)
1222{
1223 struct qt602240_data *data = input_get_drvdata(dev);
1224
1225 qt602240_stop(data);
1226}
1227
1228static int __devinit qt602240_probe(struct i2c_client *client,
1229 const struct i2c_device_id *id)
1230{
1231 struct qt602240_data *data;
1232 struct input_dev *input_dev;
1233 int error;
1234
1235 if (!client->dev.platform_data)
1236 return -EINVAL;
1237
1238 data = kzalloc(sizeof(struct qt602240_data), GFP_KERNEL);
1239 input_dev = input_allocate_device();
1240 if (!data || !input_dev) {
1241 dev_err(&client->dev, "Failed to allocate memory\n");
1242 error = -ENOMEM;
1243 goto err_free_mem;
1244 }
1245
1246 input_dev->name = "AT42QT602240/ATMXT224 Touchscreen";
1247 input_dev->id.bustype = BUS_I2C;
1248 input_dev->dev.parent = &client->dev;
1249 input_dev->open = qt602240_input_open;
1250 input_dev->close = qt602240_input_close;
1251
1252 __set_bit(EV_ABS, input_dev->evbit);
1253 __set_bit(EV_KEY, input_dev->evbit);
1254 __set_bit(BTN_TOUCH, input_dev->keybit);
1255
1256 /* For single touch */
1257 input_set_abs_params(input_dev, ABS_X,
1258 0, QT602240_MAX_XC, 0, 0);
1259 input_set_abs_params(input_dev, ABS_Y,
1260 0, QT602240_MAX_YC, 0, 0);
1261
1262 /* For multi touch */
1263 input_set_abs_params(input_dev, ABS_MT_TOUCH_MAJOR,
1264 0, QT602240_MAX_AREA, 0, 0);
1265 input_set_abs_params(input_dev, ABS_MT_POSITION_X,
1266 0, QT602240_MAX_XC, 0, 0);
1267 input_set_abs_params(input_dev, ABS_MT_POSITION_Y,
1268 0, QT602240_MAX_YC, 0, 0);
1269
1270 input_set_drvdata(input_dev, data);
1271
1272 data->client = client;
1273 data->input_dev = input_dev;
1274 data->pdata = client->dev.platform_data;
1275 data->irq = client->irq;
1276
1277 i2c_set_clientdata(client, data);
1278
1279 error = qt602240_initialize(data);
1280 if (error)
1281 goto err_free_object;
1282
1283 error = request_threaded_irq(client->irq, NULL, qt602240_interrupt,
1284 IRQF_TRIGGER_FALLING, client->dev.driver->name, data);
1285 if (error) {
1286 dev_err(&client->dev, "Failed to register interrupt\n");
1287 goto err_free_object;
1288 }
1289
1290 error = input_register_device(input_dev);
1291 if (error)
1292 goto err_free_irq;
1293
1294 error = sysfs_create_group(&client->dev.kobj, &qt602240_attr_group);
1295 if (error)
1296 goto err_unregister_device;
1297
1298 return 0;
1299
1300err_unregister_device:
1301 input_unregister_device(input_dev);
1302 input_dev = NULL;
1303err_free_irq:
1304 free_irq(client->irq, data);
1305err_free_object:
1306 kfree(data->object_table);
1307err_free_mem:
1308 input_free_device(input_dev);
1309 kfree(data);
1310 return error;
1311}
1312
1313static int __devexit qt602240_remove(struct i2c_client *client)
1314{
1315 struct qt602240_data *data = i2c_get_clientdata(client);
1316
1317 sysfs_remove_group(&client->dev.kobj, &qt602240_attr_group);
1318 free_irq(data->irq, data);
1319 input_unregister_device(data->input_dev);
1320 kfree(data->object_table);
1321 kfree(data);
1322
1323 return 0;
1324}
1325
1326#ifdef CONFIG_PM
1327static int qt602240_suspend(struct i2c_client *client, pm_message_t mesg)
1328{
1329 struct qt602240_data *data = i2c_get_clientdata(client);
1330 struct input_dev *input_dev = data->input_dev;
1331
1332 mutex_lock(&input_dev->mutex);
1333
1334 if (input_dev->users)
1335 qt602240_stop(data);
1336
1337 mutex_unlock(&input_dev->mutex);
1338
1339 return 0;
1340}
1341
1342static int qt602240_resume(struct i2c_client *client)
1343{
1344 struct qt602240_data *data = i2c_get_clientdata(client);
1345 struct input_dev *input_dev = data->input_dev;
1346
1347 /* Soft reset */
1348 qt602240_write_object(data, QT602240_GEN_COMMAND,
1349 QT602240_COMMAND_RESET, 1);
1350
1351 msleep(QT602240_RESET_TIME);
1352
1353 mutex_lock(&input_dev->mutex);
1354
1355 if (input_dev->users)
1356 qt602240_start(data);
1357
1358 mutex_unlock(&input_dev->mutex);
1359
1360 return 0;
1361}
1362#else
1363#define qt602240_suspend NULL
1364#define qt602240_resume NULL
1365#endif
1366
1367static const struct i2c_device_id qt602240_id[] = {
1368 { "qt602240_ts", 0 },
1369 { }
1370};
1371MODULE_DEVICE_TABLE(i2c, qt602240_id);
1372
1373static struct i2c_driver qt602240_driver = {
1374 .driver = {
1375 .name = "qt602240_ts",
1376 .owner = THIS_MODULE,
1377 },
1378 .probe = qt602240_probe,
1379 .remove = __devexit_p(qt602240_remove),
1380 .suspend = qt602240_suspend,
1381 .resume = qt602240_resume,
1382 .id_table = qt602240_id,
1383};
1384
1385static int __init qt602240_init(void)
1386{
1387 return i2c_add_driver(&qt602240_driver);
1388}
1389
1390static void __exit qt602240_exit(void)
1391{
1392 i2c_del_driver(&qt602240_driver);
1393}
1394
1395module_init(qt602240_init);
1396module_exit(qt602240_exit);
1397
1398/* Module information */
1399MODULE_AUTHOR("Joonyoung Shim <jy0922.shim@samsung.com>");
1400MODULE_DESCRIPTION("AT42QT602240/ATMXT224 Touchscreen driver");
1401MODULE_LICENSE("GPL");
diff --git a/drivers/input/touchscreen/tps6507x-ts.c b/drivers/input/touchscreen/tps6507x-ts.c
index 5b70a1419b4d..a644d18c04dc 100644
--- a/drivers/input/touchscreen/tps6507x-ts.c
+++ b/drivers/input/touchscreen/tps6507x-ts.c
@@ -355,9 +355,6 @@ static int __devexit tps6507x_ts_remove(struct platform_device *pdev)
355 struct tps6507x_ts *tsc = tps6507x_dev->ts; 355 struct tps6507x_ts *tsc = tps6507x_dev->ts;
356 struct input_dev *input_dev = tsc->input_dev; 356 struct input_dev *input_dev = tsc->input_dev;
357 357
358 if (!tsc)
359 return 0;
360
361 cancel_delayed_work_sync(&tsc->work); 358 cancel_delayed_work_sync(&tsc->work);
362 destroy_workqueue(tsc->wq); 359 destroy_workqueue(tsc->wq);
363 360
diff --git a/drivers/input/touchscreen/usbtouchscreen.c b/drivers/input/touchscreen/usbtouchscreen.c
index 567d57215c28..f45f80f6d336 100644
--- a/drivers/input/touchscreen/usbtouchscreen.c
+++ b/drivers/input/touchscreen/usbtouchscreen.c
@@ -95,6 +95,7 @@ struct usbtouch_device_info {
95 int (*get_pkt_len) (unsigned char *pkt, int len); 95 int (*get_pkt_len) (unsigned char *pkt, int len);
96 96
97 int (*read_data) (struct usbtouch_usb *usbtouch, unsigned char *pkt); 97 int (*read_data) (struct usbtouch_usb *usbtouch, unsigned char *pkt);
98 int (*alloc) (struct usbtouch_usb *usbtouch);
98 int (*init) (struct usbtouch_usb *usbtouch); 99 int (*init) (struct usbtouch_usb *usbtouch);
99 void (*exit) (struct usbtouch_usb *usbtouch); 100 void (*exit) (struct usbtouch_usb *usbtouch);
100}; 101};
@@ -135,7 +136,7 @@ enum {
135 DEVTYPE_JASTEC, 136 DEVTYPE_JASTEC,
136 DEVTYPE_E2I, 137 DEVTYPE_E2I,
137 DEVTYPE_ZYTRONIC, 138 DEVTYPE_ZYTRONIC,
138 DEVTYPE_TC5UH, 139 DEVTYPE_TC45USB,
139 DEVTYPE_NEXIO, 140 DEVTYPE_NEXIO,
140}; 141};
141 142
@@ -222,8 +223,11 @@ static const struct usb_device_id usbtouch_devices[] = {
222 {USB_DEVICE(0x14c8, 0x0003), .driver_info = DEVTYPE_ZYTRONIC}, 223 {USB_DEVICE(0x14c8, 0x0003), .driver_info = DEVTYPE_ZYTRONIC},
223#endif 224#endif
224 225
225#ifdef CONFIG_TOUCHSCREEN_USB_ETT_TC5UH 226#ifdef CONFIG_TOUCHSCREEN_USB_ETT_TC45USB
226 {USB_DEVICE(0x0664, 0x0309), .driver_info = DEVTYPE_TC5UH}, 227 /* TC5UH */
228 {USB_DEVICE(0x0664, 0x0309), .driver_info = DEVTYPE_TC45USB},
229 /* TC4UM */
230 {USB_DEVICE(0x0664, 0x0306), .driver_info = DEVTYPE_TC45USB},
227#endif 231#endif
228 232
229#ifdef CONFIG_TOUCHSCREEN_USB_NEXIO 233#ifdef CONFIG_TOUCHSCREEN_USB_NEXIO
@@ -507,7 +511,7 @@ static int dmc_tsc10_init(struct usbtouch_usb *usbtouch)
507 int ret = -ENOMEM; 511 int ret = -ENOMEM;
508 unsigned char *buf; 512 unsigned char *buf;
509 513
510 buf = kmalloc(2, GFP_KERNEL); 514 buf = kmalloc(2, GFP_NOIO);
511 if (!buf) 515 if (!buf)
512 goto err_nobuf; 516 goto err_nobuf;
513 /* reset */ 517 /* reset */
@@ -574,10 +578,10 @@ static int irtouch_read_data(struct usbtouch_usb *dev, unsigned char *pkt)
574#endif 578#endif
575 579
576/***************************************************************************** 580/*****************************************************************************
577 * ET&T TC5UH part 581 * ET&T TC5UH/TC4UM part
578 */ 582 */
579#ifdef CONFIG_TOUCHSCREEN_USB_ETT_TC5UH 583#ifdef CONFIG_TOUCHSCREEN_USB_ETT_TC45USB
580static int tc5uh_read_data(struct usbtouch_usb *dev, unsigned char *pkt) 584static int tc45usb_read_data(struct usbtouch_usb *dev, unsigned char *pkt)
581{ 585{
582 dev->x = ((pkt[2] & 0x0F) << 8) | pkt[1]; 586 dev->x = ((pkt[2] & 0x0F) << 8) | pkt[1];
583 dev->y = ((pkt[4] & 0x0F) << 8) | pkt[3]; 587 dev->y = ((pkt[4] & 0x0F) << 8) | pkt[3];
@@ -732,11 +736,43 @@ static void nexio_ack_complete(struct urb *urb)
732{ 736{
733} 737}
734 738
739static int nexio_alloc(struct usbtouch_usb *usbtouch)
740{
741 struct nexio_priv *priv;
742 int ret = -ENOMEM;
743
744 usbtouch->priv = kmalloc(sizeof(struct nexio_priv), GFP_KERNEL);
745 if (!usbtouch->priv)
746 goto out_buf;
747
748 priv = usbtouch->priv;
749
750 priv->ack_buf = kmemdup(nexio_ack_pkt, sizeof(nexio_ack_pkt),
751 GFP_KERNEL);
752 if (!priv->ack_buf)
753 goto err_priv;
754
755 priv->ack = usb_alloc_urb(0, GFP_KERNEL);
756 if (!priv->ack) {
757 dbg("%s - usb_alloc_urb failed: usbtouch->ack", __func__);
758 goto err_ack_buf;
759 }
760
761 return 0;
762
763err_ack_buf:
764 kfree(priv->ack_buf);
765err_priv:
766 kfree(priv);
767out_buf:
768 return ret;
769}
770
735static int nexio_init(struct usbtouch_usb *usbtouch) 771static int nexio_init(struct usbtouch_usb *usbtouch)
736{ 772{
737 struct usb_device *dev = interface_to_usbdev(usbtouch->interface); 773 struct usb_device *dev = interface_to_usbdev(usbtouch->interface);
738 struct usb_host_interface *interface = usbtouch->interface->cur_altsetting; 774 struct usb_host_interface *interface = usbtouch->interface->cur_altsetting;
739 struct nexio_priv *priv; 775 struct nexio_priv *priv = usbtouch->priv;
740 int ret = -ENOMEM; 776 int ret = -ENOMEM;
741 int actual_len, i; 777 int actual_len, i;
742 unsigned char *buf; 778 unsigned char *buf;
@@ -755,7 +791,7 @@ static int nexio_init(struct usbtouch_usb *usbtouch)
755 if (!input_ep || !output_ep) 791 if (!input_ep || !output_ep)
756 return -ENXIO; 792 return -ENXIO;
757 793
758 buf = kmalloc(NEXIO_BUFSIZE, GFP_KERNEL); 794 buf = kmalloc(NEXIO_BUFSIZE, GFP_NOIO);
759 if (!buf) 795 if (!buf)
760 goto out_buf; 796 goto out_buf;
761 797
@@ -787,11 +823,11 @@ static int nexio_init(struct usbtouch_usb *usbtouch)
787 switch (buf[0]) { 823 switch (buf[0]) {
788 case 0x83: /* firmware version */ 824 case 0x83: /* firmware version */
789 if (!firmware_ver) 825 if (!firmware_ver)
790 firmware_ver = kstrdup(&buf[2], GFP_KERNEL); 826 firmware_ver = kstrdup(&buf[2], GFP_NOIO);
791 break; 827 break;
792 case 0x84: /* device name */ 828 case 0x84: /* device name */
793 if (!device_name) 829 if (!device_name)
794 device_name = kstrdup(&buf[2], GFP_KERNEL); 830 device_name = kstrdup(&buf[2], GFP_NOIO);
795 break; 831 break;
796 } 832 }
797 } 833 }
@@ -802,36 +838,11 @@ static int nexio_init(struct usbtouch_usb *usbtouch)
802 kfree(firmware_ver); 838 kfree(firmware_ver);
803 kfree(device_name); 839 kfree(device_name);
804 840
805 /* prepare ACK URB */
806 ret = -ENOMEM;
807
808 usbtouch->priv = kmalloc(sizeof(struct nexio_priv), GFP_KERNEL);
809 if (!usbtouch->priv)
810 goto out_buf;
811
812 priv = usbtouch->priv;
813
814 priv->ack_buf = kmemdup(nexio_ack_pkt, sizeof(nexio_ack_pkt),
815 GFP_KERNEL);
816 if (!priv->ack_buf)
817 goto err_priv;
818
819 priv->ack = usb_alloc_urb(0, GFP_KERNEL);
820 if (!priv->ack) {
821 dbg("%s - usb_alloc_urb failed: usbtouch->ack", __func__);
822 goto err_ack_buf;
823 }
824
825 usb_fill_bulk_urb(priv->ack, dev, usb_sndbulkpipe(dev, output_ep), 841 usb_fill_bulk_urb(priv->ack, dev, usb_sndbulkpipe(dev, output_ep),
826 priv->ack_buf, sizeof(nexio_ack_pkt), 842 priv->ack_buf, sizeof(nexio_ack_pkt),
827 nexio_ack_complete, usbtouch); 843 nexio_ack_complete, usbtouch);
828 ret = 0; 844 ret = 0;
829 goto out_buf;
830 845
831err_ack_buf:
832 kfree(priv->ack_buf);
833err_priv:
834 kfree(priv);
835out_buf: 846out_buf:
836 kfree(buf); 847 kfree(buf);
837 return ret; 848 return ret;
@@ -849,29 +860,32 @@ static void nexio_exit(struct usbtouch_usb *usbtouch)
849 860
850static int nexio_read_data(struct usbtouch_usb *usbtouch, unsigned char *pkt) 861static int nexio_read_data(struct usbtouch_usb *usbtouch, unsigned char *pkt)
851{ 862{
852 int x, y, begin_x, begin_y, end_x, end_y, w, h, ret;
853 struct nexio_touch_packet *packet = (void *) pkt; 863 struct nexio_touch_packet *packet = (void *) pkt;
854 struct nexio_priv *priv = usbtouch->priv; 864 struct nexio_priv *priv = usbtouch->priv;
865 unsigned int data_len = be16_to_cpu(packet->data_len);
866 unsigned int x_len = be16_to_cpu(packet->x_len);
867 unsigned int y_len = be16_to_cpu(packet->y_len);
868 int x, y, begin_x, begin_y, end_x, end_y, w, h, ret;
855 869
856 /* got touch data? */ 870 /* got touch data? */
857 if ((pkt[0] & 0xe0) != 0xe0) 871 if ((pkt[0] & 0xe0) != 0xe0)
858 return 0; 872 return 0;
859 873
860 if (be16_to_cpu(packet->data_len) > 0xff) 874 if (data_len > 0xff)
861 packet->data_len = cpu_to_be16(be16_to_cpu(packet->data_len) - 0x100); 875 data_len -= 0x100;
862 if (be16_to_cpu(packet->x_len) > 0xff) 876 if (x_len > 0xff)
863 packet->x_len = cpu_to_be16(be16_to_cpu(packet->x_len) - 0x80); 877 x_len -= 0x80;
864 878
865 /* send ACK */ 879 /* send ACK */
866 ret = usb_submit_urb(priv->ack, GFP_ATOMIC); 880 ret = usb_submit_urb(priv->ack, GFP_ATOMIC);
867 881
868 if (!usbtouch->type->max_xc) { 882 if (!usbtouch->type->max_xc) {
869 usbtouch->type->max_xc = 2 * be16_to_cpu(packet->x_len); 883 usbtouch->type->max_xc = 2 * x_len;
870 input_set_abs_params(usbtouch->input, ABS_X, 0, 884 input_set_abs_params(usbtouch->input, ABS_X,
871 2 * be16_to_cpu(packet->x_len), 0, 0); 885 0, usbtouch->type->max_xc, 0, 0);
872 usbtouch->type->max_yc = 2 * be16_to_cpu(packet->y_len); 886 usbtouch->type->max_yc = 2 * y_len;
873 input_set_abs_params(usbtouch->input, ABS_Y, 0, 887 input_set_abs_params(usbtouch->input, ABS_Y,
874 2 * be16_to_cpu(packet->y_len), 0, 0); 888 0, usbtouch->type->max_yc, 0, 0);
875 } 889 }
876 /* 890 /*
877 * The device reports state of IR sensors on X and Y axes. 891 * The device reports state of IR sensors on X and Y axes.
@@ -881,22 +895,21 @@ static int nexio_read_data(struct usbtouch_usb *usbtouch, unsigned char *pkt)
881 * it's disabled (and untested) here as there's no X driver for that. 895 * it's disabled (and untested) here as there's no X driver for that.
882 */ 896 */
883 begin_x = end_x = begin_y = end_y = -1; 897 begin_x = end_x = begin_y = end_y = -1;
884 for (x = 0; x < be16_to_cpu(packet->x_len); x++) { 898 for (x = 0; x < x_len; x++) {
885 if (begin_x == -1 && packet->data[x] > NEXIO_THRESHOLD) { 899 if (begin_x == -1 && packet->data[x] > NEXIO_THRESHOLD) {
886 begin_x = x; 900 begin_x = x;
887 continue; 901 continue;
888 } 902 }
889 if (end_x == -1 && begin_x != -1 && packet->data[x] < NEXIO_THRESHOLD) { 903 if (end_x == -1 && begin_x != -1 && packet->data[x] < NEXIO_THRESHOLD) {
890 end_x = x - 1; 904 end_x = x - 1;
891 for (y = be16_to_cpu(packet->x_len); 905 for (y = x_len; y < data_len; y++) {
892 y < be16_to_cpu(packet->data_len); y++) {
893 if (begin_y == -1 && packet->data[y] > NEXIO_THRESHOLD) { 906 if (begin_y == -1 && packet->data[y] > NEXIO_THRESHOLD) {
894 begin_y = y - be16_to_cpu(packet->x_len); 907 begin_y = y - x_len;
895 continue; 908 continue;
896 } 909 }
897 if (end_y == -1 && 910 if (end_y == -1 &&
898 begin_y != -1 && packet->data[y] < NEXIO_THRESHOLD) { 911 begin_y != -1 && packet->data[y] < NEXIO_THRESHOLD) {
899 end_y = y - 1 - be16_to_cpu(packet->x_len); 912 end_y = y - 1 - x_len;
900 w = end_x - begin_x; 913 w = end_x - begin_x;
901 h = end_y - begin_y; 914 h = end_y - begin_y;
902#if 0 915#if 0
@@ -1104,14 +1117,14 @@ static struct usbtouch_device_info usbtouch_dev_info[] = {
1104 }, 1117 },
1105#endif 1118#endif
1106 1119
1107#ifdef CONFIG_TOUCHSCREEN_USB_ETT_TC5UH 1120#ifdef CONFIG_TOUCHSCREEN_USB_ETT_TC45USB
1108 [DEVTYPE_TC5UH] = { 1121 [DEVTYPE_TC45USB] = {
1109 .min_xc = 0x0, 1122 .min_xc = 0x0,
1110 .max_xc = 0x0fff, 1123 .max_xc = 0x0fff,
1111 .min_yc = 0x0, 1124 .min_yc = 0x0,
1112 .max_yc = 0x0fff, 1125 .max_yc = 0x0fff,
1113 .rept_size = 5, 1126 .rept_size = 5,
1114 .read_data = tc5uh_read_data, 1127 .read_data = tc45usb_read_data,
1115 }, 1128 },
1116#endif 1129#endif
1117 1130
@@ -1120,6 +1133,7 @@ static struct usbtouch_device_info usbtouch_dev_info[] = {
1120 .rept_size = 1024, 1133 .rept_size = 1024,
1121 .irq_always = true, 1134 .irq_always = true,
1122 .read_data = nexio_read_data, 1135 .read_data = nexio_read_data,
1136 .alloc = nexio_alloc,
1123 .init = nexio_init, 1137 .init = nexio_init,
1124 .exit = nexio_exit, 1138 .exit = nexio_exit,
1125 }, 1139 },
@@ -1263,6 +1277,7 @@ static void usbtouch_irq(struct urb *urb)
1263 usbtouch->type->process_pkt(usbtouch, usbtouch->data, urb->actual_length); 1277 usbtouch->type->process_pkt(usbtouch, usbtouch->data, urb->actual_length);
1264 1278
1265exit: 1279exit:
1280 usb_mark_last_busy(interface_to_usbdev(usbtouch->interface));
1266 retval = usb_submit_urb(urb, GFP_ATOMIC); 1281 retval = usb_submit_urb(urb, GFP_ATOMIC);
1267 if (retval) 1282 if (retval)
1268 err("%s - usb_submit_urb failed with result: %d", 1283 err("%s - usb_submit_urb failed with result: %d",
@@ -1272,25 +1287,89 @@ exit:
1272static int usbtouch_open(struct input_dev *input) 1287static int usbtouch_open(struct input_dev *input)
1273{ 1288{
1274 struct usbtouch_usb *usbtouch = input_get_drvdata(input); 1289 struct usbtouch_usb *usbtouch = input_get_drvdata(input);
1290 int r;
1275 1291
1276 usbtouch->irq->dev = interface_to_usbdev(usbtouch->interface); 1292 usbtouch->irq->dev = interface_to_usbdev(usbtouch->interface);
1277 1293
1294 r = usb_autopm_get_interface(usbtouch->interface) ? -EIO : 0;
1295 if (r < 0)
1296 goto out;
1297
1278 if (!usbtouch->type->irq_always) { 1298 if (!usbtouch->type->irq_always) {
1279 if (usb_submit_urb(usbtouch->irq, GFP_KERNEL)) 1299 if (usb_submit_urb(usbtouch->irq, GFP_KERNEL)) {
1280 return -EIO; 1300 r = -EIO;
1301 goto out_put;
1302 }
1281 } 1303 }
1282 1304
1283 return 0; 1305 usbtouch->interface->needs_remote_wakeup = 1;
1306out_put:
1307 usb_autopm_put_interface(usbtouch->interface);
1308out:
1309 return r;
1284} 1310}
1285 1311
1286static void usbtouch_close(struct input_dev *input) 1312static void usbtouch_close(struct input_dev *input)
1287{ 1313{
1288 struct usbtouch_usb *usbtouch = input_get_drvdata(input); 1314 struct usbtouch_usb *usbtouch = input_get_drvdata(input);
1315 int r;
1289 1316
1290 if (!usbtouch->type->irq_always) 1317 if (!usbtouch->type->irq_always)
1291 usb_kill_urb(usbtouch->irq); 1318 usb_kill_urb(usbtouch->irq);
1319 r = usb_autopm_get_interface(usbtouch->interface);
1320 usbtouch->interface->needs_remote_wakeup = 0;
1321 if (!r)
1322 usb_autopm_put_interface(usbtouch->interface);
1292} 1323}
1293 1324
1325static int usbtouch_suspend
1326(struct usb_interface *intf, pm_message_t message)
1327{
1328 struct usbtouch_usb *usbtouch = usb_get_intfdata(intf);
1329
1330 usb_kill_urb(usbtouch->irq);
1331
1332 return 0;
1333}
1334
1335static int usbtouch_resume(struct usb_interface *intf)
1336{
1337 struct usbtouch_usb *usbtouch = usb_get_intfdata(intf);
1338 struct input_dev *input = usbtouch->input;
1339 int result = 0;
1340
1341 mutex_lock(&input->mutex);
1342 if (input->users || usbtouch->type->irq_always)
1343 result = usb_submit_urb(usbtouch->irq, GFP_NOIO);
1344 mutex_unlock(&input->mutex);
1345
1346 return result;
1347}
1348
1349static int usbtouch_reset_resume(struct usb_interface *intf)
1350{
1351 struct usbtouch_usb *usbtouch = usb_get_intfdata(intf);
1352 struct input_dev *input = usbtouch->input;
1353 int err = 0;
1354
1355 /* reinit the device */
1356 if (usbtouch->type->init) {
1357 err = usbtouch->type->init(usbtouch);
1358 if (err) {
1359 dbg("%s - type->init() failed, err: %d",
1360 __func__, err);
1361 return err;
1362 }
1363 }
1364
1365 /* restart IO if needed */
1366 mutex_lock(&input->mutex);
1367 if (input->users)
1368 err = usb_submit_urb(usbtouch->irq, GFP_NOIO);
1369 mutex_unlock(&input->mutex);
1370
1371 return err;
1372}
1294 1373
1295static void usbtouch_free_buffers(struct usb_device *udev, 1374static void usbtouch_free_buffers(struct usb_device *udev,
1296 struct usbtouch_usb *usbtouch) 1375 struct usbtouch_usb *usbtouch)
@@ -1411,12 +1490,21 @@ static int usbtouch_probe(struct usb_interface *intf,
1411 usbtouch->irq->transfer_dma = usbtouch->data_dma; 1490 usbtouch->irq->transfer_dma = usbtouch->data_dma;
1412 usbtouch->irq->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; 1491 usbtouch->irq->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
1413 1492
1414 /* device specific init */ 1493 /* device specific allocations */
1494 if (type->alloc) {
1495 err = type->alloc(usbtouch);
1496 if (err) {
1497 dbg("%s - type->alloc() failed, err: %d", __func__, err);
1498 goto out_free_urb;
1499 }
1500 }
1501
1502 /* device specific initialisation*/
1415 if (type->init) { 1503 if (type->init) {
1416 err = type->init(usbtouch); 1504 err = type->init(usbtouch);
1417 if (err) { 1505 if (err) {
1418 dbg("%s - type->init() failed, err: %d", __func__, err); 1506 dbg("%s - type->init() failed, err: %d", __func__, err);
1419 goto out_free_urb; 1507 goto out_do_exit;
1420 } 1508 }
1421 } 1509 }
1422 1510
@@ -1429,8 +1517,11 @@ static int usbtouch_probe(struct usb_interface *intf,
1429 usb_set_intfdata(intf, usbtouch); 1517 usb_set_intfdata(intf, usbtouch);
1430 1518
1431 if (usbtouch->type->irq_always) { 1519 if (usbtouch->type->irq_always) {
1520 /* this can't fail */
1521 usb_autopm_get_interface(intf);
1432 err = usb_submit_urb(usbtouch->irq, GFP_KERNEL); 1522 err = usb_submit_urb(usbtouch->irq, GFP_KERNEL);
1433 if (err) { 1523 if (err) {
1524 usb_autopm_put_interface(intf);
1434 err("%s - usb_submit_urb failed with result: %d", 1525 err("%s - usb_submit_urb failed with result: %d",
1435 __func__, err); 1526 __func__, err);
1436 goto out_unregister_input; 1527 goto out_unregister_input;
@@ -1481,7 +1572,11 @@ static struct usb_driver usbtouch_driver = {
1481 .name = "usbtouchscreen", 1572 .name = "usbtouchscreen",
1482 .probe = usbtouch_probe, 1573 .probe = usbtouch_probe,
1483 .disconnect = usbtouch_disconnect, 1574 .disconnect = usbtouch_disconnect,
1575 .suspend = usbtouch_suspend,
1576 .resume = usbtouch_resume,
1577 .reset_resume = usbtouch_reset_resume,
1484 .id_table = usbtouch_devices, 1578 .id_table = usbtouch_devices,
1579 .supports_autosuspend = 1,
1485}; 1580};
1486 1581
1487static int __init usbtouch_init(void) 1582static int __init usbtouch_init(void)
diff --git a/drivers/input/touchscreen/w90p910_ts.c b/drivers/input/touchscreen/w90p910_ts.c
index cc18265be1a8..7a45d68c3516 100644
--- a/drivers/input/touchscreen/w90p910_ts.c
+++ b/drivers/input/touchscreen/w90p910_ts.c
@@ -233,7 +233,7 @@ static int __devinit w90x900ts_probe(struct platform_device *pdev)
233 w90p910_ts->state = TS_IDLE; 233 w90p910_ts->state = TS_IDLE;
234 spin_lock_init(&w90p910_ts->lock); 234 spin_lock_init(&w90p910_ts->lock);
235 setup_timer(&w90p910_ts->timer, w90p910_check_pen_up, 235 setup_timer(&w90p910_ts->timer, w90p910_check_pen_up,
236 (unsigned long)&w90p910_ts); 236 (unsigned long)w90p910_ts);
237 237
238 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 238 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
239 if (!res) { 239 if (!res) {
diff --git a/drivers/input/xen-kbdfront.c b/drivers/input/xen-kbdfront.c
index e14081675bb2..ebb11907d402 100644
--- a/drivers/input/xen-kbdfront.c
+++ b/drivers/input/xen-kbdfront.c
@@ -339,7 +339,7 @@ static struct xenbus_driver xenkbd_driver = {
339 339
340static int __init xenkbd_init(void) 340static int __init xenkbd_init(void)
341{ 341{
342 if (!xen_domain()) 342 if (!xen_pv_domain())
343 return -ENODEV; 343 return -ENODEV;
344 344
345 /* Nothing to do if running in dom0. */ 345 /* Nothing to do if running in dom0. */
diff --git a/drivers/isdn/capi/capi.c b/drivers/isdn/capi/capi.c
index 0cabe31f26df..f80a7c48a35f 100644
--- a/drivers/isdn/capi/capi.c
+++ b/drivers/isdn/capi/capi.c
@@ -20,7 +20,6 @@
20#include <linux/signal.h> 20#include <linux/signal.h>
21#include <linux/mutex.h> 21#include <linux/mutex.h>
22#include <linux/mm.h> 22#include <linux/mm.h>
23#include <linux/smp_lock.h>
24#include <linux/timer.h> 23#include <linux/timer.h>
25#include <linux/wait.h> 24#include <linux/wait.h>
26#include <linux/tty.h> 25#include <linux/tty.h>
@@ -50,6 +49,7 @@ MODULE_LICENSE("GPL");
50 49
51/* -------- driver information -------------------------------------- */ 50/* -------- driver information -------------------------------------- */
52 51
52static DEFINE_MUTEX(capi_mutex);
53static struct class *capi_class; 53static struct class *capi_class;
54static int capi_major = 68; /* allocated */ 54static int capi_major = 68; /* allocated */
55 55
@@ -691,7 +691,7 @@ unlock_out:
691static ssize_t 691static ssize_t
692capi_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) 692capi_read(struct file *file, char __user *buf, size_t count, loff_t *ppos)
693{ 693{
694 struct capidev *cdev = (struct capidev *)file->private_data; 694 struct capidev *cdev = file->private_data;
695 struct sk_buff *skb; 695 struct sk_buff *skb;
696 size_t copied; 696 size_t copied;
697 int err; 697 int err;
@@ -726,7 +726,7 @@ capi_read(struct file *file, char __user *buf, size_t count, loff_t *ppos)
726static ssize_t 726static ssize_t
727capi_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) 727capi_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
728{ 728{
729 struct capidev *cdev = (struct capidev *)file->private_data; 729 struct capidev *cdev = file->private_data;
730 struct sk_buff *skb; 730 struct sk_buff *skb;
731 u16 mlen; 731 u16 mlen;
732 732
@@ -773,7 +773,7 @@ capi_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos
773static unsigned int 773static unsigned int
774capi_poll(struct file *file, poll_table * wait) 774capi_poll(struct file *file, poll_table * wait)
775{ 775{
776 struct capidev *cdev = (struct capidev *)file->private_data; 776 struct capidev *cdev = file->private_data;
777 unsigned int mask = 0; 777 unsigned int mask = 0;
778 778
779 if (!cdev->ap.applid) 779 if (!cdev->ap.applid)
@@ -985,9 +985,9 @@ capi_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
985{ 985{
986 int ret; 986 int ret;
987 987
988 lock_kernel(); 988 mutex_lock(&capi_mutex);
989 ret = capi_ioctl(file, cmd, arg); 989 ret = capi_ioctl(file, cmd, arg);
990 unlock_kernel(); 990 mutex_unlock(&capi_mutex);
991 991
992 return ret; 992 return ret;
993} 993}
diff --git a/drivers/isdn/capi/capidrv.c b/drivers/isdn/capi/capidrv.c
index bf55ed5f38e3..2978bdaa6b88 100644
--- a/drivers/isdn/capi/capidrv.c
+++ b/drivers/isdn/capi/capidrv.c
@@ -1450,12 +1450,9 @@ static void handle_dtrace_data(capidrv_contr *card,
1450 } 1450 }
1451 1451
1452 for (p = data, end = data+len; p < end; p++) { 1452 for (p = data, end = data+len; p < end; p++) {
1453 u8 w;
1454 PUTBYTE_TO_STATUS(card, ' '); 1453 PUTBYTE_TO_STATUS(card, ' ');
1455 w = (*p >> 4) & 0xf; 1454 PUTBYTE_TO_STATUS(card, hex_asc_hi(*p));
1456 PUTBYTE_TO_STATUS(card, (w < 10) ? '0'+w : 'A'-10+w); 1455 PUTBYTE_TO_STATUS(card, hex_asc_lo(*p));
1457 w = *p & 0xf;
1458 PUTBYTE_TO_STATUS(card, (w < 10) ? '0'+w : 'A'-10+w);
1459 } 1456 }
1460 PUTBYTE_TO_STATUS(card, '\n'); 1457 PUTBYTE_TO_STATUS(card, '\n');
1461 1458
diff --git a/drivers/isdn/divert/divert_procfs.c b/drivers/isdn/divert/divert_procfs.c
index c53e2417e7d4..33ec9e467772 100644
--- a/drivers/isdn/divert/divert_procfs.c
+++ b/drivers/isdn/divert/divert_procfs.c
@@ -20,7 +20,7 @@
20#include <linux/sched.h> 20#include <linux/sched.h>
21#include <linux/isdnif.h> 21#include <linux/isdnif.h>
22#include <net/net_namespace.h> 22#include <net/net_namespace.h>
23#include <linux/smp_lock.h> 23#include <linux/mutex.h>
24#include "isdn_divert.h" 24#include "isdn_divert.h"
25 25
26 26
@@ -28,6 +28,7 @@
28/* Variables for interface queue */ 28/* Variables for interface queue */
29/*********************************/ 29/*********************************/
30ulong if_used = 0; /* number of interface users */ 30ulong if_used = 0; /* number of interface users */
31static DEFINE_MUTEX(isdn_divert_mutex);
31static struct divert_info *divert_info_head = NULL; /* head of queue */ 32static struct divert_info *divert_info_head = NULL; /* head of queue */
32static struct divert_info *divert_info_tail = NULL; /* pointer to last entry */ 33static struct divert_info *divert_info_tail = NULL; /* pointer to last entry */
33static DEFINE_SPINLOCK(divert_info_lock);/* lock for queue */ 34static DEFINE_SPINLOCK(divert_info_lock);/* lock for queue */
@@ -261,9 +262,9 @@ static long isdn_divert_ioctl(struct file *file, uint cmd, ulong arg)
261{ 262{
262 long ret; 263 long ret;
263 264
264 lock_kernel(); 265 mutex_lock(&isdn_divert_mutex);
265 ret = isdn_divert_ioctl_unlocked(file, cmd, arg); 266 ret = isdn_divert_ioctl_unlocked(file, cmd, arg);
266 unlock_kernel(); 267 mutex_unlock(&isdn_divert_mutex);
267 268
268 return ret; 269 return ret;
269} 270}
diff --git a/drivers/isdn/gigaset/Kconfig b/drivers/isdn/gigaset/Kconfig
index dcefedc7044a..b18a92c32184 100644
--- a/drivers/isdn/gigaset/Kconfig
+++ b/drivers/isdn/gigaset/Kconfig
@@ -17,8 +17,7 @@ menuconfig ISDN_DRV_GIGASET
17if ISDN_DRV_GIGASET 17if ISDN_DRV_GIGASET
18 18
19config GIGASET_CAPI 19config GIGASET_CAPI
20 bool "Gigaset CAPI support (EXPERIMENTAL)" 20 bool "Gigaset CAPI support"
21 depends on EXPERIMENTAL
22 depends on ISDN_CAPI='y'||(ISDN_CAPI='m'&&ISDN_DRV_GIGASET='m') 21 depends on ISDN_CAPI='y'||(ISDN_CAPI='m'&&ISDN_DRV_GIGASET='m')
23 default ISDN_I4L='n' 22 default ISDN_I4L='n'
24 help 23 help
@@ -27,6 +26,7 @@ config GIGASET_CAPI
27 subsystem you'll have to enable the capidrv glue driver. 26 subsystem you'll have to enable the capidrv glue driver.
28 (select ISDN_CAPI_CAPIDRV.) 27 (select ISDN_CAPI_CAPIDRV.)
29 Say N to build the old native ISDN4Linux variant. 28 Say N to build the old native ISDN4Linux variant.
29 If unsure, say Y.
30 30
31config GIGASET_I4L 31config GIGASET_I4L
32 bool 32 bool
diff --git a/drivers/isdn/gigaset/bas-gigaset.c b/drivers/isdn/gigaset/bas-gigaset.c
index 47a5ffec55a3..0ded3640b926 100644
--- a/drivers/isdn/gigaset/bas-gigaset.c
+++ b/drivers/isdn/gigaset/bas-gigaset.c
@@ -1188,24 +1188,6 @@ static void write_iso_tasklet(unsigned long data)
1188 break; 1188 break;
1189 } 1189 }
1190 } 1190 }
1191#ifdef CONFIG_GIGASET_DEBUG
1192 /* check assumption on remaining frames */
1193 for (; i < BAS_NUMFRAMES; i++) {
1194 ifd = &urb->iso_frame_desc[i];
1195 if (ifd->status != -EINPROGRESS
1196 || ifd->actual_length != 0) {
1197 dev_warn(cs->dev,
1198 "isochronous write: frame %d: %s, "
1199 "%d of %d bytes sent\n",
1200 i, get_usb_statmsg(ifd->status),
1201 ifd->actual_length, ifd->length);
1202 offset = (ifd->offset +
1203 ifd->actual_length)
1204 % BAS_OUTBUFSIZE;
1205 break;
1206 }
1207 }
1208#endif
1209 break; 1191 break;
1210 case -EPIPE: /* stall - probably underrun */ 1192 case -EPIPE: /* stall - probably underrun */
1211 dev_err(cs->dev, "isochronous write stalled\n"); 1193 dev_err(cs->dev, "isochronous write stalled\n");
@@ -1913,65 +1895,41 @@ static int start_cbsend(struct cardstate *cs)
1913 * USB transmission is started if necessary. 1895 * USB transmission is started if necessary.
1914 * parameters: 1896 * parameters:
1915 * cs controller state structure 1897 * cs controller state structure
1916 * buf command string to send 1898 * cb command buffer structure
1917 * len number of bytes to send (max. IF_WRITEBUF)
1918 * wake_tasklet tasklet to run when transmission is completed
1919 * (NULL if none)
1920 * return value: 1899 * return value:
1921 * number of bytes queued on success 1900 * number of bytes queued on success
1922 * error code < 0 on error 1901 * error code < 0 on error
1923 */ 1902 */
1924static int gigaset_write_cmd(struct cardstate *cs, 1903static int gigaset_write_cmd(struct cardstate *cs, struct cmdbuf_t *cb)
1925 const unsigned char *buf, int len,
1926 struct tasklet_struct *wake_tasklet)
1927{ 1904{
1928 struct cmdbuf_t *cb;
1929 unsigned long flags; 1905 unsigned long flags;
1930 int rc; 1906 int rc;
1931 1907
1932 gigaset_dbg_buffer(cs->mstate != MS_LOCKED ? 1908 gigaset_dbg_buffer(cs->mstate != MS_LOCKED ?
1933 DEBUG_TRANSCMD : DEBUG_LOCKCMD, 1909 DEBUG_TRANSCMD : DEBUG_LOCKCMD,
1934 "CMD Transmit", len, buf); 1910 "CMD Transmit", cb->len, cb->buf);
1935
1936 if (len <= 0) {
1937 /* nothing to do */
1938 rc = 0;
1939 goto notqueued;
1940 }
1941 1911
1942 /* translate "+++" escape sequence sent as a single separate command 1912 /* translate "+++" escape sequence sent as a single separate command
1943 * into "close AT channel" command for error recovery 1913 * into "close AT channel" command for error recovery
1944 * The next command will reopen the AT channel automatically. 1914 * The next command will reopen the AT channel automatically.
1945 */ 1915 */
1946 if (len == 3 && !memcmp(buf, "+++", 3)) { 1916 if (cb->len == 3 && !memcmp(cb->buf, "+++", 3)) {
1917 kfree(cb);
1947 rc = req_submit(cs->bcs, HD_CLOSE_ATCHANNEL, 0, BAS_TIMEOUT); 1918 rc = req_submit(cs->bcs, HD_CLOSE_ATCHANNEL, 0, BAS_TIMEOUT);
1948 goto notqueued; 1919 if (cb->wake_tasklet)
1920 tasklet_schedule(cb->wake_tasklet);
1921 return rc < 0 ? rc : cb->len;
1949 } 1922 }
1950 1923
1951 if (len > IF_WRITEBUF)
1952 len = IF_WRITEBUF;
1953 cb = kmalloc(sizeof(struct cmdbuf_t) + len, GFP_ATOMIC);
1954 if (!cb) {
1955 dev_err(cs->dev, "%s: out of memory\n", __func__);
1956 rc = -ENOMEM;
1957 goto notqueued;
1958 }
1959
1960 memcpy(cb->buf, buf, len);
1961 cb->len = len;
1962 cb->offset = 0;
1963 cb->next = NULL;
1964 cb->wake_tasklet = wake_tasklet;
1965
1966 spin_lock_irqsave(&cs->cmdlock, flags); 1924 spin_lock_irqsave(&cs->cmdlock, flags);
1967 cb->prev = cs->lastcmdbuf; 1925 cb->prev = cs->lastcmdbuf;
1968 if (cs->lastcmdbuf) 1926 if (cs->lastcmdbuf)
1969 cs->lastcmdbuf->next = cb; 1927 cs->lastcmdbuf->next = cb;
1970 else { 1928 else {
1971 cs->cmdbuf = cb; 1929 cs->cmdbuf = cb;
1972 cs->curlen = len; 1930 cs->curlen = cb->len;
1973 } 1931 }
1974 cs->cmdbytes += len; 1932 cs->cmdbytes += cb->len;
1975 cs->lastcmdbuf = cb; 1933 cs->lastcmdbuf = cb;
1976 spin_unlock_irqrestore(&cs->cmdlock, flags); 1934 spin_unlock_irqrestore(&cs->cmdlock, flags);
1977 1935
@@ -1988,12 +1946,7 @@ static int gigaset_write_cmd(struct cardstate *cs,
1988 } 1946 }
1989 rc = start_cbsend(cs); 1947 rc = start_cbsend(cs);
1990 spin_unlock_irqrestore(&cs->lock, flags); 1948 spin_unlock_irqrestore(&cs->lock, flags);
1991 return rc < 0 ? rc : len; 1949 return rc < 0 ? rc : cb->len;
1992
1993notqueued: /* request handled without queuing */
1994 if (wake_tasklet)
1995 tasklet_schedule(wake_tasklet);
1996 return rc;
1997} 1950}
1998 1951
1999/* gigaset_write_room 1952/* gigaset_write_room
diff --git a/drivers/isdn/gigaset/capi.c b/drivers/isdn/gigaset/capi.c
index 6fbe8999c419..e5ea344a551a 100644
--- a/drivers/isdn/gigaset/capi.c
+++ b/drivers/isdn/gigaset/capi.c
@@ -45,6 +45,7 @@
45#define CAPI_FACILITY_LI 0x0005 45#define CAPI_FACILITY_LI 0x0005
46 46
47#define CAPI_SUPPSVC_GETSUPPORTED 0x0000 47#define CAPI_SUPPSVC_GETSUPPORTED 0x0000
48#define CAPI_SUPPSVC_LISTEN 0x0001
48 49
49/* missing from capiutil.h */ 50/* missing from capiutil.h */
50#define CAPIMSG_PLCI_PART(m) CAPIMSG_U8(m, 9) 51#define CAPIMSG_PLCI_PART(m) CAPIMSG_U8(m, 9)
@@ -270,9 +271,13 @@ static inline void dump_rawmsg(enum debuglevel level, const char *tag,
270 kfree(dbgline); 271 kfree(dbgline);
271 if (CAPIMSG_COMMAND(data) == CAPI_DATA_B3 && 272 if (CAPIMSG_COMMAND(data) == CAPI_DATA_B3 &&
272 (CAPIMSG_SUBCOMMAND(data) == CAPI_REQ || 273 (CAPIMSG_SUBCOMMAND(data) == CAPI_REQ ||
273 CAPIMSG_SUBCOMMAND(data) == CAPI_IND) && 274 CAPIMSG_SUBCOMMAND(data) == CAPI_IND)) {
274 CAPIMSG_DATALEN(data) > 0) {
275 l = CAPIMSG_DATALEN(data); 275 l = CAPIMSG_DATALEN(data);
276 gig_dbg(level, " DataLength=%d", l);
277 if (l <= 0 || !(gigaset_debuglevel & DEBUG_LLDATA))
278 return;
279 if (l > 64)
280 l = 64; /* arbitrary limit */
276 dbgline = kmalloc(3*l, GFP_ATOMIC); 281 dbgline = kmalloc(3*l, GFP_ATOMIC);
277 if (!dbgline) 282 if (!dbgline)
278 return; 283 return;
@@ -378,13 +383,13 @@ void gigaset_skb_sent(struct bc_state *bcs, struct sk_buff *dskb)
378 ++bcs->trans_up; 383 ++bcs->trans_up;
379 384
380 if (!ap) { 385 if (!ap) {
381 dev_err(cs->dev, "%s: no application\n", __func__); 386 gig_dbg(DEBUG_MCMD, "%s: application gone", __func__);
382 return; 387 return;
383 } 388 }
384 389
385 /* don't send further B3 messages if disconnected */ 390 /* don't send further B3 messages if disconnected */
386 if (bcs->apconnstate < APCONN_ACTIVE) { 391 if (bcs->apconnstate < APCONN_ACTIVE) {
387 gig_dbg(DEBUG_LLDATA, "disconnected, discarding ack"); 392 gig_dbg(DEBUG_MCMD, "%s: disconnected", __func__);
388 return; 393 return;
389 } 394 }
390 395
@@ -422,13 +427,14 @@ void gigaset_skb_rcvd(struct bc_state *bcs, struct sk_buff *skb)
422 bcs->trans_down++; 427 bcs->trans_down++;
423 428
424 if (!ap) { 429 if (!ap) {
425 dev_err(cs->dev, "%s: no application\n", __func__); 430 gig_dbg(DEBUG_MCMD, "%s: application gone", __func__);
431 dev_kfree_skb_any(skb);
426 return; 432 return;
427 } 433 }
428 434
429 /* don't send further B3 messages if disconnected */ 435 /* don't send further B3 messages if disconnected */
430 if (bcs->apconnstate < APCONN_ACTIVE) { 436 if (bcs->apconnstate < APCONN_ACTIVE) {
431 gig_dbg(DEBUG_LLDATA, "disconnected, discarding data"); 437 gig_dbg(DEBUG_MCMD, "%s: disconnected", __func__);
432 dev_kfree_skb_any(skb); 438 dev_kfree_skb_any(skb);
433 return; 439 return;
434 } 440 }
@@ -454,7 +460,7 @@ void gigaset_skb_rcvd(struct bc_state *bcs, struct sk_buff *skb)
454 /* Data64 parameter not present */ 460 /* Data64 parameter not present */
455 461
456 /* emit message */ 462 /* emit message */
457 dump_rawmsg(DEBUG_LLDATA, "DATA_B3_IND", skb->data); 463 dump_rawmsg(DEBUG_MCMD, __func__, skb->data);
458 capi_ctr_handle_message(&iif->ctr, ap->id, skb); 464 capi_ctr_handle_message(&iif->ctr, ap->id, skb);
459} 465}
460EXPORT_SYMBOL_GPL(gigaset_skb_rcvd); 466EXPORT_SYMBOL_GPL(gigaset_skb_rcvd);
@@ -747,7 +753,7 @@ void gigaset_isdn_connD(struct bc_state *bcs)
747 ap = bcs->ap; 753 ap = bcs->ap;
748 if (!ap) { 754 if (!ap) {
749 spin_unlock_irqrestore(&bcs->aplock, flags); 755 spin_unlock_irqrestore(&bcs->aplock, flags);
750 dev_err(cs->dev, "%s: no application\n", __func__); 756 gig_dbg(DEBUG_CMD, "%s: application gone", __func__);
751 return; 757 return;
752 } 758 }
753 if (bcs->apconnstate == APCONN_NONE) { 759 if (bcs->apconnstate == APCONN_NONE) {
@@ -843,7 +849,7 @@ void gigaset_isdn_connB(struct bc_state *bcs)
843 ap = bcs->ap; 849 ap = bcs->ap;
844 if (!ap) { 850 if (!ap) {
845 spin_unlock_irqrestore(&bcs->aplock, flags); 851 spin_unlock_irqrestore(&bcs->aplock, flags);
846 dev_err(cs->dev, "%s: no application\n", __func__); 852 gig_dbg(DEBUG_CMD, "%s: application gone", __func__);
847 return; 853 return;
848 } 854 }
849 if (!bcs->apconnstate) { 855 if (!bcs->apconnstate) {
@@ -901,13 +907,12 @@ void gigaset_isdn_connB(struct bc_state *bcs)
901 */ 907 */
902void gigaset_isdn_hupB(struct bc_state *bcs) 908void gigaset_isdn_hupB(struct bc_state *bcs)
903{ 909{
904 struct cardstate *cs = bcs->cs;
905 struct gigaset_capi_appl *ap = bcs->ap; 910 struct gigaset_capi_appl *ap = bcs->ap;
906 911
907 /* ToDo: assure order of DISCONNECT_B3_IND and DISCONNECT_IND ? */ 912 /* ToDo: assure order of DISCONNECT_B3_IND and DISCONNECT_IND ? */
908 913
909 if (!ap) { 914 if (!ap) {
910 dev_err(cs->dev, "%s: no application\n", __func__); 915 gig_dbg(DEBUG_CMD, "%s: application gone", __func__);
911 return; 916 return;
912 } 917 }
913 918
@@ -978,6 +983,9 @@ static void gigaset_register_appl(struct capi_ctr *ctr, u16 appl,
978 struct cardstate *cs = ctr->driverdata; 983 struct cardstate *cs = ctr->driverdata;
979 struct gigaset_capi_appl *ap; 984 struct gigaset_capi_appl *ap;
980 985
986 gig_dbg(DEBUG_CMD, "%s [%u] l3cnt=%u blkcnt=%u blklen=%u",
987 __func__, appl, rp->level3cnt, rp->datablkcnt, rp->datablklen);
988
981 list_for_each_entry(ap, &iif->appls, ctrlist) 989 list_for_each_entry(ap, &iif->appls, ctrlist)
982 if (ap->id == appl) { 990 if (ap->id == appl) {
983 dev_notice(cs->dev, 991 dev_notice(cs->dev,
@@ -1062,6 +1070,8 @@ static void gigaset_release_appl(struct capi_ctr *ctr, u16 appl)
1062 struct gigaset_capi_appl *ap, *tmp; 1070 struct gigaset_capi_appl *ap, *tmp;
1063 unsigned ch; 1071 unsigned ch;
1064 1072
1073 gig_dbg(DEBUG_CMD, "%s [%u]", __func__, appl);
1074
1065 list_for_each_entry_safe(ap, tmp, &iif->appls, ctrlist) 1075 list_for_each_entry_safe(ap, tmp, &iif->appls, ctrlist)
1066 if (ap->id == appl) { 1076 if (ap->id == appl) {
1067 /* remove from any channels */ 1077 /* remove from any channels */
@@ -1142,7 +1152,7 @@ static void do_facility_req(struct gigaset_capi_ctr *iif,
1142 case CAPI_FACILITY_SUPPSVC: 1152 case CAPI_FACILITY_SUPPSVC:
1143 /* decode Function parameter */ 1153 /* decode Function parameter */
1144 pparam = cmsg->FacilityRequestParameter; 1154 pparam = cmsg->FacilityRequestParameter;
1145 if (pparam == NULL || *pparam < 2) { 1155 if (pparam == NULL || pparam[0] < 2) {
1146 dev_notice(cs->dev, "%s: %s missing\n", "FACILITY_REQ", 1156 dev_notice(cs->dev, "%s: %s missing\n", "FACILITY_REQ",
1147 "Facility Request Parameter"); 1157 "Facility Request Parameter");
1148 send_conf(iif, ap, skb, CapiIllMessageParmCoding); 1158 send_conf(iif, ap, skb, CapiIllMessageParmCoding);
@@ -1159,8 +1169,32 @@ static void do_facility_req(struct gigaset_capi_ctr *iif,
1159 /* Supported Services: none */ 1169 /* Supported Services: none */
1160 capimsg_setu32(confparam, 6, 0); 1170 capimsg_setu32(confparam, 6, 0);
1161 break; 1171 break;
1172 case CAPI_SUPPSVC_LISTEN:
1173 if (pparam[0] < 7 || pparam[3] < 4) {
1174 dev_notice(cs->dev, "%s: %s missing\n",
1175 "FACILITY_REQ", "Notification Mask");
1176 send_conf(iif, ap, skb,
1177 CapiIllMessageParmCoding);
1178 return;
1179 }
1180 if (CAPIMSG_U32(pparam, 4) != 0) {
1181 dev_notice(cs->dev,
1182 "%s: unsupported supplementary service notification mask 0x%x\n",
1183 "FACILITY_REQ", CAPIMSG_U32(pparam, 4));
1184 info = CapiFacilitySpecificFunctionNotSupported;
1185 confparam[3] = 2; /* length */
1186 capimsg_setu16(confparam, 4,
1187 CapiSupplementaryServiceNotSupported);
1188 }
1189 info = CapiSuccess;
1190 confparam[3] = 2; /* length */
1191 capimsg_setu16(confparam, 4, CapiSuccess);
1192 break;
1162 /* ToDo: add supported services */ 1193 /* ToDo: add supported services */
1163 default: 1194 default:
1195 dev_notice(cs->dev,
1196 "%s: unsupported supplementary service function 0x%04x\n",
1197 "FACILITY_REQ", function);
1164 info = CapiFacilitySpecificFunctionNotSupported; 1198 info = CapiFacilitySpecificFunctionNotSupported;
1165 /* Supplementary Service specific parameter */ 1199 /* Supplementary Service specific parameter */
1166 confparam[3] = 2; /* length */ 1200 confparam[3] = 2; /* length */
@@ -1951,11 +1985,7 @@ static void do_data_b3_req(struct gigaset_capi_ctr *iif,
1951 u16 handle = CAPIMSG_HANDLE_REQ(skb->data); 1985 u16 handle = CAPIMSG_HANDLE_REQ(skb->data);
1952 1986
1953 /* frequent message, avoid _cmsg overhead */ 1987 /* frequent message, avoid _cmsg overhead */
1954 dump_rawmsg(DEBUG_LLDATA, "DATA_B3_REQ", skb->data); 1988 dump_rawmsg(DEBUG_MCMD, __func__, skb->data);
1955
1956 gig_dbg(DEBUG_LLDATA,
1957 "Receiving data from LL (ch: %d, flg: %x, sz: %d|%d)",
1958 channel, flags, msglen, datalen);
1959 1989
1960 /* check parameters */ 1990 /* check parameters */
1961 if (channel == 0 || channel > cs->channels || ncci != 1) { 1991 if (channel == 0 || channel > cs->channels || ncci != 1) {
@@ -2064,7 +2094,7 @@ static void do_data_b3_resp(struct gigaset_capi_ctr *iif,
2064 struct gigaset_capi_appl *ap, 2094 struct gigaset_capi_appl *ap,
2065 struct sk_buff *skb) 2095 struct sk_buff *skb)
2066{ 2096{
2067 dump_rawmsg(DEBUG_LLDATA, __func__, skb->data); 2097 dump_rawmsg(DEBUG_MCMD, __func__, skb->data);
2068 dev_kfree_skb_any(skb); 2098 dev_kfree_skb_any(skb);
2069} 2099}
2070 2100
diff --git a/drivers/isdn/gigaset/common.c b/drivers/isdn/gigaset/common.c
index 5d4befb81057..3ca561eccd9f 100644
--- a/drivers/isdn/gigaset/common.c
+++ b/drivers/isdn/gigaset/common.c
@@ -791,8 +791,6 @@ struct cardstate *gigaset_initcs(struct gigaset_driver *drv, int channels,
791 spin_unlock_irqrestore(&cs->lock, flags); 791 spin_unlock_irqrestore(&cs->lock, flags);
792 setup_timer(&cs->timer, timer_tick, (unsigned long) cs); 792 setup_timer(&cs->timer, timer_tick, (unsigned long) cs);
793 cs->timer.expires = jiffies + msecs_to_jiffies(GIG_TICK); 793 cs->timer.expires = jiffies + msecs_to_jiffies(GIG_TICK);
794 /* FIXME: can jiffies increase too much until the timer is added?
795 * Same problem(?) with mod_timer() in timer_tick(). */
796 add_timer(&cs->timer); 794 add_timer(&cs->timer);
797 795
798 gig_dbg(DEBUG_INIT, "cs initialized"); 796 gig_dbg(DEBUG_INIT, "cs initialized");
diff --git a/drivers/isdn/gigaset/ev-layer.c b/drivers/isdn/gigaset/ev-layer.c
index ceaef9a04a42..a14187605f5e 100644
--- a/drivers/isdn/gigaset/ev-layer.c
+++ b/drivers/isdn/gigaset/ev-layer.c
@@ -35,53 +35,40 @@
35#define RT_RING 2 35#define RT_RING 2
36#define RT_NUMBER 3 36#define RT_NUMBER 3
37#define RT_STRING 4 37#define RT_STRING 4
38#define RT_HEX 5
39#define RT_ZCAU 6 38#define RT_ZCAU 6
40 39
41/* Possible ASCII responses */ 40/* Possible ASCII responses */
42#define RSP_OK 0 41#define RSP_OK 0
43#define RSP_BUSY 1 42#define RSP_ERROR 1
44#define RSP_CONNECT 2
45#define RSP_ZGCI 3 43#define RSP_ZGCI 3
46#define RSP_RING 4 44#define RSP_RING 4
47#define RSP_ZAOC 5 45#define RSP_ZVLS 5
48#define RSP_ZCSTR 6 46#define RSP_ZCAU 6
49#define RSP_ZCFGT 7 47
50#define RSP_ZCFG 8 48/* responses with values to store in at_state */
51#define RSP_ZCCR 9 49/* - numeric */
52#define RSP_EMPTY 10
53#define RSP_ZLOG 11
54#define RSP_ZCAU 12
55#define RSP_ZMWI 13
56#define RSP_ZABINFO 14
57#define RSP_ZSMLSTCHG 15
58#define RSP_VAR 100 50#define RSP_VAR 100
59#define RSP_ZSAU (RSP_VAR + VAR_ZSAU) 51#define RSP_ZSAU (RSP_VAR + VAR_ZSAU)
60#define RSP_ZDLE (RSP_VAR + VAR_ZDLE) 52#define RSP_ZDLE (RSP_VAR + VAR_ZDLE)
61#define RSP_ZVLS (RSP_VAR + VAR_ZVLS)
62#define RSP_ZCTP (RSP_VAR + VAR_ZCTP) 53#define RSP_ZCTP (RSP_VAR + VAR_ZCTP)
54/* - string */
63#define RSP_STR (RSP_VAR + VAR_NUM) 55#define RSP_STR (RSP_VAR + VAR_NUM)
64#define RSP_NMBR (RSP_STR + STR_NMBR) 56#define RSP_NMBR (RSP_STR + STR_NMBR)
65#define RSP_ZCPN (RSP_STR + STR_ZCPN) 57#define RSP_ZCPN (RSP_STR + STR_ZCPN)
66#define RSP_ZCON (RSP_STR + STR_ZCON) 58#define RSP_ZCON (RSP_STR + STR_ZCON)
67#define RSP_ZBC (RSP_STR + STR_ZBC) 59#define RSP_ZBC (RSP_STR + STR_ZBC)
68#define RSP_ZHLC (RSP_STR + STR_ZHLC) 60#define RSP_ZHLC (RSP_STR + STR_ZHLC)
69#define RSP_ERROR -1 /* ERROR */ 61
70#define RSP_WRONG_CID -2 /* unknown cid in cmd */ 62#define RSP_WRONG_CID -2 /* unknown cid in cmd */
71#define RSP_UNKNOWN -4 /* unknown response */
72#define RSP_FAIL -5 /* internal error */
73#define RSP_INVAL -6 /* invalid response */ 63#define RSP_INVAL -6 /* invalid response */
64#define RSP_NODEV -9 /* device not connected */
74 65
75#define RSP_NONE -19 66#define RSP_NONE -19
76#define RSP_STRING -20 67#define RSP_STRING -20
77#define RSP_NULL -21 68#define RSP_NULL -21
78#define RSP_RETRYFAIL -22
79#define RSP_RETRY -23
80#define RSP_SKIP -24
81#define RSP_INIT -27 69#define RSP_INIT -27
82#define RSP_ANY -26 70#define RSP_ANY -26
83#define RSP_LAST -28 71#define RSP_LAST -28
84#define RSP_NODEV -9
85 72
86/* actions for process_response */ 73/* actions for process_response */
87#define ACT_NOTHING 0 74#define ACT_NOTHING 0
@@ -259,13 +246,6 @@ struct reply_t gigaset_tab_nocid[] =
259 246
260/* misc. */ 247/* misc. */
261{RSP_ERROR, -1, -1, -1, -1, -1, {ACT_ERROR} }, 248{RSP_ERROR, -1, -1, -1, -1, -1, {ACT_ERROR} },
262{RSP_ZCFGT, -1, -1, -1, -1, -1, {ACT_DEBUG} },
263{RSP_ZCFG, -1, -1, -1, -1, -1, {ACT_DEBUG} },
264{RSP_ZLOG, -1, -1, -1, -1, -1, {ACT_DEBUG} },
265{RSP_ZMWI, -1, -1, -1, -1, -1, {ACT_DEBUG} },
266{RSP_ZABINFO, -1, -1, -1, -1, -1, {ACT_DEBUG} },
267{RSP_ZSMLSTCHG, -1, -1, -1, -1, -1, {ACT_DEBUG} },
268
269{RSP_ZCAU, -1, -1, -1, -1, -1, {ACT_ZCAU} }, 249{RSP_ZCAU, -1, -1, -1, -1, -1, {ACT_ZCAU} },
270{RSP_NONE, -1, -1, -1, -1, -1, {ACT_DEBUG} }, 250{RSP_NONE, -1, -1, -1, -1, -1, {ACT_DEBUG} },
271{RSP_ANY, -1, -1, -1, -1, -1, {ACT_WARN} }, 251{RSP_ANY, -1, -1, -1, -1, -1, {ACT_WARN} },
@@ -361,10 +341,6 @@ struct reply_t gigaset_tab_cid[] =
361 341
362/* misc. */ 342/* misc. */
363{RSP_ZCON, -1, -1, -1, -1, -1, {ACT_DEBUG} }, 343{RSP_ZCON, -1, -1, -1, -1, -1, {ACT_DEBUG} },
364{RSP_ZCCR, -1, -1, -1, -1, -1, {ACT_DEBUG} },
365{RSP_ZAOC, -1, -1, -1, -1, -1, {ACT_DEBUG} },
366{RSP_ZCSTR, -1, -1, -1, -1, -1, {ACT_DEBUG} },
367
368{RSP_ZCAU, -1, -1, -1, -1, -1, {ACT_ZCAU} }, 344{RSP_ZCAU, -1, -1, -1, -1, -1, {ACT_ZCAU} },
369{RSP_NONE, -1, -1, -1, -1, -1, {ACT_DEBUG} }, 345{RSP_NONE, -1, -1, -1, -1, -1, {ACT_DEBUG} },
370{RSP_ANY, -1, -1, -1, -1, -1, {ACT_WARN} }, 346{RSP_ANY, -1, -1, -1, -1, -1, {ACT_WARN} },
@@ -387,20 +363,11 @@ static const struct resp_type_t {
387 {"ZVLS", RSP_ZVLS, RT_NUMBER}, 363 {"ZVLS", RSP_ZVLS, RT_NUMBER},
388 {"ZCTP", RSP_ZCTP, RT_NUMBER}, 364 {"ZCTP", RSP_ZCTP, RT_NUMBER},
389 {"ZDLE", RSP_ZDLE, RT_NUMBER}, 365 {"ZDLE", RSP_ZDLE, RT_NUMBER},
390 {"ZCFGT", RSP_ZCFGT, RT_NUMBER},
391 {"ZCCR", RSP_ZCCR, RT_NUMBER},
392 {"ZMWI", RSP_ZMWI, RT_NUMBER},
393 {"ZHLC", RSP_ZHLC, RT_STRING}, 366 {"ZHLC", RSP_ZHLC, RT_STRING},
394 {"ZBC", RSP_ZBC, RT_STRING}, 367 {"ZBC", RSP_ZBC, RT_STRING},
395 {"NMBR", RSP_NMBR, RT_STRING}, 368 {"NMBR", RSP_NMBR, RT_STRING},
396 {"ZCPN", RSP_ZCPN, RT_STRING}, 369 {"ZCPN", RSP_ZCPN, RT_STRING},
397 {"ZCON", RSP_ZCON, RT_STRING}, 370 {"ZCON", RSP_ZCON, RT_STRING},
398 {"ZAOC", RSP_ZAOC, RT_STRING},
399 {"ZCSTR", RSP_ZCSTR, RT_STRING},
400 {"ZCFG", RSP_ZCFG, RT_HEX},
401 {"ZLOG", RSP_ZLOG, RT_NOTHING},
402 {"ZABINFO", RSP_ZABINFO, RT_NOTHING},
403 {"ZSMLSTCHG", RSP_ZSMLSTCHG, RT_NOTHING},
404 {NULL, 0, 0} 371 {NULL, 0, 0}
405}; 372};
406 373
@@ -418,64 +385,18 @@ static const struct zsau_resp_t {
418 {NULL, ZSAU_UNKNOWN} 385 {NULL, ZSAU_UNKNOWN}
419}; 386};
420 387
421/*
422 * Get integer from char-pointer
423 */
424static int isdn_getnum(char *p)
425{
426 int v = -1;
427
428 gig_dbg(DEBUG_EVENT, "string: %s", p);
429
430 while (*p >= '0' && *p <= '9')
431 v = ((v < 0) ? 0 : (v * 10)) + (int) ((*p++) - '0');
432 if (*p)
433 v = -1; /* invalid Character */
434 return v;
435}
436
437/*
438 * Get integer from char-pointer
439 */
440static int isdn_gethex(char *p)
441{
442 int v = 0;
443 int c;
444
445 gig_dbg(DEBUG_EVENT, "string: %s", p);
446
447 if (!*p)
448 return -1;
449
450 do {
451 if (v > (INT_MAX - 15) / 16)
452 return -1;
453 c = *p;
454 if (c >= '0' && c <= '9')
455 c -= '0';
456 else if (c >= 'a' && c <= 'f')
457 c -= 'a' - 10;
458 else if (c >= 'A' && c <= 'F')
459 c -= 'A' - 10;
460 else
461 return -1;
462 v = v * 16 + c;
463 } while (*++p);
464
465 return v;
466}
467
468/* retrieve CID from parsed response 388/* retrieve CID from parsed response
469 * returns 0 if no CID, -1 if invalid CID, or CID value 1..65535 389 * returns 0 if no CID, -1 if invalid CID, or CID value 1..65535
470 */ 390 */
471static int cid_of_response(char *s) 391static int cid_of_response(char *s)
472{ 392{
473 int cid; 393 unsigned long cid;
394 int rc;
474 395
475 if (s[-1] != ';') 396 if (s[-1] != ';')
476 return 0; /* no CID separator */ 397 return 0; /* no CID separator */
477 cid = isdn_getnum(s); 398 rc = strict_strtoul(s, 10, &cid);
478 if (cid < 0) 399 if (rc)
479 return 0; /* CID not numeric */ 400 return 0; /* CID not numeric */
480 if (cid < 1 || cid > 65535) 401 if (cid < 1 || cid > 65535)
481 return -1; /* CID out of range */ 402 return -1; /* CID out of range */
@@ -588,10 +509,10 @@ void gigaset_handle_modem_response(struct cardstate *cs)
588 break; 509 break;
589 510
590 if (!rt->response) { 511 if (!rt->response) {
591 event->type = RSP_UNKNOWN; 512 event->type = RSP_NONE;
592 dev_warn(cs->dev, 513 gig_dbg(DEBUG_EVENT,
593 "unknown modem response: %s\n", 514 "unknown modem response: '%s'\n",
594 argv[curarg]); 515 argv[curarg]);
595 break; 516 break;
596 } 517 }
597 518
@@ -645,27 +566,27 @@ void gigaset_handle_modem_response(struct cardstate *cs)
645 case RT_ZCAU: 566 case RT_ZCAU:
646 event->parameter = -1; 567 event->parameter = -1;
647 if (curarg + 1 < params) { 568 if (curarg + 1 < params) {
648 i = isdn_gethex(argv[curarg]); 569 unsigned long type, value;
649 j = isdn_gethex(argv[curarg + 1]); 570
650 if (i >= 0 && i < 256 && j >= 0 && j < 256) 571 i = strict_strtoul(argv[curarg++], 16, &type);
651 event->parameter = (unsigned) i << 8 572 j = strict_strtoul(argv[curarg++], 16, &value);
652 | j; 573
653 curarg += 2; 574 if (i == 0 && type < 256 &&
575 j == 0 && value < 256)
576 event->parameter = (type << 8) | value;
654 } else 577 } else
655 curarg = params - 1; 578 curarg = params - 1;
656 break; 579 break;
657 case RT_NUMBER: 580 case RT_NUMBER:
658 case RT_HEX: 581 event->parameter = -1;
659 if (curarg < params) { 582 if (curarg < params) {
660 if (param_type == RT_HEX) 583 unsigned long res;
661 event->parameter = 584 int rc;
662 isdn_gethex(argv[curarg]); 585
663 else 586 rc = strict_strtoul(argv[curarg++], 10, &res);
664 event->parameter = 587 if (rc == 0)
665 isdn_getnum(argv[curarg]); 588 event->parameter = res;
666 ++curarg; 589 }
667 } else
668 event->parameter = -1;
669 gig_dbg(DEBUG_EVENT, "parameter==%d", event->parameter); 590 gig_dbg(DEBUG_EVENT, "parameter==%d", event->parameter);
670 break; 591 break;
671 } 592 }
@@ -797,48 +718,27 @@ static void schedule_init(struct cardstate *cs, int state)
797static void send_command(struct cardstate *cs, const char *cmd, int cid, 718static void send_command(struct cardstate *cs, const char *cmd, int cid,
798 int dle, gfp_t kmallocflags) 719 int dle, gfp_t kmallocflags)
799{ 720{
800 size_t cmdlen, buflen; 721 struct cmdbuf_t *cb;
801 char *cmdpos, *cmdbuf, *cmdtail; 722 size_t buflen;
802 723
803 cmdlen = strlen(cmd); 724 buflen = strlen(cmd) + 12; /* DLE ( A T 1 2 3 4 5 <cmd> DLE ) \0 */
804 buflen = 11 + cmdlen; 725 cb = kmalloc(sizeof(struct cmdbuf_t) + buflen, kmallocflags);
805 if (unlikely(buflen <= cmdlen)) { 726 if (!cb) {
806 dev_err(cs->dev, "integer overflow in buflen\n"); 727 dev_err(cs->dev, "%s: out of memory\n", __func__);
807 return; 728 return;
808 } 729 }
809 730 if (cid > 0 && cid <= 65535)
810 cmdbuf = kmalloc(buflen, kmallocflags); 731 cb->len = snprintf(cb->buf, buflen,
811 if (unlikely(!cmdbuf)) { 732 dle ? "\020(AT%d%s\020)" : "AT%d%s",
812 dev_err(cs->dev, "out of memory\n"); 733 cid, cmd);
813 return; 734 else
814 } 735 cb->len = snprintf(cb->buf, buflen,
815 736 dle ? "\020(AT%s\020)" : "AT%s",
816 cmdpos = cmdbuf + 9; 737 cmd);
817 cmdtail = cmdpos + cmdlen; 738 cb->offset = 0;
818 memcpy(cmdpos, cmd, cmdlen); 739 cb->next = NULL;
819 740 cb->wake_tasklet = NULL;
820 if (cid > 0 && cid <= 65535) { 741 cs->ops->write_cmd(cs, cb);
821 do {
822 *--cmdpos = '0' + cid % 10;
823 cid /= 10;
824 ++cmdlen;
825 } while (cid);
826 }
827
828 cmdlen += 2;
829 *--cmdpos = 'T';
830 *--cmdpos = 'A';
831
832 if (dle) {
833 cmdlen += 4;
834 *--cmdpos = '(';
835 *--cmdpos = 0x10;
836 *cmdtail++ = 0x10;
837 *cmdtail++ = ')';
838 }
839
840 cs->ops->write_cmd(cs, cmdpos, cmdlen, NULL);
841 kfree(cmdbuf);
842} 742}
843 743
844static struct at_state_t *at_state_from_cid(struct cardstate *cs, int cid) 744static struct at_state_t *at_state_from_cid(struct cardstate *cs, int cid)
@@ -1240,8 +1140,22 @@ static void do_action(int action, struct cardstate *cs,
1240 break; 1140 break;
1241 case ACT_HUPMODEM: 1141 case ACT_HUPMODEM:
1242 /* send "+++" (hangup in unimodem mode) */ 1142 /* send "+++" (hangup in unimodem mode) */
1243 if (cs->connected) 1143 if (cs->connected) {
1244 cs->ops->write_cmd(cs, "+++", 3, NULL); 1144 struct cmdbuf_t *cb;
1145
1146 cb = kmalloc(sizeof(struct cmdbuf_t) + 3, GFP_ATOMIC);
1147 if (!cb) {
1148 dev_err(cs->dev, "%s: out of memory\n",
1149 __func__);
1150 return;
1151 }
1152 memcpy(cb->buf, "+++", 3);
1153 cb->len = 3;
1154 cb->offset = 0;
1155 cb->next = NULL;
1156 cb->wake_tasklet = NULL;
1157 cs->ops->write_cmd(cs, cb);
1158 }
1245 break; 1159 break;
1246 case ACT_RING: 1160 case ACT_RING:
1247 /* get fresh AT state structure for new CID */ 1161 /* get fresh AT state structure for new CID */
@@ -1855,19 +1769,13 @@ static void process_command_flags(struct cardstate *cs)
1855 gig_dbg(DEBUG_EVENT, "Scheduling PC_CIDMODE"); 1769 gig_dbg(DEBUG_EVENT, "Scheduling PC_CIDMODE");
1856 cs->commands_pending = 1; 1770 cs->commands_pending = 1;
1857 return; 1771 return;
1858#ifdef GIG_MAYINITONDIAL
1859 case M_UNKNOWN: 1772 case M_UNKNOWN:
1860 schedule_init(cs, MS_INIT); 1773 schedule_init(cs, MS_INIT);
1861 return; 1774 return;
1862#endif
1863 } 1775 }
1864 bcs->at_state.pending_commands &= ~PC_CID; 1776 bcs->at_state.pending_commands &= ~PC_CID;
1865 cs->curchannel = bcs->channel; 1777 cs->curchannel = bcs->channel;
1866#ifdef GIG_RETRYCID
1867 cs->retry_count = 2; 1778 cs->retry_count = 2;
1868#else
1869 cs->retry_count = 1;
1870#endif
1871 schedule_sequence(cs, &cs->at_state, SEQ_CID); 1779 schedule_sequence(cs, &cs->at_state, SEQ_CID);
1872 return; 1780 return;
1873 } 1781 }
diff --git a/drivers/isdn/gigaset/gigaset.h b/drivers/isdn/gigaset/gigaset.h
index 8738b0821fc9..a69512fb1195 100644
--- a/drivers/isdn/gigaset/gigaset.h
+++ b/drivers/isdn/gigaset/gigaset.h
@@ -46,13 +46,6 @@
46 46
47#define RBUFSIZE 8192 47#define RBUFSIZE 8192
48 48
49/* compile time options */
50#define GIG_MAJOR 0
51
52#define GIG_MAYINITONDIAL
53#define GIG_RETRYCID
54#define GIG_X75
55
56#define GIG_TICK 100 /* in milliseconds */ 49#define GIG_TICK 100 /* in milliseconds */
57 50
58/* timeout values (unit: 1 sec) */ 51/* timeout values (unit: 1 sec) */
@@ -193,9 +186,8 @@ void gigaset_dbg_buffer(enum debuglevel level, const unsigned char *msg,
193/* variables in struct at_state_t */ 186/* variables in struct at_state_t */
194#define VAR_ZSAU 0 187#define VAR_ZSAU 0
195#define VAR_ZDLE 1 188#define VAR_ZDLE 1
196#define VAR_ZVLS 2 189#define VAR_ZCTP 2
197#define VAR_ZCTP 3 190#define VAR_NUM 3
198#define VAR_NUM 4
199 191
200#define STR_NMBR 0 192#define STR_NMBR 0
201#define STR_ZCPN 1 193#define STR_ZCPN 1
@@ -574,9 +566,7 @@ struct bas_bc_state {
574struct gigaset_ops { 566struct gigaset_ops {
575 /* Called from ev-layer.c/interface.c for sending AT commands to the 567 /* Called from ev-layer.c/interface.c for sending AT commands to the
576 device */ 568 device */
577 int (*write_cmd)(struct cardstate *cs, 569 int (*write_cmd)(struct cardstate *cs, struct cmdbuf_t *cb);
578 const unsigned char *buf, int len,
579 struct tasklet_struct *wake_tasklet);
580 570
581 /* Called from interface.c for additional device control */ 571 /* Called from interface.c for additional device control */
582 int (*write_room)(struct cardstate *cs); 572 int (*write_room)(struct cardstate *cs);
diff --git a/drivers/isdn/gigaset/i4l.c b/drivers/isdn/gigaset/i4l.c
index f01c3c2e2e46..34bca37d65b9 100644
--- a/drivers/isdn/gigaset/i4l.c
+++ b/drivers/isdn/gigaset/i4l.c
@@ -419,6 +419,8 @@ oom:
419 dev_err(bcs->cs->dev, "out of memory\n"); 419 dev_err(bcs->cs->dev, "out of memory\n");
420 for (i = 0; i < AT_NUM; ++i) 420 for (i = 0; i < AT_NUM; ++i)
421 kfree(commands[i]); 421 kfree(commands[i]);
422 kfree(commands);
423 gigaset_free_channel(bcs);
422 return -ENOMEM; 424 return -ENOMEM;
423} 425}
424 426
@@ -643,9 +645,7 @@ int gigaset_isdn_regdev(struct cardstate *cs, const char *isdnid)
643 iif->maxbufsize = MAX_BUF_SIZE; 645 iif->maxbufsize = MAX_BUF_SIZE;
644 iif->features = ISDN_FEATURE_L2_TRANS | 646 iif->features = ISDN_FEATURE_L2_TRANS |
645 ISDN_FEATURE_L2_HDLC | 647 ISDN_FEATURE_L2_HDLC |
646#ifdef GIG_X75
647 ISDN_FEATURE_L2_X75I | 648 ISDN_FEATURE_L2_X75I |
648#endif
649 ISDN_FEATURE_L3_TRANS | 649 ISDN_FEATURE_L3_TRANS |
650 ISDN_FEATURE_P_EURO; 650 ISDN_FEATURE_P_EURO;
651 iif->hl_hdrlen = HW_HDR_LEN; /* Area for storing ack */ 651 iif->hl_hdrlen = HW_HDR_LEN; /* Area for storing ack */
diff --git a/drivers/isdn/gigaset/interface.c b/drivers/isdn/gigaset/interface.c
index c9f28dd40d5c..bb710d16a526 100644
--- a/drivers/isdn/gigaset/interface.c
+++ b/drivers/isdn/gigaset/interface.c
@@ -339,7 +339,8 @@ static int if_tiocmset(struct tty_struct *tty, struct file *file,
339static int if_write(struct tty_struct *tty, const unsigned char *buf, int count) 339static int if_write(struct tty_struct *tty, const unsigned char *buf, int count)
340{ 340{
341 struct cardstate *cs; 341 struct cardstate *cs;
342 int retval = -ENODEV; 342 struct cmdbuf_t *cb;
343 int retval;
343 344
344 cs = (struct cardstate *) tty->driver_data; 345 cs = (struct cardstate *) tty->driver_data;
345 if (!cs) { 346 if (!cs) {
@@ -355,18 +356,39 @@ static int if_write(struct tty_struct *tty, const unsigned char *buf, int count)
355 if (!cs->connected) { 356 if (!cs->connected) {
356 gig_dbg(DEBUG_IF, "not connected"); 357 gig_dbg(DEBUG_IF, "not connected");
357 retval = -ENODEV; 358 retval = -ENODEV;
358 } else if (!cs->open_count) 359 goto done;
360 }
361 if (!cs->open_count) {
359 dev_warn(cs->dev, "%s: device not opened\n", __func__); 362 dev_warn(cs->dev, "%s: device not opened\n", __func__);
360 else if (cs->mstate != MS_LOCKED) { 363 retval = -ENODEV;
364 goto done;
365 }
366 if (cs->mstate != MS_LOCKED) {
361 dev_warn(cs->dev, "can't write to unlocked device\n"); 367 dev_warn(cs->dev, "can't write to unlocked device\n");
362 retval = -EBUSY; 368 retval = -EBUSY;
363 } else { 369 goto done;
364 retval = cs->ops->write_cmd(cs, buf, count, 370 }
365 &cs->if_wake_tasklet); 371 if (count <= 0) {
372 /* nothing to do */
373 retval = 0;
374 goto done;
366 } 375 }
367 376
368 mutex_unlock(&cs->mutex); 377 cb = kmalloc(sizeof(struct cmdbuf_t) + count, GFP_KERNEL);
378 if (!cb) {
379 dev_err(cs->dev, "%s: out of memory\n", __func__);
380 retval = -ENOMEM;
381 goto done;
382 }
369 383
384 memcpy(cb->buf, buf, count);
385 cb->len = count;
386 cb->offset = 0;
387 cb->next = NULL;
388 cb->wake_tasklet = &cs->if_wake_tasklet;
389 retval = cs->ops->write_cmd(cs, cb);
390done:
391 mutex_unlock(&cs->mutex);
370 return retval; 392 return retval;
371} 393}
372 394
@@ -655,7 +677,6 @@ void gigaset_if_initdriver(struct gigaset_driver *drv, const char *procname,
655 goto enomem; 677 goto enomem;
656 678
657 tty->magic = TTY_DRIVER_MAGIC, 679 tty->magic = TTY_DRIVER_MAGIC,
658 tty->major = GIG_MAJOR,
659 tty->type = TTY_DRIVER_TYPE_SERIAL, 680 tty->type = TTY_DRIVER_TYPE_SERIAL,
660 tty->subtype = SERIAL_TYPE_NORMAL, 681 tty->subtype = SERIAL_TYPE_NORMAL,
661 tty->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV; 682 tty->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
diff --git a/drivers/isdn/gigaset/ser-gigaset.c b/drivers/isdn/gigaset/ser-gigaset.c
index e96c0586886c..d151dcbf770d 100644
--- a/drivers/isdn/gigaset/ser-gigaset.c
+++ b/drivers/isdn/gigaset/ser-gigaset.c
@@ -241,30 +241,13 @@ static void flush_send_queue(struct cardstate *cs)
241 * return value: 241 * return value:
242 * number of bytes queued, or error code < 0 242 * number of bytes queued, or error code < 0
243 */ 243 */
244static int gigaset_write_cmd(struct cardstate *cs, const unsigned char *buf, 244static int gigaset_write_cmd(struct cardstate *cs, struct cmdbuf_t *cb)
245 int len, struct tasklet_struct *wake_tasklet)
246{ 245{
247 struct cmdbuf_t *cb;
248 unsigned long flags; 246 unsigned long flags;
249 247
250 gigaset_dbg_buffer(cs->mstate != MS_LOCKED ? 248 gigaset_dbg_buffer(cs->mstate != MS_LOCKED ?
251 DEBUG_TRANSCMD : DEBUG_LOCKCMD, 249 DEBUG_TRANSCMD : DEBUG_LOCKCMD,
252 "CMD Transmit", len, buf); 250 "CMD Transmit", cb->len, cb->buf);
253
254 if (len <= 0)
255 return 0;
256
257 cb = kmalloc(sizeof(struct cmdbuf_t) + len, GFP_ATOMIC);
258 if (!cb) {
259 dev_err(cs->dev, "%s: out of memory!\n", __func__);
260 return -ENOMEM;
261 }
262
263 memcpy(cb->buf, buf, len);
264 cb->len = len;
265 cb->offset = 0;
266 cb->next = NULL;
267 cb->wake_tasklet = wake_tasklet;
268 251
269 spin_lock_irqsave(&cs->cmdlock, flags); 252 spin_lock_irqsave(&cs->cmdlock, flags);
270 cb->prev = cs->lastcmdbuf; 253 cb->prev = cs->lastcmdbuf;
@@ -272,9 +255,9 @@ static int gigaset_write_cmd(struct cardstate *cs, const unsigned char *buf,
272 cs->lastcmdbuf->next = cb; 255 cs->lastcmdbuf->next = cb;
273 else { 256 else {
274 cs->cmdbuf = cb; 257 cs->cmdbuf = cb;
275 cs->curlen = len; 258 cs->curlen = cb->len;
276 } 259 }
277 cs->cmdbytes += len; 260 cs->cmdbytes += cb->len;
278 cs->lastcmdbuf = cb; 261 cs->lastcmdbuf = cb;
279 spin_unlock_irqrestore(&cs->cmdlock, flags); 262 spin_unlock_irqrestore(&cs->cmdlock, flags);
280 263
@@ -282,7 +265,7 @@ static int gigaset_write_cmd(struct cardstate *cs, const unsigned char *buf,
282 if (cs->connected) 265 if (cs->connected)
283 tasklet_schedule(&cs->write_tasklet); 266 tasklet_schedule(&cs->write_tasklet);
284 spin_unlock_irqrestore(&cs->lock, flags); 267 spin_unlock_irqrestore(&cs->lock, flags);
285 return len; 268 return cb->len;
286} 269}
287 270
288/* 271/*
diff --git a/drivers/isdn/gigaset/usb-gigaset.c b/drivers/isdn/gigaset/usb-gigaset.c
index 76dbb20f3065..4a66338f4e7d 100644
--- a/drivers/isdn/gigaset/usb-gigaset.c
+++ b/drivers/isdn/gigaset/usb-gigaset.c
@@ -39,7 +39,8 @@ MODULE_PARM_DESC(cidmode, "Call-ID mode");
39#define GIGASET_MODULENAME "usb_gigaset" 39#define GIGASET_MODULENAME "usb_gigaset"
40#define GIGASET_DEVNAME "ttyGU" 40#define GIGASET_DEVNAME "ttyGU"
41 41
42#define IF_WRITEBUF 2000 /* arbitrary limit */ 42/* length limit according to Siemens 3070usb-protokoll.doc ch. 2.1 */
43#define IF_WRITEBUF 264
43 44
44/* Values for the Gigaset M105 Data */ 45/* Values for the Gigaset M105 Data */
45#define USB_M105_VENDOR_ID 0x0681 46#define USB_M105_VENDOR_ID 0x0681
@@ -493,29 +494,13 @@ static int send_cb(struct cardstate *cs, struct cmdbuf_t *cb)
493} 494}
494 495
495/* Send command to device. */ 496/* Send command to device. */
496static int gigaset_write_cmd(struct cardstate *cs, const unsigned char *buf, 497static int gigaset_write_cmd(struct cardstate *cs, struct cmdbuf_t *cb)
497 int len, struct tasklet_struct *wake_tasklet)
498{ 498{
499 struct cmdbuf_t *cb;
500 unsigned long flags; 499 unsigned long flags;
501 500
502 gigaset_dbg_buffer(cs->mstate != MS_LOCKED ? 501 gigaset_dbg_buffer(cs->mstate != MS_LOCKED ?
503 DEBUG_TRANSCMD : DEBUG_LOCKCMD, 502 DEBUG_TRANSCMD : DEBUG_LOCKCMD,
504 "CMD Transmit", len, buf); 503 "CMD Transmit", cb->len, cb->buf);
505
506 if (len <= 0)
507 return 0;
508 cb = kmalloc(sizeof(struct cmdbuf_t) + len, GFP_ATOMIC);
509 if (!cb) {
510 dev_err(cs->dev, "%s: out of memory\n", __func__);
511 return -ENOMEM;
512 }
513
514 memcpy(cb->buf, buf, len);
515 cb->len = len;
516 cb->offset = 0;
517 cb->next = NULL;
518 cb->wake_tasklet = wake_tasklet;
519 504
520 spin_lock_irqsave(&cs->cmdlock, flags); 505 spin_lock_irqsave(&cs->cmdlock, flags);
521 cb->prev = cs->lastcmdbuf; 506 cb->prev = cs->lastcmdbuf;
@@ -523,9 +508,9 @@ static int gigaset_write_cmd(struct cardstate *cs, const unsigned char *buf,
523 cs->lastcmdbuf->next = cb; 508 cs->lastcmdbuf->next = cb;
524 else { 509 else {
525 cs->cmdbuf = cb; 510 cs->cmdbuf = cb;
526 cs->curlen = len; 511 cs->curlen = cb->len;
527 } 512 }
528 cs->cmdbytes += len; 513 cs->cmdbytes += cb->len;
529 cs->lastcmdbuf = cb; 514 cs->lastcmdbuf = cb;
530 spin_unlock_irqrestore(&cs->cmdlock, flags); 515 spin_unlock_irqrestore(&cs->cmdlock, flags);
531 516
@@ -533,7 +518,7 @@ static int gigaset_write_cmd(struct cardstate *cs, const unsigned char *buf,
533 if (cs->connected) 518 if (cs->connected)
534 tasklet_schedule(&cs->write_tasklet); 519 tasklet_schedule(&cs->write_tasklet);
535 spin_unlock_irqrestore(&cs->lock, flags); 520 spin_unlock_irqrestore(&cs->lock, flags);
536 return len; 521 return cb->len;
537} 522}
538 523
539static int gigaset_write_room(struct cardstate *cs) 524static int gigaset_write_room(struct cardstate *cs)
diff --git a/drivers/isdn/hardware/eicon/divamnt.c b/drivers/isdn/hardware/eicon/divamnt.c
index 1e85f743214e..f1d464f1e107 100644
--- a/drivers/isdn/hardware/eicon/divamnt.c
+++ b/drivers/isdn/hardware/eicon/divamnt.c
@@ -14,7 +14,7 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/poll.h> 16#include <linux/poll.h>
17#include <linux/smp_lock.h> 17#include <linux/mutex.h>
18#include <asm/uaccess.h> 18#include <asm/uaccess.h>
19 19
20#include "platform.h" 20#include "platform.h"
@@ -22,6 +22,7 @@
22#include "divasync.h" 22#include "divasync.h"
23#include "debug_if.h" 23#include "debug_if.h"
24 24
25static DEFINE_MUTEX(maint_mutex);
25static char *main_revision = "$Revision: 1.32.6.10 $"; 26static char *main_revision = "$Revision: 1.32.6.10 $";
26 27
27static int major; 28static int major;
@@ -130,7 +131,7 @@ static int maint_open(struct inode *ino, struct file *filep)
130{ 131{
131 int ret; 132 int ret;
132 133
133 lock_kernel(); 134 mutex_lock(&maint_mutex);
134 /* only one open is allowed, so we test 135 /* only one open is allowed, so we test
135 it atomically */ 136 it atomically */
136 if (test_and_set_bit(0, &opened)) 137 if (test_and_set_bit(0, &opened))
@@ -139,7 +140,7 @@ static int maint_open(struct inode *ino, struct file *filep)
139 filep->private_data = NULL; 140 filep->private_data = NULL;
140 ret = nonseekable_open(ino, filep); 141 ret = nonseekable_open(ino, filep);
141 } 142 }
142 unlock_kernel(); 143 mutex_unlock(&maint_mutex);
143 return ret; 144 return ret;
144} 145}
145 146
diff --git a/drivers/isdn/hardware/eicon/divasi.c b/drivers/isdn/hardware/eicon/divasi.c
index f577719ab3fa..42d3b8346034 100644
--- a/drivers/isdn/hardware/eicon/divasi.c
+++ b/drivers/isdn/hardware/eicon/divasi.c
@@ -18,7 +18,6 @@
18#include <linux/proc_fs.h> 18#include <linux/proc_fs.h>
19#include <linux/skbuff.h> 19#include <linux/skbuff.h>
20#include <linux/seq_file.h> 20#include <linux/seq_file.h>
21#include <linux/smp_lock.h>
22#include <asm/uaccess.h> 21#include <asm/uaccess.h>
23 22
24#include "platform.h" 23#include "platform.h"
@@ -402,7 +401,6 @@ static unsigned int um_idi_poll(struct file *file, poll_table * wait)
402 401
403static int um_idi_open(struct inode *inode, struct file *file) 402static int um_idi_open(struct inode *inode, struct file *file)
404{ 403{
405 cycle_kernel_lock();
406 return (0); 404 return (0);
407} 405}
408 406
diff --git a/drivers/isdn/hardware/eicon/divasmain.c b/drivers/isdn/hardware/eicon/divasmain.c
index fbbcb27fb681..ed9c55506797 100644
--- a/drivers/isdn/hardware/eicon/divasmain.c
+++ b/drivers/isdn/hardware/eicon/divasmain.c
@@ -21,7 +21,6 @@
21#include <linux/list.h> 21#include <linux/list.h>
22#include <linux/poll.h> 22#include <linux/poll.h>
23#include <linux/kmod.h> 23#include <linux/kmod.h>
24#include <linux/smp_lock.h>
25 24
26#include "platform.h" 25#include "platform.h"
27#undef ID_MASK 26#undef ID_MASK
@@ -113,41 +112,40 @@ typedef struct _diva_os_thread_dpc {
113 This table should be sorted by PCI device ID 112 This table should be sorted by PCI device ID
114 */ 113 */
115static struct pci_device_id divas_pci_tbl[] = { 114static struct pci_device_id divas_pci_tbl[] = {
116/* Diva Server BRI-2M PCI 0xE010 */ 115 /* Diva Server BRI-2M PCI 0xE010 */
117 {PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_MAESTRA, 116 { PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_MAESTRA),
118 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CARDTYPE_MAESTRA_PCI}, 117 CARDTYPE_MAESTRA_PCI },
119/* Diva Server 4BRI-8M PCI 0xE012 */ 118 /* Diva Server 4BRI-8M PCI 0xE012 */
120 {PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_MAESTRAQ, 119 { PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_MAESTRAQ),
121 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CARDTYPE_DIVASRV_Q_8M_PCI}, 120 CARDTYPE_DIVASRV_Q_8M_PCI },
122/* Diva Server 4BRI-8M 2.0 PCI 0xE013 */ 121 /* Diva Server 4BRI-8M 2.0 PCI 0xE013 */
123 {PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_MAESTRAQ_U, 122 { PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_MAESTRAQ_U),
124 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CARDTYPE_DIVASRV_Q_8M_V2_PCI}, 123 CARDTYPE_DIVASRV_Q_8M_V2_PCI },
125/* Diva Server PRI-30M PCI 0xE014 */ 124 /* Diva Server PRI-30M PCI 0xE014 */
126 {PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_MAESTRAP, 125 { PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_MAESTRAP),
127 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CARDTYPE_DIVASRV_P_30M_PCI}, 126 CARDTYPE_DIVASRV_P_30M_PCI },
128/* Diva Server PRI 2.0 adapter 0xE015 */ 127 /* Diva Server PRI 2.0 adapter 0xE015 */
129 {PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_MAESTRAP_2, 128 { PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_MAESTRAP_2),
130 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CARDTYPE_DIVASRV_P_30M_V2_PCI}, 129 CARDTYPE_DIVASRV_P_30M_V2_PCI },
131/* Diva Server Voice 4BRI-8M PCI 0xE016 */ 130 /* Diva Server Voice 4BRI-8M PCI 0xE016 */
132 {PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_4BRI_VOIP, 131 { PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_4BRI_VOIP),
133 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CARDTYPE_DIVASRV_VOICE_Q_8M_PCI}, 132 CARDTYPE_DIVASRV_VOICE_Q_8M_PCI },
134/* Diva Server Voice 4BRI-8M 2.0 PCI 0xE017 */ 133 /* Diva Server Voice 4BRI-8M 2.0 PCI 0xE017 */
135 {PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_4BRI_2_VOIP, 134 { PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_4BRI_2_VOIP),
136 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CARDTYPE_DIVASRV_VOICE_Q_8M_V2_PCI}, 135 CARDTYPE_DIVASRV_VOICE_Q_8M_V2_PCI },
137/* Diva Server BRI-2M 2.0 PCI 0xE018 */ 136 /* Diva Server BRI-2M 2.0 PCI 0xE018 */
138 {PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_BRI2M_2, 137 { PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_BRI2M_2),
139 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CARDTYPE_DIVASRV_B_2M_V2_PCI}, 138 CARDTYPE_DIVASRV_B_2M_V2_PCI },
140/* Diva Server Voice PRI 2.0 PCI 0xE019 */ 139 /* Diva Server Voice PRI 2.0 PCI 0xE019 */
141 {PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_MAESTRAP_2_VOIP, 140 { PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_MAESTRAP_2_VOIP),
142 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 141 CARDTYPE_DIVASRV_VOICE_P_30M_V2_PCI },
143 CARDTYPE_DIVASRV_VOICE_P_30M_V2_PCI}, 142 /* Diva Server 2FX 0xE01A */
144/* Diva Server 2FX 0xE01A */ 143 { PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_2F),
145 {PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_2F, 144 CARDTYPE_DIVASRV_B_2F_PCI },
146 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CARDTYPE_DIVASRV_B_2F_PCI}, 145 /* Diva Server Voice BRI-2M 2.0 PCI 0xE01B */
147/* Diva Server Voice BRI-2M 2.0 PCI 0xE01B */ 146 { PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_BRI2M_2_VOIP),
148 {PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_BRI2M_2_VOIP, 147 CARDTYPE_DIVASRV_VOICE_B_2M_V2_PCI },
149 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CARDTYPE_DIVASRV_VOICE_B_2M_V2_PCI}, 148 { 0, } /* 0 terminated list. */
150 {0,} /* 0 terminated list. */
151}; 149};
152MODULE_DEVICE_TABLE(pci, divas_pci_tbl); 150MODULE_DEVICE_TABLE(pci, divas_pci_tbl);
153 151
@@ -581,7 +579,6 @@ xdi_copy_from_user(void *os_handle, void *dst, const void __user *src, int lengt
581 */ 579 */
582static int divas_open(struct inode *inode, struct file *file) 580static int divas_open(struct inode *inode, struct file *file)
583{ 581{
584 cycle_kernel_lock();
585 return (0); 582 return (0);
586} 583}
587 584
diff --git a/drivers/isdn/hardware/mISDN/avmfritz.c b/drivers/isdn/hardware/mISDN/avmfritz.c
index d4215369bb59..472a2af79446 100644
--- a/drivers/isdn/hardware/mISDN/avmfritz.c
+++ b/drivers/isdn/hardware/mISDN/avmfritz.c
@@ -1116,7 +1116,7 @@ fritz_remove_pci(struct pci_dev *pdev)
1116 release_card(card); 1116 release_card(card);
1117 else 1117 else
1118 if (debug) 1118 if (debug)
1119 pr_info("%s: drvdata allready removed\n", __func__); 1119 pr_info("%s: drvdata already removed\n", __func__);
1120} 1120}
1121 1121
1122static struct pci_device_id fcpci_ids[] __devinitdata = { 1122static struct pci_device_id fcpci_ids[] __devinitdata = {
diff --git a/drivers/isdn/hardware/mISDN/hfcmulti.c b/drivers/isdn/hardware/mISDN/hfcmulti.c
index 095ed76ebe80..4e3780d78ac7 100644
--- a/drivers/isdn/hardware/mISDN/hfcmulti.c
+++ b/drivers/isdn/hardware/mISDN/hfcmulti.c
@@ -4268,7 +4268,7 @@ init_card(struct hfc_multi *hc)
4268 goto error; 4268 goto error;
4269 /* 4269 /*
4270 * Finally enable IRQ output 4270 * Finally enable IRQ output
4271 * this is only allowed, if an IRQ routine is allready 4271 * this is only allowed, if an IRQ routine is already
4272 * established for this HFC, so don't do that earlier 4272 * established for this HFC, so don't do that earlier
4273 */ 4273 */
4274 spin_lock_irqsave(&hc->lock, flags); 4274 spin_lock_irqsave(&hc->lock, flags);
@@ -5212,7 +5212,7 @@ static void __devexit hfc_remove_pci(struct pci_dev *pdev)
5212 spin_unlock_irqrestore(&HFClock, flags); 5212 spin_unlock_irqrestore(&HFClock, flags);
5213 } else { 5213 } else {
5214 if (debug) 5214 if (debug)
5215 printk(KERN_DEBUG "%s: drvdata allready removed\n", 5215 printk(KERN_DEBUG "%s: drvdata already removed\n",
5216 __func__); 5216 __func__);
5217 } 5217 }
5218} 5218}
@@ -5354,12 +5354,9 @@ static struct pci_device_id hfmultipci_ids[] __devinitdata = {
5354 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD, 5354 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD,
5355 PCI_SUBDEVICE_ID_CCD_JHSE1, 0, 0, H(25)}, /* Junghanns E1 */ 5355 PCI_SUBDEVICE_ID_CCD_JHSE1, 0, 0, H(25)}, /* Junghanns E1 */
5356 5356
5357 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_ANY_ID, PCI_ANY_ID, 5357 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_HFC4S), 0 },
5358 0, 0, 0}, 5358 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_HFC8S), 0 },
5359 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_ANY_ID, PCI_ANY_ID, 5359 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_HFCE1), 0 },
5360 0, 0, 0},
5361 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_ANY_ID, PCI_ANY_ID,
5362 0, 0, 0},
5363 {0, } 5360 {0, }
5364}; 5361};
5365#undef H 5362#undef H
diff --git a/drivers/isdn/hardware/mISDN/hfcpci.c b/drivers/isdn/hardware/mISDN/hfcpci.c
index 5940a2c12074..15d323b8be60 100644
--- a/drivers/isdn/hardware/mISDN/hfcpci.c
+++ b/drivers/isdn/hardware/mISDN/hfcpci.c
@@ -1773,7 +1773,7 @@ init_card(struct hfc_pci *hc)
1773 inithfcpci(hc); 1773 inithfcpci(hc);
1774 /* 1774 /*
1775 * Finally enable IRQ output 1775 * Finally enable IRQ output
1776 * this is only allowed, if an IRQ routine is allready 1776 * this is only allowed, if an IRQ routine is already
1777 * established for this HFC, so don't do that earlier 1777 * established for this HFC, so don't do that earlier
1778 */ 1778 */
1779 enable_hwirq(hc); 1779 enable_hwirq(hc);
@@ -2188,52 +2188,52 @@ static const struct _hfc_map hfc_map[] =
2188 2188
2189static struct pci_device_id hfc_ids[] = 2189static struct pci_device_id hfc_ids[] =
2190{ 2190{
2191 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_2BD0, 2191 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_2BD0),
2192 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[0]}, 2192 (unsigned long) &hfc_map[0] },
2193 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B000, 2193 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B000),
2194 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[1]}, 2194 (unsigned long) &hfc_map[1] },
2195 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B006, 2195 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B006),
2196 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[2]}, 2196 (unsigned long) &hfc_map[2] },
2197 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B007, 2197 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B007),
2198 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[3]}, 2198 (unsigned long) &hfc_map[3] },
2199 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B008, 2199 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B008),
2200 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[4]}, 2200 (unsigned long) &hfc_map[4] },
2201 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B009, 2201 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B009),
2202 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[5]}, 2202 (unsigned long) &hfc_map[5] },
2203 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B00A, 2203 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B00A),
2204 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[6]}, 2204 (unsigned long) &hfc_map[6] },
2205 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B00B, 2205 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B00B),
2206 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[7]}, 2206 (unsigned long) &hfc_map[7] },
2207 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B00C, 2207 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B00C),
2208 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[8]}, 2208 (unsigned long) &hfc_map[8] },
2209 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B100, 2209 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B100),
2210 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[9]}, 2210 (unsigned long) &hfc_map[9] },
2211 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B700, 2211 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B700),
2212 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[10]}, 2212 (unsigned long) &hfc_map[10] },
2213 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B701, 2213 { PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B701),
2214 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[11]}, 2214 (unsigned long) &hfc_map[11] },
2215 {PCI_VENDOR_ID_ABOCOM, PCI_DEVICE_ID_ABOCOM_2BD1, 2215 { PCI_VDEVICE(ABOCOM, PCI_DEVICE_ID_ABOCOM_2BD1),
2216 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[12]}, 2216 (unsigned long) &hfc_map[12] },
2217 {PCI_VENDOR_ID_ASUSTEK, PCI_DEVICE_ID_ASUSTEK_0675, 2217 { PCI_VDEVICE(ASUSTEK, PCI_DEVICE_ID_ASUSTEK_0675),
2218 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[13]}, 2218 (unsigned long) &hfc_map[13] },
2219 {PCI_VENDOR_ID_BERKOM, PCI_DEVICE_ID_BERKOM_T_CONCEPT, 2219 { PCI_VDEVICE(BERKOM, PCI_DEVICE_ID_BERKOM_T_CONCEPT),
2220 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[14]}, 2220 (unsigned long) &hfc_map[14] },
2221 {PCI_VENDOR_ID_BERKOM, PCI_DEVICE_ID_BERKOM_A1T, 2221 { PCI_VDEVICE(BERKOM, PCI_DEVICE_ID_BERKOM_A1T),
2222 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[15]}, 2222 (unsigned long) &hfc_map[15] },
2223 {PCI_VENDOR_ID_ANIGMA, PCI_DEVICE_ID_ANIGMA_MC145575, 2223 { PCI_VDEVICE(ANIGMA, PCI_DEVICE_ID_ANIGMA_MC145575),
2224 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[16]}, 2224 (unsigned long) &hfc_map[16] },
2225 {PCI_VENDOR_ID_ZOLTRIX, PCI_DEVICE_ID_ZOLTRIX_2BD0, 2225 { PCI_VDEVICE(ZOLTRIX, PCI_DEVICE_ID_ZOLTRIX_2BD0),
2226 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[17]}, 2226 (unsigned long) &hfc_map[17] },
2227 {PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_E, 2227 { PCI_VDEVICE(DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_E),
2228 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[18]}, 2228 (unsigned long) &hfc_map[18] },
2229 {PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_E, 2229 { PCI_VDEVICE(DIGI, PCI_DEVICE_ID_DIGI_DF_M_E),
2230 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[19]}, 2230 (unsigned long) &hfc_map[19] },
2231 {PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_A, 2231 { PCI_VDEVICE(DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_A),
2232 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[20]}, 2232 (unsigned long) &hfc_map[20] },
2233 {PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_A, 2233 { PCI_VDEVICE(DIGI, PCI_DEVICE_ID_DIGI_DF_M_A),
2234 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[21]}, 2234 (unsigned long) &hfc_map[21] },
2235 {PCI_VENDOR_ID_SITECOM, PCI_DEVICE_ID_SITECOM_DC105V2, 2235 { PCI_VDEVICE(SITECOM, PCI_DEVICE_ID_SITECOM_DC105V2),
2236 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (unsigned long) &hfc_map[22]}, 2236 (unsigned long) &hfc_map[22] },
2237 {}, 2237 {},
2238}; 2238};
2239 2239
diff --git a/drivers/isdn/hardware/mISDN/mISDNinfineon.c b/drivers/isdn/hardware/mISDN/mISDNinfineon.c
index f5b3d2b26a08..d2dd61d65d51 100644
--- a/drivers/isdn/hardware/mISDN/mISDNinfineon.c
+++ b/drivers/isdn/hardware/mISDN/mISDNinfineon.c
@@ -125,36 +125,25 @@ struct inf_hw {
125#define PCI_SUB_ID_SEDLBAUER 0x01 125#define PCI_SUB_ID_SEDLBAUER 0x01
126 126
127static struct pci_device_id infineon_ids[] __devinitdata = { 127static struct pci_device_id infineon_ids[] __devinitdata = {
128 { PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_DIVA20, 128 { PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_DIVA20), INF_DIVA20 },
129 PCI_ANY_ID, PCI_ANY_ID, 0, 0, INF_DIVA20}, 129 { PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_DIVA20_U), INF_DIVA20U },
130 { PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_DIVA20_U, 130 { PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_DIVA201), INF_DIVA201 },
131 PCI_ANY_ID, PCI_ANY_ID, 0, 0, INF_DIVA20U}, 131 { PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_DIVA202), INF_DIVA202 },
132 { PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_DIVA201,
133 PCI_ANY_ID, PCI_ANY_ID, 0, 0, INF_DIVA201},
134 { PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_DIVA202,
135 PCI_ANY_ID, PCI_ANY_ID, 0, 0, INF_DIVA202},
136 { PCI_VENDOR_ID_TIGERJET, PCI_DEVICE_ID_TIGERJET_100, 132 { PCI_VENDOR_ID_TIGERJET, PCI_DEVICE_ID_TIGERJET_100,
137 PCI_SUBVENDOR_SEDLBAUER_PCI, PCI_SUB_ID_SEDLBAUER, 0, 0, 133 PCI_SUBVENDOR_SEDLBAUER_PCI, PCI_SUB_ID_SEDLBAUER, 0, 0,
138 INF_SPEEDWIN}, 134 INF_SPEEDWIN },
139 { PCI_VENDOR_ID_TIGERJET, PCI_DEVICE_ID_TIGERJET_100, 135 { PCI_VENDOR_ID_TIGERJET, PCI_DEVICE_ID_TIGERJET_100,
140 PCI_SUBVENDOR_HST_SAPHIR3, PCI_SUB_ID_SEDLBAUER, 0, 0, INF_SAPHIR3}, 136 PCI_SUBVENDOR_HST_SAPHIR3, PCI_SUB_ID_SEDLBAUER, 0, 0, INF_SAPHIR3 },
141 { PCI_VENDOR_ID_ELSA, PCI_DEVICE_ID_ELSA_MICROLINK, 137 { PCI_VDEVICE(ELSA, PCI_DEVICE_ID_ELSA_MICROLINK), INF_QS1000 },
142 PCI_ANY_ID, PCI_ANY_ID, 0, 0, INF_QS1000}, 138 { PCI_VDEVICE(ELSA, PCI_DEVICE_ID_ELSA_QS3000), INF_QS3000 },
143 { PCI_VENDOR_ID_ELSA, PCI_DEVICE_ID_ELSA_QS3000, 139 { PCI_VDEVICE(SATSAGEM, PCI_DEVICE_ID_SATSAGEM_NICCY), INF_NICCY },
144 PCI_ANY_ID, PCI_ANY_ID, 0, 0, INF_QS3000},
145 { PCI_VENDOR_ID_SATSAGEM, PCI_DEVICE_ID_SATSAGEM_NICCY,
146 PCI_ANY_ID, PCI_ANY_ID, 0, 0, INF_NICCY},
147 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, 140 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
148 PCI_VENDOR_ID_BERKOM, PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO, 0, 0, 141 PCI_VENDOR_ID_BERKOM, PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO, 0, 0,
149 INF_SCT_1}, 142 INF_SCT_1 },
150 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_R685, 143 { PCI_VDEVICE(PLX, PCI_DEVICE_ID_PLX_R685), INF_GAZEL_R685 },
151 PCI_ANY_ID, PCI_ANY_ID, 0, 0, INF_GAZEL_R685}, 144 { PCI_VDEVICE(PLX, PCI_DEVICE_ID_PLX_R753), INF_GAZEL_R753 },
152 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_R753, 145 { PCI_VDEVICE(PLX, PCI_DEVICE_ID_PLX_DJINN_ITOO), INF_GAZEL_R753 },
153 PCI_ANY_ID, PCI_ANY_ID, 0, 0, INF_GAZEL_R753}, 146 { PCI_VDEVICE(PLX, PCI_DEVICE_ID_PLX_OLITEC), INF_GAZEL_R753 },
154 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_DJINN_ITOO,
155 PCI_ANY_ID, PCI_ANY_ID, 0, 0, INF_GAZEL_R753},
156 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_OLITEC,
157 PCI_ANY_ID, PCI_ANY_ID, 0, 0, INF_GAZEL_R753},
158 { } 147 { }
159}; 148};
160MODULE_DEVICE_TABLE(pci, infineon_ids); 149MODULE_DEVICE_TABLE(pci, infineon_ids);
@@ -1150,7 +1139,7 @@ inf_remove(struct pci_dev *pdev)
1150 if (card) 1139 if (card)
1151 release_card(card); 1140 release_card(card);
1152 else 1141 else
1153 pr_debug("%s: drvdata allready removed\n", __func__); 1142 pr_debug("%s: drvdata already removed\n", __func__);
1154} 1143}
1155 1144
1156static struct pci_driver infineon_driver = { 1145static struct pci_driver infineon_driver = {
diff --git a/drivers/isdn/hardware/mISDN/speedfax.c b/drivers/isdn/hardware/mISDN/speedfax.c
index d097a4e40e2b..9e07246bb9e7 100644
--- a/drivers/isdn/hardware/mISDN/speedfax.c
+++ b/drivers/isdn/hardware/mISDN/speedfax.c
@@ -484,7 +484,7 @@ sfax_remove_pci(struct pci_dev *pdev)
484 if (card) 484 if (card)
485 release_card(card); 485 release_card(card);
486 else 486 else
487 pr_debug("%s: drvdata allready removed\n", __func__); 487 pr_debug("%s: drvdata already removed\n", __func__);
488} 488}
489 489
490static struct pci_device_id sfaxpci_ids[] __devinitdata = { 490static struct pci_device_id sfaxpci_ids[] __devinitdata = {
diff --git a/drivers/isdn/hardware/mISDN/w6692.c b/drivers/isdn/hardware/mISDN/w6692.c
index 31f9d71fb22f..9e84870b971c 100644
--- a/drivers/isdn/hardware/mISDN/w6692.c
+++ b/drivers/isdn/hardware/mISDN/w6692.c
@@ -1402,7 +1402,7 @@ w6692_remove_pci(struct pci_dev *pdev)
1402 release_card(card); 1402 release_card(card);
1403 else 1403 else
1404 if (debug) 1404 if (debug)
1405 pr_notice("%s: drvdata allready removed\n", __func__); 1405 pr_notice("%s: drvdata already removed\n", __func__);
1406} 1406}
1407 1407
1408static struct pci_device_id w6692_ids[] = { 1408static struct pci_device_id w6692_ids[] = {
diff --git a/drivers/isdn/hisax/callc.c b/drivers/isdn/hisax/callc.c
index f58ded8f403f..f150330b5a23 100644
--- a/drivers/isdn/hisax/callc.c
+++ b/drivers/isdn/hisax/callc.c
@@ -1172,7 +1172,7 @@ CallcFreeChan(struct IsdnCardState *csta)
1172 kfree(csta->channel[i].b_st); 1172 kfree(csta->channel[i].b_st);
1173 csta->channel[i].b_st = NULL; 1173 csta->channel[i].b_st = NULL;
1174 } else 1174 } else
1175 printk(KERN_WARNING "CallcFreeChan b_st ch%d allready freed\n", i); 1175 printk(KERN_WARNING "CallcFreeChan b_st ch%d already freed\n", i);
1176 if (i || test_bit(FLG_TWO_DCHAN, &csta->HW_Flags)) { 1176 if (i || test_bit(FLG_TWO_DCHAN, &csta->HW_Flags)) {
1177 release_d_st(csta->channel + i); 1177 release_d_st(csta->channel + i);
1178 } else 1178 } else
diff --git a/drivers/isdn/hisax/config.c b/drivers/isdn/hisax/config.c
index 544cf4b1cce3..6f9afcd5ca4e 100644
--- a/drivers/isdn/hisax/config.c
+++ b/drivers/isdn/hisax/config.c
@@ -1909,68 +1909,68 @@ static void EChannel_proc_rcv(struct hisax_d_if *d_if)
1909 1909
1910static struct pci_device_id hisax_pci_tbl[] __devinitdata = { 1910static struct pci_device_id hisax_pci_tbl[] __devinitdata = {
1911#ifdef CONFIG_HISAX_FRITZPCI 1911#ifdef CONFIG_HISAX_FRITZPCI
1912 {PCI_VENDOR_ID_AVM, PCI_DEVICE_ID_AVM_A1, PCI_ANY_ID, PCI_ANY_ID}, 1912 {PCI_VDEVICE(AVM, PCI_DEVICE_ID_AVM_A1) },
1913#endif 1913#endif
1914#ifdef CONFIG_HISAX_DIEHLDIVA 1914#ifdef CONFIG_HISAX_DIEHLDIVA
1915 {PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_DIVA20, PCI_ANY_ID, PCI_ANY_ID}, 1915 {PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_DIVA20) },
1916 {PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_DIVA20_U, PCI_ANY_ID, PCI_ANY_ID}, 1916 {PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_DIVA20_U) },
1917 {PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_DIVA201, PCI_ANY_ID, PCI_ANY_ID}, 1917 {PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_DIVA201) },
1918//######################################################################################### 1918/*##########################################################################*/
1919 {PCI_VENDOR_ID_EICON, PCI_DEVICE_ID_EICON_DIVA202, PCI_ANY_ID, PCI_ANY_ID}, 1919 {PCI_VDEVICE(EICON, PCI_DEVICE_ID_EICON_DIVA202) },
1920//######################################################################################### 1920/*##########################################################################*/
1921#endif 1921#endif
1922#ifdef CONFIG_HISAX_ELSA 1922#ifdef CONFIG_HISAX_ELSA
1923 {PCI_VENDOR_ID_ELSA, PCI_DEVICE_ID_ELSA_MICROLINK, PCI_ANY_ID, PCI_ANY_ID}, 1923 {PCI_VDEVICE(ELSA, PCI_DEVICE_ID_ELSA_MICROLINK) },
1924 {PCI_VENDOR_ID_ELSA, PCI_DEVICE_ID_ELSA_QS3000, PCI_ANY_ID, PCI_ANY_ID}, 1924 {PCI_VDEVICE(ELSA, PCI_DEVICE_ID_ELSA_QS3000) },
1925#endif 1925#endif
1926#ifdef CONFIG_HISAX_GAZEL 1926#ifdef CONFIG_HISAX_GAZEL
1927 {PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_R685, PCI_ANY_ID, PCI_ANY_ID}, 1927 {PCI_VDEVICE(PLX, PCI_DEVICE_ID_PLX_R685) },
1928 {PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_R753, PCI_ANY_ID, PCI_ANY_ID}, 1928 {PCI_VDEVICE(PLX, PCI_DEVICE_ID_PLX_R753) },
1929 {PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_DJINN_ITOO, PCI_ANY_ID, PCI_ANY_ID}, 1929 {PCI_VDEVICE(PLX, PCI_DEVICE_ID_PLX_DJINN_ITOO) },
1930 {PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_OLITEC, PCI_ANY_ID, PCI_ANY_ID}, 1930 {PCI_VDEVICE(PLX, PCI_DEVICE_ID_PLX_OLITEC) },
1931#endif 1931#endif
1932#ifdef CONFIG_HISAX_SCT_QUADRO 1932#ifdef CONFIG_HISAX_SCT_QUADRO
1933 {PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_ANY_ID, PCI_ANY_ID}, 1933 {PCI_VDEVICE(PLX, PCI_DEVICE_ID_PLX_9050) },
1934#endif 1934#endif
1935#ifdef CONFIG_HISAX_NICCY 1935#ifdef CONFIG_HISAX_NICCY
1936 {PCI_VENDOR_ID_SATSAGEM, PCI_DEVICE_ID_SATSAGEM_NICCY, PCI_ANY_ID,PCI_ANY_ID}, 1936 {PCI_VDEVICE(SATSAGEM, PCI_DEVICE_ID_SATSAGEM_NICCY) },
1937#endif 1937#endif
1938#ifdef CONFIG_HISAX_SEDLBAUER 1938#ifdef CONFIG_HISAX_SEDLBAUER
1939 {PCI_VENDOR_ID_TIGERJET, PCI_DEVICE_ID_TIGERJET_100, PCI_ANY_ID,PCI_ANY_ID}, 1939 {PCI_VDEVICE(TIGERJET, PCI_DEVICE_ID_TIGERJET_100) },
1940#endif 1940#endif
1941#if defined(CONFIG_HISAX_NETJET) || defined(CONFIG_HISAX_NETJET_U) 1941#if defined(CONFIG_HISAX_NETJET) || defined(CONFIG_HISAX_NETJET_U)
1942 {PCI_VENDOR_ID_TIGERJET, PCI_DEVICE_ID_TIGERJET_300, PCI_ANY_ID,PCI_ANY_ID}, 1942 {PCI_VDEVICE(TIGERJET, PCI_DEVICE_ID_TIGERJET_300) },
1943#endif 1943#endif
1944#if defined(CONFIG_HISAX_TELESPCI) || defined(CONFIG_HISAX_SCT_QUADRO) 1944#if defined(CONFIG_HISAX_TELESPCI) || defined(CONFIG_HISAX_SCT_QUADRO)
1945 {PCI_VENDOR_ID_ZORAN, PCI_DEVICE_ID_ZORAN_36120, PCI_ANY_ID,PCI_ANY_ID}, 1945 {PCI_VDEVICE(ZORAN, PCI_DEVICE_ID_ZORAN_36120) },
1946#endif 1946#endif
1947#ifdef CONFIG_HISAX_W6692 1947#ifdef CONFIG_HISAX_W6692
1948 {PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH, PCI_ANY_ID,PCI_ANY_ID}, 1948 {PCI_VDEVICE(DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH) },
1949 {PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, PCI_ANY_ID,PCI_ANY_ID}, 1949 {PCI_VDEVICE(WINBOND2, PCI_DEVICE_ID_WINBOND2_6692) },
1950#endif 1950#endif
1951#ifdef CONFIG_HISAX_HFC_PCI 1951#ifdef CONFIG_HISAX_HFC_PCI
1952 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_2BD0, PCI_ANY_ID, PCI_ANY_ID}, 1952 {PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_2BD0) },
1953 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B000, PCI_ANY_ID, PCI_ANY_ID}, 1953 {PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B000) },
1954 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B006, PCI_ANY_ID, PCI_ANY_ID}, 1954 {PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B006) },
1955 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B007, PCI_ANY_ID, PCI_ANY_ID}, 1955 {PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B007) },
1956 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B008, PCI_ANY_ID, PCI_ANY_ID}, 1956 {PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B008) },
1957 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B009, PCI_ANY_ID, PCI_ANY_ID}, 1957 {PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B009) },
1958 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B00A, PCI_ANY_ID, PCI_ANY_ID}, 1958 {PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B00A) },
1959 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B00B, PCI_ANY_ID, PCI_ANY_ID}, 1959 {PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B00B) },
1960 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B00C, PCI_ANY_ID, PCI_ANY_ID}, 1960 {PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B00C) },
1961 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B100, PCI_ANY_ID, PCI_ANY_ID}, 1961 {PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B100) },
1962 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B700, PCI_ANY_ID, PCI_ANY_ID}, 1962 {PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B700) },
1963 {PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_B701, PCI_ANY_ID, PCI_ANY_ID}, 1963 {PCI_VDEVICE(CCD, PCI_DEVICE_ID_CCD_B701) },
1964 {PCI_VENDOR_ID_ABOCOM, PCI_DEVICE_ID_ABOCOM_2BD1, PCI_ANY_ID, PCI_ANY_ID}, 1964 {PCI_VDEVICE(ABOCOM, PCI_DEVICE_ID_ABOCOM_2BD1) },
1965 {PCI_VENDOR_ID_ASUSTEK, PCI_DEVICE_ID_ASUSTEK_0675, PCI_ANY_ID, PCI_ANY_ID}, 1965 {PCI_VDEVICE(ASUSTEK, PCI_DEVICE_ID_ASUSTEK_0675) },
1966 {PCI_VENDOR_ID_BERKOM, PCI_DEVICE_ID_BERKOM_T_CONCEPT, PCI_ANY_ID, PCI_ANY_ID}, 1966 {PCI_VDEVICE(BERKOM, PCI_DEVICE_ID_BERKOM_T_CONCEPT) },
1967 {PCI_VENDOR_ID_BERKOM, PCI_DEVICE_ID_BERKOM_A1T, PCI_ANY_ID, PCI_ANY_ID}, 1967 {PCI_VDEVICE(BERKOM, PCI_DEVICE_ID_BERKOM_A1T) },
1968 {PCI_VENDOR_ID_ANIGMA, PCI_DEVICE_ID_ANIGMA_MC145575, PCI_ANY_ID, PCI_ANY_ID}, 1968 {PCI_VDEVICE(ANIGMA, PCI_DEVICE_ID_ANIGMA_MC145575) },
1969 {PCI_VENDOR_ID_ZOLTRIX, PCI_DEVICE_ID_ZOLTRIX_2BD0, PCI_ANY_ID, PCI_ANY_ID}, 1969 {PCI_VDEVICE(ZOLTRIX, PCI_DEVICE_ID_ZOLTRIX_2BD0) },
1970 {PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_E, PCI_ANY_ID, PCI_ANY_ID}, 1970 {PCI_VDEVICE(DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_E) },
1971 {PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_E, PCI_ANY_ID, PCI_ANY_ID}, 1971 {PCI_VDEVICE(DIGI, PCI_DEVICE_ID_DIGI_DF_M_E) },
1972 {PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_A, PCI_ANY_ID, PCI_ANY_ID}, 1972 {PCI_VDEVICE(DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_A) },
1973 {PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_A, PCI_ANY_ID, PCI_ANY_ID}, 1973 {PCI_VDEVICE(DIGI, PCI_DEVICE_ID_DIGI_DF_M_A) },
1974#endif 1974#endif
1975 { } /* Terminating entry */ 1975 { } /* Terminating entry */
1976}; 1976};
diff --git a/drivers/isdn/hisax/q931.c b/drivers/isdn/hisax/q931.c
index 8b853d58e820..c0771f98fa11 100644
--- a/drivers/isdn/hisax/q931.c
+++ b/drivers/isdn/hisax/q931.c
@@ -1152,20 +1152,11 @@ QuickHex(char *txt, u_char * p, int cnt)
1152{ 1152{
1153 register int i; 1153 register int i;
1154 register char *t = txt; 1154 register char *t = txt;
1155 register u_char w;
1156 1155
1157 for (i = 0; i < cnt; i++) { 1156 for (i = 0; i < cnt; i++) {
1158 *t++ = ' '; 1157 *t++ = ' ';
1159 w = (p[i] >> 4) & 0x0f; 1158 *t++ = hex_asc_hi(p[i]);
1160 if (w < 10) 1159 *t++ = hex_asc_lo(p[i]);
1161 *t++ = '0' + w;
1162 else
1163 *t++ = 'A' - 10 + w;
1164 w = p[i] & 0x0f;
1165 if (w < 10)
1166 *t++ = '0' + w;
1167 else
1168 *t++ = 'A' - 10 + w;
1169 } 1160 }
1170 *t++ = 0; 1161 *t++ = 0;
1171 return (t - txt); 1162 return (t - txt);
diff --git a/drivers/isdn/hisax/tei.c b/drivers/isdn/hisax/tei.c
index f4cb178b0666..842f9c9e875d 100644
--- a/drivers/isdn/hisax/tei.c
+++ b/drivers/isdn/hisax/tei.c
@@ -130,7 +130,7 @@ tei_id_request(struct FsmInst *fi, int event, void *arg)
130 130
131 if (st->l2.tei != -1) { 131 if (st->l2.tei != -1) {
132 st->ma.tei_m.printdebug(&st->ma.tei_m, 132 st->ma.tei_m.printdebug(&st->ma.tei_m,
133 "assign request for allready asigned tei %d", 133 "assign request for already asigned tei %d",
134 st->l2.tei); 134 st->l2.tei);
135 return; 135 return;
136 } 136 }
diff --git a/drivers/isdn/hysdn/hysdn_procconf.c b/drivers/isdn/hysdn/hysdn_procconf.c
index 80966462d6dc..96b3e39c3356 100644
--- a/drivers/isdn/hysdn/hysdn_procconf.c
+++ b/drivers/isdn/hysdn/hysdn_procconf.c
@@ -17,11 +17,12 @@
17#include <linux/proc_fs.h> 17#include <linux/proc_fs.h>
18#include <linux/pci.h> 18#include <linux/pci.h>
19#include <linux/slab.h> 19#include <linux/slab.h>
20#include <linux/smp_lock.h> 20#include <linux/mutex.h>
21#include <net/net_namespace.h> 21#include <net/net_namespace.h>
22 22
23#include "hysdn_defs.h" 23#include "hysdn_defs.h"
24 24
25static DEFINE_MUTEX(hysdn_conf_mutex);
25static char *hysdn_procconf_revision = "$Revision: 1.8.6.4 $"; 26static char *hysdn_procconf_revision = "$Revision: 1.8.6.4 $";
26 27
27#define INFO_OUT_LEN 80 /* length of info line including lf */ 28#define INFO_OUT_LEN 80 /* length of info line including lf */
@@ -234,7 +235,7 @@ hysdn_conf_open(struct inode *ino, struct file *filep)
234 char *cp, *tmp; 235 char *cp, *tmp;
235 236
236 /* now search the addressed card */ 237 /* now search the addressed card */
237 lock_kernel(); 238 mutex_lock(&hysdn_conf_mutex);
238 card = card_root; 239 card = card_root;
239 while (card) { 240 while (card) {
240 pd = card->procconf; 241 pd = card->procconf;
@@ -243,7 +244,7 @@ hysdn_conf_open(struct inode *ino, struct file *filep)
243 card = card->next; /* search next entry */ 244 card = card->next; /* search next entry */
244 } 245 }
245 if (!card) { 246 if (!card) {
246 unlock_kernel(); 247 mutex_unlock(&hysdn_conf_mutex);
247 return (-ENODEV); /* device is unknown/invalid */ 248 return (-ENODEV); /* device is unknown/invalid */
248 } 249 }
249 if (card->debug_flags & (LOG_PROC_OPEN | LOG_PROC_ALL)) 250 if (card->debug_flags & (LOG_PROC_OPEN | LOG_PROC_ALL))
@@ -255,7 +256,7 @@ hysdn_conf_open(struct inode *ino, struct file *filep)
255 /* write only access -> write boot file or conf line */ 256 /* write only access -> write boot file or conf line */
256 257
257 if (!(cnf = kmalloc(sizeof(struct conf_writedata), GFP_KERNEL))) { 258 if (!(cnf = kmalloc(sizeof(struct conf_writedata), GFP_KERNEL))) {
258 unlock_kernel(); 259 mutex_unlock(&hysdn_conf_mutex);
259 return (-EFAULT); 260 return (-EFAULT);
260 } 261 }
261 cnf->card = card; 262 cnf->card = card;
@@ -267,7 +268,7 @@ hysdn_conf_open(struct inode *ino, struct file *filep)
267 /* read access -> output card info data */ 268 /* read access -> output card info data */
268 269
269 if (!(tmp = kmalloc(INFO_OUT_LEN * 2 + 2, GFP_KERNEL))) { 270 if (!(tmp = kmalloc(INFO_OUT_LEN * 2 + 2, GFP_KERNEL))) {
270 unlock_kernel(); 271 mutex_unlock(&hysdn_conf_mutex);
271 return (-EFAULT); /* out of memory */ 272 return (-EFAULT); /* out of memory */
272 } 273 }
273 filep->private_data = tmp; /* start of string */ 274 filep->private_data = tmp; /* start of string */
@@ -301,10 +302,10 @@ hysdn_conf_open(struct inode *ino, struct file *filep)
301 *cp++ = '\n'; 302 *cp++ = '\n';
302 *cp = 0; /* end of string */ 303 *cp = 0; /* end of string */
303 } else { /* simultaneous read/write access forbidden ! */ 304 } else { /* simultaneous read/write access forbidden ! */
304 unlock_kernel(); 305 mutex_unlock(&hysdn_conf_mutex);
305 return (-EPERM); /* no permission this time */ 306 return (-EPERM); /* no permission this time */
306 } 307 }
307 unlock_kernel(); 308 mutex_unlock(&hysdn_conf_mutex);
308 return nonseekable_open(ino, filep); 309 return nonseekable_open(ino, filep);
309} /* hysdn_conf_open */ 310} /* hysdn_conf_open */
310 311
@@ -319,7 +320,7 @@ hysdn_conf_close(struct inode *ino, struct file *filep)
319 int retval = 0; 320 int retval = 0;
320 struct proc_dir_entry *pd; 321 struct proc_dir_entry *pd;
321 322
322 lock_kernel(); 323 mutex_lock(&hysdn_conf_mutex);
323 /* search the addressed card */ 324 /* search the addressed card */
324 card = card_root; 325 card = card_root;
325 while (card) { 326 while (card) {
@@ -329,7 +330,7 @@ hysdn_conf_close(struct inode *ino, struct file *filep)
329 card = card->next; /* search next entry */ 330 card = card->next; /* search next entry */
330 } 331 }
331 if (!card) { 332 if (!card) {
332 unlock_kernel(); 333 mutex_unlock(&hysdn_conf_mutex);
333 return (-ENODEV); /* device is unknown/invalid */ 334 return (-ENODEV); /* device is unknown/invalid */
334 } 335 }
335 if (card->debug_flags & (LOG_PROC_OPEN | LOG_PROC_ALL)) 336 if (card->debug_flags & (LOG_PROC_OPEN | LOG_PROC_ALL))
@@ -352,7 +353,7 @@ hysdn_conf_close(struct inode *ino, struct file *filep)
352 353
353 kfree(filep->private_data); /* release memory */ 354 kfree(filep->private_data); /* release memory */
354 } 355 }
355 unlock_kernel(); 356 mutex_unlock(&hysdn_conf_mutex);
356 return (retval); 357 return (retval);
357} /* hysdn_conf_close */ 358} /* hysdn_conf_close */
358 359
diff --git a/drivers/isdn/hysdn/hysdn_proclog.c b/drivers/isdn/hysdn/hysdn_proclog.c
index e83f6fda32fe..2ee93d04b2dd 100644
--- a/drivers/isdn/hysdn/hysdn_proclog.c
+++ b/drivers/isdn/hysdn/hysdn_proclog.c
@@ -15,13 +15,15 @@
15#include <linux/proc_fs.h> 15#include <linux/proc_fs.h>
16#include <linux/sched.h> 16#include <linux/sched.h>
17#include <linux/slab.h> 17#include <linux/slab.h>
18#include <linux/smp_lock.h> 18#include <linux/mutex.h>
19#include <linux/kernel.h>
19 20
20#include "hysdn_defs.h" 21#include "hysdn_defs.h"
21 22
22/* the proc subdir for the interface is defined in the procconf module */ 23/* the proc subdir for the interface is defined in the procconf module */
23extern struct proc_dir_entry *hysdn_proc_entry; 24extern struct proc_dir_entry *hysdn_proc_entry;
24 25
26static DEFINE_MUTEX(hysdn_log_mutex);
25static void put_log_buffer(hysdn_card * card, char *cp); 27static void put_log_buffer(hysdn_card * card, char *cp);
26 28
27/*************************************************/ 29/*************************************************/
@@ -154,10 +156,9 @@ static ssize_t
154hysdn_log_write(struct file *file, const char __user *buf, size_t count, loff_t * off) 156hysdn_log_write(struct file *file, const char __user *buf, size_t count, loff_t * off)
155{ 157{
156 unsigned long u = 0; 158 unsigned long u = 0;
157 int found = 0; 159 int rc;
158 unsigned char *cp, valbuf[128]; 160 unsigned char valbuf[128];
159 long base = 10; 161 hysdn_card *card = file->private_data;
160 hysdn_card *card = (hysdn_card *) file->private_data;
161 162
162 if (count > (sizeof(valbuf) - 1)) 163 if (count > (sizeof(valbuf) - 1))
163 count = sizeof(valbuf) - 1; /* limit length */ 164 count = sizeof(valbuf) - 1; /* limit length */
@@ -165,32 +166,10 @@ hysdn_log_write(struct file *file, const char __user *buf, size_t count, loff_t
165 return (-EFAULT); /* copy failed */ 166 return (-EFAULT); /* copy failed */
166 167
167 valbuf[count] = 0; /* terminating 0 */ 168 valbuf[count] = 0; /* terminating 0 */
168 cp = valbuf;
169 if ((count > 2) && (valbuf[0] == '0') && (valbuf[1] == 'x')) {
170 cp += 2; /* pointer after hex modifier */
171 base = 16;
172 }
173 /* scan the input for debug flags */
174 while (*cp) {
175 if ((*cp >= '0') && (*cp <= '9')) {
176 found = 1;
177 u *= base; /* adjust to next digit */
178 u += *cp++ - '0';
179 continue;
180 }
181 if (base != 16)
182 break; /* end of number */
183
184 if ((*cp >= 'a') && (*cp <= 'f')) {
185 found = 1;
186 u *= base; /* adjust to next digit */
187 u += *cp++ - 'a' + 10;
188 continue;
189 }
190 break; /* terminated */
191 }
192 169
193 if (found) { 170 rc = strict_strtoul(valbuf, 0, &u);
171
172 if (rc == 0) {
194 card->debug_flags = u; /* remember debug flags */ 173 card->debug_flags = u; /* remember debug flags */
195 hysdn_addlog(card, "debug set to 0x%lx", card->debug_flags); 174 hysdn_addlog(card, "debug set to 0x%lx", card->debug_flags);
196 } 175 }
@@ -251,7 +230,7 @@ hysdn_log_open(struct inode *ino, struct file *filep)
251 struct procdata *pd = NULL; 230 struct procdata *pd = NULL;
252 unsigned long flags; 231 unsigned long flags;
253 232
254 lock_kernel(); 233 mutex_lock(&hysdn_log_mutex);
255 card = card_root; 234 card = card_root;
256 while (card) { 235 while (card) {
257 pd = card->proclog; 236 pd = card->proclog;
@@ -260,7 +239,7 @@ hysdn_log_open(struct inode *ino, struct file *filep)
260 card = card->next; /* search next entry */ 239 card = card->next; /* search next entry */
261 } 240 }
262 if (!card) { 241 if (!card) {
263 unlock_kernel(); 242 mutex_unlock(&hysdn_log_mutex);
264 return (-ENODEV); /* device is unknown/invalid */ 243 return (-ENODEV); /* device is unknown/invalid */
265 } 244 }
266 filep->private_data = card; /* remember our own card */ 245 filep->private_data = card; /* remember our own card */
@@ -278,10 +257,10 @@ hysdn_log_open(struct inode *ino, struct file *filep)
278 filep->private_data = &pd->log_head; 257 filep->private_data = &pd->log_head;
279 spin_unlock_irqrestore(&card->hysdn_lock, flags); 258 spin_unlock_irqrestore(&card->hysdn_lock, flags);
280 } else { /* simultaneous read/write access forbidden ! */ 259 } else { /* simultaneous read/write access forbidden ! */
281 unlock_kernel(); 260 mutex_unlock(&hysdn_log_mutex);
282 return (-EPERM); /* no permission this time */ 261 return (-EPERM); /* no permission this time */
283 } 262 }
284 unlock_kernel(); 263 mutex_unlock(&hysdn_log_mutex);
285 return nonseekable_open(ino, filep); 264 return nonseekable_open(ino, filep);
286} /* hysdn_log_open */ 265} /* hysdn_log_open */
287 266
@@ -300,7 +279,7 @@ hysdn_log_close(struct inode *ino, struct file *filep)
300 hysdn_card *card; 279 hysdn_card *card;
301 int retval = 0; 280 int retval = 0;
302 281
303 lock_kernel(); 282 mutex_lock(&hysdn_log_mutex);
304 if ((filep->f_mode & (FMODE_READ | FMODE_WRITE)) == FMODE_WRITE) { 283 if ((filep->f_mode & (FMODE_READ | FMODE_WRITE)) == FMODE_WRITE) {
305 /* write only access -> write debug level written */ 284 /* write only access -> write debug level written */
306 retval = 0; /* success */ 285 retval = 0; /* success */
@@ -339,7 +318,7 @@ hysdn_log_close(struct inode *ino, struct file *filep)
339 kfree(inf); 318 kfree(inf);
340 } 319 }
341 } /* read access */ 320 } /* read access */
342 unlock_kernel(); 321 mutex_unlock(&hysdn_log_mutex);
343 322
344 return (retval); 323 return (retval);
345} /* hysdn_log_close */ 324} /* hysdn_log_close */
diff --git a/drivers/isdn/i4l/isdn_common.c b/drivers/isdn/i4l/isdn_common.c
index a44cdb492ea9..15632bd2f643 100644
--- a/drivers/isdn/i4l/isdn_common.c
+++ b/drivers/isdn/i4l/isdn_common.c
@@ -17,7 +17,7 @@
17#include <linux/slab.h> 17#include <linux/slab.h>
18#include <linux/vmalloc.h> 18#include <linux/vmalloc.h>
19#include <linux/isdn.h> 19#include <linux/isdn.h>
20#include <linux/smp_lock.h> 20#include <linux/mutex.h>
21#include "isdn_common.h" 21#include "isdn_common.h"
22#include "isdn_tty.h" 22#include "isdn_tty.h"
23#include "isdn_net.h" 23#include "isdn_net.h"
@@ -42,6 +42,7 @@ MODULE_LICENSE("GPL");
42 42
43isdn_dev *dev; 43isdn_dev *dev;
44 44
45static DEFINE_MUTEX(isdn_mutex);
45static char *isdn_revision = "$Revision: 1.1.2.3 $"; 46static char *isdn_revision = "$Revision: 1.1.2.3 $";
46 47
47extern char *isdn_net_revision; 48extern char *isdn_net_revision;
@@ -1070,7 +1071,7 @@ isdn_read(struct file *file, char __user *buf, size_t count, loff_t * off)
1070 int retval; 1071 int retval;
1071 char *p; 1072 char *p;
1072 1073
1073 lock_kernel(); 1074 mutex_lock(&isdn_mutex);
1074 if (minor == ISDN_MINOR_STATUS) { 1075 if (minor == ISDN_MINOR_STATUS) {
1075 if (!file->private_data) { 1076 if (!file->private_data) {
1076 if (file->f_flags & O_NONBLOCK) { 1077 if (file->f_flags & O_NONBLOCK) {
@@ -1163,7 +1164,7 @@ isdn_read(struct file *file, char __user *buf, size_t count, loff_t * off)
1163#endif 1164#endif
1164 retval = -ENODEV; 1165 retval = -ENODEV;
1165 out: 1166 out:
1166 unlock_kernel(); 1167 mutex_unlock(&isdn_mutex);
1167 return retval; 1168 return retval;
1168} 1169}
1169 1170
@@ -1180,7 +1181,7 @@ isdn_write(struct file *file, const char __user *buf, size_t count, loff_t * off
1180 if (!dev->drivers) 1181 if (!dev->drivers)
1181 return -ENODEV; 1182 return -ENODEV;
1182 1183
1183 lock_kernel(); 1184 mutex_lock(&isdn_mutex);
1184 if (minor <= ISDN_MINOR_BMAX) { 1185 if (minor <= ISDN_MINOR_BMAX) {
1185 printk(KERN_WARNING "isdn_write minor %d obsolete!\n", minor); 1186 printk(KERN_WARNING "isdn_write minor %d obsolete!\n", minor);
1186 drvidx = isdn_minor2drv(minor); 1187 drvidx = isdn_minor2drv(minor);
@@ -1225,7 +1226,7 @@ isdn_write(struct file *file, const char __user *buf, size_t count, loff_t * off
1225#endif 1226#endif
1226 retval = -ENODEV; 1227 retval = -ENODEV;
1227 out: 1228 out:
1228 unlock_kernel(); 1229 mutex_unlock(&isdn_mutex);
1229 return retval; 1230 return retval;
1230} 1231}
1231 1232
@@ -1236,7 +1237,7 @@ isdn_poll(struct file *file, poll_table * wait)
1236 unsigned int minor = iminor(file->f_path.dentry->d_inode); 1237 unsigned int minor = iminor(file->f_path.dentry->d_inode);
1237 int drvidx = isdn_minor2drv(minor - ISDN_MINOR_CTRL); 1238 int drvidx = isdn_minor2drv(minor - ISDN_MINOR_CTRL);
1238 1239
1239 lock_kernel(); 1240 mutex_lock(&isdn_mutex);
1240 if (minor == ISDN_MINOR_STATUS) { 1241 if (minor == ISDN_MINOR_STATUS) {
1241 poll_wait(file, &(dev->info_waitq), wait); 1242 poll_wait(file, &(dev->info_waitq), wait);
1242 /* mask = POLLOUT | POLLWRNORM; */ 1243 /* mask = POLLOUT | POLLWRNORM; */
@@ -1266,7 +1267,7 @@ isdn_poll(struct file *file, poll_table * wait)
1266#endif 1267#endif
1267 mask = POLLERR; 1268 mask = POLLERR;
1268 out: 1269 out:
1269 unlock_kernel(); 1270 mutex_unlock(&isdn_mutex);
1270 return mask; 1271 return mask;
1271} 1272}
1272 1273
@@ -1727,9 +1728,9 @@ isdn_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1727{ 1728{
1728 int ret; 1729 int ret;
1729 1730
1730 lock_kernel(); 1731 mutex_lock(&isdn_mutex);
1731 ret = isdn_ioctl(file, cmd, arg); 1732 ret = isdn_ioctl(file, cmd, arg);
1732 unlock_kernel(); 1733 mutex_unlock(&isdn_mutex);
1733 1734
1734 return ret; 1735 return ret;
1735} 1736}
@@ -1745,7 +1746,7 @@ isdn_open(struct inode *ino, struct file *filep)
1745 int chidx; 1746 int chidx;
1746 int retval = -ENODEV; 1747 int retval = -ENODEV;
1747 1748
1748 lock_kernel(); 1749 mutex_lock(&isdn_mutex);
1749 if (minor == ISDN_MINOR_STATUS) { 1750 if (minor == ISDN_MINOR_STATUS) {
1750 infostruct *p; 1751 infostruct *p;
1751 1752
@@ -1796,7 +1797,7 @@ isdn_open(struct inode *ino, struct file *filep)
1796#endif 1797#endif
1797 out: 1798 out:
1798 nonseekable_open(ino, filep); 1799 nonseekable_open(ino, filep);
1799 unlock_kernel(); 1800 mutex_unlock(&isdn_mutex);
1800 return retval; 1801 return retval;
1801} 1802}
1802 1803
@@ -1805,7 +1806,7 @@ isdn_close(struct inode *ino, struct file *filep)
1805{ 1806{
1806 uint minor = iminor(ino); 1807 uint minor = iminor(ino);
1807 1808
1808 lock_kernel(); 1809 mutex_lock(&isdn_mutex);
1809 if (minor == ISDN_MINOR_STATUS) { 1810 if (minor == ISDN_MINOR_STATUS) {
1810 infostruct *p = dev->infochain; 1811 infostruct *p = dev->infochain;
1811 infostruct *q = NULL; 1812 infostruct *q = NULL;
@@ -1839,7 +1840,7 @@ isdn_close(struct inode *ino, struct file *filep)
1839#endif 1840#endif
1840 1841
1841 out: 1842 out:
1842 unlock_kernel(); 1843 mutex_unlock(&isdn_mutex);
1843 return 0; 1844 return 0;
1844} 1845}
1845 1846
diff --git a/drivers/isdn/i4l/isdn_net.c b/drivers/isdn/i4l/isdn_net.c
index 8c85d1e88cc6..26d44c3ca1d8 100644
--- a/drivers/isdn/i4l/isdn_net.c
+++ b/drivers/isdn/i4l/isdn_net.c
@@ -2924,16 +2924,17 @@ isdn_net_getcfg(isdn_net_ioctl_cfg * cfg)
2924 cfg->dialtimeout = lp->dialtimeout >= 0 ? lp->dialtimeout / HZ : -1; 2924 cfg->dialtimeout = lp->dialtimeout >= 0 ? lp->dialtimeout / HZ : -1;
2925 cfg->dialwait = lp->dialwait / HZ; 2925 cfg->dialwait = lp->dialwait / HZ;
2926 if (lp->slave) { 2926 if (lp->slave) {
2927 if (strlen(lp->slave->name) > 8) 2927 if (strlen(lp->slave->name) >= 10)
2928 strcpy(cfg->slave, "too-long"); 2928 strcpy(cfg->slave, "too-long");
2929 else 2929 else
2930 strcpy(cfg->slave, lp->slave->name); 2930 strcpy(cfg->slave, lp->slave->name);
2931 } else 2931 } else
2932 cfg->slave[0] = '\0'; 2932 cfg->slave[0] = '\0';
2933 if (lp->master) { 2933 if (lp->master) {
2934 if (strlen(lp->master->name) > 8) 2934 if (strlen(lp->master->name) >= 10)
2935 strcpy(cfg->master, "too-long"); 2935 strcpy(cfg->master, "too-long");
2936 strcpy(cfg->master, lp->master->name); 2936 else
2937 strcpy(cfg->master, lp->master->name);
2937 } else 2938 } else
2938 cfg->master[0] = '\0'; 2939 cfg->master[0] = '\0';
2939 return 0; 2940 return 0;
diff --git a/drivers/isdn/i4l/isdn_ppp.c b/drivers/isdn/i4l/isdn_ppp.c
index f37b8f68d0aa..fe824e0cbb25 100644
--- a/drivers/isdn/i4l/isdn_ppp.c
+++ b/drivers/isdn/i4l/isdn_ppp.c
@@ -449,14 +449,9 @@ static int get_filter(void __user *arg, struct sock_filter **p)
449 449
450 /* uprog.len is unsigned short, so no overflow here */ 450 /* uprog.len is unsigned short, so no overflow here */
451 len = uprog.len * sizeof(struct sock_filter); 451 len = uprog.len * sizeof(struct sock_filter);
452 code = kmalloc(len, GFP_KERNEL); 452 code = memdup_user(uprog.filter, len);
453 if (code == NULL) 453 if (IS_ERR(code))
454 return -ENOMEM; 454 return PTR_ERR(code);
455
456 if (copy_from_user(code, uprog.filter, len)) {
457 kfree(code);
458 return -EFAULT;
459 }
460 455
461 err = sk_chk_filter(code, uprog.len); 456 err = sk_chk_filter(code, uprog.len);
462 if (err) { 457 if (err) {
@@ -482,7 +477,7 @@ isdn_ppp_ioctl(int min, struct file *file, unsigned int cmd, unsigned long arg)
482 struct isdn_ppp_comp_data data; 477 struct isdn_ppp_comp_data data;
483 void __user *argp = (void __user *)arg; 478 void __user *argp = (void __user *)arg;
484 479
485 is = (struct ippp_struct *) file->private_data; 480 is = file->private_data;
486 lp = is->lp; 481 lp = is->lp;
487 482
488 if (is->debug & 0x1) 483 if (is->debug & 0x1)
diff --git a/drivers/isdn/i4l/isdn_tty.c b/drivers/isdn/i4l/isdn_tty.c
index fc8454d2eea5..51dc60da333b 100644
--- a/drivers/isdn/i4l/isdn_tty.c
+++ b/drivers/isdn/i4l/isdn_tty.c
@@ -2636,12 +2636,6 @@ isdn_tty_modem_result(int code, modem_info * info)
2636 if ((info->flags & ISDN_ASYNC_CLOSING) || (!info->tty)) { 2636 if ((info->flags & ISDN_ASYNC_CLOSING) || (!info->tty)) {
2637 return; 2637 return;
2638 } 2638 }
2639#ifdef CONFIG_ISDN_AUDIO
2640 if ( !info->vonline )
2641 tty_ldisc_flush(info->tty);
2642#else
2643 tty_ldisc_flush(info->tty);
2644#endif
2645 if ((info->flags & ISDN_ASYNC_CHECK_CD) && 2639 if ((info->flags & ISDN_ASYNC_CHECK_CD) &&
2646 (!((info->flags & ISDN_ASYNC_CALLOUT_ACTIVE) && 2640 (!((info->flags & ISDN_ASYNC_CALLOUT_ACTIVE) &&
2647 (info->flags & ISDN_ASYNC_CALLOUT_NOHUP)))) { 2641 (info->flags & ISDN_ASYNC_CALLOUT_NOHUP)))) {
diff --git a/drivers/isdn/mISDN/tei.c b/drivers/isdn/mISDN/tei.c
index 34e898fe2f4f..1b85d9d27496 100644
--- a/drivers/isdn/mISDN/tei.c
+++ b/drivers/isdn/mISDN/tei.c
@@ -457,7 +457,7 @@ tei_id_request(struct FsmInst *fi, int event, void *arg)
457 457
458 if (tm->l2->tei != GROUP_TEI) { 458 if (tm->l2->tei != GROUP_TEI) {
459 tm->tei_m.printdebug(&tm->tei_m, 459 tm->tei_m.printdebug(&tm->tei_m,
460 "assign request for allready assigned tei %d", 460 "assign request for already assigned tei %d",
461 tm->l2->tei); 461 tm->l2->tei);
462 return; 462 return;
463 } 463 }
diff --git a/drivers/isdn/mISDN/timerdev.c b/drivers/isdn/mISDN/timerdev.c
index 81048b8ed8ad..de43c8c70ad0 100644
--- a/drivers/isdn/mISDN/timerdev.c
+++ b/drivers/isdn/mISDN/timerdev.c
@@ -24,9 +24,10 @@
24#include <linux/miscdevice.h> 24#include <linux/miscdevice.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/mISDNif.h> 26#include <linux/mISDNif.h>
27#include <linux/smp_lock.h> 27#include <linux/mutex.h>
28#include "core.h" 28#include "core.h"
29 29
30static DEFINE_MUTEX(mISDN_mutex);
30static u_int *debug; 31static u_int *debug;
31 32
32 33
@@ -224,7 +225,7 @@ mISDN_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
224 if (*debug & DEBUG_TIMER) 225 if (*debug & DEBUG_TIMER)
225 printk(KERN_DEBUG "%s(%p, %x, %lx)\n", __func__, 226 printk(KERN_DEBUG "%s(%p, %x, %lx)\n", __func__,
226 filep, cmd, arg); 227 filep, cmd, arg);
227 lock_kernel(); 228 mutex_lock(&mISDN_mutex);
228 switch (cmd) { 229 switch (cmd) {
229 case IMADDTIMER: 230 case IMADDTIMER:
230 if (get_user(tout, (int __user *)arg)) { 231 if (get_user(tout, (int __user *)arg)) {
@@ -256,7 +257,7 @@ mISDN_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
256 default: 257 default:
257 ret = -EINVAL; 258 ret = -EINVAL;
258 } 259 }
259 unlock_kernel(); 260 mutex_unlock(&mISDN_mutex);
260 return ret; 261 return ret;
261} 262}
262 263
diff --git a/drivers/isdn/pcbit/drv.c b/drivers/isdn/pcbit/drv.c
index 123c1d6c43b4..1507d2e83fbb 100644
--- a/drivers/isdn/pcbit/drv.c
+++ b/drivers/isdn/pcbit/drv.c
@@ -411,14 +411,10 @@ static int pcbit_writecmd(const u_char __user *buf, int len, int driver, int cha
411 return -EINVAL; 411 return -EINVAL;
412 } 412 }
413 413
414 cbuf = kmalloc(len, GFP_KERNEL); 414 cbuf = memdup_user(buf, len);
415 if (!cbuf) 415 if (IS_ERR(cbuf))
416 return -ENOMEM; 416 return PTR_ERR(cbuf);
417 417
418 if (copy_from_user(cbuf, buf, len)) {
419 kfree(cbuf);
420 return -EFAULT;
421 }
422 memcpy_toio(dev->sh_mem, cbuf, len); 418 memcpy_toio(dev->sh_mem, cbuf, len);
423 kfree(cbuf); 419 kfree(cbuf);
424 return len; 420 return len;
diff --git a/drivers/isdn/sc/ioctl.c b/drivers/isdn/sc/ioctl.c
index 1081091bbfaf..43c5dc3516e5 100644
--- a/drivers/isdn/sc/ioctl.c
+++ b/drivers/isdn/sc/ioctl.c
@@ -215,19 +215,13 @@ int sc_ioctl(int card, scs_ioctl *data)
215 pr_debug("%s: DCBIOSETSPID: ioctl received\n", 215 pr_debug("%s: DCBIOSETSPID: ioctl received\n",
216 sc_adapter[card]->devicename); 216 sc_adapter[card]->devicename);
217 217
218 spid = kmalloc(SCIOC_SPIDSIZE, GFP_KERNEL);
219 if(!spid) {
220 kfree(rcvmsg);
221 return -ENOMEM;
222 }
223
224 /* 218 /*
225 * Get the spid from user space 219 * Get the spid from user space
226 */ 220 */
227 if (copy_from_user(spid, data->dataptr, SCIOC_SPIDSIZE)) { 221 spid = memdup_user(data->dataptr, SCIOC_SPIDSIZE);
222 if (IS_ERR(spid)) {
228 kfree(rcvmsg); 223 kfree(rcvmsg);
229 kfree(spid); 224 return PTR_ERR(spid);
230 return -EFAULT;
231 } 225 }
232 226
233 pr_debug("%s: SCIOCSETSPID: setting channel %d spid to %s\n", 227 pr_debug("%s: SCIOCSETSPID: setting channel %d spid to %s\n",
@@ -296,18 +290,13 @@ int sc_ioctl(int card, scs_ioctl *data)
296 pr_debug("%s: SCIOSETDN: ioctl received\n", 290 pr_debug("%s: SCIOSETDN: ioctl received\n",
297 sc_adapter[card]->devicename); 291 sc_adapter[card]->devicename);
298 292
299 dn = kmalloc(SCIOC_DNSIZE, GFP_KERNEL);
300 if (!dn) {
301 kfree(rcvmsg);
302 return -ENOMEM;
303 }
304 /* 293 /*
305 * Get the spid from user space 294 * Get the spid from user space
306 */ 295 */
307 if (copy_from_user(dn, data->dataptr, SCIOC_DNSIZE)) { 296 dn = memdup_user(data->dataptr, SCIOC_DNSIZE);
297 if (IS_ERR(dn)) {
308 kfree(rcvmsg); 298 kfree(rcvmsg);
309 kfree(dn); 299 return PTR_ERR(dn);
310 return -EFAULT;
311 } 300 }
312 301
313 pr_debug("%s: SCIOCSETDN: setting channel %d dn to %s\n", 302 pr_debug("%s: SCIOCSETDN: setting channel %d dn to %s\n",
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index 81bf25e67ce1..e4112622e5a2 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -302,6 +302,15 @@ config LEDS_MC13783
302 This option enable support for on-chip LED drivers found 302 This option enable support for on-chip LED drivers found
303 on Freescale Semiconductor MC13783 PMIC. 303 on Freescale Semiconductor MC13783 PMIC.
304 304
305config LEDS_NS2
306 tristate "LED support for Network Space v2 GPIO LEDs"
307 depends on MACH_NETSPACE_V2 || MACH_INETSPACE_V2 || MACH_NETSPACE_MAX_V2
308 default y
309 help
310 This option enable support for the dual-GPIO LED found on the
311 Network Space v2 board (and parents). This include Internet Space v2,
312 Network Space (Max) v2 and d2 Network v2 boards.
313
305config LEDS_TRIGGERS 314config LEDS_TRIGGERS
306 bool "LED Trigger support" 315 bool "LED Trigger support"
307 help 316 help
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
index 2493de499374..7d6b95831f8e 100644
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -37,6 +37,7 @@ obj-$(CONFIG_LEDS_LT3593) += leds-lt3593.o
37obj-$(CONFIG_LEDS_ADP5520) += leds-adp5520.o 37obj-$(CONFIG_LEDS_ADP5520) += leds-adp5520.o
38obj-$(CONFIG_LEDS_DELL_NETBOOKS) += dell-led.o 38obj-$(CONFIG_LEDS_DELL_NETBOOKS) += dell-led.o
39obj-$(CONFIG_LEDS_MC13783) += leds-mc13783.o 39obj-$(CONFIG_LEDS_MC13783) += leds-mc13783.o
40obj-$(CONFIG_LEDS_NS2) += leds-ns2.o
40 41
41# LED SPI Drivers 42# LED SPI Drivers
42obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o 43obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o
diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c
new file mode 100644
index 000000000000..74dce4ba0262
--- /dev/null
+++ b/drivers/leds/leds-ns2.c
@@ -0,0 +1,338 @@
1/*
2 * leds-ns2.c - Driver for the Network Space v2 (and parents) dual-GPIO LED
3 *
4 * Copyright (C) 2010 LaCie
5 *
6 * Author: Simon Guinot <sguinot@lacie.com>
7 *
8 * Based on leds-gpio.c by Raphael Assenat <raph@8d.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 */
24
25#include <linux/kernel.h>
26#include <linux/init.h>
27#include <linux/platform_device.h>
28#include <linux/slab.h>
29#include <linux/gpio.h>
30#include <linux/leds.h>
31#include <mach/leds-ns2.h>
32
33/*
34 * The Network Space v2 dual-GPIO LED is wired to a CPLD and can blink in
35 * relation with the SATA activity. This capability is exposed through the
36 * "sata" sysfs attribute.
37 *
38 * The following array detail the different LED registers and the combination
39 * of their possible values:
40 *
41 * cmd_led | slow_led | /SATA active | LED state
42 * | | |
43 * 1 | 0 | x | off
44 * - | 1 | x | on
45 * 0 | 0 | 1 | on
46 * 0 | 0 | 0 | blink (rate 300ms)
47 */
48
49enum ns2_led_modes {
50 NS_V2_LED_OFF,
51 NS_V2_LED_ON,
52 NS_V2_LED_SATA,
53};
54
55struct ns2_led_mode_value {
56 enum ns2_led_modes mode;
57 int cmd_level;
58 int slow_level;
59};
60
61static struct ns2_led_mode_value ns2_led_modval[] = {
62 { NS_V2_LED_OFF , 1, 0 },
63 { NS_V2_LED_ON , 0, 1 },
64 { NS_V2_LED_ON , 1, 1 },
65 { NS_V2_LED_SATA, 0, 0 },
66};
67
68struct ns2_led_data {
69 struct led_classdev cdev;
70 unsigned cmd;
71 unsigned slow;
72 unsigned char sata; /* True when SATA mode active. */
73 rwlock_t rw_lock; /* Lock GPIOs. */
74};
75
76static int ns2_led_get_mode(struct ns2_led_data *led_dat,
77 enum ns2_led_modes *mode)
78{
79 int i;
80 int ret = -EINVAL;
81 int cmd_level;
82 int slow_level;
83
84 read_lock(&led_dat->rw_lock);
85
86 cmd_level = gpio_get_value(led_dat->cmd);
87 slow_level = gpio_get_value(led_dat->slow);
88
89 for (i = 0; i < ARRAY_SIZE(ns2_led_modval); i++) {
90 if (cmd_level == ns2_led_modval[i].cmd_level &&
91 slow_level == ns2_led_modval[i].slow_level) {
92 *mode = ns2_led_modval[i].mode;
93 ret = 0;
94 break;
95 }
96 }
97
98 read_unlock(&led_dat->rw_lock);
99
100 return ret;
101}
102
103static void ns2_led_set_mode(struct ns2_led_data *led_dat,
104 enum ns2_led_modes mode)
105{
106 int i;
107
108 write_lock(&led_dat->rw_lock);
109
110 for (i = 0; i < ARRAY_SIZE(ns2_led_modval); i++) {
111 if (mode == ns2_led_modval[i].mode) {
112 gpio_set_value(led_dat->cmd,
113 ns2_led_modval[i].cmd_level);
114 gpio_set_value(led_dat->slow,
115 ns2_led_modval[i].slow_level);
116 }
117 }
118
119 write_unlock(&led_dat->rw_lock);
120}
121
122static void ns2_led_set(struct led_classdev *led_cdev,
123 enum led_brightness value)
124{
125 struct ns2_led_data *led_dat =
126 container_of(led_cdev, struct ns2_led_data, cdev);
127 enum ns2_led_modes mode;
128
129 if (value == LED_OFF)
130 mode = NS_V2_LED_OFF;
131 else if (led_dat->sata)
132 mode = NS_V2_LED_SATA;
133 else
134 mode = NS_V2_LED_ON;
135
136 ns2_led_set_mode(led_dat, mode);
137}
138
139static ssize_t ns2_led_sata_store(struct device *dev,
140 struct device_attribute *attr,
141 const char *buff, size_t count)
142{
143 int ret;
144 unsigned long enable;
145 enum ns2_led_modes mode;
146 struct ns2_led_data *led_dat = dev_get_drvdata(dev);
147
148 ret = strict_strtoul(buff, 10, &enable);
149 if (ret < 0)
150 return ret;
151
152 enable = !!enable;
153
154 if (led_dat->sata == enable)
155 return count;
156
157 ret = ns2_led_get_mode(led_dat, &mode);
158 if (ret < 0)
159 return ret;
160
161 if (enable && mode == NS_V2_LED_ON)
162 ns2_led_set_mode(led_dat, NS_V2_LED_SATA);
163 if (!enable && mode == NS_V2_LED_SATA)
164 ns2_led_set_mode(led_dat, NS_V2_LED_ON);
165
166 led_dat->sata = enable;
167
168 return count;
169}
170
171static ssize_t ns2_led_sata_show(struct device *dev,
172 struct device_attribute *attr, char *buf)
173{
174 struct ns2_led_data *led_dat = dev_get_drvdata(dev);
175
176 return sprintf(buf, "%d\n", led_dat->sata);
177}
178
179static DEVICE_ATTR(sata, 0644, ns2_led_sata_show, ns2_led_sata_store);
180
181static int __devinit
182create_ns2_led(struct platform_device *pdev, struct ns2_led_data *led_dat,
183 const struct ns2_led *template)
184{
185 int ret;
186 enum ns2_led_modes mode;
187
188 ret = gpio_request(template->cmd, template->name);
189 if (ret == 0) {
190 ret = gpio_direction_output(template->cmd,
191 gpio_get_value(template->cmd));
192 if (ret)
193 gpio_free(template->cmd);
194 }
195 if (ret) {
196 dev_err(&pdev->dev, "%s: failed to setup command GPIO\n",
197 template->name);
198 }
199
200 ret = gpio_request(template->slow, template->name);
201 if (ret == 0) {
202 ret = gpio_direction_output(template->slow,
203 gpio_get_value(template->slow));
204 if (ret)
205 gpio_free(template->slow);
206 }
207 if (ret) {
208 dev_err(&pdev->dev, "%s: failed to setup slow GPIO\n",
209 template->name);
210 goto err_free_cmd;
211 }
212
213 rwlock_init(&led_dat->rw_lock);
214
215 led_dat->cdev.name = template->name;
216 led_dat->cdev.default_trigger = template->default_trigger;
217 led_dat->cdev.blink_set = NULL;
218 led_dat->cdev.brightness_set = ns2_led_set;
219 led_dat->cdev.flags |= LED_CORE_SUSPENDRESUME;
220 led_dat->cmd = template->cmd;
221 led_dat->slow = template->slow;
222
223 ret = ns2_led_get_mode(led_dat, &mode);
224 if (ret < 0)
225 goto err_free_slow;
226
227 /* Set LED initial state. */
228 led_dat->sata = (mode == NS_V2_LED_SATA) ? 1 : 0;
229 led_dat->cdev.brightness =
230 (mode == NS_V2_LED_OFF) ? LED_OFF : LED_FULL;
231
232 ret = led_classdev_register(&pdev->dev, &led_dat->cdev);
233 if (ret < 0)
234 goto err_free_slow;
235
236 dev_set_drvdata(led_dat->cdev.dev, led_dat);
237 ret = device_create_file(led_dat->cdev.dev, &dev_attr_sata);
238 if (ret < 0)
239 goto err_free_cdev;
240
241 return 0;
242
243err_free_cdev:
244 led_classdev_unregister(&led_dat->cdev);
245err_free_slow:
246 gpio_free(led_dat->slow);
247err_free_cmd:
248 gpio_free(led_dat->cmd);
249
250 return ret;
251}
252
253static void __devexit delete_ns2_led(struct ns2_led_data *led_dat)
254{
255 device_remove_file(led_dat->cdev.dev, &dev_attr_sata);
256 led_classdev_unregister(&led_dat->cdev);
257 gpio_free(led_dat->cmd);
258 gpio_free(led_dat->slow);
259}
260
261static int __devinit ns2_led_probe(struct platform_device *pdev)
262{
263 struct ns2_led_platform_data *pdata = pdev->dev.platform_data;
264 struct ns2_led_data *leds_data;
265 int i;
266 int ret;
267
268 if (!pdata)
269 return -EINVAL;
270
271 leds_data = kzalloc(sizeof(struct ns2_led_data) *
272 pdata->num_leds, GFP_KERNEL);
273 if (!leds_data)
274 return -ENOMEM;
275
276 for (i = 0; i < pdata->num_leds; i++) {
277 ret = create_ns2_led(pdev, &leds_data[i], &pdata->leds[i]);
278 if (ret < 0)
279 goto err;
280
281 }
282
283 platform_set_drvdata(pdev, leds_data);
284
285 return 0;
286
287err:
288 for (i = i - 1; i >= 0; i--)
289 delete_ns2_led(&leds_data[i]);
290
291 kfree(leds_data);
292
293 return ret;
294}
295
296static int __devexit ns2_led_remove(struct platform_device *pdev)
297{
298 int i;
299 struct ns2_led_platform_data *pdata = pdev->dev.platform_data;
300 struct ns2_led_data *leds_data;
301
302 leds_data = platform_get_drvdata(pdev);
303
304 for (i = 0; i < pdata->num_leds; i++)
305 delete_ns2_led(&leds_data[i]);
306
307 kfree(leds_data);
308 platform_set_drvdata(pdev, NULL);
309
310 return 0;
311}
312
313static struct platform_driver ns2_led_driver = {
314 .probe = ns2_led_probe,
315 .remove = __devexit_p(ns2_led_remove),
316 .driver = {
317 .name = "leds-ns2",
318 .owner = THIS_MODULE,
319 },
320};
321MODULE_ALIAS("platform:leds-ns2");
322
323static int __init ns2_led_init(void)
324{
325 return platform_driver_register(&ns2_led_driver);
326}
327
328static void __exit ns2_led_exit(void)
329{
330 platform_driver_unregister(&ns2_led_driver);
331}
332
333module_init(ns2_led_init);
334module_exit(ns2_led_exit);
335
336MODULE_AUTHOR("Simon Guinot <sguinot@lacie.com>");
337MODULE_DESCRIPTION("Network Space v2 LED driver");
338MODULE_LICENSE("GPL");
diff --git a/drivers/macintosh/macio_sysfs.c b/drivers/macintosh/macio_sysfs.c
index 6999ce59fd10..6024038a5b9d 100644
--- a/drivers/macintosh/macio_sysfs.c
+++ b/drivers/macintosh/macio_sysfs.c
@@ -41,10 +41,7 @@ compatible_show (struct device *dev, struct device_attribute *attr, char *buf)
41static ssize_t modalias_show (struct device *dev, struct device_attribute *attr, 41static ssize_t modalias_show (struct device *dev, struct device_attribute *attr,
42 char *buf) 42 char *buf)
43{ 43{
44 struct of_device *ofdev = to_of_device(dev); 44 int len = of_device_get_modalias(dev, buf, PAGE_SIZE - 2);
45 int len;
46
47 len = of_device_get_modalias(ofdev, buf, PAGE_SIZE - 2);
48 45
49 buf[len] = '\n'; 46 buf[len] = '\n';
50 buf[len+1] = 0; 47 buf[len+1] = 0;
diff --git a/drivers/media/IR/Kconfig b/drivers/media/IR/Kconfig
index d22a8ec523fc..999a8250b3ce 100644
--- a/drivers/media/IR/Kconfig
+++ b/drivers/media/IR/Kconfig
@@ -8,6 +8,17 @@ config VIDEO_IR
8 depends on IR_CORE 8 depends on IR_CORE
9 default IR_CORE 9 default IR_CORE
10 10
11config LIRC
12 tristate
13 default y
14
15 ---help---
16 Enable this option to build the Linux Infrared Remote
17 Control (LIRC) core device interface driver. The LIRC
18 interface passes raw IR to and from userspace, where the
19 LIRC daemon handles protocol decoding for IR reception ann
20 encoding for IR transmitting (aka "blasting").
21
11source "drivers/media/IR/keymaps/Kconfig" 22source "drivers/media/IR/keymaps/Kconfig"
12 23
13config IR_NEC_DECODER 24config IR_NEC_DECODER
@@ -33,6 +44,7 @@ config IR_RC5_DECODER
33config IR_RC6_DECODER 44config IR_RC6_DECODER
34 tristate "Enable IR raw decoder for the RC6 protocol" 45 tristate "Enable IR raw decoder for the RC6 protocol"
35 depends on IR_CORE 46 depends on IR_CORE
47 select BITREVERSE
36 default y 48 default y
37 49
38 ---help--- 50 ---help---
@@ -42,6 +54,7 @@ config IR_RC6_DECODER
42config IR_JVC_DECODER 54config IR_JVC_DECODER
43 tristate "Enable IR raw decoder for the JVC protocol" 55 tristate "Enable IR raw decoder for the JVC protocol"
44 depends on IR_CORE 56 depends on IR_CORE
57 select BITREVERSE
45 default y 58 default y
46 59
47 ---help--- 60 ---help---
@@ -57,6 +70,16 @@ config IR_SONY_DECODER
57 Enable this option if you have an infrared remote control which 70 Enable this option if you have an infrared remote control which
58 uses the Sony protocol, and you need software decoding support. 71 uses the Sony protocol, and you need software decoding support.
59 72
73config IR_LIRC_CODEC
74 tristate "Enable IR to LIRC bridge"
75 depends on IR_CORE
76 depends on LIRC
77 default y
78
79 ---help---
80 Enable this option to pass raw IR to and from userspace via
81 the LIRC interface.
82
60config IR_IMON 83config IR_IMON
61 tristate "SoundGraph iMON Receiver and Display" 84 tristate "SoundGraph iMON Receiver and Display"
62 depends on USB_ARCH_HAS_HCD 85 depends on USB_ARCH_HAS_HCD
@@ -68,3 +91,15 @@ config IR_IMON
68 91
69 To compile this driver as a module, choose M here: the 92 To compile this driver as a module, choose M here: the
70 module will be called imon. 93 module will be called imon.
94
95config IR_MCEUSB
96 tristate "Windows Media Center Ed. eHome Infrared Transceiver"
97 depends on USB_ARCH_HAS_HCD
98 depends on IR_CORE
99 select USB
100 ---help---
101 Say Y here if you want to use a Windows Media Center Edition
102 eHome Infrared Transceiver.
103
104 To compile this driver as a module, choose M here: the
105 module will be called mceusb.
diff --git a/drivers/media/IR/Makefile b/drivers/media/IR/Makefile
index b998fcced2e4..2ae4f3abfdbd 100644
--- a/drivers/media/IR/Makefile
+++ b/drivers/media/IR/Makefile
@@ -5,11 +5,14 @@ obj-y += keymaps/
5 5
6obj-$(CONFIG_IR_CORE) += ir-core.o 6obj-$(CONFIG_IR_CORE) += ir-core.o
7obj-$(CONFIG_VIDEO_IR) += ir-common.o 7obj-$(CONFIG_VIDEO_IR) += ir-common.o
8obj-$(CONFIG_LIRC) += lirc_dev.o
8obj-$(CONFIG_IR_NEC_DECODER) += ir-nec-decoder.o 9obj-$(CONFIG_IR_NEC_DECODER) += ir-nec-decoder.o
9obj-$(CONFIG_IR_RC5_DECODER) += ir-rc5-decoder.o 10obj-$(CONFIG_IR_RC5_DECODER) += ir-rc5-decoder.o
10obj-$(CONFIG_IR_RC6_DECODER) += ir-rc6-decoder.o 11obj-$(CONFIG_IR_RC6_DECODER) += ir-rc6-decoder.o
11obj-$(CONFIG_IR_JVC_DECODER) += ir-jvc-decoder.o 12obj-$(CONFIG_IR_JVC_DECODER) += ir-jvc-decoder.o
12obj-$(CONFIG_IR_SONY_DECODER) += ir-sony-decoder.o 13obj-$(CONFIG_IR_SONY_DECODER) += ir-sony-decoder.o
14obj-$(CONFIG_IR_LIRC_CODEC) += ir-lirc-codec.o
13 15
14# stand-alone IR receivers/transmitters 16# stand-alone IR receivers/transmitters
15obj-$(CONFIG_IR_IMON) += imon.o 17obj-$(CONFIG_IR_IMON) += imon.o
18obj-$(CONFIG_IR_MCEUSB) += mceusb.o
diff --git a/drivers/media/IR/imon.c b/drivers/media/IR/imon.c
index 4bbd45f4284c..65c125e44e96 100644
--- a/drivers/media/IR/imon.c
+++ b/drivers/media/IR/imon.c
@@ -407,7 +407,7 @@ static int display_close(struct inode *inode, struct file *file)
407 struct imon_context *ictx = NULL; 407 struct imon_context *ictx = NULL;
408 int retval = 0; 408 int retval = 0;
409 409
410 ictx = (struct imon_context *)file->private_data; 410 ictx = file->private_data;
411 411
412 if (!ictx) { 412 if (!ictx) {
413 err("%s: no context for device", __func__); 413 err("%s: no context for device", __func__);
@@ -812,7 +812,7 @@ static ssize_t vfd_write(struct file *file, const char *buf,
812 const unsigned char vfd_packet6[] = { 812 const unsigned char vfd_packet6[] = {
813 0x01, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF }; 813 0x01, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF };
814 814
815 ictx = (struct imon_context *)file->private_data; 815 ictx = file->private_data;
816 if (!ictx) { 816 if (!ictx) {
817 err("%s: no context for device", __func__); 817 err("%s: no context for device", __func__);
818 return -ENODEV; 818 return -ENODEV;
@@ -896,7 +896,7 @@ static ssize_t lcd_write(struct file *file, const char *buf,
896 int retval = 0; 896 int retval = 0;
897 struct imon_context *ictx; 897 struct imon_context *ictx;
898 898
899 ictx = (struct imon_context *)file->private_data; 899 ictx = file->private_data;
900 if (!ictx) { 900 if (!ictx) {
901 err("%s: no context for device", __func__); 901 err("%s: no context for device", __func__);
902 return -ENODEV; 902 return -ENODEV;
@@ -1943,7 +1943,7 @@ static struct imon_context *imon_init_intf0(struct usb_interface *intf)
1943 return ictx; 1943 return ictx;
1944 1944
1945urb_submit_failed: 1945urb_submit_failed:
1946 input_unregister_device(ictx->idev); 1946 ir_input_unregister(ictx->idev);
1947 input_free_device(ictx->idev); 1947 input_free_device(ictx->idev);
1948idev_setup_failed: 1948idev_setup_failed:
1949find_endpoint_failed: 1949find_endpoint_failed:
@@ -2067,6 +2067,7 @@ static void imon_get_ffdc_type(struct imon_context *ictx)
2067 detected_display_type = IMON_DISPLAY_TYPE_VFD; 2067 detected_display_type = IMON_DISPLAY_TYPE_VFD;
2068 break; 2068 break;
2069 /* iMON LCD, MCE IR */ 2069 /* iMON LCD, MCE IR */
2070 case 0x9e:
2070 case 0x9f: 2071 case 0x9f:
2071 dev_info(ictx->dev, "0xffdc iMON LCD, MCE IR"); 2072 dev_info(ictx->dev, "0xffdc iMON LCD, MCE IR");
2072 detected_display_type = IMON_DISPLAY_TYPE_LCD; 2073 detected_display_type = IMON_DISPLAY_TYPE_LCD;
@@ -2306,7 +2307,7 @@ static void __devexit imon_disconnect(struct usb_interface *interface)
2306 if (ifnum == 0) { 2307 if (ifnum == 0) {
2307 ictx->dev_present_intf0 = false; 2308 ictx->dev_present_intf0 = false;
2308 usb_kill_urb(ictx->rx_urb_intf0); 2309 usb_kill_urb(ictx->rx_urb_intf0);
2309 input_unregister_device(ictx->idev); 2310 ir_input_unregister(ictx->idev);
2310 if (ictx->display_supported) { 2311 if (ictx->display_supported) {
2311 if (ictx->display_type == IMON_DISPLAY_TYPE_LCD) 2312 if (ictx->display_type == IMON_DISPLAY_TYPE_LCD)
2312 usb_deregister_dev(interface, &imon_lcd_class); 2313 usb_deregister_dev(interface, &imon_lcd_class);
diff --git a/drivers/media/IR/ir-core-priv.h b/drivers/media/IR/ir-core-priv.h
index 9a5e65a471a5..babd52061bc3 100644
--- a/drivers/media/IR/ir-core-priv.h
+++ b/drivers/media/IR/ir-core-priv.h
@@ -22,17 +22,62 @@
22struct ir_raw_handler { 22struct ir_raw_handler {
23 struct list_head list; 23 struct list_head list;
24 24
25 u64 protocols; /* which are handled by this handler */
25 int (*decode)(struct input_dev *input_dev, struct ir_raw_event event); 26 int (*decode)(struct input_dev *input_dev, struct ir_raw_event event);
27
28 /* These two should only be used by the lirc decoder */
26 int (*raw_register)(struct input_dev *input_dev); 29 int (*raw_register)(struct input_dev *input_dev);
27 int (*raw_unregister)(struct input_dev *input_dev); 30 int (*raw_unregister)(struct input_dev *input_dev);
28}; 31};
29 32
30struct ir_raw_event_ctrl { 33struct ir_raw_event_ctrl {
34 struct list_head list; /* to keep track of raw clients */
31 struct work_struct rx_work; /* for the rx decoding workqueue */ 35 struct work_struct rx_work; /* for the rx decoding workqueue */
32 struct kfifo kfifo; /* fifo for the pulse/space durations */ 36 struct kfifo kfifo; /* fifo for the pulse/space durations */
33 ktime_t last_event; /* when last event occurred */ 37 ktime_t last_event; /* when last event occurred */
34 enum raw_event_type last_type; /* last event type */ 38 enum raw_event_type last_type; /* last event type */
35 struct input_dev *input_dev; /* pointer to the parent input_dev */ 39 struct input_dev *input_dev; /* pointer to the parent input_dev */
40 u64 enabled_protocols; /* enabled raw protocol decoders */
41
42 /* raw decoder state follows */
43 struct ir_raw_event prev_ev;
44 struct nec_dec {
45 int state;
46 unsigned count;
47 u32 bits;
48 } nec;
49 struct rc5_dec {
50 int state;
51 u32 bits;
52 unsigned count;
53 unsigned wanted_bits;
54 } rc5;
55 struct rc6_dec {
56 int state;
57 u8 header;
58 u32 body;
59 bool toggle;
60 unsigned count;
61 unsigned wanted_bits;
62 } rc6;
63 struct sony_dec {
64 int state;
65 u32 bits;
66 unsigned count;
67 } sony;
68 struct jvc_dec {
69 int state;
70 u16 bits;
71 u16 old_bits;
72 unsigned count;
73 bool first;
74 bool toggle;
75 } jvc;
76 struct lirc_codec {
77 struct ir_input_dev *ir_dev;
78 struct lirc_driver *drv;
79 int lircdata;
80 } lirc;
36}; 81};
37 82
38/* macros for IR decoders */ 83/* macros for IR decoders */
@@ -74,6 +119,7 @@ void ir_unregister_class(struct input_dev *input_dev);
74/* 119/*
75 * Routines from ir-raw-event.c to be used internally and by decoders 120 * Routines from ir-raw-event.c to be used internally and by decoders
76 */ 121 */
122u64 ir_raw_get_allowed_protocols(void);
77int ir_raw_event_register(struct input_dev *input_dev); 123int ir_raw_event_register(struct input_dev *input_dev);
78void ir_raw_event_unregister(struct input_dev *input_dev); 124void ir_raw_event_unregister(struct input_dev *input_dev);
79int ir_raw_handler_register(struct ir_raw_handler *ir_raw_handler); 125int ir_raw_handler_register(struct ir_raw_handler *ir_raw_handler);
@@ -123,4 +169,12 @@ void ir_raw_init(void);
123#define load_sony_decode() 0 169#define load_sony_decode() 0
124#endif 170#endif
125 171
172/* from ir-lirc-codec.c */
173#ifdef CONFIG_IR_LIRC_CODEC_MODULE
174#define load_lirc_codec() request_module("ir-lirc-codec")
175#else
176#define load_lirc_codec() 0
177#endif
178
179
126#endif /* _IR_RAW_EVENT */ 180#endif /* _IR_RAW_EVENT */
diff --git a/drivers/media/IR/ir-jvc-decoder.c b/drivers/media/IR/ir-jvc-decoder.c
index 0b804944cbb0..8894d8b36048 100644
--- a/drivers/media/IR/ir-jvc-decoder.c
+++ b/drivers/media/IR/ir-jvc-decoder.c
@@ -25,10 +25,6 @@
25#define JVC_TRAILER_PULSE (1 * JVC_UNIT) 25#define JVC_TRAILER_PULSE (1 * JVC_UNIT)
26#define JVC_TRAILER_SPACE (35 * JVC_UNIT) 26#define JVC_TRAILER_SPACE (35 * JVC_UNIT)
27 27
28/* Used to register jvc_decoder clients */
29static LIST_HEAD(decoder_list);
30DEFINE_SPINLOCK(decoder_lock);
31
32enum jvc_state { 28enum jvc_state {
33 STATE_INACTIVE, 29 STATE_INACTIVE,
34 STATE_HEADER_SPACE, 30 STATE_HEADER_SPACE,
@@ -38,87 +34,6 @@ enum jvc_state {
38 STATE_TRAILER_SPACE, 34 STATE_TRAILER_SPACE,
39}; 35};
40 36
41struct decoder_data {
42 struct list_head list;
43 struct ir_input_dev *ir_dev;
44 int enabled:1;
45
46 /* State machine control */
47 enum jvc_state state;
48 u16 jvc_bits;
49 u16 jvc_old_bits;
50 unsigned count;
51 bool first;
52 bool toggle;
53};
54
55
56/**
57 * get_decoder_data() - gets decoder data
58 * @input_dev: input device
59 *
60 * Returns the struct decoder_data that corresponds to a device
61 */
62static struct decoder_data *get_decoder_data(struct ir_input_dev *ir_dev)
63{
64 struct decoder_data *data = NULL;
65
66 spin_lock(&decoder_lock);
67 list_for_each_entry(data, &decoder_list, list) {
68 if (data->ir_dev == ir_dev)
69 break;
70 }
71 spin_unlock(&decoder_lock);
72 return data;
73}
74
75static ssize_t store_enabled(struct device *d,
76 struct device_attribute *mattr,
77 const char *buf,
78 size_t len)
79{
80 unsigned long value;
81 struct ir_input_dev *ir_dev = dev_get_drvdata(d);
82 struct decoder_data *data = get_decoder_data(ir_dev);
83
84 if (!data)
85 return -EINVAL;
86
87 if (strict_strtoul(buf, 10, &value) || value > 1)
88 return -EINVAL;
89
90 data->enabled = value;
91
92 return len;
93}
94
95static ssize_t show_enabled(struct device *d,
96 struct device_attribute *mattr, char *buf)
97{
98 struct ir_input_dev *ir_dev = dev_get_drvdata(d);
99 struct decoder_data *data = get_decoder_data(ir_dev);
100
101 if (!data)
102 return -EINVAL;
103
104 if (data->enabled)
105 return sprintf(buf, "1\n");
106 else
107 return sprintf(buf, "0\n");
108}
109
110static DEVICE_ATTR(enabled, S_IRUGO | S_IWUSR, show_enabled, store_enabled);
111
112static struct attribute *decoder_attributes[] = {
113 &dev_attr_enabled.attr,
114 NULL
115};
116
117static struct attribute_group decoder_attribute_group = {
118 .name = "jvc_decoder",
119 .attrs = decoder_attributes,
120};
121
122/** 37/**
123 * ir_jvc_decode() - Decode one JVC pulse or space 38 * ir_jvc_decode() - Decode one JVC pulse or space
124 * @input_dev: the struct input_dev descriptor of the device 39 * @input_dev: the struct input_dev descriptor of the device
@@ -128,14 +43,10 @@ static struct attribute_group decoder_attribute_group = {
128 */ 43 */
129static int ir_jvc_decode(struct input_dev *input_dev, struct ir_raw_event ev) 44static int ir_jvc_decode(struct input_dev *input_dev, struct ir_raw_event ev)
130{ 45{
131 struct decoder_data *data;
132 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev); 46 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
47 struct jvc_dec *data = &ir_dev->raw->jvc;
133 48
134 data = get_decoder_data(ir_dev); 49 if (!(ir_dev->raw->enabled_protocols & IR_TYPE_JVC))
135 if (!data)
136 return -EINVAL;
137
138 if (!data->enabled)
139 return 0; 50 return 0;
140 51
141 if (IS_RESET(ev)) { 52 if (IS_RESET(ev)) {
@@ -188,9 +99,9 @@ static int ir_jvc_decode(struct input_dev *input_dev, struct ir_raw_event ev)
188 if (ev.pulse) 99 if (ev.pulse)
189 break; 100 break;
190 101
191 data->jvc_bits <<= 1; 102 data->bits <<= 1;
192 if (eq_margin(ev.duration, JVC_BIT_1_SPACE, JVC_UNIT / 2)) { 103 if (eq_margin(ev.duration, JVC_BIT_1_SPACE, JVC_UNIT / 2)) {
193 data->jvc_bits |= 1; 104 data->bits |= 1;
194 decrease_duration(&ev, JVC_BIT_1_SPACE); 105 decrease_duration(&ev, JVC_BIT_1_SPACE);
195 } else if (eq_margin(ev.duration, JVC_BIT_0_SPACE, JVC_UNIT / 2)) 106 } else if (eq_margin(ev.duration, JVC_BIT_0_SPACE, JVC_UNIT / 2))
196 decrease_duration(&ev, JVC_BIT_0_SPACE); 107 decrease_duration(&ev, JVC_BIT_0_SPACE);
@@ -223,13 +134,13 @@ static int ir_jvc_decode(struct input_dev *input_dev, struct ir_raw_event ev)
223 134
224 if (data->first) { 135 if (data->first) {
225 u32 scancode; 136 u32 scancode;
226 scancode = (bitrev8((data->jvc_bits >> 8) & 0xff) << 8) | 137 scancode = (bitrev8((data->bits >> 8) & 0xff) << 8) |
227 (bitrev8((data->jvc_bits >> 0) & 0xff) << 0); 138 (bitrev8((data->bits >> 0) & 0xff) << 0);
228 IR_dprintk(1, "JVC scancode 0x%04x\n", scancode); 139 IR_dprintk(1, "JVC scancode 0x%04x\n", scancode);
229 ir_keydown(input_dev, scancode, data->toggle); 140 ir_keydown(input_dev, scancode, data->toggle);
230 data->first = false; 141 data->first = false;
231 data->jvc_old_bits = data->jvc_bits; 142 data->old_bits = data->bits;
232 } else if (data->jvc_bits == data->jvc_old_bits) { 143 } else if (data->bits == data->old_bits) {
233 IR_dprintk(1, "JVC repeat\n"); 144 IR_dprintk(1, "JVC repeat\n");
234 ir_repeat(input_dev); 145 ir_repeat(input_dev);
235 } else { 146 } else {
@@ -249,54 +160,9 @@ out:
249 return -EINVAL; 160 return -EINVAL;
250} 161}
251 162
252static int ir_jvc_register(struct input_dev *input_dev)
253{
254 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
255 struct decoder_data *data;
256 int rc;
257
258 rc = sysfs_create_group(&ir_dev->dev.kobj, &decoder_attribute_group);
259 if (rc < 0)
260 return rc;
261
262 data = kzalloc(sizeof(*data), GFP_KERNEL);
263 if (!data) {
264 sysfs_remove_group(&ir_dev->dev.kobj, &decoder_attribute_group);
265 return -ENOMEM;
266 }
267
268 data->ir_dev = ir_dev;
269 data->enabled = 1;
270
271 spin_lock(&decoder_lock);
272 list_add_tail(&data->list, &decoder_list);
273 spin_unlock(&decoder_lock);
274
275 return 0;
276}
277
278static int ir_jvc_unregister(struct input_dev *input_dev)
279{
280 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
281 static struct decoder_data *data;
282
283 data = get_decoder_data(ir_dev);
284 if (!data)
285 return 0;
286
287 sysfs_remove_group(&ir_dev->dev.kobj, &decoder_attribute_group);
288
289 spin_lock(&decoder_lock);
290 list_del(&data->list);
291 spin_unlock(&decoder_lock);
292
293 return 0;
294}
295
296static struct ir_raw_handler jvc_handler = { 163static struct ir_raw_handler jvc_handler = {
164 .protocols = IR_TYPE_JVC,
297 .decode = ir_jvc_decode, 165 .decode = ir_jvc_decode,
298 .raw_register = ir_jvc_register,
299 .raw_unregister = ir_jvc_unregister,
300}; 166};
301 167
302static int __init ir_jvc_decode_init(void) 168static int __init ir_jvc_decode_init(void)
diff --git a/drivers/media/IR/ir-keytable.c b/drivers/media/IR/ir-keytable.c
index 94a8577e72eb..15a0f192d413 100644
--- a/drivers/media/IR/ir-keytable.c
+++ b/drivers/media/IR/ir-keytable.c
@@ -497,8 +497,9 @@ int __ir_input_register(struct input_dev *input_dev,
497 goto out_event; 497 goto out_event;
498 } 498 }
499 499
500 IR_dprintk(1, "Registered input device on %s for %s remote.\n", 500 IR_dprintk(1, "Registered input device on %s for %s remote%s.\n",
501 driver_name, rc_tab->name); 501 driver_name, rc_tab->name,
502 ir_dev->props->driver_type == RC_DRIVER_IR_RAW ? " in raw mode" : "");
502 503
503 return 0; 504 return 0;
504 505
diff --git a/drivers/media/IR/ir-lirc-codec.c b/drivers/media/IR/ir-lirc-codec.c
new file mode 100644
index 000000000000..3ba482d96c4b
--- /dev/null
+++ b/drivers/media/IR/ir-lirc-codec.c
@@ -0,0 +1,278 @@
1/* ir-lirc-codec.c - ir-core to classic lirc interface bridge
2 *
3 * Copyright (C) 2010 by Jarod Wilson <jarod@redhat.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <linux/sched.h>
16#include <linux/wait.h>
17#include <media/lirc.h>
18#include <media/lirc_dev.h>
19#include <media/ir-core.h>
20#include "ir-core-priv.h"
21
22#define LIRCBUF_SIZE 256
23
24/**
25 * ir_lirc_decode() - Send raw IR data to lirc_dev to be relayed to the
26 * lircd userspace daemon for decoding.
27 * @input_dev: the struct input_dev descriptor of the device
28 * @duration: the struct ir_raw_event descriptor of the pulse/space
29 *
30 * This function returns -EINVAL if the lirc interfaces aren't wired up.
31 */
32static int ir_lirc_decode(struct input_dev *input_dev, struct ir_raw_event ev)
33{
34 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
35
36 if (!(ir_dev->raw->enabled_protocols & IR_TYPE_LIRC))
37 return 0;
38
39 if (!ir_dev->raw->lirc.drv || !ir_dev->raw->lirc.drv->rbuf)
40 return -EINVAL;
41
42 IR_dprintk(2, "LIRC data transfer started (%uus %s)\n",
43 TO_US(ev.duration), TO_STR(ev.pulse));
44
45 ir_dev->raw->lirc.lircdata += ev.duration / 1000;
46 if (ev.pulse)
47 ir_dev->raw->lirc.lircdata |= PULSE_BIT;
48
49 lirc_buffer_write(ir_dev->raw->lirc.drv->rbuf,
50 (unsigned char *) &ir_dev->raw->lirc.lircdata);
51 wake_up(&ir_dev->raw->lirc.drv->rbuf->wait_poll);
52
53 ir_dev->raw->lirc.lircdata = 0;
54
55 return 0;
56}
57
58static ssize_t ir_lirc_transmit_ir(struct file *file, const char *buf,
59 size_t n, loff_t *ppos)
60{
61 struct lirc_codec *lirc;
62 struct ir_input_dev *ir_dev;
63 int *txbuf; /* buffer with values to transmit */
64 int ret = 0, count;
65
66 lirc = lirc_get_pdata(file);
67 if (!lirc)
68 return -EFAULT;
69
70 if (n % sizeof(int))
71 return -EINVAL;
72
73 count = n / sizeof(int);
74 if (count > LIRCBUF_SIZE || count % 2 == 0)
75 return -EINVAL;
76
77 txbuf = memdup_user(buf, n);
78 if (IS_ERR(txbuf))
79 return PTR_ERR(txbuf);
80
81 ir_dev = lirc->ir_dev;
82 if (!ir_dev) {
83 ret = -EFAULT;
84 goto out;
85 }
86
87 if (ir_dev->props && ir_dev->props->tx_ir)
88 ret = ir_dev->props->tx_ir(ir_dev->props->priv, txbuf, (u32)n);
89
90out:
91 kfree(txbuf);
92 return ret;
93}
94
95static long ir_lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
96{
97 struct lirc_codec *lirc;
98 struct ir_input_dev *ir_dev;
99 int ret = 0;
100 void *drv_data;
101 unsigned long val;
102
103 lirc = lirc_get_pdata(filep);
104 if (!lirc)
105 return -EFAULT;
106
107 ir_dev = lirc->ir_dev;
108 if (!ir_dev || !ir_dev->props || !ir_dev->props->priv)
109 return -EFAULT;
110
111 drv_data = ir_dev->props->priv;
112
113 switch (cmd) {
114 case LIRC_SET_TRANSMITTER_MASK:
115 ret = get_user(val, (unsigned long *)arg);
116 if (ret)
117 return ret;
118
119 if (ir_dev->props && ir_dev->props->s_tx_mask)
120 ret = ir_dev->props->s_tx_mask(drv_data, (u32)val);
121 else
122 return -EINVAL;
123 break;
124
125 case LIRC_SET_SEND_CARRIER:
126 ret = get_user(val, (unsigned long *)arg);
127 if (ret)
128 return ret;
129
130 if (ir_dev->props && ir_dev->props->s_tx_carrier)
131 ir_dev->props->s_tx_carrier(drv_data, (u32)val);
132 else
133 return -EINVAL;
134 break;
135
136 case LIRC_GET_SEND_MODE:
137 val = LIRC_CAN_SEND_PULSE & LIRC_CAN_SEND_MASK;
138 ret = put_user(val, (unsigned long *)arg);
139 break;
140
141 case LIRC_SET_SEND_MODE:
142 ret = get_user(val, (unsigned long *)arg);
143 if (ret)
144 return ret;
145
146 if (val != (LIRC_MODE_PULSE & LIRC_CAN_SEND_MASK))
147 return -EINVAL;
148 break;
149
150 default:
151 return lirc_dev_fop_ioctl(filep, cmd, arg);
152 }
153
154 return ret;
155}
156
157static int ir_lirc_open(void *data)
158{
159 return 0;
160}
161
162static void ir_lirc_close(void *data)
163{
164 return;
165}
166
167static struct file_operations lirc_fops = {
168 .owner = THIS_MODULE,
169 .write = ir_lirc_transmit_ir,
170 .unlocked_ioctl = ir_lirc_ioctl,
171 .read = lirc_dev_fop_read,
172 .poll = lirc_dev_fop_poll,
173 .open = lirc_dev_fop_open,
174 .release = lirc_dev_fop_close,
175};
176
177static int ir_lirc_register(struct input_dev *input_dev)
178{
179 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
180 struct lirc_driver *drv;
181 struct lirc_buffer *rbuf;
182 int rc = -ENOMEM;
183 unsigned long features;
184
185 drv = kzalloc(sizeof(struct lirc_driver), GFP_KERNEL);
186 if (!drv)
187 return rc;
188
189 rbuf = kzalloc(sizeof(struct lirc_buffer), GFP_KERNEL);
190 if (!rbuf)
191 goto rbuf_alloc_failed;
192
193 rc = lirc_buffer_init(rbuf, sizeof(int), LIRCBUF_SIZE);
194 if (rc)
195 goto rbuf_init_failed;
196
197 features = LIRC_CAN_REC_MODE2;
198 if (ir_dev->props->tx_ir) {
199 features |= LIRC_CAN_SEND_PULSE;
200 if (ir_dev->props->s_tx_mask)
201 features |= LIRC_CAN_SET_TRANSMITTER_MASK;
202 if (ir_dev->props->s_tx_carrier)
203 features |= LIRC_CAN_SET_SEND_CARRIER;
204 }
205
206 snprintf(drv->name, sizeof(drv->name), "ir-lirc-codec (%s)",
207 ir_dev->driver_name);
208 drv->minor = -1;
209 drv->features = features;
210 drv->data = &ir_dev->raw->lirc;
211 drv->rbuf = rbuf;
212 drv->set_use_inc = &ir_lirc_open;
213 drv->set_use_dec = &ir_lirc_close;
214 drv->code_length = sizeof(struct ir_raw_event) * 8;
215 drv->fops = &lirc_fops;
216 drv->dev = &ir_dev->dev;
217 drv->owner = THIS_MODULE;
218
219 drv->minor = lirc_register_driver(drv);
220 if (drv->minor < 0) {
221 rc = -ENODEV;
222 goto lirc_register_failed;
223 }
224
225 ir_dev->raw->lirc.drv = drv;
226 ir_dev->raw->lirc.ir_dev = ir_dev;
227 ir_dev->raw->lirc.lircdata = PULSE_MASK;
228
229 return 0;
230
231lirc_register_failed:
232rbuf_init_failed:
233 kfree(rbuf);
234rbuf_alloc_failed:
235 kfree(drv);
236
237 return rc;
238}
239
240static int ir_lirc_unregister(struct input_dev *input_dev)
241{
242 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
243 struct lirc_codec *lirc = &ir_dev->raw->lirc;
244
245 lirc_unregister_driver(lirc->drv->minor);
246 lirc_buffer_free(lirc->drv->rbuf);
247 kfree(lirc->drv);
248
249 return 0;
250}
251
252static struct ir_raw_handler lirc_handler = {
253 .protocols = IR_TYPE_LIRC,
254 .decode = ir_lirc_decode,
255 .raw_register = ir_lirc_register,
256 .raw_unregister = ir_lirc_unregister,
257};
258
259static int __init ir_lirc_codec_init(void)
260{
261 ir_raw_handler_register(&lirc_handler);
262
263 printk(KERN_INFO "IR LIRC bridge handler initialized\n");
264 return 0;
265}
266
267static void __exit ir_lirc_codec_exit(void)
268{
269 ir_raw_handler_unregister(&lirc_handler);
270}
271
272module_init(ir_lirc_codec_init);
273module_exit(ir_lirc_codec_exit);
274
275MODULE_LICENSE("GPL");
276MODULE_AUTHOR("Jarod Wilson <jarod@redhat.com>");
277MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com)");
278MODULE_DESCRIPTION("LIRC IR handler bridge");
diff --git a/drivers/media/IR/ir-nec-decoder.c b/drivers/media/IR/ir-nec-decoder.c
index ba79233112ef..52e0f378ae3d 100644
--- a/drivers/media/IR/ir-nec-decoder.c
+++ b/drivers/media/IR/ir-nec-decoder.c
@@ -27,10 +27,6 @@
27#define NEC_TRAILER_PULSE (1 * NEC_UNIT) 27#define NEC_TRAILER_PULSE (1 * NEC_UNIT)
28#define NEC_TRAILER_SPACE (10 * NEC_UNIT) /* even longer in reality */ 28#define NEC_TRAILER_SPACE (10 * NEC_UNIT) /* even longer in reality */
29 29
30/* Used to register nec_decoder clients */
31static LIST_HEAD(decoder_list);
32static DEFINE_SPINLOCK(decoder_lock);
33
34enum nec_state { 30enum nec_state {
35 STATE_INACTIVE, 31 STATE_INACTIVE,
36 STATE_HEADER_SPACE, 32 STATE_HEADER_SPACE,
@@ -40,84 +36,6 @@ enum nec_state {
40 STATE_TRAILER_SPACE, 36 STATE_TRAILER_SPACE,
41}; 37};
42 38
43struct decoder_data {
44 struct list_head list;
45 struct ir_input_dev *ir_dev;
46 int enabled:1;
47
48 /* State machine control */
49 enum nec_state state;
50 u32 nec_bits;
51 unsigned count;
52};
53
54
55/**
56 * get_decoder_data() - gets decoder data
57 * @input_dev: input device
58 *
59 * Returns the struct decoder_data that corresponds to a device
60 */
61static struct decoder_data *get_decoder_data(struct ir_input_dev *ir_dev)
62{
63 struct decoder_data *data = NULL;
64
65 spin_lock(&decoder_lock);
66 list_for_each_entry(data, &decoder_list, list) {
67 if (data->ir_dev == ir_dev)
68 break;
69 }
70 spin_unlock(&decoder_lock);
71 return data;
72}
73
74static ssize_t store_enabled(struct device *d,
75 struct device_attribute *mattr,
76 const char *buf,
77 size_t len)
78{
79 unsigned long value;
80 struct ir_input_dev *ir_dev = dev_get_drvdata(d);
81 struct decoder_data *data = get_decoder_data(ir_dev);
82
83 if (!data)
84 return -EINVAL;
85
86 if (strict_strtoul(buf, 10, &value) || value > 1)
87 return -EINVAL;
88
89 data->enabled = value;
90
91 return len;
92}
93
94static ssize_t show_enabled(struct device *d,
95 struct device_attribute *mattr, char *buf)
96{
97 struct ir_input_dev *ir_dev = dev_get_drvdata(d);
98 struct decoder_data *data = get_decoder_data(ir_dev);
99
100 if (!data)
101 return -EINVAL;
102
103 if (data->enabled)
104 return sprintf(buf, "1\n");
105 else
106 return sprintf(buf, "0\n");
107}
108
109static DEVICE_ATTR(enabled, S_IRUGO | S_IWUSR, show_enabled, store_enabled);
110
111static struct attribute *decoder_attributes[] = {
112 &dev_attr_enabled.attr,
113 NULL
114};
115
116static struct attribute_group decoder_attribute_group = {
117 .name = "nec_decoder",
118 .attrs = decoder_attributes,
119};
120
121/** 39/**
122 * ir_nec_decode() - Decode one NEC pulse or space 40 * ir_nec_decode() - Decode one NEC pulse or space
123 * @input_dev: the struct input_dev descriptor of the device 41 * @input_dev: the struct input_dev descriptor of the device
@@ -127,16 +45,12 @@ static struct attribute_group decoder_attribute_group = {
127 */ 45 */
128static int ir_nec_decode(struct input_dev *input_dev, struct ir_raw_event ev) 46static int ir_nec_decode(struct input_dev *input_dev, struct ir_raw_event ev)
129{ 47{
130 struct decoder_data *data;
131 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev); 48 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
49 struct nec_dec *data = &ir_dev->raw->nec;
132 u32 scancode; 50 u32 scancode;
133 u8 address, not_address, command, not_command; 51 u8 address, not_address, command, not_command;
134 52
135 data = get_decoder_data(ir_dev); 53 if (!(ir_dev->raw->enabled_protocols & IR_TYPE_NEC))
136 if (!data)
137 return -EINVAL;
138
139 if (!data->enabled)
140 return 0; 54 return 0;
141 55
142 if (IS_RESET(ev)) { 56 if (IS_RESET(ev)) {
@@ -191,9 +105,9 @@ static int ir_nec_decode(struct input_dev *input_dev, struct ir_raw_event ev)
191 if (ev.pulse) 105 if (ev.pulse)
192 break; 106 break;
193 107
194 data->nec_bits <<= 1; 108 data->bits <<= 1;
195 if (eq_margin(ev.duration, NEC_BIT_1_SPACE, NEC_UNIT / 2)) 109 if (eq_margin(ev.duration, NEC_BIT_1_SPACE, NEC_UNIT / 2))
196 data->nec_bits |= 1; 110 data->bits |= 1;
197 else if (!eq_margin(ev.duration, NEC_BIT_0_SPACE, NEC_UNIT / 2)) 111 else if (!eq_margin(ev.duration, NEC_BIT_0_SPACE, NEC_UNIT / 2))
198 break; 112 break;
199 data->count++; 113 data->count++;
@@ -222,14 +136,14 @@ static int ir_nec_decode(struct input_dev *input_dev, struct ir_raw_event ev)
222 if (!geq_margin(ev.duration, NEC_TRAILER_SPACE, NEC_UNIT / 2)) 136 if (!geq_margin(ev.duration, NEC_TRAILER_SPACE, NEC_UNIT / 2))
223 break; 137 break;
224 138
225 address = bitrev8((data->nec_bits >> 24) & 0xff); 139 address = bitrev8((data->bits >> 24) & 0xff);
226 not_address = bitrev8((data->nec_bits >> 16) & 0xff); 140 not_address = bitrev8((data->bits >> 16) & 0xff);
227 command = bitrev8((data->nec_bits >> 8) & 0xff); 141 command = bitrev8((data->bits >> 8) & 0xff);
228 not_command = bitrev8((data->nec_bits >> 0) & 0xff); 142 not_command = bitrev8((data->bits >> 0) & 0xff);
229 143
230 if ((command ^ not_command) != 0xff) { 144 if ((command ^ not_command) != 0xff) {
231 IR_dprintk(1, "NEC checksum error: received 0x%08x\n", 145 IR_dprintk(1, "NEC checksum error: received 0x%08x\n",
232 data->nec_bits); 146 data->bits);
233 break; 147 break;
234 } 148 }
235 149
@@ -256,54 +170,9 @@ static int ir_nec_decode(struct input_dev *input_dev, struct ir_raw_event ev)
256 return -EINVAL; 170 return -EINVAL;
257} 171}
258 172
259static int ir_nec_register(struct input_dev *input_dev)
260{
261 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
262 struct decoder_data *data;
263 int rc;
264
265 rc = sysfs_create_group(&ir_dev->dev.kobj, &decoder_attribute_group);
266 if (rc < 0)
267 return rc;
268
269 data = kzalloc(sizeof(*data), GFP_KERNEL);
270 if (!data) {
271 sysfs_remove_group(&ir_dev->dev.kobj, &decoder_attribute_group);
272 return -ENOMEM;
273 }
274
275 data->ir_dev = ir_dev;
276 data->enabled = 1;
277
278 spin_lock(&decoder_lock);
279 list_add_tail(&data->list, &decoder_list);
280 spin_unlock(&decoder_lock);
281
282 return 0;
283}
284
285static int ir_nec_unregister(struct input_dev *input_dev)
286{
287 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
288 static struct decoder_data *data;
289
290 data = get_decoder_data(ir_dev);
291 if (!data)
292 return 0;
293
294 sysfs_remove_group(&ir_dev->dev.kobj, &decoder_attribute_group);
295
296 spin_lock(&decoder_lock);
297 list_del(&data->list);
298 spin_unlock(&decoder_lock);
299
300 return 0;
301}
302
303static struct ir_raw_handler nec_handler = { 173static struct ir_raw_handler nec_handler = {
174 .protocols = IR_TYPE_NEC,
304 .decode = ir_nec_decode, 175 .decode = ir_nec_decode,
305 .raw_register = ir_nec_register,
306 .raw_unregister = ir_nec_unregister,
307}; 176};
308 177
309static int __init ir_nec_decode_init(void) 178static int __init ir_nec_decode_init(void)
diff --git a/drivers/media/IR/ir-raw-event.c b/drivers/media/IR/ir-raw-event.c
index ea68a3f2effa..6f192ef31db1 100644
--- a/drivers/media/IR/ir-raw-event.c
+++ b/drivers/media/IR/ir-raw-event.c
@@ -20,35 +20,13 @@
20/* Define the max number of pulse/space transitions to buffer */ 20/* Define the max number of pulse/space transitions to buffer */
21#define MAX_IR_EVENT_SIZE 512 21#define MAX_IR_EVENT_SIZE 512
22 22
23/* Used to keep track of IR raw clients, protected by ir_raw_handler_lock */
24static LIST_HEAD(ir_raw_client_list);
25
23/* Used to handle IR raw handler extensions */ 26/* Used to handle IR raw handler extensions */
24static LIST_HEAD(ir_raw_handler_list);
25static DEFINE_SPINLOCK(ir_raw_handler_lock); 27static DEFINE_SPINLOCK(ir_raw_handler_lock);
26 28static LIST_HEAD(ir_raw_handler_list);
27/** 29static u64 available_protocols;
28 * RUN_DECODER() - runs an operation on all IR decoders
29 * @ops: IR raw handler operation to be called
30 * @arg: arguments to be passed to the callback
31 *
32 * Calls ir_raw_handler::ops for all registered IR handlers. It prevents
33 * new decode addition/removal while running, by locking ir_raw_handler_lock
34 * mutex. If an error occurs, it stops the ops. Otherwise, it returns a sum
35 * of the return codes.
36 */
37#define RUN_DECODER(ops, ...) ({ \
38 struct ir_raw_handler *_ir_raw_handler; \
39 int _sumrc = 0, _rc; \
40 spin_lock(&ir_raw_handler_lock); \
41 list_for_each_entry(_ir_raw_handler, &ir_raw_handler_list, list) { \
42 if (_ir_raw_handler->ops) { \
43 _rc = _ir_raw_handler->ops(__VA_ARGS__); \
44 if (_rc < 0) \
45 break; \
46 _sumrc += _rc; \
47 } \
48 } \
49 spin_unlock(&ir_raw_handler_lock); \
50 _sumrc; \
51})
52 30
53#ifdef MODULE 31#ifdef MODULE
54/* Used to load the decoders */ 32/* Used to load the decoders */
@@ -58,57 +36,17 @@ static struct work_struct wq_load;
58static void ir_raw_event_work(struct work_struct *work) 36static void ir_raw_event_work(struct work_struct *work)
59{ 37{
60 struct ir_raw_event ev; 38 struct ir_raw_event ev;
39 struct ir_raw_handler *handler;
61 struct ir_raw_event_ctrl *raw = 40 struct ir_raw_event_ctrl *raw =
62 container_of(work, struct ir_raw_event_ctrl, rx_work); 41 container_of(work, struct ir_raw_event_ctrl, rx_work);
63 42
64 while (kfifo_out(&raw->kfifo, &ev, sizeof(ev)) == sizeof(ev)) 43 while (kfifo_out(&raw->kfifo, &ev, sizeof(ev)) == sizeof(ev)) {
65 RUN_DECODER(decode, raw->input_dev, ev); 44 spin_lock(&ir_raw_handler_lock);
66} 45 list_for_each_entry(handler, &ir_raw_handler_list, list)
67 46 handler->decode(raw->input_dev, ev);
68int ir_raw_event_register(struct input_dev *input_dev) 47 spin_unlock(&ir_raw_handler_lock);
69{ 48 raw->prev_ev = ev;
70 struct ir_input_dev *ir = input_get_drvdata(input_dev);
71 int rc;
72
73 ir->raw = kzalloc(sizeof(*ir->raw), GFP_KERNEL);
74 if (!ir->raw)
75 return -ENOMEM;
76
77 ir->raw->input_dev = input_dev;
78 INIT_WORK(&ir->raw->rx_work, ir_raw_event_work);
79
80 rc = kfifo_alloc(&ir->raw->kfifo, sizeof(s64) * MAX_IR_EVENT_SIZE,
81 GFP_KERNEL);
82 if (rc < 0) {
83 kfree(ir->raw);
84 ir->raw = NULL;
85 return rc;
86 }
87
88 rc = RUN_DECODER(raw_register, input_dev);
89 if (rc < 0) {
90 kfifo_free(&ir->raw->kfifo);
91 kfree(ir->raw);
92 ir->raw = NULL;
93 return rc;
94 } 49 }
95
96 return rc;
97}
98
99void ir_raw_event_unregister(struct input_dev *input_dev)
100{
101 struct ir_input_dev *ir = input_get_drvdata(input_dev);
102
103 if (!ir->raw)
104 return;
105
106 cancel_work_sync(&ir->raw->rx_work);
107 RUN_DECODER(raw_unregister, input_dev);
108
109 kfifo_free(&ir->raw->kfifo);
110 kfree(ir->raw);
111 ir->raw = NULL;
112} 50}
113 51
114/** 52/**
@@ -204,23 +142,103 @@ void ir_raw_event_handle(struct input_dev *input_dev)
204} 142}
205EXPORT_SYMBOL_GPL(ir_raw_event_handle); 143EXPORT_SYMBOL_GPL(ir_raw_event_handle);
206 144
145/* used internally by the sysfs interface */
146u64
147ir_raw_get_allowed_protocols()
148{
149 u64 protocols;
150 spin_lock(&ir_raw_handler_lock);
151 protocols = available_protocols;
152 spin_unlock(&ir_raw_handler_lock);
153 return protocols;
154}
155
156/*
157 * Used to (un)register raw event clients
158 */
159int ir_raw_event_register(struct input_dev *input_dev)
160{
161 struct ir_input_dev *ir = input_get_drvdata(input_dev);
162 int rc;
163 struct ir_raw_handler *handler;
164
165 ir->raw = kzalloc(sizeof(*ir->raw), GFP_KERNEL);
166 if (!ir->raw)
167 return -ENOMEM;
168
169 ir->raw->input_dev = input_dev;
170 INIT_WORK(&ir->raw->rx_work, ir_raw_event_work);
171 ir->raw->enabled_protocols = ~0;
172 rc = kfifo_alloc(&ir->raw->kfifo, sizeof(s64) * MAX_IR_EVENT_SIZE,
173 GFP_KERNEL);
174 if (rc < 0) {
175 kfree(ir->raw);
176 ir->raw = NULL;
177 return rc;
178 }
179
180 spin_lock(&ir_raw_handler_lock);
181 list_add_tail(&ir->raw->list, &ir_raw_client_list);
182 list_for_each_entry(handler, &ir_raw_handler_list, list)
183 if (handler->raw_register)
184 handler->raw_register(ir->raw->input_dev);
185 spin_unlock(&ir_raw_handler_lock);
186
187 return 0;
188}
189
190void ir_raw_event_unregister(struct input_dev *input_dev)
191{
192 struct ir_input_dev *ir = input_get_drvdata(input_dev);
193 struct ir_raw_handler *handler;
194
195 if (!ir->raw)
196 return;
197
198 cancel_work_sync(&ir->raw->rx_work);
199
200 spin_lock(&ir_raw_handler_lock);
201 list_del(&ir->raw->list);
202 list_for_each_entry(handler, &ir_raw_handler_list, list)
203 if (handler->raw_unregister)
204 handler->raw_unregister(ir->raw->input_dev);
205 spin_unlock(&ir_raw_handler_lock);
206
207 kfifo_free(&ir->raw->kfifo);
208 kfree(ir->raw);
209 ir->raw = NULL;
210}
211
207/* 212/*
208 * Extension interface - used to register the IR decoders 213 * Extension interface - used to register the IR decoders
209 */ 214 */
210 215
211int ir_raw_handler_register(struct ir_raw_handler *ir_raw_handler) 216int ir_raw_handler_register(struct ir_raw_handler *ir_raw_handler)
212{ 217{
218 struct ir_raw_event_ctrl *raw;
219
213 spin_lock(&ir_raw_handler_lock); 220 spin_lock(&ir_raw_handler_lock);
214 list_add_tail(&ir_raw_handler->list, &ir_raw_handler_list); 221 list_add_tail(&ir_raw_handler->list, &ir_raw_handler_list);
222 if (ir_raw_handler->raw_register)
223 list_for_each_entry(raw, &ir_raw_client_list, list)
224 ir_raw_handler->raw_register(raw->input_dev);
225 available_protocols |= ir_raw_handler->protocols;
215 spin_unlock(&ir_raw_handler_lock); 226 spin_unlock(&ir_raw_handler_lock);
227
216 return 0; 228 return 0;
217} 229}
218EXPORT_SYMBOL(ir_raw_handler_register); 230EXPORT_SYMBOL(ir_raw_handler_register);
219 231
220void ir_raw_handler_unregister(struct ir_raw_handler *ir_raw_handler) 232void ir_raw_handler_unregister(struct ir_raw_handler *ir_raw_handler)
221{ 233{
234 struct ir_raw_event_ctrl *raw;
235
222 spin_lock(&ir_raw_handler_lock); 236 spin_lock(&ir_raw_handler_lock);
223 list_del(&ir_raw_handler->list); 237 list_del(&ir_raw_handler->list);
238 if (ir_raw_handler->raw_unregister)
239 list_for_each_entry(raw, &ir_raw_client_list, list)
240 ir_raw_handler->raw_unregister(raw->input_dev);
241 available_protocols &= ~ir_raw_handler->protocols;
224 spin_unlock(&ir_raw_handler_lock); 242 spin_unlock(&ir_raw_handler_lock);
225} 243}
226EXPORT_SYMBOL(ir_raw_handler_unregister); 244EXPORT_SYMBOL(ir_raw_handler_unregister);
@@ -235,6 +253,7 @@ static void init_decoders(struct work_struct *work)
235 load_rc6_decode(); 253 load_rc6_decode();
236 load_jvc_decode(); 254 load_jvc_decode();
237 load_sony_decode(); 255 load_sony_decode();
256 load_lirc_codec();
238 257
239 /* If needed, we may later add some init code. In this case, 258 /* If needed, we may later add some init code. In this case,
240 it is needed to change the CONFIG_MODULE test at ir-core.h 259 it is needed to change the CONFIG_MODULE test at ir-core.h
diff --git a/drivers/media/IR/ir-rc5-decoder.c b/drivers/media/IR/ir-rc5-decoder.c
index 23cdb1b1a3bc..df4770d978ad 100644
--- a/drivers/media/IR/ir-rc5-decoder.c
+++ b/drivers/media/IR/ir-rc5-decoder.c
@@ -30,10 +30,6 @@
30#define RC5_BIT_END (1 * RC5_UNIT) 30#define RC5_BIT_END (1 * RC5_UNIT)
31#define RC5X_SPACE (4 * RC5_UNIT) 31#define RC5X_SPACE (4 * RC5_UNIT)
32 32
33/* Used to register rc5_decoder clients */
34static LIST_HEAD(decoder_list);
35static DEFINE_SPINLOCK(decoder_lock);
36
37enum rc5_state { 33enum rc5_state {
38 STATE_INACTIVE, 34 STATE_INACTIVE,
39 STATE_BIT_START, 35 STATE_BIT_START,
@@ -42,87 +38,6 @@ enum rc5_state {
42 STATE_FINISHED, 38 STATE_FINISHED,
43}; 39};
44 40
45struct decoder_data {
46 struct list_head list;
47 struct ir_input_dev *ir_dev;
48 int enabled:1;
49
50 /* State machine control */
51 enum rc5_state state;
52 u32 rc5_bits;
53 struct ir_raw_event prev_ev;
54 unsigned count;
55 unsigned wanted_bits;
56};
57
58
59/**
60 * get_decoder_data() - gets decoder data
61 * @input_dev: input device
62 *
63 * Returns the struct decoder_data that corresponds to a device
64 */
65
66static struct decoder_data *get_decoder_data(struct ir_input_dev *ir_dev)
67{
68 struct decoder_data *data = NULL;
69
70 spin_lock(&decoder_lock);
71 list_for_each_entry(data, &decoder_list, list) {
72 if (data->ir_dev == ir_dev)
73 break;
74 }
75 spin_unlock(&decoder_lock);
76 return data;
77}
78
79static ssize_t store_enabled(struct device *d,
80 struct device_attribute *mattr,
81 const char *buf,
82 size_t len)
83{
84 unsigned long value;
85 struct ir_input_dev *ir_dev = dev_get_drvdata(d);
86 struct decoder_data *data = get_decoder_data(ir_dev);
87
88 if (!data)
89 return -EINVAL;
90
91 if (strict_strtoul(buf, 10, &value) || value > 1)
92 return -EINVAL;
93
94 data->enabled = value;
95
96 return len;
97}
98
99static ssize_t show_enabled(struct device *d,
100 struct device_attribute *mattr, char *buf)
101{
102 struct ir_input_dev *ir_dev = dev_get_drvdata(d);
103 struct decoder_data *data = get_decoder_data(ir_dev);
104
105 if (!data)
106 return -EINVAL;
107
108 if (data->enabled)
109 return sprintf(buf, "1\n");
110 else
111 return sprintf(buf, "0\n");
112}
113
114static DEVICE_ATTR(enabled, S_IRUGO | S_IWUSR, show_enabled, store_enabled);
115
116static struct attribute *decoder_attributes[] = {
117 &dev_attr_enabled.attr,
118 NULL
119};
120
121static struct attribute_group decoder_attribute_group = {
122 .name = "rc5_decoder",
123 .attrs = decoder_attributes,
124};
125
126/** 41/**
127 * ir_rc5_decode() - Decode one RC-5 pulse or space 42 * ir_rc5_decode() - Decode one RC-5 pulse or space
128 * @input_dev: the struct input_dev descriptor of the device 43 * @input_dev: the struct input_dev descriptor of the device
@@ -132,17 +47,13 @@ static struct attribute_group decoder_attribute_group = {
132 */ 47 */
133static int ir_rc5_decode(struct input_dev *input_dev, struct ir_raw_event ev) 48static int ir_rc5_decode(struct input_dev *input_dev, struct ir_raw_event ev)
134{ 49{
135 struct decoder_data *data;
136 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev); 50 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
51 struct rc5_dec *data = &ir_dev->raw->rc5;
137 u8 toggle; 52 u8 toggle;
138 u32 scancode; 53 u32 scancode;
139 54
140 data = get_decoder_data(ir_dev); 55 if (!(ir_dev->raw->enabled_protocols & IR_TYPE_RC5))
141 if (!data) 56 return 0;
142 return -EINVAL;
143
144 if (!data->enabled)
145 return 0;
146 57
147 if (IS_RESET(ev)) { 58 if (IS_RESET(ev)) {
148 data->state = STATE_INACTIVE; 59 data->state = STATE_INACTIVE;
@@ -176,16 +87,15 @@ again:
176 if (!eq_margin(ev.duration, RC5_BIT_START, RC5_UNIT / 2)) 87 if (!eq_margin(ev.duration, RC5_BIT_START, RC5_UNIT / 2))
177 break; 88 break;
178 89
179 data->rc5_bits <<= 1; 90 data->bits <<= 1;
180 if (!ev.pulse) 91 if (!ev.pulse)
181 data->rc5_bits |= 1; 92 data->bits |= 1;
182 data->count++; 93 data->count++;
183 data->prev_ev = ev;
184 data->state = STATE_BIT_END; 94 data->state = STATE_BIT_END;
185 return 0; 95 return 0;
186 96
187 case STATE_BIT_END: 97 case STATE_BIT_END:
188 if (!is_transition(&ev, &data->prev_ev)) 98 if (!is_transition(&ev, &ir_dev->raw->prev_ev))
189 break; 99 break;
190 100
191 if (data->count == data->wanted_bits) 101 if (data->count == data->wanted_bits)
@@ -217,11 +127,11 @@ again:
217 if (data->wanted_bits == RC5X_NBITS) { 127 if (data->wanted_bits == RC5X_NBITS) {
218 /* RC5X */ 128 /* RC5X */
219 u8 xdata, command, system; 129 u8 xdata, command, system;
220 xdata = (data->rc5_bits & 0x0003F) >> 0; 130 xdata = (data->bits & 0x0003F) >> 0;
221 command = (data->rc5_bits & 0x00FC0) >> 6; 131 command = (data->bits & 0x00FC0) >> 6;
222 system = (data->rc5_bits & 0x1F000) >> 12; 132 system = (data->bits & 0x1F000) >> 12;
223 toggle = (data->rc5_bits & 0x20000) ? 1 : 0; 133 toggle = (data->bits & 0x20000) ? 1 : 0;
224 command += (data->rc5_bits & 0x01000) ? 0 : 0x40; 134 command += (data->bits & 0x01000) ? 0 : 0x40;
225 scancode = system << 16 | command << 8 | xdata; 135 scancode = system << 16 | command << 8 | xdata;
226 136
227 IR_dprintk(1, "RC5X scancode 0x%06x (toggle: %u)\n", 137 IR_dprintk(1, "RC5X scancode 0x%06x (toggle: %u)\n",
@@ -230,10 +140,10 @@ again:
230 } else { 140 } else {
231 /* RC5 */ 141 /* RC5 */
232 u8 command, system; 142 u8 command, system;
233 command = (data->rc5_bits & 0x0003F) >> 0; 143 command = (data->bits & 0x0003F) >> 0;
234 system = (data->rc5_bits & 0x007C0) >> 6; 144 system = (data->bits & 0x007C0) >> 6;
235 toggle = (data->rc5_bits & 0x00800) ? 1 : 0; 145 toggle = (data->bits & 0x00800) ? 1 : 0;
236 command += (data->rc5_bits & 0x01000) ? 0 : 0x40; 146 command += (data->bits & 0x01000) ? 0 : 0x40;
237 scancode = system << 8 | command; 147 scancode = system << 8 | command;
238 148
239 IR_dprintk(1, "RC5 scancode 0x%04x (toggle: %u)\n", 149 IR_dprintk(1, "RC5 scancode 0x%04x (toggle: %u)\n",
@@ -252,54 +162,9 @@ out:
252 return -EINVAL; 162 return -EINVAL;
253} 163}
254 164
255static int ir_rc5_register(struct input_dev *input_dev)
256{
257 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
258 struct decoder_data *data;
259 int rc;
260
261 rc = sysfs_create_group(&ir_dev->dev.kobj, &decoder_attribute_group);
262 if (rc < 0)
263 return rc;
264
265 data = kzalloc(sizeof(*data), GFP_KERNEL);
266 if (!data) {
267 sysfs_remove_group(&ir_dev->dev.kobj, &decoder_attribute_group);
268 return -ENOMEM;
269 }
270
271 data->ir_dev = ir_dev;
272 data->enabled = 1;
273
274 spin_lock(&decoder_lock);
275 list_add_tail(&data->list, &decoder_list);
276 spin_unlock(&decoder_lock);
277
278 return 0;
279}
280
281static int ir_rc5_unregister(struct input_dev *input_dev)
282{
283 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
284 static struct decoder_data *data;
285
286 data = get_decoder_data(ir_dev);
287 if (!data)
288 return 0;
289
290 sysfs_remove_group(&ir_dev->dev.kobj, &decoder_attribute_group);
291
292 spin_lock(&decoder_lock);
293 list_del(&data->list);
294 spin_unlock(&decoder_lock);
295
296 return 0;
297}
298
299static struct ir_raw_handler rc5_handler = { 165static struct ir_raw_handler rc5_handler = {
166 .protocols = IR_TYPE_RC5,
300 .decode = ir_rc5_decode, 167 .decode = ir_rc5_decode,
301 .raw_register = ir_rc5_register,
302 .raw_unregister = ir_rc5_unregister,
303}; 168};
304 169
305static int __init ir_rc5_decode_init(void) 170static int __init ir_rc5_decode_init(void)
diff --git a/drivers/media/IR/ir-rc6-decoder.c b/drivers/media/IR/ir-rc6-decoder.c
index 2bf479f4f1bc..f1624b8279bc 100644
--- a/drivers/media/IR/ir-rc6-decoder.c
+++ b/drivers/media/IR/ir-rc6-decoder.c
@@ -36,10 +36,6 @@
36#define RC6_STARTBIT_MASK 0x08 /* for the header bits */ 36#define RC6_STARTBIT_MASK 0x08 /* for the header bits */
37#define RC6_6A_MCE_TOGGLE_MASK 0x8000 /* for the body bits */ 37#define RC6_6A_MCE_TOGGLE_MASK 0x8000 /* for the body bits */
38 38
39/* Used to register rc6_decoder clients */
40static LIST_HEAD(decoder_list);
41static DEFINE_SPINLOCK(decoder_lock);
42
43enum rc6_mode { 39enum rc6_mode {
44 RC6_MODE_0, 40 RC6_MODE_0,
45 RC6_MODE_6A, 41 RC6_MODE_6A,
@@ -58,89 +54,8 @@ enum rc6_state {
58 STATE_FINISHED, 54 STATE_FINISHED,
59}; 55};
60 56
61struct decoder_data { 57static enum rc6_mode rc6_mode(struct rc6_dec *data)
62 struct list_head list;
63 struct ir_input_dev *ir_dev;
64 int enabled:1;
65
66 /* State machine control */
67 enum rc6_state state;
68 u8 header;
69 u32 body;
70 struct ir_raw_event prev_ev;
71 bool toggle;
72 unsigned count;
73 unsigned wanted_bits;
74};
75
76
77/**
78 * get_decoder_data() - gets decoder data
79 * @input_dev: input device
80 *
81 * Returns the struct decoder_data that corresponds to a device
82 */
83static struct decoder_data *get_decoder_data(struct ir_input_dev *ir_dev)
84{
85 struct decoder_data *data = NULL;
86
87 spin_lock(&decoder_lock);
88 list_for_each_entry(data, &decoder_list, list) {
89 if (data->ir_dev == ir_dev)
90 break;
91 }
92 spin_unlock(&decoder_lock);
93 return data;
94}
95
96static ssize_t store_enabled(struct device *d,
97 struct device_attribute *mattr,
98 const char *buf,
99 size_t len)
100{ 58{
101 unsigned long value;
102 struct ir_input_dev *ir_dev = dev_get_drvdata(d);
103 struct decoder_data *data = get_decoder_data(ir_dev);
104
105 if (!data)
106 return -EINVAL;
107
108 if (strict_strtoul(buf, 10, &value) || value > 1)
109 return -EINVAL;
110
111 data->enabled = value;
112
113 return len;
114}
115
116static ssize_t show_enabled(struct device *d,
117 struct device_attribute *mattr, char *buf)
118{
119 struct ir_input_dev *ir_dev = dev_get_drvdata(d);
120 struct decoder_data *data = get_decoder_data(ir_dev);
121
122 if (!data)
123 return -EINVAL;
124
125 if (data->enabled)
126 return sprintf(buf, "1\n");
127 else
128 return sprintf(buf, "0\n");
129}
130
131static DEVICE_ATTR(enabled, S_IRUGO | S_IWUSR, show_enabled, store_enabled);
132
133static struct attribute *decoder_attributes[] = {
134 &dev_attr_enabled.attr,
135 NULL
136};
137
138static struct attribute_group decoder_attribute_group = {
139 .name = "rc6_decoder",
140 .attrs = decoder_attributes,
141};
142
143static enum rc6_mode rc6_mode(struct decoder_data *data) {
144 switch (data->header & RC6_MODE_MASK) { 59 switch (data->header & RC6_MODE_MASK) {
145 case 0: 60 case 0:
146 return RC6_MODE_0; 61 return RC6_MODE_0;
@@ -162,16 +77,12 @@ static enum rc6_mode rc6_mode(struct decoder_data *data) {
162 */ 77 */
163static int ir_rc6_decode(struct input_dev *input_dev, struct ir_raw_event ev) 78static int ir_rc6_decode(struct input_dev *input_dev, struct ir_raw_event ev)
164{ 79{
165 struct decoder_data *data;
166 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev); 80 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
81 struct rc6_dec *data = &ir_dev->raw->rc6;
167 u32 scancode; 82 u32 scancode;
168 u8 toggle; 83 u8 toggle;
169 84
170 data = get_decoder_data(ir_dev); 85 if (!(ir_dev->raw->enabled_protocols & IR_TYPE_RC6))
171 if (!data)
172 return -EINVAL;
173
174 if (!data->enabled)
175 return 0; 86 return 0;
176 87
177 if (IS_RESET(ev)) { 88 if (IS_RESET(ev)) {
@@ -223,12 +134,11 @@ again:
223 if (ev.pulse) 134 if (ev.pulse)
224 data->header |= 1; 135 data->header |= 1;
225 data->count++; 136 data->count++;
226 data->prev_ev = ev;
227 data->state = STATE_HEADER_BIT_END; 137 data->state = STATE_HEADER_BIT_END;
228 return 0; 138 return 0;
229 139
230 case STATE_HEADER_BIT_END: 140 case STATE_HEADER_BIT_END:
231 if (!is_transition(&ev, &data->prev_ev)) 141 if (!is_transition(&ev, &ir_dev->raw->prev_ev))
232 break; 142 break;
233 143
234 if (data->count == RC6_HEADER_NBITS) 144 if (data->count == RC6_HEADER_NBITS)
@@ -244,12 +154,11 @@ again:
244 break; 154 break;
245 155
246 data->toggle = ev.pulse; 156 data->toggle = ev.pulse;
247 data->prev_ev = ev;
248 data->state = STATE_TOGGLE_END; 157 data->state = STATE_TOGGLE_END;
249 return 0; 158 return 0;
250 159
251 case STATE_TOGGLE_END: 160 case STATE_TOGGLE_END:
252 if (!is_transition(&ev, &data->prev_ev) || 161 if (!is_transition(&ev, &ir_dev->raw->prev_ev) ||
253 !geq_margin(ev.duration, RC6_TOGGLE_END, RC6_UNIT / 2)) 162 !geq_margin(ev.duration, RC6_TOGGLE_END, RC6_UNIT / 2))
254 break; 163 break;
255 164
@@ -259,7 +168,6 @@ again:
259 } 168 }
260 169
261 data->state = STATE_BODY_BIT_START; 170 data->state = STATE_BODY_BIT_START;
262 data->prev_ev = ev;
263 decrease_duration(&ev, RC6_TOGGLE_END); 171 decrease_duration(&ev, RC6_TOGGLE_END);
264 data->count = 0; 172 data->count = 0;
265 173
@@ -291,13 +199,11 @@ again:
291 if (ev.pulse) 199 if (ev.pulse)
292 data->body |= 1; 200 data->body |= 1;
293 data->count++; 201 data->count++;
294 data->prev_ev = ev;
295
296 data->state = STATE_BODY_BIT_END; 202 data->state = STATE_BODY_BIT_END;
297 return 0; 203 return 0;
298 204
299 case STATE_BODY_BIT_END: 205 case STATE_BODY_BIT_END:
300 if (!is_transition(&ev, &data->prev_ev)) 206 if (!is_transition(&ev, &ir_dev->raw->prev_ev))
301 break; 207 break;
302 208
303 if (data->count == data->wanted_bits) 209 if (data->count == data->wanted_bits)
@@ -348,54 +254,9 @@ out:
348 return -EINVAL; 254 return -EINVAL;
349} 255}
350 256
351static int ir_rc6_register(struct input_dev *input_dev)
352{
353 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
354 struct decoder_data *data;
355 int rc;
356
357 rc = sysfs_create_group(&ir_dev->dev.kobj, &decoder_attribute_group);
358 if (rc < 0)
359 return rc;
360
361 data = kzalloc(sizeof(*data), GFP_KERNEL);
362 if (!data) {
363 sysfs_remove_group(&ir_dev->dev.kobj, &decoder_attribute_group);
364 return -ENOMEM;
365 }
366
367 data->ir_dev = ir_dev;
368 data->enabled = 1;
369
370 spin_lock(&decoder_lock);
371 list_add_tail(&data->list, &decoder_list);
372 spin_unlock(&decoder_lock);
373
374 return 0;
375}
376
377static int ir_rc6_unregister(struct input_dev *input_dev)
378{
379 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
380 static struct decoder_data *data;
381
382 data = get_decoder_data(ir_dev);
383 if (!data)
384 return 0;
385
386 sysfs_remove_group(&ir_dev->dev.kobj, &decoder_attribute_group);
387
388 spin_lock(&decoder_lock);
389 list_del(&data->list);
390 spin_unlock(&decoder_lock);
391
392 return 0;
393}
394
395static struct ir_raw_handler rc6_handler = { 257static struct ir_raw_handler rc6_handler = {
258 .protocols = IR_TYPE_RC6,
396 .decode = ir_rc6_decode, 259 .decode = ir_rc6_decode,
397 .raw_register = ir_rc6_register,
398 .raw_unregister = ir_rc6_unregister,
399}; 260};
400 261
401static int __init ir_rc6_decode_init(void) 262static int __init ir_rc6_decode_init(void)
diff --git a/drivers/media/IR/ir-sony-decoder.c b/drivers/media/IR/ir-sony-decoder.c
index 9f440c5c060d..b9074f07c7a0 100644
--- a/drivers/media/IR/ir-sony-decoder.c
+++ b/drivers/media/IR/ir-sony-decoder.c
@@ -23,10 +23,6 @@
23#define SONY_BIT_SPACE (1 * SONY_UNIT) 23#define SONY_BIT_SPACE (1 * SONY_UNIT)
24#define SONY_TRAILER_SPACE (10 * SONY_UNIT) /* minimum */ 24#define SONY_TRAILER_SPACE (10 * SONY_UNIT) /* minimum */
25 25
26/* Used to register sony_decoder clients */
27static LIST_HEAD(decoder_list);
28static DEFINE_SPINLOCK(decoder_lock);
29
30enum sony_state { 26enum sony_state {
31 STATE_INACTIVE, 27 STATE_INACTIVE,
32 STATE_HEADER_SPACE, 28 STATE_HEADER_SPACE,
@@ -35,84 +31,6 @@ enum sony_state {
35 STATE_FINISHED, 31 STATE_FINISHED,
36}; 32};
37 33
38struct decoder_data {
39 struct list_head list;
40 struct ir_input_dev *ir_dev;
41 int enabled:1;
42
43 /* State machine control */
44 enum sony_state state;
45 u32 sony_bits;
46 unsigned count;
47};
48
49
50/**
51 * get_decoder_data() - gets decoder data
52 * @input_dev: input device
53 *
54 * Returns the struct decoder_data that corresponds to a device
55 */
56static struct decoder_data *get_decoder_data(struct ir_input_dev *ir_dev)
57{
58 struct decoder_data *data = NULL;
59
60 spin_lock(&decoder_lock);
61 list_for_each_entry(data, &decoder_list, list) {
62 if (data->ir_dev == ir_dev)
63 break;
64 }
65 spin_unlock(&decoder_lock);
66 return data;
67}
68
69static ssize_t store_enabled(struct device *d,
70 struct device_attribute *mattr,
71 const char *buf,
72 size_t len)
73{
74 unsigned long value;
75 struct ir_input_dev *ir_dev = dev_get_drvdata(d);
76 struct decoder_data *data = get_decoder_data(ir_dev);
77
78 if (!data)
79 return -EINVAL;
80
81 if (strict_strtoul(buf, 10, &value) || value > 1)
82 return -EINVAL;
83
84 data->enabled = value;
85
86 return len;
87}
88
89static ssize_t show_enabled(struct device *d,
90 struct device_attribute *mattr, char *buf)
91{
92 struct ir_input_dev *ir_dev = dev_get_drvdata(d);
93 struct decoder_data *data = get_decoder_data(ir_dev);
94
95 if (!data)
96 return -EINVAL;
97
98 if (data->enabled)
99 return sprintf(buf, "1\n");
100 else
101 return sprintf(buf, "0\n");
102}
103
104static DEVICE_ATTR(enabled, S_IRUGO | S_IWUSR, show_enabled, store_enabled);
105
106static struct attribute *decoder_attributes[] = {
107 &dev_attr_enabled.attr,
108 NULL
109};
110
111static struct attribute_group decoder_attribute_group = {
112 .name = "sony_decoder",
113 .attrs = decoder_attributes,
114};
115
116/** 34/**
117 * ir_sony_decode() - Decode one Sony pulse or space 35 * ir_sony_decode() - Decode one Sony pulse or space
118 * @input_dev: the struct input_dev descriptor of the device 36 * @input_dev: the struct input_dev descriptor of the device
@@ -122,16 +40,12 @@ static struct attribute_group decoder_attribute_group = {
122 */ 40 */
123static int ir_sony_decode(struct input_dev *input_dev, struct ir_raw_event ev) 41static int ir_sony_decode(struct input_dev *input_dev, struct ir_raw_event ev)
124{ 42{
125 struct decoder_data *data;
126 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev); 43 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
44 struct sony_dec *data = &ir_dev->raw->sony;
127 u32 scancode; 45 u32 scancode;
128 u8 device, subdevice, function; 46 u8 device, subdevice, function;
129 47
130 data = get_decoder_data(ir_dev); 48 if (!(ir_dev->raw->enabled_protocols & IR_TYPE_SONY))
131 if (!data)
132 return -EINVAL;
133
134 if (!data->enabled)
135 return 0; 49 return 0;
136 50
137 if (IS_RESET(ev)) { 51 if (IS_RESET(ev)) {
@@ -172,9 +86,9 @@ static int ir_sony_decode(struct input_dev *input_dev, struct ir_raw_event ev)
172 if (!ev.pulse) 86 if (!ev.pulse)
173 break; 87 break;
174 88
175 data->sony_bits <<= 1; 89 data->bits <<= 1;
176 if (eq_margin(ev.duration, SONY_BIT_1_PULSE, SONY_UNIT / 2)) 90 if (eq_margin(ev.duration, SONY_BIT_1_PULSE, SONY_UNIT / 2))
177 data->sony_bits |= 1; 91 data->bits |= 1;
178 else if (!eq_margin(ev.duration, SONY_BIT_0_PULSE, SONY_UNIT / 2)) 92 else if (!eq_margin(ev.duration, SONY_BIT_0_PULSE, SONY_UNIT / 2))
179 break; 93 break;
180 94
@@ -208,19 +122,19 @@ static int ir_sony_decode(struct input_dev *input_dev, struct ir_raw_event ev)
208 122
209 switch (data->count) { 123 switch (data->count) {
210 case 12: 124 case 12:
211 device = bitrev8((data->sony_bits << 3) & 0xF8); 125 device = bitrev8((data->bits << 3) & 0xF8);
212 subdevice = 0; 126 subdevice = 0;
213 function = bitrev8((data->sony_bits >> 4) & 0xFE); 127 function = bitrev8((data->bits >> 4) & 0xFE);
214 break; 128 break;
215 case 15: 129 case 15:
216 device = bitrev8((data->sony_bits >> 0) & 0xFF); 130 device = bitrev8((data->bits >> 0) & 0xFF);
217 subdevice = 0; 131 subdevice = 0;
218 function = bitrev8((data->sony_bits >> 7) & 0xFD); 132 function = bitrev8((data->bits >> 7) & 0xFD);
219 break; 133 break;
220 case 20: 134 case 20:
221 device = bitrev8((data->sony_bits >> 5) & 0xF8); 135 device = bitrev8((data->bits >> 5) & 0xF8);
222 subdevice = bitrev8((data->sony_bits >> 0) & 0xFF); 136 subdevice = bitrev8((data->bits >> 0) & 0xFF);
223 function = bitrev8((data->sony_bits >> 12) & 0xFE); 137 function = bitrev8((data->bits >> 12) & 0xFE);
224 break; 138 break;
225 default: 139 default:
226 IR_dprintk(1, "Sony invalid bitcount %u\n", data->count); 140 IR_dprintk(1, "Sony invalid bitcount %u\n", data->count);
@@ -241,54 +155,9 @@ out:
241 return -EINVAL; 155 return -EINVAL;
242} 156}
243 157
244static int ir_sony_register(struct input_dev *input_dev)
245{
246 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
247 struct decoder_data *data;
248 int rc;
249
250 rc = sysfs_create_group(&ir_dev->dev.kobj, &decoder_attribute_group);
251 if (rc < 0)
252 return rc;
253
254 data = kzalloc(sizeof(*data), GFP_KERNEL);
255 if (!data) {
256 sysfs_remove_group(&ir_dev->dev.kobj, &decoder_attribute_group);
257 return -ENOMEM;
258 }
259
260 data->ir_dev = ir_dev;
261 data->enabled = 1;
262
263 spin_lock(&decoder_lock);
264 list_add_tail(&data->list, &decoder_list);
265 spin_unlock(&decoder_lock);
266
267 return 0;
268}
269
270static int ir_sony_unregister(struct input_dev *input_dev)
271{
272 struct ir_input_dev *ir_dev = input_get_drvdata(input_dev);
273 static struct decoder_data *data;
274
275 data = get_decoder_data(ir_dev);
276 if (!data)
277 return 0;
278
279 sysfs_remove_group(&ir_dev->dev.kobj, &decoder_attribute_group);
280
281 spin_lock(&decoder_lock);
282 list_del(&data->list);
283 spin_unlock(&decoder_lock);
284
285 return 0;
286}
287
288static struct ir_raw_handler sony_handler = { 158static struct ir_raw_handler sony_handler = {
159 .protocols = IR_TYPE_SONY,
289 .decode = ir_sony_decode, 160 .decode = ir_sony_decode,
290 .raw_register = ir_sony_register,
291 .raw_unregister = ir_sony_unregister,
292}; 161};
293 162
294static int __init ir_sony_decode_init(void) 163static int __init ir_sony_decode_init(void)
diff --git a/drivers/media/IR/ir-sysfs.c b/drivers/media/IR/ir-sysfs.c
index 2098dd1488e0..6273047e915b 100644
--- a/drivers/media/IR/ir-sysfs.c
+++ b/drivers/media/IR/ir-sysfs.c
@@ -33,125 +33,172 @@ static struct class ir_input_class = {
33 .devnode = ir_devnode, 33 .devnode = ir_devnode,
34}; 34};
35 35
36static struct {
37 u64 type;
38 char *name;
39} proto_names[] = {
40 { IR_TYPE_UNKNOWN, "unknown" },
41 { IR_TYPE_RC5, "rc-5" },
42 { IR_TYPE_NEC, "nec" },
43 { IR_TYPE_RC6, "rc-6" },
44 { IR_TYPE_JVC, "jvc" },
45 { IR_TYPE_SONY, "sony" },
46 { IR_TYPE_LIRC, "lirc" },
47};
48
49#define PROTO_NONE "none"
50
36/** 51/**
37 * show_protocol() - shows the current IR protocol 52 * show_protocols() - shows the current IR protocol(s)
38 * @d: the device descriptor 53 * @d: the device descriptor
39 * @mattr: the device attribute struct (unused) 54 * @mattr: the device attribute struct (unused)
40 * @buf: a pointer to the output buffer 55 * @buf: a pointer to the output buffer
41 * 56 *
42 * This routine is a callback routine for input read the IR protocol type. 57 * This routine is a callback routine for input read the IR protocol type(s).
43 * it is trigged by reading /sys/class/rc/rc?/current_protocol. 58 * it is trigged by reading /sys/class/rc/rc?/protocols.
44 * It returns the protocol name, as understood by the driver. 59 * It returns the protocol names of supported protocols.
60 * Enabled protocols are printed in brackets.
45 */ 61 */
46static ssize_t show_protocol(struct device *d, 62static ssize_t show_protocols(struct device *d,
47 struct device_attribute *mattr, char *buf) 63 struct device_attribute *mattr, char *buf)
48{ 64{
49 char *s;
50 struct ir_input_dev *ir_dev = dev_get_drvdata(d); 65 struct ir_input_dev *ir_dev = dev_get_drvdata(d);
51 u64 ir_type = ir_dev->rc_tab.ir_type; 66 u64 allowed, enabled;
52 67 char *tmp = buf;
53 IR_dprintk(1, "Current protocol is %lld\n", (long long)ir_type); 68 int i;
54 69
55 /* FIXME: doesn't support multiple protocols at the same time */ 70 if (ir_dev->props->driver_type == RC_DRIVER_SCANCODE) {
56 if (ir_type == IR_TYPE_UNKNOWN) 71 enabled = ir_dev->rc_tab.ir_type;
57 s = "Unknown"; 72 allowed = ir_dev->props->allowed_protos;
58 else if (ir_type == IR_TYPE_RC5) 73 } else {
59 s = "rc-5"; 74 enabled = ir_dev->raw->enabled_protocols;
60 else if (ir_type == IR_TYPE_NEC) 75 allowed = ir_raw_get_allowed_protocols();
61 s = "nec"; 76 }
62 else if (ir_type == IR_TYPE_RC6) 77
63 s = "rc6"; 78 IR_dprintk(1, "allowed - 0x%llx, enabled - 0x%llx\n",
64 else if (ir_type == IR_TYPE_JVC) 79 (long long)allowed,
65 s = "jvc"; 80 (long long)enabled);
66 else if (ir_type == IR_TYPE_SONY)
67 s = "sony";
68 else
69 s = "other";
70 81
71 return sprintf(buf, "%s\n", s); 82 for (i = 0; i < ARRAY_SIZE(proto_names); i++) {
83 if (allowed & enabled & proto_names[i].type)
84 tmp += sprintf(tmp, "[%s] ", proto_names[i].name);
85 else if (allowed & proto_names[i].type)
86 tmp += sprintf(tmp, "%s ", proto_names[i].name);
87 }
88
89 if (tmp != buf)
90 tmp--;
91 *tmp = '\n';
92 return tmp + 1 - buf;
72} 93}
73 94
74/** 95/**
75 * store_protocol() - shows the current IR protocol 96 * store_protocols() - changes the current IR protocol(s)
76 * @d: the device descriptor 97 * @d: the device descriptor
77 * @mattr: the device attribute struct (unused) 98 * @mattr: the device attribute struct (unused)
78 * @buf: a pointer to the input buffer 99 * @buf: a pointer to the input buffer
79 * @len: length of the input buffer 100 * @len: length of the input buffer
80 * 101 *
81 * This routine is a callback routine for changing the IR protocol type. 102 * This routine is a callback routine for changing the IR protocol type.
82 * it is trigged by reading /sys/class/rc/rc?/current_protocol. 103 * It is trigged by writing to /sys/class/rc/rc?/protocols.
83 * It changes the IR the protocol name, if the IR type is recognized 104 * Writing "+proto" will add a protocol to the list of enabled protocols.
84 * by the driver. 105 * Writing "-proto" will remove a protocol from the list of enabled protocols.
85 * If an unknown protocol name is used, returns -EINVAL. 106 * Writing "proto" will enable only "proto".
107 * Writing "none" will disable all protocols.
108 * Returns -EINVAL if an invalid protocol combination or unknown protocol name
109 * is used, otherwise @len.
86 */ 110 */
87static ssize_t store_protocol(struct device *d, 111static ssize_t store_protocols(struct device *d,
88 struct device_attribute *mattr, 112 struct device_attribute *mattr,
89 const char *data, 113 const char *data,
90 size_t len) 114 size_t len)
91{ 115{
92 struct ir_input_dev *ir_dev = dev_get_drvdata(d); 116 struct ir_input_dev *ir_dev = dev_get_drvdata(d);
93 u64 ir_type = 0; 117 bool enable, disable;
94 int rc = -EINVAL; 118 const char *tmp;
119 u64 type;
120 u64 mask;
121 int rc, i, count = 0;
95 unsigned long flags; 122 unsigned long flags;
96 char *buf; 123
97 124 if (ir_dev->props->driver_type == RC_DRIVER_SCANCODE)
98 while ((buf = strsep((char **) &data, " \n")) != NULL) { 125 type = ir_dev->rc_tab.ir_type;
99 if (!strcasecmp(buf, "rc-5") || !strcasecmp(buf, "rc5")) 126 else
100 ir_type |= IR_TYPE_RC5; 127 type = ir_dev->raw->enabled_protocols;
101 if (!strcasecmp(buf, "nec")) 128
102 ir_type |= IR_TYPE_NEC; 129 while ((tmp = strsep((char **) &data, " \n")) != NULL) {
103 if (!strcasecmp(buf, "jvc")) 130 if (!*tmp)
104 ir_type |= IR_TYPE_JVC; 131 break;
105 if (!strcasecmp(buf, "sony")) 132
106 ir_type |= IR_TYPE_SONY; 133 if (*tmp == '+') {
134 enable = true;
135 disable = false;
136 tmp++;
137 } else if (*tmp == '-') {
138 enable = false;
139 disable = true;
140 tmp++;
141 } else {
142 enable = false;
143 disable = false;
144 }
145
146 if (!enable && !disable && !strncasecmp(tmp, PROTO_NONE, sizeof(PROTO_NONE))) {
147 tmp += sizeof(PROTO_NONE);
148 mask = 0;
149 count++;
150 } else {
151 for (i = 0; i < ARRAY_SIZE(proto_names); i++) {
152 if (!strncasecmp(tmp, proto_names[i].name, strlen(proto_names[i].name))) {
153 tmp += strlen(proto_names[i].name);
154 mask = proto_names[i].type;
155 break;
156 }
157 }
158 if (i == ARRAY_SIZE(proto_names)) {
159 IR_dprintk(1, "Unknown protocol: '%s'\n", tmp);
160 return -EINVAL;
161 }
162 count++;
163 }
164
165 if (enable)
166 type |= mask;
167 else if (disable)
168 type &= ~mask;
169 else
170 type = mask;
107 } 171 }
108 172
109 if (!ir_type) { 173 if (!count) {
110 IR_dprintk(1, "Unknown protocol\n"); 174 IR_dprintk(1, "Protocol not specified\n");
111 return -EINVAL; 175 return -EINVAL;
112 } 176 }
113 177
114 if (ir_dev->props && ir_dev->props->change_protocol) 178 if (ir_dev->props && ir_dev->props->change_protocol) {
115 rc = ir_dev->props->change_protocol(ir_dev->props->priv, 179 rc = ir_dev->props->change_protocol(ir_dev->props->priv,
116 ir_type); 180 type);
117 181 if (rc < 0) {
118 if (rc < 0) { 182 IR_dprintk(1, "Error setting protocols to 0x%llx\n",
119 IR_dprintk(1, "Error setting protocol to %lld\n", 183 (long long)type);
120 (long long)ir_type); 184 return -EINVAL;
121 return -EINVAL; 185 }
122 } 186 }
123 187
124 spin_lock_irqsave(&ir_dev->rc_tab.lock, flags); 188 if (ir_dev->props->driver_type == RC_DRIVER_SCANCODE) {
125 ir_dev->rc_tab.ir_type = ir_type; 189 spin_lock_irqsave(&ir_dev->rc_tab.lock, flags);
126 spin_unlock_irqrestore(&ir_dev->rc_tab.lock, flags); 190 ir_dev->rc_tab.ir_type = type;
191 spin_unlock_irqrestore(&ir_dev->rc_tab.lock, flags);
192 } else {
193 ir_dev->raw->enabled_protocols = type;
194 }
127 195
128 IR_dprintk(1, "Current protocol(s) is(are) %lld\n", 196 IR_dprintk(1, "Current protocol(s): 0x%llx\n",
129 (long long)ir_type); 197 (long long)type);
130 198
131 return len; 199 return len;
132} 200}
133 201
134static ssize_t show_supported_protocols(struct device *d,
135 struct device_attribute *mattr, char *buf)
136{
137 char *orgbuf = buf;
138 struct ir_input_dev *ir_dev = dev_get_drvdata(d);
139
140 /* FIXME: doesn't support multiple protocols at the same time */
141 if (ir_dev->props->allowed_protos == IR_TYPE_UNKNOWN)
142 buf += sprintf(buf, "unknown ");
143 if (ir_dev->props->allowed_protos & IR_TYPE_RC5)
144 buf += sprintf(buf, "rc-5 ");
145 if (ir_dev->props->allowed_protos & IR_TYPE_NEC)
146 buf += sprintf(buf, "nec ");
147 if (buf == orgbuf)
148 buf += sprintf(buf, "other ");
149
150 buf += sprintf(buf - 1, "\n");
151
152 return buf - orgbuf;
153}
154
155#define ADD_HOTPLUG_VAR(fmt, val...) \ 202#define ADD_HOTPLUG_VAR(fmt, val...) \
156 do { \ 203 do { \
157 int err = add_uevent_var(env, fmt, val); \ 204 int err = add_uevent_var(env, fmt, val); \
@@ -159,7 +206,7 @@ static ssize_t show_supported_protocols(struct device *d,
159 return err; \ 206 return err; \
160 } while (0) 207 } while (0)
161 208
162static int ir_dev_uevent(struct device *device, struct kobj_uevent_env *env) 209static int rc_dev_uevent(struct device *device, struct kobj_uevent_env *env)
163{ 210{
164 struct ir_input_dev *ir_dev = dev_get_drvdata(device); 211 struct ir_input_dev *ir_dev = dev_get_drvdata(device);
165 212
@@ -174,34 +221,26 @@ static int ir_dev_uevent(struct device *device, struct kobj_uevent_env *env)
174/* 221/*
175 * Static device attribute struct with the sysfs attributes for IR's 222 * Static device attribute struct with the sysfs attributes for IR's
176 */ 223 */
177static DEVICE_ATTR(protocol, S_IRUGO | S_IWUSR, 224static DEVICE_ATTR(protocols, S_IRUGO | S_IWUSR,
178 show_protocol, store_protocol); 225 show_protocols, store_protocols);
179 226
180static DEVICE_ATTR(supported_protocols, S_IRUGO | S_IWUSR, 227static struct attribute *rc_dev_attrs[] = {
181 show_supported_protocols, NULL); 228 &dev_attr_protocols.attr,
182
183static struct attribute *ir_hw_dev_attrs[] = {
184 &dev_attr_protocol.attr,
185 &dev_attr_supported_protocols.attr,
186 NULL, 229 NULL,
187}; 230};
188 231
189static struct attribute_group ir_hw_dev_attr_grp = { 232static struct attribute_group rc_dev_attr_grp = {
190 .attrs = ir_hw_dev_attrs, 233 .attrs = rc_dev_attrs,
191}; 234};
192 235
193static const struct attribute_group *ir_hw_dev_attr_groups[] = { 236static const struct attribute_group *rc_dev_attr_groups[] = {
194 &ir_hw_dev_attr_grp, 237 &rc_dev_attr_grp,
195 NULL 238 NULL
196}; 239};
197 240
198static struct device_type rc_dev_type = { 241static struct device_type rc_dev_type = {
199 .groups = ir_hw_dev_attr_groups, 242 .groups = rc_dev_attr_groups,
200 .uevent = ir_dev_uevent, 243 .uevent = rc_dev_uevent,
201};
202
203static struct device_type ir_raw_dev_type = {
204 .uevent = ir_dev_uevent,
205}; 244};
206 245
207/** 246/**
@@ -221,11 +260,7 @@ int ir_register_class(struct input_dev *input_dev)
221 if (unlikely(devno < 0)) 260 if (unlikely(devno < 0))
222 return devno; 261 return devno;
223 262
224 if (ir_dev->props) { 263 ir_dev->dev.type = &rc_dev_type;
225 if (ir_dev->props->driver_type == RC_DRIVER_SCANCODE)
226 ir_dev->dev.type = &rc_dev_type;
227 } else
228 ir_dev->dev.type = &ir_raw_dev_type;
229 264
230 ir_dev->dev.class = &ir_input_class; 265 ir_dev->dev.class = &ir_input_class;
231 ir_dev->dev.parent = input_dev->dev.parent; 266 ir_dev->dev.parent = input_dev->dev.parent;
diff --git a/drivers/media/IR/keymaps/Makefile b/drivers/media/IR/keymaps/Makefile
index aea649fbcf5a..cbee06243b51 100644
--- a/drivers/media/IR/keymaps/Makefile
+++ b/drivers/media/IR/keymaps/Makefile
@@ -14,6 +14,8 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
14 rc-budget-ci-old.o \ 14 rc-budget-ci-old.o \
15 rc-cinergy-1400.o \ 15 rc-cinergy-1400.o \
16 rc-cinergy.o \ 16 rc-cinergy.o \
17 rc-dib0700-nec.o \
18 rc-dib0700-rc5.o \
17 rc-dm1105-nec.o \ 19 rc-dm1105-nec.o \
18 rc-dntv-live-dvb-t.o \ 20 rc-dntv-live-dvb-t.o \
19 rc-dntv-live-dvbt-pro.o \ 21 rc-dntv-live-dvbt-pro.o \
@@ -37,6 +39,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
37 rc-kaiomy.o \ 39 rc-kaiomy.o \
38 rc-kworld-315u.o \ 40 rc-kworld-315u.o \
39 rc-kworld-plus-tv-analog.o \ 41 rc-kworld-plus-tv-analog.o \
42 rc-lirc.o \
40 rc-manli.o \ 43 rc-manli.o \
41 rc-msi-tvanywhere.o \ 44 rc-msi-tvanywhere.o \
42 rc-msi-tvanywhere-plus.o \ 45 rc-msi-tvanywhere-plus.o \
@@ -57,6 +60,7 @@ obj-$(CONFIG_RC_MAP) += rc-adstech-dvb-t-pci.o \
57 rc-pv951.o \ 60 rc-pv951.o \
58 rc-rc5-hauppauge-new.o \ 61 rc-rc5-hauppauge-new.o \
59 rc-rc5-tv.o \ 62 rc-rc5-tv.o \
63 rc-rc6-mce.o \
60 rc-real-audio-220-32-keys.o \ 64 rc-real-audio-220-32-keys.o \
61 rc-tbs-nec.o \ 65 rc-tbs-nec.o \
62 rc-terratec-cinergy-xs.o \ 66 rc-terratec-cinergy-xs.o \
diff --git a/drivers/media/IR/keymaps/rc-dib0700-nec.c b/drivers/media/IR/keymaps/rc-dib0700-nec.c
new file mode 100644
index 000000000000..ae1832038fbe
--- /dev/null
+++ b/drivers/media/IR/keymaps/rc-dib0700-nec.c
@@ -0,0 +1,124 @@
1/* rc-dvb0700-big.c - Keytable for devices in dvb0700
2 *
3 * Copyright (c) 2010 by Mauro Carvalho Chehab <mchehab@redhat.com>
4 *
5 * TODO: This table is a real mess, as it merges RC codes from several
6 * devices into a big table. It also has both RC-5 and NEC codes inside.
7 * It should be broken into small tables, and the protocols should properly
8 * be indentificated.
9 *
10 * The table were imported from dib0700_devices.c.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 */
17
18#include <media/rc-map.h>
19
20static struct ir_scancode dib0700_nec_table[] = {
21 /* Key codes for the Pixelview SBTVD remote */
22 { 0x8613, KEY_MUTE },
23 { 0x8612, KEY_POWER },
24 { 0x8601, KEY_1 },
25 { 0x8602, KEY_2 },
26 { 0x8603, KEY_3 },
27 { 0x8604, KEY_4 },
28 { 0x8605, KEY_5 },
29 { 0x8606, KEY_6 },
30 { 0x8607, KEY_7 },
31 { 0x8608, KEY_8 },
32 { 0x8609, KEY_9 },
33 { 0x8600, KEY_0 },
34 { 0x860d, KEY_CHANNELUP },
35 { 0x8619, KEY_CHANNELDOWN },
36 { 0x8610, KEY_VOLUMEUP },
37 { 0x860c, KEY_VOLUMEDOWN },
38
39 { 0x860a, KEY_CAMERA },
40 { 0x860b, KEY_ZOOM },
41 { 0x861b, KEY_BACKSPACE },
42 { 0x8615, KEY_ENTER },
43
44 { 0x861d, KEY_UP },
45 { 0x861e, KEY_DOWN },
46 { 0x860e, KEY_LEFT },
47 { 0x860f, KEY_RIGHT },
48
49 { 0x8618, KEY_RECORD },
50 { 0x861a, KEY_STOP },
51
52 /* Key codes for the EvolutePC TVWay+ remote */
53 { 0x7a00, KEY_MENU },
54 { 0x7a01, KEY_RECORD },
55 { 0x7a02, KEY_PLAY },
56 { 0x7a03, KEY_STOP },
57 { 0x7a10, KEY_CHANNELUP },
58 { 0x7a11, KEY_CHANNELDOWN },
59 { 0x7a12, KEY_VOLUMEUP },
60 { 0x7a13, KEY_VOLUMEDOWN },
61 { 0x7a40, KEY_POWER },
62 { 0x7a41, KEY_MUTE },
63
64 /* Key codes for the Elgato EyeTV Diversity silver remote */
65 { 0x4501, KEY_POWER },
66 { 0x4502, KEY_MUTE },
67 { 0x4503, KEY_1 },
68 { 0x4504, KEY_2 },
69 { 0x4505, KEY_3 },
70 { 0x4506, KEY_4 },
71 { 0x4507, KEY_5 },
72 { 0x4508, KEY_6 },
73 { 0x4509, KEY_7 },
74 { 0x450a, KEY_8 },
75 { 0x450b, KEY_9 },
76 { 0x450c, KEY_LAST },
77 { 0x450d, KEY_0 },
78 { 0x450e, KEY_ENTER },
79 { 0x450f, KEY_RED },
80 { 0x4510, KEY_CHANNELUP },
81 { 0x4511, KEY_GREEN },
82 { 0x4512, KEY_VOLUMEDOWN },
83 { 0x4513, KEY_OK },
84 { 0x4514, KEY_VOLUMEUP },
85 { 0x4515, KEY_YELLOW },
86 { 0x4516, KEY_CHANNELDOWN },
87 { 0x4517, KEY_BLUE },
88 { 0x4518, KEY_LEFT }, /* Skip backwards */
89 { 0x4519, KEY_PLAYPAUSE },
90 { 0x451a, KEY_RIGHT }, /* Skip forward */
91 { 0x451b, KEY_REWIND },
92 { 0x451c, KEY_L }, /* Live */
93 { 0x451d, KEY_FASTFORWARD },
94 { 0x451e, KEY_STOP }, /* 'Reveal' for Teletext */
95 { 0x451f, KEY_MENU }, /* KEY_TEXT for Teletext */
96 { 0x4540, KEY_RECORD }, /* Font 'Size' for Teletext */
97 { 0x4541, KEY_SCREEN }, /* Full screen toggle, 'Hold' for Teletext */
98 { 0x4542, KEY_SELECT }, /* Select video input, 'Select' for Teletext */
99};
100
101static struct rc_keymap dib0700_nec_map = {
102 .map = {
103 .scan = dib0700_nec_table,
104 .size = ARRAY_SIZE(dib0700_nec_table),
105 .ir_type = IR_TYPE_NEC,
106 .name = RC_MAP_DIB0700_NEC_TABLE,
107 }
108};
109
110static int __init init_rc_map(void)
111{
112 return ir_register_map(&dib0700_nec_map);
113}
114
115static void __exit exit_rc_map(void)
116{
117 ir_unregister_map(&dib0700_nec_map);
118}
119
120module_init(init_rc_map)
121module_exit(exit_rc_map)
122
123MODULE_LICENSE("GPL");
124MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
diff --git a/drivers/media/IR/keymaps/rc-dib0700-rc5.c b/drivers/media/IR/keymaps/rc-dib0700-rc5.c
new file mode 100644
index 000000000000..4a4797cfd77d
--- /dev/null
+++ b/drivers/media/IR/keymaps/rc-dib0700-rc5.c
@@ -0,0 +1,235 @@
1/* rc-dvb0700-big.c - Keytable for devices in dvb0700
2 *
3 * Copyright (c) 2010 by Mauro Carvalho Chehab <mchehab@redhat.com>
4 *
5 * TODO: This table is a real mess, as it merges RC codes from several
6 * devices into a big table. It also has both RC-5 and NEC codes inside.
7 * It should be broken into small tables, and the protocols should properly
8 * be indentificated.
9 *
10 * The table were imported from dib0700_devices.c.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 */
17
18#include <media/rc-map.h>
19
20static struct ir_scancode dib0700_rc5_table[] = {
21 /* Key codes for the tiny Pinnacle remote*/
22 { 0x0700, KEY_MUTE },
23 { 0x0701, KEY_MENU }, /* Pinnacle logo */
24 { 0x0739, KEY_POWER },
25 { 0x0703, KEY_VOLUMEUP },
26 { 0x0709, KEY_VOLUMEDOWN },
27 { 0x0706, KEY_CHANNELUP },
28 { 0x070c, KEY_CHANNELDOWN },
29 { 0x070f, KEY_1 },
30 { 0x0715, KEY_2 },
31 { 0x0710, KEY_3 },
32 { 0x0718, KEY_4 },
33 { 0x071b, KEY_5 },
34 { 0x071e, KEY_6 },
35 { 0x0711, KEY_7 },
36 { 0x0721, KEY_8 },
37 { 0x0712, KEY_9 },
38 { 0x0727, KEY_0 },
39 { 0x0724, KEY_SCREEN }, /* 'Square' key */
40 { 0x072a, KEY_TEXT }, /* 'T' key */
41 { 0x072d, KEY_REWIND },
42 { 0x0730, KEY_PLAY },
43 { 0x0733, KEY_FASTFORWARD },
44 { 0x0736, KEY_RECORD },
45 { 0x073c, KEY_STOP },
46 { 0x073f, KEY_CANCEL }, /* '?' key */
47
48 /* Key codes for the Terratec Cinergy DT XS Diversity, similar to cinergyT2.c */
49 { 0xeb01, KEY_POWER },
50 { 0xeb02, KEY_1 },
51 { 0xeb03, KEY_2 },
52 { 0xeb04, KEY_3 },
53 { 0xeb05, KEY_4 },
54 { 0xeb06, KEY_5 },
55 { 0xeb07, KEY_6 },
56 { 0xeb08, KEY_7 },
57 { 0xeb09, KEY_8 },
58 { 0xeb0a, KEY_9 },
59 { 0xeb0b, KEY_VIDEO },
60 { 0xeb0c, KEY_0 },
61 { 0xeb0d, KEY_REFRESH },
62 { 0xeb0f, KEY_EPG },
63 { 0xeb10, KEY_UP },
64 { 0xeb11, KEY_LEFT },
65 { 0xeb12, KEY_OK },
66 { 0xeb13, KEY_RIGHT },
67 { 0xeb14, KEY_DOWN },
68 { 0xeb16, KEY_INFO },
69 { 0xeb17, KEY_RED },
70 { 0xeb18, KEY_GREEN },
71 { 0xeb19, KEY_YELLOW },
72 { 0xeb1a, KEY_BLUE },
73 { 0xeb1b, KEY_CHANNELUP },
74 { 0xeb1c, KEY_VOLUMEUP },
75 { 0xeb1d, KEY_MUTE },
76 { 0xeb1e, KEY_VOLUMEDOWN },
77 { 0xeb1f, KEY_CHANNELDOWN },
78 { 0xeb40, KEY_PAUSE },
79 { 0xeb41, KEY_HOME },
80 { 0xeb42, KEY_MENU }, /* DVD Menu */
81 { 0xeb43, KEY_SUBTITLE },
82 { 0xeb44, KEY_TEXT }, /* Teletext */
83 { 0xeb45, KEY_DELETE },
84 { 0xeb46, KEY_TV },
85 { 0xeb47, KEY_DVD },
86 { 0xeb48, KEY_STOP },
87 { 0xeb49, KEY_VIDEO },
88 { 0xeb4a, KEY_AUDIO }, /* Music */
89 { 0xeb4b, KEY_SCREEN }, /* Pic */
90 { 0xeb4c, KEY_PLAY },
91 { 0xeb4d, KEY_BACK },
92 { 0xeb4e, KEY_REWIND },
93 { 0xeb4f, KEY_FASTFORWARD },
94 { 0xeb54, KEY_PREVIOUS },
95 { 0xeb58, KEY_RECORD },
96 { 0xeb5c, KEY_NEXT },
97
98 /* Key codes for the Haupauge WinTV Nova-TD, copied from nova-t-usb2.c (Nova-T USB2) */
99 { 0x1e00, KEY_0 },
100 { 0x1e01, KEY_1 },
101 { 0x1e02, KEY_2 },
102 { 0x1e03, KEY_3 },
103 { 0x1e04, KEY_4 },
104 { 0x1e05, KEY_5 },
105 { 0x1e06, KEY_6 },
106 { 0x1e07, KEY_7 },
107 { 0x1e08, KEY_8 },
108 { 0x1e09, KEY_9 },
109 { 0x1e0a, KEY_KPASTERISK },
110 { 0x1e0b, KEY_RED },
111 { 0x1e0c, KEY_RADIO },
112 { 0x1e0d, KEY_MENU },
113 { 0x1e0e, KEY_GRAVE }, /* # */
114 { 0x1e0f, KEY_MUTE },
115 { 0x1e10, KEY_VOLUMEUP },
116 { 0x1e11, KEY_VOLUMEDOWN },
117 { 0x1e12, KEY_CHANNEL },
118 { 0x1e14, KEY_UP },
119 { 0x1e15, KEY_DOWN },
120 { 0x1e16, KEY_LEFT },
121 { 0x1e17, KEY_RIGHT },
122 { 0x1e18, KEY_VIDEO },
123 { 0x1e19, KEY_AUDIO },
124 { 0x1e1a, KEY_MEDIA },
125 { 0x1e1b, KEY_EPG },
126 { 0x1e1c, KEY_TV },
127 { 0x1e1e, KEY_NEXT },
128 { 0x1e1f, KEY_BACK },
129 { 0x1e20, KEY_CHANNELUP },
130 { 0x1e21, KEY_CHANNELDOWN },
131 { 0x1e24, KEY_LAST }, /* Skip backwards */
132 { 0x1e25, KEY_OK },
133 { 0x1e29, KEY_BLUE},
134 { 0x1e2e, KEY_GREEN },
135 { 0x1e30, KEY_PAUSE },
136 { 0x1e32, KEY_REWIND },
137 { 0x1e34, KEY_FASTFORWARD },
138 { 0x1e35, KEY_PLAY },
139 { 0x1e36, KEY_STOP },
140 { 0x1e37, KEY_RECORD },
141 { 0x1e38, KEY_YELLOW },
142 { 0x1e3b, KEY_GOTO },
143 { 0x1e3d, KEY_POWER },
144
145 /* Key codes for the Leadtek Winfast DTV Dongle */
146 { 0x0042, KEY_POWER },
147 { 0x077c, KEY_TUNER },
148 { 0x0f4e, KEY_PRINT }, /* PREVIEW */
149 { 0x0840, KEY_SCREEN }, /* full screen toggle*/
150 { 0x0f71, KEY_DOT }, /* frequency */
151 { 0x0743, KEY_0 },
152 { 0x0c41, KEY_1 },
153 { 0x0443, KEY_2 },
154 { 0x0b7f, KEY_3 },
155 { 0x0e41, KEY_4 },
156 { 0x0643, KEY_5 },
157 { 0x097f, KEY_6 },
158 { 0x0d7e, KEY_7 },
159 { 0x057c, KEY_8 },
160 { 0x0a40, KEY_9 },
161 { 0x0e4e, KEY_CLEAR },
162 { 0x047c, KEY_CHANNEL }, /* show channel number */
163 { 0x0f41, KEY_LAST }, /* recall */
164 { 0x0342, KEY_MUTE },
165 { 0x064c, KEY_RESERVED }, /* PIP button*/
166 { 0x0172, KEY_SHUFFLE }, /* SNAPSHOT */
167 { 0x0c4e, KEY_PLAYPAUSE }, /* TIMESHIFT */
168 { 0x0b70, KEY_RECORD },
169 { 0x037d, KEY_VOLUMEUP },
170 { 0x017d, KEY_VOLUMEDOWN },
171 { 0x0242, KEY_CHANNELUP },
172 { 0x007d, KEY_CHANNELDOWN },
173
174 /* Key codes for Nova-TD "credit card" remote control. */
175 { 0x1d00, KEY_0 },
176 { 0x1d01, KEY_1 },
177 { 0x1d02, KEY_2 },
178 { 0x1d03, KEY_3 },
179 { 0x1d04, KEY_4 },
180 { 0x1d05, KEY_5 },
181 { 0x1d06, KEY_6 },
182 { 0x1d07, KEY_7 },
183 { 0x1d08, KEY_8 },
184 { 0x1d09, KEY_9 },
185 { 0x1d0a, KEY_TEXT },
186 { 0x1d0d, KEY_MENU },
187 { 0x1d0f, KEY_MUTE },
188 { 0x1d10, KEY_VOLUMEUP },
189 { 0x1d11, KEY_VOLUMEDOWN },
190 { 0x1d12, KEY_CHANNEL },
191 { 0x1d14, KEY_UP },
192 { 0x1d15, KEY_DOWN },
193 { 0x1d16, KEY_LEFT },
194 { 0x1d17, KEY_RIGHT },
195 { 0x1d1c, KEY_TV },
196 { 0x1d1e, KEY_NEXT },
197 { 0x1d1f, KEY_BACK },
198 { 0x1d20, KEY_CHANNELUP },
199 { 0x1d21, KEY_CHANNELDOWN },
200 { 0x1d24, KEY_LAST },
201 { 0x1d25, KEY_OK },
202 { 0x1d30, KEY_PAUSE },
203 { 0x1d32, KEY_REWIND },
204 { 0x1d34, KEY_FASTFORWARD },
205 { 0x1d35, KEY_PLAY },
206 { 0x1d36, KEY_STOP },
207 { 0x1d37, KEY_RECORD },
208 { 0x1d3b, KEY_GOTO },
209 { 0x1d3d, KEY_POWER },
210};
211
212static struct rc_keymap dib0700_rc5_map = {
213 .map = {
214 .scan = dib0700_rc5_table,
215 .size = ARRAY_SIZE(dib0700_rc5_table),
216 .ir_type = IR_TYPE_RC5,
217 .name = RC_MAP_DIB0700_RC5_TABLE,
218 }
219};
220
221static int __init init_rc_map(void)
222{
223 return ir_register_map(&dib0700_rc5_map);
224}
225
226static void __exit exit_rc_map(void)
227{
228 ir_unregister_map(&dib0700_rc5_map);
229}
230
231module_init(init_rc_map)
232module_exit(exit_rc_map)
233
234MODULE_LICENSE("GPL");
235MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
diff --git a/drivers/media/IR/keymaps/rc-lirc.c b/drivers/media/IR/keymaps/rc-lirc.c
new file mode 100644
index 000000000000..43fcf9035082
--- /dev/null
+++ b/drivers/media/IR/keymaps/rc-lirc.c
@@ -0,0 +1,41 @@
1/* rc-lirc.c - Empty dummy keytable, for use when its preferred to pass
2 * all raw IR data to the lirc userspace decoder.
3 *
4 * Copyright (c) 2010 by Jarod Wilson <jarod@redhat.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <media/ir-core.h>
13
14static struct ir_scancode lirc[] = {
15 { },
16};
17
18static struct rc_keymap lirc_map = {
19 .map = {
20 .scan = lirc,
21 .size = ARRAY_SIZE(lirc),
22 .ir_type = IR_TYPE_LIRC,
23 .name = RC_MAP_LIRC,
24 }
25};
26
27static int __init init_rc_map_lirc(void)
28{
29 return ir_register_map(&lirc_map);
30}
31
32static void __exit exit_rc_map_lirc(void)
33{
34 ir_unregister_map(&lirc_map);
35}
36
37module_init(init_rc_map_lirc)
38module_exit(exit_rc_map_lirc)
39
40MODULE_LICENSE("GPL");
41MODULE_AUTHOR("Jarod Wilson <jarod@redhat.com>");
diff --git a/drivers/media/IR/keymaps/rc-rc6-mce.c b/drivers/media/IR/keymaps/rc-rc6-mce.c
new file mode 100644
index 000000000000..c6726a8039be
--- /dev/null
+++ b/drivers/media/IR/keymaps/rc-rc6-mce.c
@@ -0,0 +1,105 @@
1/* rc-rc6-mce.c - Keytable for Windows Media Center RC-6 remotes for use
2 * with the Media Center Edition eHome Infrared Transceiver.
3 *
4 * Copyright (c) 2010 by Jarod Wilson <jarod@redhat.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <media/rc-map.h>
13
14static struct ir_scancode rc6_mce[] = {
15 { 0x800f0415, KEY_REWIND },
16 { 0x800f0414, KEY_FASTFORWARD },
17 { 0x800f041b, KEY_PREVIOUS },
18 { 0x800f041a, KEY_NEXT },
19
20 { 0x800f0416, KEY_PLAY },
21 { 0x800f0418, KEY_PAUSE },
22 { 0x800f0419, KEY_STOP },
23 { 0x800f0417, KEY_RECORD },
24
25 { 0x800f041e, KEY_UP },
26 { 0x800f041f, KEY_DOWN },
27 { 0x800f0420, KEY_LEFT },
28 { 0x800f0421, KEY_RIGHT },
29
30 { 0x800f040b, KEY_ENTER },
31 { 0x800f0422, KEY_OK },
32 { 0x800f0423, KEY_EXIT },
33 { 0x800f040a, KEY_DELETE },
34
35 { 0x800f040e, KEY_MUTE },
36 { 0x800f0410, KEY_VOLUMEUP },
37 { 0x800f0411, KEY_VOLUMEDOWN },
38 { 0x800f0412, KEY_CHANNELUP },
39 { 0x800f0413, KEY_CHANNELDOWN },
40
41 { 0x800f0401, KEY_NUMERIC_1 },
42 { 0x800f0402, KEY_NUMERIC_2 },
43 { 0x800f0403, KEY_NUMERIC_3 },
44 { 0x800f0404, KEY_NUMERIC_4 },
45 { 0x800f0405, KEY_NUMERIC_5 },
46 { 0x800f0406, KEY_NUMERIC_6 },
47 { 0x800f0407, KEY_NUMERIC_7 },
48 { 0x800f0408, KEY_NUMERIC_8 },
49 { 0x800f0409, KEY_NUMERIC_9 },
50 { 0x800f0400, KEY_NUMERIC_0 },
51
52 { 0x800f041d, KEY_NUMERIC_STAR },
53 { 0x800f041c, KEY_NUMERIC_POUND },
54
55 { 0x800f0446, KEY_TV },
56 { 0x800f0447, KEY_AUDIO }, /* My Music */
57 { 0x800f0448, KEY_PVR }, /* RecordedTV */
58 { 0x800f0449, KEY_CAMERA },
59 { 0x800f044a, KEY_VIDEO },
60 { 0x800f0424, KEY_DVD },
61 { 0x800f0425, KEY_TUNER }, /* LiveTV */
62 { 0x800f0450, KEY_RADIO },
63
64 { 0x800f044c, KEY_LANGUAGE },
65 { 0x800f0427, KEY_ZOOM }, /* Aspect */
66
67 { 0x800f045b, KEY_RED },
68 { 0x800f045c, KEY_GREEN },
69 { 0x800f045d, KEY_YELLOW },
70 { 0x800f045e, KEY_BLUE },
71
72 { 0x800f040f, KEY_INFO },
73 { 0x800f0426, KEY_EPG }, /* Guide */
74 { 0x800f045a, KEY_SUBTITLE }, /* Caption/Teletext */
75 { 0x800f044d, KEY_TITLE },
76
77 { 0x800f040c, KEY_POWER },
78 { 0x800f040d, KEY_PROG1 }, /* Windows MCE button */
79
80};
81
82static struct rc_keymap rc6_mce_map = {
83 .map = {
84 .scan = rc6_mce,
85 .size = ARRAY_SIZE(rc6_mce),
86 .ir_type = IR_TYPE_RC6,
87 .name = RC_MAP_RC6_MCE,
88 }
89};
90
91static int __init init_rc_map_rc6_mce(void)
92{
93 return ir_register_map(&rc6_mce_map);
94}
95
96static void __exit exit_rc_map_rc6_mce(void)
97{
98 ir_unregister_map(&rc6_mce_map);
99}
100
101module_init(init_rc_map_rc6_mce)
102module_exit(exit_rc_map_rc6_mce)
103
104MODULE_LICENSE("GPL");
105MODULE_AUTHOR("Jarod Wilson <jarod@redhat.com>");
diff --git a/drivers/media/IR/lirc_dev.c b/drivers/media/IR/lirc_dev.c
new file mode 100644
index 000000000000..899891bec352
--- /dev/null
+++ b/drivers/media/IR/lirc_dev.c
@@ -0,0 +1,764 @@
1/*
2 * LIRC base driver
3 *
4 * by Artur Lipowski <alipowski@interia.pl>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/kernel.h>
24#include <linux/sched.h>
25#include <linux/errno.h>
26#include <linux/ioctl.h>
27#include <linux/fs.h>
28#include <linux/poll.h>
29#include <linux/completion.h>
30#include <linux/errno.h>
31#include <linux/mutex.h>
32#include <linux/wait.h>
33#include <linux/unistd.h>
34#include <linux/kthread.h>
35#include <linux/bitops.h>
36#include <linux/device.h>
37#include <linux/cdev.h>
38
39#include <media/lirc.h>
40#include <media/lirc_dev.h>
41
42static int debug;
43
44#define IRCTL_DEV_NAME "BaseRemoteCtl"
45#define NOPLUG -1
46#define LOGHEAD "lirc_dev (%s[%d]): "
47
48static dev_t lirc_base_dev;
49
50struct irctl {
51 struct lirc_driver d;
52 int attached;
53 int open;
54
55 struct mutex irctl_lock;
56 struct lirc_buffer *buf;
57 unsigned int chunk_size;
58
59 struct task_struct *task;
60 long jiffies_to_wait;
61
62 struct cdev cdev;
63};
64
65static DEFINE_MUTEX(lirc_dev_lock);
66
67static struct irctl *irctls[MAX_IRCTL_DEVICES];
68
69/* Only used for sysfs but defined to void otherwise */
70static struct class *lirc_class;
71
72/* helper function
73 * initializes the irctl structure
74 */
75static void init_irctl(struct irctl *ir)
76{
77 dev_dbg(ir->d.dev, LOGHEAD "initializing irctl\n",
78 ir->d.name, ir->d.minor);
79 mutex_init(&ir->irctl_lock);
80 ir->d.minor = NOPLUG;
81}
82
83static void cleanup(struct irctl *ir)
84{
85 dev_dbg(ir->d.dev, LOGHEAD "cleaning up\n", ir->d.name, ir->d.minor);
86
87 device_destroy(lirc_class, MKDEV(MAJOR(lirc_base_dev), ir->d.minor));
88
89 if (ir->buf != ir->d.rbuf) {
90 lirc_buffer_free(ir->buf);
91 kfree(ir->buf);
92 }
93 ir->buf = NULL;
94}
95
96/* helper function
97 * reads key codes from driver and puts them into buffer
98 * returns 0 on success
99 */
100static int add_to_buf(struct irctl *ir)
101{
102 if (ir->d.add_to_buf) {
103 int res = -ENODATA;
104 int got_data = 0;
105
106 /*
107 * service the device as long as it is returning
108 * data and we have space
109 */
110get_data:
111 res = ir->d.add_to_buf(ir->d.data, ir->buf);
112 if (res == 0) {
113 got_data++;
114 goto get_data;
115 }
116
117 if (res == -ENODEV)
118 kthread_stop(ir->task);
119
120 return got_data ? 0 : res;
121 }
122
123 return 0;
124}
125
126/* main function of the polling thread
127 */
128static int lirc_thread(void *irctl)
129{
130 struct irctl *ir = irctl;
131
132 dev_dbg(ir->d.dev, LOGHEAD "poll thread started\n",
133 ir->d.name, ir->d.minor);
134
135 do {
136 if (ir->open) {
137 if (ir->jiffies_to_wait) {
138 set_current_state(TASK_INTERRUPTIBLE);
139 schedule_timeout(ir->jiffies_to_wait);
140 }
141 if (kthread_should_stop())
142 break;
143 if (!add_to_buf(ir))
144 wake_up_interruptible(&ir->buf->wait_poll);
145 } else {
146 set_current_state(TASK_INTERRUPTIBLE);
147 schedule();
148 }
149 } while (!kthread_should_stop());
150
151 dev_dbg(ir->d.dev, LOGHEAD "poll thread ended\n",
152 ir->d.name, ir->d.minor);
153
154 return 0;
155}
156
157
158static struct file_operations fops = {
159 .owner = THIS_MODULE,
160 .read = lirc_dev_fop_read,
161 .write = lirc_dev_fop_write,
162 .poll = lirc_dev_fop_poll,
163 .unlocked_ioctl = lirc_dev_fop_ioctl,
164 .open = lirc_dev_fop_open,
165 .release = lirc_dev_fop_close,
166};
167
168static int lirc_cdev_add(struct irctl *ir)
169{
170 int retval;
171 struct lirc_driver *d = &ir->d;
172
173 if (d->fops) {
174 cdev_init(&ir->cdev, d->fops);
175 ir->cdev.owner = d->owner;
176 } else {
177 cdev_init(&ir->cdev, &fops);
178 ir->cdev.owner = THIS_MODULE;
179 }
180 kobject_set_name(&ir->cdev.kobj, "lirc%d", d->minor);
181
182 retval = cdev_add(&ir->cdev, MKDEV(MAJOR(lirc_base_dev), d->minor), 1);
183 if (retval)
184 kobject_put(&ir->cdev.kobj);
185
186 return retval;
187}
188
189int lirc_register_driver(struct lirc_driver *d)
190{
191 struct irctl *ir;
192 int minor;
193 int bytes_in_key;
194 unsigned int chunk_size;
195 unsigned int buffer_size;
196 int err;
197
198 if (!d) {
199 printk(KERN_ERR "lirc_dev: lirc_register_driver: "
200 "driver pointer must be not NULL!\n");
201 err = -EBADRQC;
202 goto out;
203 }
204
205 if (MAX_IRCTL_DEVICES <= d->minor) {
206 dev_err(d->dev, "lirc_dev: lirc_register_driver: "
207 "\"minor\" must be between 0 and %d (%d)!\n",
208 MAX_IRCTL_DEVICES-1, d->minor);
209 err = -EBADRQC;
210 goto out;
211 }
212
213 if (1 > d->code_length || (BUFLEN * 8) < d->code_length) {
214 dev_err(d->dev, "lirc_dev: lirc_register_driver: "
215 "code length in bits for minor (%d) "
216 "must be less than %d!\n",
217 d->minor, BUFLEN * 8);
218 err = -EBADRQC;
219 goto out;
220 }
221
222 dev_dbg(d->dev, "lirc_dev: lirc_register_driver: sample_rate: %d\n",
223 d->sample_rate);
224 if (d->sample_rate) {
225 if (2 > d->sample_rate || HZ < d->sample_rate) {
226 dev_err(d->dev, "lirc_dev: lirc_register_driver: "
227 "sample_rate must be between 2 and %d!\n", HZ);
228 err = -EBADRQC;
229 goto out;
230 }
231 if (!d->add_to_buf) {
232 dev_err(d->dev, "lirc_dev: lirc_register_driver: "
233 "add_to_buf cannot be NULL when "
234 "sample_rate is set\n");
235 err = -EBADRQC;
236 goto out;
237 }
238 } else if (!(d->fops && d->fops->read) && !d->rbuf) {
239 dev_err(d->dev, "lirc_dev: lirc_register_driver: "
240 "fops->read and rbuf cannot all be NULL!\n");
241 err = -EBADRQC;
242 goto out;
243 } else if (!d->rbuf) {
244 if (!(d->fops && d->fops->read && d->fops->poll &&
245 d->fops->unlocked_ioctl)) {
246 dev_err(d->dev, "lirc_dev: lirc_register_driver: "
247 "neither read, poll nor unlocked_ioctl can be NULL!\n");
248 err = -EBADRQC;
249 goto out;
250 }
251 }
252
253 mutex_lock(&lirc_dev_lock);
254
255 minor = d->minor;
256
257 if (minor < 0) {
258 /* find first free slot for driver */
259 for (minor = 0; minor < MAX_IRCTL_DEVICES; minor++)
260 if (!irctls[minor])
261 break;
262 if (MAX_IRCTL_DEVICES == minor) {
263 dev_err(d->dev, "lirc_dev: lirc_register_driver: "
264 "no free slots for drivers!\n");
265 err = -ENOMEM;
266 goto out_lock;
267 }
268 } else if (irctls[minor]) {
269 dev_err(d->dev, "lirc_dev: lirc_register_driver: "
270 "minor (%d) just registered!\n", minor);
271 err = -EBUSY;
272 goto out_lock;
273 }
274
275 ir = kzalloc(sizeof(struct irctl), GFP_KERNEL);
276 if (!ir) {
277 err = -ENOMEM;
278 goto out_lock;
279 }
280 init_irctl(ir);
281 irctls[minor] = ir;
282 d->minor = minor;
283
284 if (d->sample_rate) {
285 ir->jiffies_to_wait = HZ / d->sample_rate;
286 } else {
287 /* it means - wait for external event in task queue */
288 ir->jiffies_to_wait = 0;
289 }
290
291 /* some safety check 8-) */
292 d->name[sizeof(d->name)-1] = '\0';
293
294 bytes_in_key = BITS_TO_LONGS(d->code_length) +
295 (d->code_length % 8 ? 1 : 0);
296 buffer_size = d->buffer_size ? d->buffer_size : BUFLEN / bytes_in_key;
297 chunk_size = d->chunk_size ? d->chunk_size : bytes_in_key;
298
299 if (d->rbuf) {
300 ir->buf = d->rbuf;
301 } else {
302 ir->buf = kmalloc(sizeof(struct lirc_buffer), GFP_KERNEL);
303 if (!ir->buf) {
304 err = -ENOMEM;
305 goto out_lock;
306 }
307 err = lirc_buffer_init(ir->buf, chunk_size, buffer_size);
308 if (err) {
309 kfree(ir->buf);
310 goto out_lock;
311 }
312 }
313 ir->chunk_size = ir->buf->chunk_size;
314
315 if (d->features == 0)
316 d->features = LIRC_CAN_REC_LIRCCODE;
317
318 ir->d = *d;
319 ir->d.minor = minor;
320
321 device_create(lirc_class, ir->d.dev,
322 MKDEV(MAJOR(lirc_base_dev), ir->d.minor), NULL,
323 "lirc%u", ir->d.minor);
324
325 if (d->sample_rate) {
326 /* try to fire up polling thread */
327 ir->task = kthread_run(lirc_thread, (void *)ir, "lirc_dev");
328 if (IS_ERR(ir->task)) {
329 dev_err(d->dev, "lirc_dev: lirc_register_driver: "
330 "cannot run poll thread for minor = %d\n",
331 d->minor);
332 err = -ECHILD;
333 goto out_sysfs;
334 }
335 }
336
337 err = lirc_cdev_add(ir);
338 if (err)
339 goto out_sysfs;
340
341 ir->attached = 1;
342 mutex_unlock(&lirc_dev_lock);
343
344 dev_info(ir->d.dev, "lirc_dev: driver %s registered at minor = %d\n",
345 ir->d.name, ir->d.minor);
346 return minor;
347
348out_sysfs:
349 device_destroy(lirc_class, MKDEV(MAJOR(lirc_base_dev), ir->d.minor));
350out_lock:
351 mutex_unlock(&lirc_dev_lock);
352out:
353 return err;
354}
355EXPORT_SYMBOL(lirc_register_driver);
356
357int lirc_unregister_driver(int minor)
358{
359 struct irctl *ir;
360
361 if (minor < 0 || minor >= MAX_IRCTL_DEVICES) {
362 printk(KERN_ERR "lirc_dev: lirc_unregister_driver: "
363 "\"minor (%d)\" must be between 0 and %d!\n",
364 minor, MAX_IRCTL_DEVICES-1);
365 return -EBADRQC;
366 }
367
368 ir = irctls[minor];
369
370 mutex_lock(&lirc_dev_lock);
371
372 if (ir->d.minor != minor) {
373 printk(KERN_ERR "lirc_dev: lirc_unregister_driver: "
374 "minor (%d) device not registered!", minor);
375 mutex_unlock(&lirc_dev_lock);
376 return -ENOENT;
377 }
378
379 /* end up polling thread */
380 if (ir->task)
381 kthread_stop(ir->task);
382
383 dev_dbg(ir->d.dev, "lirc_dev: driver %s unregistered from minor = %d\n",
384 ir->d.name, ir->d.minor);
385
386 ir->attached = 0;
387 if (ir->open) {
388 dev_dbg(ir->d.dev, LOGHEAD "releasing opened driver\n",
389 ir->d.name, ir->d.minor);
390 wake_up_interruptible(&ir->buf->wait_poll);
391 mutex_lock(&ir->irctl_lock);
392 ir->d.set_use_dec(ir->d.data);
393 module_put(ir->d.owner);
394 mutex_unlock(&ir->irctl_lock);
395 cdev_del(&ir->cdev);
396 } else {
397 cleanup(ir);
398 cdev_del(&ir->cdev);
399 kfree(ir);
400 irctls[minor] = NULL;
401 }
402
403 mutex_unlock(&lirc_dev_lock);
404
405 return 0;
406}
407EXPORT_SYMBOL(lirc_unregister_driver);
408
409int lirc_dev_fop_open(struct inode *inode, struct file *file)
410{
411 struct irctl *ir;
412 int retval = 0;
413
414 if (iminor(inode) >= MAX_IRCTL_DEVICES) {
415 printk(KERN_WARNING "lirc_dev [%d]: open result = -ENODEV\n",
416 iminor(inode));
417 return -ENODEV;
418 }
419
420 if (mutex_lock_interruptible(&lirc_dev_lock))
421 return -ERESTARTSYS;
422
423 ir = irctls[iminor(inode)];
424 if (!ir) {
425 retval = -ENODEV;
426 goto error;
427 }
428 file->private_data = ir;
429
430 dev_dbg(ir->d.dev, LOGHEAD "open called\n", ir->d.name, ir->d.minor);
431
432 if (ir->d.minor == NOPLUG) {
433 retval = -ENODEV;
434 goto error;
435 }
436
437 if (ir->open) {
438 retval = -EBUSY;
439 goto error;
440 }
441
442 if (try_module_get(ir->d.owner)) {
443 ++ir->open;
444 retval = ir->d.set_use_inc(ir->d.data);
445
446 if (retval) {
447 module_put(ir->d.owner);
448 --ir->open;
449 } else {
450 lirc_buffer_clear(ir->buf);
451 }
452 if (ir->task)
453 wake_up_process(ir->task);
454 }
455
456error:
457 if (ir)
458 dev_dbg(ir->d.dev, LOGHEAD "open result = %d\n",
459 ir->d.name, ir->d.minor, retval);
460
461 mutex_unlock(&lirc_dev_lock);
462
463 return retval;
464}
465EXPORT_SYMBOL(lirc_dev_fop_open);
466
467int lirc_dev_fop_close(struct inode *inode, struct file *file)
468{
469 struct irctl *ir = irctls[iminor(inode)];
470
471 dev_dbg(ir->d.dev, LOGHEAD "close called\n", ir->d.name, ir->d.minor);
472
473 WARN_ON(mutex_lock_killable(&lirc_dev_lock));
474
475 --ir->open;
476 if (ir->attached) {
477 ir->d.set_use_dec(ir->d.data);
478 module_put(ir->d.owner);
479 } else {
480 cleanup(ir);
481 irctls[ir->d.minor] = NULL;
482 kfree(ir);
483 }
484
485 mutex_unlock(&lirc_dev_lock);
486
487 return 0;
488}
489EXPORT_SYMBOL(lirc_dev_fop_close);
490
491unsigned int lirc_dev_fop_poll(struct file *file, poll_table *wait)
492{
493 struct irctl *ir = irctls[iminor(file->f_dentry->d_inode)];
494 unsigned int ret;
495
496 dev_dbg(ir->d.dev, LOGHEAD "poll called\n", ir->d.name, ir->d.minor);
497
498 if (!ir->attached) {
499 mutex_unlock(&ir->irctl_lock);
500 return POLLERR;
501 }
502
503 poll_wait(file, &ir->buf->wait_poll, wait);
504
505 if (ir->buf)
506 if (lirc_buffer_empty(ir->buf))
507 ret = 0;
508 else
509 ret = POLLIN | POLLRDNORM;
510 else
511 ret = POLLERR;
512
513 dev_dbg(ir->d.dev, LOGHEAD "poll result = %d\n",
514 ir->d.name, ir->d.minor, ret);
515
516 return ret;
517}
518EXPORT_SYMBOL(lirc_dev_fop_poll);
519
520long lirc_dev_fop_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
521{
522 unsigned long mode;
523 int result = 0;
524 struct irctl *ir = file->private_data;
525
526 dev_dbg(ir->d.dev, LOGHEAD "ioctl called (0x%x)\n",
527 ir->d.name, ir->d.minor, cmd);
528
529 if (ir->d.minor == NOPLUG || !ir->attached) {
530 dev_dbg(ir->d.dev, LOGHEAD "ioctl result = -ENODEV\n",
531 ir->d.name, ir->d.minor);
532 return -ENODEV;
533 }
534
535 mutex_lock(&ir->irctl_lock);
536
537 switch (cmd) {
538 case LIRC_GET_FEATURES:
539 result = put_user(ir->d.features, (unsigned long *)arg);
540 break;
541 case LIRC_GET_REC_MODE:
542 if (!(ir->d.features & LIRC_CAN_REC_MASK)) {
543 result = -ENOSYS;
544 break;
545 }
546
547 result = put_user(LIRC_REC2MODE
548 (ir->d.features & LIRC_CAN_REC_MASK),
549 (unsigned long *)arg);
550 break;
551 case LIRC_SET_REC_MODE:
552 if (!(ir->d.features & LIRC_CAN_REC_MASK)) {
553 result = -ENOSYS;
554 break;
555 }
556
557 result = get_user(mode, (unsigned long *)arg);
558 if (!result && !(LIRC_MODE2REC(mode) & ir->d.features))
559 result = -EINVAL;
560 /*
561 * FIXME: We should actually set the mode somehow but
562 * for now, lirc_serial doesn't support mode changing either
563 */
564 break;
565 case LIRC_GET_LENGTH:
566 result = put_user(ir->d.code_length, (unsigned long *)arg);
567 break;
568 case LIRC_GET_MIN_TIMEOUT:
569 if (!(ir->d.features & LIRC_CAN_SET_REC_TIMEOUT) ||
570 ir->d.min_timeout == 0) {
571 result = -ENOSYS;
572 break;
573 }
574
575 result = put_user(ir->d.min_timeout, (unsigned long *)arg);
576 break;
577 case LIRC_GET_MAX_TIMEOUT:
578 if (!(ir->d.features & LIRC_CAN_SET_REC_TIMEOUT) ||
579 ir->d.max_timeout == 0) {
580 result = -ENOSYS;
581 break;
582 }
583
584 result = put_user(ir->d.max_timeout, (unsigned long *)arg);
585 break;
586 default:
587 result = -EINVAL;
588 }
589
590 dev_dbg(ir->d.dev, LOGHEAD "ioctl result = %d\n",
591 ir->d.name, ir->d.minor, result);
592
593 mutex_unlock(&ir->irctl_lock);
594
595 return result;
596}
597EXPORT_SYMBOL(lirc_dev_fop_ioctl);
598
599ssize_t lirc_dev_fop_read(struct file *file,
600 char *buffer,
601 size_t length,
602 loff_t *ppos)
603{
604 struct irctl *ir = irctls[iminor(file->f_dentry->d_inode)];
605 unsigned char buf[ir->chunk_size];
606 int ret = 0, written = 0;
607 DECLARE_WAITQUEUE(wait, current);
608
609 dev_dbg(ir->d.dev, LOGHEAD "read called\n", ir->d.name, ir->d.minor);
610
611 if (mutex_lock_interruptible(&ir->irctl_lock))
612 return -ERESTARTSYS;
613 if (!ir->attached) {
614 mutex_unlock(&ir->irctl_lock);
615 return -ENODEV;
616 }
617
618 if (length % ir->chunk_size) {
619 dev_dbg(ir->d.dev, LOGHEAD "read result = -EINVAL\n",
620 ir->d.name, ir->d.minor);
621 mutex_unlock(&ir->irctl_lock);
622 return -EINVAL;
623 }
624
625 /*
626 * we add ourselves to the task queue before buffer check
627 * to avoid losing scan code (in case when queue is awaken somewhere
628 * between while condition checking and scheduling)
629 */
630 add_wait_queue(&ir->buf->wait_poll, &wait);
631 set_current_state(TASK_INTERRUPTIBLE);
632
633 /*
634 * while we didn't provide 'length' bytes, device is opened in blocking
635 * mode and 'copy_to_user' is happy, wait for data.
636 */
637 while (written < length && ret == 0) {
638 if (lirc_buffer_empty(ir->buf)) {
639 /* According to the read(2) man page, 'written' can be
640 * returned as less than 'length', instead of blocking
641 * again, returning -EWOULDBLOCK, or returning
642 * -ERESTARTSYS */
643 if (written)
644 break;
645 if (file->f_flags & O_NONBLOCK) {
646 ret = -EWOULDBLOCK;
647 break;
648 }
649 if (signal_pending(current)) {
650 ret = -ERESTARTSYS;
651 break;
652 }
653
654 mutex_unlock(&ir->irctl_lock);
655 schedule();
656 set_current_state(TASK_INTERRUPTIBLE);
657
658 if (mutex_lock_interruptible(&ir->irctl_lock)) {
659 ret = -ERESTARTSYS;
660 remove_wait_queue(&ir->buf->wait_poll, &wait);
661 set_current_state(TASK_RUNNING);
662 goto out_unlocked;
663 }
664
665 if (!ir->attached) {
666 ret = -ENODEV;
667 break;
668 }
669 } else {
670 lirc_buffer_read(ir->buf, buf);
671 ret = copy_to_user((void *)buffer+written, buf,
672 ir->buf->chunk_size);
673 written += ir->buf->chunk_size;
674 }
675 }
676
677 remove_wait_queue(&ir->buf->wait_poll, &wait);
678 set_current_state(TASK_RUNNING);
679 mutex_unlock(&ir->irctl_lock);
680
681out_unlocked:
682 dev_dbg(ir->d.dev, LOGHEAD "read result = %s (%d)\n",
683 ir->d.name, ir->d.minor, ret ? "-EFAULT" : "OK", ret);
684
685 return ret ? ret : written;
686}
687EXPORT_SYMBOL(lirc_dev_fop_read);
688
689void *lirc_get_pdata(struct file *file)
690{
691 void *data = NULL;
692
693 if (file && file->f_dentry && file->f_dentry->d_inode &&
694 file->f_dentry->d_inode->i_rdev) {
695 struct irctl *ir;
696 ir = irctls[iminor(file->f_dentry->d_inode)];
697 data = ir->d.data;
698 }
699
700 return data;
701}
702EXPORT_SYMBOL(lirc_get_pdata);
703
704
705ssize_t lirc_dev_fop_write(struct file *file, const char *buffer,
706 size_t length, loff_t *ppos)
707{
708 struct irctl *ir = irctls[iminor(file->f_dentry->d_inode)];
709
710 dev_dbg(ir->d.dev, LOGHEAD "write called\n", ir->d.name, ir->d.minor);
711
712 if (!ir->attached)
713 return -ENODEV;
714
715 return -EINVAL;
716}
717EXPORT_SYMBOL(lirc_dev_fop_write);
718
719
720static int __init lirc_dev_init(void)
721{
722 int retval;
723
724 lirc_class = class_create(THIS_MODULE, "lirc");
725 if (IS_ERR(lirc_class)) {
726 retval = PTR_ERR(lirc_class);
727 printk(KERN_ERR "lirc_dev: class_create failed\n");
728 goto error;
729 }
730
731 retval = alloc_chrdev_region(&lirc_base_dev, 0, MAX_IRCTL_DEVICES,
732 IRCTL_DEV_NAME);
733 if (retval) {
734 class_destroy(lirc_class);
735 printk(KERN_ERR "lirc_dev: alloc_chrdev_region failed\n");
736 goto error;
737 }
738
739
740 printk(KERN_INFO "lirc_dev: IR Remote Control driver registered, "
741 "major %d \n", MAJOR(lirc_base_dev));
742
743error:
744 return retval;
745}
746
747
748
749static void __exit lirc_dev_exit(void)
750{
751 class_destroy(lirc_class);
752 unregister_chrdev_region(lirc_base_dev, MAX_IRCTL_DEVICES);
753 printk(KERN_INFO "lirc_dev: module unloaded\n");
754}
755
756module_init(lirc_dev_init);
757module_exit(lirc_dev_exit);
758
759MODULE_DESCRIPTION("LIRC base driver module");
760MODULE_AUTHOR("Artur Lipowski");
761MODULE_LICENSE("GPL");
762
763module_param(debug, bool, S_IRUGO | S_IWUSR);
764MODULE_PARM_DESC(debug, "Enable debugging messages");
diff --git a/drivers/media/IR/mceusb.c b/drivers/media/IR/mceusb.c
new file mode 100644
index 000000000000..78bf7f77a1a0
--- /dev/null
+++ b/drivers/media/IR/mceusb.c
@@ -0,0 +1,1143 @@
1/*
2 * Driver for USB Windows Media Center Ed. eHome Infrared Transceivers
3 *
4 * Copyright (c) 2010 by Jarod Wilson <jarod@redhat.com>
5 *
6 * Based on the original lirc_mceusb and lirc_mceusb2 drivers, by Dan
7 * Conti, Martin Blatter and Daniel Melander, the latter of which was
8 * in turn also based on the lirc_atiusb driver by Paul Miller. The
9 * two mce drivers were merged into one by Jarod Wilson, with transmit
10 * support for the 1st-gen device added primarily by Patrick Calhoun,
11 * with a bit of tweaks by Jarod. Debugging improvements and proper
12 * support for what appears to be 3rd-gen hardware added by Jarod.
13 * Initial port from lirc driver to ir-core drivery by Jarod, based
14 * partially on a port to an earlier proposed IR infrastructure by
15 * Jon Smirl, which included enhancements and simplifications to the
16 * incoming IR buffer parsing routines.
17 *
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 *
33 */
34
35#include <linux/device.h>
36#include <linux/module.h>
37#include <linux/slab.h>
38#include <linux/usb.h>
39#include <linux/input.h>
40#include <media/ir-core.h>
41#include <media/ir-common.h>
42
43#define DRIVER_VERSION "1.91"
44#define DRIVER_AUTHOR "Jarod Wilson <jarod@wilsonet.com>"
45#define DRIVER_DESC "Windows Media Center Ed. eHome Infrared Transceiver " \
46 "device driver"
47#define DRIVER_NAME "mceusb"
48
49#define USB_BUFLEN 32 /* USB reception buffer length */
50#define USB_CTRL_MSG_SZ 2 /* Size of usb ctrl msg on gen1 hw */
51#define MCE_G1_INIT_MSGS 40 /* Init messages on gen1 hw to throw out */
52
53/* MCE constants */
54#define MCE_CMDBUF_SIZE 384 /* MCE Command buffer length */
55#define MCE_TIME_UNIT 50 /* Approx 50us resolution */
56#define MCE_CODE_LENGTH 5 /* Normal length of packet (with header) */
57#define MCE_PACKET_SIZE 4 /* Normal length of packet (without header) */
58#define MCE_PACKET_HEADER 0x84 /* Actual header format is 0x80 + num_bytes */
59#define MCE_CONTROL_HEADER 0x9F /* MCE status header */
60#define MCE_TX_HEADER_LENGTH 3 /* # of bytes in the initializing tx header */
61#define MCE_MAX_CHANNELS 2 /* Two transmitters, hardware dependent? */
62#define MCE_DEFAULT_TX_MASK 0x03 /* Val opts: TX1=0x01, TX2=0x02, ALL=0x03 */
63#define MCE_PULSE_BIT 0x80 /* Pulse bit, MSB set == PULSE else SPACE */
64#define MCE_PULSE_MASK 0x7F /* Pulse mask */
65#define MCE_MAX_PULSE_LENGTH 0x7F /* Longest transmittable pulse symbol */
66#define MCE_PACKET_LENGTH_MASK 0x1F /* Packet length mask */
67
68
69/* module parameters */
70#ifdef CONFIG_USB_DEBUG
71static int debug = 1;
72#else
73static int debug;
74#endif
75
76/* general constants */
77#define SEND_FLAG_IN_PROGRESS 1
78#define SEND_FLAG_COMPLETE 2
79#define RECV_FLAG_IN_PROGRESS 3
80#define RECV_FLAG_COMPLETE 4
81
82#define MCEUSB_RX 1
83#define MCEUSB_TX 2
84
85#define VENDOR_PHILIPS 0x0471
86#define VENDOR_SMK 0x0609
87#define VENDOR_TATUNG 0x1460
88#define VENDOR_GATEWAY 0x107b
89#define VENDOR_SHUTTLE 0x1308
90#define VENDOR_SHUTTLE2 0x051c
91#define VENDOR_MITSUMI 0x03ee
92#define VENDOR_TOPSEED 0x1784
93#define VENDOR_RICAVISION 0x179d
94#define VENDOR_ITRON 0x195d
95#define VENDOR_FIC 0x1509
96#define VENDOR_LG 0x043e
97#define VENDOR_MICROSOFT 0x045e
98#define VENDOR_FORMOSA 0x147a
99#define VENDOR_FINTEK 0x1934
100#define VENDOR_PINNACLE 0x2304
101#define VENDOR_ECS 0x1019
102#define VENDOR_WISTRON 0x0fb8
103#define VENDOR_COMPRO 0x185b
104#define VENDOR_NORTHSTAR 0x04eb
105#define VENDOR_REALTEK 0x0bda
106#define VENDOR_TIVO 0x105a
107
108static struct usb_device_id mceusb_dev_table[] = {
109 /* Original Microsoft MCE IR Transceiver (often HP-branded) */
110 { USB_DEVICE(VENDOR_MICROSOFT, 0x006d) },
111 /* Philips Infrared Transceiver - Sahara branded */
112 { USB_DEVICE(VENDOR_PHILIPS, 0x0608) },
113 /* Philips Infrared Transceiver - HP branded */
114 { USB_DEVICE(VENDOR_PHILIPS, 0x060c) },
115 /* Philips SRM5100 */
116 { USB_DEVICE(VENDOR_PHILIPS, 0x060d) },
117 /* Philips Infrared Transceiver - Omaura */
118 { USB_DEVICE(VENDOR_PHILIPS, 0x060f) },
119 /* Philips Infrared Transceiver - Spinel plus */
120 { USB_DEVICE(VENDOR_PHILIPS, 0x0613) },
121 /* Philips eHome Infrared Transceiver */
122 { USB_DEVICE(VENDOR_PHILIPS, 0x0815) },
123 /* Realtek MCE IR Receiver */
124 { USB_DEVICE(VENDOR_REALTEK, 0x0161) },
125 /* SMK/Toshiba G83C0004D410 */
126 { USB_DEVICE(VENDOR_SMK, 0x031d) },
127 /* SMK eHome Infrared Transceiver (Sony VAIO) */
128 { USB_DEVICE(VENDOR_SMK, 0x0322) },
129 /* bundled with Hauppauge PVR-150 */
130 { USB_DEVICE(VENDOR_SMK, 0x0334) },
131 /* SMK eHome Infrared Transceiver */
132 { USB_DEVICE(VENDOR_SMK, 0x0338) },
133 /* Tatung eHome Infrared Transceiver */
134 { USB_DEVICE(VENDOR_TATUNG, 0x9150) },
135 /* Shuttle eHome Infrared Transceiver */
136 { USB_DEVICE(VENDOR_SHUTTLE, 0xc001) },
137 /* Shuttle eHome Infrared Transceiver */
138 { USB_DEVICE(VENDOR_SHUTTLE2, 0xc001) },
139 /* Gateway eHome Infrared Transceiver */
140 { USB_DEVICE(VENDOR_GATEWAY, 0x3009) },
141 /* Mitsumi */
142 { USB_DEVICE(VENDOR_MITSUMI, 0x2501) },
143 /* Topseed eHome Infrared Transceiver */
144 { USB_DEVICE(VENDOR_TOPSEED, 0x0001) },
145 /* Topseed HP eHome Infrared Transceiver */
146 { USB_DEVICE(VENDOR_TOPSEED, 0x0006) },
147 /* Topseed eHome Infrared Transceiver */
148 { USB_DEVICE(VENDOR_TOPSEED, 0x0007) },
149 /* Topseed eHome Infrared Transceiver */
150 { USB_DEVICE(VENDOR_TOPSEED, 0x0008) },
151 /* Topseed eHome Infrared Transceiver */
152 { USB_DEVICE(VENDOR_TOPSEED, 0x000a) },
153 /* Topseed eHome Infrared Transceiver */
154 { USB_DEVICE(VENDOR_TOPSEED, 0x0011) },
155 /* Ricavision internal Infrared Transceiver */
156 { USB_DEVICE(VENDOR_RICAVISION, 0x0010) },
157 /* Itron ione Libra Q-11 */
158 { USB_DEVICE(VENDOR_ITRON, 0x7002) },
159 /* FIC eHome Infrared Transceiver */
160 { USB_DEVICE(VENDOR_FIC, 0x9242) },
161 /* LG eHome Infrared Transceiver */
162 { USB_DEVICE(VENDOR_LG, 0x9803) },
163 /* Microsoft MCE Infrared Transceiver */
164 { USB_DEVICE(VENDOR_MICROSOFT, 0x00a0) },
165 /* Formosa eHome Infrared Transceiver */
166 { USB_DEVICE(VENDOR_FORMOSA, 0xe015) },
167 /* Formosa21 / eHome Infrared Receiver */
168 { USB_DEVICE(VENDOR_FORMOSA, 0xe016) },
169 /* Formosa aim / Trust MCE Infrared Receiver */
170 { USB_DEVICE(VENDOR_FORMOSA, 0xe017) },
171 /* Formosa Industrial Computing / Beanbag Emulation Device */
172 { USB_DEVICE(VENDOR_FORMOSA, 0xe018) },
173 /* Formosa21 / eHome Infrared Receiver */
174 { USB_DEVICE(VENDOR_FORMOSA, 0xe03a) },
175 /* Formosa Industrial Computing AIM IR605/A */
176 { USB_DEVICE(VENDOR_FORMOSA, 0xe03c) },
177 /* Formosa Industrial Computing */
178 { USB_DEVICE(VENDOR_FORMOSA, 0xe03e) },
179 /* Fintek eHome Infrared Transceiver */
180 { USB_DEVICE(VENDOR_FINTEK, 0x0602) },
181 /* Fintek eHome Infrared Transceiver (in the AOpen MP45) */
182 { USB_DEVICE(VENDOR_FINTEK, 0x0702) },
183 /* Pinnacle Remote Kit */
184 { USB_DEVICE(VENDOR_PINNACLE, 0x0225) },
185 /* Elitegroup Computer Systems IR */
186 { USB_DEVICE(VENDOR_ECS, 0x0f38) },
187 /* Wistron Corp. eHome Infrared Receiver */
188 { USB_DEVICE(VENDOR_WISTRON, 0x0002) },
189 /* Compro K100 */
190 { USB_DEVICE(VENDOR_COMPRO, 0x3020) },
191 /* Compro K100 v2 */
192 { USB_DEVICE(VENDOR_COMPRO, 0x3082) },
193 /* Northstar Systems, Inc. eHome Infrared Transceiver */
194 { USB_DEVICE(VENDOR_NORTHSTAR, 0xe004) },
195 /* TiVo PC IR Receiver */
196 { USB_DEVICE(VENDOR_TIVO, 0x2000) },
197 /* Terminating entry */
198 { }
199};
200
201static struct usb_device_id gen3_list[] = {
202 { USB_DEVICE(VENDOR_PINNACLE, 0x0225) },
203 { USB_DEVICE(VENDOR_TOPSEED, 0x0008) },
204 {}
205};
206
207static struct usb_device_id microsoft_gen1_list[] = {
208 { USB_DEVICE(VENDOR_MICROSOFT, 0x006d) },
209 {}
210};
211
212static struct usb_device_id std_tx_mask_list[] = {
213 { USB_DEVICE(VENDOR_MICROSOFT, 0x006d) },
214 { USB_DEVICE(VENDOR_PHILIPS, 0x060c) },
215 { USB_DEVICE(VENDOR_SMK, 0x031d) },
216 { USB_DEVICE(VENDOR_SMK, 0x0322) },
217 { USB_DEVICE(VENDOR_SMK, 0x0334) },
218 { USB_DEVICE(VENDOR_TOPSEED, 0x0001) },
219 { USB_DEVICE(VENDOR_TOPSEED, 0x0006) },
220 { USB_DEVICE(VENDOR_TOPSEED, 0x0007) },
221 { USB_DEVICE(VENDOR_TOPSEED, 0x0008) },
222 { USB_DEVICE(VENDOR_TOPSEED, 0x000a) },
223 { USB_DEVICE(VENDOR_TOPSEED, 0x0011) },
224 { USB_DEVICE(VENDOR_PINNACLE, 0x0225) },
225 {}
226};
227
228/* data structure for each usb transceiver */
229struct mceusb_dev {
230 /* ir-core bits */
231 struct ir_input_dev *irdev;
232 struct ir_dev_props *props;
233 struct ir_raw_event rawir;
234
235 /* core device bits */
236 struct device *dev;
237 struct input_dev *idev;
238
239 /* usb */
240 struct usb_device *usbdev;
241 struct urb *urb_in;
242 struct usb_endpoint_descriptor *usb_ep_in;
243 struct usb_endpoint_descriptor *usb_ep_out;
244
245 /* buffers and dma */
246 unsigned char *buf_in;
247 unsigned int len_in;
248 u8 cmd; /* MCE command type */
249 u8 rem; /* Remaining IR data bytes in packet */
250 dma_addr_t dma_in;
251 dma_addr_t dma_out;
252
253 struct {
254 u32 connected:1;
255 u32 tx_mask_inverted:1;
256 u32 microsoft_gen1:1;
257 u32 reserved:29;
258 } flags;
259
260 /* transmit support */
261 int send_flags;
262 u32 carrier;
263 unsigned char tx_mask;
264
265 char name[128];
266 char phys[64];
267};
268
269/*
270 * MCE Device Command Strings
271 * Device command responses vary from device to device...
272 * - DEVICE_RESET resets the hardware to its default state
273 * - GET_REVISION fetches the hardware/software revision, common
274 * replies are ff 0b 45 ff 1b 08 and ff 0b 50 ff 1b 42
275 * - GET_CARRIER_FREQ gets the carrier mode and frequency of the
276 * device, with replies in the form of 9f 06 MM FF, where MM is 0-3,
277 * meaning clk of 10000000, 2500000, 625000 or 156250, and FF is
278 * ((clk / frequency) - 1)
279 * - GET_RX_TIMEOUT fetches the receiver timeout in units of 50us,
280 * response in the form of 9f 0c msb lsb
281 * - GET_TX_BITMASK fetches the transmitter bitmask, replies in
282 * the form of 9f 08 bm, where bm is the bitmask
283 * - GET_RX_SENSOR fetches the RX sensor setting -- long-range
284 * general use one or short-range learning one, in the form of
285 * 9f 14 ss, where ss is either 01 for long-range or 02 for short
286 * - SET_CARRIER_FREQ sets a new carrier mode and frequency
287 * - SET_TX_BITMASK sets the transmitter bitmask
288 * - SET_RX_TIMEOUT sets the receiver timeout
289 * - SET_RX_SENSOR sets which receiver sensor to use
290 */
291static char DEVICE_RESET[] = {0x00, 0xff, 0xaa};
292static char GET_REVISION[] = {0xff, 0x0b};
293static char GET_UNKNOWN[] = {0xff, 0x18};
294static char GET_UNKNOWN2[] = {0x9f, 0x05};
295static char GET_CARRIER_FREQ[] = {0x9f, 0x07};
296static char GET_RX_TIMEOUT[] = {0x9f, 0x0d};
297static char GET_TX_BITMASK[] = {0x9f, 0x13};
298static char GET_RX_SENSOR[] = {0x9f, 0x15};
299/* sub in desired values in lower byte or bytes for full command */
300/* FIXME: make use of these for transmit.
301static char SET_CARRIER_FREQ[] = {0x9f, 0x06, 0x00, 0x00};
302static char SET_TX_BITMASK[] = {0x9f, 0x08, 0x00};
303static char SET_RX_TIMEOUT[] = {0x9f, 0x0c, 0x00, 0x00};
304static char SET_RX_SENSOR[] = {0x9f, 0x14, 0x00};
305*/
306
307static void mceusb_dev_printdata(struct mceusb_dev *ir, char *buf,
308 int len, bool out)
309{
310 char codes[USB_BUFLEN * 3 + 1];
311 char inout[9];
312 int i;
313 u8 cmd, subcmd, data1, data2;
314 struct device *dev = ir->dev;
315 int idx = 0;
316
317 /* skip meaningless 0xb1 0x60 header bytes on orig receiver */
318 if (ir->flags.microsoft_gen1 && !out)
319 idx = 2;
320
321 if (len <= idx)
322 return;
323
324 for (i = 0; i < len && i < USB_BUFLEN; i++)
325 snprintf(codes + i * 3, 4, "%02x ", buf[i] & 0xFF);
326
327 dev_info(dev, "%sx data: %s (length=%d)\n",
328 (out ? "t" : "r"), codes, len);
329
330 if (out)
331 strcpy(inout, "Request\0");
332 else
333 strcpy(inout, "Got\0");
334
335 cmd = buf[idx] & 0xff;
336 subcmd = buf[idx + 1] & 0xff;
337 data1 = buf[idx + 2] & 0xff;
338 data2 = buf[idx + 3] & 0xff;
339
340 switch (cmd) {
341 case 0x00:
342 if (subcmd == 0xff && data1 == 0xaa)
343 dev_info(dev, "Device reset requested\n");
344 else
345 dev_info(dev, "Unknown command 0x%02x 0x%02x\n",
346 cmd, subcmd);
347 break;
348 case 0xff:
349 switch (subcmd) {
350 case 0x0b:
351 if (len == 2)
352 dev_info(dev, "Get hw/sw rev?\n");
353 else
354 dev_info(dev, "hw/sw rev 0x%02x 0x%02x "
355 "0x%02x 0x%02x\n", data1, data2,
356 buf[idx + 4], buf[idx + 5]);
357 break;
358 case 0xaa:
359 dev_info(dev, "Device reset requested\n");
360 break;
361 case 0xfe:
362 dev_info(dev, "Previous command not supported\n");
363 break;
364 case 0x18:
365 case 0x1b:
366 default:
367 dev_info(dev, "Unknown command 0x%02x 0x%02x\n",
368 cmd, subcmd);
369 break;
370 }
371 break;
372 case 0x9f:
373 switch (subcmd) {
374 case 0x03:
375 dev_info(dev, "Ping\n");
376 break;
377 case 0x04:
378 dev_info(dev, "Resp to 9f 05 of 0x%02x 0x%02x\n",
379 data1, data2);
380 break;
381 case 0x06:
382 dev_info(dev, "%s carrier mode and freq of "
383 "0x%02x 0x%02x\n", inout, data1, data2);
384 break;
385 case 0x07:
386 dev_info(dev, "Get carrier mode and freq\n");
387 break;
388 case 0x08:
389 dev_info(dev, "%s transmit blaster mask of 0x%02x\n",
390 inout, data1);
391 break;
392 case 0x0c:
393 /* value is in units of 50us, so x*50/100 or x/2 ms */
394 dev_info(dev, "%s receive timeout of %d ms\n",
395 inout, ((data1 << 8) | data2) / 2);
396 break;
397 case 0x0d:
398 dev_info(dev, "Get receive timeout\n");
399 break;
400 case 0x13:
401 dev_info(dev, "Get transmit blaster mask\n");
402 break;
403 case 0x14:
404 dev_info(dev, "%s %s-range receive sensor in use\n",
405 inout, data1 == 0x02 ? "short" : "long");
406 break;
407 case 0x15:
408 if (len == 2)
409 dev_info(dev, "Get receive sensor\n");
410 else
411 dev_info(dev, "Received pulse count is %d\n",
412 ((data1 << 8) | data2));
413 break;
414 case 0xfe:
415 dev_info(dev, "Error! Hardware is likely wedged...\n");
416 break;
417 case 0x05:
418 case 0x09:
419 case 0x0f:
420 default:
421 dev_info(dev, "Unknown command 0x%02x 0x%02x\n",
422 cmd, subcmd);
423 break;
424 }
425 break;
426 default:
427 break;
428 }
429}
430
431static void usb_async_callback(struct urb *urb, struct pt_regs *regs)
432{
433 struct mceusb_dev *ir;
434 int len;
435
436 if (!urb)
437 return;
438
439 ir = urb->context;
440 if (ir) {
441 len = urb->actual_length;
442
443 dev_dbg(ir->dev, "callback called (status=%d len=%d)\n",
444 urb->status, len);
445
446 if (debug)
447 mceusb_dev_printdata(ir, urb->transfer_buffer,
448 len, true);
449 }
450
451}
452
453/* request incoming or send outgoing usb packet - used to initialize remote */
454static void mce_request_packet(struct mceusb_dev *ir,
455 struct usb_endpoint_descriptor *ep,
456 unsigned char *data, int size, int urb_type)
457{
458 int res;
459 struct urb *async_urb;
460 struct device *dev = ir->dev;
461 unsigned char *async_buf;
462
463 if (urb_type == MCEUSB_TX) {
464 async_urb = usb_alloc_urb(0, GFP_KERNEL);
465 if (unlikely(!async_urb)) {
466 dev_err(dev, "Error, couldn't allocate urb!\n");
467 return;
468 }
469
470 async_buf = kzalloc(size, GFP_KERNEL);
471 if (!async_buf) {
472 dev_err(dev, "Error, couldn't allocate buf!\n");
473 usb_free_urb(async_urb);
474 return;
475 }
476
477 /* outbound data */
478 usb_fill_int_urb(async_urb, ir->usbdev,
479 usb_sndintpipe(ir->usbdev, ep->bEndpointAddress),
480 async_buf, size, (usb_complete_t) usb_async_callback,
481 ir, ep->bInterval);
482 memcpy(async_buf, data, size);
483
484 } else if (urb_type == MCEUSB_RX) {
485 /* standard request */
486 async_urb = ir->urb_in;
487 ir->send_flags = RECV_FLAG_IN_PROGRESS;
488
489 } else {
490 dev_err(dev, "Error! Unknown urb type %d\n", urb_type);
491 return;
492 }
493
494 dev_dbg(dev, "receive request called (size=%#x)\n", size);
495
496 async_urb->transfer_buffer_length = size;
497 async_urb->dev = ir->usbdev;
498
499 res = usb_submit_urb(async_urb, GFP_ATOMIC);
500 if (res) {
501 dev_dbg(dev, "receive request FAILED! (res=%d)\n", res);
502 return;
503 }
504 dev_dbg(dev, "receive request complete (res=%d)\n", res);
505}
506
507static void mce_async_out(struct mceusb_dev *ir, unsigned char *data, int size)
508{
509 mce_request_packet(ir, ir->usb_ep_out, data, size, MCEUSB_TX);
510}
511
512static void mce_sync_in(struct mceusb_dev *ir, unsigned char *data, int size)
513{
514 mce_request_packet(ir, ir->usb_ep_in, data, size, MCEUSB_RX);
515}
516
517/* Send data out the IR blaster port(s) */
518static int mceusb_tx_ir(void *priv, int *txbuf, u32 n)
519{
520 struct mceusb_dev *ir = priv;
521 int i, ret = 0;
522 int count, cmdcount = 0;
523 unsigned char *cmdbuf; /* MCE command buffer */
524 long signal_duration = 0; /* Singnal length in us */
525 struct timeval start_time, end_time;
526
527 do_gettimeofday(&start_time);
528
529 count = n / sizeof(int);
530
531 cmdbuf = kzalloc(sizeof(int) * MCE_CMDBUF_SIZE, GFP_KERNEL);
532 if (!cmdbuf)
533 return -ENOMEM;
534
535 /* MCE tx init header */
536 cmdbuf[cmdcount++] = MCE_CONTROL_HEADER;
537 cmdbuf[cmdcount++] = 0x08;
538 cmdbuf[cmdcount++] = ir->tx_mask;
539
540 /* Generate mce packet data */
541 for (i = 0; (i < count) && (cmdcount < MCE_CMDBUF_SIZE); i++) {
542 signal_duration += txbuf[i];
543 txbuf[i] = txbuf[i] / MCE_TIME_UNIT;
544
545 do { /* loop to support long pulses/spaces > 127*50us=6.35ms */
546
547 /* Insert mce packet header every 4th entry */
548 if ((cmdcount < MCE_CMDBUF_SIZE) &&
549 (cmdcount - MCE_TX_HEADER_LENGTH) %
550 MCE_CODE_LENGTH == 0)
551 cmdbuf[cmdcount++] = MCE_PACKET_HEADER;
552
553 /* Insert mce packet data */
554 if (cmdcount < MCE_CMDBUF_SIZE)
555 cmdbuf[cmdcount++] =
556 (txbuf[i] < MCE_PULSE_BIT ?
557 txbuf[i] : MCE_MAX_PULSE_LENGTH) |
558 (i & 1 ? 0x00 : MCE_PULSE_BIT);
559 else {
560 ret = -EINVAL;
561 goto out;
562 }
563
564 } while ((txbuf[i] > MCE_MAX_PULSE_LENGTH) &&
565 (txbuf[i] -= MCE_MAX_PULSE_LENGTH));
566 }
567
568 /* Fix packet length in last header */
569 cmdbuf[cmdcount - (cmdcount - MCE_TX_HEADER_LENGTH) % MCE_CODE_LENGTH] =
570 0x80 + (cmdcount - MCE_TX_HEADER_LENGTH) % MCE_CODE_LENGTH - 1;
571
572 /* Check if we have room for the empty packet at the end */
573 if (cmdcount >= MCE_CMDBUF_SIZE) {
574 ret = -EINVAL;
575 goto out;
576 }
577
578 /* All mce commands end with an empty packet (0x80) */
579 cmdbuf[cmdcount++] = 0x80;
580
581 /* Transmit the command to the mce device */
582 mce_async_out(ir, cmdbuf, cmdcount);
583
584 /*
585 * The lircd gap calculation expects the write function to
586 * wait the time it takes for the ircommand to be sent before
587 * it returns.
588 */
589 do_gettimeofday(&end_time);
590 signal_duration -= (end_time.tv_usec - start_time.tv_usec) +
591 (end_time.tv_sec - start_time.tv_sec) * 1000000;
592
593 /* delay with the closest number of ticks */
594 set_current_state(TASK_INTERRUPTIBLE);
595 schedule_timeout(usecs_to_jiffies(signal_duration));
596
597out:
598 kfree(cmdbuf);
599 return ret ? ret : n;
600}
601
602/* Sets active IR outputs -- mce devices typically (all?) have two */
603static int mceusb_set_tx_mask(void *priv, u32 mask)
604{
605 struct mceusb_dev *ir = priv;
606
607 if (ir->flags.tx_mask_inverted)
608 ir->tx_mask = (mask != 0x03 ? mask ^ 0x03 : mask) << 1;
609 else
610 ir->tx_mask = mask;
611
612 return 0;
613}
614
615/* Sets the send carrier frequency and mode */
616static int mceusb_set_tx_carrier(void *priv, u32 carrier)
617{
618 struct mceusb_dev *ir = priv;
619 int clk = 10000000;
620 int prescaler = 0, divisor = 0;
621 unsigned char cmdbuf[4] = { 0x9f, 0x06, 0x00, 0x00 };
622
623 /* Carrier has changed */
624 if (ir->carrier != carrier) {
625
626 if (carrier == 0) {
627 ir->carrier = carrier;
628 cmdbuf[2] = 0x01;
629 cmdbuf[3] = 0x80;
630 dev_dbg(ir->dev, "%s: disabling carrier "
631 "modulation\n", __func__);
632 mce_async_out(ir, cmdbuf, sizeof(cmdbuf));
633 return carrier;
634 }
635
636 for (prescaler = 0; prescaler < 4; ++prescaler) {
637 divisor = (clk >> (2 * prescaler)) / carrier;
638 if (divisor <= 0xFF) {
639 ir->carrier = carrier;
640 cmdbuf[2] = prescaler;
641 cmdbuf[3] = divisor;
642 dev_dbg(ir->dev, "%s: requesting %u HZ "
643 "carrier\n", __func__, carrier);
644
645 /* Transmit new carrier to mce device */
646 mce_async_out(ir, cmdbuf, sizeof(cmdbuf));
647 return carrier;
648 }
649 }
650
651 return -EINVAL;
652
653 }
654
655 return carrier;
656}
657
658static void mceusb_process_ir_data(struct mceusb_dev *ir, int buf_len)
659{
660 struct ir_raw_event rawir = { .pulse = false, .duration = 0 };
661 int i, start_index = 0;
662 u8 hdr = MCE_CONTROL_HEADER;
663
664 /* skip meaningless 0xb1 0x60 header bytes on orig receiver */
665 if (ir->flags.microsoft_gen1)
666 start_index = 2;
667
668 for (i = start_index; i < buf_len;) {
669 if (ir->rem == 0) {
670 /* decode mce packets of the form (84),AA,BB,CC,DD */
671 /* IR data packets can span USB messages - rem */
672 hdr = ir->buf_in[i];
673 ir->rem = (hdr & MCE_PACKET_LENGTH_MASK);
674 ir->cmd = (hdr & ~MCE_PACKET_LENGTH_MASK);
675 dev_dbg(ir->dev, "New data. rem: 0x%02x, cmd: 0x%02x\n",
676 ir->rem, ir->cmd);
677 i++;
678 }
679
680 /* don't process MCE commands */
681 if (hdr == MCE_CONTROL_HEADER || hdr == 0xff) {
682 ir->rem = 0;
683 return;
684 }
685
686 for (; (ir->rem > 0) && (i < buf_len); i++) {
687 ir->rem--;
688
689 rawir.pulse = ((ir->buf_in[i] & MCE_PULSE_BIT) != 0);
690 rawir.duration = (ir->buf_in[i] & MCE_PULSE_MASK)
691 * MCE_TIME_UNIT * 1000;
692
693 if ((ir->buf_in[i] & MCE_PULSE_MASK) == 0x7f) {
694 if (ir->rawir.pulse == rawir.pulse)
695 ir->rawir.duration += rawir.duration;
696 else {
697 ir->rawir.duration = rawir.duration;
698 ir->rawir.pulse = rawir.pulse;
699 }
700 continue;
701 }
702 rawir.duration += ir->rawir.duration;
703 ir->rawir.duration = 0;
704 ir->rawir.pulse = rawir.pulse;
705
706 dev_dbg(ir->dev, "Storing %s with duration %d\n",
707 rawir.pulse ? "pulse" : "space",
708 rawir.duration);
709
710 ir_raw_event_store(ir->idev, &rawir);
711 }
712
713 if (ir->buf_in[i] == 0x80 || ir->buf_in[i] == 0x9f)
714 ir->rem = 0;
715
716 dev_dbg(ir->dev, "calling ir_raw_event_handle\n");
717 ir_raw_event_handle(ir->idev);
718 }
719}
720
721static void mceusb_dev_recv(struct urb *urb, struct pt_regs *regs)
722{
723 struct mceusb_dev *ir;
724 int buf_len;
725
726 if (!urb)
727 return;
728
729 ir = urb->context;
730 if (!ir) {
731 usb_unlink_urb(urb);
732 return;
733 }
734
735 buf_len = urb->actual_length;
736
737 if (debug)
738 mceusb_dev_printdata(ir, urb->transfer_buffer, buf_len, false);
739
740 if (ir->send_flags == RECV_FLAG_IN_PROGRESS) {
741 ir->send_flags = SEND_FLAG_COMPLETE;
742 dev_dbg(&ir->irdev->dev, "setup answer received %d bytes\n",
743 buf_len);
744 }
745
746 switch (urb->status) {
747 /* success */
748 case 0:
749 mceusb_process_ir_data(ir, buf_len);
750 break;
751
752 case -ECONNRESET:
753 case -ENOENT:
754 case -ESHUTDOWN:
755 usb_unlink_urb(urb);
756 return;
757
758 case -EPIPE:
759 default:
760 break;
761 }
762
763 usb_submit_urb(urb, GFP_ATOMIC);
764}
765
766static void mceusb_gen1_init(struct mceusb_dev *ir)
767{
768 int ret;
769 int maxp = ir->len_in;
770 struct device *dev = ir->dev;
771 char *data;
772
773 data = kzalloc(USB_CTRL_MSG_SZ, GFP_KERNEL);
774 if (!data) {
775 dev_err(dev, "%s: memory allocation failed!\n", __func__);
776 return;
777 }
778
779 /*
780 * This is a strange one. Windows issues a set address to the device
781 * on the receive control pipe and expect a certain value pair back
782 */
783 ret = usb_control_msg(ir->usbdev, usb_rcvctrlpipe(ir->usbdev, 0),
784 USB_REQ_SET_ADDRESS, USB_TYPE_VENDOR, 0, 0,
785 data, USB_CTRL_MSG_SZ, HZ * 3);
786 dev_dbg(dev, "%s - ret = %d\n", __func__, ret);
787 dev_dbg(dev, "%s - data[0] = %d, data[1] = %d\n",
788 __func__, data[0], data[1]);
789
790 /* set feature: bit rate 38400 bps */
791 ret = usb_control_msg(ir->usbdev, usb_sndctrlpipe(ir->usbdev, 0),
792 USB_REQ_SET_FEATURE, USB_TYPE_VENDOR,
793 0xc04e, 0x0000, NULL, 0, HZ * 3);
794
795 dev_dbg(dev, "%s - ret = %d\n", __func__, ret);
796
797 /* bRequest 4: set char length to 8 bits */
798 ret = usb_control_msg(ir->usbdev, usb_sndctrlpipe(ir->usbdev, 0),
799 4, USB_TYPE_VENDOR,
800 0x0808, 0x0000, NULL, 0, HZ * 3);
801 dev_dbg(dev, "%s - retB = %d\n", __func__, ret);
802
803 /* bRequest 2: set handshaking to use DTR/DSR */
804 ret = usb_control_msg(ir->usbdev, usb_sndctrlpipe(ir->usbdev, 0),
805 2, USB_TYPE_VENDOR,
806 0x0000, 0x0100, NULL, 0, HZ * 3);
807 dev_dbg(dev, "%s - retC = %d\n", __func__, ret);
808
809 /* device reset */
810 mce_async_out(ir, DEVICE_RESET, sizeof(DEVICE_RESET));
811 mce_sync_in(ir, NULL, maxp);
812
813 /* get hw/sw revision? */
814 mce_async_out(ir, GET_REVISION, sizeof(GET_REVISION));
815 mce_sync_in(ir, NULL, maxp);
816
817 kfree(data);
818};
819
820static void mceusb_gen2_init(struct mceusb_dev *ir)
821{
822 int maxp = ir->len_in;
823
824 /* device reset */
825 mce_async_out(ir, DEVICE_RESET, sizeof(DEVICE_RESET));
826 mce_sync_in(ir, NULL, maxp);
827
828 /* get hw/sw revision? */
829 mce_async_out(ir, GET_REVISION, sizeof(GET_REVISION));
830 mce_sync_in(ir, NULL, maxp);
831
832 /* unknown what the next two actually return... */
833 mce_async_out(ir, GET_UNKNOWN, sizeof(GET_UNKNOWN));
834 mce_sync_in(ir, NULL, maxp);
835 mce_async_out(ir, GET_UNKNOWN2, sizeof(GET_UNKNOWN2));
836 mce_sync_in(ir, NULL, maxp);
837}
838
839static void mceusb_get_parameters(struct mceusb_dev *ir)
840{
841 int maxp = ir->len_in;
842
843 /* get the carrier and frequency */
844 mce_async_out(ir, GET_CARRIER_FREQ, sizeof(GET_CARRIER_FREQ));
845 mce_sync_in(ir, NULL, maxp);
846
847 /* get the transmitter bitmask */
848 mce_async_out(ir, GET_TX_BITMASK, sizeof(GET_TX_BITMASK));
849 mce_sync_in(ir, NULL, maxp);
850
851 /* get receiver timeout value */
852 mce_async_out(ir, GET_RX_TIMEOUT, sizeof(GET_RX_TIMEOUT));
853 mce_sync_in(ir, NULL, maxp);
854
855 /* get receiver sensor setting */
856 mce_async_out(ir, GET_RX_SENSOR, sizeof(GET_RX_SENSOR));
857 mce_sync_in(ir, NULL, maxp);
858}
859
860static struct input_dev *mceusb_init_input_dev(struct mceusb_dev *ir)
861{
862 struct input_dev *idev;
863 struct ir_dev_props *props;
864 struct ir_input_dev *irdev;
865 struct device *dev = ir->dev;
866 int ret = -ENODEV;
867
868 idev = input_allocate_device();
869 if (!idev) {
870 dev_err(dev, "remote input dev allocation failed\n");
871 goto idev_alloc_failed;
872 }
873
874 ret = -ENOMEM;
875 props = kzalloc(sizeof(struct ir_dev_props), GFP_KERNEL);
876 if (!props) {
877 dev_err(dev, "remote ir dev props allocation failed\n");
878 goto props_alloc_failed;
879 }
880
881 irdev = kzalloc(sizeof(struct ir_input_dev), GFP_KERNEL);
882 if (!irdev) {
883 dev_err(dev, "remote ir input dev allocation failed\n");
884 goto ir_dev_alloc_failed;
885 }
886
887 snprintf(ir->name, sizeof(ir->name), "Media Center Ed. eHome "
888 "Infrared Remote Transceiver (%04x:%04x)",
889 le16_to_cpu(ir->usbdev->descriptor.idVendor),
890 le16_to_cpu(ir->usbdev->descriptor.idProduct));
891
892 idev->name = ir->name;
893 usb_make_path(ir->usbdev, ir->phys, sizeof(ir->phys));
894 strlcat(ir->phys, "/input0", sizeof(ir->phys));
895 idev->phys = ir->phys;
896
897 props->priv = ir;
898 props->driver_type = RC_DRIVER_IR_RAW;
899 props->allowed_protos = IR_TYPE_ALL;
900 props->s_tx_mask = mceusb_set_tx_mask;
901 props->s_tx_carrier = mceusb_set_tx_carrier;
902 props->tx_ir = mceusb_tx_ir;
903
904 ir->props = props;
905 ir->irdev = irdev;
906
907 input_set_drvdata(idev, irdev);
908
909 ret = ir_input_register(idev, RC_MAP_RC6_MCE, props, DRIVER_NAME);
910 if (ret < 0) {
911 dev_err(dev, "remote input device register failed\n");
912 goto irdev_failed;
913 }
914
915 return idev;
916
917irdev_failed:
918 kfree(irdev);
919ir_dev_alloc_failed:
920 kfree(props);
921props_alloc_failed:
922 input_free_device(idev);
923idev_alloc_failed:
924 return NULL;
925}
926
927static int __devinit mceusb_dev_probe(struct usb_interface *intf,
928 const struct usb_device_id *id)
929{
930 struct usb_device *dev = interface_to_usbdev(intf);
931 struct usb_host_interface *idesc;
932 struct usb_endpoint_descriptor *ep = NULL;
933 struct usb_endpoint_descriptor *ep_in = NULL;
934 struct usb_endpoint_descriptor *ep_out = NULL;
935 struct usb_host_config *config;
936 struct mceusb_dev *ir = NULL;
937 int pipe, maxp, i;
938 char buf[63], name[128] = "";
939 bool is_gen3;
940 bool is_microsoft_gen1;
941 bool tx_mask_inverted;
942
943 dev_dbg(&intf->dev, ": %s called\n", __func__);
944
945 config = dev->actconfig;
946 idesc = intf->cur_altsetting;
947
948 is_gen3 = usb_match_id(intf, gen3_list) ? 1 : 0;
949 is_microsoft_gen1 = usb_match_id(intf, microsoft_gen1_list) ? 1 : 0;
950 tx_mask_inverted = usb_match_id(intf, std_tx_mask_list) ? 0 : 1;
951
952 /* step through the endpoints to find first bulk in and out endpoint */
953 for (i = 0; i < idesc->desc.bNumEndpoints; ++i) {
954 ep = &idesc->endpoint[i].desc;
955
956 if ((ep_in == NULL)
957 && ((ep->bEndpointAddress & USB_ENDPOINT_DIR_MASK)
958 == USB_DIR_IN)
959 && (((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
960 == USB_ENDPOINT_XFER_BULK)
961 || ((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
962 == USB_ENDPOINT_XFER_INT))) {
963
964 ep_in = ep;
965 ep_in->bmAttributes = USB_ENDPOINT_XFER_INT;
966 ep_in->bInterval = 1;
967 dev_dbg(&intf->dev, ": acceptable inbound endpoint "
968 "found\n");
969 }
970
971 if ((ep_out == NULL)
972 && ((ep->bEndpointAddress & USB_ENDPOINT_DIR_MASK)
973 == USB_DIR_OUT)
974 && (((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
975 == USB_ENDPOINT_XFER_BULK)
976 || ((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
977 == USB_ENDPOINT_XFER_INT))) {
978
979 ep_out = ep;
980 ep_out->bmAttributes = USB_ENDPOINT_XFER_INT;
981 ep_out->bInterval = 1;
982 dev_dbg(&intf->dev, ": acceptable outbound endpoint "
983 "found\n");
984 }
985 }
986 if (ep_in == NULL) {
987 dev_dbg(&intf->dev, ": inbound and/or endpoint not found\n");
988 return -ENODEV;
989 }
990
991 pipe = usb_rcvintpipe(dev, ep_in->bEndpointAddress);
992 maxp = usb_maxpacket(dev, pipe, usb_pipeout(pipe));
993
994 ir = kzalloc(sizeof(struct mceusb_dev), GFP_KERNEL);
995 if (!ir)
996 goto mem_alloc_fail;
997
998 ir->buf_in = usb_alloc_coherent(dev, maxp, GFP_ATOMIC, &ir->dma_in);
999 if (!ir->buf_in)
1000 goto buf_in_alloc_fail;
1001
1002 ir->urb_in = usb_alloc_urb(0, GFP_KERNEL);
1003 if (!ir->urb_in)
1004 goto urb_in_alloc_fail;
1005
1006 ir->usbdev = dev;
1007 ir->dev = &intf->dev;
1008 ir->len_in = maxp;
1009 ir->flags.microsoft_gen1 = is_microsoft_gen1;
1010 ir->flags.tx_mask_inverted = tx_mask_inverted;
1011
1012 /* Saving usb interface data for use by the transmitter routine */
1013 ir->usb_ep_in = ep_in;
1014 ir->usb_ep_out = ep_out;
1015
1016 if (dev->descriptor.iManufacturer
1017 && usb_string(dev, dev->descriptor.iManufacturer,
1018 buf, sizeof(buf)) > 0)
1019 strlcpy(name, buf, sizeof(name));
1020 if (dev->descriptor.iProduct
1021 && usb_string(dev, dev->descriptor.iProduct,
1022 buf, sizeof(buf)) > 0)
1023 snprintf(name + strlen(name), sizeof(name) - strlen(name),
1024 " %s", buf);
1025
1026 ir->idev = mceusb_init_input_dev(ir);
1027 if (!ir->idev)
1028 goto input_dev_fail;
1029
1030 /* flush buffers on the device */
1031 mce_sync_in(ir, NULL, maxp);
1032 mce_sync_in(ir, NULL, maxp);
1033
1034 /* wire up inbound data handler */
1035 usb_fill_int_urb(ir->urb_in, dev, pipe, ir->buf_in,
1036 maxp, (usb_complete_t) mceusb_dev_recv, ir, ep_in->bInterval);
1037 ir->urb_in->transfer_dma = ir->dma_in;
1038 ir->urb_in->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
1039
1040 /* initialize device */
1041 if (ir->flags.microsoft_gen1)
1042 mceusb_gen1_init(ir);
1043 else if (!is_gen3)
1044 mceusb_gen2_init(ir);
1045
1046 mceusb_get_parameters(ir);
1047
1048 mceusb_set_tx_mask(ir, MCE_DEFAULT_TX_MASK);
1049
1050 usb_set_intfdata(intf, ir);
1051
1052 dev_info(&intf->dev, "Registered %s on usb%d:%d\n", name,
1053 dev->bus->busnum, dev->devnum);
1054
1055 return 0;
1056
1057 /* Error-handling path */
1058input_dev_fail:
1059 usb_free_urb(ir->urb_in);
1060urb_in_alloc_fail:
1061 usb_free_coherent(dev, maxp, ir->buf_in, ir->dma_in);
1062buf_in_alloc_fail:
1063 kfree(ir);
1064mem_alloc_fail:
1065 dev_err(&intf->dev, "%s: device setup failed!\n", __func__);
1066
1067 return -ENOMEM;
1068}
1069
1070
1071static void __devexit mceusb_dev_disconnect(struct usb_interface *intf)
1072{
1073 struct usb_device *dev = interface_to_usbdev(intf);
1074 struct mceusb_dev *ir = usb_get_intfdata(intf);
1075
1076 usb_set_intfdata(intf, NULL);
1077
1078 if (!ir)
1079 return;
1080
1081 ir->usbdev = NULL;
1082 ir_input_unregister(ir->idev);
1083 usb_kill_urb(ir->urb_in);
1084 usb_free_urb(ir->urb_in);
1085 usb_free_coherent(dev, ir->len_in, ir->buf_in, ir->dma_in);
1086
1087 kfree(ir);
1088}
1089
1090static int mceusb_dev_suspend(struct usb_interface *intf, pm_message_t message)
1091{
1092 struct mceusb_dev *ir = usb_get_intfdata(intf);
1093 dev_info(ir->dev, "suspend\n");
1094 usb_kill_urb(ir->urb_in);
1095 return 0;
1096}
1097
1098static int mceusb_dev_resume(struct usb_interface *intf)
1099{
1100 struct mceusb_dev *ir = usb_get_intfdata(intf);
1101 dev_info(ir->dev, "resume\n");
1102 if (usb_submit_urb(ir->urb_in, GFP_ATOMIC))
1103 return -EIO;
1104 return 0;
1105}
1106
1107static struct usb_driver mceusb_dev_driver = {
1108 .name = DRIVER_NAME,
1109 .probe = mceusb_dev_probe,
1110 .disconnect = mceusb_dev_disconnect,
1111 .suspend = mceusb_dev_suspend,
1112 .resume = mceusb_dev_resume,
1113 .reset_resume = mceusb_dev_resume,
1114 .id_table = mceusb_dev_table
1115};
1116
1117static int __init mceusb_dev_init(void)
1118{
1119 int ret;
1120
1121 ret = usb_register(&mceusb_dev_driver);
1122 if (ret < 0)
1123 printk(KERN_ERR DRIVER_NAME
1124 ": usb register failed, result = %d\n", ret);
1125
1126 return ret;
1127}
1128
1129static void __exit mceusb_dev_exit(void)
1130{
1131 usb_deregister(&mceusb_dev_driver);
1132}
1133
1134module_init(mceusb_dev_init);
1135module_exit(mceusb_dev_exit);
1136
1137MODULE_DESCRIPTION(DRIVER_DESC);
1138MODULE_AUTHOR(DRIVER_AUTHOR);
1139MODULE_LICENSE("GPL");
1140MODULE_DEVICE_TABLE(usb, mceusb_dev_table);
1141
1142module_param(debug, bool, S_IRUGO | S_IWUSR);
1143MODULE_PARM_DESC(debug, "Debug enabled or not");
diff --git a/drivers/media/common/saa7146_fops.c b/drivers/media/common/saa7146_fops.c
index 7364b9642d00..4da2a54cb8bd 100644
--- a/drivers/media/common/saa7146_fops.c
+++ b/drivers/media/common/saa7146_fops.c
@@ -57,7 +57,7 @@ void saa7146_dma_free(struct saa7146_dev *dev,struct videobuf_queue *q,
57 BUG_ON(in_interrupt()); 57 BUG_ON(in_interrupt());
58 58
59 videobuf_waiton(&buf->vb,0,0); 59 videobuf_waiton(&buf->vb,0,0);
60 videobuf_dma_unmap(q, dma); 60 videobuf_dma_unmap(q->dev, dma);
61 videobuf_dma_free(dma); 61 videobuf_dma_free(dma);
62 buf->vb.state = VIDEOBUF_NEEDS_INIT; 62 buf->vb.state = VIDEOBUF_NEEDS_INIT;
63} 63}
diff --git a/drivers/media/common/saa7146_vbi.c b/drivers/media/common/saa7146_vbi.c
index 74e2b56ecb5b..8224c301d050 100644
--- a/drivers/media/common/saa7146_vbi.c
+++ b/drivers/media/common/saa7146_vbi.c
@@ -375,7 +375,7 @@ static void vbi_init(struct saa7146_dev *dev, struct saa7146_vv *vv)
375 375
376static int vbi_open(struct saa7146_dev *dev, struct file *file) 376static int vbi_open(struct saa7146_dev *dev, struct file *file)
377{ 377{
378 struct saa7146_fh *fh = (struct saa7146_fh *)file->private_data; 378 struct saa7146_fh *fh = file->private_data;
379 379
380 u32 arbtr_ctrl = saa7146_read(dev, PCI_BT_V1); 380 u32 arbtr_ctrl = saa7146_read(dev, PCI_BT_V1);
381 int ret = 0; 381 int ret = 0;
@@ -437,7 +437,7 @@ static int vbi_open(struct saa7146_dev *dev, struct file *file)
437 437
438static void vbi_close(struct saa7146_dev *dev, struct file *file) 438static void vbi_close(struct saa7146_dev *dev, struct file *file)
439{ 439{
440 struct saa7146_fh *fh = (struct saa7146_fh *)file->private_data; 440 struct saa7146_fh *fh = file->private_data;
441 struct saa7146_vv *vv = dev->vv_data; 441 struct saa7146_vv *vv = dev->vv_data;
442 DEB_VBI(("dev:%p, fh:%p\n",dev,fh)); 442 DEB_VBI(("dev:%p, fh:%p\n",dev,fh));
443 443
diff --git a/drivers/media/common/saa7146_video.c b/drivers/media/common/saa7146_video.c
index b8b2c551a1e2..a212a91a30f0 100644
--- a/drivers/media/common/saa7146_video.c
+++ b/drivers/media/common/saa7146_video.c
@@ -1370,7 +1370,7 @@ static void video_init(struct saa7146_dev *dev, struct saa7146_vv *vv)
1370 1370
1371static int video_open(struct saa7146_dev *dev, struct file *file) 1371static int video_open(struct saa7146_dev *dev, struct file *file)
1372{ 1372{
1373 struct saa7146_fh *fh = (struct saa7146_fh *)file->private_data; 1373 struct saa7146_fh *fh = file->private_data;
1374 struct saa7146_format *sfmt; 1374 struct saa7146_format *sfmt;
1375 1375
1376 fh->video_fmt.width = 384; 1376 fh->video_fmt.width = 384;
@@ -1394,7 +1394,7 @@ static int video_open(struct saa7146_dev *dev, struct file *file)
1394 1394
1395static void video_close(struct saa7146_dev *dev, struct file *file) 1395static void video_close(struct saa7146_dev *dev, struct file *file)
1396{ 1396{
1397 struct saa7146_fh *fh = (struct saa7146_fh *)file->private_data; 1397 struct saa7146_fh *fh = file->private_data;
1398 struct saa7146_vv *vv = dev->vv_data; 1398 struct saa7146_vv *vv = dev->vv_data;
1399 struct videobuf_queue *q = &fh->video_q; 1399 struct videobuf_queue *q = &fh->video_q;
1400 int err; 1400 int err;
diff --git a/drivers/media/common/tuners/tda18271-fe.c b/drivers/media/common/tuners/tda18271-fe.c
index b2e15456d5f3..7955e49a3440 100644
--- a/drivers/media/common/tuners/tda18271-fe.c
+++ b/drivers/media/common/tuners/tda18271-fe.c
@@ -1249,7 +1249,7 @@ struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
1249 struct tda18271_config *cfg) 1249 struct tda18271_config *cfg)
1250{ 1250{
1251 struct tda18271_priv *priv = NULL; 1251 struct tda18271_priv *priv = NULL;
1252 int instance; 1252 int instance, ret;
1253 1253
1254 mutex_lock(&tda18271_list_mutex); 1254 mutex_lock(&tda18271_list_mutex);
1255 1255
@@ -1268,10 +1268,12 @@ struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
1268 priv->cal_initialized = false; 1268 priv->cal_initialized = false;
1269 mutex_init(&priv->lock); 1269 mutex_init(&priv->lock);
1270 1270
1271 if (tda_fail(tda18271_get_id(fe))) 1271 ret = tda18271_get_id(fe);
1272 if (tda_fail(ret))
1272 goto fail; 1273 goto fail;
1273 1274
1274 if (tda_fail(tda18271_assign_map_layout(fe))) 1275 ret = tda18271_assign_map_layout(fe);
1276 if (tda_fail(ret))
1275 goto fail; 1277 goto fail;
1276 1278
1277 mutex_lock(&priv->lock); 1279 mutex_lock(&priv->lock);
diff --git a/drivers/media/common/tuners/tuner-simple.c b/drivers/media/common/tuners/tuner-simple.c
index 8abbcc5fcf95..f8ee29e6059c 100644
--- a/drivers/media/common/tuners/tuner-simple.c
+++ b/drivers/media/common/tuners/tuner-simple.c
@@ -524,6 +524,7 @@ static int simple_radio_bandswitch(struct dvb_frontend *fe, u8 *buffer)
524 buffer[3] = 0x39; 524 buffer[3] = 0x39;
525 break; 525 break;
526 case TUNER_PHILIPS_FQ1216LME_MK3: 526 case TUNER_PHILIPS_FQ1216LME_MK3:
527 case TUNER_PHILIPS_FQ1236_MK5:
527 tuner_err("This tuner doesn't have FM\n"); 528 tuner_err("This tuner doesn't have FM\n");
528 /* Set the low band for sanity, since it covers 88-108 MHz */ 529 /* Set the low band for sanity, since it covers 88-108 MHz */
529 buffer[3] = 0x01; 530 buffer[3] = 0x01;
@@ -545,14 +546,11 @@ static int simple_set_tv_freq(struct dvb_frontend *fe,
545 struct tuner_simple_priv *priv = fe->tuner_priv; 546 struct tuner_simple_priv *priv = fe->tuner_priv;
546 u8 config, cb; 547 u8 config, cb;
547 u16 div; 548 u16 div;
548 struct tunertype *tun;
549 u8 buffer[4]; 549 u8 buffer[4];
550 int rc, IFPCoff, i; 550 int rc, IFPCoff, i;
551 enum param_type desired_type; 551 enum param_type desired_type;
552 struct tuner_params *t_params; 552 struct tuner_params *t_params;
553 553
554 tun = priv->tun;
555
556 /* IFPCoff = Video Intermediate Frequency - Vif: 554 /* IFPCoff = Video Intermediate Frequency - Vif:
557 940 =16*58.75 NTSC/J (Japan) 555 940 =16*58.75 NTSC/J (Japan)
558 732 =16*45.75 M/N STD 556 732 =16*45.75 M/N STD
diff --git a/drivers/media/common/tuners/tuner-types.c b/drivers/media/common/tuners/tuner-types.c
index d9aaaca620c9..58a513bcd747 100644
--- a/drivers/media/common/tuners/tuner-types.c
+++ b/drivers/media/common/tuners/tuner-types.c
@@ -1353,6 +1353,17 @@ static struct tuner_params tuner_sony_btf_pxn01z_params[] = {
1353 }, 1353 },
1354}; 1354};
1355 1355
1356/* ------------ TUNER_PHILIPS_FQ1236_MK5 - Philips NTSC ------------ */
1357
1358static struct tuner_params tuner_philips_fq1236_mk5_params[] = {
1359 {
1360 .type = TUNER_PARAM_TYPE_NTSC,
1361 .ranges = tuner_fm1236_mk3_ntsc_ranges,
1362 .count = ARRAY_SIZE(tuner_fm1236_mk3_ntsc_ranges),
1363 .has_tda9887 = 1, /* TDA9885, no FM radio */
1364 },
1365};
1366
1356/* --------------------------------------------------------------------- */ 1367/* --------------------------------------------------------------------- */
1357 1368
1358struct tunertype tuners[] = { 1369struct tunertype tuners[] = {
@@ -1826,6 +1837,11 @@ struct tunertype tuners[] = {
1826 .params = tuner_sony_btf_pxn01z_params, 1837 .params = tuner_sony_btf_pxn01z_params,
1827 .count = ARRAY_SIZE(tuner_sony_btf_pxn01z_params), 1838 .count = ARRAY_SIZE(tuner_sony_btf_pxn01z_params),
1828 }, 1839 },
1840 [TUNER_PHILIPS_FQ1236_MK5] = { /* NTSC, TDA9885, no FM radio */
1841 .name = "Philips FQ1236 MK5",
1842 .params = tuner_philips_fq1236_mk5_params,
1843 .count = ARRAY_SIZE(tuner_philips_fq1236_mk5_params),
1844 },
1829}; 1845};
1830EXPORT_SYMBOL(tuners); 1846EXPORT_SYMBOL(tuners);
1831 1847
diff --git a/drivers/media/common/tuners/xc5000.c b/drivers/media/common/tuners/xc5000.c
index 432003dded7c..d2b2c12a5561 100644
--- a/drivers/media/common/tuners/xc5000.c
+++ b/drivers/media/common/tuners/xc5000.c
@@ -217,6 +217,7 @@ static int xc_send_i2c_data(struct xc5000_priv *priv, u8 *buf, int len)
217 return XC_RESULT_SUCCESS; 217 return XC_RESULT_SUCCESS;
218} 218}
219 219
220#if 0
220/* This routine is never used because the only time we read data from the 221/* This routine is never used because the only time we read data from the
221 i2c bus is when we read registers, and we want that to be an atomic i2c 222 i2c bus is when we read registers, and we want that to be an atomic i2c
222 transaction in case we are on a multi-master bus */ 223 transaction in case we are on a multi-master bus */
@@ -231,6 +232,27 @@ static int xc_read_i2c_data(struct xc5000_priv *priv, u8 *buf, int len)
231 } 232 }
232 return 0; 233 return 0;
233} 234}
235#endif
236
237static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val)
238{
239 u8 buf[2] = { reg >> 8, reg & 0xff };
240 u8 bval[2] = { 0, 0 };
241 struct i2c_msg msg[2] = {
242 { .addr = priv->i2c_props.addr,
243 .flags = 0, .buf = &buf[0], .len = 2 },
244 { .addr = priv->i2c_props.addr,
245 .flags = I2C_M_RD, .buf = &bval[0], .len = 2 },
246 };
247
248 if (i2c_transfer(priv->i2c_props.adap, msg, 2) != 2) {
249 printk(KERN_WARNING "xc5000: I2C read failed\n");
250 return -EREMOTEIO;
251 }
252
253 *val = (bval[0] << 8) | bval[1];
254 return XC_RESULT_SUCCESS;
255}
234 256
235static void xc_wait(int wait_ms) 257static void xc_wait(int wait_ms)
236{ 258{
@@ -275,20 +297,14 @@ static int xc_write_reg(struct xc5000_priv *priv, u16 regAddr, u16 i2cData)
275 if (result == XC_RESULT_SUCCESS) { 297 if (result == XC_RESULT_SUCCESS) {
276 /* wait for busy flag to clear */ 298 /* wait for busy flag to clear */
277 while ((WatchDogTimer > 0) && (result == XC_RESULT_SUCCESS)) { 299 while ((WatchDogTimer > 0) && (result == XC_RESULT_SUCCESS)) {
278 buf[0] = 0; 300 result = xc5000_readreg(priv, XREG_BUSY, (u16 *)buf);
279 buf[1] = XREG_BUSY;
280
281 result = xc_send_i2c_data(priv, buf, 2);
282 if (result == XC_RESULT_SUCCESS) { 301 if (result == XC_RESULT_SUCCESS) {
283 result = xc_read_i2c_data(priv, buf, 2); 302 if ((buf[0] == 0) && (buf[1] == 0)) {
284 if (result == XC_RESULT_SUCCESS) { 303 /* busy flag cleared */
285 if ((buf[0] == 0) && (buf[1] == 0)) {
286 /* busy flag cleared */
287 break; 304 break;
288 } else { 305 } else {
289 xc_wait(5); /* wait 5 ms */ 306 xc_wait(5); /* wait 5 ms */
290 WatchDogTimer--; 307 WatchDogTimer--;
291 }
292 } 308 }
293 } 309 }
294 } 310 }
@@ -526,25 +542,6 @@ static int xc_tune_channel(struct xc5000_priv *priv, u32 freq_hz, int mode)
526 return found; 542 return found;
527} 543}
528 544
529static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val)
530{
531 u8 buf[2] = { reg >> 8, reg & 0xff };
532 u8 bval[2] = { 0, 0 };
533 struct i2c_msg msg[2] = {
534 { .addr = priv->i2c_props.addr,
535 .flags = 0, .buf = &buf[0], .len = 2 },
536 { .addr = priv->i2c_props.addr,
537 .flags = I2C_M_RD, .buf = &bval[0], .len = 2 },
538 };
539
540 if (i2c_transfer(priv->i2c_props.adap, msg, 2) != 2) {
541 printk(KERN_WARNING "xc5000: I2C read failed\n");
542 return -EREMOTEIO;
543 }
544
545 *val = (bval[0] << 8) | bval[1];
546 return XC_RESULT_SUCCESS;
547}
548 545
549static int xc5000_fwupload(struct dvb_frontend *fe) 546static int xc5000_fwupload(struct dvb_frontend *fe)
550{ 547{
diff --git a/drivers/media/dvb/bt8xx/dst_ca.c b/drivers/media/dvb/bt8xx/dst_ca.c
index 770243c720d2..cf8705162845 100644
--- a/drivers/media/dvb/bt8xx/dst_ca.c
+++ b/drivers/media/dvb/bt8xx/dst_ca.c
@@ -565,7 +565,7 @@ static long dst_ca_ioctl(struct file *file, unsigned int cmd, unsigned long ioct
565 int result = 0; 565 int result = 0;
566 566
567 lock_kernel(); 567 lock_kernel();
568 dvbdev = (struct dvb_device *)file->private_data; 568 dvbdev = file->private_data;
569 state = (struct dst_state *)dvbdev->priv; 569 state = (struct dst_state *)dvbdev->priv;
570 p_ca_message = kmalloc(sizeof (struct ca_msg), GFP_KERNEL); 570 p_ca_message = kmalloc(sizeof (struct ca_msg), GFP_KERNEL);
571 p_ca_slot_info = kmalloc(sizeof (struct ca_slot_info), GFP_KERNEL); 571 p_ca_slot_info = kmalloc(sizeof (struct ca_slot_info), GFP_KERNEL);
diff --git a/drivers/media/dvb/dvb-core/dmxdev.c b/drivers/media/dvb/dvb-core/dmxdev.c
index 425862ffb285..0042306ea11b 100644
--- a/drivers/media/dvb/dvb-core/dmxdev.c
+++ b/drivers/media/dvb/dvb-core/dmxdev.c
@@ -207,7 +207,7 @@ static int dvb_dvr_release(struct inode *inode, struct file *file)
207 } 207 }
208 /* TODO */ 208 /* TODO */
209 dvbdev->users--; 209 dvbdev->users--;
210 if(dvbdev->users==-1 && dmxdev->exit==1) { 210 if (dvbdev->users == 1 && dmxdev->exit == 1) {
211 fops_put(file->f_op); 211 fops_put(file->f_op);
212 file->f_op = NULL; 212 file->f_op = NULL;
213 mutex_unlock(&dmxdev->mutex); 213 mutex_unlock(&dmxdev->mutex);
diff --git a/drivers/media/dvb/dvb-core/dvb_ca_en50221.c b/drivers/media/dvb/dvb-core/dvb_ca_en50221.c
index ef259a0718ac..cb97e6b85432 100644
--- a/drivers/media/dvb/dvb-core/dvb_ca_en50221.c
+++ b/drivers/media/dvb/dvb-core/dvb_ca_en50221.c
@@ -1318,8 +1318,11 @@ static ssize_t dvb_ca_en50221_io_write(struct file *file,
1318 1318
1319 fragbuf[0] = connection_id; 1319 fragbuf[0] = connection_id;
1320 fragbuf[1] = ((fragpos + fraglen) < count) ? 0x80 : 0x00; 1320 fragbuf[1] = ((fragpos + fraglen) < count) ? 0x80 : 0x00;
1321 if ((status = copy_from_user(fragbuf + 2, buf + fragpos, fraglen)) != 0) 1321 status = copy_from_user(fragbuf + 2, buf + fragpos, fraglen);
1322 if (status) {
1323 status = -EFAULT;
1322 goto exit; 1324 goto exit;
1325 }
1323 1326
1324 timeout = jiffies + HZ / 2; 1327 timeout = jiffies + HZ / 2;
1325 written = 0; 1328 written = 0;
@@ -1494,8 +1497,11 @@ static ssize_t dvb_ca_en50221_io_read(struct file *file, char __user * buf,
1494 1497
1495 hdr[0] = slot; 1498 hdr[0] = slot;
1496 hdr[1] = connection_id; 1499 hdr[1] = connection_id;
1497 if ((status = copy_to_user(buf, hdr, 2)) != 0) 1500 status = copy_to_user(buf, hdr, 2);
1501 if (status) {
1502 status = -EFAULT;
1498 goto exit; 1503 goto exit;
1504 }
1499 status = pktlen; 1505 status = pktlen;
1500 1506
1501exit: 1507exit:
diff --git a/drivers/media/dvb/dvb-core/dvb_demux.c b/drivers/media/dvb/dvb-core/dvb_demux.c
index 977ddba3e235..4a88a3e4db2b 100644
--- a/drivers/media/dvb/dvb-core/dvb_demux.c
+++ b/drivers/media/dvb/dvb-core/dvb_demux.c
@@ -1130,13 +1130,9 @@ static int dvbdmx_write(struct dmx_demux *demux, const char __user *buf, size_t
1130 if ((!demux->frontend) || (demux->frontend->source != DMX_MEMORY_FE)) 1130 if ((!demux->frontend) || (demux->frontend->source != DMX_MEMORY_FE))
1131 return -EINVAL; 1131 return -EINVAL;
1132 1132
1133 p = kmalloc(count, GFP_USER); 1133 p = memdup_user(buf, count);
1134 if (!p) 1134 if (IS_ERR(p))
1135 return -ENOMEM; 1135 return PTR_ERR(p);
1136 if (copy_from_user(p, buf, count)) {
1137 kfree(p);
1138 return -EFAULT;
1139 }
1140 if (mutex_lock_interruptible(&dvbdemux->mutex)) { 1136 if (mutex_lock_interruptible(&dvbdemux->mutex)) {
1141 kfree(p); 1137 kfree(p);
1142 return -ERESTARTSYS; 1138 return -ERESTARTSYS;
diff --git a/drivers/media/dvb/dvb-core/dvb_frontend.c b/drivers/media/dvb/dvb-core/dvb_frontend.c
index 44ae89ecef94..4d45b7d6b3fb 100644
--- a/drivers/media/dvb/dvb-core/dvb_frontend.c
+++ b/drivers/media/dvb/dvb-core/dvb_frontend.c
@@ -465,7 +465,7 @@ static void dvb_frontend_swzigzag(struct dvb_frontend *fe)
465 if ((fepriv->state & FESTATE_SEARCHING_FAST) || (fepriv->state & FESTATE_RETUNE)) { 465 if ((fepriv->state & FESTATE_SEARCHING_FAST) || (fepriv->state & FESTATE_RETUNE)) {
466 fepriv->delay = fepriv->min_delay; 466 fepriv->delay = fepriv->min_delay;
467 467
468 /* peform a tune */ 468 /* perform a tune */
469 retval = dvb_frontend_swzigzag_autotune(fe, 469 retval = dvb_frontend_swzigzag_autotune(fe,
470 fepriv->check_wrapped); 470 fepriv->check_wrapped);
471 if (retval < 0) { 471 if (retval < 0) {
@@ -791,7 +791,7 @@ static int dvb_frontend_start(struct dvb_frontend *fe)
791 return 0; 791 return 0;
792} 792}
793 793
794static void dvb_frontend_get_frequeny_limits(struct dvb_frontend *fe, 794static void dvb_frontend_get_frequency_limits(struct dvb_frontend *fe,
795 u32 *freq_min, u32 *freq_max) 795 u32 *freq_min, u32 *freq_max)
796{ 796{
797 *freq_min = max(fe->ops.info.frequency_min, fe->ops.tuner_ops.info.frequency_min); 797 *freq_min = max(fe->ops.info.frequency_min, fe->ops.tuner_ops.info.frequency_min);
@@ -815,7 +815,7 @@ static int dvb_frontend_check_parameters(struct dvb_frontend *fe,
815 u32 freq_max; 815 u32 freq_max;
816 816
817 /* range check: frequency */ 817 /* range check: frequency */
818 dvb_frontend_get_frequeny_limits(fe, &freq_min, &freq_max); 818 dvb_frontend_get_frequency_limits(fe, &freq_min, &freq_max);
819 if ((freq_min && parms->frequency < freq_min) || 819 if ((freq_min && parms->frequency < freq_min) ||
820 (freq_max && parms->frequency > freq_max)) { 820 (freq_max && parms->frequency > freq_max)) {
821 printk(KERN_WARNING "DVB: adapter %i frontend %i frequency %u out of range (%u..%u)\n", 821 printk(KERN_WARNING "DVB: adapter %i frontend %i frequency %u out of range (%u..%u)\n",
@@ -1627,7 +1627,7 @@ static int dvb_frontend_ioctl_legacy(struct file *file,
1627 case FE_GET_INFO: { 1627 case FE_GET_INFO: {
1628 struct dvb_frontend_info* info = parg; 1628 struct dvb_frontend_info* info = parg;
1629 memcpy(info, &fe->ops.info, sizeof(struct dvb_frontend_info)); 1629 memcpy(info, &fe->ops.info, sizeof(struct dvb_frontend_info));
1630 dvb_frontend_get_frequeny_limits(fe, &info->frequency_min, &info->frequency_max); 1630 dvb_frontend_get_frequency_limits(fe, &info->frequency_min, &info->frequency_max);
1631 1631
1632 /* Force the CAN_INVERSION_AUTO bit on. If the frontend doesn't 1632 /* Force the CAN_INVERSION_AUTO bit on. If the frontend doesn't
1633 * do it, it is done for it. */ 1633 * do it, it is done for it. */
@@ -1726,7 +1726,7 @@ static int dvb_frontend_ioctl_legacy(struct file *file,
1726 * (stv0299 for instance) take longer than 8msec to 1726 * (stv0299 for instance) take longer than 8msec to
1727 * respond to a set_voltage command. Those switches 1727 * respond to a set_voltage command. Those switches
1728 * need custom routines to switch properly. For all 1728 * need custom routines to switch properly. For all
1729 * other frontends, the following shoule work ok. 1729 * other frontends, the following should work ok.
1730 * Dish network legacy switches (as used by Dish500) 1730 * Dish network legacy switches (as used by Dish500)
1731 * are controlled by sending 9-bit command words 1731 * are controlled by sending 9-bit command words
1732 * spaced 8msec apart. 1732 * spaced 8msec apart.
diff --git a/drivers/media/dvb/dvb-usb/a800.c b/drivers/media/dvb/dvb-usb/a800.c
index b6cbb1dfc5f1..a5c363727133 100644
--- a/drivers/media/dvb/dvb-usb/a800.c
+++ b/drivers/media/dvb/dvb-usb/a800.c
@@ -37,7 +37,7 @@ static int a800_identify_state(struct usb_device *udev, struct dvb_usb_device_pr
37 return 0; 37 return 0;
38} 38}
39 39
40static struct dvb_usb_rc_key ir_codes_a800_table[] = { 40static struct ir_scancode ir_codes_a800_table[] = {
41 { 0x0201, KEY_PROG1 }, /* SOURCE */ 41 { 0x0201, KEY_PROG1 }, /* SOURCE */
42 { 0x0200, KEY_POWER }, /* POWER */ 42 { 0x0200, KEY_POWER }, /* POWER */
43 { 0x0205, KEY_1 }, /* 1 */ 43 { 0x0205, KEY_1 }, /* 1 */
@@ -146,10 +146,12 @@ static struct dvb_usb_device_properties a800_properties = {
146 .power_ctrl = a800_power_ctrl, 146 .power_ctrl = a800_power_ctrl,
147 .identify_state = a800_identify_state, 147 .identify_state = a800_identify_state,
148 148
149 .rc_interval = DEFAULT_RC_INTERVAL, 149 .rc.legacy = {
150 .rc_key_map = ir_codes_a800_table, 150 .rc_interval = DEFAULT_RC_INTERVAL,
151 .rc_key_map_size = ARRAY_SIZE(ir_codes_a800_table), 151 .rc_key_map = ir_codes_a800_table,
152 .rc_query = a800_rc_query, 152 .rc_key_map_size = ARRAY_SIZE(ir_codes_a800_table),
153 .rc_query = a800_rc_query,
154 },
153 155
154 .i2c_algo = &dibusb_i2c_algo, 156 .i2c_algo = &dibusb_i2c_algo,
155 157
diff --git a/drivers/media/dvb/dvb-usb/af9005-remote.c b/drivers/media/dvb/dvb-usb/af9005-remote.c
index b41fa873b04d..696207fe37ec 100644
--- a/drivers/media/dvb/dvb-usb/af9005-remote.c
+++ b/drivers/media/dvb/dvb-usb/af9005-remote.c
@@ -33,7 +33,7 @@ MODULE_PARM_DESC(debug,
33 33
34#define deb_decode(args...) dprintk(dvb_usb_af9005_remote_debug,0x01,args) 34#define deb_decode(args...) dprintk(dvb_usb_af9005_remote_debug,0x01,args)
35 35
36struct dvb_usb_rc_key ir_codes_af9005_table[] = { 36struct ir_scancode ir_codes_af9005_table[] = {
37 37
38 {0x01b7, KEY_POWER}, 38 {0x01b7, KEY_POWER},
39 {0x01a7, KEY_VOLUMEUP}, 39 {0x01a7, KEY_VOLUMEUP},
@@ -133,7 +133,7 @@ int af9005_rc_decode(struct dvb_usb_device *d, u8 * data, int len, u32 * event,
133 for (i = 0; i < ir_codes_af9005_table_size; i++) { 133 for (i = 0; i < ir_codes_af9005_table_size; i++) {
134 if (rc5_custom(&ir_codes_af9005_table[i]) == cust 134 if (rc5_custom(&ir_codes_af9005_table[i]) == cust
135 && rc5_data(&ir_codes_af9005_table[i]) == dat) { 135 && rc5_data(&ir_codes_af9005_table[i]) == dat) {
136 *event = ir_codes_af9005_table[i].event; 136 *event = ir_codes_af9005_table[i].keycode;
137 *state = REMOTE_KEY_PRESSED; 137 *state = REMOTE_KEY_PRESSED;
138 deb_decode 138 deb_decode
139 ("key pressed, event %x\n", *event); 139 ("key pressed, event %x\n", *event);
diff --git a/drivers/media/dvb/dvb-usb/af9005.c b/drivers/media/dvb/dvb-usb/af9005.c
index cfd6107d5349..8ecba8848bcf 100644
--- a/drivers/media/dvb/dvb-usb/af9005.c
+++ b/drivers/media/dvb/dvb-usb/af9005.c
@@ -54,50 +54,6 @@ struct af9005_device_state {
54 int led_state; 54 int led_state;
55}; 55};
56 56
57static int af9005_usb_generic_rw(struct dvb_usb_device *d, u8 *wbuf, u16 wlen,
58 u8 *rbuf, u16 rlen, int delay_ms)
59{
60 int actlen, ret = -ENOMEM;
61
62 if (wbuf == NULL || wlen == 0)
63 return -EINVAL;
64
65 if ((ret = mutex_lock_interruptible(&d->usb_mutex)))
66 return ret;
67
68 deb_xfer(">>> ");
69 debug_dump(wbuf, wlen, deb_xfer);
70
71 ret = usb_bulk_msg(d->udev, usb_sndbulkpipe(d->udev,
72 2), wbuf, wlen,
73 &actlen, 2000);
74
75 if (ret)
76 err("bulk message failed: %d (%d/%d)", ret, wlen, actlen);
77 else
78 ret = actlen != wlen ? -1 : 0;
79
80 /* an answer is expected, and no error before */
81 if (!ret && rbuf && rlen) {
82 if (delay_ms)
83 msleep(delay_ms);
84
85 ret = usb_bulk_msg(d->udev, usb_rcvbulkpipe(d->udev,
86 0x01), rbuf,
87 rlen, &actlen, 2000);
88
89 if (ret)
90 err("recv bulk message failed: %d", ret);
91 else {
92 deb_xfer("<<< ");
93 debug_dump(rbuf, actlen, deb_xfer);
94 }
95 }
96
97 mutex_unlock(&d->usb_mutex);
98 return ret;
99}
100
101static int af9005_generic_read_write(struct dvb_usb_device *d, u16 reg, 57static int af9005_generic_read_write(struct dvb_usb_device *d, u16 reg,
102 int readwrite, int type, u8 * values, int len) 58 int readwrite, int type, u8 * values, int len)
103{ 59{
@@ -146,7 +102,7 @@ static int af9005_generic_read_write(struct dvb_usb_device *d, u16 reg,
146 obuf[8] = values[0]; 102 obuf[8] = values[0];
147 obuf[7] = command; 103 obuf[7] = command;
148 104
149 ret = af9005_usb_generic_rw(d, obuf, 16, ibuf, 17, 0); 105 ret = dvb_usb_generic_rw(d, obuf, 16, ibuf, 17, 0);
150 if (ret) 106 if (ret)
151 return ret; 107 return ret;
152 108
@@ -534,7 +490,7 @@ int af9005_send_command(struct dvb_usb_device *d, u8 command, u8 * wbuf,
534 buf[6] = wlen; 490 buf[6] = wlen;
535 for (i = 0; i < wlen; i++) 491 for (i = 0; i < wlen; i++)
536 buf[7 + i] = wbuf[i]; 492 buf[7 + i] = wbuf[i];
537 ret = af9005_usb_generic_rw(d, buf, wlen + 7, ibuf, rlen + 7, 0); 493 ret = dvb_usb_generic_rw(d, buf, wlen + 7, ibuf, rlen + 7, 0);
538 if (ret) 494 if (ret)
539 return ret; 495 return ret;
540 if (ibuf[2] != 0x27) { 496 if (ibuf[2] != 0x27) {
@@ -581,7 +537,7 @@ int af9005_read_eeprom(struct dvb_usb_device *d, u8 address, u8 * values,
581 537
582 obuf[6] = len; 538 obuf[6] = len;
583 obuf[7] = address; 539 obuf[7] = address;
584 ret = af9005_usb_generic_rw(d, obuf, 16, ibuf, 14, 0); 540 ret = dvb_usb_generic_rw(d, obuf, 16, ibuf, 14, 0);
585 if (ret) 541 if (ret)
586 return ret; 542 return ret;
587 if (ibuf[2] != 0x2b) { 543 if (ibuf[2] != 0x2b) {
@@ -882,7 +838,7 @@ static int af9005_rc_query(struct dvb_usb_device *d, u32 * event, int *state)
882 obuf[2] = 0x40; /* read remote */ 838 obuf[2] = 0x40; /* read remote */
883 obuf[3] = 1; /* rest of packet length */ 839 obuf[3] = 1; /* rest of packet length */
884 obuf[4] = st->sequence++; /* sequence number */ 840 obuf[4] = st->sequence++; /* sequence number */
885 ret = af9005_usb_generic_rw(d, obuf, 5, ibuf, 256, 0); 841 ret = dvb_usb_generic_rw(d, obuf, 5, ibuf, 256, 0);
886 if (ret) { 842 if (ret) {
887 err("rc query failed"); 843 err("rc query failed");
888 return ret; 844 return ret;
@@ -1069,10 +1025,15 @@ static struct dvb_usb_device_properties af9005_properties = {
1069 1025
1070 .i2c_algo = &af9005_i2c_algo, 1026 .i2c_algo = &af9005_i2c_algo,
1071 1027
1072 .rc_interval = 200, 1028 .rc.legacy = {
1073 .rc_key_map = NULL, 1029 .rc_interval = 200,
1074 .rc_key_map_size = 0, 1030 .rc_key_map = NULL,
1075 .rc_query = af9005_rc_query, 1031 .rc_key_map_size = 0,
1032 .rc_query = af9005_rc_query,
1033 },
1034
1035 .generic_bulk_ctrl_endpoint = 2,
1036 .generic_bulk_ctrl_endpoint_response = 1,
1076 1037
1077 .num_device_descs = 3, 1038 .num_device_descs = 3,
1078 .devices = { 1039 .devices = {
@@ -1113,10 +1074,10 @@ static int __init af9005_usb_module_init(void)
1113 rc_keys_size = symbol_request(ir_codes_af9005_table_size); 1074 rc_keys_size = symbol_request(ir_codes_af9005_table_size);
1114 if (rc_decode == NULL || rc_keys == NULL || rc_keys_size == NULL) { 1075 if (rc_decode == NULL || rc_keys == NULL || rc_keys_size == NULL) {
1115 err("af9005_rc_decode function not found, disabling remote"); 1076 err("af9005_rc_decode function not found, disabling remote");
1116 af9005_properties.rc_query = NULL; 1077 af9005_properties.rc.legacy.rc_query = NULL;
1117 } else { 1078 } else {
1118 af9005_properties.rc_key_map = rc_keys; 1079 af9005_properties.rc.legacy.rc_key_map = rc_keys;
1119 af9005_properties.rc_key_map_size = *rc_keys_size; 1080 af9005_properties.rc.legacy.rc_key_map_size = *rc_keys_size;
1120 } 1081 }
1121 1082
1122 return 0; 1083 return 0;
diff --git a/drivers/media/dvb/dvb-usb/af9005.h b/drivers/media/dvb/dvb-usb/af9005.h
index 088e7083a39b..3c1fbd1c5d60 100644
--- a/drivers/media/dvb/dvb-usb/af9005.h
+++ b/drivers/media/dvb/dvb-usb/af9005.h
@@ -3490,7 +3490,7 @@ extern u8 regmask[8];
3490/* remote control decoder */ 3490/* remote control decoder */
3491extern int af9005_rc_decode(struct dvb_usb_device *d, u8 * data, int len, 3491extern int af9005_rc_decode(struct dvb_usb_device *d, u8 * data, int len,
3492 u32 * event, int *state); 3492 u32 * event, int *state);
3493extern struct dvb_usb_rc_key ir_codes_af9005_table[]; 3493extern struct ir_scancode ir_codes_af9005_table[];
3494extern int ir_codes_af9005_table_size; 3494extern int ir_codes_af9005_table_size;
3495 3495
3496#endif 3496#endif
diff --git a/drivers/media/dvb/dvb-usb/af9015.c b/drivers/media/dvb/dvb-usb/af9015.c
index 66c7c3ea7990..ea1ed3b4592a 100644
--- a/drivers/media/dvb/dvb-usb/af9015.c
+++ b/drivers/media/dvb/dvb-usb/af9015.c
@@ -735,7 +735,7 @@ error:
735 735
736struct af9015_setup { 736struct af9015_setup {
737 unsigned int id; 737 unsigned int id;
738 struct dvb_usb_rc_key *rc_key_map; 738 struct ir_scancode *rc_key_map;
739 unsigned int rc_key_map_size; 739 unsigned int rc_key_map_size;
740 u8 *ir_table; 740 u8 *ir_table;
741 unsigned int ir_table_size; 741 unsigned int ir_table_size;
@@ -847,8 +847,8 @@ static void af9015_set_remote_config(struct usb_device *udev,
847 } 847 }
848 848
849 if (table) { 849 if (table) {
850 props->rc_key_map = table->rc_key_map; 850 props->rc.legacy.rc_key_map = table->rc_key_map;
851 props->rc_key_map_size = table->rc_key_map_size; 851 props->rc.legacy.rc_key_map_size = table->rc_key_map_size;
852 af9015_config.ir_table = table->ir_table; 852 af9015_config.ir_table = table->ir_table;
853 af9015_config.ir_table_size = table->ir_table_size; 853 af9015_config.ir_table_size = table->ir_table_size;
854 } 854 }
@@ -878,8 +878,8 @@ static int af9015_read_config(struct usb_device *udev)
878 deb_info("%s: IR mode:%d\n", __func__, val); 878 deb_info("%s: IR mode:%d\n", __func__, val);
879 for (i = 0; i < af9015_properties_count; i++) { 879 for (i = 0; i < af9015_properties_count; i++) {
880 if (val == AF9015_IR_MODE_DISABLED) { 880 if (val == AF9015_IR_MODE_DISABLED) {
881 af9015_properties[i].rc_key_map = NULL; 881 af9015_properties[i].rc.legacy.rc_key_map = NULL;
882 af9015_properties[i].rc_key_map_size = 0; 882 af9015_properties[i].rc.legacy.rc_key_map_size = 0;
883 } else 883 } else
884 af9015_set_remote_config(udev, &af9015_properties[i]); 884 af9015_set_remote_config(udev, &af9015_properties[i]);
885 } 885 }
@@ -1063,7 +1063,7 @@ static int af9015_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
1063{ 1063{
1064 u8 buf[8]; 1064 u8 buf[8];
1065 struct req_t req = {GET_IR_CODE, 0, 0, 0, 0, sizeof(buf), buf}; 1065 struct req_t req = {GET_IR_CODE, 0, 0, 0, 0, sizeof(buf), buf};
1066 struct dvb_usb_rc_key *keymap = d->props.rc_key_map; 1066 struct ir_scancode *keymap = d->props.rc.legacy.rc_key_map;
1067 int i, ret; 1067 int i, ret;
1068 1068
1069 memset(buf, 0, sizeof(buf)); 1069 memset(buf, 0, sizeof(buf));
@@ -1075,10 +1075,10 @@ static int af9015_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
1075 *event = 0; 1075 *event = 0;
1076 *state = REMOTE_NO_KEY_PRESSED; 1076 *state = REMOTE_NO_KEY_PRESSED;
1077 1077
1078 for (i = 0; i < d->props.rc_key_map_size; i++) { 1078 for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++) {
1079 if (!buf[1] && rc5_custom(&keymap[i]) == buf[0] && 1079 if (!buf[1] && rc5_custom(&keymap[i]) == buf[0] &&
1080 rc5_data(&keymap[i]) == buf[2]) { 1080 rc5_data(&keymap[i]) == buf[2]) {
1081 *event = keymap[i].event; 1081 *event = keymap[i].keycode;
1082 *state = REMOTE_KEY_PRESSED; 1082 *state = REMOTE_KEY_PRESSED;
1083 break; 1083 break;
1084 } 1084 }
@@ -1299,6 +1299,7 @@ static struct usb_device_id af9015_usb_table[] = {
1299 {USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV2000DS)}, 1299 {USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV2000DS)},
1300/* 30 */{USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_UB383_T)}, 1300/* 30 */{USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_UB383_T)},
1301 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_395U_4)}, 1301 {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_KWORLD_395U_4)},
1302 {USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A815M)},
1302 {0}, 1303 {0},
1303}; 1304};
1304MODULE_DEVICE_TABLE(usb, af9015_usb_table); 1305MODULE_DEVICE_TABLE(usb, af9015_usb_table);
@@ -1353,8 +1354,10 @@ static struct dvb_usb_device_properties af9015_properties[] = {
1353 1354
1354 .identify_state = af9015_identify_state, 1355 .identify_state = af9015_identify_state,
1355 1356
1356 .rc_query = af9015_rc_query, 1357 .rc.legacy = {
1357 .rc_interval = 150, 1358 .rc_query = af9015_rc_query,
1359 .rc_interval = 150,
1360 },
1358 1361
1359 .i2c_algo = &af9015_i2c_algo, 1362 .i2c_algo = &af9015_i2c_algo,
1360 1363
@@ -1460,8 +1463,10 @@ static struct dvb_usb_device_properties af9015_properties[] = {
1460 1463
1461 .identify_state = af9015_identify_state, 1464 .identify_state = af9015_identify_state,
1462 1465
1463 .rc_query = af9015_rc_query, 1466 .rc.legacy = {
1464 .rc_interval = 150, 1467 .rc_query = af9015_rc_query,
1468 .rc_interval = 150,
1469 },
1465 1470
1466 .i2c_algo = &af9015_i2c_algo, 1471 .i2c_algo = &af9015_i2c_algo,
1467 1472
@@ -1567,12 +1572,14 @@ static struct dvb_usb_device_properties af9015_properties[] = {
1567 1572
1568 .identify_state = af9015_identify_state, 1573 .identify_state = af9015_identify_state,
1569 1574
1570 .rc_query = af9015_rc_query, 1575 .rc.legacy = {
1571 .rc_interval = 150, 1576 .rc_query = af9015_rc_query,
1577 .rc_interval = 150,
1578 },
1572 1579
1573 .i2c_algo = &af9015_i2c_algo, 1580 .i2c_algo = &af9015_i2c_algo,
1574 1581
1575 .num_device_descs = 8, /* max 9 */ 1582 .num_device_descs = 9, /* max 9 */
1576 .devices = { 1583 .devices = {
1577 { 1584 {
1578 .name = "AverMedia AVerTV Volar GPS 805 (A805)", 1585 .name = "AverMedia AVerTV Volar GPS 805 (A805)",
@@ -1617,6 +1624,11 @@ static struct dvb_usb_device_properties af9015_properties[] = {
1617 .cold_ids = {&af9015_usb_table[30], NULL}, 1624 .cold_ids = {&af9015_usb_table[30], NULL},
1618 .warm_ids = {NULL}, 1625 .warm_ids = {NULL},
1619 }, 1626 },
1627 {
1628 .name = "AverMedia AVerTV Volar M (A815Mac)",
1629 .cold_ids = {&af9015_usb_table[32], NULL},
1630 .warm_ids = {NULL},
1631 },
1620 } 1632 }
1621 }, 1633 },
1622}; 1634};
diff --git a/drivers/media/dvb/dvb-usb/af9015.h b/drivers/media/dvb/dvb-usb/af9015.h
index 63b2a4907b7e..c8e9349742ee 100644
--- a/drivers/media/dvb/dvb-usb/af9015.h
+++ b/drivers/media/dvb/dvb-usb/af9015.h
@@ -123,7 +123,7 @@ enum af9015_remote {
123 123
124/* LeadTek - Y04G0051 */ 124/* LeadTek - Y04G0051 */
125/* Leadtek WinFast DTV Dongle Gold */ 125/* Leadtek WinFast DTV Dongle Gold */
126static struct dvb_usb_rc_key ir_codes_af9015_table_leadtek[] = { 126static struct ir_scancode ir_codes_af9015_table_leadtek[] = {
127 { 0x001e, KEY_1 }, 127 { 0x001e, KEY_1 },
128 { 0x001f, KEY_2 }, 128 { 0x001f, KEY_2 },
129 { 0x0020, KEY_3 }, 129 { 0x0020, KEY_3 },
@@ -227,7 +227,7 @@ static u8 af9015_ir_table_leadtek[] = {
227}; 227};
228 228
229/* TwinHan AzureWave AD-TU700(704J) */ 229/* TwinHan AzureWave AD-TU700(704J) */
230static struct dvb_usb_rc_key ir_codes_af9015_table_twinhan[] = { 230static struct ir_scancode ir_codes_af9015_table_twinhan[] = {
231 { 0x053f, KEY_POWER }, 231 { 0x053f, KEY_POWER },
232 { 0x0019, KEY_FAVORITES }, /* Favorite List */ 232 { 0x0019, KEY_FAVORITES }, /* Favorite List */
233 { 0x0004, KEY_TEXT }, /* Teletext */ 233 { 0x0004, KEY_TEXT }, /* Teletext */
@@ -338,7 +338,7 @@ static u8 af9015_ir_table_twinhan[] = {
338}; 338};
339 339
340/* A-Link DTU(m) */ 340/* A-Link DTU(m) */
341static struct dvb_usb_rc_key ir_codes_af9015_table_a_link[] = { 341static struct ir_scancode ir_codes_af9015_table_a_link[] = {
342 { 0x001e, KEY_1 }, 342 { 0x001e, KEY_1 },
343 { 0x001f, KEY_2 }, 343 { 0x001f, KEY_2 },
344 { 0x0020, KEY_3 }, 344 { 0x0020, KEY_3 },
@@ -381,7 +381,7 @@ static u8 af9015_ir_table_a_link[] = {
381}; 381};
382 382
383/* MSI DIGIVOX mini II V3.0 */ 383/* MSI DIGIVOX mini II V3.0 */
384static struct dvb_usb_rc_key ir_codes_af9015_table_msi[] = { 384static struct ir_scancode ir_codes_af9015_table_msi[] = {
385 { 0x001e, KEY_1 }, 385 { 0x001e, KEY_1 },
386 { 0x001f, KEY_2 }, 386 { 0x001f, KEY_2 },
387 { 0x0020, KEY_3 }, 387 { 0x0020, KEY_3 },
@@ -424,7 +424,7 @@ static u8 af9015_ir_table_msi[] = {
424}; 424};
425 425
426/* MYGICTV U718 */ 426/* MYGICTV U718 */
427static struct dvb_usb_rc_key ir_codes_af9015_table_mygictv[] = { 427static struct ir_scancode ir_codes_af9015_table_mygictv[] = {
428 { 0x003d, KEY_SWITCHVIDEOMODE }, 428 { 0x003d, KEY_SWITCHVIDEOMODE },
429 /* TV / AV */ 429 /* TV / AV */
430 { 0x0545, KEY_POWER }, 430 { 0x0545, KEY_POWER },
@@ -550,7 +550,7 @@ static u8 af9015_ir_table_kworld[] = {
550}; 550};
551 551
552/* AverMedia Volar X */ 552/* AverMedia Volar X */
553static struct dvb_usb_rc_key ir_codes_af9015_table_avermedia[] = { 553static struct ir_scancode ir_codes_af9015_table_avermedia[] = {
554 { 0x053d, KEY_PROG1 }, /* SOURCE */ 554 { 0x053d, KEY_PROG1 }, /* SOURCE */
555 { 0x0512, KEY_POWER }, /* POWER */ 555 { 0x0512, KEY_POWER }, /* POWER */
556 { 0x051e, KEY_1 }, /* 1 */ 556 { 0x051e, KEY_1 }, /* 1 */
@@ -656,7 +656,7 @@ static u8 af9015_ir_table_avermedia_ks[] = {
656}; 656};
657 657
658/* Digittrade DVB-T USB Stick */ 658/* Digittrade DVB-T USB Stick */
659static struct dvb_usb_rc_key ir_codes_af9015_table_digittrade[] = { 659static struct ir_scancode ir_codes_af9015_table_digittrade[] = {
660 { 0x010f, KEY_LAST }, /* RETURN */ 660 { 0x010f, KEY_LAST }, /* RETURN */
661 { 0x0517, KEY_TEXT }, /* TELETEXT */ 661 { 0x0517, KEY_TEXT }, /* TELETEXT */
662 { 0x0108, KEY_EPG }, /* EPG */ 662 { 0x0108, KEY_EPG }, /* EPG */
@@ -719,7 +719,7 @@ static u8 af9015_ir_table_digittrade[] = {
719}; 719};
720 720
721/* TREKSTOR DVB-T USB Stick */ 721/* TREKSTOR DVB-T USB Stick */
722static struct dvb_usb_rc_key ir_codes_af9015_table_trekstor[] = { 722static struct ir_scancode ir_codes_af9015_table_trekstor[] = {
723 { 0x0704, KEY_AGAIN }, /* Home */ 723 { 0x0704, KEY_AGAIN }, /* Home */
724 { 0x0705, KEY_MUTE }, /* Mute */ 724 { 0x0705, KEY_MUTE }, /* Mute */
725 { 0x0706, KEY_UP }, /* Up */ 725 { 0x0706, KEY_UP }, /* Up */
@@ -782,7 +782,7 @@ static u8 af9015_ir_table_trekstor[] = {
782}; 782};
783 783
784/* MSI DIGIVOX mini III */ 784/* MSI DIGIVOX mini III */
785static struct dvb_usb_rc_key ir_codes_af9015_table_msi_digivox_iii[] = { 785static struct ir_scancode ir_codes_af9015_table_msi_digivox_iii[] = {
786 { 0x0713, KEY_POWER }, /* [red power button] */ 786 { 0x0713, KEY_POWER }, /* [red power button] */
787 { 0x073b, KEY_VIDEO }, /* Source */ 787 { 0x073b, KEY_VIDEO }, /* Source */
788 { 0x073e, KEY_ZOOM }, /* Zoom */ 788 { 0x073e, KEY_ZOOM }, /* Zoom */
diff --git a/drivers/media/dvb/dvb-usb/anysee.c b/drivers/media/dvb/dvb-usb/anysee.c
index faca1ad88a67..4685259e1614 100644
--- a/drivers/media/dvb/dvb-usb/anysee.c
+++ b/drivers/media/dvb/dvb-usb/anysee.c
@@ -377,7 +377,7 @@ static int anysee_tuner_attach(struct dvb_usb_adapter *adap)
377static int anysee_rc_query(struct dvb_usb_device *d, u32 *event, int *state) 377static int anysee_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
378{ 378{
379 u8 buf[] = {CMD_GET_IR_CODE}; 379 u8 buf[] = {CMD_GET_IR_CODE};
380 struct dvb_usb_rc_key *keymap = d->props.rc_key_map; 380 struct ir_scancode *keymap = d->props.rc.legacy.rc_key_map;
381 u8 ircode[2]; 381 u8 ircode[2];
382 int i, ret; 382 int i, ret;
383 383
@@ -388,10 +388,10 @@ static int anysee_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
388 *event = 0; 388 *event = 0;
389 *state = REMOTE_NO_KEY_PRESSED; 389 *state = REMOTE_NO_KEY_PRESSED;
390 390
391 for (i = 0; i < d->props.rc_key_map_size; i++) { 391 for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++) {
392 if (rc5_custom(&keymap[i]) == ircode[0] && 392 if (rc5_custom(&keymap[i]) == ircode[0] &&
393 rc5_data(&keymap[i]) == ircode[1]) { 393 rc5_data(&keymap[i]) == ircode[1]) {
394 *event = keymap[i].event; 394 *event = keymap[i].keycode;
395 *state = REMOTE_KEY_PRESSED; 395 *state = REMOTE_KEY_PRESSED;
396 return 0; 396 return 0;
397 } 397 }
@@ -399,7 +399,7 @@ static int anysee_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
399 return 0; 399 return 0;
400} 400}
401 401
402static struct dvb_usb_rc_key ir_codes_anysee_table[] = { 402static struct ir_scancode ir_codes_anysee_table[] = {
403 { 0x0100, KEY_0 }, 403 { 0x0100, KEY_0 },
404 { 0x0101, KEY_1 }, 404 { 0x0101, KEY_1 },
405 { 0x0102, KEY_2 }, 405 { 0x0102, KEY_2 },
@@ -463,6 +463,11 @@ static int anysee_probe(struct usb_interface *intf,
463 if (intf->num_altsetting < 1) 463 if (intf->num_altsetting < 1)
464 return -ENODEV; 464 return -ENODEV;
465 465
466 /*
467 * Anysee is always warm (its USB-bridge, Cypress FX2, uploads
468 * firmware from eeprom). If dvb_usb_device_init() succeeds that
469 * means d is a valid pointer.
470 */
466 ret = dvb_usb_device_init(intf, &anysee_properties, THIS_MODULE, &d, 471 ret = dvb_usb_device_init(intf, &anysee_properties, THIS_MODULE, &d,
467 adapter_nr); 472 adapter_nr);
468 if (ret) 473 if (ret)
@@ -479,10 +484,7 @@ static int anysee_probe(struct usb_interface *intf,
479 if (ret) 484 if (ret)
480 return ret; 485 return ret;
481 486
482 if (d) 487 return anysee_init(d);
483 ret = anysee_init(d);
484
485 return ret;
486} 488}
487 489
488static struct usb_device_id anysee_table[] = { 490static struct usb_device_id anysee_table[] = {
@@ -518,10 +520,12 @@ static struct dvb_usb_device_properties anysee_properties = {
518 } 520 }
519 }, 521 },
520 522
521 .rc_key_map = ir_codes_anysee_table, 523 .rc.legacy = {
522 .rc_key_map_size = ARRAY_SIZE(ir_codes_anysee_table), 524 .rc_key_map = ir_codes_anysee_table,
523 .rc_query = anysee_rc_query, 525 .rc_key_map_size = ARRAY_SIZE(ir_codes_anysee_table),
524 .rc_interval = 200, /* windows driver uses 500ms */ 526 .rc_query = anysee_rc_query,
527 .rc_interval = 200, /* windows driver uses 500ms */
528 },
525 529
526 .i2c_algo = &anysee_i2c_algo, 530 .i2c_algo = &anysee_i2c_algo,
527 531
diff --git a/drivers/media/dvb/dvb-usb/az6027.c b/drivers/media/dvb/dvb-usb/az6027.c
index 6681ac1c56e3..62c58288469f 100644
--- a/drivers/media/dvb/dvb-usb/az6027.c
+++ b/drivers/media/dvb/dvb-usb/az6027.c
@@ -386,7 +386,7 @@ static int az6027_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
386} 386}
387 387
388/* keys for the enclosed remote control */ 388/* keys for the enclosed remote control */
389static struct dvb_usb_rc_key ir_codes_az6027_table[] = { 389static struct ir_scancode ir_codes_az6027_table[] = {
390 { 0x01, KEY_1 }, 390 { 0x01, KEY_1 },
391 { 0x02, KEY_2 }, 391 { 0x02, KEY_2 },
392}; 392};
@@ -1125,10 +1125,13 @@ static struct dvb_usb_device_properties az6027_properties = {
1125 .power_ctrl = az6027_power_ctrl, 1125 .power_ctrl = az6027_power_ctrl,
1126 .read_mac_address = az6027_read_mac_addr, 1126 .read_mac_address = az6027_read_mac_addr,
1127 */ 1127 */
1128 .rc_key_map = ir_codes_az6027_table, 1128 .rc.legacy = {
1129 .rc_key_map_size = ARRAY_SIZE(ir_codes_az6027_table), 1129 .rc_key_map = ir_codes_az6027_table,
1130 .rc_interval = 400, 1130 .rc_key_map_size = ARRAY_SIZE(ir_codes_az6027_table),
1131 .rc_query = az6027_rc_query, 1131 .rc_interval = 400,
1132 .rc_query = az6027_rc_query,
1133 },
1134
1132 .i2c_algo = &az6027_i2c_algo, 1135 .i2c_algo = &az6027_i2c_algo,
1133 1136
1134 .num_device_descs = 5, 1137 .num_device_descs = 5,
diff --git a/drivers/media/dvb/dvb-usb/cinergyT2-core.c b/drivers/media/dvb/dvb-usb/cinergyT2-core.c
index 5a9c14bdc980..4f5aa83fc1fc 100644
--- a/drivers/media/dvb/dvb-usb/cinergyT2-core.c
+++ b/drivers/media/dvb/dvb-usb/cinergyT2-core.c
@@ -84,7 +84,7 @@ static int cinergyt2_frontend_attach(struct dvb_usb_adapter *adap)
84 return 0; 84 return 0;
85} 85}
86 86
87static struct dvb_usb_rc_key ir_codes_cinergyt2_table[] = { 87static struct ir_scancode ir_codes_cinergyt2_table[] = {
88 { 0x0401, KEY_POWER }, 88 { 0x0401, KEY_POWER },
89 { 0x0402, KEY_1 }, 89 { 0x0402, KEY_1 },
90 { 0x0403, KEY_2 }, 90 { 0x0403, KEY_2 },
@@ -217,10 +217,12 @@ static struct dvb_usb_device_properties cinergyt2_properties = {
217 217
218 .power_ctrl = cinergyt2_power_ctrl, 218 .power_ctrl = cinergyt2_power_ctrl,
219 219
220 .rc_interval = 50, 220 .rc.legacy = {
221 .rc_key_map = ir_codes_cinergyt2_table, 221 .rc_interval = 50,
222 .rc_key_map_size = ARRAY_SIZE(ir_codes_cinergyt2_table), 222 .rc_key_map = ir_codes_cinergyt2_table,
223 .rc_query = cinergyt2_rc_query, 223 .rc_key_map_size = ARRAY_SIZE(ir_codes_cinergyt2_table),
224 .rc_query = cinergyt2_rc_query,
225 },
224 226
225 .generic_bulk_ctrl_endpoint = 1, 227 .generic_bulk_ctrl_endpoint = 1,
226 228
diff --git a/drivers/media/dvb/dvb-usb/cxusb.c b/drivers/media/dvb/dvb-usb/cxusb.c
index 11e9e85dac86..cd9f362c37b2 100644
--- a/drivers/media/dvb/dvb-usb/cxusb.c
+++ b/drivers/media/dvb/dvb-usb/cxusb.c
@@ -385,7 +385,7 @@ static int cxusb_d680_dmb_streaming_ctrl(
385 385
386static int cxusb_rc_query(struct dvb_usb_device *d, u32 *event, int *state) 386static int cxusb_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
387{ 387{
388 struct dvb_usb_rc_key *keymap = d->props.rc_key_map; 388 struct ir_scancode *keymap = d->props.rc.legacy.rc_key_map;
389 u8 ircode[4]; 389 u8 ircode[4];
390 int i; 390 int i;
391 391
@@ -394,10 +394,10 @@ static int cxusb_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
394 *event = 0; 394 *event = 0;
395 *state = REMOTE_NO_KEY_PRESSED; 395 *state = REMOTE_NO_KEY_PRESSED;
396 396
397 for (i = 0; i < d->props.rc_key_map_size; i++) { 397 for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++) {
398 if (rc5_custom(&keymap[i]) == ircode[2] && 398 if (rc5_custom(&keymap[i]) == ircode[2] &&
399 rc5_data(&keymap[i]) == ircode[3]) { 399 rc5_data(&keymap[i]) == ircode[3]) {
400 *event = keymap[i].event; 400 *event = keymap[i].keycode;
401 *state = REMOTE_KEY_PRESSED; 401 *state = REMOTE_KEY_PRESSED;
402 402
403 return 0; 403 return 0;
@@ -410,7 +410,7 @@ static int cxusb_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
410static int cxusb_bluebird2_rc_query(struct dvb_usb_device *d, u32 *event, 410static int cxusb_bluebird2_rc_query(struct dvb_usb_device *d, u32 *event,
411 int *state) 411 int *state)
412{ 412{
413 struct dvb_usb_rc_key *keymap = d->props.rc_key_map; 413 struct ir_scancode *keymap = d->props.rc.legacy.rc_key_map;
414 u8 ircode[4]; 414 u8 ircode[4];
415 int i; 415 int i;
416 struct i2c_msg msg = { .addr = 0x6b, .flags = I2C_M_RD, 416 struct i2c_msg msg = { .addr = 0x6b, .flags = I2C_M_RD,
@@ -422,10 +422,10 @@ static int cxusb_bluebird2_rc_query(struct dvb_usb_device *d, u32 *event,
422 if (cxusb_i2c_xfer(&d->i2c_adap, &msg, 1) != 1) 422 if (cxusb_i2c_xfer(&d->i2c_adap, &msg, 1) != 1)
423 return 0; 423 return 0;
424 424
425 for (i = 0; i < d->props.rc_key_map_size; i++) { 425 for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++) {
426 if (rc5_custom(&keymap[i]) == ircode[1] && 426 if (rc5_custom(&keymap[i]) == ircode[1] &&
427 rc5_data(&keymap[i]) == ircode[2]) { 427 rc5_data(&keymap[i]) == ircode[2]) {
428 *event = keymap[i].event; 428 *event = keymap[i].keycode;
429 *state = REMOTE_KEY_PRESSED; 429 *state = REMOTE_KEY_PRESSED;
430 430
431 return 0; 431 return 0;
@@ -438,7 +438,7 @@ static int cxusb_bluebird2_rc_query(struct dvb_usb_device *d, u32 *event,
438static int cxusb_d680_dmb_rc_query(struct dvb_usb_device *d, u32 *event, 438static int cxusb_d680_dmb_rc_query(struct dvb_usb_device *d, u32 *event,
439 int *state) 439 int *state)
440{ 440{
441 struct dvb_usb_rc_key *keymap = d->props.rc_key_map; 441 struct ir_scancode *keymap = d->props.rc.legacy.rc_key_map;
442 u8 ircode[2]; 442 u8 ircode[2];
443 int i; 443 int i;
444 444
@@ -448,10 +448,10 @@ static int cxusb_d680_dmb_rc_query(struct dvb_usb_device *d, u32 *event,
448 if (cxusb_ctrl_msg(d, 0x10, NULL, 0, ircode, 2) < 0) 448 if (cxusb_ctrl_msg(d, 0x10, NULL, 0, ircode, 2) < 0)
449 return 0; 449 return 0;
450 450
451 for (i = 0; i < d->props.rc_key_map_size; i++) { 451 for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++) {
452 if (rc5_custom(&keymap[i]) == ircode[0] && 452 if (rc5_custom(&keymap[i]) == ircode[0] &&
453 rc5_data(&keymap[i]) == ircode[1]) { 453 rc5_data(&keymap[i]) == ircode[1]) {
454 *event = keymap[i].event; 454 *event = keymap[i].keycode;
455 *state = REMOTE_KEY_PRESSED; 455 *state = REMOTE_KEY_PRESSED;
456 456
457 return 0; 457 return 0;
@@ -461,7 +461,7 @@ static int cxusb_d680_dmb_rc_query(struct dvb_usb_device *d, u32 *event,
461 return 0; 461 return 0;
462} 462}
463 463
464static struct dvb_usb_rc_key ir_codes_dvico_mce_table[] = { 464static struct ir_scancode ir_codes_dvico_mce_table[] = {
465 { 0xfe02, KEY_TV }, 465 { 0xfe02, KEY_TV },
466 { 0xfe0e, KEY_MP3 }, 466 { 0xfe0e, KEY_MP3 },
467 { 0xfe1a, KEY_DVD }, 467 { 0xfe1a, KEY_DVD },
@@ -509,7 +509,7 @@ static struct dvb_usb_rc_key ir_codes_dvico_mce_table[] = {
509 { 0xfe4e, KEY_POWER }, 509 { 0xfe4e, KEY_POWER },
510}; 510};
511 511
512static struct dvb_usb_rc_key ir_codes_dvico_portable_table[] = { 512static struct ir_scancode ir_codes_dvico_portable_table[] = {
513 { 0xfc02, KEY_SETUP }, /* Profile */ 513 { 0xfc02, KEY_SETUP }, /* Profile */
514 { 0xfc43, KEY_POWER2 }, 514 { 0xfc43, KEY_POWER2 },
515 { 0xfc06, KEY_EPG }, 515 { 0xfc06, KEY_EPG },
@@ -548,7 +548,7 @@ static struct dvb_usb_rc_key ir_codes_dvico_portable_table[] = {
548 { 0xfc00, KEY_UNKNOWN }, /* HD */ 548 { 0xfc00, KEY_UNKNOWN }, /* HD */
549}; 549};
550 550
551static struct dvb_usb_rc_key ir_codes_d680_dmb_table[] = { 551static struct ir_scancode ir_codes_d680_dmb_table[] = {
552 { 0x0038, KEY_UNKNOWN }, /* TV/AV */ 552 { 0x0038, KEY_UNKNOWN }, /* TV/AV */
553 { 0x080c, KEY_ZOOM }, 553 { 0x080c, KEY_ZOOM },
554 { 0x0800, KEY_0 }, 554 { 0x0800, KEY_0 },
@@ -923,7 +923,7 @@ static int cxusb_dualdig4_frontend_attach(struct dvb_usb_adapter *adap)
923 return -EIO; 923 return -EIO;
924 924
925 /* try to determine if there is no IR decoder on the I2C bus */ 925 /* try to determine if there is no IR decoder on the I2C bus */
926 for (i = 0; adap->dev->props.rc_key_map != NULL && i < 5; i++) { 926 for (i = 0; adap->dev->props.rc.legacy.rc_key_map != NULL && i < 5; i++) {
927 msleep(20); 927 msleep(20);
928 if (cxusb_i2c_xfer(&adap->dev->i2c_adap, &msg, 1) != 1) 928 if (cxusb_i2c_xfer(&adap->dev->i2c_adap, &msg, 1) != 1)
929 goto no_IR; 929 goto no_IR;
@@ -931,7 +931,7 @@ static int cxusb_dualdig4_frontend_attach(struct dvb_usb_adapter *adap)
931 continue; 931 continue;
932 if (ircode[2] + ircode[3] != 0xff) { 932 if (ircode[2] + ircode[3] != 0xff) {
933no_IR: 933no_IR:
934 adap->dev->props.rc_key_map = NULL; 934 adap->dev->props.rc.legacy.rc_key_map = NULL;
935 info("No IR receiver detected on this device."); 935 info("No IR receiver detected on this device.");
936 break; 936 break;
937 } 937 }
@@ -1451,10 +1451,12 @@ static struct dvb_usb_device_properties cxusb_bluebird_lgh064f_properties = {
1451 1451
1452 .i2c_algo = &cxusb_i2c_algo, 1452 .i2c_algo = &cxusb_i2c_algo,
1453 1453
1454 .rc_interval = 100, 1454 .rc.legacy = {
1455 .rc_key_map = ir_codes_dvico_portable_table, 1455 .rc_interval = 100,
1456 .rc_key_map_size = ARRAY_SIZE(ir_codes_dvico_portable_table), 1456 .rc_key_map = ir_codes_dvico_portable_table,
1457 .rc_query = cxusb_rc_query, 1457 .rc_key_map_size = ARRAY_SIZE(ir_codes_dvico_portable_table),
1458 .rc_query = cxusb_rc_query,
1459 },
1458 1460
1459 .generic_bulk_ctrl_endpoint = 0x01, 1461 .generic_bulk_ctrl_endpoint = 0x01,
1460 1462
@@ -1502,10 +1504,12 @@ static struct dvb_usb_device_properties cxusb_bluebird_dee1601_properties = {
1502 1504
1503 .i2c_algo = &cxusb_i2c_algo, 1505 .i2c_algo = &cxusb_i2c_algo,
1504 1506
1505 .rc_interval = 150, 1507 .rc.legacy = {
1506 .rc_key_map = ir_codes_dvico_mce_table, 1508 .rc_interval = 150,
1507 .rc_key_map_size = ARRAY_SIZE(ir_codes_dvico_mce_table), 1509 .rc_key_map = ir_codes_dvico_mce_table,
1508 .rc_query = cxusb_rc_query, 1510 .rc_key_map_size = ARRAY_SIZE(ir_codes_dvico_mce_table),
1511 .rc_query = cxusb_rc_query,
1512 },
1509 1513
1510 .generic_bulk_ctrl_endpoint = 0x01, 1514 .generic_bulk_ctrl_endpoint = 0x01,
1511 1515
@@ -1561,10 +1565,12 @@ static struct dvb_usb_device_properties cxusb_bluebird_lgz201_properties = {
1561 1565
1562 .i2c_algo = &cxusb_i2c_algo, 1566 .i2c_algo = &cxusb_i2c_algo,
1563 1567
1564 .rc_interval = 100, 1568 .rc.legacy = {
1565 .rc_key_map = ir_codes_dvico_portable_table, 1569 .rc_interval = 100,
1566 .rc_key_map_size = ARRAY_SIZE(ir_codes_dvico_portable_table), 1570 .rc_key_map = ir_codes_dvico_portable_table,
1567 .rc_query = cxusb_rc_query, 1571 .rc_key_map_size = ARRAY_SIZE(ir_codes_dvico_portable_table),
1572 .rc_query = cxusb_rc_query,
1573 },
1568 1574
1569 .generic_bulk_ctrl_endpoint = 0x01, 1575 .generic_bulk_ctrl_endpoint = 0x01,
1570 .num_device_descs = 1, 1576 .num_device_descs = 1,
@@ -1611,10 +1617,12 @@ static struct dvb_usb_device_properties cxusb_bluebird_dtt7579_properties = {
1611 1617
1612 .i2c_algo = &cxusb_i2c_algo, 1618 .i2c_algo = &cxusb_i2c_algo,
1613 1619
1614 .rc_interval = 100, 1620 .rc.legacy = {
1615 .rc_key_map = ir_codes_dvico_portable_table, 1621 .rc_interval = 100,
1616 .rc_key_map_size = ARRAY_SIZE(ir_codes_dvico_portable_table), 1622 .rc_key_map = ir_codes_dvico_portable_table,
1617 .rc_query = cxusb_rc_query, 1623 .rc_key_map_size = ARRAY_SIZE(ir_codes_dvico_portable_table),
1624 .rc_query = cxusb_rc_query,
1625 },
1618 1626
1619 .generic_bulk_ctrl_endpoint = 0x01, 1627 .generic_bulk_ctrl_endpoint = 0x01,
1620 1628
@@ -1660,10 +1668,12 @@ static struct dvb_usb_device_properties cxusb_bluebird_dualdig4_properties = {
1660 1668
1661 .generic_bulk_ctrl_endpoint = 0x01, 1669 .generic_bulk_ctrl_endpoint = 0x01,
1662 1670
1663 .rc_interval = 100, 1671 .rc.legacy = {
1664 .rc_key_map = ir_codes_dvico_mce_table, 1672 .rc_interval = 100,
1665 .rc_key_map_size = ARRAY_SIZE(ir_codes_dvico_mce_table), 1673 .rc_key_map = ir_codes_dvico_mce_table,
1666 .rc_query = cxusb_bluebird2_rc_query, 1674 .rc_key_map_size = ARRAY_SIZE(ir_codes_dvico_mce_table),
1675 .rc_query = cxusb_bluebird2_rc_query,
1676 },
1667 1677
1668 .num_device_descs = 1, 1678 .num_device_descs = 1,
1669 .devices = { 1679 .devices = {
@@ -1708,10 +1718,12 @@ static struct dvb_usb_device_properties cxusb_bluebird_nano2_properties = {
1708 1718
1709 .generic_bulk_ctrl_endpoint = 0x01, 1719 .generic_bulk_ctrl_endpoint = 0x01,
1710 1720
1711 .rc_interval = 100, 1721 .rc.legacy = {
1712 .rc_key_map = ir_codes_dvico_portable_table, 1722 .rc_interval = 100,
1713 .rc_key_map_size = ARRAY_SIZE(ir_codes_dvico_portable_table), 1723 .rc_key_map = ir_codes_dvico_portable_table,
1714 .rc_query = cxusb_bluebird2_rc_query, 1724 .rc_key_map_size = ARRAY_SIZE(ir_codes_dvico_portable_table),
1725 .rc_query = cxusb_bluebird2_rc_query,
1726 },
1715 1727
1716 .num_device_descs = 1, 1728 .num_device_descs = 1,
1717 .devices = { 1729 .devices = {
@@ -1758,10 +1770,12 @@ static struct dvb_usb_device_properties cxusb_bluebird_nano2_needsfirmware_prope
1758 1770
1759 .generic_bulk_ctrl_endpoint = 0x01, 1771 .generic_bulk_ctrl_endpoint = 0x01,
1760 1772
1761 .rc_interval = 100, 1773 .rc.legacy = {
1762 .rc_key_map = ir_codes_dvico_portable_table, 1774 .rc_interval = 100,
1763 .rc_key_map_size = ARRAY_SIZE(ir_codes_dvico_portable_table), 1775 .rc_key_map = ir_codes_dvico_portable_table,
1764 .rc_query = cxusb_rc_query, 1776 .rc_key_map_size = ARRAY_SIZE(ir_codes_dvico_portable_table),
1777 .rc_query = cxusb_rc_query,
1778 },
1765 1779
1766 .num_device_descs = 1, 1780 .num_device_descs = 1,
1767 .devices = { 1781 .devices = {
@@ -1849,10 +1863,12 @@ struct dvb_usb_device_properties cxusb_bluebird_dualdig4_rev2_properties = {
1849 1863
1850 .generic_bulk_ctrl_endpoint = 0x01, 1864 .generic_bulk_ctrl_endpoint = 0x01,
1851 1865
1852 .rc_interval = 100, 1866 .rc.legacy = {
1853 .rc_key_map = ir_codes_dvico_mce_table, 1867 .rc_interval = 100,
1854 .rc_key_map_size = ARRAY_SIZE(ir_codes_dvico_mce_table), 1868 .rc_key_map = ir_codes_dvico_mce_table,
1855 .rc_query = cxusb_rc_query, 1869 .rc_key_map_size = ARRAY_SIZE(ir_codes_dvico_mce_table),
1870 .rc_query = cxusb_rc_query,
1871 },
1856 1872
1857 .num_device_descs = 1, 1873 .num_device_descs = 1,
1858 .devices = { 1874 .devices = {
@@ -1897,10 +1913,12 @@ static struct dvb_usb_device_properties cxusb_d680_dmb_properties = {
1897 1913
1898 .generic_bulk_ctrl_endpoint = 0x01, 1914 .generic_bulk_ctrl_endpoint = 0x01,
1899 1915
1900 .rc_interval = 100, 1916 .rc.legacy = {
1901 .rc_key_map = ir_codes_d680_dmb_table, 1917 .rc_interval = 100,
1902 .rc_key_map_size = ARRAY_SIZE(ir_codes_d680_dmb_table), 1918 .rc_key_map = ir_codes_d680_dmb_table,
1903 .rc_query = cxusb_d680_dmb_rc_query, 1919 .rc_key_map_size = ARRAY_SIZE(ir_codes_d680_dmb_table),
1920 .rc_query = cxusb_d680_dmb_rc_query,
1921 },
1904 1922
1905 .num_device_descs = 1, 1923 .num_device_descs = 1,
1906 .devices = { 1924 .devices = {
@@ -1946,10 +1964,12 @@ static struct dvb_usb_device_properties cxusb_mygica_d689_properties = {
1946 1964
1947 .generic_bulk_ctrl_endpoint = 0x01, 1965 .generic_bulk_ctrl_endpoint = 0x01,
1948 1966
1949 .rc_interval = 100, 1967 .rc.legacy = {
1950 .rc_key_map = ir_codes_d680_dmb_table, 1968 .rc_interval = 100,
1951 .rc_key_map_size = ARRAY_SIZE(ir_codes_d680_dmb_table), 1969 .rc_key_map = ir_codes_d680_dmb_table,
1952 .rc_query = cxusb_d680_dmb_rc_query, 1970 .rc_key_map_size = ARRAY_SIZE(ir_codes_d680_dmb_table),
1971 .rc_query = cxusb_d680_dmb_rc_query,
1972 },
1953 1973
1954 .num_device_descs = 1, 1974 .num_device_descs = 1,
1955 .devices = { 1975 .devices = {
diff --git a/drivers/media/dvb/dvb-usb/dib0700.h b/drivers/media/dvb/dvb-usb/dib0700.h
index 83fc24a6c31a..c2c9d236ec7e 100644
--- a/drivers/media/dvb/dvb-usb/dib0700.h
+++ b/drivers/media/dvb/dvb-usb/dib0700.h
@@ -60,6 +60,7 @@ extern int dib0700_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff);
60extern struct i2c_algorithm dib0700_i2c_algo; 60extern struct i2c_algorithm dib0700_i2c_algo;
61extern int dib0700_identify_state(struct usb_device *udev, struct dvb_usb_device_properties *props, 61extern int dib0700_identify_state(struct usb_device *udev, struct dvb_usb_device_properties *props,
62 struct dvb_usb_device_description **desc, int *cold); 62 struct dvb_usb_device_description **desc, int *cold);
63extern int dib0700_change_protocol(void *priv, u64 ir_type);
63 64
64extern int dib0700_device_count; 65extern int dib0700_device_count;
65extern int dvb_usb_dib0700_ir_proto; 66extern int dvb_usb_dib0700_ir_proto;
diff --git a/drivers/media/dvb/dvb-usb/dib0700_core.c b/drivers/media/dvb/dvb-usb/dib0700_core.c
index 4f961d2d1817..fe818348b8a3 100644
--- a/drivers/media/dvb/dvb-usb/dib0700_core.c
+++ b/drivers/media/dvb/dvb-usb/dib0700_core.c
@@ -13,10 +13,6 @@ int dvb_usb_dib0700_debug;
13module_param_named(debug,dvb_usb_dib0700_debug, int, 0644); 13module_param_named(debug,dvb_usb_dib0700_debug, int, 0644);
14MODULE_PARM_DESC(debug, "set debugging level (1=info,2=fw,4=fwdata,8=data (or-able))." DVB_USB_DEBUG_STATUS); 14MODULE_PARM_DESC(debug, "set debugging level (1=info,2=fw,4=fwdata,8=data (or-able))." DVB_USB_DEBUG_STATUS);
15 15
16int dvb_usb_dib0700_ir_proto = 1;
17module_param(dvb_usb_dib0700_ir_proto, int, 0644);
18MODULE_PARM_DESC(dvb_usb_dib0700_ir_proto, "set ir protocol (0=NEC, 1=RC5 (default), 2=RC6).");
19
20static int nb_packet_buffer_size = 21; 16static int nb_packet_buffer_size = 21;
21module_param(nb_packet_buffer_size, int, 0644); 17module_param(nb_packet_buffer_size, int, 0644);
22MODULE_PARM_DESC(nb_packet_buffer_size, 18MODULE_PARM_DESC(nb_packet_buffer_size,
@@ -53,7 +49,7 @@ static int dib0700_ctrl_wr(struct dvb_usb_device *d, u8 *tx, u8 txlen)
53 int status; 49 int status;
54 50
55 deb_data(">>> "); 51 deb_data(">>> ");
56 debug_dump(tx,txlen,deb_data); 52 debug_dump(tx, txlen, deb_data);
57 53
58 status = usb_control_msg(d->udev, usb_sndctrlpipe(d->udev,0), 54 status = usb_control_msg(d->udev, usb_sndctrlpipe(d->udev,0),
59 tx[0], USB_TYPE_VENDOR | USB_DIR_OUT, 0, 0, tx, txlen, 55 tx[0], USB_TYPE_VENDOR | USB_DIR_OUT, 0, 0, tx, txlen,
@@ -98,7 +94,7 @@ int dib0700_ctrl_rd(struct dvb_usb_device *d, u8 *tx, u8 txlen, u8 *rx, u8 rxlen
98 deb_info("ep 0 read error (status = %d)\n",status); 94 deb_info("ep 0 read error (status = %d)\n",status);
99 95
100 deb_data("<<< "); 96 deb_data("<<< ");
101 debug_dump(rx,rxlen,deb_data); 97 debug_dump(rx, rxlen, deb_data);
102 98
103 return status; /* length in case of success */ 99 return status; /* length in case of success */
104} 100}
@@ -106,28 +102,29 @@ int dib0700_ctrl_rd(struct dvb_usb_device *d, u8 *tx, u8 txlen, u8 *rx, u8 rxlen
106int dib0700_set_gpio(struct dvb_usb_device *d, enum dib07x0_gpios gpio, u8 gpio_dir, u8 gpio_val) 102int dib0700_set_gpio(struct dvb_usb_device *d, enum dib07x0_gpios gpio, u8 gpio_dir, u8 gpio_val)
107{ 103{
108 u8 buf[3] = { REQUEST_SET_GPIO, gpio, ((gpio_dir & 0x01) << 7) | ((gpio_val & 0x01) << 6) }; 104 u8 buf[3] = { REQUEST_SET_GPIO, gpio, ((gpio_dir & 0x01) << 7) | ((gpio_val & 0x01) << 6) };
109 return dib0700_ctrl_wr(d,buf,3); 105 return dib0700_ctrl_wr(d, buf, sizeof(buf));
110} 106}
111 107
112static int dib0700_set_usb_xfer_len(struct dvb_usb_device *d, u16 nb_ts_packets) 108static int dib0700_set_usb_xfer_len(struct dvb_usb_device *d, u16 nb_ts_packets)
113{ 109{
114 struct dib0700_state *st = d->priv; 110 struct dib0700_state *st = d->priv;
115 u8 b[3]; 111 u8 b[3];
116 int ret; 112 int ret;
117 113
118 if (st->fw_version >= 0x10201) { 114 if (st->fw_version >= 0x10201) {
119 b[0] = REQUEST_SET_USB_XFER_LEN; 115 b[0] = REQUEST_SET_USB_XFER_LEN;
120 b[1] = (nb_ts_packets >> 8)&0xff; 116 b[1] = (nb_ts_packets >> 8) & 0xff;
121 b[2] = nb_ts_packets & 0xff; 117 b[2] = nb_ts_packets & 0xff;
122 118
123 deb_info("set the USB xfer len to %i Ts packet\n", nb_ts_packets); 119 deb_info("set the USB xfer len to %i Ts packet\n", nb_ts_packets);
124 120
125 ret = dib0700_ctrl_wr(d, b, 3); 121 ret = dib0700_ctrl_wr(d, b, sizeof(b));
126 } else { 122 } else {
127 deb_info("this firmware does not allow to change the USB xfer len\n"); 123 deb_info("this firmware does not allow to change the USB xfer len\n");
128 ret = -EIO; 124 ret = -EIO;
129 } 125 }
130 return ret; 126
127 return ret;
131} 128}
132 129
133/* 130/*
@@ -178,7 +175,8 @@ static int dib0700_i2c_xfer_new(struct i2c_adapter *adap, struct i2c_msg *msg,
178 value = ((en_start << 7) | (en_stop << 6) | 175 value = ((en_start << 7) | (en_stop << 6) |
179 (msg[i].len & 0x3F)) << 8 | i2c_dest; 176 (msg[i].len & 0x3F)) << 8 | i2c_dest;
180 /* I2C ctrl + FE bus; */ 177 /* I2C ctrl + FE bus; */
181 index = ((gen_mode<<6)&0xC0) | ((bus_mode<<4)&0x30); 178 index = ((gen_mode << 6) & 0xC0) |
179 ((bus_mode << 4) & 0x30);
182 180
183 result = usb_control_msg(d->udev, 181 result = usb_control_msg(d->udev,
184 usb_rcvctrlpipe(d->udev, 0), 182 usb_rcvctrlpipe(d->udev, 0),
@@ -198,11 +196,12 @@ static int dib0700_i2c_xfer_new(struct i2c_adapter *adap, struct i2c_msg *msg,
198 } else { 196 } else {
199 /* Write request */ 197 /* Write request */
200 buf[0] = REQUEST_NEW_I2C_WRITE; 198 buf[0] = REQUEST_NEW_I2C_WRITE;
201 buf[1] = (msg[i].addr << 1); 199 buf[1] = msg[i].addr << 1;
202 buf[2] = (en_start << 7) | (en_stop << 6) | 200 buf[2] = (en_start << 7) | (en_stop << 6) |
203 (msg[i].len & 0x3F); 201 (msg[i].len & 0x3F);
204 /* I2C ctrl + FE bus; */ 202 /* I2C ctrl + FE bus; */
205 buf[3] = ((gen_mode<<6)&0xC0) | ((bus_mode<<4)&0x30); 203 buf[3] = ((gen_mode << 6) & 0xC0) |
204 ((bus_mode << 4) & 0x30);
206 /* The Actual i2c payload */ 205 /* The Actual i2c payload */
207 memcpy(&buf[4], msg[i].buf, msg[i].len); 206 memcpy(&buf[4], msg[i].buf, msg[i].len);
208 207
@@ -240,7 +239,7 @@ static int dib0700_i2c_xfer_legacy(struct i2c_adapter *adap,
240 239
241 for (i = 0; i < num; i++) { 240 for (i = 0; i < num; i++) {
242 /* fill in the address */ 241 /* fill in the address */
243 buf[1] = (msg[i].addr << 1); 242 buf[1] = msg[i].addr << 1;
244 /* fill the buffer */ 243 /* fill the buffer */
245 memcpy(&buf[2], msg[i].buf, msg[i].len); 244 memcpy(&buf[2], msg[i].buf, msg[i].len);
246 245
@@ -368,7 +367,8 @@ int dib0700_download_firmware(struct usb_device *udev, const struct firmware *fw
368 u8 buf[260]; 367 u8 buf[260];
369 368
370 while ((ret = dvb_usb_get_hexline(fw, &hx, &pos)) > 0) { 369 while ((ret = dvb_usb_get_hexline(fw, &hx, &pos)) > 0) {
371 deb_fwdata("writing to address 0x%08x (buffer: 0x%02x %02x)\n",hx.addr, hx.len, hx.chk); 370 deb_fwdata("writing to address 0x%08x (buffer: 0x%02x %02x)\n",
371 hx.addr, hx.len, hx.chk);
372 372
373 buf[0] = hx.len; 373 buf[0] = hx.len;
374 buf[1] = (hx.addr >> 8) & 0xff; 374 buf[1] = (hx.addr >> 8) & 0xff;
@@ -408,16 +408,16 @@ int dib0700_download_firmware(struct usb_device *udev, const struct firmware *fw
408 REQUEST_GET_VERSION, 408 REQUEST_GET_VERSION,
409 USB_TYPE_VENDOR | USB_DIR_IN, 0, 0, 409 USB_TYPE_VENDOR | USB_DIR_IN, 0, 0,
410 b, sizeof(b), USB_CTRL_GET_TIMEOUT); 410 b, sizeof(b), USB_CTRL_GET_TIMEOUT);
411 fw_version = (b[8] << 24) | (b[9] << 16) | (b[10] << 8) | b[11]; 411 fw_version = (b[8] << 24) | (b[9] << 16) | (b[10] << 8) | b[11];
412 412
413 /* set the buffer size - DVB-USB is allocating URB buffers 413 /* set the buffer size - DVB-USB is allocating URB buffers
414 * only after the firwmare download was successful */ 414 * only after the firwmare download was successful */
415 for (i = 0; i < dib0700_device_count; i++) { 415 for (i = 0; i < dib0700_device_count; i++) {
416 for (adap_num = 0; adap_num < dib0700_devices[i].num_adapters; 416 for (adap_num = 0; adap_num < dib0700_devices[i].num_adapters;
417 adap_num++) { 417 adap_num++) {
418 if (fw_version >= 0x10201) 418 if (fw_version >= 0x10201) {
419 dib0700_devices[i].adapter[adap_num].stream.u.bulk.buffersize = 188*nb_packet_buffer_size; 419 dib0700_devices[i].adapter[adap_num].stream.u.bulk.buffersize = 188*nb_packet_buffer_size;
420 else { 420 } else {
421 /* for fw version older than 1.20.1, 421 /* for fw version older than 1.20.1,
422 * the buffersize has to be n times 512 */ 422 * the buffersize has to be n times 512 */
423 dib0700_devices[i].adapter[adap_num].stream.u.bulk.buffersize = ((188*nb_packet_buffer_size+188/2)/512)*512; 423 dib0700_devices[i].adapter[adap_num].stream.u.bulk.buffersize = ((188*nb_packet_buffer_size+188/2)/512)*512;
@@ -453,7 +453,7 @@ int dib0700_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
453 if (st->disable_streaming_master_mode == 1) 453 if (st->disable_streaming_master_mode == 1)
454 b[2] = 0x00; 454 b[2] = 0x00;
455 else 455 else
456 b[2] = (0x01 << 4); /* Master mode */ 456 b[2] = 0x01 << 4; /* Master mode */
457 457
458 b[3] = 0x00; 458 b[3] = 0x00;
459 459
@@ -466,11 +466,44 @@ int dib0700_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
466 466
467 b[2] |= st->channel_state; 467 b[2] |= st->channel_state;
468 468
469 deb_info("data for streaming: %x %x\n",b[1],b[2]); 469 deb_info("data for streaming: %x %x\n", b[1], b[2]);
470 470
471 return dib0700_ctrl_wr(adap->dev, b, 4); 471 return dib0700_ctrl_wr(adap->dev, b, 4);
472} 472}
473 473
474int dib0700_change_protocol(void *priv, u64 ir_type)
475{
476 struct dvb_usb_device *d = priv;
477 struct dib0700_state *st = d->priv;
478 u8 rc_setup[3] = { REQUEST_SET_RC, 0, 0 };
479 int new_proto, ret;
480
481 /* Set the IR mode */
482 if (ir_type == IR_TYPE_RC5)
483 new_proto = 1;
484 else if (ir_type == IR_TYPE_NEC)
485 new_proto = 0;
486 else if (ir_type == IR_TYPE_RC6) {
487 if (st->fw_version < 0x10200)
488 return -EINVAL;
489
490 new_proto = 2;
491 } else
492 return -EINVAL;
493
494 rc_setup[1] = new_proto;
495
496 ret = dib0700_ctrl_wr(d, rc_setup, sizeof(rc_setup));
497 if (ret < 0) {
498 err("ir protocol setup failed");
499 return ret;
500 }
501
502 d->props.rc.core.protocol = ir_type;
503
504 return ret;
505}
506
474/* Number of keypresses to ignore before start repeating */ 507/* Number of keypresses to ignore before start repeating */
475#define RC_REPEAT_DELAY_V1_20 10 508#define RC_REPEAT_DELAY_V1_20 10
476 509
@@ -478,7 +511,13 @@ int dib0700_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
478struct dib0700_rc_response { 511struct dib0700_rc_response {
479 u8 report_id; 512 u8 report_id;
480 u8 data_state; 513 u8 data_state;
481 u16 system; 514 union {
515 u16 system16;
516 struct {
517 u8 system;
518 u8 not_system;
519 };
520 };
482 u8 data; 521 u8 data;
483 u8 not_data; 522 u8 not_data;
484}; 523};
@@ -487,14 +526,10 @@ struct dib0700_rc_response {
487static void dib0700_rc_urb_completion(struct urb *purb) 526static void dib0700_rc_urb_completion(struct urb *purb)
488{ 527{
489 struct dvb_usb_device *d = purb->context; 528 struct dvb_usb_device *d = purb->context;
490 struct dvb_usb_rc_key *keymap;
491 struct dib0700_state *st; 529 struct dib0700_state *st;
492 struct dib0700_rc_response poll_reply; 530 struct dib0700_rc_response *poll_reply;
493 u8 *buf; 531 u32 uninitialized_var(keycode);
494 int found = 0; 532 u8 toggle;
495 u32 event;
496 int state;
497 int i;
498 533
499 deb_info("%s()\n", __func__); 534 deb_info("%s()\n", __func__);
500 if (d == NULL) 535 if (d == NULL)
@@ -506,9 +541,8 @@ static void dib0700_rc_urb_completion(struct urb *purb)
506 return; 541 return;
507 } 542 }
508 543
509 keymap = d->props.rc_key_map;
510 st = d->priv; 544 st = d->priv;
511 buf = (u8 *)purb->transfer_buffer; 545 poll_reply = purb->transfer_buffer;
512 546
513 if (purb->status < 0) { 547 if (purb->status < 0) {
514 deb_info("discontinuing polling\n"); 548 deb_info("discontinuing polling\n");
@@ -521,104 +555,52 @@ static void dib0700_rc_urb_completion(struct urb *purb)
521 goto resubmit; 555 goto resubmit;
522 } 556 }
523 557
524 /* Set initial results in case we exit the function early */ 558 deb_data("IR ID = %02X state = %02X System = %02X %02X Cmd = %02X %02X (len %d)\n",
525 event = 0; 559 poll_reply->report_id, poll_reply->data_state,
526 state = REMOTE_NO_KEY_PRESSED; 560 poll_reply->system, poll_reply->not_system,
527 561 poll_reply->data, poll_reply->not_data,
528 deb_data("IR raw %02X %02X %02X %02X %02X %02X (len %d)\n", buf[0], 562 purb->actual_length);
529 buf[1], buf[2], buf[3], buf[4], buf[5], purb->actual_length);
530 563
531 switch (dvb_usb_dib0700_ir_proto) { 564 switch (d->props.rc.core.protocol) {
532 case 0: 565 case IR_TYPE_NEC:
533 /* NEC Protocol */ 566 toggle = 0;
534 poll_reply.report_id = 0;
535 poll_reply.data_state = 1;
536 poll_reply.system = buf[2];
537 poll_reply.data = buf[4];
538 poll_reply.not_data = buf[5];
539 567
540 /* NEC protocol sends repeat code as 0 0 0 FF */ 568 /* NEC protocol sends repeat code as 0 0 0 FF */
541 if ((poll_reply.system == 0x00) && (poll_reply.data == 0x00) 569 if ((poll_reply->system == 0x00) && (poll_reply->data == 0x00)
542 && (poll_reply.not_data == 0xff)) { 570 && (poll_reply->not_data == 0xff)) {
543 poll_reply.data_state = 2; 571 poll_reply->data_state = 2;
544 break; 572 break;
545 } 573 }
574
575 if ((poll_reply->system ^ poll_reply->not_system) != 0xff) {
576 deb_data("NEC extended protocol\n");
577 /* NEC extended code - 24 bits */
578 keycode = poll_reply->system16 << 8 | poll_reply->data;
579 } else {
580 deb_data("NEC normal protocol\n");
581 /* normal NEC code - 16 bits */
582 keycode = poll_reply->system << 8 | poll_reply->data;
583 }
584
546 break; 585 break;
547 default: 586 default:
587 deb_data("RC5 protocol\n");
548 /* RC5 Protocol */ 588 /* RC5 Protocol */
549 poll_reply.report_id = buf[0]; 589 toggle = poll_reply->report_id;
550 poll_reply.data_state = buf[1]; 590 keycode = poll_reply->system16 << 8 | poll_reply->data;
551 poll_reply.system = (buf[2] << 8) | buf[3]; 591
552 poll_reply.data = buf[4];
553 poll_reply.not_data = buf[5];
554 break; 592 break;
555 } 593 }
556 594
557 if ((poll_reply.data + poll_reply.not_data) != 0xff) { 595 if ((poll_reply->data + poll_reply->not_data) != 0xff) {
558 /* Key failed integrity check */ 596 /* Key failed integrity check */
559 err("key failed integrity check: %04x %02x %02x", 597 err("key failed integrity check: %04x %02x %02x",
560 poll_reply.system, 598 poll_reply->system,
561 poll_reply.data, poll_reply.not_data); 599 poll_reply->data, poll_reply->not_data);
562 goto resubmit;
563 }
564
565 deb_data("rid=%02x ds=%02x sm=%04x d=%02x nd=%02x\n",
566 poll_reply.report_id, poll_reply.data_state,
567 poll_reply.system, poll_reply.data, poll_reply.not_data);
568
569 /* Find the key in the map */
570 for (i = 0; i < d->props.rc_key_map_size; i++) {
571 if (rc5_custom(&keymap[i]) == (poll_reply.system & 0xff) &&
572 rc5_data(&keymap[i]) == poll_reply.data) {
573 event = keymap[i].event;
574 found = 1;
575 break;
576 }
577 }
578
579 if (found == 0) {
580 err("Unknown remote controller key: %04x %02x %02x",
581 poll_reply.system, poll_reply.data, poll_reply.not_data);
582 d->last_event = 0;
583 goto resubmit; 600 goto resubmit;
584 } 601 }
585 602
586 if (poll_reply.data_state == 1) { 603 ir_keydown(d->rc_input_dev, keycode, toggle);
587 /* New key hit */
588 st->rc_counter = 0;
589 event = keymap[i].event;
590 state = REMOTE_KEY_PRESSED;
591 d->last_event = keymap[i].event;
592 } else if (poll_reply.data_state == 2) {
593 /* Key repeated */
594 st->rc_counter++;
595
596 /* prevents unwanted double hits */
597 if (st->rc_counter > RC_REPEAT_DELAY_V1_20) {
598 event = d->last_event;
599 state = REMOTE_KEY_PRESSED;
600 st->rc_counter = RC_REPEAT_DELAY_V1_20;
601 }
602 } else {
603 err("Unknown data state [%d]", poll_reply.data_state);
604 }
605
606 switch (state) {
607 case REMOTE_NO_KEY_PRESSED:
608 break;
609 case REMOTE_KEY_PRESSED:
610 deb_info("key pressed\n");
611 d->last_event = event;
612 case REMOTE_KEY_REPEAT:
613 deb_info("key repeated\n");
614 input_event(d->rc_input_dev, EV_KEY, event, 1);
615 input_sync(d->rc_input_dev);
616 input_event(d->rc_input_dev, EV_KEY, d->last_event, 0);
617 input_sync(d->rc_input_dev);
618 break;
619 default:
620 break;
621 }
622 604
623resubmit: 605resubmit:
624 /* Clean the buffer before we requeue */ 606 /* Clean the buffer before we requeue */
@@ -631,21 +613,10 @@ resubmit:
631int dib0700_rc_setup(struct dvb_usb_device *d) 613int dib0700_rc_setup(struct dvb_usb_device *d)
632{ 614{
633 struct dib0700_state *st = d->priv; 615 struct dib0700_state *st = d->priv;
634 u8 rc_setup[3] = {REQUEST_SET_RC, dvb_usb_dib0700_ir_proto, 0};
635 struct urb *purb; 616 struct urb *purb;
636 int ret; 617 int ret;
637 int i;
638
639 if (d->props.rc_key_map == NULL)
640 return 0;
641
642 /* Set the IR mode */
643 i = dib0700_ctrl_wr(d, rc_setup, 3);
644 if (i<0) {
645 err("ir protocol setup failed");
646 return -1;
647 }
648 618
619 /* Poll-based. Don't initialize bulk mode */
649 if (st->fw_version < 0x10200) 620 if (st->fw_version < 0x10200)
650 return 0; 621 return 0;
651 622
@@ -653,14 +624,14 @@ int dib0700_rc_setup(struct dvb_usb_device *d)
653 purb = usb_alloc_urb(0, GFP_KERNEL); 624 purb = usb_alloc_urb(0, GFP_KERNEL);
654 if (purb == NULL) { 625 if (purb == NULL) {
655 err("rc usb alloc urb failed\n"); 626 err("rc usb alloc urb failed\n");
656 return -1; 627 return -ENOMEM;
657 } 628 }
658 629
659 purb->transfer_buffer = kzalloc(RC_MSG_SIZE_V1_20, GFP_KERNEL); 630 purb->transfer_buffer = kzalloc(RC_MSG_SIZE_V1_20, GFP_KERNEL);
660 if (purb->transfer_buffer == NULL) { 631 if (purb->transfer_buffer == NULL) {
661 err("rc kzalloc failed\n"); 632 err("rc kzalloc failed\n");
662 usb_free_urb(purb); 633 usb_free_urb(purb);
663 return -1; 634 return -ENOMEM;
664 } 635 }
665 636
666 purb->status = -EINPROGRESS; 637 purb->status = -EINPROGRESS;
@@ -669,12 +640,10 @@ int dib0700_rc_setup(struct dvb_usb_device *d)
669 dib0700_rc_urb_completion, d); 640 dib0700_rc_urb_completion, d);
670 641
671 ret = usb_submit_urb(purb, GFP_ATOMIC); 642 ret = usb_submit_urb(purb, GFP_ATOMIC);
672 if (ret != 0) { 643 if (ret)
673 err("rc submit urb failed\n"); 644 err("rc submit urb failed\n");
674 return -1;
675 }
676 645
677 return 0; 646 return ret;
678} 647}
679 648
680static int dib0700_probe(struct usb_interface *intf, 649static int dib0700_probe(struct usb_interface *intf,
@@ -698,6 +667,15 @@ static int dib0700_probe(struct usb_interface *intf,
698 st->fw_version = fw_version; 667 st->fw_version = fw_version;
699 st->nb_packet_buffer_size = (u32)nb_packet_buffer_size; 668 st->nb_packet_buffer_size = (u32)nb_packet_buffer_size;
700 669
670 /* Disable polling mode on newer firmwares */
671 if (st->fw_version >= 0x10200)
672 dev->props.rc.core.bulk_mode = true;
673 else
674 dev->props.rc.core.bulk_mode = false;
675
676 /* Need a higher delay, to avoid wrong repeat */
677 dev->rc_input_dev->rep[REP_DELAY] = 500;
678
701 dib0700_rc_setup(dev); 679 dib0700_rc_setup(dev);
702 680
703 return 0; 681 return 0;
diff --git a/drivers/media/dvb/dvb-usb/dib0700_devices.c b/drivers/media/dvb/dvb-usb/dib0700_devices.c
index 800800a9649e..f634d2e784b2 100644
--- a/drivers/media/dvb/dvb-usb/dib0700_devices.c
+++ b/drivers/media/dvb/dvb-usb/dib0700_devices.c
@@ -473,16 +473,19 @@ static u8 rc_request[] = { REQUEST_POLL_RC, 0 };
473/* Number of keypresses to ignore before start repeating */ 473/* Number of keypresses to ignore before start repeating */
474#define RC_REPEAT_DELAY 6 474#define RC_REPEAT_DELAY 6
475 475
476static int dib0700_rc_query(struct dvb_usb_device *d, u32 *event, int *state) 476/*
477 * This function is used only when firmware is < 1.20 version. Newer
478 * firmwares use bulk mode, with functions implemented at dib0700_core,
479 * at dib0700_rc_urb_completion()
480 */
481static int dib0700_rc_query_old_firmware(struct dvb_usb_device *d)
477{ 482{
478 u8 key[4]; 483 u8 key[4];
484 u32 keycode;
485 u8 toggle;
479 int i; 486 int i;
480 struct dvb_usb_rc_key *keymap = d->props.rc_key_map;
481 struct dib0700_state *st = d->priv; 487 struct dib0700_state *st = d->priv;
482 488
483 *event = 0;
484 *state = REMOTE_NO_KEY_PRESSED;
485
486 if (st->fw_version >= 0x10200) { 489 if (st->fw_version >= 0x10200) {
487 /* For 1.20 firmware , We need to keep the RC polling 490 /* For 1.20 firmware , We need to keep the RC polling
488 callback so we can reuse the input device setup in 491 callback so we can reuse the input device setup in
@@ -491,348 +494,45 @@ static int dib0700_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
491 return 0; 494 return 0;
492 } 495 }
493 496
494 i=dib0700_ctrl_rd(d,rc_request,2,key,4); 497 i = dib0700_ctrl_rd(d, rc_request, 2, key, 4);
495 if (i<=0) { 498 if (i <= 0) {
496 err("RC Query Failed"); 499 err("RC Query Failed");
497 return -1; 500 return -1;
498 } 501 }
499 502
500 /* losing half of KEY_0 events from Philipps rc5 remotes.. */ 503 /* losing half of KEY_0 events from Philipps rc5 remotes.. */
501 if (key[0]==0 && key[1]==0 && key[2]==0 && key[3]==0) return 0; 504 if (key[0] == 0 && key[1] == 0 && key[2] == 0 && key[3] == 0)
505 return 0;
502 506
503 /* info("%d: %2X %2X %2X %2X",dvb_usb_dib0700_ir_proto,(int)key[3-2],(int)key[3-3],(int)key[3-1],(int)key[3]); */ 507 /* info("%d: %2X %2X %2X %2X",dvb_usb_dib0700_ir_proto,(int)key[3-2],(int)key[3-3],(int)key[3-1],(int)key[3]); */
504 508
505 dib0700_rc_setup(d); /* reset ir sensor data to prevent false events */ 509 dib0700_rc_setup(d); /* reset ir sensor data to prevent false events */
506 510
507 switch (dvb_usb_dib0700_ir_proto) { 511 d->last_event = 0;
508 case 0: { 512 switch (d->props.rc.core.protocol) {
513 case IR_TYPE_NEC:
509 /* NEC protocol sends repeat code as 0 0 0 FF */ 514 /* NEC protocol sends repeat code as 0 0 0 FF */
510 if ((key[3-2] == 0x00) && (key[3-3] == 0x00) && 515 if ((key[3-2] == 0x00) && (key[3-3] == 0x00) &&
511 (key[3] == 0xFF)) { 516 (key[3] == 0xff))
512 st->rc_counter++; 517 keycode = d->last_event;
513 if (st->rc_counter > RC_REPEAT_DELAY) { 518 else {
514 *event = d->last_event; 519 keycode = key[3-2] << 8 | key[3-3];
515 *state = REMOTE_KEY_PRESSED; 520 d->last_event = keycode;
516 st->rc_counter = RC_REPEAT_DELAY;
517 }
518 return 0;
519 }
520 for (i=0;i<d->props.rc_key_map_size; i++) {
521 if (rc5_custom(&keymap[i]) == key[3-2] &&
522 rc5_data(&keymap[i]) == key[3-3]) {
523 st->rc_counter = 0;
524 *event = keymap[i].event;
525 *state = REMOTE_KEY_PRESSED;
526 d->last_event = keymap[i].event;
527 return 0;
528 }
529 } 521 }
522
523 ir_keydown(d->rc_input_dev, keycode, 0);
530 break; 524 break;
531 } 525 default:
532 default: {
533 /* RC-5 protocol changes toggle bit on new keypress */ 526 /* RC-5 protocol changes toggle bit on new keypress */
534 for (i = 0; i < d->props.rc_key_map_size; i++) { 527 keycode = key[3-2] << 8 | key[3-3];
535 if (rc5_custom(&keymap[i]) == key[3-2] && 528 toggle = key[3-1];
536 rc5_data(&keymap[i]) == key[3-3]) { 529 ir_keydown(d->rc_input_dev, keycode, toggle);
537 if (d->last_event == keymap[i].event && 530
538 key[3-1] == st->rc_toggle) {
539 st->rc_counter++;
540 /* prevents unwanted double hits */
541 if (st->rc_counter > RC_REPEAT_DELAY) {
542 *event = d->last_event;
543 *state = REMOTE_KEY_PRESSED;
544 st->rc_counter = RC_REPEAT_DELAY;
545 }
546
547 return 0;
548 }
549 st->rc_counter = 0;
550 *event = keymap[i].event;
551 *state = REMOTE_KEY_PRESSED;
552 st->rc_toggle = key[3-1];
553 d->last_event = keymap[i].event;
554 return 0;
555 }
556 }
557 break; 531 break;
558 } 532 }
559 }
560 err("Unknown remote controller key: %2X %2X %2X %2X", (int) key[3-2], (int) key[3-3], (int) key[3-1], (int) key[3]);
561 d->last_event = 0;
562 return 0; 533 return 0;
563} 534}
564 535
565static struct dvb_usb_rc_key ir_codes_dib0700_table[] = {
566 /* Key codes for the tiny Pinnacle remote*/
567 { 0x0700, KEY_MUTE },
568 { 0x0701, KEY_MENU }, /* Pinnacle logo */
569 { 0x0739, KEY_POWER },
570 { 0x0703, KEY_VOLUMEUP },
571 { 0x0709, KEY_VOLUMEDOWN },
572 { 0x0706, KEY_CHANNELUP },
573 { 0x070c, KEY_CHANNELDOWN },
574 { 0x070f, KEY_1 },
575 { 0x0715, KEY_2 },
576 { 0x0710, KEY_3 },
577 { 0x0718, KEY_4 },
578 { 0x071b, KEY_5 },
579 { 0x071e, KEY_6 },
580 { 0x0711, KEY_7 },
581 { 0x0721, KEY_8 },
582 { 0x0712, KEY_9 },
583 { 0x0727, KEY_0 },
584 { 0x0724, KEY_SCREEN }, /* 'Square' key */
585 { 0x072a, KEY_TEXT }, /* 'T' key */
586 { 0x072d, KEY_REWIND },
587 { 0x0730, KEY_PLAY },
588 { 0x0733, KEY_FASTFORWARD },
589 { 0x0736, KEY_RECORD },
590 { 0x073c, KEY_STOP },
591 { 0x073f, KEY_CANCEL }, /* '?' key */
592 /* Key codes for the Terratec Cinergy DT XS Diversity, similar to cinergyT2.c */
593 { 0xeb01, KEY_POWER },
594 { 0xeb02, KEY_1 },
595 { 0xeb03, KEY_2 },
596 { 0xeb04, KEY_3 },
597 { 0xeb05, KEY_4 },
598 { 0xeb06, KEY_5 },
599 { 0xeb07, KEY_6 },
600 { 0xeb08, KEY_7 },
601 { 0xeb09, KEY_8 },
602 { 0xeb0a, KEY_9 },
603 { 0xeb0b, KEY_VIDEO },
604 { 0xeb0c, KEY_0 },
605 { 0xeb0d, KEY_REFRESH },
606 { 0xeb0f, KEY_EPG },
607 { 0xeb10, KEY_UP },
608 { 0xeb11, KEY_LEFT },
609 { 0xeb12, KEY_OK },
610 { 0xeb13, KEY_RIGHT },
611 { 0xeb14, KEY_DOWN },
612 { 0xeb16, KEY_INFO },
613 { 0xeb17, KEY_RED },
614 { 0xeb18, KEY_GREEN },
615 { 0xeb19, KEY_YELLOW },
616 { 0xeb1a, KEY_BLUE },
617 { 0xeb1b, KEY_CHANNELUP },
618 { 0xeb1c, KEY_VOLUMEUP },
619 { 0xeb1d, KEY_MUTE },
620 { 0xeb1e, KEY_VOLUMEDOWN },
621 { 0xeb1f, KEY_CHANNELDOWN },
622 { 0xeb40, KEY_PAUSE },
623 { 0xeb41, KEY_HOME },
624 { 0xeb42, KEY_MENU }, /* DVD Menu */
625 { 0xeb43, KEY_SUBTITLE },
626 { 0xeb44, KEY_TEXT }, /* Teletext */
627 { 0xeb45, KEY_DELETE },
628 { 0xeb46, KEY_TV },
629 { 0xeb47, KEY_DVD },
630 { 0xeb48, KEY_STOP },
631 { 0xeb49, KEY_VIDEO },
632 { 0xeb4a, KEY_AUDIO }, /* Music */
633 { 0xeb4b, KEY_SCREEN }, /* Pic */
634 { 0xeb4c, KEY_PLAY },
635 { 0xeb4d, KEY_BACK },
636 { 0xeb4e, KEY_REWIND },
637 { 0xeb4f, KEY_FASTFORWARD },
638 { 0xeb54, KEY_PREVIOUS },
639 { 0xeb58, KEY_RECORD },
640 { 0xeb5c, KEY_NEXT },
641
642 /* Key codes for the Haupauge WinTV Nova-TD, copied from nova-t-usb2.c (Nova-T USB2) */
643 { 0x1e00, KEY_0 },
644 { 0x1e01, KEY_1 },
645 { 0x1e02, KEY_2 },
646 { 0x1e03, KEY_3 },
647 { 0x1e04, KEY_4 },
648 { 0x1e05, KEY_5 },
649 { 0x1e06, KEY_6 },
650 { 0x1e07, KEY_7 },
651 { 0x1e08, KEY_8 },
652 { 0x1e09, KEY_9 },
653 { 0x1e0a, KEY_KPASTERISK },
654 { 0x1e0b, KEY_RED },
655 { 0x1e0c, KEY_RADIO },
656 { 0x1e0d, KEY_MENU },
657 { 0x1e0e, KEY_GRAVE }, /* # */
658 { 0x1e0f, KEY_MUTE },
659 { 0x1e10, KEY_VOLUMEUP },
660 { 0x1e11, KEY_VOLUMEDOWN },
661 { 0x1e12, KEY_CHANNEL },
662 { 0x1e14, KEY_UP },
663 { 0x1e15, KEY_DOWN },
664 { 0x1e16, KEY_LEFT },
665 { 0x1e17, KEY_RIGHT },
666 { 0x1e18, KEY_VIDEO },
667 { 0x1e19, KEY_AUDIO },
668 { 0x1e1a, KEY_MEDIA },
669 { 0x1e1b, KEY_EPG },
670 { 0x1e1c, KEY_TV },
671 { 0x1e1e, KEY_NEXT },
672 { 0x1e1f, KEY_BACK },
673 { 0x1e20, KEY_CHANNELUP },
674 { 0x1e21, KEY_CHANNELDOWN },
675 { 0x1e24, KEY_LAST }, /* Skip backwards */
676 { 0x1e25, KEY_OK },
677 { 0x1e29, KEY_BLUE},
678 { 0x1e2e, KEY_GREEN },
679 { 0x1e30, KEY_PAUSE },
680 { 0x1e32, KEY_REWIND },
681 { 0x1e34, KEY_FASTFORWARD },
682 { 0x1e35, KEY_PLAY },
683 { 0x1e36, KEY_STOP },
684 { 0x1e37, KEY_RECORD },
685 { 0x1e38, KEY_YELLOW },
686 { 0x1e3b, KEY_GOTO },
687 { 0x1e3d, KEY_POWER },
688
689 /* Key codes for the Leadtek Winfast DTV Dongle */
690 { 0x0042, KEY_POWER },
691 { 0x077c, KEY_TUNER },
692 { 0x0f4e, KEY_PRINT }, /* PREVIEW */
693 { 0x0840, KEY_SCREEN }, /* full screen toggle*/
694 { 0x0f71, KEY_DOT }, /* frequency */
695 { 0x0743, KEY_0 },
696 { 0x0c41, KEY_1 },
697 { 0x0443, KEY_2 },
698 { 0x0b7f, KEY_3 },
699 { 0x0e41, KEY_4 },
700 { 0x0643, KEY_5 },
701 { 0x097f, KEY_6 },
702 { 0x0d7e, KEY_7 },
703 { 0x057c, KEY_8 },
704 { 0x0a40, KEY_9 },
705 { 0x0e4e, KEY_CLEAR },
706 { 0x047c, KEY_CHANNEL }, /* show channel number */
707 { 0x0f41, KEY_LAST }, /* recall */
708 { 0x0342, KEY_MUTE },
709 { 0x064c, KEY_RESERVED }, /* PIP button*/
710 { 0x0172, KEY_SHUFFLE }, /* SNAPSHOT */
711 { 0x0c4e, KEY_PLAYPAUSE }, /* TIMESHIFT */
712 { 0x0b70, KEY_RECORD },
713 { 0x037d, KEY_VOLUMEUP },
714 { 0x017d, KEY_VOLUMEDOWN },
715 { 0x0242, KEY_CHANNELUP },
716 { 0x007d, KEY_CHANNELDOWN },
717
718 /* Key codes for Nova-TD "credit card" remote control. */
719 { 0x1d00, KEY_0 },
720 { 0x1d01, KEY_1 },
721 { 0x1d02, KEY_2 },
722 { 0x1d03, KEY_3 },
723 { 0x1d04, KEY_4 },
724 { 0x1d05, KEY_5 },
725 { 0x1d06, KEY_6 },
726 { 0x1d07, KEY_7 },
727 { 0x1d08, KEY_8 },
728 { 0x1d09, KEY_9 },
729 { 0x1d0a, KEY_TEXT },
730 { 0x1d0d, KEY_MENU },
731 { 0x1d0f, KEY_MUTE },
732 { 0x1d10, KEY_VOLUMEUP },
733 { 0x1d11, KEY_VOLUMEDOWN },
734 { 0x1d12, KEY_CHANNEL },
735 { 0x1d14, KEY_UP },
736 { 0x1d15, KEY_DOWN },
737 { 0x1d16, KEY_LEFT },
738 { 0x1d17, KEY_RIGHT },
739 { 0x1d1c, KEY_TV },
740 { 0x1d1e, KEY_NEXT },
741 { 0x1d1f, KEY_BACK },
742 { 0x1d20, KEY_CHANNELUP },
743 { 0x1d21, KEY_CHANNELDOWN },
744 { 0x1d24, KEY_LAST },
745 { 0x1d25, KEY_OK },
746 { 0x1d30, KEY_PAUSE },
747 { 0x1d32, KEY_REWIND },
748 { 0x1d34, KEY_FASTFORWARD },
749 { 0x1d35, KEY_PLAY },
750 { 0x1d36, KEY_STOP },
751 { 0x1d37, KEY_RECORD },
752 { 0x1d3b, KEY_GOTO },
753 { 0x1d3d, KEY_POWER },
754
755 /* Key codes for the Pixelview SBTVD remote (proto NEC) */
756 { 0x8613, KEY_MUTE },
757 { 0x8612, KEY_POWER },
758 { 0x8601, KEY_1 },
759 { 0x8602, KEY_2 },
760 { 0x8603, KEY_3 },
761 { 0x8604, KEY_4 },
762 { 0x8605, KEY_5 },
763 { 0x8606, KEY_6 },
764 { 0x8607, KEY_7 },
765 { 0x8608, KEY_8 },
766 { 0x8609, KEY_9 },
767 { 0x8600, KEY_0 },
768 { 0x860d, KEY_CHANNELUP },
769 { 0x8619, KEY_CHANNELDOWN },
770 { 0x8610, KEY_VOLUMEUP },
771 { 0x860c, KEY_VOLUMEDOWN },
772
773 { 0x860a, KEY_CAMERA },
774 { 0x860b, KEY_ZOOM },
775 { 0x861b, KEY_BACKSPACE },
776 { 0x8615, KEY_ENTER },
777
778 { 0x861d, KEY_UP },
779 { 0x861e, KEY_DOWN },
780 { 0x860e, KEY_LEFT },
781 { 0x860f, KEY_RIGHT },
782
783 { 0x8618, KEY_RECORD },
784 { 0x861a, KEY_STOP },
785
786 /* Key codes for the EvolutePC TVWay+ remote (proto NEC) */
787 { 0x7a00, KEY_MENU },
788 { 0x7a01, KEY_RECORD },
789 { 0x7a02, KEY_PLAY },
790 { 0x7a03, KEY_STOP },
791 { 0x7a10, KEY_CHANNELUP },
792 { 0x7a11, KEY_CHANNELDOWN },
793 { 0x7a12, KEY_VOLUMEUP },
794 { 0x7a13, KEY_VOLUMEDOWN },
795 { 0x7a40, KEY_POWER },
796 { 0x7a41, KEY_MUTE },
797
798 /* Key codes for the Elgato EyeTV Diversity silver remote,
799 set dvb_usb_dib0700_ir_proto=0 */
800 { 0x4501, KEY_POWER },
801 { 0x4502, KEY_MUTE },
802 { 0x4503, KEY_1 },
803 { 0x4504, KEY_2 },
804 { 0x4505, KEY_3 },
805 { 0x4506, KEY_4 },
806 { 0x4507, KEY_5 },
807 { 0x4508, KEY_6 },
808 { 0x4509, KEY_7 },
809 { 0x450a, KEY_8 },
810 { 0x450b, KEY_9 },
811 { 0x450c, KEY_LAST },
812 { 0x450d, KEY_0 },
813 { 0x450e, KEY_ENTER },
814 { 0x450f, KEY_RED },
815 { 0x4510, KEY_CHANNELUP },
816 { 0x4511, KEY_GREEN },
817 { 0x4512, KEY_VOLUMEDOWN },
818 { 0x4513, KEY_OK },
819 { 0x4514, KEY_VOLUMEUP },
820 { 0x4515, KEY_YELLOW },
821 { 0x4516, KEY_CHANNELDOWN },
822 { 0x4517, KEY_BLUE },
823 { 0x4518, KEY_LEFT }, /* Skip backwards */
824 { 0x4519, KEY_PLAYPAUSE },
825 { 0x451a, KEY_RIGHT }, /* Skip forward */
826 { 0x451b, KEY_REWIND },
827 { 0x451c, KEY_L }, /* Live */
828 { 0x451d, KEY_FASTFORWARD },
829 { 0x451e, KEY_STOP }, /* 'Reveal' for Teletext */
830 { 0x451f, KEY_MENU }, /* KEY_TEXT for Teletext */
831 { 0x4540, KEY_RECORD }, /* Font 'Size' for Teletext */
832 { 0x4541, KEY_SCREEN }, /* Full screen toggle, 'Hold' for Teletext */
833 { 0x4542, KEY_SELECT }, /* Select video input, 'Select' for Teletext */
834};
835
836/* STK7700P: Hauppauge Nova-T Stick, AVerMedia Volar */ 536/* STK7700P: Hauppauge Nova-T Stick, AVerMedia Volar */
837static struct dibx000_agc_config stk7700p_7000m_mt2060_agc_config = { 537static struct dibx000_agc_config stk7700p_7000m_mt2060_agc_config = {
838 BAND_UHF | BAND_VHF, 538 BAND_UHF | BAND_VHF,
@@ -2168,10 +1868,17 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2168 } 1868 }
2169 }, 1869 },
2170 1870
2171 .rc_interval = DEFAULT_RC_INTERVAL, 1871 .rc.core = {
2172 .rc_key_map = ir_codes_dib0700_table, 1872 .rc_interval = DEFAULT_RC_INTERVAL,
2173 .rc_key_map_size = ARRAY_SIZE(ir_codes_dib0700_table), 1873 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
2174 .rc_query = dib0700_rc_query 1874 .rc_query = dib0700_rc_query_old_firmware,
1875 .rc_props = {
1876 .allowed_protos = IR_TYPE_RC5 |
1877 IR_TYPE_RC6 |
1878 IR_TYPE_NEC,
1879 .change_protocol = dib0700_change_protocol,
1880 },
1881 },
2175 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 1882 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
2176 1883
2177 .num_adapters = 2, 1884 .num_adapters = 2,
@@ -2197,10 +1904,17 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2197 }, 1904 },
2198 }, 1905 },
2199 1906
2200 .rc_interval = DEFAULT_RC_INTERVAL, 1907 .rc.core = {
2201 .rc_key_map = ir_codes_dib0700_table, 1908 .rc_interval = DEFAULT_RC_INTERVAL,
2202 .rc_key_map_size = ARRAY_SIZE(ir_codes_dib0700_table), 1909 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
2203 .rc_query = dib0700_rc_query 1910 .rc_query = dib0700_rc_query_old_firmware,
1911 .rc_props = {
1912 .allowed_protos = IR_TYPE_RC5 |
1913 IR_TYPE_RC6 |
1914 IR_TYPE_NEC,
1915 .change_protocol = dib0700_change_protocol,
1916 },
1917 },
2204 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 1918 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
2205 1919
2206 .num_adapters = 2, 1920 .num_adapters = 2,
@@ -2251,11 +1965,17 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2251 1965
2252 }, 1966 },
2253 1967
2254 .rc_interval = DEFAULT_RC_INTERVAL, 1968 .rc.core = {
2255 .rc_key_map = ir_codes_dib0700_table, 1969 .rc_interval = DEFAULT_RC_INTERVAL,
2256 .rc_key_map_size = ARRAY_SIZE(ir_codes_dib0700_table), 1970 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
2257 .rc_query = dib0700_rc_query 1971 .rc_query = dib0700_rc_query_old_firmware,
2258 1972 .rc_props = {
1973 .allowed_protos = IR_TYPE_RC5 |
1974 IR_TYPE_RC6 |
1975 IR_TYPE_NEC,
1976 .change_protocol = dib0700_change_protocol,
1977 },
1978 },
2259 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 1979 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
2260 1980
2261 .num_adapters = 1, 1981 .num_adapters = 1,
@@ -2288,10 +2008,18 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2288 } 2008 }
2289 }, 2009 },
2290 2010
2291 .rc_interval = DEFAULT_RC_INTERVAL, 2011 .rc.core = {
2292 .rc_key_map = ir_codes_dib0700_table, 2012 .rc_interval = DEFAULT_RC_INTERVAL,
2293 .rc_key_map_size = ARRAY_SIZE(ir_codes_dib0700_table), 2013 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
2294 .rc_query = dib0700_rc_query 2014 .module_name = "dib0700",
2015 .rc_query = dib0700_rc_query_old_firmware,
2016 .rc_props = {
2017 .allowed_protos = IR_TYPE_RC5 |
2018 IR_TYPE_RC6 |
2019 IR_TYPE_NEC,
2020 .change_protocol = dib0700_change_protocol,
2021 },
2022 },
2295 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 2023 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
2296 2024
2297 .num_adapters = 1, 2025 .num_adapters = 1,
@@ -2358,11 +2086,18 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2358 }, 2086 },
2359 }, 2087 },
2360 2088
2361 .rc_interval = DEFAULT_RC_INTERVAL, 2089 .rc.core = {
2362 .rc_key_map = ir_codes_dib0700_table, 2090 .rc_interval = DEFAULT_RC_INTERVAL,
2363 .rc_key_map_size = ARRAY_SIZE(ir_codes_dib0700_table), 2091 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
2364 .rc_query = dib0700_rc_query 2092 .module_name = "dib0700",
2365 2093 .rc_query = dib0700_rc_query_old_firmware,
2094 .rc_props = {
2095 .allowed_protos = IR_TYPE_RC5 |
2096 IR_TYPE_RC6 |
2097 IR_TYPE_NEC,
2098 .change_protocol = dib0700_change_protocol,
2099 },
2100 },
2366 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 2101 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
2367 2102
2368 .num_adapters = 1, 2103 .num_adapters = 1,
@@ -2397,11 +2132,18 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2397 }, 2132 },
2398 }, 2133 },
2399 2134
2400 .rc_interval = DEFAULT_RC_INTERVAL, 2135 .rc.core = {
2401 .rc_key_map = ir_codes_dib0700_table, 2136 .rc_interval = DEFAULT_RC_INTERVAL,
2402 .rc_key_map_size = ARRAY_SIZE(ir_codes_dib0700_table), 2137 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
2403 .rc_query = dib0700_rc_query 2138 .module_name = "dib0700",
2404 2139 .rc_query = dib0700_rc_query_old_firmware,
2140 .rc_props = {
2141 .allowed_protos = IR_TYPE_RC5 |
2142 IR_TYPE_RC6 |
2143 IR_TYPE_NEC,
2144 .change_protocol = dib0700_change_protocol,
2145 },
2146 },
2405 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 2147 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
2406 2148
2407 .num_adapters = 2, 2149 .num_adapters = 2,
@@ -2431,7 +2173,7 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2431 } 2173 }
2432 }, 2174 },
2433 2175
2434 .num_device_descs = 7, 2176 .num_device_descs = 6,
2435 .devices = { 2177 .devices = {
2436 { "DiBcom STK7070PD reference design", 2178 { "DiBcom STK7070PD reference design",
2437 { &dib0700_usb_id_table[17], NULL }, 2179 { &dib0700_usb_id_table[17], NULL },
@@ -2458,15 +2200,69 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2458 { &dib0700_usb_id_table[44], NULL }, 2200 { &dib0700_usb_id_table[44], NULL },
2459 { NULL }, 2201 { NULL },
2460 }, 2202 },
2203 },
2204
2205 .rc.core = {
2206 .rc_interval = DEFAULT_RC_INTERVAL,
2207 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
2208 .module_name = "dib0700",
2209 .rc_query = dib0700_rc_query_old_firmware,
2210 .rc_props = {
2211 .allowed_protos = IR_TYPE_RC5 |
2212 IR_TYPE_RC6 |
2213 IR_TYPE_NEC,
2214 .change_protocol = dib0700_change_protocol,
2215 },
2216 },
2217 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
2218
2219 .num_adapters = 2,
2220 .adapter = {
2221 {
2222 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
2223 .pid_filter_count = 32,
2224 .pid_filter = stk70x0p_pid_filter,
2225 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
2226 .frontend_attach = stk7070pd_frontend_attach0,
2227 .tuner_attach = dib7070p_tuner_attach,
2228
2229 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
2230
2231 .size_of_priv = sizeof(struct dib0700_adapter_state),
2232 }, {
2233 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
2234 .pid_filter_count = 32,
2235 .pid_filter = stk70x0p_pid_filter,
2236 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
2237 .frontend_attach = stk7070pd_frontend_attach1,
2238 .tuner_attach = dib7070p_tuner_attach,
2239
2240 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
2241
2242 .size_of_priv = sizeof(struct dib0700_adapter_state),
2243 }
2244 },
2245
2246 .num_device_descs = 1,
2247 .devices = {
2461 { "Elgato EyeTV Diversity", 2248 { "Elgato EyeTV Diversity",
2462 { &dib0700_usb_id_table[68], NULL }, 2249 { &dib0700_usb_id_table[68], NULL },
2463 { NULL }, 2250 { NULL },
2464 }, 2251 },
2465 }, 2252 },
2466 .rc_interval = DEFAULT_RC_INTERVAL, 2253
2467 .rc_key_map = ir_codes_dib0700_table, 2254 .rc.core = {
2468 .rc_key_map_size = ARRAY_SIZE(ir_codes_dib0700_table), 2255 .rc_interval = DEFAULT_RC_INTERVAL,
2469 .rc_query = dib0700_rc_query 2256 .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
2257 .module_name = "dib0700",
2258 .rc_query = dib0700_rc_query_old_firmware,
2259 .rc_props = {
2260 .allowed_protos = IR_TYPE_RC5 |
2261 IR_TYPE_RC6 |
2262 IR_TYPE_NEC,
2263 .change_protocol = dib0700_change_protocol,
2264 },
2265 },
2470 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 2266 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
2471 2267
2472 .num_adapters = 1, 2268 .num_adapters = 1,
@@ -2525,10 +2321,19 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2525 { NULL }, 2321 { NULL },
2526 }, 2322 },
2527 }, 2323 },
2528 .rc_interval = DEFAULT_RC_INTERVAL, 2324
2529 .rc_key_map = ir_codes_dib0700_table, 2325 .rc.core = {
2530 .rc_key_map_size = ARRAY_SIZE(ir_codes_dib0700_table), 2326 .rc_interval = DEFAULT_RC_INTERVAL,
2531 .rc_query = dib0700_rc_query 2327 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
2328 .module_name = "dib0700",
2329 .rc_query = dib0700_rc_query_old_firmware,
2330 .rc_props = {
2331 .allowed_protos = IR_TYPE_RC5 |
2332 IR_TYPE_RC6 |
2333 IR_TYPE_NEC,
2334 .change_protocol = dib0700_change_protocol,
2335 },
2336 },
2532 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 2337 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
2533 .num_adapters = 1, 2338 .num_adapters = 1,
2534 .adapter = { 2339 .adapter = {
@@ -2554,10 +2359,19 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2554 { NULL }, 2359 { NULL },
2555 }, 2360 },
2556 }, 2361 },
2557 .rc_interval = DEFAULT_RC_INTERVAL, 2362
2558 .rc_key_map = ir_codes_dib0700_table, 2363 .rc.core = {
2559 .rc_key_map_size = ARRAY_SIZE(ir_codes_dib0700_table), 2364 .rc_interval = DEFAULT_RC_INTERVAL,
2560 .rc_query = dib0700_rc_query 2365 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
2366 .module_name = "dib0700",
2367 .rc_query = dib0700_rc_query_old_firmware,
2368 .rc_props = {
2369 .allowed_protos = IR_TYPE_RC5 |
2370 IR_TYPE_RC6 |
2371 IR_TYPE_NEC,
2372 .change_protocol = dib0700_change_protocol,
2373 },
2374 },
2561 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 2375 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
2562 .num_adapters = 1, 2376 .num_adapters = 1,
2563 .adapter = { 2377 .adapter = {
@@ -2615,10 +2429,19 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2615 { NULL }, 2429 { NULL },
2616 }, 2430 },
2617 }, 2431 },
2618 .rc_interval = DEFAULT_RC_INTERVAL, 2432
2619 .rc_key_map = ir_codes_dib0700_table, 2433 .rc.core = {
2620 .rc_key_map_size = ARRAY_SIZE(ir_codes_dib0700_table), 2434 .rc_interval = DEFAULT_RC_INTERVAL,
2621 .rc_query = dib0700_rc_query 2435 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
2436 .module_name = "dib0700",
2437 .rc_query = dib0700_rc_query_old_firmware,
2438 .rc_props = {
2439 .allowed_protos = IR_TYPE_RC5 |
2440 IR_TYPE_RC6 |
2441 IR_TYPE_NEC,
2442 .change_protocol = dib0700_change_protocol,
2443 },
2444 },
2622 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 2445 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
2623 .num_adapters = 1, 2446 .num_adapters = 1,
2624 .adapter = { 2447 .adapter = {
@@ -2653,11 +2476,18 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2653 }, 2476 },
2654 }, 2477 },
2655 2478
2656 .rc_interval = DEFAULT_RC_INTERVAL, 2479 .rc.core = {
2657 .rc_key_map = ir_codes_dib0700_table, 2480 .rc_interval = DEFAULT_RC_INTERVAL,
2658 .rc_key_map_size = ARRAY_SIZE(ir_codes_dib0700_table), 2481 .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
2659 .rc_query = dib0700_rc_query 2482 .module_name = "dib0700",
2660 2483 .rc_query = dib0700_rc_query_old_firmware,
2484 .rc_props = {
2485 .allowed_protos = IR_TYPE_RC5 |
2486 IR_TYPE_RC6 |
2487 IR_TYPE_NEC,
2488 .change_protocol = dib0700_change_protocol,
2489 },
2490 },
2661 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 2491 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
2662 .num_adapters = 2, 2492 .num_adapters = 2,
2663 .adapter = { 2493 .adapter = {
@@ -2697,10 +2527,18 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2697 }, 2527 },
2698 }, 2528 },
2699 2529
2700 .rc_interval = DEFAULT_RC_INTERVAL, 2530 .rc.core = {
2701 .rc_key_map = ir_codes_dib0700_table, 2531 .rc_interval = DEFAULT_RC_INTERVAL,
2702 .rc_key_map_size = ARRAY_SIZE(ir_codes_dib0700_table), 2532 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
2703 .rc_query = dib0700_rc_query 2533 .module_name = "dib0700",
2534 .rc_query = dib0700_rc_query_old_firmware,
2535 .rc_props = {
2536 .allowed_protos = IR_TYPE_RC5 |
2537 IR_TYPE_RC6 |
2538 IR_TYPE_NEC,
2539 .change_protocol = dib0700_change_protocol,
2540 },
2541 },
2704 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, 2542 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
2705 .num_adapters = 1, 2543 .num_adapters = 1,
2706 .adapter = { 2544 .adapter = {
@@ -2728,10 +2566,18 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2728 }, 2566 },
2729 }, 2567 },
2730 2568
2731 .rc_interval = DEFAULT_RC_INTERVAL, 2569 .rc.core = {
2732 .rc_key_map = ir_codes_dib0700_table, 2570 .rc_interval = DEFAULT_RC_INTERVAL,
2733 .rc_key_map_size = ARRAY_SIZE(ir_codes_dib0700_table), 2571 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
2734 .rc_query = dib0700_rc_query 2572 .module_name = "dib0700",
2573 .rc_query = dib0700_rc_query_old_firmware,
2574 .rc_props = {
2575 .allowed_protos = IR_TYPE_RC5 |
2576 IR_TYPE_RC6 |
2577 IR_TYPE_NEC,
2578 .change_protocol = dib0700_change_protocol,
2579 },
2580 },
2735 }, 2581 },
2736}; 2582};
2737 2583
diff --git a/drivers/media/dvb/dvb-usb/dibusb-common.c b/drivers/media/dvb/dvb-usb/dibusb-common.c
index bc08bc0b723c..ba991aa21aff 100644
--- a/drivers/media/dvb/dvb-usb/dibusb-common.c
+++ b/drivers/media/dvb/dvb-usb/dibusb-common.c
@@ -327,7 +327,7 @@ EXPORT_SYMBOL(dibusb_dib3000mc_tuner_attach);
327/* 327/*
328 * common remote control stuff 328 * common remote control stuff
329 */ 329 */
330struct dvb_usb_rc_key ir_codes_dibusb_table[] = { 330struct ir_scancode ir_codes_dibusb_table[] = {
331 /* Key codes for the little Artec T1/Twinhan/HAMA/ remote. */ 331 /* Key codes for the little Artec T1/Twinhan/HAMA/ remote. */
332 { 0x0016, KEY_POWER }, 332 { 0x0016, KEY_POWER },
333 { 0x0010, KEY_MUTE }, 333 { 0x0010, KEY_MUTE },
diff --git a/drivers/media/dvb/dvb-usb/dibusb-mb.c b/drivers/media/dvb/dvb-usb/dibusb-mb.c
index eb2e6f050fbe..8e3c0d2cce16 100644
--- a/drivers/media/dvb/dvb-usb/dibusb-mb.c
+++ b/drivers/media/dvb/dvb-usb/dibusb-mb.c
@@ -211,10 +211,12 @@ static struct dvb_usb_device_properties dibusb1_1_properties = {
211 211
212 .power_ctrl = dibusb_power_ctrl, 212 .power_ctrl = dibusb_power_ctrl,
213 213
214 .rc_interval = DEFAULT_RC_INTERVAL, 214 .rc.legacy = {
215 .rc_key_map = ir_codes_dibusb_table, 215 .rc_interval = DEFAULT_RC_INTERVAL,
216 .rc_key_map_size = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */ 216 .rc_key_map = ir_codes_dibusb_table,
217 .rc_query = dibusb_rc_query, 217 .rc_key_map_size = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */
218 .rc_query = dibusb_rc_query,
219 },
218 220
219 .i2c_algo = &dibusb_i2c_algo, 221 .i2c_algo = &dibusb_i2c_algo,
220 222
@@ -295,10 +297,12 @@ static struct dvb_usb_device_properties dibusb1_1_an2235_properties = {
295 }, 297 },
296 .power_ctrl = dibusb_power_ctrl, 298 .power_ctrl = dibusb_power_ctrl,
297 299
298 .rc_interval = DEFAULT_RC_INTERVAL, 300 .rc.legacy = {
299 .rc_key_map = ir_codes_dibusb_table, 301 .rc_interval = DEFAULT_RC_INTERVAL,
300 .rc_key_map_size = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */ 302 .rc_key_map = ir_codes_dibusb_table,
301 .rc_query = dibusb_rc_query, 303 .rc_key_map_size = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */
304 .rc_query = dibusb_rc_query,
305 },
302 306
303 .i2c_algo = &dibusb_i2c_algo, 307 .i2c_algo = &dibusb_i2c_algo,
304 308
@@ -359,10 +363,12 @@ static struct dvb_usb_device_properties dibusb2_0b_properties = {
359 }, 363 },
360 .power_ctrl = dibusb2_0_power_ctrl, 364 .power_ctrl = dibusb2_0_power_ctrl,
361 365
362 .rc_interval = DEFAULT_RC_INTERVAL, 366 .rc.legacy = {
363 .rc_key_map = ir_codes_dibusb_table, 367 .rc_interval = DEFAULT_RC_INTERVAL,
364 .rc_key_map_size = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */ 368 .rc_key_map = ir_codes_dibusb_table,
365 .rc_query = dibusb_rc_query, 369 .rc_key_map_size = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */
370 .rc_query = dibusb_rc_query,
371 },
366 372
367 .i2c_algo = &dibusb_i2c_algo, 373 .i2c_algo = &dibusb_i2c_algo,
368 374
@@ -416,10 +422,12 @@ static struct dvb_usb_device_properties artec_t1_usb2_properties = {
416 }, 422 },
417 .power_ctrl = dibusb2_0_power_ctrl, 423 .power_ctrl = dibusb2_0_power_ctrl,
418 424
419 .rc_interval = DEFAULT_RC_INTERVAL, 425 .rc.legacy = {
420 .rc_key_map = ir_codes_dibusb_table, 426 .rc_interval = DEFAULT_RC_INTERVAL,
421 .rc_key_map_size = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */ 427 .rc_key_map = ir_codes_dibusb_table,
422 .rc_query = dibusb_rc_query, 428 .rc_key_map_size = 111, /* wow, that is ugly ... I want to load it to the driver dynamically */
429 .rc_query = dibusb_rc_query,
430 },
423 431
424 .i2c_algo = &dibusb_i2c_algo, 432 .i2c_algo = &dibusb_i2c_algo,
425 433
diff --git a/drivers/media/dvb/dvb-usb/dibusb-mc.c b/drivers/media/dvb/dvb-usb/dibusb-mc.c
index 588308eb6638..1cbc41cb4e8f 100644
--- a/drivers/media/dvb/dvb-usb/dibusb-mc.c
+++ b/drivers/media/dvb/dvb-usb/dibusb-mc.c
@@ -81,10 +81,12 @@ static struct dvb_usb_device_properties dibusb_mc_properties = {
81 }, 81 },
82 .power_ctrl = dibusb2_0_power_ctrl, 82 .power_ctrl = dibusb2_0_power_ctrl,
83 83
84 .rc_interval = DEFAULT_RC_INTERVAL, 84 .rc.legacy = {
85 .rc_key_map = ir_codes_dibusb_table, 85 .rc_interval = DEFAULT_RC_INTERVAL,
86 .rc_key_map_size = 111, /* FIXME */ 86 .rc_key_map = ir_codes_dibusb_table,
87 .rc_query = dibusb_rc_query, 87 .rc_key_map_size = 111, /* FIXME */
88 .rc_query = dibusb_rc_query,
89 },
88 90
89 .i2c_algo = &dibusb_i2c_algo, 91 .i2c_algo = &dibusb_i2c_algo,
90 92
diff --git a/drivers/media/dvb/dvb-usb/dibusb.h b/drivers/media/dvb/dvb-usb/dibusb.h
index 3d50ac59088f..61a6bf389472 100644
--- a/drivers/media/dvb/dvb-usb/dibusb.h
+++ b/drivers/media/dvb/dvb-usb/dibusb.h
@@ -124,7 +124,7 @@ extern int dibusb2_0_power_ctrl(struct dvb_usb_device *, int);
124#define DEFAULT_RC_INTERVAL 150 124#define DEFAULT_RC_INTERVAL 150
125//#define DEFAULT_RC_INTERVAL 100000 125//#define DEFAULT_RC_INTERVAL 100000
126 126
127extern struct dvb_usb_rc_key ir_codes_dibusb_table[]; 127extern struct ir_scancode ir_codes_dibusb_table[];
128extern int dibusb_rc_query(struct dvb_usb_device *, u32 *, int *); 128extern int dibusb_rc_query(struct dvb_usb_device *, u32 *, int *);
129extern int dibusb_read_eeprom_byte(struct dvb_usb_device *, u8, u8 *); 129extern int dibusb_read_eeprom_byte(struct dvb_usb_device *, u8, u8 *);
130 130
diff --git a/drivers/media/dvb/dvb-usb/digitv.c b/drivers/media/dvb/dvb-usb/digitv.c
index e826077094fa..13d006bb19db 100644
--- a/drivers/media/dvb/dvb-usb/digitv.c
+++ b/drivers/media/dvb/dvb-usb/digitv.c
@@ -161,7 +161,7 @@ static int digitv_tuner_attach(struct dvb_usb_adapter *adap)
161 return 0; 161 return 0;
162} 162}
163 163
164static struct dvb_usb_rc_key ir_codes_digitv_table[] = { 164static struct ir_scancode ir_codes_digitv_table[] = {
165 { 0x5f55, KEY_0 }, 165 { 0x5f55, KEY_0 },
166 { 0x6f55, KEY_1 }, 166 { 0x6f55, KEY_1 },
167 { 0x9f55, KEY_2 }, 167 { 0x9f55, KEY_2 },
@@ -237,10 +237,10 @@ static int digitv_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
237 /* if something is inside the buffer, simulate key press */ 237 /* if something is inside the buffer, simulate key press */
238 if (key[1] != 0) 238 if (key[1] != 0)
239 { 239 {
240 for (i = 0; i < d->props.rc_key_map_size; i++) { 240 for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++) {
241 if (rc5_custom(&d->props.rc_key_map[i]) == key[1] && 241 if (rc5_custom(&d->props.rc.legacy.rc_key_map[i]) == key[1] &&
242 rc5_data(&d->props.rc_key_map[i]) == key[2]) { 242 rc5_data(&d->props.rc.legacy.rc_key_map[i]) == key[2]) {
243 *event = d->props.rc_key_map[i].event; 243 *event = d->props.rc.legacy.rc_key_map[i].keycode;
244 *state = REMOTE_KEY_PRESSED; 244 *state = REMOTE_KEY_PRESSED;
245 return 0; 245 return 0;
246 } 246 }
@@ -310,10 +310,12 @@ static struct dvb_usb_device_properties digitv_properties = {
310 }, 310 },
311 .identify_state = digitv_identify_state, 311 .identify_state = digitv_identify_state,
312 312
313 .rc_interval = 1000, 313 .rc.legacy = {
314 .rc_key_map = ir_codes_digitv_table, 314 .rc_interval = 1000,
315 .rc_key_map_size = ARRAY_SIZE(ir_codes_digitv_table), 315 .rc_key_map = ir_codes_digitv_table,
316 .rc_query = digitv_rc_query, 316 .rc_key_map_size = ARRAY_SIZE(ir_codes_digitv_table),
317 .rc_query = digitv_rc_query,
318 },
317 319
318 .i2c_algo = &digitv_i2c_algo, 320 .i2c_algo = &digitv_i2c_algo,
319 321
diff --git a/drivers/media/dvb/dvb-usb/dtt200u.c b/drivers/media/dvb/dvb-usb/dtt200u.c
index f57e59044d4d..ca495e07f35c 100644
--- a/drivers/media/dvb/dvb-usb/dtt200u.c
+++ b/drivers/media/dvb/dvb-usb/dtt200u.c
@@ -57,7 +57,7 @@ static int dtt200u_pid_filter(struct dvb_usb_adapter *adap, int index, u16 pid,
57 57
58/* remote control */ 58/* remote control */
59/* key list for the tiny remote control (Yakumo, don't know about the others) */ 59/* key list for the tiny remote control (Yakumo, don't know about the others) */
60static struct dvb_usb_rc_key ir_codes_dtt200u_table[] = { 60static struct ir_scancode ir_codes_dtt200u_table[] = {
61 { 0x8001, KEY_MUTE }, 61 { 0x8001, KEY_MUTE },
62 { 0x8002, KEY_CHANNELDOWN }, 62 { 0x8002, KEY_CHANNELDOWN },
63 { 0x8003, KEY_VOLUMEDOWN }, 63 { 0x8003, KEY_VOLUMEDOWN },
@@ -161,10 +161,12 @@ static struct dvb_usb_device_properties dtt200u_properties = {
161 }, 161 },
162 .power_ctrl = dtt200u_power_ctrl, 162 .power_ctrl = dtt200u_power_ctrl,
163 163
164 .rc_interval = 300, 164 .rc.legacy = {
165 .rc_key_map = ir_codes_dtt200u_table, 165 .rc_interval = 300,
166 .rc_key_map_size = ARRAY_SIZE(ir_codes_dtt200u_table), 166 .rc_key_map = ir_codes_dtt200u_table,
167 .rc_query = dtt200u_rc_query, 167 .rc_key_map_size = ARRAY_SIZE(ir_codes_dtt200u_table),
168 .rc_query = dtt200u_rc_query,
169 },
168 170
169 .generic_bulk_ctrl_endpoint = 0x01, 171 .generic_bulk_ctrl_endpoint = 0x01,
170 172
@@ -206,10 +208,12 @@ static struct dvb_usb_device_properties wt220u_properties = {
206 }, 208 },
207 .power_ctrl = dtt200u_power_ctrl, 209 .power_ctrl = dtt200u_power_ctrl,
208 210
209 .rc_interval = 300, 211 .rc.legacy = {
210 .rc_key_map = ir_codes_dtt200u_table, 212 .rc_interval = 300,
211 .rc_key_map_size = ARRAY_SIZE(ir_codes_dtt200u_table), 213 .rc_key_map = ir_codes_dtt200u_table,
212 .rc_query = dtt200u_rc_query, 214 .rc_key_map_size = ARRAY_SIZE(ir_codes_dtt200u_table),
215 .rc_query = dtt200u_rc_query,
216 },
213 217
214 .generic_bulk_ctrl_endpoint = 0x01, 218 .generic_bulk_ctrl_endpoint = 0x01,
215 219
@@ -251,10 +255,12 @@ static struct dvb_usb_device_properties wt220u_fc_properties = {
251 }, 255 },
252 .power_ctrl = dtt200u_power_ctrl, 256 .power_ctrl = dtt200u_power_ctrl,
253 257
254 .rc_interval = 300, 258 .rc.legacy = {
255 .rc_key_map = ir_codes_dtt200u_table, 259 .rc_interval = 300,
256 .rc_key_map_size = ARRAY_SIZE(ir_codes_dtt200u_table), 260 .rc_key_map = ir_codes_dtt200u_table,
257 .rc_query = dtt200u_rc_query, 261 .rc_key_map_size = ARRAY_SIZE(ir_codes_dtt200u_table),
262 .rc_query = dtt200u_rc_query,
263 },
258 264
259 .generic_bulk_ctrl_endpoint = 0x01, 265 .generic_bulk_ctrl_endpoint = 0x01,
260 266
@@ -296,10 +302,12 @@ static struct dvb_usb_device_properties wt220u_zl0353_properties = {
296 }, 302 },
297 .power_ctrl = dtt200u_power_ctrl, 303 .power_ctrl = dtt200u_power_ctrl,
298 304
299 .rc_interval = 300, 305 .rc.legacy = {
300 .rc_key_map = ir_codes_dtt200u_table, 306 .rc_interval = 300,
301 .rc_key_map_size = ARRAY_SIZE(ir_codes_dtt200u_table), 307 .rc_key_map = ir_codes_dtt200u_table,
302 .rc_query = dtt200u_rc_query, 308 .rc_key_map_size = ARRAY_SIZE(ir_codes_dtt200u_table),
309 .rc_query = dtt200u_rc_query,
310 },
303 311
304 .generic_bulk_ctrl_endpoint = 0x01, 312 .generic_bulk_ctrl_endpoint = 0x01,
305 313
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-ids.h b/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
index b4afe6f8ed19..1a774d58d664 100644
--- a/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
+++ b/drivers/media/dvb/dvb-usb/dvb-usb-ids.h
@@ -197,6 +197,7 @@
197#define USB_PID_AVERMEDIA_A310 0xa310 197#define USB_PID_AVERMEDIA_A310 0xa310
198#define USB_PID_AVERMEDIA_A850 0x850a 198#define USB_PID_AVERMEDIA_A850 0x850a
199#define USB_PID_AVERMEDIA_A805 0xa805 199#define USB_PID_AVERMEDIA_A805 0xa805
200#define USB_PID_AVERMEDIA_A815M 0x815a
200#define USB_PID_TECHNOTREND_CONNECT_S2400 0x3006 201#define USB_PID_TECHNOTREND_CONNECT_S2400 0x3006
201#define USB_PID_TECHNOTREND_CONNECT_CT3650 0x300d 202#define USB_PID_TECHNOTREND_CONNECT_CT3650 0x300d
202#define USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY 0x005a 203#define USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY 0x005a
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-init.c b/drivers/media/dvb/dvb-usb/dvb-usb-init.c
index 5d91f70d2d2d..2e3ea0fa28e0 100644
--- a/drivers/media/dvb/dvb-usb/dvb-usb-init.c
+++ b/drivers/media/dvb/dvb-usb/dvb-usb-init.c
@@ -15,7 +15,7 @@
15 15
16/* debug */ 16/* debug */
17int dvb_usb_debug; 17int dvb_usb_debug;
18module_param_named(debug,dvb_usb_debug, int, 0644); 18module_param_named(debug, dvb_usb_debug, int, 0644);
19MODULE_PARM_DESC(debug, "set debugging level (1=info,xfer=2,pll=4,ts=8,err=16,rc=32,fw=64,mem=128,uxfer=256 (or-able))." DVB_USB_DEBUG_STATUS); 19MODULE_PARM_DESC(debug, "set debugging level (1=info,xfer=2,pll=4,ts=8,err=16,rc=32,fw=64,mem=128,uxfer=256 (or-able))." DVB_USB_DEBUG_STATUS);
20 20
21int dvb_usb_disable_rc_polling; 21int dvb_usb_disable_rc_polling;
@@ -29,7 +29,7 @@ MODULE_PARM_DESC(force_pid_filter_usage, "force all dvb-usb-devices to use a PID
29static int dvb_usb_adapter_init(struct dvb_usb_device *d, short *adapter_nrs) 29static int dvb_usb_adapter_init(struct dvb_usb_device *d, short *adapter_nrs)
30{ 30{
31 struct dvb_usb_adapter *adap; 31 struct dvb_usb_adapter *adap;
32 int ret,n; 32 int ret, n;
33 33
34 for (n = 0; n < d->props.num_adapters; n++) { 34 for (n = 0; n < d->props.num_adapters; n++) {
35 adap = &d->adapter[n]; 35 adap = &d->adapter[n];
@@ -38,7 +38,7 @@ static int dvb_usb_adapter_init(struct dvb_usb_device *d, short *adapter_nrs)
38 38
39 memcpy(&adap->props, &d->props.adapter[n], sizeof(struct dvb_usb_adapter_properties)); 39 memcpy(&adap->props, &d->props.adapter[n], sizeof(struct dvb_usb_adapter_properties));
40 40
41/* speed - when running at FULL speed we need a HW PID filter */ 41 /* speed - when running at FULL speed we need a HW PID filter */
42 if (d->udev->speed == USB_SPEED_FULL && !(adap->props.caps & DVB_USB_ADAP_HAS_PID_FILTER)) { 42 if (d->udev->speed == USB_SPEED_FULL && !(adap->props.caps & DVB_USB_ADAP_HAS_PID_FILTER)) {
43 err("This USB2.0 device cannot be run on a USB1.1 port. (it lacks a hardware PID filter)"); 43 err("This USB2.0 device cannot be run on a USB1.1 port. (it lacks a hardware PID filter)");
44 return -ENODEV; 44 return -ENODEV;
@@ -46,7 +46,7 @@ static int dvb_usb_adapter_init(struct dvb_usb_device *d, short *adapter_nrs)
46 46
47 if ((d->udev->speed == USB_SPEED_FULL && adap->props.caps & DVB_USB_ADAP_HAS_PID_FILTER) || 47 if ((d->udev->speed == USB_SPEED_FULL && adap->props.caps & DVB_USB_ADAP_HAS_PID_FILTER) ||
48 (adap->props.caps & DVB_USB_ADAP_NEED_PID_FILTERING)) { 48 (adap->props.caps & DVB_USB_ADAP_NEED_PID_FILTERING)) {
49 info("will use the device's hardware PID filter (table count: %d).",adap->props.pid_filter_count); 49 info("will use the device's hardware PID filter (table count: %d).", adap->props.pid_filter_count);
50 adap->pid_filtering = 1; 50 adap->pid_filtering = 1;
51 adap->max_feed_count = adap->props.pid_filter_count; 51 adap->max_feed_count = adap->props.pid_filter_count;
52 } else { 52 } else {
@@ -64,9 +64,9 @@ static int dvb_usb_adapter_init(struct dvb_usb_device *d, short *adapter_nrs)
64 } 64 }
65 65
66 if (adap->props.size_of_priv > 0) { 66 if (adap->props.size_of_priv > 0) {
67 adap->priv = kzalloc(adap->props.size_of_priv,GFP_KERNEL); 67 adap->priv = kzalloc(adap->props.size_of_priv, GFP_KERNEL);
68 if (adap->priv == NULL) { 68 if (adap->priv == NULL) {
69 err("no memory for priv for adapter %d.",n); 69 err("no memory for priv for adapter %d.", n);
70 return -ENOMEM; 70 return -ENOMEM;
71 } 71 }
72 } 72 }
@@ -86,8 +86,8 @@ static int dvb_usb_adapter_init(struct dvb_usb_device *d, short *adapter_nrs)
86 * sometimes a timeout occures, this helps 86 * sometimes a timeout occures, this helps
87 */ 87 */
88 if (d->props.generic_bulk_ctrl_endpoint != 0) { 88 if (d->props.generic_bulk_ctrl_endpoint != 0) {
89 usb_clear_halt(d->udev,usb_sndbulkpipe(d->udev,d->props.generic_bulk_ctrl_endpoint)); 89 usb_clear_halt(d->udev, usb_sndbulkpipe(d->udev, d->props.generic_bulk_ctrl_endpoint));
90 usb_clear_halt(d->udev,usb_rcvbulkpipe(d->udev,d->props.generic_bulk_ctrl_endpoint)); 90 usb_clear_halt(d->udev, usb_rcvbulkpipe(d->udev, d->props.generic_bulk_ctrl_endpoint));
91 } 91 }
92 92
93 return 0; 93 return 0;
@@ -96,6 +96,7 @@ static int dvb_usb_adapter_init(struct dvb_usb_device *d, short *adapter_nrs)
96static int dvb_usb_adapter_exit(struct dvb_usb_device *d) 96static int dvb_usb_adapter_exit(struct dvb_usb_device *d)
97{ 97{
98 int n; 98 int n;
99
99 for (n = 0; n < d->num_adapters_initialized; n++) { 100 for (n = 0; n < d->num_adapters_initialized; n++) {
100 dvb_usb_adapter_frontend_exit(&d->adapter[n]); 101 dvb_usb_adapter_frontend_exit(&d->adapter[n]);
101 dvb_usb_adapter_dvb_exit(&d->adapter[n]); 102 dvb_usb_adapter_dvb_exit(&d->adapter[n]);
@@ -111,11 +112,11 @@ static int dvb_usb_adapter_exit(struct dvb_usb_device *d)
111/* general initialization functions */ 112/* general initialization functions */
112static int dvb_usb_exit(struct dvb_usb_device *d) 113static int dvb_usb_exit(struct dvb_usb_device *d)
113{ 114{
114 deb_info("state before exiting everything: %x\n",d->state); 115 deb_info("state before exiting everything: %x\n", d->state);
115 dvb_usb_remote_exit(d); 116 dvb_usb_remote_exit(d);
116 dvb_usb_adapter_exit(d); 117 dvb_usb_adapter_exit(d);
117 dvb_usb_i2c_exit(d); 118 dvb_usb_i2c_exit(d);
118 deb_info("state should be zero now: %x\n",d->state); 119 deb_info("state should be zero now: %x\n", d->state);
119 d->state = DVB_USB_STATE_INIT; 120 d->state = DVB_USB_STATE_INIT;
120 kfree(d->priv); 121 kfree(d->priv);
121 kfree(d); 122 kfree(d);
@@ -132,14 +133,14 @@ static int dvb_usb_init(struct dvb_usb_device *d, short *adapter_nums)
132 d->state = DVB_USB_STATE_INIT; 133 d->state = DVB_USB_STATE_INIT;
133 134
134 if (d->props.size_of_priv > 0) { 135 if (d->props.size_of_priv > 0) {
135 d->priv = kzalloc(d->props.size_of_priv,GFP_KERNEL); 136 d->priv = kzalloc(d->props.size_of_priv, GFP_KERNEL);
136 if (d->priv == NULL) { 137 if (d->priv == NULL) {
137 err("no memory for priv in 'struct dvb_usb_device'"); 138 err("no memory for priv in 'struct dvb_usb_device'");
138 return -ENOMEM; 139 return -ENOMEM;
139 } 140 }
140 } 141 }
141 142
142/* check the capabilities and set appropriate variables */ 143 /* check the capabilities and set appropriate variables */
143 dvb_usb_device_power_ctrl(d, 1); 144 dvb_usb_device_power_ctrl(d, 1);
144 145
145 if ((ret = dvb_usb_i2c_init(d)) || 146 if ((ret = dvb_usb_i2c_init(d)) ||
@@ -157,16 +158,17 @@ static int dvb_usb_init(struct dvb_usb_device *d, short *adapter_nums)
157} 158}
158 159
159/* determine the name and the state of the just found USB device */ 160/* determine the name and the state of the just found USB device */
160static struct dvb_usb_device_description * dvb_usb_find_device(struct usb_device *udev,struct dvb_usb_device_properties *props, int *cold) 161static struct dvb_usb_device_description *dvb_usb_find_device(struct usb_device *udev, struct dvb_usb_device_properties *props, int *cold)
161{ 162{
162 int i,j; 163 int i, j;
163 struct dvb_usb_device_description *desc = NULL; 164 struct dvb_usb_device_description *desc = NULL;
165
164 *cold = -1; 166 *cold = -1;
165 167
166 for (i = 0; i < props->num_device_descs; i++) { 168 for (i = 0; i < props->num_device_descs; i++) {
167 169
168 for (j = 0; j < DVB_USB_ID_MAX_NUM && props->devices[i].cold_ids[j] != NULL; j++) { 170 for (j = 0; j < DVB_USB_ID_MAX_NUM && props->devices[i].cold_ids[j] != NULL; j++) {
169 deb_info("check for cold %x %x\n",props->devices[i].cold_ids[j]->idVendor, props->devices[i].cold_ids[j]->idProduct); 171 deb_info("check for cold %x %x\n", props->devices[i].cold_ids[j]->idVendor, props->devices[i].cold_ids[j]->idProduct);
170 if (props->devices[i].cold_ids[j]->idVendor == le16_to_cpu(udev->descriptor.idVendor) && 172 if (props->devices[i].cold_ids[j]->idVendor == le16_to_cpu(udev->descriptor.idVendor) &&
171 props->devices[i].cold_ids[j]->idProduct == le16_to_cpu(udev->descriptor.idProduct)) { 173 props->devices[i].cold_ids[j]->idProduct == le16_to_cpu(udev->descriptor.idProduct)) {
172 *cold = 1; 174 *cold = 1;
@@ -179,7 +181,7 @@ static struct dvb_usb_device_description * dvb_usb_find_device(struct usb_device
179 break; 181 break;
180 182
181 for (j = 0; j < DVB_USB_ID_MAX_NUM && props->devices[i].warm_ids[j] != NULL; j++) { 183 for (j = 0; j < DVB_USB_ID_MAX_NUM && props->devices[i].warm_ids[j] != NULL; j++) {
182 deb_info("check for warm %x %x\n",props->devices[i].warm_ids[j]->idVendor, props->devices[i].warm_ids[j]->idProduct); 184 deb_info("check for warm %x %x\n", props->devices[i].warm_ids[j]->idVendor, props->devices[i].warm_ids[j]->idProduct);
183 if (props->devices[i].warm_ids[j]->idVendor == le16_to_cpu(udev->descriptor.idVendor) && 185 if (props->devices[i].warm_ids[j]->idVendor == le16_to_cpu(udev->descriptor.idVendor) &&
184 props->devices[i].warm_ids[j]->idProduct == le16_to_cpu(udev->descriptor.idProduct)) { 186 props->devices[i].warm_ids[j]->idProduct == le16_to_cpu(udev->descriptor.idProduct)) {
185 *cold = 0; 187 *cold = 0;
@@ -190,7 +192,7 @@ static struct dvb_usb_device_description * dvb_usb_find_device(struct usb_device
190 } 192 }
191 193
192 if (desc != NULL && props->identify_state != NULL) 194 if (desc != NULL && props->identify_state != NULL)
193 props->identify_state(udev,props,&desc,cold); 195 props->identify_state(udev, props, &desc, cold);
194 196
195 return desc; 197 return desc;
196} 198}
@@ -202,7 +204,7 @@ int dvb_usb_device_power_ctrl(struct dvb_usb_device *d, int onoff)
202 else 204 else
203 d->powered--; 205 d->powered--;
204 206
205 if (d->powered == 0 || (onoff && d->powered == 1)) { // when switching from 1 to 0 or from 0 to 1 207 if (d->powered == 0 || (onoff && d->powered == 1)) { /* when switching from 1 to 0 or from 0 to 1 */
206 deb_info("power control: %d\n", onoff); 208 deb_info("power control: %d\n", onoff);
207 if (d->props.power_ctrl) 209 if (d->props.power_ctrl)
208 return d->props.power_ctrl(d, onoff); 210 return d->props.power_ctrl(d, onoff);
@@ -222,32 +224,32 @@ int dvb_usb_device_init(struct usb_interface *intf,
222 struct dvb_usb_device *d = NULL; 224 struct dvb_usb_device *d = NULL;
223 struct dvb_usb_device_description *desc = NULL; 225 struct dvb_usb_device_description *desc = NULL;
224 226
225 int ret = -ENOMEM,cold=0; 227 int ret = -ENOMEM, cold = 0;
226 228
227 if (du != NULL) 229 if (du != NULL)
228 *du = NULL; 230 *du = NULL;
229 231
230 if ((desc = dvb_usb_find_device(udev,props,&cold)) == NULL) { 232 if ((desc = dvb_usb_find_device(udev, props, &cold)) == NULL) {
231 deb_err("something went very wrong, device was not found in current device list - let's see what comes next.\n"); 233 deb_err("something went very wrong, device was not found in current device list - let's see what comes next.\n");
232 return -ENODEV; 234 return -ENODEV;
233 } 235 }
234 236
235 if (cold) { 237 if (cold) {
236 info("found a '%s' in cold state, will try to load a firmware",desc->name); 238 info("found a '%s' in cold state, will try to load a firmware", desc->name);
237 ret = dvb_usb_download_firmware(udev,props); 239 ret = dvb_usb_download_firmware(udev, props);
238 if (!props->no_reconnect || ret != 0) 240 if (!props->no_reconnect || ret != 0)
239 return ret; 241 return ret;
240 } 242 }
241 243
242 info("found a '%s' in warm state.",desc->name); 244 info("found a '%s' in warm state.", desc->name);
243 d = kzalloc(sizeof(struct dvb_usb_device),GFP_KERNEL); 245 d = kzalloc(sizeof(struct dvb_usb_device), GFP_KERNEL);
244 if (d == NULL) { 246 if (d == NULL) {
245 err("no memory for 'struct dvb_usb_device'"); 247 err("no memory for 'struct dvb_usb_device'");
246 return -ENOMEM; 248 return -ENOMEM;
247 } 249 }
248 250
249 d->udev = udev; 251 d->udev = udev;
250 memcpy(&d->props,props,sizeof(struct dvb_usb_device_properties)); 252 memcpy(&d->props, props, sizeof(struct dvb_usb_device_properties));
251 d->desc = desc; 253 d->desc = desc;
252 d->owner = owner; 254 d->owner = owner;
253 255
@@ -259,9 +261,9 @@ int dvb_usb_device_init(struct usb_interface *intf,
259 ret = dvb_usb_init(d, adapter_nums); 261 ret = dvb_usb_init(d, adapter_nums);
260 262
261 if (ret == 0) 263 if (ret == 0)
262 info("%s successfully initialized and connected.",desc->name); 264 info("%s successfully initialized and connected.", desc->name);
263 else 265 else
264 info("%s error while loading driver (%d)",desc->name,ret); 266 info("%s error while loading driver (%d)", desc->name, ret);
265 return ret; 267 return ret;
266} 268}
267EXPORT_SYMBOL(dvb_usb_device_init); 269EXPORT_SYMBOL(dvb_usb_device_init);
@@ -271,12 +273,12 @@ void dvb_usb_device_exit(struct usb_interface *intf)
271 struct dvb_usb_device *d = usb_get_intfdata(intf); 273 struct dvb_usb_device *d = usb_get_intfdata(intf);
272 const char *name = "generic DVB-USB module"; 274 const char *name = "generic DVB-USB module";
273 275
274 usb_set_intfdata(intf,NULL); 276 usb_set_intfdata(intf, NULL);
275 if (d != NULL && d->desc != NULL) { 277 if (d != NULL && d->desc != NULL) {
276 name = d->desc->name; 278 name = d->desc->name;
277 dvb_usb_exit(d); 279 dvb_usb_exit(d);
278 } 280 }
279 info("%s successfully deinitialized and disconnected.",name); 281 info("%s successfully deinitialized and disconnected.", name);
280 282
281} 283}
282EXPORT_SYMBOL(dvb_usb_device_exit); 284EXPORT_SYMBOL(dvb_usb_device_exit);
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-remote.c b/drivers/media/dvb/dvb-usb/dvb-usb-remote.c
index 852fe89539cf..b579fed3ab3f 100644
--- a/drivers/media/dvb/dvb-usb/dvb-usb-remote.c
+++ b/drivers/media/dvb/dvb-usb/dvb-usb-remote.c
@@ -8,29 +8,29 @@
8#include "dvb-usb-common.h" 8#include "dvb-usb-common.h"
9#include <linux/usb/input.h> 9#include <linux/usb/input.h>
10 10
11static int dvb_usb_getkeycode(struct input_dev *dev, 11static int legacy_dvb_usb_getkeycode(struct input_dev *dev,
12 unsigned int scancode, unsigned int *keycode) 12 unsigned int scancode, unsigned int *keycode)
13{ 13{
14 struct dvb_usb_device *d = input_get_drvdata(dev); 14 struct dvb_usb_device *d = input_get_drvdata(dev);
15 15
16 struct dvb_usb_rc_key *keymap = d->props.rc_key_map; 16 struct ir_scancode *keymap = d->props.rc.legacy.rc_key_map;
17 int i; 17 int i;
18 18
19 /* See if we can match the raw key code. */ 19 /* See if we can match the raw key code. */
20 for (i = 0; i < d->props.rc_key_map_size; i++) 20 for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++)
21 if (keymap[i].scan == scancode) { 21 if (keymap[i].scancode == scancode) {
22 *keycode = keymap[i].event; 22 *keycode = keymap[i].keycode;
23 return 0; 23 return 0;
24 } 24 }
25 25
26 /* 26 /*
27 * If is there extra space, returns KEY_RESERVED, 27 * If is there extra space, returns KEY_RESERVED,
28 * otherwise, input core won't let dvb_usb_setkeycode 28 * otherwise, input core won't let legacy_dvb_usb_setkeycode
29 * to work 29 * to work
30 */ 30 */
31 for (i = 0; i < d->props.rc_key_map_size; i++) 31 for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++)
32 if (keymap[i].event == KEY_RESERVED || 32 if (keymap[i].keycode == KEY_RESERVED ||
33 keymap[i].event == KEY_UNKNOWN) { 33 keymap[i].keycode == KEY_UNKNOWN) {
34 *keycode = KEY_RESERVED; 34 *keycode = KEY_RESERVED;
35 return 0; 35 return 0;
36 } 36 }
@@ -38,27 +38,27 @@ static int dvb_usb_getkeycode(struct input_dev *dev,
38 return -EINVAL; 38 return -EINVAL;
39} 39}
40 40
41static int dvb_usb_setkeycode(struct input_dev *dev, 41static int legacy_dvb_usb_setkeycode(struct input_dev *dev,
42 unsigned int scancode, unsigned int keycode) 42 unsigned int scancode, unsigned int keycode)
43{ 43{
44 struct dvb_usb_device *d = input_get_drvdata(dev); 44 struct dvb_usb_device *d = input_get_drvdata(dev);
45 45
46 struct dvb_usb_rc_key *keymap = d->props.rc_key_map; 46 struct ir_scancode *keymap = d->props.rc.legacy.rc_key_map;
47 int i; 47 int i;
48 48
49 /* Search if it is replacing an existing keycode */ 49 /* Search if it is replacing an existing keycode */
50 for (i = 0; i < d->props.rc_key_map_size; i++) 50 for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++)
51 if (keymap[i].scan == scancode) { 51 if (keymap[i].scancode == scancode) {
52 keymap[i].event = keycode; 52 keymap[i].keycode = keycode;
53 return 0; 53 return 0;
54 } 54 }
55 55
56 /* Search if is there a clean entry. If so, use it */ 56 /* Search if is there a clean entry. If so, use it */
57 for (i = 0; i < d->props.rc_key_map_size; i++) 57 for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++)
58 if (keymap[i].event == KEY_RESERVED || 58 if (keymap[i].keycode == KEY_RESERVED ||
59 keymap[i].event == KEY_UNKNOWN) { 59 keymap[i].keycode == KEY_UNKNOWN) {
60 keymap[i].scan = scancode; 60 keymap[i].scancode = scancode;
61 keymap[i].event = keycode; 61 keymap[i].keycode = keycode;
62 return 0; 62 return 0;
63 } 63 }
64 64
@@ -78,7 +78,7 @@ static int dvb_usb_setkeycode(struct input_dev *dev,
78 * 78 *
79 * TODO: Fix the repeat rate of the input device. 79 * TODO: Fix the repeat rate of the input device.
80 */ 80 */
81static void dvb_usb_read_remote_control(struct work_struct *work) 81static void legacy_dvb_usb_read_remote_control(struct work_struct *work)
82{ 82{
83 struct dvb_usb_device *d = 83 struct dvb_usb_device *d =
84 container_of(work, struct dvb_usb_device, rc_query_work.work); 84 container_of(work, struct dvb_usb_device, rc_query_work.work);
@@ -92,7 +92,7 @@ static void dvb_usb_read_remote_control(struct work_struct *work)
92 if (dvb_usb_disable_rc_polling) 92 if (dvb_usb_disable_rc_polling)
93 return; 93 return;
94 94
95 if (d->props.rc_query(d,&event,&state)) { 95 if (d->props.rc.legacy.rc_query(d,&event,&state)) {
96 err("error while querying for an remote control event."); 96 err("error while querying for an remote control event.");
97 goto schedule; 97 goto schedule;
98 } 98 }
@@ -151,18 +151,117 @@ static void dvb_usb_read_remote_control(struct work_struct *work)
151*/ 151*/
152 152
153schedule: 153schedule:
154 schedule_delayed_work(&d->rc_query_work,msecs_to_jiffies(d->props.rc_interval)); 154 schedule_delayed_work(&d->rc_query_work,msecs_to_jiffies(d->props.rc.legacy.rc_interval));
155}
156
157static int legacy_dvb_usb_remote_init(struct dvb_usb_device *d,
158 struct input_dev *input_dev)
159{
160 int i, err, rc_interval;
161
162 input_dev->getkeycode = legacy_dvb_usb_getkeycode;
163 input_dev->setkeycode = legacy_dvb_usb_setkeycode;
164
165 /* set the bits for the keys */
166 deb_rc("key map size: %d\n", d->props.rc.legacy.rc_key_map_size);
167 for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++) {
168 deb_rc("setting bit for event %d item %d\n",
169 d->props.rc.legacy.rc_key_map[i].keycode, i);
170 set_bit(d->props.rc.legacy.rc_key_map[i].keycode, input_dev->keybit);
171 }
172
173 /* setting these two values to non-zero, we have to manage key repeats */
174 input_dev->rep[REP_PERIOD] = d->props.rc.legacy.rc_interval;
175 input_dev->rep[REP_DELAY] = d->props.rc.legacy.rc_interval + 150;
176
177 input_set_drvdata(input_dev, d);
178
179 err = input_register_device(input_dev);
180 if (err)
181 input_free_device(input_dev);
182
183 rc_interval = d->props.rc.legacy.rc_interval;
184
185 INIT_DELAYED_WORK(&d->rc_query_work, legacy_dvb_usb_read_remote_control);
186
187 info("schedule remote query interval to %d msecs.", rc_interval);
188 schedule_delayed_work(&d->rc_query_work,
189 msecs_to_jiffies(rc_interval));
190
191 d->state |= DVB_USB_STATE_REMOTE;
192
193 return err;
194}
195
196/* Remote-control poll function - called every dib->rc_query_interval ms to see
197 * whether the remote control has received anything.
198 *
199 * TODO: Fix the repeat rate of the input device.
200 */
201static void dvb_usb_read_remote_control(struct work_struct *work)
202{
203 struct dvb_usb_device *d =
204 container_of(work, struct dvb_usb_device, rc_query_work.work);
205 int err;
206
207 /* TODO: need a lock here. We can simply skip checking for the remote control
208 if we're busy. */
209
210 /* when the parameter has been set to 1 via sysfs while the
211 * driver was running, or when bulk mode is enabled after IR init
212 */
213 if (dvb_usb_disable_rc_polling || d->props.rc.core.bulk_mode)
214 return;
215
216 err = d->props.rc.core.rc_query(d);
217 if (err)
218 err("error %d while querying for an remote control event.", err);
219
220 schedule_delayed_work(&d->rc_query_work,
221 msecs_to_jiffies(d->props.rc.core.rc_interval));
222}
223
224static int rc_core_dvb_usb_remote_init(struct dvb_usb_device *d,
225 struct input_dev *input_dev)
226{
227 int err, rc_interval;
228
229 d->props.rc.core.rc_props.priv = d;
230 err = ir_input_register(input_dev,
231 d->props.rc.core.rc_codes,
232 &d->props.rc.core.rc_props,
233 d->props.rc.core.module_name);
234 if (err < 0)
235 return err;
236
237 if (!d->props.rc.core.rc_query || d->props.rc.core.bulk_mode)
238 return 0;
239
240 /* Polling mode - initialize a work queue for handling it */
241 INIT_DELAYED_WORK(&d->rc_query_work, dvb_usb_read_remote_control);
242
243 rc_interval = d->props.rc.core.rc_interval;
244
245 info("schedule remote query interval to %d msecs.", rc_interval);
246 schedule_delayed_work(&d->rc_query_work,
247 msecs_to_jiffies(rc_interval));
248
249 return 0;
155} 250}
156 251
157int dvb_usb_remote_init(struct dvb_usb_device *d) 252int dvb_usb_remote_init(struct dvb_usb_device *d)
158{ 253{
159 struct input_dev *input_dev; 254 struct input_dev *input_dev;
160 int i;
161 int err; 255 int err;
162 256
163 if (d->props.rc_key_map == NULL || 257 if (dvb_usb_disable_rc_polling)
164 d->props.rc_query == NULL || 258 return 0;
165 dvb_usb_disable_rc_polling) 259
260 if (d->props.rc.legacy.rc_key_map && d->props.rc.legacy.rc_query)
261 d->props.rc.mode = DVB_RC_LEGACY;
262 else if (d->props.rc.core.rc_codes)
263 d->props.rc.mode = DVB_RC_CORE;
264 else
166 return 0; 265 return 0;
167 266
168 usb_make_path(d->udev, d->rc_phys, sizeof(d->rc_phys)); 267 usb_make_path(d->udev, d->rc_phys, sizeof(d->rc_phys));
@@ -177,39 +276,19 @@ int dvb_usb_remote_init(struct dvb_usb_device *d)
177 input_dev->phys = d->rc_phys; 276 input_dev->phys = d->rc_phys;
178 usb_to_input_id(d->udev, &input_dev->id); 277 usb_to_input_id(d->udev, &input_dev->id);
179 input_dev->dev.parent = &d->udev->dev; 278 input_dev->dev.parent = &d->udev->dev;
180 input_dev->getkeycode = dvb_usb_getkeycode;
181 input_dev->setkeycode = dvb_usb_setkeycode;
182
183 /* set the bits for the keys */
184 deb_rc("key map size: %d\n", d->props.rc_key_map_size);
185 for (i = 0; i < d->props.rc_key_map_size; i++) {
186 deb_rc("setting bit for event %d item %d\n",
187 d->props.rc_key_map[i].event, i);
188 set_bit(d->props.rc_key_map[i].event, input_dev->keybit);
189 }
190 279
191 /* Start the remote-control polling. */ 280 /* Start the remote-control polling. */
192 if (d->props.rc_interval < 40) 281 if (d->props.rc.legacy.rc_interval < 40)
193 d->props.rc_interval = 100; /* default */ 282 d->props.rc.legacy.rc_interval = 100; /* default */
194
195 /* setting these two values to non-zero, we have to manage key repeats */
196 input_dev->rep[REP_PERIOD] = d->props.rc_interval;
197 input_dev->rep[REP_DELAY] = d->props.rc_interval + 150;
198
199 input_set_drvdata(input_dev, d);
200
201 err = input_register_device(input_dev);
202 if (err) {
203 input_free_device(input_dev);
204 return err;
205 }
206 283
207 d->rc_input_dev = input_dev; 284 d->rc_input_dev = input_dev;
208 285
209 INIT_DELAYED_WORK(&d->rc_query_work, dvb_usb_read_remote_control); 286 if (d->props.rc.mode == DVB_RC_LEGACY)
210 287 err = legacy_dvb_usb_remote_init(d, input_dev);
211 info("schedule remote query interval to %d msecs.", d->props.rc_interval); 288 else
212 schedule_delayed_work(&d->rc_query_work,msecs_to_jiffies(d->props.rc_interval)); 289 err = rc_core_dvb_usb_remote_init(d, input_dev);
290 if (err)
291 return err;
213 292
214 d->state |= DVB_USB_STATE_REMOTE; 293 d->state |= DVB_USB_STATE_REMOTE;
215 294
@@ -221,7 +300,10 @@ int dvb_usb_remote_exit(struct dvb_usb_device *d)
221 if (d->state & DVB_USB_STATE_REMOTE) { 300 if (d->state & DVB_USB_STATE_REMOTE) {
222 cancel_rearming_delayed_work(&d->rc_query_work); 301 cancel_rearming_delayed_work(&d->rc_query_work);
223 flush_scheduled_work(); 302 flush_scheduled_work();
224 input_unregister_device(d->rc_input_dev); 303 if (d->props.rc.mode == DVB_RC_LEGACY)
304 input_unregister_device(d->rc_input_dev);
305 else
306 ir_input_unregister(d->rc_input_dev);
225 } 307 }
226 d->state &= ~DVB_USB_STATE_REMOTE; 308 d->state &= ~DVB_USB_STATE_REMOTE;
227 return 0; 309 return 0;
@@ -234,7 +316,7 @@ int dvb_usb_nec_rc_key_to_event(struct dvb_usb_device *d,
234 u8 keybuf[5], u32 *event, int *state) 316 u8 keybuf[5], u32 *event, int *state)
235{ 317{
236 int i; 318 int i;
237 struct dvb_usb_rc_key *keymap = d->props.rc_key_map; 319 struct ir_scancode *keymap = d->props.rc.legacy.rc_key_map;
238 *event = 0; 320 *event = 0;
239 *state = REMOTE_NO_KEY_PRESSED; 321 *state = REMOTE_NO_KEY_PRESSED;
240 switch (keybuf[0]) { 322 switch (keybuf[0]) {
@@ -247,10 +329,10 @@ int dvb_usb_nec_rc_key_to_event(struct dvb_usb_device *d,
247 break; 329 break;
248 } 330 }
249 /* See if we can match the raw key code. */ 331 /* See if we can match the raw key code. */
250 for (i = 0; i < d->props.rc_key_map_size; i++) 332 for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++)
251 if (rc5_custom(&keymap[i]) == keybuf[1] && 333 if (rc5_custom(&keymap[i]) == keybuf[1] &&
252 rc5_data(&keymap[i]) == keybuf[3]) { 334 rc5_data(&keymap[i]) == keybuf[3]) {
253 *event = keymap[i].event; 335 *event = keymap[i].keycode;
254 *state = REMOTE_KEY_PRESSED; 336 *state = REMOTE_KEY_PRESSED;
255 return 0; 337 return 0;
256 } 338 }
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb.h b/drivers/media/dvb/dvb-usb/dvb-usb.h
index 4a9f676087bf..34f7b3ba8cc7 100644
--- a/drivers/media/dvb/dvb-usb/dvb-usb.h
+++ b/drivers/media/dvb/dvb-usb/dvb-usb.h
@@ -14,6 +14,7 @@
14#include <linux/usb.h> 14#include <linux/usb.h>
15#include <linux/firmware.h> 15#include <linux/firmware.h>
16#include <linux/mutex.h> 16#include <linux/mutex.h>
17#include <media/ir-core.h>
17 18
18#include "dvb_frontend.h" 19#include "dvb_frontend.h"
19#include "dvb_demux.h" 20#include "dvb_demux.h"
@@ -74,30 +75,19 @@ struct dvb_usb_device_description {
74 struct usb_device_id *warm_ids[DVB_USB_ID_MAX_NUM]; 75 struct usb_device_id *warm_ids[DVB_USB_ID_MAX_NUM];
75}; 76};
76 77
77/** 78static inline u8 rc5_custom(struct ir_scancode *key)
78 * struct dvb_usb_rc_key - a remote control key and its input-event
79 * @custom: the vendor/custom part of the key
80 * @data: the actual key part
81 * @event: the input event assigned to key identified by custom and data
82 */
83struct dvb_usb_rc_key {
84 u16 scan;
85 u32 event;
86};
87
88static inline u8 rc5_custom(struct dvb_usb_rc_key *key)
89{ 79{
90 return (key->scan >> 8) & 0xff; 80 return (key->scancode >> 8) & 0xff;
91} 81}
92 82
93static inline u8 rc5_data(struct dvb_usb_rc_key *key) 83static inline u8 rc5_data(struct ir_scancode *key)
94{ 84{
95 return key->scan & 0xff; 85 return key->scancode & 0xff;
96} 86}
97 87
98static inline u8 rc5_scan(struct dvb_usb_rc_key *key) 88static inline u8 rc5_scan(struct ir_scancode *key)
99{ 89{
100 return key->scan & 0xffff; 90 return key->scancode & 0xffff;
101} 91}
102 92
103struct dvb_usb_device; 93struct dvb_usb_device;
@@ -168,6 +158,55 @@ struct dvb_usb_adapter_properties {
168}; 158};
169 159
170/** 160/**
161 * struct dvb_rc_legacy - old properties of remote controller
162 * @rc_key_map: a hard-wired array of struct ir_scancode (NULL to disable
163 * remote control handling).
164 * @rc_key_map_size: number of items in @rc_key_map.
165 * @rc_query: called to query an event event.
166 * @rc_interval: time in ms between two queries.
167 */
168struct dvb_rc_legacy {
169/* remote control properties */
170#define REMOTE_NO_KEY_PRESSED 0x00
171#define REMOTE_KEY_PRESSED 0x01
172#define REMOTE_KEY_REPEAT 0x02
173 struct ir_scancode *rc_key_map;
174 int rc_key_map_size;
175 int (*rc_query) (struct dvb_usb_device *, u32 *, int *);
176 int rc_interval;
177};
178
179/**
180 * struct dvb_rc properties of remote controller, using rc-core
181 * @rc_codes: name of rc codes table
182 * @protocol: type of protocol(s) currently used by the driver
183 * @rc_query: called to query an event event.
184 * @rc_interval: time in ms between two queries.
185 * @rc_props: remote controller properties
186 * @bulk_mode: device supports bulk mode for RC (disable polling mode)
187 */
188struct dvb_rc {
189 char *rc_codes;
190 u64 protocol;
191 char *module_name;
192 int (*rc_query) (struct dvb_usb_device *d);
193 int rc_interval;
194 struct ir_dev_props rc_props;
195 bool bulk_mode; /* uses bulk mode */
196};
197
198/**
199 * enum dvb_usb_mode - Specifies if it is using a legacy driver or a new one
200 * based on rc-core
201 * This is initialized/used only inside dvb-usb-remote.c.
202 * It shouldn't be set by the drivers.
203 */
204enum dvb_usb_mode {
205 DVB_RC_LEGACY,
206 DVB_RC_CORE,
207};
208
209/**
171 * struct dvb_usb_device_properties - properties of a dvb-usb-device 210 * struct dvb_usb_device_properties - properties of a dvb-usb-device
172 * @usb_ctrl: which USB device-side controller is in use. Needed for firmware 211 * @usb_ctrl: which USB device-side controller is in use. Needed for firmware
173 * download. 212 * download.
@@ -185,11 +224,7 @@ struct dvb_usb_adapter_properties {
185 * @identify_state: called to determine the state (cold or warm), when it 224 * @identify_state: called to determine the state (cold or warm), when it
186 * is not distinguishable by the USB IDs. 225 * is not distinguishable by the USB IDs.
187 * 226 *
188 * @rc_key_map: a hard-wired array of struct dvb_usb_rc_key (NULL to disable 227 * @rc: remote controller properties
189 * remote control handling).
190 * @rc_key_map_size: number of items in @rc_key_map.
191 * @rc_query: called to query an event event.
192 * @rc_interval: time in ms between two queries.
193 * 228 *
194 * @i2c_algo: i2c_algorithm if the device has I2CoverUSB. 229 * @i2c_algo: i2c_algorithm if the device has I2CoverUSB.
195 * 230 *
@@ -233,14 +268,11 @@ struct dvb_usb_device_properties {
233 int (*identify_state) (struct usb_device *, struct dvb_usb_device_properties *, 268 int (*identify_state) (struct usb_device *, struct dvb_usb_device_properties *,
234 struct dvb_usb_device_description **, int *); 269 struct dvb_usb_device_description **, int *);
235 270
236/* remote control properties */ 271 struct {
237#define REMOTE_NO_KEY_PRESSED 0x00 272 enum dvb_usb_mode mode; /* Drivers shouldn't touch on it */
238#define REMOTE_KEY_PRESSED 0x01 273 struct dvb_rc_legacy legacy;
239#define REMOTE_KEY_REPEAT 0x02 274 struct dvb_rc core;
240 struct dvb_usb_rc_key *rc_key_map; 275 } rc;
241 int rc_key_map_size;
242 int (*rc_query) (struct dvb_usb_device *, u32 *, int *);
243 int rc_interval;
244 276
245 struct i2c_algorithm *i2c_algo; 277 struct i2c_algorithm *i2c_algo;
246 278
diff --git a/drivers/media/dvb/dvb-usb/dw2102.c b/drivers/media/dvb/dvb-usb/dw2102.c
index e8fb85380672..774df88dc6e3 100644
--- a/drivers/media/dvb/dvb-usb/dw2102.c
+++ b/drivers/media/dvb/dvb-usb/dw2102.c
@@ -74,7 +74,7 @@
74 "on firmware-problems." 74 "on firmware-problems."
75 75
76struct ir_codes_dvb_usb_table_table { 76struct ir_codes_dvb_usb_table_table {
77 struct dvb_usb_rc_key *rc_keys; 77 struct ir_scancode *rc_keys;
78 int rc_keys_size; 78 int rc_keys_size;
79}; 79};
80 80
@@ -948,7 +948,7 @@ static int dw3101_tuner_attach(struct dvb_usb_adapter *adap)
948 return 0; 948 return 0;
949} 949}
950 950
951static struct dvb_usb_rc_key ir_codes_dw210x_table[] = { 951static struct ir_scancode ir_codes_dw210x_table[] = {
952 { 0xf80a, KEY_Q }, /*power*/ 952 { 0xf80a, KEY_Q }, /*power*/
953 { 0xf80c, KEY_M }, /*mute*/ 953 { 0xf80c, KEY_M }, /*mute*/
954 { 0xf811, KEY_1 }, 954 { 0xf811, KEY_1 },
@@ -982,7 +982,7 @@ static struct dvb_usb_rc_key ir_codes_dw210x_table[] = {
982 { 0xf81b, KEY_B }, /*recall*/ 982 { 0xf81b, KEY_B }, /*recall*/
983}; 983};
984 984
985static struct dvb_usb_rc_key ir_codes_tevii_table[] = { 985static struct ir_scancode ir_codes_tevii_table[] = {
986 { 0xf80a, KEY_POWER }, 986 { 0xf80a, KEY_POWER },
987 { 0xf80c, KEY_MUTE }, 987 { 0xf80c, KEY_MUTE },
988 { 0xf811, KEY_1 }, 988 { 0xf811, KEY_1 },
@@ -1032,7 +1032,7 @@ static struct dvb_usb_rc_key ir_codes_tevii_table[] = {
1032 { 0xf858, KEY_SWITCHVIDEOMODE }, 1032 { 0xf858, KEY_SWITCHVIDEOMODE },
1033}; 1033};
1034 1034
1035static struct dvb_usb_rc_key ir_codes_tbs_table[] = { 1035static struct ir_scancode ir_codes_tbs_table[] = {
1036 { 0xf884, KEY_POWER }, 1036 { 0xf884, KEY_POWER },
1037 { 0xf894, KEY_MUTE }, 1037 { 0xf894, KEY_MUTE },
1038 { 0xf887, KEY_1 }, 1038 { 0xf887, KEY_1 },
@@ -1075,8 +1075,8 @@ static struct ir_codes_dvb_usb_table_table keys_tables[] = {
1075 1075
1076static int dw2102_rc_query(struct dvb_usb_device *d, u32 *event, int *state) 1076static int dw2102_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
1077{ 1077{
1078 struct dvb_usb_rc_key *keymap = d->props.rc_key_map; 1078 struct ir_scancode *keymap = d->props.rc.legacy.rc_key_map;
1079 int keymap_size = d->props.rc_key_map_size; 1079 int keymap_size = d->props.rc.legacy.rc_key_map_size;
1080 u8 key[2]; 1080 u8 key[2];
1081 struct i2c_msg msg = { 1081 struct i2c_msg msg = {
1082 .addr = DW2102_RC_QUERY, 1082 .addr = DW2102_RC_QUERY,
@@ -1096,7 +1096,7 @@ static int dw2102_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
1096 for (i = 0; i < keymap_size ; i++) { 1096 for (i = 0; i < keymap_size ; i++) {
1097 if (rc5_data(&keymap[i]) == msg.buf[0]) { 1097 if (rc5_data(&keymap[i]) == msg.buf[0]) {
1098 *state = REMOTE_KEY_PRESSED; 1098 *state = REMOTE_KEY_PRESSED;
1099 *event = keymap[i].event; 1099 *event = keymap[i].keycode;
1100 break; 1100 break;
1101 } 1101 }
1102 1102
@@ -1185,13 +1185,13 @@ static int dw2102_load_firmware(struct usb_device *dev,
1185 /* init registers */ 1185 /* init registers */
1186 switch (dev->descriptor.idProduct) { 1186 switch (dev->descriptor.idProduct) {
1187 case USB_PID_PROF_1100: 1187 case USB_PID_PROF_1100:
1188 s6x0_properties.rc_key_map = ir_codes_tbs_table; 1188 s6x0_properties.rc.legacy.rc_key_map = ir_codes_tbs_table;
1189 s6x0_properties.rc_key_map_size = 1189 s6x0_properties.rc.legacy.rc_key_map_size =
1190 ARRAY_SIZE(ir_codes_tbs_table); 1190 ARRAY_SIZE(ir_codes_tbs_table);
1191 break; 1191 break;
1192 case USB_PID_TEVII_S650: 1192 case USB_PID_TEVII_S650:
1193 dw2104_properties.rc_key_map = ir_codes_tevii_table; 1193 dw2104_properties.rc.legacy.rc_key_map = ir_codes_tevii_table;
1194 dw2104_properties.rc_key_map_size = 1194 dw2104_properties.rc.legacy.rc_key_map_size =
1195 ARRAY_SIZE(ir_codes_tevii_table); 1195 ARRAY_SIZE(ir_codes_tevii_table);
1196 case USB_PID_DW2104: 1196 case USB_PID_DW2104:
1197 reset = 1; 1197 reset = 1;
@@ -1255,10 +1255,13 @@ static struct dvb_usb_device_properties dw2102_properties = {
1255 .no_reconnect = 1, 1255 .no_reconnect = 1,
1256 1256
1257 .i2c_algo = &dw2102_serit_i2c_algo, 1257 .i2c_algo = &dw2102_serit_i2c_algo,
1258 .rc_key_map = ir_codes_dw210x_table, 1258
1259 .rc_key_map_size = ARRAY_SIZE(ir_codes_dw210x_table), 1259 .rc.legacy = {
1260 .rc_interval = 150, 1260 .rc_key_map = ir_codes_dw210x_table,
1261 .rc_query = dw2102_rc_query, 1261 .rc_key_map_size = ARRAY_SIZE(ir_codes_dw210x_table),
1262 .rc_interval = 150,
1263 .rc_query = dw2102_rc_query,
1264 },
1262 1265
1263 .generic_bulk_ctrl_endpoint = 0x81, 1266 .generic_bulk_ctrl_endpoint = 0x81,
1264 /* parameter for the MPEG2-data transfer */ 1267 /* parameter for the MPEG2-data transfer */
@@ -1306,10 +1309,12 @@ static struct dvb_usb_device_properties dw2104_properties = {
1306 .no_reconnect = 1, 1309 .no_reconnect = 1,
1307 1310
1308 .i2c_algo = &dw2104_i2c_algo, 1311 .i2c_algo = &dw2104_i2c_algo,
1309 .rc_key_map = ir_codes_dw210x_table, 1312 .rc.legacy = {
1310 .rc_key_map_size = ARRAY_SIZE(ir_codes_dw210x_table), 1313 .rc_key_map = ir_codes_dw210x_table,
1311 .rc_interval = 150, 1314 .rc_key_map_size = ARRAY_SIZE(ir_codes_dw210x_table),
1312 .rc_query = dw2102_rc_query, 1315 .rc_interval = 150,
1316 .rc_query = dw2102_rc_query,
1317 },
1313 1318
1314 .generic_bulk_ctrl_endpoint = 0x81, 1319 .generic_bulk_ctrl_endpoint = 0x81,
1315 /* parameter for the MPEG2-data transfer */ 1320 /* parameter for the MPEG2-data transfer */
@@ -1353,10 +1358,12 @@ static struct dvb_usb_device_properties dw3101_properties = {
1353 .no_reconnect = 1, 1358 .no_reconnect = 1,
1354 1359
1355 .i2c_algo = &dw3101_i2c_algo, 1360 .i2c_algo = &dw3101_i2c_algo,
1356 .rc_key_map = ir_codes_dw210x_table, 1361 .rc.legacy = {
1357 .rc_key_map_size = ARRAY_SIZE(ir_codes_dw210x_table), 1362 .rc_key_map = ir_codes_dw210x_table,
1358 .rc_interval = 150, 1363 .rc_key_map_size = ARRAY_SIZE(ir_codes_dw210x_table),
1359 .rc_query = dw2102_rc_query, 1364 .rc_interval = 150,
1365 .rc_query = dw2102_rc_query,
1366 },
1360 1367
1361 .generic_bulk_ctrl_endpoint = 0x81, 1368 .generic_bulk_ctrl_endpoint = 0x81,
1362 /* parameter for the MPEG2-data transfer */ 1369 /* parameter for the MPEG2-data transfer */
@@ -1396,10 +1403,12 @@ static struct dvb_usb_device_properties s6x0_properties = {
1396 .no_reconnect = 1, 1403 .no_reconnect = 1,
1397 1404
1398 .i2c_algo = &s6x0_i2c_algo, 1405 .i2c_algo = &s6x0_i2c_algo,
1399 .rc_key_map = ir_codes_tevii_table, 1406 .rc.legacy = {
1400 .rc_key_map_size = ARRAY_SIZE(ir_codes_tevii_table), 1407 .rc_key_map = ir_codes_tevii_table,
1401 .rc_interval = 150, 1408 .rc_key_map_size = ARRAY_SIZE(ir_codes_tevii_table),
1402 .rc_query = dw2102_rc_query, 1409 .rc_interval = 150,
1410 .rc_query = dw2102_rc_query,
1411 },
1403 1412
1404 .generic_bulk_ctrl_endpoint = 0x81, 1413 .generic_bulk_ctrl_endpoint = 0x81,
1405 .num_adapters = 1, 1414 .num_adapters = 1,
@@ -1459,8 +1468,8 @@ static int dw2102_probe(struct usb_interface *intf,
1459 /* fill only different fields */ 1468 /* fill only different fields */
1460 p7500->firmware = "dvb-usb-p7500.fw"; 1469 p7500->firmware = "dvb-usb-p7500.fw";
1461 p7500->devices[0] = d7500; 1470 p7500->devices[0] = d7500;
1462 p7500->rc_key_map = ir_codes_tbs_table; 1471 p7500->rc.legacy.rc_key_map = ir_codes_tbs_table;
1463 p7500->rc_key_map_size = ARRAY_SIZE(ir_codes_tbs_table); 1472 p7500->rc.legacy.rc_key_map_size = ARRAY_SIZE(ir_codes_tbs_table);
1464 p7500->adapter->frontend_attach = prof_7500_frontend_attach; 1473 p7500->adapter->frontend_attach = prof_7500_frontend_attach;
1465 1474
1466 if (0 == dvb_usb_device_init(intf, &dw2102_properties, 1475 if (0 == dvb_usb_device_init(intf, &dw2102_properties,
diff --git a/drivers/media/dvb/dvb-usb/gp8psk-fe.c b/drivers/media/dvb/dvb-usb/gp8psk-fe.c
index 7a7f1b2b681c..dbdb5347b2a8 100644
--- a/drivers/media/dvb/dvb-usb/gp8psk-fe.c
+++ b/drivers/media/dvb/dvb-usb/gp8psk-fe.c
@@ -349,7 +349,7 @@ static struct dvb_frontend_ops gp8psk_fe_ops = {
349 * FE_CAN_QAM_16 is for compatibility 349 * FE_CAN_QAM_16 is for compatibility
350 * (Myth incorrectly detects Turbo-QPSK as plain QAM-16) 350 * (Myth incorrectly detects Turbo-QPSK as plain QAM-16)
351 */ 351 */
352 FE_CAN_QPSK | FE_CAN_QAM_16 352 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_TURBO_FEC
353 }, 353 },
354 354
355 .release = gp8psk_fe_release, 355 .release = gp8psk_fe_release,
diff --git a/drivers/media/dvb/dvb-usb/m920x.c b/drivers/media/dvb/dvb-usb/m920x.c
index c211fef45fc3..bdef1a18b664 100644
--- a/drivers/media/dvb/dvb-usb/m920x.c
+++ b/drivers/media/dvb/dvb-usb/m920x.c
@@ -69,7 +69,7 @@ static int m920x_init(struct dvb_usb_device *d, struct m920x_inits *rc_seq)
69 int adap_enabled[M9206_MAX_ADAPTERS] = { 0 }; 69 int adap_enabled[M9206_MAX_ADAPTERS] = { 0 };
70 70
71 /* Remote controller init. */ 71 /* Remote controller init. */
72 if (d->props.rc_query) { 72 if (d->props.rc.legacy.rc_query) {
73 deb("Initialising remote control\n"); 73 deb("Initialising remote control\n");
74 while (rc_seq->address) { 74 while (rc_seq->address) {
75 if ((ret = m920x_write(d->udev, M9206_CORE, 75 if ((ret = m920x_write(d->udev, M9206_CORE,
@@ -142,9 +142,9 @@ static int m920x_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
142 if ((ret = m920x_read(d->udev, M9206_CORE, 0x0, M9206_RC_KEY, rc_state + 1, 1)) != 0) 142 if ((ret = m920x_read(d->udev, M9206_CORE, 0x0, M9206_RC_KEY, rc_state + 1, 1)) != 0)
143 goto unlock; 143 goto unlock;
144 144
145 for (i = 0; i < d->props.rc_key_map_size; i++) 145 for (i = 0; i < d->props.rc.legacy.rc_key_map_size; i++)
146 if (rc5_data(&d->props.rc_key_map[i]) == rc_state[1]) { 146 if (rc5_data(&d->props.rc.legacy.rc_key_map[i]) == rc_state[1]) {
147 *event = d->props.rc_key_map[i].event; 147 *event = d->props.rc.legacy.rc_key_map[i].keycode;
148 148
149 switch(rc_state[0]) { 149 switch(rc_state[0]) {
150 case 0x80: 150 case 0x80:
@@ -589,7 +589,7 @@ static struct m920x_inits pinnacle310e_init[] = {
589}; 589};
590 590
591/* ir keymaps */ 591/* ir keymaps */
592static struct dvb_usb_rc_key ir_codes_megasky_table [] = { 592static struct ir_scancode ir_codes_megasky_table[] = {
593 { 0x0012, KEY_POWER }, 593 { 0x0012, KEY_POWER },
594 { 0x001e, KEY_CYCLEWINDOWS }, /* min/max */ 594 { 0x001e, KEY_CYCLEWINDOWS }, /* min/max */
595 { 0x0002, KEY_CHANNELUP }, 595 { 0x0002, KEY_CHANNELUP },
@@ -608,7 +608,7 @@ static struct dvb_usb_rc_key ir_codes_megasky_table [] = {
608 { 0x000e, KEY_COFFEE }, /* "MTS" */ 608 { 0x000e, KEY_COFFEE }, /* "MTS" */
609}; 609};
610 610
611static struct dvb_usb_rc_key ir_codes_tvwalkertwin_table [] = { 611static struct ir_scancode ir_codes_tvwalkertwin_table[] = {
612 { 0x0001, KEY_ZOOM }, /* Full Screen */ 612 { 0x0001, KEY_ZOOM }, /* Full Screen */
613 { 0x0002, KEY_CAMERA }, /* snapshot */ 613 { 0x0002, KEY_CAMERA }, /* snapshot */
614 { 0x0003, KEY_MUTE }, 614 { 0x0003, KEY_MUTE },
@@ -628,7 +628,7 @@ static struct dvb_usb_rc_key ir_codes_tvwalkertwin_table [] = {
628 { 0x001e, KEY_VOLUMEUP }, 628 { 0x001e, KEY_VOLUMEUP },
629}; 629};
630 630
631static struct dvb_usb_rc_key ir_codes_pinnacle310e_table[] = { 631static struct ir_scancode ir_codes_pinnacle310e_table[] = {
632 { 0x16, KEY_POWER }, 632 { 0x16, KEY_POWER },
633 { 0x17, KEY_FAVORITES }, 633 { 0x17, KEY_FAVORITES },
634 { 0x0f, KEY_TEXT }, 634 { 0x0f, KEY_TEXT },
@@ -784,10 +784,12 @@ static struct dvb_usb_device_properties megasky_properties = {
784 .firmware = "dvb-usb-megasky-02.fw", 784 .firmware = "dvb-usb-megasky-02.fw",
785 .download_firmware = m920x_firmware_download, 785 .download_firmware = m920x_firmware_download,
786 786
787 .rc_interval = 100, 787 .rc.legacy = {
788 .rc_key_map = ir_codes_megasky_table, 788 .rc_interval = 100,
789 .rc_key_map_size = ARRAY_SIZE(ir_codes_megasky_table), 789 .rc_key_map = ir_codes_megasky_table,
790 .rc_query = m920x_rc_query, 790 .rc_key_map_size = ARRAY_SIZE(ir_codes_megasky_table),
791 .rc_query = m920x_rc_query,
792 },
791 793
792 .size_of_priv = sizeof(struct m920x_state), 794 .size_of_priv = sizeof(struct m920x_state),
793 795
@@ -885,10 +887,12 @@ static struct dvb_usb_device_properties tvwalkertwin_properties = {
885 .firmware = "dvb-usb-tvwalkert.fw", 887 .firmware = "dvb-usb-tvwalkert.fw",
886 .download_firmware = m920x_firmware_download, 888 .download_firmware = m920x_firmware_download,
887 889
888 .rc_interval = 100, 890 .rc.legacy = {
889 .rc_key_map = ir_codes_tvwalkertwin_table, 891 .rc_interval = 100,
890 .rc_key_map_size = ARRAY_SIZE(ir_codes_tvwalkertwin_table), 892 .rc_key_map = ir_codes_tvwalkertwin_table,
891 .rc_query = m920x_rc_query, 893 .rc_key_map_size = ARRAY_SIZE(ir_codes_tvwalkertwin_table),
894 .rc_query = m920x_rc_query,
895 },
892 896
893 .size_of_priv = sizeof(struct m920x_state), 897 .size_of_priv = sizeof(struct m920x_state),
894 898
@@ -992,10 +996,12 @@ static struct dvb_usb_device_properties pinnacle_pctv310e_properties = {
992 .usb_ctrl = DEVICE_SPECIFIC, 996 .usb_ctrl = DEVICE_SPECIFIC,
993 .download_firmware = NULL, 997 .download_firmware = NULL,
994 998
995 .rc_interval = 100, 999 .rc.legacy = {
996 .rc_key_map = ir_codes_pinnacle310e_table, 1000 .rc_interval = 100,
997 .rc_key_map_size = ARRAY_SIZE(ir_codes_pinnacle310e_table), 1001 .rc_key_map = ir_codes_pinnacle310e_table,
998 .rc_query = m920x_rc_query, 1002 .rc_key_map_size = ARRAY_SIZE(ir_codes_pinnacle310e_table),
1003 .rc_query = m920x_rc_query,
1004 },
999 1005
1000 .size_of_priv = sizeof(struct m920x_state), 1006 .size_of_priv = sizeof(struct m920x_state),
1001 1007
diff --git a/drivers/media/dvb/dvb-usb/nova-t-usb2.c b/drivers/media/dvb/dvb-usb/nova-t-usb2.c
index d195a587cc65..181f36a12e2a 100644
--- a/drivers/media/dvb/dvb-usb/nova-t-usb2.c
+++ b/drivers/media/dvb/dvb-usb/nova-t-usb2.c
@@ -21,7 +21,7 @@ DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
21#define deb_ee(args...) dprintk(debug,0x02,args) 21#define deb_ee(args...) dprintk(debug,0x02,args)
22 22
23/* Hauppauge NOVA-T USB2 keys */ 23/* Hauppauge NOVA-T USB2 keys */
24static struct dvb_usb_rc_key ir_codes_haupp_table [] = { 24static struct ir_scancode ir_codes_haupp_table[] = {
25 { 0x1e00, KEY_0 }, 25 { 0x1e00, KEY_0 },
26 { 0x1e01, KEY_1 }, 26 { 0x1e01, KEY_1 },
27 { 0x1e02, KEY_2 }, 27 { 0x1e02, KEY_2 },
@@ -98,7 +98,7 @@ static int nova_t_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
98 deb_rc("c: %x, d: %x\n", rc5_data(&ir_codes_haupp_table[i]), 98 deb_rc("c: %x, d: %x\n", rc5_data(&ir_codes_haupp_table[i]),
99 rc5_custom(&ir_codes_haupp_table[i])); 99 rc5_custom(&ir_codes_haupp_table[i]));
100 100
101 *event = ir_codes_haupp_table[i].event; 101 *event = ir_codes_haupp_table[i].keycode;
102 *state = REMOTE_KEY_PRESSED; 102 *state = REMOTE_KEY_PRESSED;
103 if (st->old_toggle == toggle) { 103 if (st->old_toggle == toggle) {
104 if (st->last_repeat_count++ < 2) 104 if (st->last_repeat_count++ < 2)
@@ -195,10 +195,12 @@ static struct dvb_usb_device_properties nova_t_properties = {
195 .power_ctrl = dibusb2_0_power_ctrl, 195 .power_ctrl = dibusb2_0_power_ctrl,
196 .read_mac_address = nova_t_read_mac_address, 196 .read_mac_address = nova_t_read_mac_address,
197 197
198 .rc_interval = 100, 198 .rc.legacy = {
199 .rc_key_map = ir_codes_haupp_table, 199 .rc_interval = 100,
200 .rc_key_map_size = ARRAY_SIZE(ir_codes_haupp_table), 200 .rc_key_map = ir_codes_haupp_table,
201 .rc_query = nova_t_rc_query, 201 .rc_key_map_size = ARRAY_SIZE(ir_codes_haupp_table),
202 .rc_query = nova_t_rc_query,
203 },
202 204
203 .i2c_algo = &dibusb_i2c_algo, 205 .i2c_algo = &dibusb_i2c_algo,
204 206
diff --git a/drivers/media/dvb/dvb-usb/opera1.c b/drivers/media/dvb/dvb-usb/opera1.c
index dfb81ff1d9a7..6b22ec64ab0c 100644
--- a/drivers/media/dvb/dvb-usb/opera1.c
+++ b/drivers/media/dvb/dvb-usb/opera1.c
@@ -331,7 +331,7 @@ static int opera1_pid_filter_control(struct dvb_usb_adapter *adap, int onoff)
331 return 0; 331 return 0;
332} 332}
333 333
334static struct dvb_usb_rc_key ir_codes_opera1_table[] = { 334static struct ir_scancode ir_codes_opera1_table[] = {
335 {0x5fa0, KEY_1}, 335 {0x5fa0, KEY_1},
336 {0x51af, KEY_2}, 336 {0x51af, KEY_2},
337 {0x5da2, KEY_3}, 337 {0x5da2, KEY_3},
@@ -407,9 +407,9 @@ static int opera1_rc_query(struct dvb_usb_device *dev, u32 * event, int *state)
407 for (i = 0; i < ARRAY_SIZE(ir_codes_opera1_table); i++) { 407 for (i = 0; i < ARRAY_SIZE(ir_codes_opera1_table); i++) {
408 if (rc5_scan(&ir_codes_opera1_table[i]) == (send_key & 0xffff)) { 408 if (rc5_scan(&ir_codes_opera1_table[i]) == (send_key & 0xffff)) {
409 *state = REMOTE_KEY_PRESSED; 409 *state = REMOTE_KEY_PRESSED;
410 *event = ir_codes_opera1_table[i].event; 410 *event = ir_codes_opera1_table[i].keycode;
411 opst->last_key_pressed = 411 opst->last_key_pressed =
412 ir_codes_opera1_table[i].event; 412 ir_codes_opera1_table[i].keycode;
413 break; 413 break;
414 } 414 }
415 opst->last_key_pressed = 0; 415 opst->last_key_pressed = 0;
@@ -498,10 +498,12 @@ static struct dvb_usb_device_properties opera1_properties = {
498 .power_ctrl = opera1_power_ctrl, 498 .power_ctrl = opera1_power_ctrl,
499 .i2c_algo = &opera1_i2c_algo, 499 .i2c_algo = &opera1_i2c_algo,
500 500
501 .rc_key_map = ir_codes_opera1_table, 501 .rc.legacy = {
502 .rc_key_map_size = ARRAY_SIZE(ir_codes_opera1_table), 502 .rc_key_map = ir_codes_opera1_table,
503 .rc_interval = 200, 503 .rc_key_map_size = ARRAY_SIZE(ir_codes_opera1_table),
504 .rc_query = opera1_rc_query, 504 .rc_interval = 200,
505 .rc_query = opera1_rc_query,
506 },
505 .read_mac_address = opera1_read_mac_address, 507 .read_mac_address = opera1_read_mac_address,
506 .generic_bulk_ctrl_endpoint = 0x00, 508 .generic_bulk_ctrl_endpoint = 0x00,
507 /* parameter for the MPEG2-data transfer */ 509 /* parameter for the MPEG2-data transfer */
diff --git a/drivers/media/dvb/dvb-usb/vp702x.c b/drivers/media/dvb/dvb-usb/vp702x.c
index 4d332451653b..5c9f3275aaa0 100644
--- a/drivers/media/dvb/dvb-usb/vp702x.c
+++ b/drivers/media/dvb/dvb-usb/vp702x.c
@@ -174,7 +174,7 @@ static int vp702x_streaming_ctrl(struct dvb_usb_adapter *adap, int onoff)
174} 174}
175 175
176/* keys for the enclosed remote control */ 176/* keys for the enclosed remote control */
177static struct dvb_usb_rc_key ir_codes_vp702x_table[] = { 177static struct ir_scancode ir_codes_vp702x_table[] = {
178 { 0x0001, KEY_1 }, 178 { 0x0001, KEY_1 },
179 { 0x0002, KEY_2 }, 179 { 0x0002, KEY_2 },
180}; 180};
@@ -200,7 +200,7 @@ static int vp702x_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
200 for (i = 0; i < ARRAY_SIZE(ir_codes_vp702x_table); i++) 200 for (i = 0; i < ARRAY_SIZE(ir_codes_vp702x_table); i++)
201 if (rc5_custom(&ir_codes_vp702x_table[i]) == key[1]) { 201 if (rc5_custom(&ir_codes_vp702x_table[i]) == key[1]) {
202 *state = REMOTE_KEY_PRESSED; 202 *state = REMOTE_KEY_PRESSED;
203 *event = ir_codes_vp702x_table[i].event; 203 *event = ir_codes_vp702x_table[i].keycode;
204 break; 204 break;
205 } 205 }
206 return 0; 206 return 0;
@@ -283,10 +283,12 @@ static struct dvb_usb_device_properties vp702x_properties = {
283 }, 283 },
284 .read_mac_address = vp702x_read_mac_addr, 284 .read_mac_address = vp702x_read_mac_addr,
285 285
286 .rc_key_map = ir_codes_vp702x_table, 286 .rc.legacy = {
287 .rc_key_map_size = ARRAY_SIZE(ir_codes_vp702x_table), 287 .rc_key_map = ir_codes_vp702x_table,
288 .rc_interval = 400, 288 .rc_key_map_size = ARRAY_SIZE(ir_codes_vp702x_table),
289 .rc_query = vp702x_rc_query, 289 .rc_interval = 400,
290 .rc_query = vp702x_rc_query,
291 },
290 292
291 .num_device_descs = 1, 293 .num_device_descs = 1,
292 .devices = { 294 .devices = {
diff --git a/drivers/media/dvb/dvb-usb/vp7045.c b/drivers/media/dvb/dvb-usb/vp7045.c
index 036893fa4480..f13791ca5994 100644
--- a/drivers/media/dvb/dvb-usb/vp7045.c
+++ b/drivers/media/dvb/dvb-usb/vp7045.c
@@ -99,7 +99,7 @@ static int vp7045_power_ctrl(struct dvb_usb_device *d, int onoff)
99 99
100/* The keymapping struct. Somehow this should be loaded to the driver, but 100/* The keymapping struct. Somehow this should be loaded to the driver, but
101 * currently it is hardcoded. */ 101 * currently it is hardcoded. */
102static struct dvb_usb_rc_key ir_codes_vp7045_table[] = { 102static struct ir_scancode ir_codes_vp7045_table[] = {
103 { 0x0016, KEY_POWER }, 103 { 0x0016, KEY_POWER },
104 { 0x0010, KEY_MUTE }, 104 { 0x0010, KEY_MUTE },
105 { 0x0003, KEY_1 }, 105 { 0x0003, KEY_1 },
@@ -168,7 +168,7 @@ static int vp7045_rc_query(struct dvb_usb_device *d, u32 *event, int *state)
168 for (i = 0; i < ARRAY_SIZE(ir_codes_vp7045_table); i++) 168 for (i = 0; i < ARRAY_SIZE(ir_codes_vp7045_table); i++)
169 if (rc5_data(&ir_codes_vp7045_table[i]) == key) { 169 if (rc5_data(&ir_codes_vp7045_table[i]) == key) {
170 *state = REMOTE_KEY_PRESSED; 170 *state = REMOTE_KEY_PRESSED;
171 *event = ir_codes_vp7045_table[i].event; 171 *event = ir_codes_vp7045_table[i].keycode;
172 break; 172 break;
173 } 173 }
174 return 0; 174 return 0;
@@ -259,10 +259,12 @@ static struct dvb_usb_device_properties vp7045_properties = {
259 .power_ctrl = vp7045_power_ctrl, 259 .power_ctrl = vp7045_power_ctrl,
260 .read_mac_address = vp7045_read_mac_addr, 260 .read_mac_address = vp7045_read_mac_addr,
261 261
262 .rc_interval = 400, 262 .rc.legacy = {
263 .rc_key_map = ir_codes_vp7045_table, 263 .rc_interval = 400,
264 .rc_key_map_size = ARRAY_SIZE(ir_codes_vp7045_table), 264 .rc_key_map = ir_codes_vp7045_table,
265 .rc_query = vp7045_rc_query, 265 .rc_key_map_size = ARRAY_SIZE(ir_codes_vp7045_table),
266 .rc_query = vp7045_rc_query,
267 },
266 268
267 .num_device_descs = 2, 269 .num_device_descs = 2,
268 .devices = { 270 .devices = {
diff --git a/drivers/media/dvb/frontends/Kconfig b/drivers/media/dvb/frontends/Kconfig
index cd7f9b7cbffa..51d578a758a7 100644
--- a/drivers/media/dvb/frontends/Kconfig
+++ b/drivers/media/dvb/frontends/Kconfig
@@ -584,6 +584,7 @@ config DVB_LGS8GL5
584config DVB_LGS8GXX 584config DVB_LGS8GXX
585 tristate "Legend Silicon LGS8913/LGS8GL5/LGS8GXX DMB-TH demodulator" 585 tristate "Legend Silicon LGS8913/LGS8GL5/LGS8GXX DMB-TH demodulator"
586 depends on DVB_CORE && I2C 586 depends on DVB_CORE && I2C
587 select FW_LOADER
587 default m if DVB_FE_CUSTOMISE 588 default m if DVB_FE_CUSTOMISE
588 help 589 help
589 A DMB-TH tuner module. Say Y when you want to support this frontend. 590 A DMB-TH tuner module. Say Y when you want to support this frontend.
diff --git a/drivers/media/dvb/frontends/af9013.c b/drivers/media/dvb/frontends/af9013.c
index 12e018b4107d..dac917f7bb7f 100644
--- a/drivers/media/dvb/frontends/af9013.c
+++ b/drivers/media/dvb/frontends/af9013.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * DVB USB Linux driver for Afatech AF9015 DVB-T USB2.0 receiver 2 * Afatech AF9013 demodulator driver
3 * 3 *
4 * Copyright (C) 2007 Antti Palosaari <crope@iki.fi> 4 * Copyright (C) 2007 Antti Palosaari <crope@iki.fi>
5 * 5 *
@@ -761,6 +761,10 @@ static int af9013_set_frontend(struct dvb_frontend *fe,
761 761
762 state->frequency = params->frequency; 762 state->frequency = params->frequency;
763 763
764 /* program tuner */
765 if (fe->ops.tuner_ops.set_params)
766 fe->ops.tuner_ops.set_params(fe, params);
767
764 /* program CFOE coefficients */ 768 /* program CFOE coefficients */
765 ret = af9013_set_coeff(state, params->u.ofdm.bandwidth); 769 ret = af9013_set_coeff(state, params->u.ofdm.bandwidth);
766 if (ret) 770 if (ret)
@@ -791,10 +795,6 @@ static int af9013_set_frontend(struct dvb_frontend *fe,
791 if (ret) 795 if (ret)
792 goto error; 796 goto error;
793 797
794 /* program tuner */
795 if (fe->ops.tuner_ops.set_params)
796 fe->ops.tuner_ops.set_params(fe, params);
797
798 /* program TPS and bandwidth, check if auto mode needed */ 798 /* program TPS and bandwidth, check if auto mode needed */
799 ret = af9013_set_ofdm_params(state, &params->u.ofdm, &auto_mode); 799 ret = af9013_set_ofdm_params(state, &params->u.ofdm, &auto_mode);
800 if (ret) 800 if (ret)
@@ -1184,45 +1184,49 @@ static int af9013_read_status(struct dvb_frontend *fe, fe_status_t *status)
1184 u8 tmp; 1184 u8 tmp;
1185 *status = 0; 1185 *status = 0;
1186 1186
1187 /* TPS lock */
1188 ret = af9013_read_reg_bits(state, 0xd330, 3, 1, &tmp);
1189 if (ret)
1190 goto error;
1191 if (tmp)
1192 *status |= FE_HAS_VITERBI | FE_HAS_CARRIER | FE_HAS_SIGNAL;
1193
1194 /* MPEG2 lock */ 1187 /* MPEG2 lock */
1195 ret = af9013_read_reg_bits(state, 0xd507, 6, 1, &tmp); 1188 ret = af9013_read_reg_bits(state, 0xd507, 6, 1, &tmp);
1196 if (ret) 1189 if (ret)
1197 goto error; 1190 goto error;
1198 if (tmp) 1191 if (tmp)
1199 *status |= FE_HAS_SYNC | FE_HAS_LOCK; 1192 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI |
1193 FE_HAS_SYNC | FE_HAS_LOCK;
1200 1194
1201 if (!(*status & FE_HAS_SIGNAL)) { 1195 if (!*status) {
1202 /* AGC lock */ 1196 /* TPS lock */
1203 ret = af9013_read_reg_bits(state, 0xd1a0, 6, 1, &tmp); 1197 ret = af9013_read_reg_bits(state, 0xd330, 3, 1, &tmp);
1204 if (ret) 1198 if (ret)
1205 goto error; 1199 goto error;
1206 if (tmp) 1200 if (tmp)
1207 *status |= FE_HAS_SIGNAL; 1201 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
1202 FE_HAS_VITERBI;
1208 } 1203 }
1209 1204
1210 if (!(*status & FE_HAS_CARRIER)) { 1205 if (!*status) {
1211 /* CFO lock */ 1206 /* CFO lock */
1212 ret = af9013_read_reg_bits(state, 0xd333, 7, 1, &tmp); 1207 ret = af9013_read_reg_bits(state, 0xd333, 7, 1, &tmp);
1213 if (ret) 1208 if (ret)
1214 goto error; 1209 goto error;
1215 if (tmp) 1210 if (tmp)
1216 *status |= FE_HAS_CARRIER; 1211 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
1217 } 1212 }
1218 1213
1219 if (!(*status & FE_HAS_CARRIER)) { 1214 if (!*status) {
1220 /* SFOE lock */ 1215 /* SFOE lock */
1221 ret = af9013_read_reg_bits(state, 0xd334, 6, 1, &tmp); 1216 ret = af9013_read_reg_bits(state, 0xd334, 6, 1, &tmp);
1222 if (ret) 1217 if (ret)
1223 goto error; 1218 goto error;
1224 if (tmp) 1219 if (tmp)
1225 *status |= FE_HAS_CARRIER; 1220 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
1221 }
1222
1223 if (!*status) {
1224 /* AGC lock */
1225 ret = af9013_read_reg_bits(state, 0xd1a0, 6, 1, &tmp);
1226 if (ret)
1227 goto error;
1228 if (tmp)
1229 *status |= FE_HAS_SIGNAL;
1226 } 1230 }
1227 1231
1228 ret = af9013_update_statistics(fe); 1232 ret = af9013_update_statistics(fe);
@@ -1574,7 +1578,7 @@ struct dvb_frontend *af9013_attach(const struct af9013_config *config,
1574{ 1578{
1575 int ret; 1579 int ret;
1576 struct af9013_state *state = NULL; 1580 struct af9013_state *state = NULL;
1577 u8 buf[3], i; 1581 u8 buf[4], i;
1578 1582
1579 /* allocate memory for the internal state */ 1583 /* allocate memory for the internal state */
1580 state = kzalloc(sizeof(struct af9013_state), GFP_KERNEL); 1584 state = kzalloc(sizeof(struct af9013_state), GFP_KERNEL);
@@ -1607,12 +1611,12 @@ struct dvb_frontend *af9013_attach(const struct af9013_config *config,
1607 } 1611 }
1608 1612
1609 /* firmware version */ 1613 /* firmware version */
1610 for (i = 0; i < 3; i++) { 1614 for (i = 0; i < 4; i++) {
1611 ret = af9013_read_reg(state, 0x5103 + i, &buf[i]); 1615 ret = af9013_read_reg(state, 0x5103 + i, &buf[i]);
1612 if (ret) 1616 if (ret)
1613 goto error; 1617 goto error;
1614 } 1618 }
1615 info("firmware version:%d.%d.%d", buf[0], buf[1], buf[2]); 1619 info("firmware version:%d.%d.%d.%d", buf[0], buf[1], buf[2], buf[3]);
1616 1620
1617 /* settings for mp2if */ 1621 /* settings for mp2if */
1618 if (state->config.output_mode == AF9013_OUTPUT_MODE_USB) { 1622 if (state->config.output_mode == AF9013_OUTPUT_MODE_USB) {
diff --git a/drivers/media/dvb/frontends/af9013.h b/drivers/media/dvb/frontends/af9013.h
index e90fa92b1c1d..72c71bb5d117 100644
--- a/drivers/media/dvb/frontends/af9013.h
+++ b/drivers/media/dvb/frontends/af9013.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * DVB USB Linux driver for Afatech AF9015 DVB-T USB2.0 receiver 2 * Afatech AF9013 demodulator driver
3 * 3 *
4 * Copyright (C) 2007 Antti Palosaari <crope@iki.fi> 4 * Copyright (C) 2007 Antti Palosaari <crope@iki.fi>
5 * 5 *
diff --git a/drivers/media/dvb/frontends/af9013_priv.h b/drivers/media/dvb/frontends/af9013_priv.h
index 163e251d0b73..0fd42b7e248e 100644
--- a/drivers/media/dvb/frontends/af9013_priv.h
+++ b/drivers/media/dvb/frontends/af9013_priv.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * DVB USB Linux driver for Afatech AF9015 DVB-T USB2.0 receiver 2 * Afatech AF9013 demodulator driver
3 * 3 *
4 * Copyright (C) 2007 Antti Palosaari <crope@iki.fi> 4 * Copyright (C) 2007 Antti Palosaari <crope@iki.fi>
5 * 5 *
@@ -132,6 +132,8 @@ static struct regdesc ofsm_init[] = {
132 { 0xd740, 2, 1, 0x00 }, 132 { 0xd740, 2, 1, 0x00 },
133 { 0xd740, 3, 1, 0x01 }, 133 { 0xd740, 3, 1, 0x01 },
134 { 0xd3c1, 4, 1, 0x01 }, 134 { 0xd3c1, 4, 1, 0x01 },
135 { 0x9124, 0, 8, 0x58 },
136 { 0x9125, 0, 2, 0x02 },
135 { 0xd3a2, 0, 8, 0x00 }, 137 { 0xd3a2, 0, 8, 0x00 },
136 { 0xd3a3, 0, 8, 0x04 }, 138 { 0xd3a3, 0, 8, 0x04 },
137 { 0xd305, 0, 8, 0x32 }, 139 { 0xd305, 0, 8, 0x32 },
@@ -143,7 +145,7 @@ static struct regdesc ofsm_init[] = {
143 { 0x911b, 0, 1, 0x01 }, 145 { 0x911b, 0, 1, 0x01 },
144 { 0x9bce, 0, 4, 0x02 }, 146 { 0x9bce, 0, 4, 0x02 },
145 { 0x9116, 0, 1, 0x01 }, 147 { 0x9116, 0, 1, 0x01 },
146 { 0x9bd1, 0, 1, 0x01 }, 148 { 0x9122, 0, 8, 0xd0 },
147 { 0xd2e0, 0, 8, 0xd0 }, 149 { 0xd2e0, 0, 8, 0xd0 },
148 { 0xd2e9, 0, 4, 0x0d }, 150 { 0xd2e9, 0, 4, 0x0d },
149 { 0xd38c, 0, 8, 0xfc }, 151 { 0xd38c, 0, 8, 0xfc },
@@ -165,7 +167,6 @@ static struct regdesc ofsm_init[] = {
165 { 0xd081, 4, 4, 0x09 }, 167 { 0xd081, 4, 4, 0x09 },
166 { 0xd098, 4, 4, 0x0f }, 168 { 0xd098, 4, 4, 0x0f },
167 { 0xd098, 0, 4, 0x03 }, 169 { 0xd098, 0, 4, 0x03 },
168 { 0xdbc0, 3, 1, 0x01 },
169 { 0xdbc0, 4, 1, 0x01 }, 170 { 0xdbc0, 4, 1, 0x01 },
170 { 0xdbc7, 0, 8, 0x08 }, 171 { 0xdbc7, 0, 8, 0x08 },
171 { 0xdbc8, 4, 4, 0x00 }, 172 { 0xdbc8, 4, 4, 0x00 },
@@ -179,6 +180,7 @@ static struct regdesc ofsm_init[] = {
179 { 0xd0f0, 0, 7, 0x1a }, 180 { 0xd0f0, 0, 7, 0x1a },
180 { 0xd0f1, 4, 1, 0x01 }, 181 { 0xd0f1, 4, 1, 0x01 },
181 { 0xd0f2, 0, 8, 0x0c }, 182 { 0xd0f2, 0, 8, 0x0c },
183 { 0xd101, 5, 3, 0x06 },
182 { 0xd103, 0, 4, 0x08 }, 184 { 0xd103, 0, 4, 0x08 },
183 { 0xd0f8, 0, 7, 0x20 }, 185 { 0xd0f8, 0, 7, 0x20 },
184 { 0xd111, 5, 1, 0x00 }, 186 { 0xd111, 5, 1, 0x00 },
diff --git a/drivers/media/dvb/frontends/dib3000mb.c b/drivers/media/dvb/frontends/dib3000mb.c
index ad4c8cfd8090..e80c59796368 100644
--- a/drivers/media/dvb/frontends/dib3000mb.c
+++ b/drivers/media/dvb/frontends/dib3000mb.c
@@ -38,11 +38,10 @@
38#define DRIVER_DESC "DiBcom 3000M-B DVB-T demodulator" 38#define DRIVER_DESC "DiBcom 3000M-B DVB-T demodulator"
39#define DRIVER_AUTHOR "Patrick Boettcher, patrick.boettcher@desy.de" 39#define DRIVER_AUTHOR "Patrick Boettcher, patrick.boettcher@desy.de"
40 40
41#ifdef CONFIG_DVB_DIBCOM_DEBUG
42static int debug; 41static int debug;
43module_param(debug, int, 0644); 42module_param(debug, int, 0644);
44MODULE_PARM_DESC(debug, "set debugging level (1=info,2=xfer,4=setfe,8=getfe (|-able))."); 43MODULE_PARM_DESC(debug, "set debugging level (1=info,2=xfer,4=setfe,8=getfe (|-able)).");
45#endif 44
46#define deb_info(args...) dprintk(0x01,args) 45#define deb_info(args...) dprintk(0x01,args)
47#define deb_i2c(args...) dprintk(0x02,args) 46#define deb_i2c(args...) dprintk(0x02,args)
48#define deb_srch(args...) dprintk(0x04,args) 47#define deb_srch(args...) dprintk(0x04,args)
@@ -51,12 +50,6 @@ MODULE_PARM_DESC(debug, "set debugging level (1=info,2=xfer,4=setfe,8=getfe (|-a
51#define deb_setf(args...) dprintk(0x04,args) 50#define deb_setf(args...) dprintk(0x04,args)
52#define deb_getf(args...) dprintk(0x08,args) 51#define deb_getf(args...) dprintk(0x08,args)
53 52
54#ifdef CONFIG_DVB_DIBCOM_DEBUG
55static int debug;
56module_param(debug, int, 0644);
57MODULE_PARM_DESC(debug, "set debugging level (1=info,2=i2c,4=srch (|-able)).");
58#endif
59
60static int dib3000_read_reg(struct dib3000_state *state, u16 reg) 53static int dib3000_read_reg(struct dib3000_state *state, u16 reg)
61{ 54{
62 u8 wb[] = { ((reg >> 8) | 0x80) & 0xff, reg & 0xff }; 55 u8 wb[] = { ((reg >> 8) | 0x80) & 0xff, reg & 0xff };
diff --git a/drivers/media/dvb/frontends/dib3000mb_priv.h b/drivers/media/dvb/frontends/dib3000mb_priv.h
index 1a12747fdc91..16c526591f36 100644
--- a/drivers/media/dvb/frontends/dib3000mb_priv.h
+++ b/drivers/media/dvb/frontends/dib3000mb_priv.h
@@ -37,12 +37,8 @@
37 37
38/* debug */ 38/* debug */
39 39
40#ifdef CONFIG_DVB_DIBCOM_DEBUG
41#define dprintk(level,args...) \ 40#define dprintk(level,args...) \
42 do { if ((debug & level)) { printk(args); } } while (0) 41 do { if ((debug & level)) { printk(args); } } while (0)
43#else
44#define dprintk(args...) do { } while (0)
45#endif
46 42
47/* mask for enabling a specific pid for the pid_filter */ 43/* mask for enabling a specific pid for the pid_filter */
48#define DIB3000_ACTIVATE_PID_FILTERING (0x2000) 44#define DIB3000_ACTIVATE_PID_FILTERING (0x2000)
diff --git a/drivers/media/dvb/frontends/dib3000mc.c b/drivers/media/dvb/frontends/dib3000mc.c
index afad252abf41..088e7fadbe3d 100644
--- a/drivers/media/dvb/frontends/dib3000mc.c
+++ b/drivers/media/dvb/frontends/dib3000mc.c
@@ -822,7 +822,7 @@ int dib3000mc_i2c_enumeration(struct i2c_adapter *i2c, int no_of_demods, u8 defa
822 822
823 dmcst = kzalloc(sizeof(struct dib3000mc_state), GFP_KERNEL); 823 dmcst = kzalloc(sizeof(struct dib3000mc_state), GFP_KERNEL);
824 if (dmcst == NULL) 824 if (dmcst == NULL)
825 return -ENODEV; 825 return -ENOMEM;
826 826
827 dmcst->i2c_adap = i2c; 827 dmcst->i2c_adap = i2c;
828 828
diff --git a/drivers/media/dvb/frontends/lgdt3305.c b/drivers/media/dvb/frontends/lgdt3305.c
index d69c775f8645..3272881cb112 100644
--- a/drivers/media/dvb/frontends/lgdt3305.c
+++ b/drivers/media/dvb/frontends/lgdt3305.c
@@ -1,7 +1,9 @@
1/* 1/*
2 * Support for LGDT3305 - VSB/QAM 2 * Support for LG Electronics LGDT3304 and LGDT3305 - VSB/QAM
3 * 3 *
4 * Copyright (C) 2008, 2009 Michael Krufky <mkrufky@linuxtv.org> 4 * Copyright (C) 2008, 2009, 2010 Michael Krufky <mkrufky@linuxtv.org>
5 *
6 * LGDT3304 support by Jarod Wilson <jarod@redhat.com>
5 * 7 *
6 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
@@ -65,6 +67,8 @@ struct lgdt3305_state {
65 67
66/* ------------------------------------------------------------------------ */ 68/* ------------------------------------------------------------------------ */
67 69
70/* FIXME: verify & document the LGDT3304 registers */
71
68#define LGDT3305_GEN_CTRL_1 0x0000 72#define LGDT3305_GEN_CTRL_1 0x0000
69#define LGDT3305_GEN_CTRL_2 0x0001 73#define LGDT3305_GEN_CTRL_2 0x0001
70#define LGDT3305_GEN_CTRL_3 0x0002 74#define LGDT3305_GEN_CTRL_3 0x0002
@@ -358,7 +362,12 @@ static int lgdt3305_rfagc_loop(struct lgdt3305_state *state,
358 case QAM_256: 362 case QAM_256:
359 agcdelay = 0x046b; 363 agcdelay = 0x046b;
360 rfbw = 0x8889; 364 rfbw = 0x8889;
361 ifbw = 0x8888; 365 /* FIXME: investigate optimal ifbw & rfbw values for the
366 * DT3304 and re-write this switch..case block */
367 if (state->cfg->demod_chip == LGDT3304)
368 ifbw = 0x6666;
369 else /* (state->cfg->demod_chip == LGDT3305) */
370 ifbw = 0x8888;
362 break; 371 break;
363 default: 372 default:
364 return -EINVAL; 373 return -EINVAL;
@@ -410,8 +419,18 @@ static int lgdt3305_agc_setup(struct lgdt3305_state *state,
410 lg_dbg("lockdten = %d, acqen = %d\n", lockdten, acqen); 419 lg_dbg("lockdten = %d, acqen = %d\n", lockdten, acqen);
411 420
412 /* control agc function */ 421 /* control agc function */
413 lgdt3305_write_reg(state, LGDT3305_AGC_CTRL_4, 0xe1 | lockdten << 1); 422 switch (state->cfg->demod_chip) {
414 lgdt3305_set_reg_bit(state, LGDT3305_AGC_CTRL_1, 2, acqen); 423 case LGDT3304:
424 lgdt3305_write_reg(state, 0x0314, 0xe1 | lockdten << 1);
425 lgdt3305_set_reg_bit(state, 0x030e, 2, acqen);
426 break;
427 case LGDT3305:
428 lgdt3305_write_reg(state, LGDT3305_AGC_CTRL_4, 0xe1 | lockdten << 1);
429 lgdt3305_set_reg_bit(state, LGDT3305_AGC_CTRL_1, 2, acqen);
430 break;
431 default:
432 return -EINVAL;
433 }
415 434
416 return lgdt3305_rfagc_loop(state, param); 435 return lgdt3305_rfagc_loop(state, param);
417} 436}
@@ -577,61 +596,79 @@ static int lgdt3305_init(struct dvb_frontend *fe)
577 struct lgdt3305_state *state = fe->demodulator_priv; 596 struct lgdt3305_state *state = fe->demodulator_priv;
578 int ret; 597 int ret;
579 598
599 static struct lgdt3305_reg lgdt3304_init_data[] = {
600 { .reg = LGDT3305_GEN_CTRL_1, .val = 0x03, },
601 { .reg = 0x000d, .val = 0x02, },
602 { .reg = 0x000e, .val = 0x02, },
603 { .reg = LGDT3305_DGTL_AGC_REF_1, .val = 0x32, },
604 { .reg = LGDT3305_DGTL_AGC_REF_2, .val = 0xc4, },
605 { .reg = LGDT3305_CR_CTR_FREQ_1, .val = 0x00, },
606 { .reg = LGDT3305_CR_CTR_FREQ_2, .val = 0x00, },
607 { .reg = LGDT3305_CR_CTR_FREQ_3, .val = 0x00, },
608 { .reg = LGDT3305_CR_CTR_FREQ_4, .val = 0x00, },
609 { .reg = LGDT3305_CR_CTRL_7, .val = 0xf9, },
610 { .reg = 0x0112, .val = 0x17, },
611 { .reg = 0x0113, .val = 0x15, },
612 { .reg = 0x0114, .val = 0x18, },
613 { .reg = 0x0115, .val = 0xff, },
614 { .reg = 0x0116, .val = 0x3c, },
615 { .reg = 0x0214, .val = 0x67, },
616 { .reg = 0x0424, .val = 0x8d, },
617 { .reg = 0x0427, .val = 0x12, },
618 { .reg = 0x0428, .val = 0x4f, },
619 { .reg = LGDT3305_IFBW_1, .val = 0x80, },
620 { .reg = LGDT3305_IFBW_2, .val = 0x00, },
621 { .reg = 0x030a, .val = 0x08, },
622 { .reg = 0x030b, .val = 0x9b, },
623 { .reg = 0x030d, .val = 0x00, },
624 { .reg = 0x030e, .val = 0x1c, },
625 { .reg = 0x0314, .val = 0xe1, },
626 { .reg = 0x000d, .val = 0x82, },
627 { .reg = LGDT3305_TP_CTRL_1, .val = 0x5b, },
628 { .reg = LGDT3305_TP_CTRL_1, .val = 0x5b, },
629 };
630
580 static struct lgdt3305_reg lgdt3305_init_data[] = { 631 static struct lgdt3305_reg lgdt3305_init_data[] = {
581 { .reg = LGDT3305_GEN_CTRL_1, 632 { .reg = LGDT3305_GEN_CTRL_1, .val = 0x03, },
582 .val = 0x03, }, 633 { .reg = LGDT3305_GEN_CTRL_2, .val = 0xb0, },
583 { .reg = LGDT3305_GEN_CTRL_2, 634 { .reg = LGDT3305_GEN_CTRL_3, .val = 0x01, },
584 .val = 0xb0, }, 635 { .reg = LGDT3305_GEN_CONTROL, .val = 0x6f, },
585 { .reg = LGDT3305_GEN_CTRL_3, 636 { .reg = LGDT3305_GEN_CTRL_4, .val = 0x03, },
586 .val = 0x01, }, 637 { .reg = LGDT3305_DGTL_AGC_REF_1, .val = 0x32, },
587 { .reg = LGDT3305_GEN_CONTROL, 638 { .reg = LGDT3305_DGTL_AGC_REF_2, .val = 0xc4, },
588 .val = 0x6f, }, 639 { .reg = LGDT3305_CR_CTR_FREQ_1, .val = 0x00, },
589 { .reg = LGDT3305_GEN_CTRL_4, 640 { .reg = LGDT3305_CR_CTR_FREQ_2, .val = 0x00, },
590 .val = 0x03, }, 641 { .reg = LGDT3305_CR_CTR_FREQ_3, .val = 0x00, },
591 { .reg = LGDT3305_DGTL_AGC_REF_1, 642 { .reg = LGDT3305_CR_CTR_FREQ_4, .val = 0x00, },
592 .val = 0x32, }, 643 { .reg = LGDT3305_CR_CTRL_7, .val = 0x79, },
593 { .reg = LGDT3305_DGTL_AGC_REF_2, 644 { .reg = LGDT3305_AGC_POWER_REF_1, .val = 0x32, },
594 .val = 0xc4, }, 645 { .reg = LGDT3305_AGC_POWER_REF_2, .val = 0xc4, },
595 { .reg = LGDT3305_CR_CTR_FREQ_1, 646 { .reg = LGDT3305_AGC_DELAY_PT_1, .val = 0x0d, },
596 .val = 0x00, }, 647 { .reg = LGDT3305_AGC_DELAY_PT_2, .val = 0x30, },
597 { .reg = LGDT3305_CR_CTR_FREQ_2, 648 { .reg = LGDT3305_RFAGC_LOOP_FLTR_BW_1, .val = 0x80, },
598 .val = 0x00, }, 649 { .reg = LGDT3305_RFAGC_LOOP_FLTR_BW_2, .val = 0x00, },
599 { .reg = LGDT3305_CR_CTR_FREQ_3, 650 { .reg = LGDT3305_IFBW_1, .val = 0x80, },
600 .val = 0x00, }, 651 { .reg = LGDT3305_IFBW_2, .val = 0x00, },
601 { .reg = LGDT3305_CR_CTR_FREQ_4, 652 { .reg = LGDT3305_AGC_CTRL_1, .val = 0x30, },
602 .val = 0x00, }, 653 { .reg = LGDT3305_AGC_CTRL_4, .val = 0x61, },
603 { .reg = LGDT3305_CR_CTRL_7, 654 { .reg = LGDT3305_FEC_BLOCK_CTRL, .val = 0xff, },
604 .val = 0x79, }, 655 { .reg = LGDT3305_TP_CTRL_1, .val = 0x1b, },
605 { .reg = LGDT3305_AGC_POWER_REF_1,
606 .val = 0x32, },
607 { .reg = LGDT3305_AGC_POWER_REF_2,
608 .val = 0xc4, },
609 { .reg = LGDT3305_AGC_DELAY_PT_1,
610 .val = 0x0d, },
611 { .reg = LGDT3305_AGC_DELAY_PT_2,
612 .val = 0x30, },
613 { .reg = LGDT3305_RFAGC_LOOP_FLTR_BW_1,
614 .val = 0x80, },
615 { .reg = LGDT3305_RFAGC_LOOP_FLTR_BW_2,
616 .val = 0x00, },
617 { .reg = LGDT3305_IFBW_1,
618 .val = 0x80, },
619 { .reg = LGDT3305_IFBW_2,
620 .val = 0x00, },
621 { .reg = LGDT3305_AGC_CTRL_1,
622 .val = 0x30, },
623 { .reg = LGDT3305_AGC_CTRL_4,
624 .val = 0x61, },
625 { .reg = LGDT3305_FEC_BLOCK_CTRL,
626 .val = 0xff, },
627 { .reg = LGDT3305_TP_CTRL_1,
628 .val = 0x1b, },
629 }; 656 };
630 657
631 lg_dbg("\n"); 658 lg_dbg("\n");
632 659
633 ret = lgdt3305_write_regs(state, lgdt3305_init_data, 660 switch (state->cfg->demod_chip) {
634 ARRAY_SIZE(lgdt3305_init_data)); 661 case LGDT3304:
662 ret = lgdt3305_write_regs(state, lgdt3304_init_data,
663 ARRAY_SIZE(lgdt3304_init_data));
664 break;
665 case LGDT3305:
666 ret = lgdt3305_write_regs(state, lgdt3305_init_data,
667 ARRAY_SIZE(lgdt3305_init_data));
668 break;
669 default:
670 ret = -EINVAL;
671 }
635 if (lg_fail(ret)) 672 if (lg_fail(ret))
636 goto fail; 673 goto fail;
637 674
@@ -640,6 +677,76 @@ fail:
640 return ret; 677 return ret;
641} 678}
642 679
680static int lgdt3304_set_parameters(struct dvb_frontend *fe,
681 struct dvb_frontend_parameters *param)
682{
683 struct lgdt3305_state *state = fe->demodulator_priv;
684 int ret;
685
686 lg_dbg("(%d, %d)\n", param->frequency, param->u.vsb.modulation);
687
688 if (fe->ops.tuner_ops.set_params) {
689 ret = fe->ops.tuner_ops.set_params(fe, param);
690 if (fe->ops.i2c_gate_ctrl)
691 fe->ops.i2c_gate_ctrl(fe, 0);
692 if (lg_fail(ret))
693 goto fail;
694 state->current_frequency = param->frequency;
695 }
696
697 ret = lgdt3305_set_modulation(state, param);
698 if (lg_fail(ret))
699 goto fail;
700
701 ret = lgdt3305_passband_digital_agc(state, param);
702 if (lg_fail(ret))
703 goto fail;
704
705 ret = lgdt3305_agc_setup(state, param);
706 if (lg_fail(ret))
707 goto fail;
708
709 /* reg 0x030d is 3304-only... seen in vsb and qam usbsnoops... */
710 switch (param->u.vsb.modulation) {
711 case VSB_8:
712 lgdt3305_write_reg(state, 0x030d, 0x00);
713 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_1, 0x4f);
714 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_2, 0x0c);
715 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_3, 0xac);
716 lgdt3305_write_reg(state, LGDT3305_CR_CTR_FREQ_4, 0xba);
717 break;
718 case QAM_64:
719 case QAM_256:
720 lgdt3305_write_reg(state, 0x030d, 0x14);
721 ret = lgdt3305_set_if(state, param);
722 if (lg_fail(ret))
723 goto fail;
724 break;
725 default:
726 return -EINVAL;
727 }
728
729
730 ret = lgdt3305_spectral_inversion(state, param,
731 state->cfg->spectral_inversion
732 ? 1 : 0);
733 if (lg_fail(ret))
734 goto fail;
735
736 state->current_modulation = param->u.vsb.modulation;
737
738 ret = lgdt3305_mpeg_mode(state, state->cfg->mpeg_mode);
739 if (lg_fail(ret))
740 goto fail;
741
742 /* lgdt3305_mpeg_mode_polarity calls lgdt3305_soft_reset */
743 ret = lgdt3305_mpeg_mode_polarity(state,
744 state->cfg->tpclk_edge,
745 state->cfg->tpvalid_polarity);
746fail:
747 return ret;
748}
749
643static int lgdt3305_set_parameters(struct dvb_frontend *fe, 750static int lgdt3305_set_parameters(struct dvb_frontend *fe,
644 struct dvb_frontend_parameters *param) 751 struct dvb_frontend_parameters *param)
645{ 752{
@@ -848,6 +955,10 @@ static int lgdt3305_read_status(struct dvb_frontend *fe, fe_status_t *status)
848 switch (state->current_modulation) { 955 switch (state->current_modulation) {
849 case QAM_256: 956 case QAM_256:
850 case QAM_64: 957 case QAM_64:
958 /* signal bit is unreliable on the DT3304 in QAM mode */
959 if (((LGDT3304 == state->cfg->demod_chip)) && (cr_lock))
960 *status |= FE_HAS_SIGNAL;
961
851 ret = lgdt3305_read_fec_lock_status(state, &fec_lock); 962 ret = lgdt3305_read_fec_lock_status(state, &fec_lock);
852 if (lg_fail(ret)) 963 if (lg_fail(ret))
853 goto fail; 964 goto fail;
@@ -993,6 +1104,7 @@ static void lgdt3305_release(struct dvb_frontend *fe)
993 kfree(state); 1104 kfree(state);
994} 1105}
995 1106
1107static struct dvb_frontend_ops lgdt3304_ops;
996static struct dvb_frontend_ops lgdt3305_ops; 1108static struct dvb_frontend_ops lgdt3305_ops;
997 1109
998struct dvb_frontend *lgdt3305_attach(const struct lgdt3305_config *config, 1110struct dvb_frontend *lgdt3305_attach(const struct lgdt3305_config *config,
@@ -1013,11 +1125,21 @@ struct dvb_frontend *lgdt3305_attach(const struct lgdt3305_config *config,
1013 state->cfg = config; 1125 state->cfg = config;
1014 state->i2c_adap = i2c_adap; 1126 state->i2c_adap = i2c_adap;
1015 1127
1016 memcpy(&state->frontend.ops, &lgdt3305_ops, 1128 switch (config->demod_chip) {
1017 sizeof(struct dvb_frontend_ops)); 1129 case LGDT3304:
1130 memcpy(&state->frontend.ops, &lgdt3304_ops,
1131 sizeof(struct dvb_frontend_ops));
1132 break;
1133 case LGDT3305:
1134 memcpy(&state->frontend.ops, &lgdt3305_ops,
1135 sizeof(struct dvb_frontend_ops));
1136 break;
1137 default:
1138 goto fail;
1139 }
1018 state->frontend.demodulator_priv = state; 1140 state->frontend.demodulator_priv = state;
1019 1141
1020 /* verify that we're talking to a lg dt3305 */ 1142 /* verify that we're talking to a lg dt3304/5 */
1021 ret = lgdt3305_read_reg(state, LGDT3305_GEN_CTRL_2, &val); 1143 ret = lgdt3305_read_reg(state, LGDT3305_GEN_CTRL_2, &val);
1022 if ((lg_fail(ret)) | (val == 0)) 1144 if ((lg_fail(ret)) | (val == 0))
1023 goto fail; 1145 goto fail;
@@ -1036,12 +1158,35 @@ struct dvb_frontend *lgdt3305_attach(const struct lgdt3305_config *config,
1036 1158
1037 return &state->frontend; 1159 return &state->frontend;
1038fail: 1160fail:
1039 lg_warn("unable to detect LGDT3305 hardware\n"); 1161 lg_warn("unable to detect %s hardware\n",
1162 config->demod_chip ? "LGDT3304" : "LGDT3305");
1040 kfree(state); 1163 kfree(state);
1041 return NULL; 1164 return NULL;
1042} 1165}
1043EXPORT_SYMBOL(lgdt3305_attach); 1166EXPORT_SYMBOL(lgdt3305_attach);
1044 1167
1168static struct dvb_frontend_ops lgdt3304_ops = {
1169 .info = {
1170 .name = "LG Electronics LGDT3304 VSB/QAM Frontend",
1171 .type = FE_ATSC,
1172 .frequency_min = 54000000,
1173 .frequency_max = 858000000,
1174 .frequency_stepsize = 62500,
1175 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
1176 },
1177 .i2c_gate_ctrl = lgdt3305_i2c_gate_ctrl,
1178 .init = lgdt3305_init,
1179 .set_frontend = lgdt3304_set_parameters,
1180 .get_frontend = lgdt3305_get_frontend,
1181 .get_tune_settings = lgdt3305_get_tune_settings,
1182 .read_status = lgdt3305_read_status,
1183 .read_ber = lgdt3305_read_ber,
1184 .read_signal_strength = lgdt3305_read_signal_strength,
1185 .read_snr = lgdt3305_read_snr,
1186 .read_ucblocks = lgdt3305_read_ucblocks,
1187 .release = lgdt3305_release,
1188};
1189
1045static struct dvb_frontend_ops lgdt3305_ops = { 1190static struct dvb_frontend_ops lgdt3305_ops = {
1046 .info = { 1191 .info = {
1047 .name = "LG Electronics LGDT3305 VSB/QAM Frontend", 1192 .name = "LG Electronics LGDT3305 VSB/QAM Frontend",
@@ -1065,10 +1210,10 @@ static struct dvb_frontend_ops lgdt3305_ops = {
1065 .release = lgdt3305_release, 1210 .release = lgdt3305_release,
1066}; 1211};
1067 1212
1068MODULE_DESCRIPTION("LG Electronics LGDT3305 ATSC/QAM-B Demodulator Driver"); 1213MODULE_DESCRIPTION("LG Electronics LGDT3304/5 ATSC/QAM-B Demodulator Driver");
1069MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>"); 1214MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
1070MODULE_LICENSE("GPL"); 1215MODULE_LICENSE("GPL");
1071MODULE_VERSION("0.1"); 1216MODULE_VERSION("0.2");
1072 1217
1073/* 1218/*
1074 * Local variables: 1219 * Local variables:
diff --git a/drivers/media/dvb/frontends/lgdt3305.h b/drivers/media/dvb/frontends/lgdt3305.h
index 9cb11c9cae53..02172eca4d47 100644
--- a/drivers/media/dvb/frontends/lgdt3305.h
+++ b/drivers/media/dvb/frontends/lgdt3305.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * Support for LGDT3305 - VSB/QAM 2 * Support for LG Electronics LGDT3304 and LGDT3305 - VSB/QAM
3 * 3 *
4 * Copyright (C) 2008, 2009 Michael Krufky <mkrufky@linuxtv.org> 4 * Copyright (C) 2008, 2009, 2010 Michael Krufky <mkrufky@linuxtv.org>
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
@@ -41,6 +41,11 @@ enum lgdt3305_tp_valid_polarity {
41 LGDT3305_TP_VALID_HIGH = 1, 41 LGDT3305_TP_VALID_HIGH = 1,
42}; 42};
43 43
44enum lgdt_demod_chip_type {
45 LGDT3305 = 0,
46 LGDT3304 = 1,
47};
48
44struct lgdt3305_config { 49struct lgdt3305_config {
45 u8 i2c_addr; 50 u8 i2c_addr;
46 51
@@ -65,6 +70,7 @@ struct lgdt3305_config {
65 enum lgdt3305_mpeg_mode mpeg_mode; 70 enum lgdt3305_mpeg_mode mpeg_mode;
66 enum lgdt3305_tp_clock_edge tpclk_edge; 71 enum lgdt3305_tp_clock_edge tpclk_edge;
67 enum lgdt3305_tp_valid_polarity tpvalid_polarity; 72 enum lgdt3305_tp_valid_polarity tpvalid_polarity;
73 enum lgdt_demod_chip_type demod_chip;
68}; 74};
69 75
70#if defined(CONFIG_DVB_LGDT3305) || (defined(CONFIG_DVB_LGDT3305_MODULE) && \ 76#if defined(CONFIG_DVB_LGDT3305) || (defined(CONFIG_DVB_LGDT3305_MODULE) && \
diff --git a/drivers/media/dvb/frontends/lgs8gxx.c b/drivers/media/dvb/frontends/lgs8gxx.c
index dee53960e7e8..5ea28ae2ba8f 100644
--- a/drivers/media/dvb/frontends/lgs8gxx.c
+++ b/drivers/media/dvb/frontends/lgs8gxx.c
@@ -24,6 +24,7 @@
24 */ 24 */
25 25
26#include <asm/div64.h> 26#include <asm/div64.h>
27#include <linux/firmware.h>
27 28
28#include "dvb_frontend.h" 29#include "dvb_frontend.h"
29 30
@@ -46,42 +47,6 @@ module_param(fake_signal_str, int, 0644);
46MODULE_PARM_DESC(fake_signal_str, "fake signal strength for LGS8913." 47MODULE_PARM_DESC(fake_signal_str, "fake signal strength for LGS8913."
47"Signal strength calculation is slow.(default:on)."); 48"Signal strength calculation is slow.(default:on).");
48 49
49static const u8 lgs8g75_initdat[] = {
50 0x01, 0x30, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
51 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
52 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
53 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
54 0x00, 0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
55 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
56 0xE4, 0xF5, 0xA8, 0xF5, 0xB8, 0xF5, 0x88, 0xF5,
57 0x89, 0xF5, 0x87, 0x75, 0xD0, 0x00, 0x11, 0x50,
58 0x11, 0x50, 0xF4, 0xF5, 0x80, 0xF5, 0x90, 0xF5,
59 0xA0, 0xF5, 0xB0, 0x75, 0x81, 0x30, 0x80, 0x01,
60 0x32, 0x90, 0x80, 0x12, 0x74, 0xFF, 0xF0, 0x90,
61 0x80, 0x13, 0x74, 0x1F, 0xF0, 0x90, 0x80, 0x23,
62 0x74, 0x01, 0xF0, 0x90, 0x80, 0x22, 0xF0, 0x90,
63 0x00, 0x48, 0x74, 0x00, 0xF0, 0x90, 0x80, 0x4D,
64 0x74, 0x05, 0xF0, 0x90, 0x80, 0x09, 0xE0, 0x60,
65 0x21, 0x12, 0x00, 0xDD, 0x14, 0x60, 0x1B, 0x12,
66 0x00, 0xDD, 0x14, 0x60, 0x15, 0x12, 0x00, 0xDD,
67 0x14, 0x60, 0x0F, 0x12, 0x00, 0xDD, 0x14, 0x60,
68 0x09, 0x12, 0x00, 0xDD, 0x14, 0x60, 0x03, 0x12,
69 0x00, 0xDD, 0x90, 0x80, 0x42, 0xE0, 0x60, 0x0B,
70 0x14, 0x60, 0x0C, 0x14, 0x60, 0x0D, 0x14, 0x60,
71 0x0E, 0x01, 0xB3, 0x74, 0x04, 0x01, 0xB9, 0x74,
72 0x05, 0x01, 0xB9, 0x74, 0x07, 0x01, 0xB9, 0x74,
73 0x0A, 0xC0, 0xE0, 0x74, 0xC8, 0x12, 0x00, 0xE2,
74 0xD0, 0xE0, 0x14, 0x70, 0xF4, 0x90, 0x80, 0x09,
75 0xE0, 0x70, 0xAE, 0x12, 0x00, 0xF6, 0x12, 0x00,
76 0xFE, 0x90, 0x00, 0x48, 0xE0, 0x04, 0xF0, 0x90,
77 0x80, 0x4E, 0xF0, 0x01, 0x73, 0x90, 0x80, 0x08,
78 0xF0, 0x22, 0xF8, 0x7A, 0x0C, 0x79, 0xFD, 0x00,
79 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD9,
80 0xF6, 0xDA, 0xF2, 0xD8, 0xEE, 0x22, 0x90, 0x80,
81 0x65, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0x80,
82 0x65, 0xE0, 0x44, 0xC2, 0xF0, 0x22
83};
84
85/* LGS8GXX internal helper functions */ 50/* LGS8GXX internal helper functions */
86 51
87static int lgs8gxx_write_reg(struct lgs8gxx_state *priv, u8 reg, u8 data) 52static int lgs8gxx_write_reg(struct lgs8gxx_state *priv, u8 reg, u8 data)
@@ -627,9 +592,14 @@ static int lgs8913_init(struct lgs8gxx_state *priv)
627 592
628static int lgs8g75_init_data(struct lgs8gxx_state *priv) 593static int lgs8g75_init_data(struct lgs8gxx_state *priv)
629{ 594{
630 const u8 *p = lgs8g75_initdat; 595 const struct firmware *fw;
596 int rc;
631 int i; 597 int i;
632 598
599 rc = request_firmware(&fw, "lgs8g75.fw", &priv->i2c->dev);
600 if (rc)
601 return rc;
602
633 lgs8gxx_write_reg(priv, 0xC6, 0x40); 603 lgs8gxx_write_reg(priv, 0xC6, 0x40);
634 604
635 lgs8gxx_write_reg(priv, 0x3D, 0x04); 605 lgs8gxx_write_reg(priv, 0x3D, 0x04);
@@ -640,16 +610,16 @@ static int lgs8g75_init_data(struct lgs8gxx_state *priv)
640 lgs8gxx_write_reg(priv, 0x3B, 0x00); 610 lgs8gxx_write_reg(priv, 0x3B, 0x00);
641 lgs8gxx_write_reg(priv, 0x38, 0x00); 611 lgs8gxx_write_reg(priv, 0x38, 0x00);
642 612
643 for (i = 0; i < sizeof(lgs8g75_initdat); i++) { 613 for (i = 0; i < fw->size; i++) {
644 lgs8gxx_write_reg(priv, 0x38, 0x00); 614 lgs8gxx_write_reg(priv, 0x38, 0x00);
645 lgs8gxx_write_reg(priv, 0x3A, (u8)(i&0xff)); 615 lgs8gxx_write_reg(priv, 0x3A, (u8)(i&0xff));
646 lgs8gxx_write_reg(priv, 0x3B, (u8)(i>>8)); 616 lgs8gxx_write_reg(priv, 0x3B, (u8)(i>>8));
647 lgs8gxx_write_reg(priv, 0x3C, *p); 617 lgs8gxx_write_reg(priv, 0x3C, fw->data[i]);
648 p++;
649 } 618 }
650 619
651 lgs8gxx_write_reg(priv, 0x38, 0x00); 620 lgs8gxx_write_reg(priv, 0x38, 0x00);
652 621
622 release_firmware(fw);
653 return 0; 623 return 0;
654} 624}
655 625
diff --git a/drivers/media/dvb/frontends/mb86a16.c b/drivers/media/dvb/frontends/mb86a16.c
index 599d1aa519a3..33b63235b86e 100644
--- a/drivers/media/dvb/frontends/mb86a16.c
+++ b/drivers/media/dvb/frontends/mb86a16.c
@@ -1833,7 +1833,6 @@ static struct dvb_frontend_ops mb86a16_ops = {
1833 1833
1834 .get_frontend_algo = mb86a16_frontend_algo, 1834 .get_frontend_algo = mb86a16_frontend_algo,
1835 .search = mb86a16_search, 1835 .search = mb86a16_search,
1836 .read_status = mb86a16_read_status,
1837 .init = mb86a16_init, 1836 .init = mb86a16_init,
1838 .sleep = mb86a16_sleep, 1837 .sleep = mb86a16_sleep,
1839 .read_status = mb86a16_read_status, 1838 .read_status = mb86a16_read_status,
diff --git a/drivers/media/dvb/frontends/tda10048.c b/drivers/media/dvb/frontends/tda10048.c
index 4e2a7c8b2f62..93f6a75c238e 100644
--- a/drivers/media/dvb/frontends/tda10048.c
+++ b/drivers/media/dvb/frontends/tda10048.c
@@ -25,6 +25,7 @@
25#include <linux/string.h> 25#include <linux/string.h>
26#include <linux/slab.h> 26#include <linux/slab.h>
27#include <linux/delay.h> 27#include <linux/delay.h>
28#include <linux/math64.h>
28#include <asm/div64.h> 29#include <asm/div64.h>
29#include "dvb_frontend.h" 30#include "dvb_frontend.h"
30#include "dvb_math.h" 31#include "dvb_math.h"
@@ -49,8 +50,8 @@
49#define TDA10048_CONF_C4_1 0x1E 50#define TDA10048_CONF_C4_1 0x1E
50#define TDA10048_CONF_C4_2 0x1F 51#define TDA10048_CONF_C4_2 0x1F
51#define TDA10048_CODE_IN_RAM 0x20 52#define TDA10048_CODE_IN_RAM 0x20
52#define TDA10048_CHANNEL_INFO_1_R 0x22 53#define TDA10048_CHANNEL_INFO1_R 0x22
53#define TDA10048_CHANNEL_INFO_2_R 0x23 54#define TDA10048_CHANNEL_INFO2_R 0x23
54#define TDA10048_CHANNEL_INFO1 0x24 55#define TDA10048_CHANNEL_INFO1 0x24
55#define TDA10048_CHANNEL_INFO2 0x25 56#define TDA10048_CHANNEL_INFO2 0x25
56#define TDA10048_TIME_ERROR_R 0x26 57#define TDA10048_TIME_ERROR_R 0x26
@@ -63,8 +64,8 @@
63#define TDA10048_IT_STAT 0x32 64#define TDA10048_IT_STAT 0x32
64#define TDA10048_DSP_AD_LSB 0x3C 65#define TDA10048_DSP_AD_LSB 0x3C
65#define TDA10048_DSP_AD_MSB 0x3D 66#define TDA10048_DSP_AD_MSB 0x3D
66#define TDA10048_DSP_REF_LSB 0x3E 67#define TDA10048_DSP_REG_LSB 0x3E
67#define TDA10048_DSP_REF_MSB 0x3F 68#define TDA10048_DSP_REG_MSB 0x3F
68#define TDA10048_CONF_TRISTATE1 0x44 69#define TDA10048_CONF_TRISTATE1 0x44
69#define TDA10048_CONF_TRISTATE2 0x45 70#define TDA10048_CONF_TRISTATE2 0x45
70#define TDA10048_CONF_POLARITY 0x46 71#define TDA10048_CONF_POLARITY 0x46
@@ -112,7 +113,7 @@
112#define TDA10048_FREE_REG_1 0xB2 113#define TDA10048_FREE_REG_1 0xB2
113#define TDA10048_FREE_REG_2 0xB3 114#define TDA10048_FREE_REG_2 0xB3
114#define TDA10048_CONF_C3_1 0xC0 115#define TDA10048_CONF_C3_1 0xC0
115#define TDA10048_CYBER_CTRL 0xC2 116#define TDA10048_CVBER_CTRL 0xC2
116#define TDA10048_CBER_NMAX_LSB 0xC4 117#define TDA10048_CBER_NMAX_LSB 0xC4
117#define TDA10048_CBER_NMAX_MSB 0xC5 118#define TDA10048_CBER_NMAX_MSB 0xC5
118#define TDA10048_CBER_LSB 0xC6 119#define TDA10048_CBER_LSB 0xC6
@@ -120,7 +121,7 @@
120#define TDA10048_VBER_LSB 0xC8 121#define TDA10048_VBER_LSB 0xC8
121#define TDA10048_VBER_MID 0xC9 122#define TDA10048_VBER_MID 0xC9
122#define TDA10048_VBER_MSB 0xCA 123#define TDA10048_VBER_MSB 0xCA
123#define TDA10048_CYBER_LUT 0xCC 124#define TDA10048_CVBER_LUT 0xCC
124#define TDA10048_UNCOR_CTRL 0xCD 125#define TDA10048_UNCOR_CTRL 0xCD
125#define TDA10048_UNCOR_CPT_LSB 0xCE 126#define TDA10048_UNCOR_CPT_LSB 0xCE
126#define TDA10048_UNCOR_CPT_MSB 0xCF 127#define TDA10048_UNCOR_CPT_MSB 0xCF
@@ -183,7 +184,7 @@ static struct init_tab {
183 { TDA10048_AGC_IF_MAX, 0xff }, 184 { TDA10048_AGC_IF_MAX, 0xff },
184 { TDA10048_AGC_THRESHOLD_MSB, 0x00 }, 185 { TDA10048_AGC_THRESHOLD_MSB, 0x00 },
185 { TDA10048_AGC_THRESHOLD_LSB, 0x70 }, 186 { TDA10048_AGC_THRESHOLD_LSB, 0x70 },
186 { TDA10048_CYBER_CTRL, 0x38 }, 187 { TDA10048_CVBER_CTRL, 0x38 },
187 { TDA10048_AGC_GAINS, 0x12 }, 188 { TDA10048_AGC_GAINS, 0x12 },
188 { TDA10048_CONF_XO, 0x00 }, 189 { TDA10048_CONF_XO, 0x00 },
189 { TDA10048_CONF_TS1, 0x07 }, 190 { TDA10048_CONF_TS1, 0x07 },
@@ -688,7 +689,7 @@ static int tda10048_get_tps(struct tda10048_state *state,
688 p->guard_interval = GUARD_INTERVAL_1_4; 689 p->guard_interval = GUARD_INTERVAL_1_4;
689 break; 690 break;
690 } 691 }
691 switch (val & 0x02) { 692 switch (val & 0x03) {
692 case 0: 693 case 0:
693 p->transmission_mode = TRANSMISSION_MODE_2K; 694 p->transmission_mode = TRANSMISSION_MODE_2K;
694 break; 695 break;
@@ -765,6 +766,8 @@ static int tda10048_set_frontend(struct dvb_frontend *fe,
765 766
766 /* Enable demod TPS auto detection and begin acquisition */ 767 /* Enable demod TPS auto detection and begin acquisition */
767 tda10048_writereg(state, TDA10048_AUTO, 0x57); 768 tda10048_writereg(state, TDA10048_AUTO, 0x57);
769 /* trigger cber and vber acquisition */
770 tda10048_writereg(state, TDA10048_CVBER_CTRL, 0x3B);
768 771
769 return 0; 772 return 0;
770} 773}
@@ -830,12 +833,27 @@ static int tda10048_read_status(struct dvb_frontend *fe, fe_status_t *status)
830static int tda10048_read_ber(struct dvb_frontend *fe, u32 *ber) 833static int tda10048_read_ber(struct dvb_frontend *fe, u32 *ber)
831{ 834{
832 struct tda10048_state *state = fe->demodulator_priv; 835 struct tda10048_state *state = fe->demodulator_priv;
836 static u32 cber_current;
837 u32 cber_nmax;
838 u64 cber_tmp;
833 839
834 dprintk(1, "%s()\n", __func__); 840 dprintk(1, "%s()\n", __func__);
835 841
836 /* TODO: A reset may be required here */ 842 /* update cber on interrupt */
837 *ber = tda10048_readreg(state, TDA10048_CBER_MSB) << 8 | 843 if (tda10048_readreg(state, TDA10048_SOFT_IT_C3) & 0x01) {
838 tda10048_readreg(state, TDA10048_CBER_LSB); 844 cber_tmp = tda10048_readreg(state, TDA10048_CBER_MSB) << 8 |
845 tda10048_readreg(state, TDA10048_CBER_LSB);
846 cber_nmax = tda10048_readreg(state, TDA10048_CBER_NMAX_MSB) << 8 |
847 tda10048_readreg(state, TDA10048_CBER_NMAX_LSB);
848 cber_tmp *= 100000000;
849 cber_tmp *= 2;
850 cber_tmp = div_u64(cber_tmp, (cber_nmax * 32) + 1);
851 cber_current = (u32)cber_tmp;
852 /* retrigger cber acquisition */
853 tda10048_writereg(state, TDA10048_CVBER_CTRL, 0x39);
854 }
855 /* actual cber is (*ber)/1e8 */
856 *ber = cber_current;
839 857
840 return 0; 858 return 0;
841} 859}
@@ -1015,6 +1033,9 @@ static int tda10048_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1015 1033
1016 *ucblocks = tda10048_readreg(state, TDA10048_UNCOR_CPT_MSB) << 8 | 1034 *ucblocks = tda10048_readreg(state, TDA10048_UNCOR_CPT_MSB) << 8 |
1017 tda10048_readreg(state, TDA10048_UNCOR_CPT_LSB); 1035 tda10048_readreg(state, TDA10048_UNCOR_CPT_LSB);
1036 /* clear the uncorrected TS packets counter when saturated */
1037 if (*ucblocks == 0xFFFF)
1038 tda10048_writereg(state, TDA10048_UNCOR_CTRL, 0x80);
1018 1039
1019 return 0; 1040 return 0;
1020} 1041}
diff --git a/drivers/media/dvb/mantis/Kconfig b/drivers/media/dvb/mantis/Kconfig
index f7b72a32adf3..decdeda840d0 100644
--- a/drivers/media/dvb/mantis/Kconfig
+++ b/drivers/media/dvb/mantis/Kconfig
@@ -10,9 +10,15 @@ config MANTIS_CORE
10config DVB_MANTIS 10config DVB_MANTIS
11 tristate "MANTIS based cards" 11 tristate "MANTIS based cards"
12 depends on MANTIS_CORE && DVB_CORE && PCI && I2C 12 depends on MANTIS_CORE && DVB_CORE && PCI && I2C
13 select DVB_MB86A16 13 select DVB_MB86A16 if !DVB_FE_CUSTOMISE
14 select DVB_ZL10353 14 select DVB_ZL10353 if !DVB_FE_CUSTOMISE
15 select DVB_STV0299 15 select DVB_STV0299 if !DVB_FE_CUSTOMISE
16 select DVB_LNBP21 if !DVB_FE_CUSTOMISE
17 select DVB_STB0899 if !DVB_FE_CUSTOMISE
18 select DVB_STB6100 if !DVB_FE_CUSTOMISE
19 select DVB_TDA665x if !DVB_FE_CUSTOMISE
20 select DVB_TDA10021 if !DVB_FE_CUSTOMISE
21 select DVB_TDA10023 if !DVB_FE_CUSTOMISE
16 select DVB_PLL 22 select DVB_PLL
17 help 23 help
18 Support for PCI cards based on the Mantis PCI bridge. 24 Support for PCI cards based on the Mantis PCI bridge.
@@ -23,7 +29,7 @@ config DVB_MANTIS
23config DVB_HOPPER 29config DVB_HOPPER
24 tristate "HOPPER based cards" 30 tristate "HOPPER based cards"
25 depends on MANTIS_CORE && DVB_CORE && PCI && I2C 31 depends on MANTIS_CORE && DVB_CORE && PCI && I2C
26 select DVB_ZL10353 32 select DVB_ZL10353 if !DVB_FE_CUSTOMISE
27 select DVB_PLL 33 select DVB_PLL
28 help 34 help
29 Support for PCI cards based on the Hopper PCI bridge. 35 Support for PCI cards based on the Hopper PCI bridge.
diff --git a/drivers/media/dvb/mantis/mantis_input.c b/drivers/media/dvb/mantis/mantis_input.c
index 3d4e4663220c..a99489b8418b 100644
--- a/drivers/media/dvb/mantis/mantis_input.c
+++ b/drivers/media/dvb/mantis/mantis_input.c
@@ -19,7 +19,7 @@
19*/ 19*/
20 20
21#include <linux/input.h> 21#include <linux/input.h>
22#include <media/ir-common.h> 22#include <media/ir-core.h>
23#include <linux/pci.h> 23#include <linux/pci.h>
24 24
25#include "dmxdev.h" 25#include "dmxdev.h"
@@ -104,7 +104,6 @@ EXPORT_SYMBOL_GPL(ir_mantis);
104int mantis_input_init(struct mantis_pci *mantis) 104int mantis_input_init(struct mantis_pci *mantis)
105{ 105{
106 struct input_dev *rc; 106 struct input_dev *rc;
107 struct ir_input_state rc_state;
108 char name[80], dev[80]; 107 char name[80], dev[80];
109 int err; 108 int err;
110 109
@@ -120,8 +119,6 @@ int mantis_input_init(struct mantis_pci *mantis)
120 rc->name = name; 119 rc->name = name;
121 rc->phys = dev; 120 rc->phys = dev;
122 121
123 ir_input_init(rc, &rc_state, IR_TYPE_OTHER);
124
125 rc->id.bustype = BUS_PCI; 122 rc->id.bustype = BUS_PCI;
126 rc->id.vendor = mantis->vendor_id; 123 rc->id.vendor = mantis->vendor_id;
127 rc->id.product = mantis->device_id; 124 rc->id.product = mantis->device_id;
diff --git a/drivers/media/dvb/siano/sms-cards.c b/drivers/media/dvb/siano/sms-cards.c
index cff77e2eb557..25b43e587fa6 100644
--- a/drivers/media/dvb/siano/sms-cards.c
+++ b/drivers/media/dvb/siano/sms-cards.c
@@ -64,9 +64,11 @@ static struct sms_board sms_boards[] = {
64 .type = SMS_NOVA_B0, 64 .type = SMS_NOVA_B0,
65 .fw[DEVICE_MODE_ISDBT_BDA] = "sms1xxx-hcw-55xxx-isdbt-02.fw", 65 .fw[DEVICE_MODE_ISDBT_BDA] = "sms1xxx-hcw-55xxx-isdbt-02.fw",
66 .fw[DEVICE_MODE_DVBT_BDA] = "sms1xxx-hcw-55xxx-dvbt-02.fw", 66 .fw[DEVICE_MODE_DVBT_BDA] = "sms1xxx-hcw-55xxx-dvbt-02.fw",
67 .rc_codes = RC_MAP_RC5_HAUPPAUGE_NEW,
67 .board_cfg.leds_power = 26, 68 .board_cfg.leds_power = 26,
68 .board_cfg.led0 = 27, 69 .board_cfg.led0 = 27,
69 .board_cfg.led1 = 28, 70 .board_cfg.led1 = 28,
71 .board_cfg.ir = 9,
70 .led_power = 26, 72 .led_power = 26,
71 .led_lo = 27, 73 .led_lo = 27,
72 .led_hi = 28, 74 .led_hi = 28,
diff --git a/drivers/media/dvb/siano/sms-cards.h b/drivers/media/dvb/siano/sms-cards.h
index 8f19fc000b46..d8cdf756f7cf 100644
--- a/drivers/media/dvb/siano/sms-cards.h
+++ b/drivers/media/dvb/siano/sms-cards.h
@@ -75,7 +75,7 @@ struct sms_board {
75 enum sms_device_type_st type; 75 enum sms_device_type_st type;
76 char *name, *fw[DEVICE_MODE_MAX]; 76 char *name, *fw[DEVICE_MODE_MAX];
77 struct sms_board_gpio_cfg board_cfg; 77 struct sms_board_gpio_cfg board_cfg;
78 enum ir_kb_type ir_kb_type; 78 char *rc_codes; /* Name of IR codes table */
79 79
80 /* gpios */ 80 /* gpios */
81 int led_power, led_hi, led_lo, lna_ctrl, rf_switch; 81 int led_power, led_hi, led_lo, lna_ctrl, rf_switch;
diff --git a/drivers/media/dvb/siano/smscoreapi.c b/drivers/media/dvb/siano/smscoreapi.c
index 0c87a3c3899a..7f2c94a15ab1 100644
--- a/drivers/media/dvb/siano/smscoreapi.c
+++ b/drivers/media/dvb/siano/smscoreapi.c
@@ -116,9 +116,7 @@ static struct smscore_registry_entry_t *smscore_find_registry(char *devpath)
116 return entry; 116 return entry;
117 } 117 }
118 } 118 }
119 entry = (struct smscore_registry_entry_t *) 119 entry = kmalloc(sizeof(struct smscore_registry_entry_t), GFP_KERNEL);
120 kmalloc(sizeof(struct smscore_registry_entry_t),
121 GFP_KERNEL);
122 if (entry) { 120 if (entry) {
123 entry->mode = default_mode; 121 entry->mode = default_mode;
124 strcpy(entry->devpath, devpath); 122 strcpy(entry->devpath, devpath);
@@ -1297,7 +1295,7 @@ int smsclient_sendrequest(struct smscore_client_t *client,
1297EXPORT_SYMBOL_GPL(smsclient_sendrequest); 1295EXPORT_SYMBOL_GPL(smsclient_sendrequest);
1298 1296
1299 1297
1300/* old GPIO managments implementation */ 1298/* old GPIO managements implementation */
1301int smscore_configure_gpio(struct smscore_device_t *coredev, u32 pin, 1299int smscore_configure_gpio(struct smscore_device_t *coredev, u32 pin,
1302 struct smscore_config_gpio *pinconfig) 1300 struct smscore_config_gpio *pinconfig)
1303{ 1301{
diff --git a/drivers/media/dvb/siano/smsir.c b/drivers/media/dvb/siano/smsir.c
index a56eac76e0f0..d0e4639ee9db 100644
--- a/drivers/media/dvb/siano/smsir.c
+++ b/drivers/media/dvb/siano/smsir.c
@@ -4,6 +4,11 @@
4 MDTV receiver kernel modules. 4 MDTV receiver kernel modules.
5 Copyright (C) 2006-2009, Uri Shkolnik 5 Copyright (C) 2006-2009, Uri Shkolnik
6 6
7 Copyright (c) 2010 - Mauro Carvalho Chehab
8 - Ported the driver to use rc-core
9 - IR raw event decoding is now done at rc-core
10 - Code almost re-written
11
7 This program is free software: you can redistribute it and/or modify 12 This program is free software: you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by 13 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation, either version 2 of the License, or 14 the Free Software Foundation, either version 2 of the License, or
@@ -27,226 +32,28 @@
27#include "smsir.h" 32#include "smsir.h"
28#include "sms-cards.h" 33#include "sms-cards.h"
29 34
30/* In order to add new IR remote control - 35#define MODULE_NAME "smsmdtv"
31 * 1) Add it to the <enum ir_kb_type> @ smsir,h,
32 * 2) Add its map to keyboard_layout_maps below
33 * 3) Set your board (sms-cards sub-module) to use it
34 */
35
36static struct keyboard_layout_map_t keyboard_layout_maps[] = {
37 [SMS_IR_KB_DEFAULT_TV] = {
38 .ir_protocol = IR_RC5,
39 .rc5_kbd_address = KEYBOARD_ADDRESS_TV1,
40 .keyboard_layout_map = {
41 KEY_0, KEY_1, KEY_2,
42 KEY_3, KEY_4, KEY_5,
43 KEY_6, KEY_7, KEY_8,
44 KEY_9, 0, 0, KEY_POWER,
45 KEY_MUTE, 0, 0,
46 KEY_VOLUMEUP, KEY_VOLUMEDOWN,
47 KEY_BRIGHTNESSUP,
48 KEY_BRIGHTNESSDOWN, KEY_CHANNELUP,
49 KEY_CHANNELDOWN,
50 0, 0, 0, 0, 0, 0, 0, 0,
51 0, 0, 0, 0, 0, 0, 0, 0,
52 0, 0, 0, 0, 0, 0, 0, 0,
53 0, 0, 0, 0, 0, 0, 0, 0,
54 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
55 }
56 },
57 [SMS_IR_KB_HCW_SILVER] = {
58 .ir_protocol = IR_RC5,
59 .rc5_kbd_address = KEYBOARD_ADDRESS_LIGHTING1,
60 .keyboard_layout_map = {
61 KEY_0, KEY_1, KEY_2,
62 KEY_3, KEY_4, KEY_5,
63 KEY_6, KEY_7, KEY_8,
64 KEY_9, KEY_TEXT, KEY_RED,
65 KEY_RADIO, KEY_MENU,
66 KEY_SUBTITLE,
67 KEY_MUTE, KEY_VOLUMEUP,
68 KEY_VOLUMEDOWN, KEY_PREVIOUS, 0,
69 KEY_UP, KEY_DOWN, KEY_LEFT,
70 KEY_RIGHT, KEY_VIDEO, KEY_AUDIO,
71 KEY_MHP, KEY_EPG, KEY_TV,
72 0, KEY_NEXTSONG, KEY_EXIT,
73 KEY_CHANNELUP, KEY_CHANNELDOWN,
74 KEY_CHANNEL, 0,
75 KEY_PREVIOUSSONG, KEY_ENTER,
76 KEY_SLEEP, 0, 0, KEY_BLUE,
77 0, 0, 0, 0, KEY_GREEN, 0,
78 KEY_PAUSE, 0, KEY_REWIND,
79 0, KEY_FASTFORWARD, KEY_PLAY,
80 KEY_STOP, KEY_RECORD,
81 KEY_YELLOW, 0, 0, KEY_SELECT,
82 KEY_ZOOM, KEY_POWER, 0, 0
83 }
84 },
85 { } /* Terminating entry */
86};
87
88static u32 ir_pos;
89static u32 ir_word;
90static u32 ir_toggle;
91
92#define RC5_PUSH_BIT(dst, bit, pos) \
93 { dst <<= 1; dst |= bit; pos++; }
94
95
96static void sms_ir_rc5_event(struct smscore_device_t *coredev,
97 u32 toggle, u32 addr, u32 cmd)
98{
99 bool toggle_changed;
100 u16 keycode;
101
102 sms_log("IR RC5 word: address %d, command %d, toggle %d",
103 addr, cmd, toggle);
104
105 toggle_changed = ir_toggle != toggle;
106 /* keep toggle */
107 ir_toggle = toggle;
108
109 if (addr !=
110 keyboard_layout_maps[coredev->ir.ir_kb_type].rc5_kbd_address)
111 return; /* Check for valid address */
112
113 keycode =
114 keyboard_layout_maps
115 [coredev->ir.ir_kb_type].keyboard_layout_map[cmd];
116 36
117 if (!toggle_changed && 37void sms_ir_event(struct smscore_device_t *coredev, const char *buf, int len)
118 (keycode != KEY_VOLUMEUP && keycode != KEY_VOLUMEDOWN))
119 return; /* accept only repeated volume, reject other keys */
120
121 sms_log("kernel input keycode (from ir) %d", keycode);
122 input_report_key(coredev->ir.input_dev, keycode, 1);
123 input_sync(coredev->ir.input_dev);
124
125}
126
127/* decode raw bit pattern to RC5 code */
128/* taken from ir-functions.c */
129static u32 ir_rc5_decode(unsigned int code)
130{ 38{
131/* unsigned int org_code = code;*/
132 unsigned int pair;
133 unsigned int rc5 = 0;
134 int i; 39 int i;
40 const s32 *samples = (const void *)buf;
135 41
136 for (i = 0; i < 14; ++i) { 42 for (i = 0; i < len >> 2; i++) {
137 pair = code & 0x3; 43 struct ir_raw_event ev;
138 code >>= 2;
139
140 rc5 <<= 1;
141 switch (pair) {
142 case 0:
143 case 2:
144 break;
145 case 1:
146 rc5 |= 1;
147 break;
148 case 3:
149/* dprintk(1, "ir-common: ir_rc5_decode(%x) bad code\n", org_code);*/
150 sms_log("bad code");
151 return 0;
152 }
153 }
154/*
155 dprintk(1, "ir-common: code=%x, rc5=%x, start=%x,
156 toggle=%x, address=%x, "
157 "instr=%x\n", rc5, org_code, RC5_START(rc5),
158 RC5_TOGGLE(rc5), RC5_ADDR(rc5), RC5_INSTR(rc5));
159*/
160 return rc5;
161}
162
163static void sms_rc5_parse_word(struct smscore_device_t *coredev)
164{
165 #define RC5_START(x) (((x)>>12)&3)
166 #define RC5_TOGGLE(x) (((x)>>11)&1)
167 #define RC5_ADDR(x) (((x)>>6)&0x1F)
168 #define RC5_INSTR(x) ((x)&0x3F)
169
170 int i, j;
171 u32 rc5_word = 0;
172
173 /* Reverse the IR word direction */
174 for (i = 0 ; i < 28 ; i++)
175 RC5_PUSH_BIT(rc5_word, (ir_word>>i)&1, j)
176
177 rc5_word = ir_rc5_decode(rc5_word);
178 /* sms_log("temp = 0x%x, rc5_code = 0x%x", ir_word, rc5_word); */
179
180 sms_ir_rc5_event(coredev,
181 RC5_TOGGLE(rc5_word),
182 RC5_ADDR(rc5_word),
183 RC5_INSTR(rc5_word));
184}
185
186
187static void sms_rc5_accumulate_bits(struct smscore_device_t *coredev,
188 s32 ir_sample)
189{
190 #define RC5_TIME_GRANULARITY 200
191 #define RC5_DEF_BIT_TIME 889
192 #define RC5_MAX_SAME_BIT_CONT 4
193 #define RC5_WORD_LEN 27 /* 28 bit */
194
195 u32 i, j;
196 s32 delta_time;
197 u32 time = (ir_sample > 0) ? ir_sample : (0-ir_sample);
198 u32 level = (ir_sample < 0) ? 0 : 1;
199
200 for (i = RC5_MAX_SAME_BIT_CONT; i > 0; i--) {
201 delta_time = time - (i*RC5_DEF_BIT_TIME) + RC5_TIME_GRANULARITY;
202 if (delta_time < 0)
203 continue; /* not so many consecutive bits */
204 if (delta_time > (2 * RC5_TIME_GRANULARITY)) {
205 /* timeout */
206 if (ir_pos == (RC5_WORD_LEN-1))
207 /* complete last bit */
208 RC5_PUSH_BIT(ir_word, level, ir_pos)
209
210 if (ir_pos == RC5_WORD_LEN)
211 sms_rc5_parse_word(coredev);
212 else if (ir_pos) /* timeout within a word */
213 sms_log("IR error parsing a word");
214 44
215 ir_pos = 0; 45 ev.duration = abs(samples[i]) * 1000; /* Convert to ns */
216 ir_word = 0; 46 ev.pulse = (samples[i] > 0) ? false : true;
217 /* sms_log("timeout %d", time); */
218 break;
219 }
220 /* The time is within the range of this number of bits */
221 for (j = 0 ; j < i ; j++)
222 RC5_PUSH_BIT(ir_word, level, ir_pos)
223 47
224 break; 48 ir_raw_event_store(coredev->ir.input_dev, &ev);
225 } 49 }
226} 50 ir_raw_event_handle(coredev->ir.input_dev);
227
228void sms_ir_event(struct smscore_device_t *coredev, const char *buf, int len)
229{
230 #define IR_DATA_RECEIVE_MAX_LEN 520 /* 128*4 + 4 + 4 */
231 u32 i;
232 enum ir_protocol ir_protocol =
233 keyboard_layout_maps[coredev->ir.ir_kb_type]
234 .ir_protocol;
235 s32 *samples;
236 int count = len>>2;
237
238 samples = (s32 *)buf;
239/* sms_log("IR buffer received, length = %d", count);*/
240
241 for (i = 0; i < count; i++)
242 if (ir_protocol == IR_RC5)
243 sms_rc5_accumulate_bits(coredev, samples[i]);
244 /* IR_RCMM not implemented */
245} 51}
246 52
247int sms_ir_init(struct smscore_device_t *coredev) 53int sms_ir_init(struct smscore_device_t *coredev)
248{ 54{
249 struct input_dev *input_dev; 55 struct input_dev *input_dev;
56 int board_id = smscore_get_board_id(coredev);
250 57
251 sms_log("Allocating input device"); 58 sms_log("Allocating input device");
252 input_dev = input_allocate_device(); 59 input_dev = input_allocate_device();
@@ -256,33 +63,38 @@ int sms_ir_init(struct smscore_device_t *coredev)
256 } 63 }
257 64
258 coredev->ir.input_dev = input_dev; 65 coredev->ir.input_dev = input_dev;
259 coredev->ir.ir_kb_type =
260 sms_get_board(smscore_get_board_id(coredev))->ir_kb_type;
261 coredev->ir.keyboard_layout_map =
262 keyboard_layout_maps[coredev->ir.ir_kb_type].
263 keyboard_layout_map;
264 sms_log("IR remote keyboard type is %d", coredev->ir.ir_kb_type);
265 66
266 coredev->ir.controller = 0; /* Todo: vega/nova SPI number */ 67 coredev->ir.controller = 0; /* Todo: vega/nova SPI number */
267 coredev->ir.timeout = IR_DEFAULT_TIMEOUT; 68 coredev->ir.timeout = IR_DEFAULT_TIMEOUT;
268 sms_log("IR port %d, timeout %d ms", 69 sms_log("IR port %d, timeout %d ms",
269 coredev->ir.controller, coredev->ir.timeout); 70 coredev->ir.controller, coredev->ir.timeout);
270 71
271 snprintf(coredev->ir.name, 72 snprintf(coredev->ir.name, sizeof(coredev->ir.name),
272 IR_DEV_NAME_MAX_LEN, 73 "SMS IR (%s)", sms_get_board(board_id)->name);
273 "SMS IR w/kbd type %d", 74
274 coredev->ir.ir_kb_type); 75 strlcpy(coredev->ir.phys, coredev->devpath, sizeof(coredev->ir.phys));
76 strlcat(coredev->ir.phys, "/ir0", sizeof(coredev->ir.phys));
77
275 input_dev->name = coredev->ir.name; 78 input_dev->name = coredev->ir.name;
276 input_dev->phys = coredev->ir.name; 79 input_dev->phys = coredev->ir.phys;
277 input_dev->dev.parent = coredev->device; 80 input_dev->dev.parent = coredev->device;
278 81
279 /* Key press events only */ 82#if 0
280 input_dev->evbit[0] = BIT_MASK(EV_KEY); 83 /* TODO: properly initialize the parameters bellow */
281 input_dev->keybit[BIT_WORD(BTN_0)] = BIT_MASK(BTN_0); 84 input_dev->id.bustype = BUS_USB;
85 input_dev->id.version = 1;
86 input_dev->id.vendor = le16_to_cpu(dev->udev->descriptor.idVendor);
87 input_dev->id.product = le16_to_cpu(dev->udev->descriptor.idProduct);
88#endif
89
90 coredev->ir.props.priv = coredev;
91 coredev->ir.props.driver_type = RC_DRIVER_IR_RAW;
92 coredev->ir.props.allowed_protos = IR_TYPE_ALL;
282 93
283 sms_log("Input device (IR) %s is set for key events", input_dev->name); 94 sms_log("Input device (IR) %s is set for key events", input_dev->name);
284 95
285 if (input_register_device(input_dev)) { 96 if (ir_input_register(input_dev, sms_get_board(board_id)->rc_codes,
97 &coredev->ir.props, MODULE_NAME)) {
286 sms_err("Failed to register device"); 98 sms_err("Failed to register device");
287 input_free_device(input_dev); 99 input_free_device(input_dev);
288 return -EACCES; 100 return -EACCES;
@@ -294,8 +106,7 @@ int sms_ir_init(struct smscore_device_t *coredev)
294void sms_ir_exit(struct smscore_device_t *coredev) 106void sms_ir_exit(struct smscore_device_t *coredev)
295{ 107{
296 if (coredev->ir.input_dev) 108 if (coredev->ir.input_dev)
297 input_unregister_device(coredev->ir.input_dev); 109 ir_input_unregister(coredev->ir.input_dev);
298 110
299 sms_log(""); 111 sms_log("");
300} 112}
301
diff --git a/drivers/media/dvb/siano/smsir.h b/drivers/media/dvb/siano/smsir.h
index b7d703e2d338..926e247523bd 100644
--- a/drivers/media/dvb/siano/smsir.h
+++ b/drivers/media/dvb/siano/smsir.h
@@ -4,6 +4,11 @@ Siano Mobile Silicon, Inc.
4MDTV receiver kernel modules. 4MDTV receiver kernel modules.
5Copyright (C) 2006-2009, Uri Shkolnik 5Copyright (C) 2006-2009, Uri Shkolnik
6 6
7 Copyright (c) 2010 - Mauro Carvalho Chehab
8 - Ported the driver to use rc-core
9 - IR raw event decoding is now done at rc-core
10 - Code almost re-written
11
7This program is free software: you can redistribute it and/or modify 12This program is free software: you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by 13it under the terms of the GNU General Public License as published by
9the Free Software Foundation, either version 2 of the License, or 14the Free Software Foundation, either version 2 of the License, or
@@ -23,63 +28,21 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
23#define __SMS_IR_H__ 28#define __SMS_IR_H__
24 29
25#include <linux/input.h> 30#include <linux/input.h>
31#include <media/ir-core.h>
26 32
27#define IR_DEV_NAME_MAX_LEN 23 /* "SMS IR kbd type nn\0" */
28#define IR_KEYBOARD_LAYOUT_SIZE 64
29#define IR_DEFAULT_TIMEOUT 100 33#define IR_DEFAULT_TIMEOUT 100
30 34
31enum ir_kb_type {
32 SMS_IR_KB_DEFAULT_TV,
33 SMS_IR_KB_HCW_SILVER
34};
35
36enum rc5_keyboard_address {
37 KEYBOARD_ADDRESS_TV1 = 0,
38 KEYBOARD_ADDRESS_TV2 = 1,
39 KEYBOARD_ADDRESS_TELETEXT = 2,
40 KEYBOARD_ADDRESS_VIDEO = 3,
41 KEYBOARD_ADDRESS_LV1 = 4,
42 KEYBOARD_ADDRESS_VCR1 = 5,
43 KEYBOARD_ADDRESS_VCR2 = 6,
44 KEYBOARD_ADDRESS_EXPERIMENTAL = 7,
45 KEYBOARD_ADDRESS_SAT1 = 8,
46 KEYBOARD_ADDRESS_CAMERA = 9,
47 KEYBOARD_ADDRESS_SAT2 = 10,
48 KEYBOARD_ADDRESS_CDV = 12,
49 KEYBOARD_ADDRESS_CAMCORDER = 13,
50 KEYBOARD_ADDRESS_PRE_AMP = 16,
51 KEYBOARD_ADDRESS_TUNER = 17,
52 KEYBOARD_ADDRESS_RECORDER1 = 18,
53 KEYBOARD_ADDRESS_PRE_AMP1 = 19,
54 KEYBOARD_ADDRESS_CD_PLAYER = 20,
55 KEYBOARD_ADDRESS_PHONO = 21,
56 KEYBOARD_ADDRESS_SATA = 22,
57 KEYBOARD_ADDRESS_RECORDER2 = 23,
58 KEYBOARD_ADDRESS_CDR = 26,
59 KEYBOARD_ADDRESS_LIGHTING = 29,
60 KEYBOARD_ADDRESS_LIGHTING1 = 30, /* KEYBOARD_ADDRESS_HCW_SILVER */
61 KEYBOARD_ADDRESS_PHONE = 31,
62 KEYBOARD_ADDRESS_NOT_RC5 = 0xFFFF
63};
64
65enum ir_protocol {
66 IR_RC5,
67 IR_RCMM
68};
69
70struct keyboard_layout_map_t {
71 enum ir_protocol ir_protocol;
72 enum rc5_keyboard_address rc5_kbd_address;
73 u16 keyboard_layout_map[IR_KEYBOARD_LAYOUT_SIZE];
74};
75
76struct smscore_device_t; 35struct smscore_device_t;
77 36
78struct ir_t { 37struct ir_t {
79 struct input_dev *input_dev; 38 struct input_dev *input_dev;
80 enum ir_kb_type ir_kb_type; 39 char name[40];
81 char name[IR_DEV_NAME_MAX_LEN+1]; 40 char phys[32];
82 u16 *keyboard_layout_map; 41
42 char *rc_codes;
43 u64 protocol;
44 struct ir_dev_props props;
45
83 u32 timeout; 46 u32 timeout;
84 u32 controller; 47 u32 controller;
85}; 48};
diff --git a/drivers/media/dvb/siano/smsusb.c b/drivers/media/dvb/siano/smsusb.c
index a9c27fb69ba7..50d4338610e0 100644
--- a/drivers/media/dvb/siano/smsusb.c
+++ b/drivers/media/dvb/siano/smsusb.c
@@ -352,8 +352,7 @@ static int smsusb_init_device(struct usb_interface *intf, int board_id)
352 params.num_buffers = MAX_BUFFERS; 352 params.num_buffers = MAX_BUFFERS;
353 params.sendrequest_handler = smsusb_sendrequest; 353 params.sendrequest_handler = smsusb_sendrequest;
354 params.context = dev; 354 params.context = dev;
355 snprintf(params.devpath, sizeof(params.devpath), 355 usb_make_path(dev->udev, params.devpath, sizeof(params.devpath));
356 "usb\\%d-%s", dev->udev->bus->busnum, dev->udev->devpath);
357 356
358 /* register in smscore */ 357 /* register in smscore */
359 rc = smscore_register_device(&params, &dev->coredev); 358 rc = smscore_register_device(&params, &dev->coredev);
diff --git a/drivers/media/radio/si470x/radio-si470x-common.c b/drivers/media/radio/si470x/radio-si470x-common.c
index 47075fc71f11..9927a595b426 100644
--- a/drivers/media/radio/si470x/radio-si470x-common.c
+++ b/drivers/media/radio/si470x/radio-si470x-common.c
@@ -748,7 +748,7 @@ static int si470x_vidioc_s_tuner(struct file *file, void *priv,
748 struct v4l2_tuner *tuner) 748 struct v4l2_tuner *tuner)
749{ 749{
750 struct si470x_device *radio = video_drvdata(file); 750 struct si470x_device *radio = video_drvdata(file);
751 int retval = -EINVAL; 751 int retval = 0;
752 752
753 /* safety checks */ 753 /* safety checks */
754 retval = si470x_disconnect_check(radio); 754 retval = si470x_disconnect_check(radio);
diff --git a/drivers/media/radio/si4713-i2c.c b/drivers/media/radio/si4713-i2c.c
index ab63dd5b25c4..fc7f4b794649 100644
--- a/drivers/media/radio/si4713-i2c.c
+++ b/drivers/media/radio/si4713-i2c.c
@@ -1009,8 +1009,10 @@ static int si4713_write_econtrol_string(struct si4713_device *sdev,
1009 goto exit; 1009 goto exit;
1010 } 1010 }
1011 rval = copy_from_user(ps_name, control->string, len); 1011 rval = copy_from_user(ps_name, control->string, len);
1012 if (rval < 0) 1012 if (rval) {
1013 rval = -EFAULT;
1013 goto exit; 1014 goto exit;
1015 }
1014 ps_name[len] = '\0'; 1016 ps_name[len] = '\0';
1015 1017
1016 if (strlen(ps_name) % vqc.step) { 1018 if (strlen(ps_name) % vqc.step) {
@@ -1031,8 +1033,10 @@ static int si4713_write_econtrol_string(struct si4713_device *sdev,
1031 goto exit; 1033 goto exit;
1032 } 1034 }
1033 rval = copy_from_user(radio_text, control->string, len); 1035 rval = copy_from_user(radio_text, control->string, len);
1034 if (rval < 0) 1036 if (rval) {
1037 rval = -EFAULT;
1035 goto exit; 1038 goto exit;
1039 }
1036 radio_text[len] = '\0'; 1040 radio_text[len] = '\0';
1037 1041
1038 if (strlen(radio_text) % vqc.step) { 1042 if (strlen(radio_text) % vqc.step) {
@@ -1367,6 +1371,8 @@ static int si4713_read_econtrol_string(struct si4713_device *sdev,
1367 } 1371 }
1368 rval = copy_to_user(control->string, sdev->rds_info.ps_name, 1372 rval = copy_to_user(control->string, sdev->rds_info.ps_name,
1369 strlen(sdev->rds_info.ps_name) + 1); 1373 strlen(sdev->rds_info.ps_name) + 1);
1374 if (rval)
1375 rval = -EFAULT;
1370 break; 1376 break;
1371 1377
1372 case V4L2_CID_RDS_TX_RADIO_TEXT: 1378 case V4L2_CID_RDS_TX_RADIO_TEXT:
@@ -1377,6 +1383,8 @@ static int si4713_read_econtrol_string(struct si4713_device *sdev,
1377 } 1383 }
1378 rval = copy_to_user(control->string, sdev->rds_info.radio_text, 1384 rval = copy_to_user(control->string, sdev->rds_info.radio_text,
1379 strlen(sdev->rds_info.radio_text) + 1); 1385 strlen(sdev->rds_info.radio_text) + 1);
1386 if (rval)
1387 rval = -EFAULT;
1380 break; 1388 break;
1381 1389
1382 default: 1390 default:
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
index bdbc9d305419..2e15903b976d 100644
--- a/drivers/media/video/Kconfig
+++ b/drivers/media/video/Kconfig
@@ -517,19 +517,6 @@ config VIDEO_UPD64083
517 517
518endmenu # encoder / decoder chips 518endmenu # encoder / decoder chips
519 519
520config DISPLAY_DAVINCI_DM646X_EVM
521 tristate "DM646x EVM Video Display"
522 depends on VIDEO_DEV && MACH_DAVINCI_DM6467_EVM
523 select VIDEOBUF_DMA_CONTIG
524 select VIDEO_DAVINCI_VPIF
525 select VIDEO_ADV7343
526 select VIDEO_THS7303
527 help
528 Support for DM6467 based display device.
529
530 To compile this driver as a module, choose M here: the
531 module will be called vpif_display.
532
533config VIDEO_SH_VOU 520config VIDEO_SH_VOU
534 tristate "SuperH VOU video output driver" 521 tristate "SuperH VOU video output driver"
535 depends on VIDEO_DEV && ARCH_SHMOBILE 522 depends on VIDEO_DEV && ARCH_SHMOBILE
@@ -537,29 +524,22 @@ config VIDEO_SH_VOU
537 help 524 help
538 Support for the Video Output Unit (VOU) on SuperH SoCs. 525 Support for the Video Output Unit (VOU) on SuperH SoCs.
539 526
540config CAPTURE_DAVINCI_DM646X_EVM 527config VIDEO_VIU
541 tristate "DM646x EVM Video Capture" 528 tristate "Freescale VIU Video Driver"
542 depends on VIDEO_DEV && MACH_DAVINCI_DM6467_EVM 529 depends on VIDEO_V4L2 && PPC_MPC512x
543 select VIDEOBUF_DMA_CONTIG 530 select VIDEOBUF_DMA_CONTIG
544 select VIDEO_DAVINCI_VPIF 531 default y
545 help 532 ---help---
546 Support for DM6467 based capture device. 533 Support for Freescale VIU video driver. This device captures
547 534 video data, or overlays video on DIU frame buffer.
548 To compile this driver as a module, choose M here: the
549 module will be called vpif_capture.
550
551config VIDEO_DAVINCI_VPIF
552 tristate "DaVinci VPIF Driver"
553 depends on DISPLAY_DAVINCI_DM646X_EVM
554 help
555 Support for DaVinci VPIF Driver.
556 535
557 To compile this driver as a module, choose M here: the 536 Say Y here if you want to enable VIU device on MPC5121e Rev2+.
558 module will be called vpif. 537 In doubt, say N.
559 538
560config VIDEO_VIVI 539config VIDEO_VIVI
561 tristate "Virtual Video Driver" 540 tristate "Virtual Video Driver"
562 depends on VIDEO_DEV && VIDEO_V4L2 && !SPARC32 && !SPARC64 && FONTS 541 depends on VIDEO_DEV && VIDEO_V4L2 && !SPARC32 && !SPARC64
542 depends on (FRAMEBUFFER_CONSOLE || STI_CONSOLE) && FONTS
563 select FONT_8x16 543 select FONT_8x16
564 select VIDEOBUF_VMALLOC 544 select VIDEOBUF_VMALLOC
565 default n 545 default n
@@ -570,66 +550,7 @@ config VIDEO_VIVI
570 Say Y here if you want to test video apps or debug V4L devices. 550 Say Y here if you want to test video apps or debug V4L devices.
571 In doubt, say N. 551 In doubt, say N.
572 552
573config VIDEO_VPSS_SYSTEM 553source "drivers/media/video/davinci/Kconfig"
574 tristate "VPSS System module driver"
575 depends on ARCH_DAVINCI
576 help
577 Support for vpss system module for video driver
578
579config VIDEO_VPFE_CAPTURE
580 tristate "VPFE Video Capture Driver"
581 depends on VIDEO_V4L2 && ARCH_DAVINCI
582 select VIDEOBUF_DMA_CONTIG
583 help
584 Support for DMXXXX VPFE based frame grabber. This is the
585 common V4L2 module for following DMXXX SoCs from Texas
586 Instruments:- DM6446 & DM355.
587
588 To compile this driver as a module, choose M here: the
589 module will be called vpfe-capture.
590
591config VIDEO_DM6446_CCDC
592 tristate "DM6446 CCDC HW module"
593 depends on ARCH_DAVINCI_DM644x && VIDEO_VPFE_CAPTURE
594 select VIDEO_VPSS_SYSTEM
595 default y
596 help
597 Enables DaVinci CCD hw module. DaVinci CCDC hw interfaces
598 with decoder modules such as TVP5146 over BT656 or
599 sensor module such as MT9T001 over a raw interface. This
600 module configures the interface and CCDC/ISIF to do
601 video frame capture from slave decoders.
602
603 To compile this driver as a module, choose M here: the
604 module will be called vpfe.
605
606config VIDEO_DM355_CCDC
607 tristate "DM355 CCDC HW module"
608 depends on ARCH_DAVINCI_DM355 && VIDEO_VPFE_CAPTURE
609 select VIDEO_VPSS_SYSTEM
610 default y
611 help
612 Enables DM355 CCD hw module. DM355 CCDC hw interfaces
613 with decoder modules such as TVP5146 over BT656 or
614 sensor module such as MT9T001 over a raw interface. This
615 module configures the interface and CCDC/ISIF to do
616 video frame capture from a slave decoders
617
618 To compile this driver as a module, choose M here: the
619 module will be called vpfe.
620
621config VIDEO_ISIF
622 tristate "ISIF HW module"
623 depends on ARCH_DAVINCI_DM365 && VIDEO_VPFE_CAPTURE
624 select VIDEO_VPSS_SYSTEM
625 default y
626 help
627 Enables ISIF hw module. This is the hardware module for
628 configuring ISIF in VPFE to capture Raw Bayer RGB data from
629 a image sensor or YUV data from a YUV source.
630
631 To compile this driver as a module, choose M here: the
632 module will be called vpfe.
633 554
634source "drivers/media/video/omap/Kconfig" 555source "drivers/media/video/omap/Kconfig"
635 556
@@ -955,6 +876,12 @@ config VIDEO_PXA27x
955 ---help--- 876 ---help---
956 This is a v4l2 driver for the PXA27x Quick Capture Interface 877 This is a v4l2 driver for the PXA27x Quick Capture Interface
957 878
879config VIDEO_SH_MOBILE_CSI2
880 tristate "SuperH Mobile MIPI CSI-2 Interface driver"
881 depends on VIDEO_DEV && SOC_CAMERA && HAVE_CLK
882 ---help---
883 This is a v4l2 driver for the SuperH MIPI CSI-2 Interface
884
958config VIDEO_SH_MOBILE_CEU 885config VIDEO_SH_MOBILE_CEU
959 tristate "SuperH Mobile CEU Interface driver" 886 tristate "SuperH Mobile CEU Interface driver"
960 depends on VIDEO_DEV && SOC_CAMERA && HAS_DMA && HAVE_CLK 887 depends on VIDEO_DEV && SOC_CAMERA && HAS_DMA && HAVE_CLK
@@ -969,6 +896,19 @@ config VIDEO_OMAP2
969 ---help--- 896 ---help---
970 This is a v4l2 driver for the TI OMAP2 camera capture interface 897 This is a v4l2 driver for the TI OMAP2 camera capture interface
971 898
899config VIDEO_MX2_HOSTSUPPORT
900 bool
901
902config VIDEO_MX2
903 tristate "i.MX27/i.MX25 Camera Sensor Interface driver"
904 depends on VIDEO_DEV && SOC_CAMERA && (MACH_MX27 || ARCH_MX25)
905 select VIDEOBUF_DMA_CONTIG
906 select VIDEO_MX2_HOSTSUPPORT
907 ---help---
908 This is a v4l2 driver for the i.MX27 and the i.MX25 Camera Sensor
909 Interface
910
911
972# 912#
973# USB Multimedia device configuration 913# USB Multimedia device configuration
974# 914#
@@ -1000,61 +940,6 @@ source "drivers/media/video/usbvideo/Kconfig"
1000 940
1001source "drivers/media/video/et61x251/Kconfig" 941source "drivers/media/video/et61x251/Kconfig"
1002 942
1003config VIDEO_OVCAMCHIP
1004 tristate "OmniVision Camera Chip support (DEPRECATED)"
1005 depends on I2C && VIDEO_V4L1
1006 default n
1007 ---help---
1008 This driver is DEPRECATED please use the gspca ov519 module
1009 instead. Note that for the ov511 / ov518 support of the gspca module
1010 you need atleast version 0.6.0 of libv4l and for the w9968cf
1011 atleast version 0.6.3 of libv4l.
1012
1013 Support for the OmniVision OV6xxx and OV7xxx series of camera chips.
1014 This driver is intended to be used with the ov511 and w9968cf USB
1015 camera drivers.
1016
1017 To compile this driver as a module, choose M here: the
1018 module will be called ovcamchip.
1019
1020config USB_W9968CF
1021 tristate "USB W996[87]CF JPEG Dual Mode Camera support (DEPRECATED)"
1022 depends on VIDEO_V4L1 && I2C && VIDEO_OVCAMCHIP
1023 default n
1024 ---help---
1025 This driver is DEPRECATED please use the gspca ov519 module
1026 instead. Note that for the w9968cf support of the gspca module
1027 you need atleast version 0.6.3 of libv4l.
1028
1029 Say Y here if you want support for cameras based on OV681 or
1030 Winbond W9967CF/W9968CF JPEG USB Dual Mode Camera Chips.
1031
1032 This driver has an optional plugin, which is distributed as a
1033 separate module only (released under GPL). It allows to use higher
1034 resolutions and framerates, but cannot be included in the official
1035 Linux kernel for performance purposes.
1036
1037 See <file:Documentation/video4linux/w9968cf.txt> for more info.
1038
1039 To compile this driver as a module, choose M here: the
1040 module will be called w9968cf.
1041
1042config USB_OV511
1043 tristate "USB OV511 Camera support (DEPRECATED)"
1044 depends on VIDEO_V4L1
1045 default n
1046 ---help---
1047 This driver is DEPRECATED please use the gspca ov519 module
1048 instead. Note that for the ov511 / ov518 support of the gspca module
1049 you need atleast version 0.6.0 of libv4l.
1050
1051 Say Y here if you want to connect this type of camera to your
1052 computer's USB port. See <file:Documentation/video4linux/ov511.txt>
1053 for more information and for a list of supported cameras.
1054
1055 To compile this driver as a module, choose M here: the
1056 module will be called ov511.
1057
1058config USB_SE401 943config USB_SE401
1059 tristate "USB SE401 Camera support" 944 tristate "USB SE401 Camera support"
1060 depends on VIDEO_V4L1 945 depends on VIDEO_V4L1
@@ -1068,25 +953,6 @@ config USB_SE401
1068 953
1069source "drivers/media/video/sn9c102/Kconfig" 954source "drivers/media/video/sn9c102/Kconfig"
1070 955
1071config USB_STV680
1072 tristate "USB STV680 (Pencam) Camera support (DEPRECATED)"
1073 depends on VIDEO_V4L1
1074 default n
1075 ---help---
1076 This driver is DEPRECATED please use the gspca stv0680 module
1077 instead. Note that for the gspca stv0680 module you need
1078 atleast version 0.6.3 of libv4l.
1079
1080 Say Y here if you want to connect this type of camera to your
1081 computer's USB port. This includes the Pencam line of cameras.
1082 See <file:Documentation/video4linux/stv680.txt> for more information
1083 and for a list of supported cameras.
1084
1085 To compile this driver as a module, choose M here: the
1086 module will be called stv680.
1087
1088source "drivers/media/video/zc0301/Kconfig"
1089
1090source "drivers/media/video/pwc/Kconfig" 956source "drivers/media/video/pwc/Kconfig"
1091 957
1092config USB_ZR364XX 958config USB_ZR364XX
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
index cc93859d3164..1051ecc602e7 100644
--- a/drivers/media/video/Makefile
+++ b/drivers/media/video/Makefile
@@ -105,7 +105,6 @@ obj-$(CONFIG_VIDEO_TLG2300) += tlg2300/
105obj-$(CONFIG_VIDEO_CX231XX) += cx231xx/ 105obj-$(CONFIG_VIDEO_CX231XX) += cx231xx/
106obj-$(CONFIG_VIDEO_USBVISION) += usbvision/ 106obj-$(CONFIG_VIDEO_USBVISION) += usbvision/
107obj-$(CONFIG_VIDEO_PVRUSB2) += pvrusb2/ 107obj-$(CONFIG_VIDEO_PVRUSB2) += pvrusb2/
108obj-$(CONFIG_VIDEO_OVCAMCHIP) += ovcamchip/
109obj-$(CONFIG_VIDEO_CPIA2) += cpia2/ 108obj-$(CONFIG_VIDEO_CPIA2) += cpia2/
110obj-$(CONFIG_VIDEO_MXB) += mxb.o 109obj-$(CONFIG_VIDEO_MXB) += mxb.o
111obj-$(CONFIG_VIDEO_HEXIUM_ORION) += hexium_orion.o 110obj-$(CONFIG_VIDEO_HEXIUM_ORION) += hexium_orion.o
@@ -127,17 +126,13 @@ obj-$(CONFIG_VIDEO_CX2341X) += cx2341x.o
127obj-$(CONFIG_VIDEO_CAFE_CCIC) += cafe_ccic.o 126obj-$(CONFIG_VIDEO_CAFE_CCIC) += cafe_ccic.o
128 127
129obj-$(CONFIG_USB_DABUSB) += dabusb.o 128obj-$(CONFIG_USB_DABUSB) += dabusb.o
130obj-$(CONFIG_USB_OV511) += ov511.o
131obj-$(CONFIG_USB_SE401) += se401.o 129obj-$(CONFIG_USB_SE401) += se401.o
132obj-$(CONFIG_USB_STV680) += stv680.o
133obj-$(CONFIG_USB_W9968CF) += w9968cf.o
134obj-$(CONFIG_USB_ZR364XX) += zr364xx.o 130obj-$(CONFIG_USB_ZR364XX) += zr364xx.o
135obj-$(CONFIG_USB_STKWEBCAM) += stkwebcam.o 131obj-$(CONFIG_USB_STKWEBCAM) += stkwebcam.o
136 132
137obj-$(CONFIG_USB_SN9C102) += sn9c102/ 133obj-$(CONFIG_USB_SN9C102) += sn9c102/
138obj-$(CONFIG_USB_ET61X251) += et61x251/ 134obj-$(CONFIG_USB_ET61X251) += et61x251/
139obj-$(CONFIG_USB_PWC) += pwc/ 135obj-$(CONFIG_USB_PWC) += pwc/
140obj-$(CONFIG_USB_ZC0301) += zc0301/
141obj-$(CONFIG_USB_GSPCA) += gspca/ 136obj-$(CONFIG_USB_GSPCA) += gspca/
142 137
143obj-$(CONFIG_VIDEO_HDPVR) += hdpvr/ 138obj-$(CONFIG_VIDEO_HDPVR) += hdpvr/
@@ -151,6 +146,7 @@ obj-$(CONFIG_USB_S2255) += s2255drv.o
151obj-$(CONFIG_VIDEO_IVTV) += ivtv/ 146obj-$(CONFIG_VIDEO_IVTV) += ivtv/
152obj-$(CONFIG_VIDEO_CX18) += cx18/ 147obj-$(CONFIG_VIDEO_CX18) += cx18/
153 148
149obj-$(CONFIG_VIDEO_VIU) += fsl-viu.o
154obj-$(CONFIG_VIDEO_VIVI) += vivi.o 150obj-$(CONFIG_VIDEO_VIVI) += vivi.o
155obj-$(CONFIG_VIDEO_MEM2MEM_TESTDEV) += mem2mem_testdev.o 151obj-$(CONFIG_VIDEO_MEM2MEM_TESTDEV) += mem2mem_testdev.o
156obj-$(CONFIG_VIDEO_CX23885) += cx23885/ 152obj-$(CONFIG_VIDEO_CX23885) += cx23885/
@@ -162,8 +158,10 @@ obj-$(CONFIG_SOC_CAMERA) += soc_camera.o soc_mediabus.o
162obj-$(CONFIG_SOC_CAMERA_PLATFORM) += soc_camera_platform.o 158obj-$(CONFIG_SOC_CAMERA_PLATFORM) += soc_camera_platform.o
163# soc-camera host drivers have to be linked after camera drivers 159# soc-camera host drivers have to be linked after camera drivers
164obj-$(CONFIG_VIDEO_MX1) += mx1_camera.o 160obj-$(CONFIG_VIDEO_MX1) += mx1_camera.o
161obj-$(CONFIG_VIDEO_MX2) += mx2_camera.o
165obj-$(CONFIG_VIDEO_MX3) += mx3_camera.o 162obj-$(CONFIG_VIDEO_MX3) += mx3_camera.o
166obj-$(CONFIG_VIDEO_PXA27x) += pxa_camera.o 163obj-$(CONFIG_VIDEO_PXA27x) += pxa_camera.o
164obj-$(CONFIG_VIDEO_SH_MOBILE_CSI2) += sh_mobile_csi2.o
167obj-$(CONFIG_VIDEO_SH_MOBILE_CEU) += sh_mobile_ceu_camera.o 165obj-$(CONFIG_VIDEO_SH_MOBILE_CEU) += sh_mobile_ceu_camera.o
168 166
169obj-$(CONFIG_ARCH_DAVINCI) += davinci/ 167obj-$(CONFIG_ARCH_DAVINCI) += davinci/
@@ -177,7 +175,7 @@ obj-$(CONFIG_VIDEO_SAA7164) += saa7164/
177 175
178obj-$(CONFIG_VIDEO_IR_I2C) += ir-kbd-i2c.o 176obj-$(CONFIG_VIDEO_IR_I2C) += ir-kbd-i2c.o
179 177
180obj-$(CONFIG_ARCH_DAVINCI) += davinci/ 178obj-y += davinci/
181 179
182obj-$(CONFIG_ARCH_OMAP) += omap/ 180obj-$(CONFIG_ARCH_OMAP) += omap/
183 181
diff --git a/drivers/media/video/ak881x.c b/drivers/media/video/ak881x.c
index 1573392f74bd..b388654d48cd 100644
--- a/drivers/media/video/ak881x.c
+++ b/drivers/media/video/ak881x.c
@@ -126,7 +126,7 @@ static int ak881x_try_g_mbus_fmt(struct v4l2_subdev *sd,
126 v4l_bound_align_image(&mf->width, 0, 720, 2, 126 v4l_bound_align_image(&mf->width, 0, 720, 2,
127 &mf->height, 0, ak881x->lines, 1, 0); 127 &mf->height, 0, ak881x->lines, 1, 0);
128 mf->field = V4L2_FIELD_INTERLACED; 128 mf->field = V4L2_FIELD_INTERLACED;
129 mf->code = V4L2_MBUS_FMT_YUYV8_2X8_LE; 129 mf->code = V4L2_MBUS_FMT_YUYV8_2X8;
130 mf->colorspace = V4L2_COLORSPACE_SMPTE170M; 130 mf->colorspace = V4L2_COLORSPACE_SMPTE170M;
131 131
132 return 0; 132 return 0;
@@ -136,7 +136,7 @@ static int ak881x_s_mbus_fmt(struct v4l2_subdev *sd,
136 struct v4l2_mbus_framefmt *mf) 136 struct v4l2_mbus_framefmt *mf)
137{ 137{
138 if (mf->field != V4L2_FIELD_INTERLACED || 138 if (mf->field != V4L2_FIELD_INTERLACED ||
139 mf->code != V4L2_MBUS_FMT_YUYV8_2X8_LE) 139 mf->code != V4L2_MBUS_FMT_YUYV8_2X8)
140 return -EINVAL; 140 return -EINVAL;
141 141
142 return ak881x_try_g_mbus_fmt(sd, mf); 142 return ak881x_try_g_mbus_fmt(sd, mf);
@@ -148,7 +148,7 @@ static int ak881x_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned int index,
148 if (index) 148 if (index)
149 return -EINVAL; 149 return -EINVAL;
150 150
151 *code = V4L2_MBUS_FMT_YUYV8_2X8_LE; 151 *code = V4L2_MBUS_FMT_YUYV8_2X8;
152 return 0; 152 return 0;
153} 153}
154 154
diff --git a/drivers/media/video/au0828/Makefile b/drivers/media/video/au0828/Makefile
index 4d2623158188..5c7f2f7d9805 100644
--- a/drivers/media/video/au0828/Makefile
+++ b/drivers/media/video/au0828/Makefile
@@ -1,4 +1,4 @@
1au0828-objs := au0828-core.o au0828-i2c.o au0828-cards.o au0828-dvb.o au0828-video.o 1au0828-objs := au0828-core.o au0828-i2c.o au0828-cards.o au0828-dvb.o au0828-video.o au0828-vbi.o
2 2
3obj-$(CONFIG_VIDEO_AU0828) += au0828.o 3obj-$(CONFIG_VIDEO_AU0828) += au0828.o
4 4
diff --git a/drivers/media/video/au0828/au0828-vbi.c b/drivers/media/video/au0828/au0828-vbi.c
new file mode 100644
index 000000000000..63f593070ee8
--- /dev/null
+++ b/drivers/media/video/au0828/au0828-vbi.c
@@ -0,0 +1,138 @@
1/*
2 au0828-vbi.c - VBI driver for au0828
3
4 Copyright (C) 2010 Devin Heitmueller <dheitmueller@kernellabs.com>
5
6 This work was sponsored by GetWellNetwork Inc.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
21 02110-1301, USA.
22 */
23
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/init.h>
27#include <linux/slab.h>
28
29#include "au0828.h"
30
31static unsigned int vbibufs = 5;
32module_param(vbibufs, int, 0644);
33MODULE_PARM_DESC(vbibufs, "number of vbi buffers, range 2-32");
34
35/* ------------------------------------------------------------------ */
36
37static void
38free_buffer(struct videobuf_queue *vq, struct au0828_buffer *buf)
39{
40 struct au0828_fh *fh = vq->priv_data;
41 struct au0828_dev *dev = fh->dev;
42 unsigned long flags = 0;
43 if (in_interrupt())
44 BUG();
45
46 /* We used to wait for the buffer to finish here, but this didn't work
47 because, as we were keeping the state as VIDEOBUF_QUEUED,
48 videobuf_queue_cancel marked it as finished for us.
49 (Also, it could wedge forever if the hardware was misconfigured.)
50
51 This should be safe; by the time we get here, the buffer isn't
52 queued anymore. If we ever start marking the buffers as
53 VIDEOBUF_ACTIVE, it won't be, though.
54 */
55 spin_lock_irqsave(&dev->slock, flags);
56 if (dev->isoc_ctl.vbi_buf == buf)
57 dev->isoc_ctl.vbi_buf = NULL;
58 spin_unlock_irqrestore(&dev->slock, flags);
59
60 videobuf_vmalloc_free(&buf->vb);
61 buf->vb.state = VIDEOBUF_NEEDS_INIT;
62}
63
64static int
65vbi_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
66{
67 struct au0828_fh *fh = q->priv_data;
68 struct au0828_dev *dev = fh->dev;
69
70 *size = dev->vbi_width * dev->vbi_height * 2;
71
72 if (0 == *count)
73 *count = vbibufs;
74 if (*count < 2)
75 *count = 2;
76 if (*count > 32)
77 *count = 32;
78 return 0;
79}
80
81static int
82vbi_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
83 enum v4l2_field field)
84{
85 struct au0828_fh *fh = q->priv_data;
86 struct au0828_dev *dev = fh->dev;
87 struct au0828_buffer *buf = container_of(vb, struct au0828_buffer, vb);
88 int rc = 0;
89
90 buf->vb.size = dev->vbi_width * dev->vbi_height * 2;
91
92 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
93 return -EINVAL;
94
95 buf->vb.width = dev->vbi_width;
96 buf->vb.height = dev->vbi_height;
97 buf->vb.field = field;
98
99 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
100 rc = videobuf_iolock(q, &buf->vb, NULL);
101 if (rc < 0)
102 goto fail;
103 }
104
105 buf->vb.state = VIDEOBUF_PREPARED;
106 return 0;
107
108fail:
109 free_buffer(q, buf);
110 return rc;
111}
112
113static void
114vbi_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
115{
116 struct au0828_buffer *buf = container_of(vb,
117 struct au0828_buffer,
118 vb);
119 struct au0828_fh *fh = vq->priv_data;
120 struct au0828_dev *dev = fh->dev;
121 struct au0828_dmaqueue *vbiq = &dev->vbiq;
122
123 buf->vb.state = VIDEOBUF_QUEUED;
124 list_add_tail(&buf->vb.queue, &vbiq->active);
125}
126
127static void vbi_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
128{
129 struct au0828_buffer *buf = container_of(vb, struct au0828_buffer, vb);
130 free_buffer(q, buf);
131}
132
133struct videobuf_queue_ops au0828_vbi_qops = {
134 .buf_setup = vbi_setup,
135 .buf_prepare = vbi_prepare,
136 .buf_queue = vbi_queue,
137 .buf_release = vbi_release,
138};
diff --git a/drivers/media/video/au0828/au0828-video.c b/drivers/media/video/au0828/au0828-video.c
index 52f25aabb6dc..7989a7ba7c40 100644
--- a/drivers/media/video/au0828/au0828-video.c
+++ b/drivers/media/video/au0828/au0828-video.c
@@ -314,6 +314,23 @@ static inline void buffer_filled(struct au0828_dev *dev,
314 wake_up(&buf->vb.done); 314 wake_up(&buf->vb.done);
315} 315}
316 316
317static inline void vbi_buffer_filled(struct au0828_dev *dev,
318 struct au0828_dmaqueue *dma_q,
319 struct au0828_buffer *buf)
320{
321 /* Advice that buffer was filled */
322 au0828_isocdbg("[%p/%d] wakeup\n", buf, buf->vb.i);
323
324 buf->vb.state = VIDEOBUF_DONE;
325 buf->vb.field_count++;
326 do_gettimeofday(&buf->vb.ts);
327
328 dev->isoc_ctl.vbi_buf = NULL;
329
330 list_del(&buf->vb.queue);
331 wake_up(&buf->vb.done);
332}
333
317/* 334/*
318 * Identify the buffer header type and properly handles 335 * Identify the buffer header type and properly handles
319 */ 336 */
@@ -327,6 +344,9 @@ static void au0828_copy_video(struct au0828_dev *dev,
327 int linesdone, currlinedone, offset, lencopy, remain; 344 int linesdone, currlinedone, offset, lencopy, remain;
328 int bytesperline = dev->width << 1; /* Assumes 16-bit depth @@@@ */ 345 int bytesperline = dev->width << 1; /* Assumes 16-bit depth @@@@ */
329 346
347 if (len == 0)
348 return;
349
330 if (dma_q->pos + len > buf->vb.size) 350 if (dma_q->pos + len > buf->vb.size)
331 len = buf->vb.size - dma_q->pos; 351 len = buf->vb.size - dma_q->pos;
332 352
@@ -414,17 +434,98 @@ static inline void get_next_buf(struct au0828_dmaqueue *dma_q,
414 return; 434 return;
415} 435}
416 436
437static void au0828_copy_vbi(struct au0828_dev *dev,
438 struct au0828_dmaqueue *dma_q,
439 struct au0828_buffer *buf,
440 unsigned char *p,
441 unsigned char *outp, unsigned long len)
442{
443 unsigned char *startwrite, *startread;
444 int bytesperline;
445 int i, j = 0;
446
447 if (dev == NULL) {
448 au0828_isocdbg("dev is null\n");
449 return;
450 }
451
452 if (dma_q == NULL) {
453 au0828_isocdbg("dma_q is null\n");
454 return;
455 }
456 if (buf == NULL)
457 return;
458 if (p == NULL) {
459 au0828_isocdbg("p is null\n");
460 return;
461 }
462 if (outp == NULL) {
463 au0828_isocdbg("outp is null\n");
464 return;
465 }
466
467 bytesperline = dev->vbi_width;
468
469 if (dma_q->pos + len > buf->vb.size)
470 len = buf->vb.size - dma_q->pos;
471
472 startread = p;
473 startwrite = outp + (dma_q->pos / 2);
474
475 /* Make sure the bottom field populates the second half of the frame */
476 if (buf->top_field == 0)
477 startwrite += bytesperline * dev->vbi_height;
478
479 for (i = 0; i < len; i += 2)
480 startwrite[j++] = startread[i+1];
481
482 dma_q->pos += len;
483}
484
485
486/*
487 * video-buf generic routine to get the next available VBI buffer
488 */
489static inline void vbi_get_next_buf(struct au0828_dmaqueue *dma_q,
490 struct au0828_buffer **buf)
491{
492 struct au0828_dev *dev = container_of(dma_q, struct au0828_dev, vbiq);
493 char *outp;
494
495 if (list_empty(&dma_q->active)) {
496 au0828_isocdbg("No active queue to serve\n");
497 dev->isoc_ctl.vbi_buf = NULL;
498 *buf = NULL;
499 return;
500 }
501
502 /* Get the next buffer */
503 *buf = list_entry(dma_q->active.next, struct au0828_buffer, vb.queue);
504 /* Cleans up buffer - Usefull for testing for frame/URB loss */
505 outp = videobuf_to_vmalloc(&(*buf)->vb);
506 memset(outp, 0x00, (*buf)->vb.size);
507
508 dev->isoc_ctl.vbi_buf = *buf;
509
510 return;
511}
512
417/* 513/*
418 * Controls the isoc copy of each urb packet 514 * Controls the isoc copy of each urb packet
419 */ 515 */
420static inline int au0828_isoc_copy(struct au0828_dev *dev, struct urb *urb) 516static inline int au0828_isoc_copy(struct au0828_dev *dev, struct urb *urb)
421{ 517{
422 struct au0828_buffer *buf; 518 struct au0828_buffer *buf;
519 struct au0828_buffer *vbi_buf;
423 struct au0828_dmaqueue *dma_q = urb->context; 520 struct au0828_dmaqueue *dma_q = urb->context;
521 struct au0828_dmaqueue *vbi_dma_q = &dev->vbiq;
424 unsigned char *outp = NULL; 522 unsigned char *outp = NULL;
523 unsigned char *vbioutp = NULL;
425 int i, len = 0, rc = 1; 524 int i, len = 0, rc = 1;
426 unsigned char *p; 525 unsigned char *p;
427 unsigned char fbyte; 526 unsigned char fbyte;
527 unsigned int vbi_field_size;
528 unsigned int remain, lencopy;
428 529
429 if (!dev) 530 if (!dev)
430 return 0; 531 return 0;
@@ -443,6 +544,10 @@ static inline int au0828_isoc_copy(struct au0828_dev *dev, struct urb *urb)
443 if (buf != NULL) 544 if (buf != NULL)
444 outp = videobuf_to_vmalloc(&buf->vb); 545 outp = videobuf_to_vmalloc(&buf->vb);
445 546
547 vbi_buf = dev->isoc_ctl.vbi_buf;
548 if (vbi_buf != NULL)
549 vbioutp = videobuf_to_vmalloc(&vbi_buf->vb);
550
446 for (i = 0; i < urb->number_of_packets; i++) { 551 for (i = 0; i < urb->number_of_packets; i++) {
447 int status = urb->iso_frame_desc[i].status; 552 int status = urb->iso_frame_desc[i].status;
448 553
@@ -472,6 +577,19 @@ static inline int au0828_isoc_copy(struct au0828_dev *dev, struct urb *urb)
472 au0828_isocdbg("Video frame %s\n", 577 au0828_isocdbg("Video frame %s\n",
473 (fbyte & 0x40) ? "odd" : "even"); 578 (fbyte & 0x40) ? "odd" : "even");
474 if (!(fbyte & 0x40)) { 579 if (!(fbyte & 0x40)) {
580 /* VBI */
581 if (vbi_buf != NULL)
582 vbi_buffer_filled(dev,
583 vbi_dma_q,
584 vbi_buf);
585 vbi_get_next_buf(vbi_dma_q, &vbi_buf);
586 if (vbi_buf == NULL)
587 vbioutp = NULL;
588 else
589 vbioutp = videobuf_to_vmalloc(
590 &vbi_buf->vb);
591
592 /* Video */
475 if (buf != NULL) 593 if (buf != NULL)
476 buffer_filled(dev, dma_q, buf); 594 buffer_filled(dev, dma_q, buf);
477 get_next_buf(dma_q, &buf); 595 get_next_buf(dma_q, &buf);
@@ -488,9 +606,36 @@ static inline int au0828_isoc_copy(struct au0828_dev *dev, struct urb *urb)
488 buf->top_field = 0; 606 buf->top_field = 0;
489 } 607 }
490 608
609 if (vbi_buf != NULL) {
610 if (fbyte & 0x40)
611 vbi_buf->top_field = 1;
612 else
613 vbi_buf->top_field = 0;
614 }
615
616 dev->vbi_read = 0;
617 vbi_dma_q->pos = 0;
491 dma_q->pos = 0; 618 dma_q->pos = 0;
492 } 619 }
493 if (buf != NULL) 620
621 vbi_field_size = dev->vbi_width * dev->vbi_height * 2;
622 if (dev->vbi_read < vbi_field_size) {
623 remain = vbi_field_size - dev->vbi_read;
624 if (len < remain)
625 lencopy = len;
626 else
627 lencopy = remain;
628
629 if (vbi_buf != NULL)
630 au0828_copy_vbi(dev, vbi_dma_q, vbi_buf, p,
631 vbioutp, len);
632
633 len -= lencopy;
634 p += lencopy;
635 dev->vbi_read += lencopy;
636 }
637
638 if (dev->vbi_read >= vbi_field_size && buf != NULL)
494 au0828_copy_video(dev, dma_q, buf, p, outp, len); 639 au0828_copy_video(dev, dma_q, buf, p, outp, len);
495 } 640 }
496 return rc; 641 return rc;
@@ -642,7 +787,7 @@ int au0828_analog_stream_enable(struct au0828_dev *d)
642 au0828_writereg(d, 0x114, 0xa0); 787 au0828_writereg(d, 0x114, 0xa0);
643 au0828_writereg(d, 0x115, 0x05); 788 au0828_writereg(d, 0x115, 0x05);
644 /* set y position */ 789 /* set y position */
645 au0828_writereg(d, 0x112, 0x02); 790 au0828_writereg(d, 0x112, 0x00);
646 au0828_writereg(d, 0x113, 0x00); 791 au0828_writereg(d, 0x113, 0x00);
647 au0828_writereg(d, 0x116, 0xf2); 792 au0828_writereg(d, 0x116, 0xf2);
648 au0828_writereg(d, 0x117, 0x00); 793 au0828_writereg(d, 0x117, 0x00);
@@ -703,47 +848,83 @@ void au0828_analog_unregister(struct au0828_dev *dev)
703 848
704 849
705/* Usage lock check functions */ 850/* Usage lock check functions */
706static int res_get(struct au0828_fh *fh) 851static int res_get(struct au0828_fh *fh, unsigned int bit)
707{ 852{
708 struct au0828_dev *dev = fh->dev; 853 struct au0828_dev *dev = fh->dev;
709 int rc = 0;
710 854
711 /* This instance already has stream_on */ 855 if (fh->resources & bit)
712 if (fh->stream_on) 856 /* have it already allocated */
713 return rc; 857 return 1;
714 858
715 if (dev->stream_on) 859 /* is it free? */
716 return -EBUSY; 860 mutex_lock(&dev->lock);
861 if (dev->resources & bit) {
862 /* no, someone else uses it */
863 mutex_unlock(&dev->lock);
864 return 0;
865 }
866 /* it's free, grab it */
867 fh->resources |= bit;
868 dev->resources |= bit;
869 dprintk(1, "res: get %d\n", bit);
870 mutex_unlock(&dev->lock);
871 return 1;
872}
717 873
718 dev->stream_on = 1; 874static int res_check(struct au0828_fh *fh, unsigned int bit)
719 fh->stream_on = 1; 875{
720 return rc; 876 return fh->resources & bit;
721} 877}
722 878
723static int res_check(struct au0828_fh *fh) 879static int res_locked(struct au0828_dev *dev, unsigned int bit)
724{ 880{
725 return fh->stream_on; 881 return dev->resources & bit;
726} 882}
727 883
728static void res_free(struct au0828_fh *fh) 884static void res_free(struct au0828_fh *fh, unsigned int bits)
729{ 885{
730 struct au0828_dev *dev = fh->dev; 886 struct au0828_dev *dev = fh->dev;
731 887
732 fh->stream_on = 0; 888 BUG_ON((fh->resources & bits) != bits);
733 dev->stream_on = 0; 889
890 mutex_lock(&dev->lock);
891 fh->resources &= ~bits;
892 dev->resources &= ~bits;
893 dprintk(1, "res: put %d\n", bits);
894 mutex_unlock(&dev->lock);
895}
896
897static int get_ressource(struct au0828_fh *fh)
898{
899 switch (fh->type) {
900 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
901 return AU0828_RESOURCE_VIDEO;
902 case V4L2_BUF_TYPE_VBI_CAPTURE:
903 return AU0828_RESOURCE_VBI;
904 default:
905 BUG();
906 return 0;
907 }
734} 908}
735 909
736static int au0828_v4l2_open(struct file *filp) 910static int au0828_v4l2_open(struct file *filp)
737{ 911{
738 int ret = 0; 912 int ret = 0;
913 struct video_device *vdev = video_devdata(filp);
739 struct au0828_dev *dev = video_drvdata(filp); 914 struct au0828_dev *dev = video_drvdata(filp);
740 struct au0828_fh *fh; 915 struct au0828_fh *fh;
741 int type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 916 int type;
742 917
743#ifdef VBI_IS_WORKING 918 switch (vdev->vfl_type) {
744 if (video_devdata(filp)->vfl_type == VFL_TYPE_GRABBER) 919 case VFL_TYPE_GRABBER:
920 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
921 break;
922 case VFL_TYPE_VBI:
745 type = V4L2_BUF_TYPE_VBI_CAPTURE; 923 type = V4L2_BUF_TYPE_VBI_CAPTURE;
746#endif 924 break;
925 default:
926 return -EINVAL;
927 }
747 928
748 fh = kzalloc(sizeof(struct au0828_fh), GFP_KERNEL); 929 fh = kzalloc(sizeof(struct au0828_fh), GFP_KERNEL);
749 if (NULL == fh) { 930 if (NULL == fh) {
@@ -781,10 +962,21 @@ static int au0828_v4l2_open(struct file *filp)
781 dev->users++; 962 dev->users++;
782 963
783 videobuf_queue_vmalloc_init(&fh->vb_vidq, &au0828_video_qops, 964 videobuf_queue_vmalloc_init(&fh->vb_vidq, &au0828_video_qops,
784 NULL, &dev->slock, fh->type, 965 NULL, &dev->slock,
966 V4L2_BUF_TYPE_VIDEO_CAPTURE,
785 V4L2_FIELD_INTERLACED, 967 V4L2_FIELD_INTERLACED,
786 sizeof(struct au0828_buffer), fh); 968 sizeof(struct au0828_buffer), fh);
787 969
970 /* VBI Setup */
971 dev->vbi_width = 720;
972 dev->vbi_height = 1;
973 videobuf_queue_vmalloc_init(&fh->vb_vbiq, &au0828_vbi_qops,
974 NULL, &dev->slock,
975 V4L2_BUF_TYPE_VBI_CAPTURE,
976 V4L2_FIELD_SEQ_TB,
977 sizeof(struct au0828_buffer), fh);
978
979
788 return ret; 980 return ret;
789} 981}
790 982
@@ -794,17 +986,19 @@ static int au0828_v4l2_close(struct file *filp)
794 struct au0828_fh *fh = filp->private_data; 986 struct au0828_fh *fh = filp->private_data;
795 struct au0828_dev *dev = fh->dev; 987 struct au0828_dev *dev = fh->dev;
796 988
797 mutex_lock(&dev->lock); 989 if (res_check(fh, AU0828_RESOURCE_VIDEO)) {
798 if (res_check(fh))
799 res_free(fh);
800
801 if (dev->users == 1) {
802 videobuf_stop(&fh->vb_vidq); 990 videobuf_stop(&fh->vb_vidq);
803 videobuf_mmap_free(&fh->vb_vidq); 991 res_free(fh, AU0828_RESOURCE_VIDEO);
992 }
993
994 if (res_check(fh, AU0828_RESOURCE_VBI)) {
995 videobuf_stop(&fh->vb_vbiq);
996 res_free(fh, AU0828_RESOURCE_VBI);
997 }
804 998
999 if (dev->users == 1) {
805 if (dev->dev_state & DEV_DISCONNECTED) { 1000 if (dev->dev_state & DEV_DISCONNECTED) {
806 au0828_analog_unregister(dev); 1001 au0828_analog_unregister(dev);
807 mutex_unlock(&dev->lock);
808 kfree(dev); 1002 kfree(dev);
809 return 0; 1003 return 0;
810 } 1004 }
@@ -823,10 +1017,11 @@ static int au0828_v4l2_close(struct file *filp)
823 printk(KERN_INFO "Au0828 can't set alternate to 0!\n"); 1017 printk(KERN_INFO "Au0828 can't set alternate to 0!\n");
824 } 1018 }
825 1019
1020 videobuf_mmap_free(&fh->vb_vidq);
1021 videobuf_mmap_free(&fh->vb_vbiq);
826 kfree(fh); 1022 kfree(fh);
827 dev->users--; 1023 dev->users--;
828 wake_up_interruptible_nr(&dev->open, 1); 1024 wake_up_interruptible_nr(&dev->open, 1);
829 mutex_unlock(&dev->lock);
830 return 0; 1025 return 0;
831} 1026}
832 1027
@@ -842,16 +1037,21 @@ static ssize_t au0828_v4l2_read(struct file *filp, char __user *buf,
842 return rc; 1037 return rc;
843 1038
844 if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) { 1039 if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {
845 mutex_lock(&dev->lock); 1040 if (res_locked(dev, AU0828_RESOURCE_VIDEO))
846 rc = res_get(fh); 1041 return -EBUSY;
847 mutex_unlock(&dev->lock);
848
849 if (unlikely(rc < 0))
850 return rc;
851 1042
852 return videobuf_read_stream(&fh->vb_vidq, buf, count, pos, 0, 1043 return videobuf_read_stream(&fh->vb_vidq, buf, count, pos, 0,
853 filp->f_flags & O_NONBLOCK); 1044 filp->f_flags & O_NONBLOCK);
854 } 1045 }
1046
1047 if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE) {
1048 if (!res_get(fh, AU0828_RESOURCE_VBI))
1049 return -EBUSY;
1050
1051 return videobuf_read_stream(&fh->vb_vbiq, buf, count, pos, 0,
1052 filp->f_flags & O_NONBLOCK);
1053 }
1054
855 return 0; 1055 return 0;
856} 1056}
857 1057
@@ -865,17 +1065,17 @@ static unsigned int au0828_v4l2_poll(struct file *filp, poll_table *wait)
865 if (rc < 0) 1065 if (rc < 0)
866 return rc; 1066 return rc;
867 1067
868 mutex_lock(&dev->lock); 1068 if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {
869 rc = res_get(fh); 1069 if (!res_get(fh, AU0828_RESOURCE_VIDEO))
870 mutex_unlock(&dev->lock); 1070 return POLLERR;
871 1071 return videobuf_poll_stream(filp, &fh->vb_vidq, wait);
872 if (unlikely(rc < 0)) 1072 } else if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE) {
873 return POLLERR; 1073 if (!res_get(fh, AU0828_RESOURCE_VBI))
874 1074 return POLLERR;
875 if (V4L2_BUF_TYPE_VIDEO_CAPTURE != fh->type) 1075 return videobuf_poll_stream(filp, &fh->vb_vbiq, wait);
1076 } else {
876 return POLLERR; 1077 return POLLERR;
877 1078 }
878 return videobuf_poll_stream(filp, &fh->vb_vidq, wait);
879} 1079}
880 1080
881static int au0828_v4l2_mmap(struct file *filp, struct vm_area_struct *vma) 1081static int au0828_v4l2_mmap(struct file *filp, struct vm_area_struct *vma)
@@ -888,14 +1088,10 @@ static int au0828_v4l2_mmap(struct file *filp, struct vm_area_struct *vma)
888 if (rc < 0) 1088 if (rc < 0)
889 return rc; 1089 return rc;
890 1090
891 mutex_lock(&dev->lock); 1091 if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
892 rc = res_get(fh); 1092 rc = videobuf_mmap_mapper(&fh->vb_vidq, vma);
893 mutex_unlock(&dev->lock); 1093 else if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE)
894 1094 rc = videobuf_mmap_mapper(&fh->vb_vbiq, vma);
895 if (unlikely(rc < 0))
896 return rc;
897
898 rc = videobuf_mmap_mapper(&fh->vb_vidq, vma);
899 1095
900 return rc; 1096 return rc;
901} 1097}
@@ -911,14 +1107,6 @@ static int au0828_set_format(struct au0828_dev *dev, unsigned int cmd,
911 maxwidth = 720; 1107 maxwidth = 720;
912 maxheight = 480; 1108 maxheight = 480;
913 1109
914#ifdef VBI_IS_WORKING
915 if (format->type == V4L2_BUF_TYPE_SLICED_VBI_CAPTURE) {
916 dprintk(1, "VBI format set: to be supported!\n");
917 return 0;
918 }
919 if (format->type == V4L2_BUF_TYPE_VBI_CAPTURE)
920 return 0;
921#endif
922 if (format->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) 1110 if (format->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
923 return -EINVAL; 1111 return -EINVAL;
924 1112
@@ -999,9 +1187,7 @@ static int vidioc_querycap(struct file *file, void *priv,
999 1187
1000 /*set the device capabilities */ 1188 /*set the device capabilities */
1001 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | 1189 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE |
1002#ifdef VBI_IS_WORKING
1003 V4L2_CAP_VBI_CAPTURE | 1190 V4L2_CAP_VBI_CAPTURE |
1004#endif
1005 V4L2_CAP_AUDIO | 1191 V4L2_CAP_AUDIO |
1006 V4L2_CAP_READWRITE | 1192 V4L2_CAP_READWRITE |
1007 V4L2_CAP_STREAMING | 1193 V4L2_CAP_STREAMING |
@@ -1056,20 +1242,21 @@ static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
1056 struct au0828_dev *dev = fh->dev; 1242 struct au0828_dev *dev = fh->dev;
1057 int rc; 1243 int rc;
1058 1244
1245 rc = check_dev(dev);
1246 if (rc < 0)
1247 return rc;
1248
1249 mutex_lock(&dev->lock);
1250
1059 if (videobuf_queue_is_busy(&fh->vb_vidq)) { 1251 if (videobuf_queue_is_busy(&fh->vb_vidq)) {
1060 printk(KERN_INFO "%s queue busy\n", __func__); 1252 printk(KERN_INFO "%s queue busy\n", __func__);
1061 rc = -EBUSY; 1253 rc = -EBUSY;
1062 goto out; 1254 goto out;
1063 } 1255 }
1064 1256
1065 if (dev->stream_on && !fh->stream_on) { 1257 rc = au0828_set_format(dev, VIDIOC_S_FMT, f);
1066 printk(KERN_INFO "%s device in use by another fh\n", __func__);
1067 rc = -EBUSY;
1068 goto out;
1069 }
1070
1071 return au0828_set_format(dev, VIDIOC_S_FMT, f);
1072out: 1258out:
1259 mutex_unlock(&dev->lock);
1073 return rc; 1260 return rc;
1074} 1261}
1075 1262
@@ -1300,6 +1487,29 @@ static int vidioc_s_frequency(struct file *file, void *priv,
1300 return 0; 1487 return 0;
1301} 1488}
1302 1489
1490
1491/* RAW VBI ioctls */
1492
1493static int vidioc_g_fmt_vbi_cap(struct file *file, void *priv,
1494 struct v4l2_format *format)
1495{
1496 struct au0828_fh *fh = priv;
1497 struct au0828_dev *dev = fh->dev;
1498
1499 format->fmt.vbi.samples_per_line = dev->vbi_width;
1500 format->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY;
1501 format->fmt.vbi.offset = 0;
1502 format->fmt.vbi.flags = 0;
1503 format->fmt.vbi.sampling_rate = 6750000 * 4 / 2;
1504
1505 format->fmt.vbi.count[0] = dev->vbi_height;
1506 format->fmt.vbi.count[1] = dev->vbi_height;
1507 format->fmt.vbi.start[0] = 21;
1508 format->fmt.vbi.start[1] = 284;
1509
1510 return 0;
1511}
1512
1303static int vidioc_g_chip_ident(struct file *file, void *priv, 1513static int vidioc_g_chip_ident(struct file *file, void *priv,
1304 struct v4l2_dbg_chip_ident *chip) 1514 struct v4l2_dbg_chip_ident *chip)
1305{ 1515{
@@ -1345,25 +1555,32 @@ static int vidioc_cropcap(struct file *file, void *priv,
1345static int vidioc_streamon(struct file *file, void *priv, 1555static int vidioc_streamon(struct file *file, void *priv,
1346 enum v4l2_buf_type type) 1556 enum v4l2_buf_type type)
1347{ 1557{
1348 struct au0828_fh *fh = priv; 1558 struct au0828_fh *fh = priv;
1349 struct au0828_dev *dev = fh->dev; 1559 struct au0828_dev *dev = fh->dev;
1350 int rc; 1560 int rc = -EINVAL;
1351 1561
1352 rc = check_dev(dev); 1562 rc = check_dev(dev);
1353 if (rc < 0) 1563 if (rc < 0)
1354 return rc; 1564 return rc;
1355 1565
1566 if (unlikely(type != fh->type))
1567 return -EINVAL;
1568
1569 dprintk(1, "vidioc_streamon fh=%p t=%d fh->res=%d dev->res=%d\n",
1570 fh, type, fh->resources, dev->resources);
1571
1572 if (unlikely(!res_get(fh, get_ressource(fh))))
1573 return -EBUSY;
1574
1356 if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE) { 1575 if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {
1357 au0828_analog_stream_enable(dev); 1576 au0828_analog_stream_enable(dev);
1358 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_stream, 1); 1577 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_stream, 1);
1359 } 1578 }
1360 1579
1361 mutex_lock(&dev->lock); 1580 if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
1362 rc = res_get(fh);
1363
1364 if (likely(rc >= 0))
1365 rc = videobuf_streamon(&fh->vb_vidq); 1581 rc = videobuf_streamon(&fh->vb_vidq);
1366 mutex_unlock(&dev->lock); 1582 else if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE)
1583 rc = videobuf_streamon(&fh->vb_vbiq);
1367 1584
1368 return rc; 1585 return rc;
1369} 1586}
@@ -1371,38 +1588,42 @@ static int vidioc_streamon(struct file *file, void *priv,
1371static int vidioc_streamoff(struct file *file, void *priv, 1588static int vidioc_streamoff(struct file *file, void *priv,
1372 enum v4l2_buf_type type) 1589 enum v4l2_buf_type type)
1373{ 1590{
1374 struct au0828_fh *fh = priv; 1591 struct au0828_fh *fh = priv;
1375 struct au0828_dev *dev = fh->dev; 1592 struct au0828_dev *dev = fh->dev;
1376 int i; 1593 int rc;
1377 int ret; 1594 int i;
1378 int rc;
1379 1595
1380 rc = check_dev(dev); 1596 rc = check_dev(dev);
1381 if (rc < 0) 1597 if (rc < 0)
1382 return rc; 1598 return rc;
1383 1599
1384 if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) 1600 if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE &&
1601 fh->type != V4L2_BUF_TYPE_VBI_CAPTURE)
1385 return -EINVAL; 1602 return -EINVAL;
1386 if (type != fh->type) 1603 if (type != fh->type)
1387 return -EINVAL; 1604 return -EINVAL;
1388 1605
1389 if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE) { 1606 dprintk(1, "vidioc_streamoff fh=%p t=%d fh->res=%d dev->res=%d\n",
1607 fh, type, fh->resources, dev->resources);
1608
1609 if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {
1390 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_stream, 0); 1610 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_stream, 0);
1391 ret = au0828_stream_interrupt(dev); 1611 rc = au0828_stream_interrupt(dev);
1392 if (ret != 0) 1612 if (rc != 0)
1393 return ret; 1613 return rc;
1394 }
1395 1614
1396 for (i = 0; i < AU0828_MAX_INPUT; i++) { 1615 for (i = 0; i < AU0828_MAX_INPUT; i++) {
1397 if (AUVI_INPUT(i).audio_setup == NULL) 1616 if (AUVI_INPUT(i).audio_setup == NULL)
1398 continue; 1617 continue;
1399 (AUVI_INPUT(i).audio_setup)(dev, 0); 1618 (AUVI_INPUT(i).audio_setup)(dev, 0);
1400 } 1619 }
1401 1620
1402 mutex_lock(&dev->lock); 1621 videobuf_streamoff(&fh->vb_vidq);
1403 videobuf_streamoff(&fh->vb_vidq); 1622 res_free(fh, AU0828_RESOURCE_VIDEO);
1404 res_free(fh); 1623 } else if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE) {
1405 mutex_unlock(&dev->lock); 1624 videobuf_streamoff(&fh->vb_vbiq);
1625 res_free(fh, AU0828_RESOURCE_VBI);
1626 }
1406 1627
1407 return 0; 1628 return 0;
1408} 1629}
@@ -1527,19 +1748,11 @@ static const struct v4l2_ioctl_ops video_ioctl_ops = {
1527 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap, 1748 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
1528 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap, 1749 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
1529 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap, 1750 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
1530#ifdef VBI_IS_WORKING
1531 .vidioc_g_fmt_vbi_cap = vidioc_g_fmt_vbi_cap, 1751 .vidioc_g_fmt_vbi_cap = vidioc_g_fmt_vbi_cap,
1532 .vidioc_try_fmt_vbi_cap = vidioc_s_fmt_vbi_cap, 1752 .vidioc_s_fmt_vbi_cap = vidioc_g_fmt_vbi_cap,
1533 .vidioc_s_fmt_vbi_cap = vidioc_s_fmt_vbi_cap,
1534#endif
1535 .vidioc_g_audio = vidioc_g_audio, 1753 .vidioc_g_audio = vidioc_g_audio,
1536 .vidioc_s_audio = vidioc_s_audio, 1754 .vidioc_s_audio = vidioc_s_audio,
1537 .vidioc_cropcap = vidioc_cropcap, 1755 .vidioc_cropcap = vidioc_cropcap,
1538#ifdef VBI_IS_WORKING
1539 .vidioc_g_fmt_sliced_vbi_cap = vidioc_g_fmt_sliced_vbi_cap,
1540 .vidioc_try_fmt_sliced_vbi_cap = vidioc_try_set_sliced_vbi_cap,
1541 .vidioc_s_fmt_sliced_vbi_cap = vidioc_try_set_sliced_vbi_cap,
1542#endif
1543 .vidioc_reqbufs = vidioc_reqbufs, 1756 .vidioc_reqbufs = vidioc_reqbufs,
1544 .vidioc_querybuf = vidioc_querybuf, 1757 .vidioc_querybuf = vidioc_querybuf,
1545 .vidioc_qbuf = vidioc_qbuf, 1758 .vidioc_qbuf = vidioc_qbuf,
@@ -1621,8 +1834,11 @@ int au0828_analog_register(struct au0828_dev *dev,
1621 spin_lock_init(&dev->slock); 1834 spin_lock_init(&dev->slock);
1622 mutex_init(&dev->lock); 1835 mutex_init(&dev->lock);
1623 1836
1837 /* init video dma queues */
1624 INIT_LIST_HEAD(&dev->vidq.active); 1838 INIT_LIST_HEAD(&dev->vidq.active);
1625 INIT_LIST_HEAD(&dev->vidq.queued); 1839 INIT_LIST_HEAD(&dev->vidq.queued);
1840 INIT_LIST_HEAD(&dev->vbiq.active);
1841 INIT_LIST_HEAD(&dev->vbiq.queued);
1626 1842
1627 dev->width = NTSC_STD_W; 1843 dev->width = NTSC_STD_W;
1628 dev->height = NTSC_STD_H; 1844 dev->height = NTSC_STD_H;
@@ -1638,26 +1854,23 @@ int au0828_analog_register(struct au0828_dev *dev,
1638 return -ENOMEM; 1854 return -ENOMEM;
1639 } 1855 }
1640 1856
1641#ifdef VBI_IS_WORKING 1857 /* allocate the VBI struct */
1642 dev->vbi_dev = video_device_alloc(); 1858 dev->vbi_dev = video_device_alloc();
1643 if (NULL == dev->vbi_dev) { 1859 if (NULL == dev->vbi_dev) {
1644 dprintk(1, "Can't allocate vbi_device.\n"); 1860 dprintk(1, "Can't allocate vbi_device.\n");
1645 kfree(dev->vdev); 1861 kfree(dev->vdev);
1646 return -ENOMEM; 1862 return -ENOMEM;
1647 } 1863 }
1648#endif
1649 1864
1650 /* Fill the video capture device struct */ 1865 /* Fill the video capture device struct */
1651 *dev->vdev = au0828_video_template; 1866 *dev->vdev = au0828_video_template;
1652 dev->vdev->parent = &dev->usbdev->dev; 1867 dev->vdev->parent = &dev->usbdev->dev;
1653 strcpy(dev->vdev->name, "au0828a video"); 1868 strcpy(dev->vdev->name, "au0828a video");
1654 1869
1655#ifdef VBI_IS_WORKING
1656 /* Setup the VBI device */ 1870 /* Setup the VBI device */
1657 *dev->vbi_dev = au0828_video_template; 1871 *dev->vbi_dev = au0828_video_template;
1658 dev->vbi_dev->parent = &dev->usbdev->dev; 1872 dev->vbi_dev->parent = &dev->usbdev->dev;
1659 strcpy(dev->vbi_dev->name, "au0828a vbi"); 1873 strcpy(dev->vbi_dev->name, "au0828a vbi");
1660#endif
1661 1874
1662 /* Register the v4l2 device */ 1875 /* Register the v4l2 device */
1663 video_set_drvdata(dev->vdev, dev); 1876 video_set_drvdata(dev->vdev, dev);
@@ -1669,7 +1882,6 @@ int au0828_analog_register(struct au0828_dev *dev,
1669 return -ENODEV; 1882 return -ENODEV;
1670 } 1883 }
1671 1884
1672#ifdef VBI_IS_WORKING
1673 /* Register the vbi device */ 1885 /* Register the vbi device */
1674 video_set_drvdata(dev->vbi_dev, dev); 1886 video_set_drvdata(dev->vbi_dev, dev);
1675 retval = video_register_device(dev->vbi_dev, VFL_TYPE_VBI, -1); 1887 retval = video_register_device(dev->vbi_dev, VFL_TYPE_VBI, -1);
@@ -1680,7 +1892,6 @@ int au0828_analog_register(struct au0828_dev *dev,
1680 video_device_release(dev->vdev); 1892 video_device_release(dev->vdev);
1681 return -ENODEV; 1893 return -ENODEV;
1682 } 1894 }
1683#endif
1684 1895
1685 dprintk(1, "%s completed!\n", __func__); 1896 dprintk(1, "%s completed!\n", __func__);
1686 1897
diff --git a/drivers/media/video/au0828/au0828.h b/drivers/media/video/au0828/au0828.h
index 207f32dec6a6..9905bc4f5f59 100644
--- a/drivers/media/video/au0828/au0828.h
+++ b/drivers/media/video/au0828/au0828.h
@@ -60,6 +60,10 @@
60 60
61#define AU0828_MAX_INPUT 4 61#define AU0828_MAX_INPUT 4
62 62
63/* au0828 resource types (used for res_get/res_lock etc */
64#define AU0828_RESOURCE_VIDEO 0x01
65#define AU0828_RESOURCE_VBI 0x02
66
63enum au0828_itype { 67enum au0828_itype {
64 AU0828_VMUX_UNDEFINED = 0, 68 AU0828_VMUX_UNDEFINED = 0,
65 AU0828_VMUX_COMPOSITE, 69 AU0828_VMUX_COMPOSITE,
@@ -115,8 +119,10 @@ enum au0828_dev_state {
115 119
116struct au0828_fh { 120struct au0828_fh {
117 struct au0828_dev *dev; 121 struct au0828_dev *dev;
118 unsigned int stream_on:1; /* Locks streams */ 122 unsigned int resources;
123
119 struct videobuf_queue vb_vidq; 124 struct videobuf_queue vb_vidq;
125 struct videobuf_queue vb_vbiq;
120 enum v4l2_buf_type type; 126 enum v4l2_buf_type type;
121}; 127};
122 128
@@ -145,7 +151,8 @@ struct au0828_usb_isoc_ctl {
145 int tmp_buf_len; 151 int tmp_buf_len;
146 152
147 /* Stores already requested buffers */ 153 /* Stores already requested buffers */
148 struct au0828_buffer *buf; 154 struct au0828_buffer *buf;
155 struct au0828_buffer *vbi_buf;
149 156
150 /* Stores the number of received fields */ 157 /* Stores the number of received fields */
151 int nfields; 158 int nfields;
@@ -194,11 +201,14 @@ struct au0828_dev {
194 /* Analog */ 201 /* Analog */
195 struct v4l2_device v4l2_dev; 202 struct v4l2_device v4l2_dev;
196 int users; 203 int users;
197 unsigned int stream_on:1; /* Locks streams */ 204 unsigned int resources; /* resources in use */
198 struct video_device *vdev; 205 struct video_device *vdev;
199 struct video_device *vbi_dev; 206 struct video_device *vbi_dev;
200 int width; 207 int width;
201 int height; 208 int height;
209 int vbi_width;
210 int vbi_height;
211 u32 vbi_read;
202 u32 field_size; 212 u32 field_size;
203 u32 frame_size; 213 u32 frame_size;
204 u32 bytesperline; 214 u32 bytesperline;
@@ -219,6 +229,7 @@ struct au0828_dev {
219 229
220 /* Isoc control struct */ 230 /* Isoc control struct */
221 struct au0828_dmaqueue vidq; 231 struct au0828_dmaqueue vidq;
232 struct au0828_dmaqueue vbiq;
222 struct au0828_usb_isoc_ctl isoc_ctl; 233 struct au0828_usb_isoc_ctl isoc_ctl;
223 spinlock_t slock; 234 spinlock_t slock;
224 235
@@ -278,6 +289,9 @@ void au0828_analog_unregister(struct au0828_dev *dev);
278extern int au0828_dvb_register(struct au0828_dev *dev); 289extern int au0828_dvb_register(struct au0828_dev *dev);
279extern void au0828_dvb_unregister(struct au0828_dev *dev); 290extern void au0828_dvb_unregister(struct au0828_dev *dev);
280 291
292/* au0828-vbi.c */
293extern struct videobuf_queue_ops au0828_vbi_qops;
294
281#define dprintk(level, fmt, arg...)\ 295#define dprintk(level, fmt, arg...)\
282 do { if (au0828_debug & level)\ 296 do { if (au0828_debug & level)\
283 printk(KERN_DEBUG DRIVER_NAME "/0: " fmt, ## arg);\ 297 printk(KERN_DEBUG DRIVER_NAME "/0: " fmt, ## arg);\
diff --git a/drivers/media/video/bt8xx/bttv-risc.c b/drivers/media/video/bt8xx/bttv-risc.c
index c24b1c100e13..0fa9f39f37a3 100644
--- a/drivers/media/video/bt8xx/bttv-risc.c
+++ b/drivers/media/video/bt8xx/bttv-risc.c
@@ -583,7 +583,7 @@ bttv_dma_free(struct videobuf_queue *q,struct bttv *btv, struct bttv_buffer *buf
583 583
584 BUG_ON(in_interrupt()); 584 BUG_ON(in_interrupt());
585 videobuf_waiton(&buf->vb,0,0); 585 videobuf_waiton(&buf->vb,0,0);
586 videobuf_dma_unmap(q, dma); 586 videobuf_dma_unmap(q->dev, dma);
587 videobuf_dma_free(dma); 587 videobuf_dma_free(dma);
588 btcx_riscmem_free(btv->c.pci,&buf->bottom); 588 btcx_riscmem_free(btv->c.pci,&buf->bottom);
589 btcx_riscmem_free(btv->c.pci,&buf->top); 589 btcx_riscmem_free(btv->c.pci,&buf->top);
diff --git a/drivers/media/video/cpia_usb.c b/drivers/media/video/cpia_usb.c
index ef1f89399983..58d193ff591c 100644
--- a/drivers/media/video/cpia_usb.c
+++ b/drivers/media/video/cpia_usb.c
@@ -584,7 +584,6 @@ static void cpia_disconnect(struct usb_interface *intf)
584{ 584{
585 struct cam_data *cam = usb_get_intfdata(intf); 585 struct cam_data *cam = usb_get_intfdata(intf);
586 struct usb_cpia *ucpia; 586 struct usb_cpia *ucpia;
587 struct usb_device *udev;
588 587
589 usb_set_intfdata(intf, NULL); 588 usb_set_intfdata(intf, NULL);
590 if (!cam) 589 if (!cam)
@@ -606,8 +605,6 @@ static void cpia_disconnect(struct usb_interface *intf)
606 if (waitqueue_active(&ucpia->wq_stream)) 605 if (waitqueue_active(&ucpia->wq_stream))
607 wake_up_interruptible(&ucpia->wq_stream); 606 wake_up_interruptible(&ucpia->wq_stream);
608 607
609 udev = interface_to_usbdev(intf);
610
611 ucpia->curbuff = ucpia->workbuff = NULL; 608 ucpia->curbuff = ucpia->workbuff = NULL;
612 609
613 vfree(ucpia->buffers[2]); 610 vfree(ucpia->buffers[2]);
diff --git a/drivers/media/video/cx18/cx18-ioctl.c b/drivers/media/video/cx18/cx18-ioctl.c
index 20eaf38ba959..d6792405f8d3 100644
--- a/drivers/media/video/cx18/cx18-ioctl.c
+++ b/drivers/media/video/cx18/cx18-ioctl.c
@@ -1081,7 +1081,7 @@ long cx18_v4l2_ioctl(struct file *filp, unsigned int cmd,
1081 unsigned long arg) 1081 unsigned long arg)
1082{ 1082{
1083 struct video_device *vfd = video_devdata(filp); 1083 struct video_device *vfd = video_devdata(filp);
1084 struct cx18_open_id *id = (struct cx18_open_id *)filp->private_data; 1084 struct cx18_open_id *id = filp->private_data;
1085 struct cx18 *cx = id->cx; 1085 struct cx18 *cx = id->cx;
1086 long res; 1086 long res;
1087 1087
diff --git a/drivers/media/video/cx23885/cx23885-cards.c b/drivers/media/video/cx23885/cx23885-cards.c
index d639186f645d..2014daedee8b 100644
--- a/drivers/media/video/cx23885/cx23885-cards.c
+++ b/drivers/media/video/cx23885/cx23885-cards.c
@@ -408,10 +408,18 @@ struct cx23885_subid cx23885_subids[] = {
408 .card = CX23885_BOARD_HAUPPAUGE_HVR1275, 408 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
409 }, { 409 }, {
410 .subvendor = 0x0070, 410 .subvendor = 0x0070,
411 .subdevice = 0x221d,
412 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
413 }, {
414 .subvendor = 0x0070,
411 .subdevice = 0x2251, 415 .subdevice = 0x2251,
412 .card = CX23885_BOARD_HAUPPAUGE_HVR1255, 416 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
413 }, { 417 }, {
414 .subvendor = 0x0070, 418 .subvendor = 0x0070,
419 .subdevice = 0x2259,
420 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
421 }, {
422 .subvendor = 0x0070,
415 .subdevice = 0x2291, 423 .subdevice = 0x2291,
416 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 424 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
417 }, { 425 }, {
@@ -419,6 +427,38 @@ struct cx23885_subid cx23885_subids[] = {
419 .subdevice = 0x2295, 427 .subdevice = 0x2295,
420 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 428 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
421 }, { 429 }, {
430 .subvendor = 0x0070,
431 .subdevice = 0x2299,
432 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
433 }, {
434 .subvendor = 0x0070,
435 .subdevice = 0x229d,
436 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
437 }, {
438 .subvendor = 0x0070,
439 .subdevice = 0x22f0,
440 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
441 }, {
442 .subvendor = 0x0070,
443 .subdevice = 0x22f1,
444 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
445 }, {
446 .subvendor = 0x0070,
447 .subdevice = 0x22f2,
448 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
449 }, {
450 .subvendor = 0x0070,
451 .subdevice = 0x22f3,
452 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
453 }, {
454 .subvendor = 0x0070,
455 .subdevice = 0x22f4,
456 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
457 }, {
458 .subvendor = 0x0070,
459 .subdevice = 0x22f5,
460 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
461 }, {
422 .subvendor = 0x14f1, 462 .subvendor = 0x14f1,
423 .subdevice = 0x8651, 463 .subdevice = 0x8651,
424 .card = CX23885_BOARD_MYGICA_X8506, 464 .card = CX23885_BOARD_MYGICA_X8506,
diff --git a/drivers/media/video/cx23885/cx23885-core.c b/drivers/media/video/cx23885/cx23885-core.c
index 0dde57e96d30..ff76f64edac1 100644
--- a/drivers/media/video/cx23885/cx23885-core.c
+++ b/drivers/media/video/cx23885/cx23885-core.c
@@ -1142,7 +1142,7 @@ void cx23885_free_buffer(struct videobuf_queue *q, struct cx23885_buffer *buf)
1142 1142
1143 BUG_ON(in_interrupt()); 1143 BUG_ON(in_interrupt());
1144 videobuf_waiton(&buf->vb, 0, 0); 1144 videobuf_waiton(&buf->vb, 0, 0);
1145 videobuf_dma_unmap(q, dma); 1145 videobuf_dma_unmap(q->dev, dma);
1146 videobuf_dma_free(dma); 1146 videobuf_dma_free(dma);
1147 btcx_riscmem_free(to_pci_dev(q->dev), &buf->risc); 1147 btcx_riscmem_free(to_pci_dev(q->dev), &buf->risc);
1148 buf->vb.state = VIDEOBUF_NEEDS_INIT; 1148 buf->vb.state = VIDEOBUF_NEEDS_INIT;
@@ -1953,8 +1953,12 @@ static int __devinit cx23885_initdev(struct pci_dev *pci_dev,
1953 goto fail_irq; 1953 goto fail_irq;
1954 } 1954 }
1955 1955
1956 err = request_irq(pci_dev->irq, cx23885_irq, 1956 if (!pci_enable_msi(pci_dev))
1957 IRQF_SHARED | IRQF_DISABLED, dev->name, dev); 1957 err = request_irq(pci_dev->irq, cx23885_irq,
1958 IRQF_DISABLED, dev->name, dev);
1959 else
1960 err = request_irq(pci_dev->irq, cx23885_irq,
1961 IRQF_SHARED | IRQF_DISABLED, dev->name, dev);
1958 if (err < 0) { 1962 if (err < 0) {
1959 printk(KERN_ERR "%s: can't get IRQ %d\n", 1963 printk(KERN_ERR "%s: can't get IRQ %d\n",
1960 dev->name, pci_dev->irq); 1964 dev->name, pci_dev->irq);
@@ -2000,6 +2004,7 @@ static void __devexit cx23885_finidev(struct pci_dev *pci_dev)
2000 2004
2001 /* unregister stuff */ 2005 /* unregister stuff */
2002 free_irq(pci_dev->irq, dev); 2006 free_irq(pci_dev->irq, dev);
2007 pci_disable_msi(pci_dev);
2003 2008
2004 cx23885_dev_unregister(dev); 2009 cx23885_dev_unregister(dev);
2005 v4l2_device_unregister(v4l2_dev); 2010 v4l2_device_unregister(v4l2_dev);
diff --git a/drivers/media/video/cx23885/cx23885-dvb.c b/drivers/media/video/cx23885/cx23885-dvb.c
index 0a199d774d9b..3d70af283881 100644
--- a/drivers/media/video/cx23885/cx23885-dvb.c
+++ b/drivers/media/video/cx23885/cx23885-dvb.c
@@ -991,7 +991,7 @@ static int dvb_register(struct cx23885_tsport *port)
991 ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port, 991 ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
992 &dev->pci->dev, adapter_nr, 0, 992 &dev->pci->dev, adapter_nr, 0,
993 cx23885_dvb_fe_ioctl_override); 993 cx23885_dvb_fe_ioctl_override);
994 if (!ret) 994 if (ret)
995 return ret; 995 return ret;
996 996
997 /* init CI & MAC */ 997 /* init CI & MAC */
diff --git a/drivers/media/video/cx23885/cx23885-input.c b/drivers/media/video/cx23885/cx23885-input.c
index 5de6ba98f7a8..d0b1613ede2f 100644
--- a/drivers/media/video/cx23885/cx23885-input.c
+++ b/drivers/media/video/cx23885/cx23885-input.c
@@ -37,161 +37,55 @@
37 37
38#include <linux/input.h> 38#include <linux/input.h>
39#include <linux/slab.h> 39#include <linux/slab.h>
40#include <media/ir-common.h> 40#include <media/ir-core.h>
41#include <media/v4l2-subdev.h> 41#include <media/v4l2-subdev.h>
42 42
43#include "cx23885.h" 43#include "cx23885.h"
44 44
45#define RC5_BITS 14
46#define RC5_HALF_BITS (2*RC5_BITS)
47#define RC5_HALF_BITS_MASK ((1 << RC5_HALF_BITS) - 1)
48
49#define RC5_START_BITS_NORMAL 0x3 /* Command range 0 - 63 */
50#define RC5_START_BITS_EXTENDED 0x2 /* Command range 64 - 127 */
51
52#define RC5_EXTENDED_COMMAND_OFFSET 64
53
54#define MODULE_NAME "cx23885" 45#define MODULE_NAME "cx23885"
55 46
56static inline unsigned int rc5_command(u32 rc5_baseband) 47static void convert_measurement(u32 x, struct ir_raw_event *y)
57{ 48{
58 return RC5_INSTR(rc5_baseband) + 49 if (x == V4L2_SUBDEV_IR_PULSE_RX_SEQ_END) {
59 ((RC5_START(rc5_baseband) == RC5_START_BITS_EXTENDED) 50 y->pulse = false;
60 ? RC5_EXTENDED_COMMAND_OFFSET : 0); 51 y->duration = V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS;
61}
62
63static void cx23885_input_process_raw_rc5(struct cx23885_dev *dev)
64{
65 struct card_ir *ir_input = dev->ir_input;
66 unsigned int code, command;
67 u32 rc5;
68
69 /* Ignore codes that are too short to be valid RC-5 */
70 if (ir_input->last_bit < (RC5_HALF_BITS - 1))
71 return;
72
73 /* The library has the manchester coding backwards; XOR to adapt. */
74 code = (ir_input->code & RC5_HALF_BITS_MASK) ^ RC5_HALF_BITS_MASK;
75 rc5 = ir_rc5_decode(code);
76
77 switch (RC5_START(rc5)) {
78 case RC5_START_BITS_NORMAL:
79 break;
80 case RC5_START_BITS_EXTENDED:
81 /* Don't allow if the remote only emits standard commands */
82 if (ir_input->start == RC5_START_BITS_NORMAL)
83 return;
84 break;
85 default:
86 return; 52 return;
87 } 53 }
88 54
89 if (ir_input->addr != RC5_ADDR(rc5)) 55 y->pulse = (x & V4L2_SUBDEV_IR_PULSE_LEVEL_MASK) ? true : false;
90 return; 56 y->duration = x & V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS;
91
92 /* Don't generate a keypress for RC-5 auto-repeated keypresses */
93 command = rc5_command(rc5);
94 if (RC5_TOGGLE(rc5) != RC5_TOGGLE(ir_input->last_rc5) ||
95 command != rc5_command(ir_input->last_rc5) ||
96 /* Catch T == 0, CMD == 0 (e.g. '0') as first keypress after init */
97 RC5_START(ir_input->last_rc5) == 0) {
98 /* This keypress is differnet: not an auto repeat */
99 ir_input_nokey(ir_input->dev, &ir_input->ir);
100 ir_input_keydown(ir_input->dev, &ir_input->ir, command);
101 }
102 ir_input->last_rc5 = rc5;
103
104 /* Schedule when we should do the key up event: ir_input_nokey() */
105 mod_timer(&ir_input->timer_keyup,
106 jiffies + msecs_to_jiffies(ir_input->rc5_key_timeout));
107} 57}
108 58
109static void cx23885_input_next_pulse_width_rc5(struct cx23885_dev *dev, 59static void cx23885_input_process_measurements(struct cx23885_dev *dev,
110 u32 ns_pulse) 60 bool overrun)
111{ 61{
112 const int rc5_quarterbit_ns = 444444; /* 32 cycles/36 kHz/2 = 444 us */ 62 struct cx23885_kernel_ir *kernel_ir = dev->kernel_ir;
113 struct card_ir *ir_input = dev->ir_input; 63 struct ir_raw_event kernel_ir_event;
114 int i, level, quarterbits, halfbits;
115
116 if (!ir_input->active) {
117 ir_input->active = 1;
118 /* assume an initial space that we may not detect or measure */
119 ir_input->code = 0;
120 ir_input->last_bit = 0;
121 }
122 64
123 if (ns_pulse == V4L2_SUBDEV_IR_PULSE_RX_SEQ_END) { 65 u32 sd_ir_data[64];
124 ir_input->last_bit++; /* Account for the final space */ 66 ssize_t num;
125 ir_input->active = 0;
126 cx23885_input_process_raw_rc5(dev);
127 return;
128 }
129
130 level = (ns_pulse & V4L2_SUBDEV_IR_PULSE_LEVEL_MASK) ? 1 : 0;
131
132 /* Skip any leading space to sync to the start bit */
133 if (ir_input->last_bit == 0 && level == 0)
134 return;
135
136 /*
137 * With valid RC-5 we can get up to two consecutive half-bits in a
138 * single pulse measurment. Experiments have shown that the duration
139 * of a half-bit can vary. Make sure we always end up with an even
140 * number of quarter bits at the same level (mark or space).
141 */
142 ns_pulse &= V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS;
143 quarterbits = ns_pulse / rc5_quarterbit_ns;
144 if (quarterbits & 1)
145 quarterbits++;
146 halfbits = quarterbits / 2;
147
148 for (i = 0; i < halfbits; i++) {
149 ir_input->last_bit++;
150 ir_input->code |= (level << ir_input->last_bit);
151
152 if (ir_input->last_bit >= RC5_HALF_BITS-1) {
153 ir_input->active = 0;
154 cx23885_input_process_raw_rc5(dev);
155 /*
156 * If level is 1, a leading mark is invalid for RC5.
157 * If level is 0, we scan past extra intial space.
158 * Either way we don't want to reactivate collecting
159 * marks or spaces here with any left over half-bits.
160 */
161 break;
162 }
163 }
164}
165
166static void cx23885_input_process_pulse_widths_rc5(struct cx23885_dev *dev,
167 bool add_eom)
168{
169 struct card_ir *ir_input = dev->ir_input;
170 struct ir_input_state *ir_input_state = &ir_input->ir;
171
172 u32 ns_pulse[RC5_HALF_BITS+1];
173 ssize_t num = 0;
174 int count, i; 67 int count, i;
68 bool handle = false;
175 69
176 do { 70 do {
177 v4l2_subdev_call(dev->sd_ir, ir, rx_read, (u8 *) ns_pulse, 71 num = 0;
178 sizeof(ns_pulse), &num); 72 v4l2_subdev_call(dev->sd_ir, ir, rx_read, (u8 *) sd_ir_data,
73 sizeof(sd_ir_data), &num);
179 74
180 count = num / sizeof(u32); 75 count = num / sizeof(u32);
181 76
182 /* Append an end of Rx seq, if the caller requested */ 77 for (i = 0; i < count; i++) {
183 if (add_eom && count < ARRAY_SIZE(ns_pulse)) { 78 convert_measurement(sd_ir_data[i], &kernel_ir_event);
184 ns_pulse[count] = V4L2_SUBDEV_IR_PULSE_RX_SEQ_END; 79 ir_raw_event_store(kernel_ir->inp_dev,
185 count++; 80 &kernel_ir_event);
81 handle = true;
186 } 82 }
187
188 /* Just drain the Rx FIFO, if we're called, but not RC-5 */
189 if (ir_input_state->ir_type != IR_TYPE_RC5)
190 continue;
191
192 for (i = 0; i < count; i++)
193 cx23885_input_next_pulse_width_rc5(dev, ns_pulse[i]);
194 } while (num != 0); 83 } while (num != 0);
84
85 if (overrun)
86 ir_raw_event_reset(kernel_ir->inp_dev);
87 else if (handle)
88 ir_raw_event_handle(kernel_ir->inp_dev);
195} 89}
196 90
197void cx23885_input_rx_work_handler(struct cx23885_dev *dev, u32 events) 91void cx23885_input_rx_work_handler(struct cx23885_dev *dev, u32 events)
@@ -230,7 +124,7 @@ void cx23885_input_rx_work_handler(struct cx23885_dev *dev, u32 events)
230 } 124 }
231 125
232 if (data_available) 126 if (data_available)
233 cx23885_input_process_pulse_widths_rc5(dev, overrun); 127 cx23885_input_process_measurements(dev, overrun);
234 128
235 if (overrun) { 129 if (overrun) {
236 /* If there was a FIFO overrun, clear & restart the device */ 130 /* If there was a FIFO overrun, clear & restart the device */
@@ -241,34 +135,15 @@ void cx23885_input_rx_work_handler(struct cx23885_dev *dev, u32 events)
241 } 135 }
242} 136}
243 137
244static void cx23885_input_ir_start(struct cx23885_dev *dev) 138static int cx23885_input_ir_start(struct cx23885_dev *dev)
245{ 139{
246 struct card_ir *ir_input = dev->ir_input;
247 struct ir_input_state *ir_input_state = &ir_input->ir;
248 struct v4l2_subdev_ir_parameters params; 140 struct v4l2_subdev_ir_parameters params;
249 141
250 if (dev->sd_ir == NULL) 142 if (dev->sd_ir == NULL)
251 return; 143 return -ENODEV;
252 144
253 atomic_set(&dev->ir_input_stopping, 0); 145 atomic_set(&dev->ir_input_stopping, 0);
254 146
255 /* keyup timer set up, if needed */
256 switch (dev->board) {
257 case CX23885_BOARD_HAUPPAUGE_HVR1850:
258 case CX23885_BOARD_HAUPPAUGE_HVR1290:
259 setup_timer(&ir_input->timer_keyup,
260 ir_rc5_timer_keyup, /* Not actually RC-5 specific */
261 (unsigned long) ir_input);
262 if (ir_input_state->ir_type == IR_TYPE_RC5) {
263 /*
264 * RC-5 repeats a held key every
265 * 64 bits * (2 * 32/36000) sec/bit = 113.778 ms
266 */
267 ir_input->rc5_key_timeout = 115;
268 }
269 break;
270 }
271
272 v4l2_subdev_call(dev->sd_ir, ir, rx_g_parameters, &params); 147 v4l2_subdev_call(dev->sd_ir, ir, rx_g_parameters, &params);
273 switch (dev->board) { 148 switch (dev->board) {
274 case CX23885_BOARD_HAUPPAUGE_HVR1850: 149 case CX23885_BOARD_HAUPPAUGE_HVR1850:
@@ -299,11 +174,21 @@ static void cx23885_input_ir_start(struct cx23885_dev *dev)
299 break; 174 break;
300 } 175 }
301 v4l2_subdev_call(dev->sd_ir, ir, rx_s_parameters, &params); 176 v4l2_subdev_call(dev->sd_ir, ir, rx_s_parameters, &params);
177 return 0;
178}
179
180static int cx23885_input_ir_open(void *priv)
181{
182 struct cx23885_kernel_ir *kernel_ir = priv;
183
184 if (kernel_ir->cx == NULL)
185 return -ENODEV;
186
187 return cx23885_input_ir_start(kernel_ir->cx);
302} 188}
303 189
304static void cx23885_input_ir_stop(struct cx23885_dev *dev) 190static void cx23885_input_ir_stop(struct cx23885_dev *dev)
305{ 191{
306 struct card_ir *ir_input = dev->ir_input;
307 struct v4l2_subdev_ir_parameters params; 192 struct v4l2_subdev_ir_parameters params;
308 193
309 if (dev->sd_ir == NULL) 194 if (dev->sd_ir == NULL)
@@ -327,21 +212,26 @@ static void cx23885_input_ir_stop(struct cx23885_dev *dev)
327 } 212 }
328 213
329 flush_scheduled_work(); 214 flush_scheduled_work();
215}
330 216
331 switch (dev->board) { 217static void cx23885_input_ir_close(void *priv)
332 case CX23885_BOARD_HAUPPAUGE_HVR1850: 218{
333 case CX23885_BOARD_HAUPPAUGE_HVR1290: 219 struct cx23885_kernel_ir *kernel_ir = priv;
334 del_timer_sync(&ir_input->timer_keyup); 220
335 break; 221 if (kernel_ir->cx != NULL)
336 } 222 cx23885_input_ir_stop(kernel_ir->cx);
337} 223}
338 224
339int cx23885_input_init(struct cx23885_dev *dev) 225int cx23885_input_init(struct cx23885_dev *dev)
340{ 226{
341 struct card_ir *ir; 227 struct cx23885_kernel_ir *kernel_ir;
342 struct input_dev *input_dev; 228 struct input_dev *inp_dev;
343 char *ir_codes = NULL; 229 struct ir_dev_props *props;
344 int ir_type, ir_addr, ir_start; 230
231 char *rc_map;
232 enum rc_driver_type driver_type;
233 unsigned long allowed_protos;
234
345 int ret; 235 int ret;
346 236
347 /* 237 /*
@@ -354,53 +244,59 @@ int cx23885_input_init(struct cx23885_dev *dev)
354 switch (dev->board) { 244 switch (dev->board) {
355 case CX23885_BOARD_HAUPPAUGE_HVR1850: 245 case CX23885_BOARD_HAUPPAUGE_HVR1850:
356 case CX23885_BOARD_HAUPPAUGE_HVR1290: 246 case CX23885_BOARD_HAUPPAUGE_HVR1290:
357 /* Parameters for the grey Hauppauge remote for the HVR-1850 */ 247 /* Integrated CX23888 IR controller */
358 ir_codes = RC_MAP_HAUPPAUGE_NEW; 248 driver_type = RC_DRIVER_IR_RAW;
359 ir_type = IR_TYPE_RC5; 249 allowed_protos = IR_TYPE_ALL;
360 ir_addr = 0x1e; /* RC-5 system bits emitted by the remote */ 250 /* The grey Hauppauge RC-5 remote */
361 ir_start = RC5_START_BITS_NORMAL; /* A basic RC-5 remote */ 251 rc_map = RC_MAP_RC5_HAUPPAUGE_NEW;
362 break; 252 break;
363 } 253 default:
364 if (ir_codes == NULL)
365 return -ENODEV; 254 return -ENODEV;
366
367 ir = kzalloc(sizeof(*ir), GFP_KERNEL);
368 input_dev = input_allocate_device();
369 if (!ir || !input_dev) {
370 ret = -ENOMEM;
371 goto err_out_free;
372 } 255 }
373 256
374 ir->dev = input_dev; 257 /* cx23885 board instance kernel IR state */
375 ir->addr = ir_addr; 258 kernel_ir = kzalloc(sizeof(struct cx23885_kernel_ir), GFP_KERNEL);
376 ir->start = ir_start; 259 if (kernel_ir == NULL)
260 return -ENOMEM;
377 261
378 /* init input device */ 262 kernel_ir->cx = dev;
379 snprintf(ir->name, sizeof(ir->name), "cx23885 IR (%s)", 263 kernel_ir->name = kasprintf(GFP_KERNEL, "cx23885 IR (%s)",
380 cx23885_boards[dev->board].name); 264 cx23885_boards[dev->board].name);
381 snprintf(ir->phys, sizeof(ir->phys), "pci-%s/ir0", pci_name(dev->pci)); 265 kernel_ir->phys = kasprintf(GFP_KERNEL, "pci-%s/ir0",
266 pci_name(dev->pci));
382 267
383 ret = ir_input_init(input_dev, &ir->ir, ir_type); 268 /* input device */
384 if (ret < 0) 269 inp_dev = input_allocate_device();
270 if (inp_dev == NULL) {
271 ret = -ENOMEM;
385 goto err_out_free; 272 goto err_out_free;
273 }
386 274
387 input_dev->name = ir->name; 275 kernel_ir->inp_dev = inp_dev;
388 input_dev->phys = ir->phys; 276 inp_dev->name = kernel_ir->name;
389 input_dev->id.bustype = BUS_PCI; 277 inp_dev->phys = kernel_ir->phys;
390 input_dev->id.version = 1; 278 inp_dev->id.bustype = BUS_PCI;
279 inp_dev->id.version = 1;
391 if (dev->pci->subsystem_vendor) { 280 if (dev->pci->subsystem_vendor) {
392 input_dev->id.vendor = dev->pci->subsystem_vendor; 281 inp_dev->id.vendor = dev->pci->subsystem_vendor;
393 input_dev->id.product = dev->pci->subsystem_device; 282 inp_dev->id.product = dev->pci->subsystem_device;
394 } else { 283 } else {
395 input_dev->id.vendor = dev->pci->vendor; 284 inp_dev->id.vendor = dev->pci->vendor;
396 input_dev->id.product = dev->pci->device; 285 inp_dev->id.product = dev->pci->device;
397 } 286 }
398 input_dev->dev.parent = &dev->pci->dev; 287 inp_dev->dev.parent = &dev->pci->dev;
399 288
400 dev->ir_input = ir; 289 /* kernel ir device properties */
401 cx23885_input_ir_start(dev); 290 props = &kernel_ir->props;
402 291 props->driver_type = driver_type;
403 ret = ir_input_register(ir->dev, ir_codes, NULL, MODULE_NAME); 292 props->allowed_protos = allowed_protos;
293 props->priv = kernel_ir;
294 props->open = cx23885_input_ir_open;
295 props->close = cx23885_input_ir_close;
296
297 /* Go */
298 dev->kernel_ir = kernel_ir;
299 ret = ir_input_register(inp_dev, rc_map, props, MODULE_NAME);
404 if (ret) 300 if (ret)
405 goto err_out_stop; 301 goto err_out_stop;
406 302
@@ -408,9 +304,12 @@ int cx23885_input_init(struct cx23885_dev *dev)
408 304
409err_out_stop: 305err_out_stop:
410 cx23885_input_ir_stop(dev); 306 cx23885_input_ir_stop(dev);
411 dev->ir_input = NULL; 307 dev->kernel_ir = NULL;
308 /* TODO: double check clean-up of kernel_ir->inp_dev */
412err_out_free: 309err_out_free:
413 kfree(ir); 310 kfree(kernel_ir->phys);
311 kfree(kernel_ir->name);
312 kfree(kernel_ir);
414 return ret; 313 return ret;
415} 314}
416 315
@@ -419,9 +318,11 @@ void cx23885_input_fini(struct cx23885_dev *dev)
419 /* Always stop the IR hardware from generating interrupts */ 318 /* Always stop the IR hardware from generating interrupts */
420 cx23885_input_ir_stop(dev); 319 cx23885_input_ir_stop(dev);
421 320
422 if (dev->ir_input == NULL) 321 if (dev->kernel_ir == NULL)
423 return; 322 return;
424 ir_input_unregister(dev->ir_input->dev); 323 ir_input_unregister(dev->kernel_ir->inp_dev);
425 kfree(dev->ir_input); 324 kfree(dev->kernel_ir->phys);
426 dev->ir_input = NULL; 325 kfree(dev->kernel_ir->name);
326 kfree(dev->kernel_ir);
327 dev->kernel_ir = NULL;
427} 328}
diff --git a/drivers/media/video/cx23885/cx23885-ir.c b/drivers/media/video/cx23885/cx23885-ir.c
index 9a677eb080af..6ceabd4fba07 100644
--- a/drivers/media/video/cx23885/cx23885-ir.c
+++ b/drivers/media/video/cx23885/cx23885-ir.c
@@ -53,7 +53,7 @@ void cx23885_ir_rx_work_handler(struct work_struct *work)
53 if (events == 0) 53 if (events == 0)
54 return; 54 return;
55 55
56 if (dev->ir_input) 56 if (dev->kernel_ir)
57 cx23885_input_rx_work_handler(dev, events); 57 cx23885_input_rx_work_handler(dev, events);
58} 58}
59 59
diff --git a/drivers/media/video/cx23885/cx23885.h b/drivers/media/video/cx23885/cx23885.h
index 8d6a55e54ee7..a33f2b71467b 100644
--- a/drivers/media/video/cx23885/cx23885.h
+++ b/drivers/media/video/cx23885/cx23885.h
@@ -30,6 +30,7 @@
30#include <media/tveeprom.h> 30#include <media/tveeprom.h>
31#include <media/videobuf-dma-sg.h> 31#include <media/videobuf-dma-sg.h>
32#include <media/videobuf-dvb.h> 32#include <media/videobuf-dvb.h>
33#include <media/ir-core.h>
33 34
34#include "btcx-risc.h" 35#include "btcx-risc.h"
35#include "cx23885-reg.h" 36#include "cx23885-reg.h"
@@ -304,6 +305,15 @@ struct cx23885_tsport {
304 void *port_priv; 305 void *port_priv;
305}; 306};
306 307
308struct cx23885_kernel_ir {
309 struct cx23885_dev *cx;
310 char *name;
311 char *phys;
312
313 struct input_dev *inp_dev;
314 struct ir_dev_props props;
315};
316
307struct cx23885_dev { 317struct cx23885_dev {
308 atomic_t refcount; 318 atomic_t refcount;
309 struct v4l2_device v4l2_dev; 319 struct v4l2_device v4l2_dev;
@@ -363,7 +373,7 @@ struct cx23885_dev {
363 struct work_struct ir_tx_work; 373 struct work_struct ir_tx_work;
364 unsigned long ir_tx_notifications; 374 unsigned long ir_tx_notifications;
365 375
366 struct card_ir *ir_input; 376 struct cx23885_kernel_ir *kernel_ir;
367 atomic_t ir_input_stopping; 377 atomic_t ir_input_stopping;
368 378
369 /* V4l */ 379 /* V4l */
diff --git a/drivers/media/video/cx88/cx88-alsa.c b/drivers/media/video/cx88/cx88-alsa.c
index 33082c96745e..4f383cdf5296 100644
--- a/drivers/media/video/cx88/cx88-alsa.c
+++ b/drivers/media/video/cx88/cx88-alsa.c
@@ -54,6 +54,12 @@
54 Data type declarations - Can be moded to a header file later 54 Data type declarations - Can be moded to a header file later
55 ****************************************************************************/ 55 ****************************************************************************/
56 56
57struct cx88_audio_buffer {
58 unsigned int bpl;
59 struct btcx_riscmem risc;
60 struct videobuf_dmabuf dma;
61};
62
57struct cx88_audio_dev { 63struct cx88_audio_dev {
58 struct cx88_core *core; 64 struct cx88_core *core;
59 struct cx88_dmaqueue q; 65 struct cx88_dmaqueue q;
@@ -75,7 +81,7 @@ struct cx88_audio_dev {
75 81
76 struct videobuf_dmabuf *dma_risc; 82 struct videobuf_dmabuf *dma_risc;
77 83
78 struct cx88_buffer *buf; 84 struct cx88_audio_buffer *buf;
79 85
80 struct snd_pcm_substream *substream; 86 struct snd_pcm_substream *substream;
81}; 87};
@@ -123,7 +129,7 @@ MODULE_PARM_DESC(debug,"enable debug messages");
123 129
124static int _cx88_start_audio_dma(snd_cx88_card_t *chip) 130static int _cx88_start_audio_dma(snd_cx88_card_t *chip)
125{ 131{
126 struct cx88_buffer *buf = chip->buf; 132 struct cx88_audio_buffer *buf = chip->buf;
127 struct cx88_core *core=chip->core; 133 struct cx88_core *core=chip->core;
128 struct sram_channel *audio_ch = &cx88_sram_channels[SRAM_CH25]; 134 struct sram_channel *audio_ch = &cx88_sram_channels[SRAM_CH25];
129 135
@@ -283,7 +289,7 @@ static int dsp_buffer_free(snd_cx88_card_t *chip)
283 BUG_ON(!chip->dma_size); 289 BUG_ON(!chip->dma_size);
284 290
285 dprintk(2,"Freeing buffer\n"); 291 dprintk(2,"Freeing buffer\n");
286 videobuf_sg_dma_unmap(&chip->pci->dev, chip->dma_risc); 292 videobuf_dma_unmap(&chip->pci->dev, chip->dma_risc);
287 videobuf_dma_free(chip->dma_risc); 293 videobuf_dma_free(chip->dma_risc);
288 btcx_riscmem_free(chip->pci,&chip->buf->risc); 294 btcx_riscmem_free(chip->pci,&chip->buf->risc);
289 kfree(chip->buf); 295 kfree(chip->buf);
@@ -376,7 +382,7 @@ static int snd_cx88_hw_params(struct snd_pcm_substream * substream,
376 snd_cx88_card_t *chip = snd_pcm_substream_chip(substream); 382 snd_cx88_card_t *chip = snd_pcm_substream_chip(substream);
377 struct videobuf_dmabuf *dma; 383 struct videobuf_dmabuf *dma;
378 384
379 struct cx88_buffer *buf; 385 struct cx88_audio_buffer *buf;
380 int ret; 386 int ret;
381 387
382 if (substream->runtime->dma_area) { 388 if (substream->runtime->dma_area) {
@@ -391,30 +397,25 @@ static int snd_cx88_hw_params(struct snd_pcm_substream * substream,
391 BUG_ON(!chip->dma_size); 397 BUG_ON(!chip->dma_size);
392 BUG_ON(chip->num_periods & (chip->num_periods-1)); 398 BUG_ON(chip->num_periods & (chip->num_periods-1));
393 399
394 buf = videobuf_sg_alloc(sizeof(*buf)); 400 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
395 if (NULL == buf) 401 if (NULL == buf)
396 return -ENOMEM; 402 return -ENOMEM;
397 403
398 buf->vb.memory = V4L2_MEMORY_MMAP; 404 buf->bpl = chip->period_size;
399 buf->vb.field = V4L2_FIELD_NONE;
400 buf->vb.width = chip->period_size;
401 buf->bpl = chip->period_size;
402 buf->vb.height = chip->num_periods;
403 buf->vb.size = chip->dma_size;
404 405
405 dma = videobuf_to_dma(&buf->vb); 406 dma = &buf->dma;
406 videobuf_dma_init(dma); 407 videobuf_dma_init(dma);
407 ret = videobuf_dma_init_kernel(dma, PCI_DMA_FROMDEVICE, 408 ret = videobuf_dma_init_kernel(dma, PCI_DMA_FROMDEVICE,
408 (PAGE_ALIGN(buf->vb.size) >> PAGE_SHIFT)); 409 (PAGE_ALIGN(chip->dma_size) >> PAGE_SHIFT));
409 if (ret < 0) 410 if (ret < 0)
410 goto error; 411 goto error;
411 412
412 ret = videobuf_sg_dma_map(&chip->pci->dev, dma); 413 ret = videobuf_dma_map(&chip->pci->dev, dma);
413 if (ret < 0) 414 if (ret < 0)
414 goto error; 415 goto error;
415 416
416 ret = cx88_risc_databuffer(chip->pci, &buf->risc, dma->sglist, 417 ret = cx88_risc_databuffer(chip->pci, &buf->risc, dma->sglist,
417 buf->vb.width, buf->vb.height, 1); 418 chip->period_size, chip->num_periods, 1);
418 if (ret < 0) 419 if (ret < 0)
419 goto error; 420 goto error;
420 421
@@ -422,12 +423,10 @@ static int snd_cx88_hw_params(struct snd_pcm_substream * substream,
422 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP|RISC_IRQ1|RISC_CNT_INC); 423 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP|RISC_IRQ1|RISC_CNT_INC);
423 buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma); 424 buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
424 425
425 buf->vb.state = VIDEOBUF_PREPARED;
426
427 chip->buf = buf; 426 chip->buf = buf;
428 chip->dma_risc = dma; 427 chip->dma_risc = dma;
429 428
430 substream->runtime->dma_area = chip->dma_risc->vmalloc; 429 substream->runtime->dma_area = chip->dma_risc->vaddr;
431 substream->runtime->dma_bytes = chip->dma_size; 430 substream->runtime->dma_bytes = chip->dma_size;
432 substream->runtime->dma_addr = 0; 431 substream->runtime->dma_addr = 0;
433 return 0; 432 return 0;
@@ -740,7 +739,7 @@ static int __devinit snd_cx88_create(struct snd_card *card,
740 739
741 pci_set_master(pci); 740 pci_set_master(pci);
742 741
743 chip = (snd_cx88_card_t *) card->private_data; 742 chip = card->private_data;
744 743
745 core = cx88_core_get(pci); 744 core = cx88_core_get(pci);
746 if (NULL == core) { 745 if (NULL == core) {
diff --git a/drivers/media/video/cx88/cx88-cards.c b/drivers/media/video/cx88/cx88-cards.c
index 2918a6e38fe8..e8416b76da67 100644
--- a/drivers/media/video/cx88/cx88-cards.c
+++ b/drivers/media/video/cx88/cx88-cards.c
@@ -45,6 +45,10 @@ static unsigned int latency = UNSET;
45module_param(latency,int,0444); 45module_param(latency,int,0444);
46MODULE_PARM_DESC(latency,"pci latency timer"); 46MODULE_PARM_DESC(latency,"pci latency timer");
47 47
48static int disable_ir;
49module_param(disable_ir, int, 0444);
50MODULE_PARM_DESC(latency, "Disable IR support");
51
48#define info_printk(core, fmt, arg...) \ 52#define info_printk(core, fmt, arg...) \
49 printk(KERN_INFO "%s: " fmt, core->name , ## arg) 53 printk(KERN_INFO "%s: " fmt, core->name , ## arg)
50 54
@@ -3498,7 +3502,10 @@ struct cx88_core *cx88_core_create(struct pci_dev *pci, int nr)
3498 } 3502 }
3499 3503
3500 cx88_card_setup(core); 3504 cx88_card_setup(core);
3501 cx88_ir_init(core, pci); 3505 if (!disable_ir) {
3506 cx88_i2c_init_ir(core);
3507 cx88_ir_init(core, pci);
3508 }
3502 3509
3503 return core; 3510 return core;
3504} 3511}
diff --git a/drivers/media/video/cx88/cx88-core.c b/drivers/media/video/cx88/cx88-core.c
index 8b21457111b1..85eb266fb351 100644
--- a/drivers/media/video/cx88/cx88-core.c
+++ b/drivers/media/video/cx88/cx88-core.c
@@ -218,7 +218,7 @@ cx88_free_buffer(struct videobuf_queue *q, struct cx88_buffer *buf)
218 218
219 BUG_ON(in_interrupt()); 219 BUG_ON(in_interrupt());
220 videobuf_waiton(&buf->vb,0,0); 220 videobuf_waiton(&buf->vb,0,0);
221 videobuf_dma_unmap(q, dma); 221 videobuf_dma_unmap(q->dev, dma);
222 videobuf_dma_free(dma); 222 videobuf_dma_free(dma);
223 btcx_riscmem_free(to_pci_dev(q->dev), &buf->risc); 223 btcx_riscmem_free(to_pci_dev(q->dev), &buf->risc);
224 buf->vb.state = VIDEOBUF_NEEDS_INIT; 224 buf->vb.state = VIDEOBUF_NEEDS_INIT;
diff --git a/drivers/media/video/cx88/cx88-i2c.c b/drivers/media/video/cx88/cx88-i2c.c
index fb39f1184558..375ad53f7961 100644
--- a/drivers/media/video/cx88/cx88-i2c.c
+++ b/drivers/media/video/cx88/cx88-i2c.c
@@ -181,6 +181,11 @@ int cx88_i2c_init(struct cx88_core *core, struct pci_dev *pci)
181 } else 181 } else
182 printk("%s: i2c register FAILED\n", core->name); 182 printk("%s: i2c register FAILED\n", core->name);
183 183
184 return core->i2c_rc;
185}
186
187void cx88_i2c_init_ir(struct cx88_core *core)
188{
184 /* Instantiate the IR receiver device, if present */ 189 /* Instantiate the IR receiver device, if present */
185 if (0 == core->i2c_rc) { 190 if (0 == core->i2c_rc) {
186 struct i2c_board_info info; 191 struct i2c_board_info info;
@@ -207,7 +212,6 @@ int cx88_i2c_init(struct cx88_core *core, struct pci_dev *pci)
207 } 212 }
208 } 213 }
209 } 214 }
210 return core->i2c_rc;
211} 215}
212 216
213/* ----------------------------------------------------------------------- */ 217/* ----------------------------------------------------------------------- */
diff --git a/drivers/media/video/cx88/cx88-input.c b/drivers/media/video/cx88/cx88-input.c
index e185289e446c..eccc5e49a350 100644
--- a/drivers/media/video/cx88/cx88-input.c
+++ b/drivers/media/video/cx88/cx88-input.c
@@ -30,6 +30,7 @@
30#include <linux/module.h> 30#include <linux/module.h>
31 31
32#include "cx88.h" 32#include "cx88.h"
33#include <media/ir-core.h>
33#include <media/ir-common.h> 34#include <media/ir-common.h>
34 35
35#define MODULE_NAME "cx88xx" 36#define MODULE_NAME "cx88xx"
@@ -39,8 +40,8 @@
39struct cx88_IR { 40struct cx88_IR {
40 struct cx88_core *core; 41 struct cx88_core *core;
41 struct input_dev *input; 42 struct input_dev *input;
42 struct ir_input_state ir;
43 struct ir_dev_props props; 43 struct ir_dev_props props;
44 u64 ir_type;
44 45
45 int users; 46 int users;
46 47
@@ -51,7 +52,6 @@ struct cx88_IR {
51 u32 sampling; 52 u32 sampling;
52 u32 samples[16]; 53 u32 samples[16];
53 int scount; 54 int scount;
54 unsigned long release;
55 55
56 /* poll external decoder */ 56 /* poll external decoder */
57 int polling; 57 int polling;
@@ -125,29 +125,21 @@ static void cx88_ir_handle_key(struct cx88_IR *ir)
125 125
126 data = (data << 4) | ((gpio_key & 0xf0) >> 4); 126 data = (data << 4) | ((gpio_key & 0xf0) >> 4);
127 127
128 ir_input_keydown(ir->input, &ir->ir, data); 128 ir_keydown(ir->input, data, 0);
129 ir_input_nokey(ir->input, &ir->ir);
130 129
131 } else if (ir->mask_keydown) { 130 } else if (ir->mask_keydown) {
132 /* bit set on keydown */ 131 /* bit set on keydown */
133 if (gpio & ir->mask_keydown) { 132 if (gpio & ir->mask_keydown)
134 ir_input_keydown(ir->input, &ir->ir, data); 133 ir_keydown(ir->input, data, 0);
135 } else {
136 ir_input_nokey(ir->input, &ir->ir);
137 }
138 134
139 } else if (ir->mask_keyup) { 135 } else if (ir->mask_keyup) {
140 /* bit cleared on keydown */ 136 /* bit cleared on keydown */
141 if (0 == (gpio & ir->mask_keyup)) { 137 if (0 == (gpio & ir->mask_keyup))
142 ir_input_keydown(ir->input, &ir->ir, data); 138 ir_keydown(ir->input, data, 0);
143 } else {
144 ir_input_nokey(ir->input, &ir->ir);
145 }
146 139
147 } else { 140 } else {
148 /* can't distinguish keydown/up :-/ */ 141 /* can't distinguish keydown/up :-/ */
149 ir_input_keydown(ir->input, &ir->ir, data); 142 ir_keydown(ir->input, data, 0);
150 ir_input_nokey(ir->input, &ir->ir);
151 } 143 }
152} 144}
153 145
@@ -439,9 +431,7 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
439 snprintf(ir->name, sizeof(ir->name), "cx88 IR (%s)", core->board.name); 431 snprintf(ir->name, sizeof(ir->name), "cx88 IR (%s)", core->board.name);
440 snprintf(ir->phys, sizeof(ir->phys), "pci-%s/ir0", pci_name(pci)); 432 snprintf(ir->phys, sizeof(ir->phys), "pci-%s/ir0", pci_name(pci));
441 433
442 err = ir_input_init(input_dev, &ir->ir, ir_type); 434 ir->ir_type = ir_type;
443 if (err < 0)
444 goto err_out_free;
445 435
446 input_dev->name = ir->name; 436 input_dev->name = ir->name;
447 input_dev->phys = ir->phys; 437 input_dev->phys = ir->phys;
@@ -516,8 +506,6 @@ void cx88_ir_irq(struct cx88_core *core)
516 } 506 }
517 if (!ir->scount) { 507 if (!ir->scount) {
518 /* nothing to sample */ 508 /* nothing to sample */
519 if (ir->ir.keypressed && time_after(jiffies, ir->release))
520 ir_input_nokey(ir->input, &ir->ir);
521 return; 509 return;
522 } 510 }
523 511
@@ -553,7 +541,7 @@ void cx88_ir_irq(struct cx88_core *core)
553 541
554 if (ircode == 0) { /* key still pressed */ 542 if (ircode == 0) { /* key still pressed */
555 ir_dprintk("pulse distance decoded repeat code\n"); 543 ir_dprintk("pulse distance decoded repeat code\n");
556 ir->release = jiffies + msecs_to_jiffies(120); 544 ir_repeat(ir->input);
557 break; 545 break;
558 } 546 }
559 547
@@ -567,10 +555,8 @@ void cx88_ir_irq(struct cx88_core *core)
567 break; 555 break;
568 } 556 }
569 557
570 ir_dprintk("Key Code: %x\n", (ircode >> 16) & 0x7f); 558 ir_dprintk("Key Code: %x\n", (ircode >> 16) & 0xff);
571 559 ir_keydown(ir->input, (ircode >> 16) & 0xff, 0);
572 ir_input_keydown(ir->input, &ir->ir, (ircode >> 16) & 0x7f);
573 ir->release = jiffies + msecs_to_jiffies(120);
574 break; 560 break;
575 case CX88_BOARD_HAUPPAUGE: 561 case CX88_BOARD_HAUPPAUGE:
576 case CX88_BOARD_HAUPPAUGE_DVB_T1: 562 case CX88_BOARD_HAUPPAUGE_DVB_T1:
@@ -606,16 +592,16 @@ void cx88_ir_irq(struct cx88_core *core)
606 if ( dev != 0x1e && dev != 0x1f ) 592 if ( dev != 0x1e && dev != 0x1f )
607 /* not a hauppauge remote */ 593 /* not a hauppauge remote */
608 break; 594 break;
609 ir_input_keydown(ir->input, &ir->ir, code); 595 ir_keydown(ir->input, code, toggle);
610 ir->release = jiffies + msecs_to_jiffies(120);
611 break; 596 break;
612 case CX88_BOARD_PINNACLE_PCTV_HD_800i: 597 case CX88_BOARD_PINNACLE_PCTV_HD_800i:
613 ircode = ir_decode_biphase(ir->samples, ir->scount, 5, 7); 598 ircode = ir_decode_biphase(ir->samples, ir->scount, 5, 7);
614 ir_dprintk("biphase decoded: %x\n", ircode); 599 ir_dprintk("biphase decoded: %x\n", ircode);
615 if ((ircode & 0xfffff000) != 0x3000) 600 if ((ircode & 0xfffff000) != 0x3000)
616 break; 601 break;
617 ir_input_keydown(ir->input, &ir->ir, ircode & 0x3f); 602 /* Note: bit 0x800 being the toggle is assumed, not checked
618 ir->release = jiffies + msecs_to_jiffies(120); 603 with real hardware */
604 ir_keydown(ir->input, ircode & 0x3f, ircode & 0x0800 ? 1 : 0);
619 break; 605 break;
620 } 606 }
621 607
diff --git a/drivers/media/video/cx88/cx88.h b/drivers/media/video/cx88/cx88.h
index bdb03d336536..33d161a11725 100644
--- a/drivers/media/video/cx88/cx88.h
+++ b/drivers/media/video/cx88/cx88.h
@@ -636,6 +636,7 @@ extern struct videobuf_queue_ops cx8800_vbi_qops;
636/* cx88-i2c.c */ 636/* cx88-i2c.c */
637 637
638extern int cx88_i2c_init(struct cx88_core *core, struct pci_dev *pci); 638extern int cx88_i2c_init(struct cx88_core *core, struct pci_dev *pci);
639extern void cx88_i2c_init_ir(struct cx88_core *core);
639 640
640 641
641/* ----------------------------------------------------------- */ 642/* ----------------------------------------------------------- */
diff --git a/drivers/media/video/dabusb.c b/drivers/media/video/dabusb.c
index 0f505086774c..5b176bd7afdb 100644
--- a/drivers/media/video/dabusb.c
+++ b/drivers/media/video/dabusb.c
@@ -706,16 +706,11 @@ static long dabusb_ioctl (struct file *file, unsigned int cmd, unsigned long arg
706 switch (cmd) { 706 switch (cmd) {
707 707
708 case IOCTL_DAB_BULK: 708 case IOCTL_DAB_BULK:
709 pbulk = kmalloc(sizeof (bulk_transfer_t), GFP_KERNEL); 709 pbulk = memdup_user((void __user *)arg,
710 sizeof(bulk_transfer_t));
710 711
711 if (!pbulk) { 712 if (IS_ERR(pbulk)) {
712 ret = -ENOMEM; 713 ret = PTR_ERR(pbulk);
713 break;
714 }
715
716 if (copy_from_user (pbulk, (void __user *) arg, sizeof (bulk_transfer_t))) {
717 ret = -EFAULT;
718 kfree (pbulk);
719 break; 714 break;
720 } 715 }
721 716
diff --git a/drivers/media/video/davinci/Kconfig b/drivers/media/video/davinci/Kconfig
new file mode 100644
index 000000000000..6b1954035649
--- /dev/null
+++ b/drivers/media/video/davinci/Kconfig
@@ -0,0 +1,93 @@
1config DISPLAY_DAVINCI_DM646X_EVM
2 tristate "DM646x EVM Video Display"
3 depends on VIDEO_DEV && MACH_DAVINCI_DM6467_EVM
4 select VIDEOBUF_DMA_CONTIG
5 select VIDEO_DAVINCI_VPIF
6 select VIDEO_ADV7343
7 select VIDEO_THS7303
8 help
9 Support for DM6467 based display device.
10
11 To compile this driver as a module, choose M here: the
12 module will be called vpif_display.
13
14config CAPTURE_DAVINCI_DM646X_EVM
15 tristate "DM646x EVM Video Capture"
16 depends on VIDEO_DEV && MACH_DAVINCI_DM6467_EVM
17 select VIDEOBUF_DMA_CONTIG
18 select VIDEO_DAVINCI_VPIF
19 help
20 Support for DM6467 based capture device.
21
22 To compile this driver as a module, choose M here: the
23 module will be called vpif_capture.
24
25config VIDEO_DAVINCI_VPIF
26 tristate "DaVinci VPIF Driver"
27 depends on DISPLAY_DAVINCI_DM646X_EVM
28 help
29 Support for DaVinci VPIF Driver.
30
31 To compile this driver as a module, choose M here: the
32 module will be called vpif.
33
34config VIDEO_VPSS_SYSTEM
35 tristate "VPSS System module driver"
36 depends on ARCH_DAVINCI
37 help
38 Support for vpss system module for video driver
39
40config VIDEO_VPFE_CAPTURE
41 tristate "VPFE Video Capture Driver"
42 depends on VIDEO_V4L2 && (ARCH_DAVINCI || ARCH_OMAP3)
43 select VIDEOBUF_DMA_CONTIG
44 help
45 Support for DMx/AMx VPFE based frame grabber. This is the
46 common V4L2 module for following DMx/AMx SoCs from Texas
47 Instruments:- DM6446, DM365, DM355 & AM3517/05.
48
49 To compile this driver as a module, choose M here: the
50 module will be called vpfe-capture.
51
52config VIDEO_DM6446_CCDC
53 tristate "DM6446 CCDC HW module"
54 depends on VIDEO_VPFE_CAPTURE
55 select VIDEO_VPSS_SYSTEM
56 default y
57 help
58 Enables DaVinci CCD hw module. DaVinci CCDC hw interfaces
59 with decoder modules such as TVP5146 over BT656 or
60 sensor module such as MT9T001 over a raw interface. This
61 module configures the interface and CCDC/ISIF to do
62 video frame capture from slave decoders.
63
64 To compile this driver as a module, choose M here: the
65 module will be called vpfe.
66
67config VIDEO_DM355_CCDC
68 tristate "DM355 CCDC HW module"
69 depends on ARCH_DAVINCI_DM355 && VIDEO_VPFE_CAPTURE
70 select VIDEO_VPSS_SYSTEM
71 default y
72 help
73 Enables DM355 CCD hw module. DM355 CCDC hw interfaces
74 with decoder modules such as TVP5146 over BT656 or
75 sensor module such as MT9T001 over a raw interface. This
76 module configures the interface and CCDC/ISIF to do
77 video frame capture from a slave decoders
78
79 To compile this driver as a module, choose M here: the
80 module will be called vpfe.
81
82config VIDEO_ISIF
83 tristate "ISIF HW module"
84 depends on ARCH_DAVINCI_DM365 && VIDEO_VPFE_CAPTURE
85 select VIDEO_VPSS_SYSTEM
86 default y
87 help
88 Enables ISIF hw module. This is the hardware module for
89 configuring ISIF in VPFE to capture Raw Bayer RGB data from
90 a image sensor or YUV data from a YUV source.
91
92 To compile this driver as a module, choose M here: the
93 module will be called vpfe.
diff --git a/drivers/media/video/em28xx/em28xx-cards.c b/drivers/media/video/em28xx/em28xx-cards.c
index 3a4fd8514511..ffbe544e30f4 100644
--- a/drivers/media/video/em28xx/em28xx-cards.c
+++ b/drivers/media/video/em28xx/em28xx-cards.c
@@ -158,6 +158,22 @@ static struct em28xx_reg_seq evga_indtube_digital[] = {
158 { -1, -1, -1, -1}, 158 { -1, -1, -1, -1},
159}; 159};
160 160
161/*
162 * KWorld PlusTV 340U and UB435-Q (ATSC) GPIOs map:
163 * EM_GPIO_0 - currently unknown
164 * EM_GPIO_1 - LED disable/enable (1 = off, 0 = on)
165 * EM_GPIO_2 - currently unknown
166 * EM_GPIO_3 - currently unknown
167 * EM_GPIO_4 - TDA18271HD/C1 tuner (1 = active, 0 = in reset)
168 * EM_GPIO_5 - LGDT3304 ATSC/QAM demod (1 = active, 0 = in reset)
169 * EM_GPIO_6 - currently unknown
170 * EM_GPIO_7 - currently unknown
171 */
172static struct em28xx_reg_seq kworld_a340_digital[] = {
173 {EM28XX_R08_GPIO, 0x6d, ~EM_GPIO_4, 10},
174 { -1, -1, -1, -1},
175};
176
161/* Pinnacle Hybrid Pro eb1a:2881 */ 177/* Pinnacle Hybrid Pro eb1a:2881 */
162static struct em28xx_reg_seq pinnacle_hybrid_pro_analog[] = { 178static struct em28xx_reg_seq pinnacle_hybrid_pro_analog[] = {
163 {EM28XX_R08_GPIO, 0xfd, ~EM_GPIO_4, 10}, 179 {EM28XX_R08_GPIO, 0xfd, ~EM_GPIO_4, 10},
@@ -1667,6 +1683,16 @@ struct em28xx_board em28xx_boards[] = {
1667 .tuner_gpio = reddo_dvb_c_usb_box, 1683 .tuner_gpio = reddo_dvb_c_usb_box,
1668 .has_dvb = 1, 1684 .has_dvb = 1,
1669 }, 1685 },
1686 /* 1b80:a340 - Empia EM2870, NXP TDA18271HD and LG DT3304, sold
1687 * initially as the KWorld PlusTV 340U, then as the UB435-Q.
1688 * Early variants have a TDA18271HD/C1, later ones a TDA18271HD/C2 */
1689 [EM2870_BOARD_KWORLD_A340] = {
1690 .name = "KWorld PlusTV 340U or UB435-Q (ATSC)",
1691 .tuner_type = TUNER_ABSENT, /* Digital-only TDA18271HD */
1692 .has_dvb = 1,
1693 .dvb_gpio = kworld_a340_digital,
1694 .tuner_gpio = default_tuner_gpio,
1695 },
1670}; 1696};
1671const unsigned int em28xx_bcount = ARRAY_SIZE(em28xx_boards); 1697const unsigned int em28xx_bcount = ARRAY_SIZE(em28xx_boards);
1672 1698
@@ -1788,6 +1814,8 @@ struct usb_device_id em28xx_id_table[] = {
1788 .driver_info = EM2820_BOARD_IODATA_GVMVP_SZ }, 1814 .driver_info = EM2820_BOARD_IODATA_GVMVP_SZ },
1789 { USB_DEVICE(0xeb1a, 0x50a6), 1815 { USB_DEVICE(0xeb1a, 0x50a6),
1790 .driver_info = EM2860_BOARD_GADMEI_UTV330 }, 1816 .driver_info = EM2860_BOARD_GADMEI_UTV330 },
1817 { USB_DEVICE(0x1b80, 0xa340),
1818 .driver_info = EM2870_BOARD_KWORLD_A340 },
1791 { }, 1819 { },
1792}; 1820};
1793MODULE_DEVICE_TABLE(usb, em28xx_id_table); 1821MODULE_DEVICE_TABLE(usb, em28xx_id_table);
diff --git a/drivers/media/video/em28xx/em28xx-dvb.c b/drivers/media/video/em28xx/em28xx-dvb.c
index cf1d8c3655fc..3ac8d3025fea 100644
--- a/drivers/media/video/em28xx/em28xx-dvb.c
+++ b/drivers/media/video/em28xx/em28xx-dvb.c
@@ -30,11 +30,13 @@
30#include "tuner-simple.h" 30#include "tuner-simple.h"
31 31
32#include "lgdt330x.h" 32#include "lgdt330x.h"
33#include "lgdt3305.h"
33#include "zl10353.h" 34#include "zl10353.h"
34#include "s5h1409.h" 35#include "s5h1409.h"
35#include "mt352.h" 36#include "mt352.h"
36#include "mt352_priv.h" /* FIXME */ 37#include "mt352_priv.h" /* FIXME */
37#include "tda1002x.h" 38#include "tda1002x.h"
39#include "tda18271.h"
38 40
39MODULE_DESCRIPTION("driver for em28xx based DVB cards"); 41MODULE_DESCRIPTION("driver for em28xx based DVB cards");
40MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>"); 42MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>");
@@ -231,6 +233,18 @@ static struct lgdt330x_config em2880_lgdt3303_dev = {
231 .demod_chip = LGDT3303, 233 .demod_chip = LGDT3303,
232}; 234};
233 235
236static struct lgdt3305_config em2870_lgdt3304_dev = {
237 .i2c_addr = 0x0e,
238 .demod_chip = LGDT3304,
239 .spectral_inversion = 1,
240 .deny_i2c_rptr = 1,
241 .mpeg_mode = LGDT3305_MPEG_PARALLEL,
242 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
243 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
244 .vsb_if_khz = 3250,
245 .qam_if_khz = 4000,
246};
247
234static struct zl10353_config em28xx_zl10353_with_xc3028 = { 248static struct zl10353_config em28xx_zl10353_with_xc3028 = {
235 .demod_address = (0x1e >> 1), 249 .demod_address = (0x1e >> 1),
236 .no_tuner = 1, 250 .no_tuner = 1,
@@ -247,6 +261,17 @@ static struct s5h1409_config em28xx_s5h1409_with_xc3028 = {
247 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK 261 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
248}; 262};
249 263
264static struct tda18271_std_map kworld_a340_std_map = {
265 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 0,
266 .if_lvl = 1, .rfagc_top = 0x37, },
267 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 1,
268 .if_lvl = 1, .rfagc_top = 0x37, },
269};
270
271static struct tda18271_config kworld_a340_config = {
272 .std_map = &kworld_a340_std_map,
273};
274
250static struct zl10353_config em28xx_zl10353_xc3028_no_i2c_gate = { 275static struct zl10353_config em28xx_zl10353_xc3028_no_i2c_gate = {
251 .demod_address = (0x1e >> 1), 276 .demod_address = (0x1e >> 1),
252 .no_tuner = 1, 277 .no_tuner = 1,
@@ -572,6 +597,14 @@ static int dvb_init(struct em28xx *dev)
572 } 597 }
573 } 598 }
574 break; 599 break;
600 case EM2870_BOARD_KWORLD_A340:
601 dvb->frontend = dvb_attach(lgdt3305_attach,
602 &em2870_lgdt3304_dev,
603 &dev->i2c_adap);
604 if (dvb->frontend != NULL)
605 dvb_attach(tda18271_attach, dvb->frontend, 0x60,
606 &dev->i2c_adap, &kworld_a340_config);
607 break;
575 default: 608 default:
576 em28xx_errdev("/2: The frontend of your DVB/ATSC card" 609 em28xx_errdev("/2: The frontend of your DVB/ATSC card"
577 " isn't supported yet\n"); 610 " isn't supported yet\n");
diff --git a/drivers/media/video/em28xx/em28xx-input.c b/drivers/media/video/em28xx/em28xx-input.c
index 5c3fd9411b1f..6759cd5570dd 100644
--- a/drivers/media/video/em28xx/em28xx-input.c
+++ b/drivers/media/video/em28xx/em28xx-input.c
@@ -65,17 +65,14 @@ struct em28xx_ir_poll_result {
65struct em28xx_IR { 65struct em28xx_IR {
66 struct em28xx *dev; 66 struct em28xx *dev;
67 struct input_dev *input; 67 struct input_dev *input;
68 struct ir_input_state ir;
69 char name[32]; 68 char name[32];
70 char phys[32]; 69 char phys[32];
71 70
72 /* poll external decoder */ 71 /* poll external decoder */
73 int polling; 72 int polling;
74 struct delayed_work work; 73 struct delayed_work work;
75 unsigned int last_toggle:1;
76 unsigned int full_code:1; 74 unsigned int full_code:1;
77 unsigned int last_readcount; 75 unsigned int last_readcount;
78 unsigned int repeat_interval;
79 76
80 int (*get_key)(struct em28xx_IR *, struct em28xx_ir_poll_result *); 77 int (*get_key)(struct em28xx_IR *, struct em28xx_ir_poll_result *);
81 78
@@ -291,67 +288,39 @@ static int em2874_polling_getkey(struct em28xx_IR *ir,
291static void em28xx_ir_handle_key(struct em28xx_IR *ir) 288static void em28xx_ir_handle_key(struct em28xx_IR *ir)
292{ 289{
293 int result; 290 int result;
294 int do_sendkey = 0;
295 struct em28xx_ir_poll_result poll_result; 291 struct em28xx_ir_poll_result poll_result;
296 292
297 /* read the registers containing the IR status */ 293 /* read the registers containing the IR status */
298 result = ir->get_key(ir, &poll_result); 294 result = ir->get_key(ir, &poll_result);
299 if (result < 0) { 295 if (unlikely(result < 0)) {
300 dprintk("ir->get_key() failed %d\n", result); 296 dprintk("ir->get_key() failed %d\n", result);
301 return; 297 return;
302 } 298 }
303 299
304 dprintk("ir->get_key result tb=%02x rc=%02x lr=%02x data=%02x%02x\n", 300 if (unlikely(poll_result.read_count != ir->last_readcount)) {
305 poll_result.toggle_bit, poll_result.read_count, 301 dprintk("%s: toggle: %d, count: %d, key 0x%02x%02x\n", __func__,
306 ir->last_readcount, poll_result.rc_address, 302 poll_result.toggle_bit, poll_result.read_count,
307 poll_result.rc_data[0]); 303 poll_result.rc_address, poll_result.rc_data[0]);
308
309 if (ir->dev->chip_id == CHIP_ID_EM2874) {
310 /* The em2874 clears the readcount field every time the
311 register is read. The em2860/2880 datasheet says that it
312 is supposed to clear the readcount, but it doesn't. So with
313 the em2874, we are looking for a non-zero read count as
314 opposed to a readcount that is incrementing */
315 ir->last_readcount = 0;
316 }
317
318 if (poll_result.read_count == 0) {
319 /* The button has not been pressed since the last read */
320 } else if (ir->last_toggle != poll_result.toggle_bit) {
321 /* A button has been pressed */
322 dprintk("button has been pressed\n");
323 ir->last_toggle = poll_result.toggle_bit;
324 ir->repeat_interval = 0;
325 do_sendkey = 1;
326 } else if (poll_result.toggle_bit == ir->last_toggle &&
327 poll_result.read_count > 0 &&
328 poll_result.read_count != ir->last_readcount) {
329 /* The button is still being held down */
330 dprintk("button being held down\n");
331
332 /* Debouncer for first keypress */
333 if (ir->repeat_interval++ > 9) {
334 /* Start repeating after 1 second */
335 do_sendkey = 1;
336 }
337 }
338
339 if (do_sendkey) {
340 dprintk("sending keypress\n");
341
342 if (ir->full_code) 304 if (ir->full_code)
343 ir_input_keydown(ir->input, &ir->ir, 305 ir_keydown(ir->input,
344 poll_result.rc_address << 8 | 306 poll_result.rc_address << 8 |
345 poll_result.rc_data[0]); 307 poll_result.rc_data[0],
308 poll_result.toggle_bit);
346 else 309 else
347 ir_input_keydown(ir->input, &ir->ir, 310 ir_keydown(ir->input,
348 poll_result.rc_data[0]); 311 poll_result.rc_data[0],
349 312 poll_result.toggle_bit);
350 ir_input_nokey(ir->input, &ir->ir); 313
314 if (ir->dev->chip_id == CHIP_ID_EM2874)
315 /* The em2874 clears the readcount field every time the
316 register is read. The em2860/2880 datasheet says that it
317 is supposed to clear the readcount, but it doesn't. So with
318 the em2874, we are looking for a non-zero read count as
319 opposed to a readcount that is incrementing */
320 ir->last_readcount = 0;
321 else
322 ir->last_readcount = poll_result.read_count;
351 } 323 }
352
353 ir->last_readcount = poll_result.read_count;
354 return;
355} 324}
356 325
357static void em28xx_ir_work(struct work_struct *work) 326static void em28xx_ir_work(struct work_struct *work)
@@ -466,11 +435,6 @@ int em28xx_ir_init(struct em28xx *dev)
466 usb_make_path(dev->udev, ir->phys, sizeof(ir->phys)); 435 usb_make_path(dev->udev, ir->phys, sizeof(ir->phys));
467 strlcat(ir->phys, "/input0", sizeof(ir->phys)); 436 strlcat(ir->phys, "/input0", sizeof(ir->phys));
468 437
469 /* Set IR protocol */
470 err = ir_input_init(input_dev, &ir->ir, IR_TYPE_OTHER);
471 if (err < 0)
472 goto err_out_free;
473
474 input_dev->name = ir->name; 438 input_dev->name = ir->name;
475 input_dev->phys = ir->phys; 439 input_dev->phys = ir->phys;
476 input_dev->id.bustype = BUS_USB; 440 input_dev->id.bustype = BUS_USB;
diff --git a/drivers/media/video/em28xx/em28xx-video.c b/drivers/media/video/em28xx/em28xx-video.c
index 20090e34173a..7b9ec6e493e4 100644
--- a/drivers/media/video/em28xx/em28xx-video.c
+++ b/drivers/media/video/em28xx/em28xx-video.c
@@ -654,12 +654,12 @@ static inline int em28xx_isoc_copy_vbi(struct em28xx *dev, struct urb *urb)
654 } 654 }
655 655
656 if (buf != NULL && dev->capture_type == 2) { 656 if (buf != NULL && dev->capture_type == 2) {
657 if (len > 4 && p[0] == 0x88 && p[1] == 0x88 && 657 if (len >= 4 && p[0] == 0x88 && p[1] == 0x88 &&
658 p[2] == 0x88 && p[3] == 0x88) { 658 p[2] == 0x88 && p[3] == 0x88) {
659 p += 4; 659 p += 4;
660 len -= 4; 660 len -= 4;
661 } 661 }
662 if (len > 4 && p[0] == 0x22 && p[1] == 0x5a) { 662 if (len >= 4 && p[0] == 0x22 && p[1] == 0x5a) {
663 em28xx_isocdbg("Video frame %d, len=%i, %s\n", 663 em28xx_isocdbg("Video frame %d, len=%i, %s\n",
664 p[2], len, (p[2] & 1) ? 664 p[2], len, (p[2] & 1) ?
665 "odd" : "even"); 665 "odd" : "even");
diff --git a/drivers/media/video/em28xx/em28xx.h b/drivers/media/video/em28xx/em28xx.h
index b252d1b1b2a7..1c61a6b65d28 100644
--- a/drivers/media/video/em28xx/em28xx.h
+++ b/drivers/media/video/em28xx/em28xx.h
@@ -32,6 +32,7 @@
32#include <linux/i2c.h> 32#include <linux/i2c.h>
33#include <linux/mutex.h> 33#include <linux/mutex.h>
34#include <media/ir-kbd-i2c.h> 34#include <media/ir-kbd-i2c.h>
35#include <media/ir-core.h>
35#if defined(CONFIG_VIDEO_EM28XX_DVB) || defined(CONFIG_VIDEO_EM28XX_DVB_MODULE) 36#if defined(CONFIG_VIDEO_EM28XX_DVB) || defined(CONFIG_VIDEO_EM28XX_DVB_MODULE)
36#include <media/videobuf-dvb.h> 37#include <media/videobuf-dvb.h>
37#endif 38#endif
@@ -113,6 +114,7 @@
113#define EM2870_BOARD_REDDO_DVB_C_USB_BOX 73 114#define EM2870_BOARD_REDDO_DVB_C_USB_BOX 73
114#define EM2800_BOARD_VC211A 74 115#define EM2800_BOARD_VC211A 74
115#define EM2882_BOARD_DIKOM_DK300 75 116#define EM2882_BOARD_DIKOM_DK300 75
117#define EM2870_BOARD_KWORLD_A340 76
116 118
117/* Limits minimum and default number of buffers */ 119/* Limits minimum and default number of buffers */
118#define EM28XX_MIN_BUF 4 120#define EM28XX_MIN_BUF 4
diff --git a/drivers/media/video/fsl-viu.c b/drivers/media/video/fsl-viu.c
new file mode 100644
index 000000000000..8f1c94f7e00c
--- /dev/null
+++ b/drivers/media/video/fsl-viu.c
@@ -0,0 +1,1632 @@
1/*
2 * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * Freescale VIU video driver
5 *
6 * Authors: Hongjun Chen <hong-jun.chen@freescale.com>
7 * Porting to 2.6.35 by DENX Software Engineering,
8 * Anatolij Gustschin <agust@denx.de>
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 */
16
17#include <linux/module.h>
18#include <linux/clk.h>
19#include <linux/kernel.h>
20#include <linux/i2c.h>
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/io.h>
24#include <linux/of_platform.h>
25#include <linux/version.h>
26#include <media/v4l2-common.h>
27#include <media/v4l2-device.h>
28#include <media/v4l2-ioctl.h>
29#include <media/videobuf-dma-contig.h>
30
31#define DRV_NAME "fsl_viu"
32#define VIU_MAJOR_VERSION 0
33#define VIU_MINOR_VERSION 5
34#define VIU_RELEASE 0
35#define VIU_VERSION KERNEL_VERSION(VIU_MAJOR_VERSION, \
36 VIU_MINOR_VERSION, \
37 VIU_RELEASE)
38
39#define BUFFER_TIMEOUT msecs_to_jiffies(500) /* 0.5 seconds */
40
41#define VIU_VID_MEM_LIMIT 4 /* Video memory limit, in Mb */
42
43/* I2C address of video decoder chip is 0x4A */
44#define VIU_VIDEO_DECODER_ADDR 0x25
45
46/* supported controls */
47static struct v4l2_queryctrl viu_qctrl[] = {
48 {
49 .id = V4L2_CID_BRIGHTNESS,
50 .type = V4L2_CTRL_TYPE_INTEGER,
51 .name = "Brightness",
52 .minimum = 0,
53 .maximum = 255,
54 .step = 1,
55 .default_value = 127,
56 .flags = 0,
57 }, {
58 .id = V4L2_CID_CONTRAST,
59 .type = V4L2_CTRL_TYPE_INTEGER,
60 .name = "Contrast",
61 .minimum = 0,
62 .maximum = 255,
63 .step = 0x1,
64 .default_value = 0x10,
65 .flags = 0,
66 }, {
67 .id = V4L2_CID_SATURATION,
68 .type = V4L2_CTRL_TYPE_INTEGER,
69 .name = "Saturation",
70 .minimum = 0,
71 .maximum = 255,
72 .step = 0x1,
73 .default_value = 127,
74 .flags = 0,
75 }, {
76 .id = V4L2_CID_HUE,
77 .type = V4L2_CTRL_TYPE_INTEGER,
78 .name = "Hue",
79 .minimum = -128,
80 .maximum = 127,
81 .step = 0x1,
82 .default_value = 0,
83 .flags = 0,
84 }
85};
86
87static int qctl_regs[ARRAY_SIZE(viu_qctrl)];
88
89static int info_level;
90
91#define dprintk(level, fmt, arg...) \
92 do { \
93 if (level <= info_level) \
94 printk(KERN_DEBUG "viu: " fmt , ## arg); \
95 } while (0)
96
97/*
98 * Basic structures
99 */
100struct viu_fmt {
101 char name[32];
102 u32 fourcc; /* v4l2 format id */
103 u32 pixelformat;
104 int depth;
105};
106
107static struct viu_fmt formats[] = {
108 {
109 .name = "RGB-16 (5/B-6/G-5/R)",
110 .fourcc = V4L2_PIX_FMT_RGB565,
111 .pixelformat = V4L2_PIX_FMT_RGB565,
112 .depth = 16,
113 }, {
114 .name = "RGB-32 (A-R-G-B)",
115 .fourcc = V4L2_PIX_FMT_RGB32,
116 .pixelformat = V4L2_PIX_FMT_RGB32,
117 .depth = 32,
118 }
119};
120
121struct viu_dev;
122struct viu_buf;
123
124/* buffer for one video frame */
125struct viu_buf {
126 /* common v4l buffer stuff -- must be first */
127 struct videobuf_buffer vb;
128 struct viu_fmt *fmt;
129};
130
131struct viu_dmaqueue {
132 struct viu_dev *dev;
133 struct list_head active;
134 struct list_head queued;
135 struct timer_list timeout;
136};
137
138struct viu_status {
139 u32 field_irq;
140 u32 vsync_irq;
141 u32 hsync_irq;
142 u32 vstart_irq;
143 u32 dma_end_irq;
144 u32 error_irq;
145};
146
147struct viu_reg {
148 u32 status_cfg;
149 u32 luminance;
150 u32 chroma_r;
151 u32 chroma_g;
152 u32 chroma_b;
153 u32 field_base_addr;
154 u32 dma_inc;
155 u32 picture_count;
156 u32 req_alarm;
157 u32 alpha;
158} __attribute__ ((packed));
159
160struct viu_dev {
161 struct v4l2_device v4l2_dev;
162 struct mutex lock;
163 spinlock_t slock;
164 int users;
165
166 struct device *dev;
167 /* various device info */
168 struct video_device *vdev;
169 struct viu_dmaqueue vidq;
170 enum v4l2_field capfield;
171 int field;
172 int first;
173 int dma_done;
174
175 /* Hardware register area */
176 struct viu_reg *vr;
177
178 /* Interrupt vector */
179 int irq;
180 struct viu_status irqs;
181
182 /* video overlay */
183 struct v4l2_framebuffer ovbuf;
184 struct viu_fmt *ovfmt;
185 unsigned int ovenable;
186 enum v4l2_field ovfield;
187
188 /* crop */
189 struct v4l2_rect crop_current;
190
191 /* clock pointer */
192 struct clk *clk;
193
194 /* decoder */
195 struct v4l2_subdev *decoder;
196};
197
198struct viu_fh {
199 struct viu_dev *dev;
200
201 /* video capture */
202 struct videobuf_queue vb_vidq;
203 spinlock_t vbq_lock; /* spinlock for the videobuf queue */
204
205 /* video overlay */
206 struct v4l2_window win;
207 struct v4l2_clip clips[1];
208
209 /* video capture */
210 struct viu_fmt *fmt;
211 int width, height, sizeimage;
212 enum v4l2_buf_type type;
213};
214
215static struct viu_reg reg_val;
216
217/*
218 * Macro definitions of VIU registers
219 */
220
221/* STATUS_CONFIG register */
222enum status_config {
223 SOFT_RST = 1 << 0,
224
225 ERR_MASK = 0x0f << 4, /* Error code mask */
226 ERR_NO = 0x00, /* No error */
227 ERR_DMA_V = 0x01 << 4, /* DMA in vertical active */
228 ERR_DMA_VB = 0x02 << 4, /* DMA in vertical blanking */
229 ERR_LINE_TOO_LONG = 0x04 << 4, /* Line too long */
230 ERR_TOO_MANG_LINES = 0x05 << 4, /* Too many lines in field */
231 ERR_LINE_TOO_SHORT = 0x06 << 4, /* Line too short */
232 ERR_NOT_ENOUGH_LINE = 0x07 << 4, /* Not enough lines in field */
233 ERR_FIFO_OVERFLOW = 0x08 << 4, /* FIFO overflow */
234 ERR_FIFO_UNDERFLOW = 0x09 << 4, /* FIFO underflow */
235 ERR_1bit_ECC = 0x0a << 4, /* One bit ECC error */
236 ERR_MORE_ECC = 0x0b << 4, /* Two/more bits ECC error */
237
238 INT_FIELD_EN = 0x01 << 8, /* Enable field interrupt */
239 INT_VSYNC_EN = 0x01 << 9, /* Enable vsync interrupt */
240 INT_HSYNC_EN = 0x01 << 10, /* Enable hsync interrupt */
241 INT_VSTART_EN = 0x01 << 11, /* Enable vstart interrupt */
242 INT_DMA_END_EN = 0x01 << 12, /* Enable DMA end interrupt */
243 INT_ERROR_EN = 0x01 << 13, /* Enable error interrupt */
244 INT_ECC_EN = 0x01 << 14, /* Enable ECC interrupt */
245
246 INT_FIELD_STATUS = 0x01 << 16, /* field interrupt status */
247 INT_VSYNC_STATUS = 0x01 << 17, /* vsync interrupt status */
248 INT_HSYNC_STATUS = 0x01 << 18, /* hsync interrupt status */
249 INT_VSTART_STATUS = 0x01 << 19, /* vstart interrupt status */
250 INT_DMA_END_STATUS = 0x01 << 20, /* DMA end interrupt status */
251 INT_ERROR_STATUS = 0x01 << 21, /* error interrupt status */
252
253 DMA_ACT = 0x01 << 27, /* Enable DMA transfer */
254 FIELD_NO = 0x01 << 28, /* Field number */
255 DITHER_ON = 0x01 << 29, /* Dithering is on */
256 ROUND_ON = 0x01 << 30, /* Round is on */
257 MODE_32BIT = 0x01 << 31, /* Data in RGBa888,
258 * 0 in RGB565
259 */
260};
261
262#define norm_maxw() 720
263#define norm_maxh() 576
264
265#define INT_ALL_STATUS (INT_FIELD_STATUS | INT_VSYNC_STATUS | \
266 INT_HSYNC_STATUS | INT_VSTART_STATUS | \
267 INT_DMA_END_STATUS | INT_ERROR_STATUS)
268
269#define NUM_FORMATS ARRAY_SIZE(formats)
270
271static irqreturn_t viu_intr(int irq, void *dev_id);
272
273struct viu_fmt *format_by_fourcc(int fourcc)
274{
275 int i;
276
277 for (i = 0; i < NUM_FORMATS; i++) {
278 if (formats[i].pixelformat == fourcc)
279 return formats + i;
280 }
281
282 dprintk(0, "unknown pixelformat:'%4.4s'\n", (char *)&fourcc);
283 return NULL;
284}
285
286void viu_start_dma(struct viu_dev *dev)
287{
288 struct viu_reg *vr = dev->vr;
289
290 dev->field = 0;
291
292 /* Enable DMA operation */
293 out_be32(&vr->status_cfg, SOFT_RST);
294 out_be32(&vr->status_cfg, INT_FIELD_EN);
295}
296
297void viu_stop_dma(struct viu_dev *dev)
298{
299 struct viu_reg *vr = dev->vr;
300 int cnt = 100;
301 u32 status_cfg;
302
303 out_be32(&vr->status_cfg, 0);
304
305 /* Clear pending interrupts */
306 status_cfg = in_be32(&vr->status_cfg);
307 if (status_cfg & 0x3f0000)
308 out_be32(&vr->status_cfg, status_cfg & 0x3f0000);
309
310 if (status_cfg & DMA_ACT) {
311 do {
312 status_cfg = in_be32(&vr->status_cfg);
313 if (status_cfg & INT_DMA_END_STATUS)
314 break;
315 } while (cnt--);
316
317 if (cnt < 0) {
318 /* timed out, issue soft reset */
319 out_be32(&vr->status_cfg, SOFT_RST);
320 out_be32(&vr->status_cfg, 0);
321 } else {
322 /* clear DMA_END and other pending irqs */
323 out_be32(&vr->status_cfg, status_cfg & 0x3f0000);
324 }
325 }
326
327 dev->field = 0;
328}
329
330static int restart_video_queue(struct viu_dmaqueue *vidq)
331{
332 struct viu_buf *buf, *prev;
333
334 dprintk(1, "%s vidq=0x%08lx\n", __func__, (unsigned long)vidq);
335 if (!list_empty(&vidq->active)) {
336 buf = list_entry(vidq->active.next, struct viu_buf, vb.queue);
337 dprintk(2, "restart_queue [%p/%d]: restart dma\n",
338 buf, buf->vb.i);
339
340 viu_stop_dma(vidq->dev);
341
342 /* cancel all outstanding capture requests */
343 list_for_each_entry_safe(buf, prev, &vidq->active, vb.queue) {
344 list_del(&buf->vb.queue);
345 buf->vb.state = VIDEOBUF_ERROR;
346 wake_up(&buf->vb.done);
347 }
348 mod_timer(&vidq->timeout, jiffies+BUFFER_TIMEOUT);
349 return 0;
350 }
351
352 prev = NULL;
353 for (;;) {
354 if (list_empty(&vidq->queued))
355 return 0;
356 buf = list_entry(vidq->queued.next, struct viu_buf, vb.queue);
357 if (prev == NULL) {
358 list_del(&buf->vb.queue);
359 list_add_tail(&buf->vb.queue, &vidq->active);
360
361 dprintk(1, "Restarting video dma\n");
362 viu_stop_dma(vidq->dev);
363 viu_start_dma(vidq->dev);
364
365 buf->vb.state = VIDEOBUF_ACTIVE;
366 mod_timer(&vidq->timeout, jiffies+BUFFER_TIMEOUT);
367 dprintk(2, "[%p/%d] restart_queue - first active\n",
368 buf, buf->vb.i);
369
370 } else if (prev->vb.width == buf->vb.width &&
371 prev->vb.height == buf->vb.height &&
372 prev->fmt == buf->fmt) {
373 list_del(&buf->vb.queue);
374 list_add_tail(&buf->vb.queue, &vidq->active);
375 buf->vb.state = VIDEOBUF_ACTIVE;
376 dprintk(2, "[%p/%d] restart_queue - move to active\n",
377 buf, buf->vb.i);
378 } else {
379 return 0;
380 }
381 prev = buf;
382 }
383}
384
385static void viu_vid_timeout(unsigned long data)
386{
387 struct viu_dev *dev = (struct viu_dev *)data;
388 struct viu_buf *buf;
389 struct viu_dmaqueue *vidq = &dev->vidq;
390
391 while (!list_empty(&vidq->active)) {
392 buf = list_entry(vidq->active.next, struct viu_buf, vb.queue);
393 list_del(&buf->vb.queue);
394 buf->vb.state = VIDEOBUF_ERROR;
395 wake_up(&buf->vb.done);
396 dprintk(1, "viu/0: [%p/%d] timeout\n", buf, buf->vb.i);
397 }
398
399 restart_video_queue(vidq);
400}
401
402/*
403 * Videobuf operations
404 */
405static int buffer_setup(struct videobuf_queue *vq, unsigned int *count,
406 unsigned int *size)
407{
408 struct viu_fh *fh = vq->priv_data;
409
410 *size = fh->width * fh->height * fh->fmt->depth >> 3;
411 if (*count == 0)
412 *count = 32;
413
414 while (*size * *count > VIU_VID_MEM_LIMIT * 1024 * 1024)
415 (*count)--;
416
417 dprintk(1, "%s, count=%d, size=%d\n", __func__, *count, *size);
418 return 0;
419}
420
421static void free_buffer(struct videobuf_queue *vq, struct viu_buf *buf)
422{
423 struct videobuf_buffer *vb = &buf->vb;
424 void *vaddr = NULL;
425
426 BUG_ON(in_interrupt());
427
428 videobuf_waiton(&buf->vb, 0, 0);
429
430 if (vq->int_ops && vq->int_ops->vaddr)
431 vaddr = vq->int_ops->vaddr(vb);
432
433 if (vaddr)
434 videobuf_dma_contig_free(vq, &buf->vb);
435
436 buf->vb.state = VIDEOBUF_NEEDS_INIT;
437}
438
439inline int buffer_activate(struct viu_dev *dev, struct viu_buf *buf)
440{
441 struct viu_reg *vr = dev->vr;
442 int bpp;
443
444 /* setup the DMA base address */
445 reg_val.field_base_addr = videobuf_to_dma_contig(&buf->vb);
446
447 dprintk(1, "buffer_activate [%p/%d]: dma addr 0x%lx\n",
448 buf, buf->vb.i, (unsigned long)reg_val.field_base_addr);
449
450 /* interlace is on by default, set horizontal DMA increment */
451 reg_val.status_cfg = 0;
452 bpp = buf->fmt->depth >> 3;
453 switch (bpp) {
454 case 2:
455 reg_val.status_cfg &= ~MODE_32BIT;
456 reg_val.dma_inc = buf->vb.width * 2;
457 break;
458 case 4:
459 reg_val.status_cfg |= MODE_32BIT;
460 reg_val.dma_inc = buf->vb.width * 4;
461 break;
462 default:
463 dprintk(0, "doesn't support color depth(%d)\n",
464 bpp * 8);
465 return -EINVAL;
466 }
467
468 /* setup picture_count register */
469 reg_val.picture_count = (buf->vb.height / 2) << 16 |
470 buf->vb.width;
471
472 reg_val.status_cfg |= DMA_ACT | INT_DMA_END_EN | INT_FIELD_EN;
473
474 buf->vb.state = VIDEOBUF_ACTIVE;
475 dev->capfield = buf->vb.field;
476
477 /* reset dma increment if needed */
478 if (!V4L2_FIELD_HAS_BOTH(buf->vb.field))
479 reg_val.dma_inc = 0;
480
481 out_be32(&vr->dma_inc, reg_val.dma_inc);
482 out_be32(&vr->picture_count, reg_val.picture_count);
483 out_be32(&vr->field_base_addr, reg_val.field_base_addr);
484 mod_timer(&dev->vidq.timeout, jiffies + BUFFER_TIMEOUT);
485 return 0;
486}
487
488static int buffer_prepare(struct videobuf_queue *vq,
489 struct videobuf_buffer *vb,
490 enum v4l2_field field)
491{
492 struct viu_fh *fh = vq->priv_data;
493 struct viu_buf *buf = container_of(vb, struct viu_buf, vb);
494 int rc;
495
496 BUG_ON(fh->fmt == NULL);
497
498 if (fh->width < 48 || fh->width > norm_maxw() ||
499 fh->height < 32 || fh->height > norm_maxh())
500 return -EINVAL;
501 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
502 if (buf->vb.baddr != 0 && buf->vb.bsize < buf->vb.size)
503 return -EINVAL;
504
505 if (buf->fmt != fh->fmt ||
506 buf->vb.width != fh->width ||
507 buf->vb.height != fh->height ||
508 buf->vb.field != field) {
509 buf->fmt = fh->fmt;
510 buf->vb.width = fh->width;
511 buf->vb.height = fh->height;
512 buf->vb.field = field;
513 }
514
515 if (buf->vb.state == VIDEOBUF_NEEDS_INIT) {
516 rc = videobuf_iolock(vq, &buf->vb, NULL);
517 if (rc != 0)
518 goto fail;
519
520 buf->vb.width = fh->width;
521 buf->vb.height = fh->height;
522 buf->vb.field = field;
523 buf->fmt = fh->fmt;
524 }
525
526 buf->vb.state = VIDEOBUF_PREPARED;
527 return 0;
528
529fail:
530 free_buffer(vq, buf);
531 return rc;
532}
533
534static void buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
535{
536 struct viu_buf *buf = container_of(vb, struct viu_buf, vb);
537 struct viu_fh *fh = vq->priv_data;
538 struct viu_dev *dev = fh->dev;
539 struct viu_dmaqueue *vidq = &dev->vidq;
540 struct viu_buf *prev;
541
542 if (!list_empty(&vidq->queued)) {
543 dprintk(1, "adding vb queue=0x%08lx\n",
544 (unsigned long)&buf->vb.queue);
545 dprintk(1, "vidq pointer 0x%p, queued 0x%p\n",
546 vidq, &vidq->queued);
547 dprintk(1, "dev %p, queued: self %p, next %p, head %p\n",
548 dev, &vidq->queued, vidq->queued.next,
549 vidq->queued.prev);
550 list_add_tail(&buf->vb.queue, &vidq->queued);
551 buf->vb.state = VIDEOBUF_QUEUED;
552 dprintk(2, "[%p/%d] buffer_queue - append to queued\n",
553 buf, buf->vb.i);
554 } else if (list_empty(&vidq->active)) {
555 dprintk(1, "adding vb active=0x%08lx\n",
556 (unsigned long)&buf->vb.queue);
557 list_add_tail(&buf->vb.queue, &vidq->active);
558 buf->vb.state = VIDEOBUF_ACTIVE;
559 mod_timer(&vidq->timeout, jiffies+BUFFER_TIMEOUT);
560 dprintk(2, "[%p/%d] buffer_queue - first active\n",
561 buf, buf->vb.i);
562
563 buffer_activate(dev, buf);
564 } else {
565 dprintk(1, "adding vb queue2=0x%08lx\n",
566 (unsigned long)&buf->vb.queue);
567 prev = list_entry(vidq->active.prev, struct viu_buf, vb.queue);
568 if (prev->vb.width == buf->vb.width &&
569 prev->vb.height == buf->vb.height &&
570 prev->fmt == buf->fmt) {
571 list_add_tail(&buf->vb.queue, &vidq->active);
572 buf->vb.state = VIDEOBUF_ACTIVE;
573 dprintk(2, "[%p/%d] buffer_queue - append to active\n",
574 buf, buf->vb.i);
575 } else {
576 list_add_tail(&buf->vb.queue, &vidq->queued);
577 buf->vb.state = VIDEOBUF_QUEUED;
578 dprintk(2, "[%p/%d] buffer_queue - first queued\n",
579 buf, buf->vb.i);
580 }
581 }
582}
583
584static void buffer_release(struct videobuf_queue *vq,
585 struct videobuf_buffer *vb)
586{
587 struct viu_buf *buf = container_of(vb, struct viu_buf, vb);
588 struct viu_fh *fh = vq->priv_data;
589 struct viu_dev *dev = (struct viu_dev *)fh->dev;
590
591 viu_stop_dma(dev);
592 free_buffer(vq, buf);
593}
594
595static struct videobuf_queue_ops viu_video_qops = {
596 .buf_setup = buffer_setup,
597 .buf_prepare = buffer_prepare,
598 .buf_queue = buffer_queue,
599 .buf_release = buffer_release,
600};
601
602/*
603 * IOCTL vidioc handling
604 */
605static int vidioc_querycap(struct file *file, void *priv,
606 struct v4l2_capability *cap)
607{
608 strcpy(cap->driver, "viu");
609 strcpy(cap->card, "viu");
610 cap->version = VIU_VERSION;
611 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE |
612 V4L2_CAP_STREAMING |
613 V4L2_CAP_VIDEO_OVERLAY |
614 V4L2_CAP_READWRITE;
615 return 0;
616}
617
618static int vidioc_enum_fmt(struct file *file, void *priv,
619 struct v4l2_fmtdesc *f)
620{
621 int index = f->index;
622
623 if (f->index > NUM_FORMATS)
624 return -EINVAL;
625
626 strlcpy(f->description, formats[index].name, sizeof(f->description));
627 f->pixelformat = formats[index].fourcc;
628 return 0;
629}
630
631static int vidioc_g_fmt_cap(struct file *file, void *priv,
632 struct v4l2_format *f)
633{
634 struct viu_fh *fh = priv;
635
636 f->fmt.pix.width = fh->width;
637 f->fmt.pix.height = fh->height;
638 f->fmt.pix.field = fh->vb_vidq.field;
639 f->fmt.pix.pixelformat = fh->fmt->pixelformat;
640 f->fmt.pix.bytesperline =
641 (f->fmt.pix.width * fh->fmt->depth) >> 3;
642 f->fmt.pix.sizeimage = fh->sizeimage;
643 return 0;
644}
645
646static int vidioc_try_fmt_cap(struct file *file, void *priv,
647 struct v4l2_format *f)
648{
649 struct viu_fmt *fmt;
650 enum v4l2_field field;
651 unsigned int maxw, maxh;
652
653 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
654 if (!fmt) {
655 dprintk(1, "Fourcc format (0x%08x) invalid.",
656 f->fmt.pix.pixelformat);
657 return -EINVAL;
658 }
659
660 field = f->fmt.pix.field;
661
662 if (field == V4L2_FIELD_ANY) {
663 field = V4L2_FIELD_INTERLACED;
664 } else if (field != V4L2_FIELD_INTERLACED) {
665 dprintk(1, "Field type invalid.\n");
666 return -EINVAL;
667 }
668
669 maxw = norm_maxw();
670 maxh = norm_maxh();
671
672 f->fmt.pix.field = field;
673 if (f->fmt.pix.height < 32)
674 f->fmt.pix.height = 32;
675 if (f->fmt.pix.height > maxh)
676 f->fmt.pix.height = maxh;
677 if (f->fmt.pix.width < 48)
678 f->fmt.pix.width = 48;
679 if (f->fmt.pix.width > maxw)
680 f->fmt.pix.width = maxw;
681 f->fmt.pix.width &= ~0x03;
682 f->fmt.pix.bytesperline =
683 (f->fmt.pix.width * fmt->depth) >> 3;
684
685 return 0;
686}
687
688static int vidioc_s_fmt_cap(struct file *file, void *priv,
689 struct v4l2_format *f)
690{
691 struct viu_fh *fh = priv;
692 int ret;
693
694 ret = vidioc_try_fmt_cap(file, fh, f);
695 if (ret < 0)
696 return ret;
697
698 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
699 fh->width = f->fmt.pix.width;
700 fh->height = f->fmt.pix.height;
701 fh->sizeimage = f->fmt.pix.sizeimage;
702 fh->vb_vidq.field = f->fmt.pix.field;
703 fh->type = f->type;
704 dprintk(1, "set to pixelformat '%4.6s'\n", (char *)&fh->fmt->name);
705 return 0;
706}
707
708static int vidioc_g_fmt_overlay(struct file *file, void *priv,
709 struct v4l2_format *f)
710{
711 struct viu_fh *fh = priv;
712
713 f->fmt.win = fh->win;
714 return 0;
715}
716
717static int verify_preview(struct viu_dev *dev, struct v4l2_window *win)
718{
719 enum v4l2_field field;
720 int maxw, maxh;
721
722 if (dev->ovbuf.base == NULL)
723 return -EINVAL;
724 if (dev->ovfmt == NULL)
725 return -EINVAL;
726 if (win->w.width < 48 || win->w.height < 32)
727 return -EINVAL;
728
729 field = win->field;
730 maxw = dev->crop_current.width;
731 maxh = dev->crop_current.height;
732
733 if (field == V4L2_FIELD_ANY) {
734 field = (win->w.height > maxh/2)
735 ? V4L2_FIELD_INTERLACED
736 : V4L2_FIELD_TOP;
737 }
738 switch (field) {
739 case V4L2_FIELD_TOP:
740 case V4L2_FIELD_BOTTOM:
741 maxh = maxh / 2;
742 break;
743 case V4L2_FIELD_INTERLACED:
744 break;
745 default:
746 return -EINVAL;
747 }
748
749 win->field = field;
750 if (win->w.width > maxw)
751 win->w.width = maxw;
752 if (win->w.height > maxh)
753 win->w.height = maxh;
754 return 0;
755}
756
757inline void viu_activate_overlay(struct viu_reg *viu_reg)
758{
759 struct viu_reg *vr = viu_reg;
760
761 out_be32(&vr->field_base_addr, reg_val.field_base_addr);
762 out_be32(&vr->dma_inc, reg_val.dma_inc);
763 out_be32(&vr->picture_count, reg_val.picture_count);
764}
765
766static int viu_start_preview(struct viu_dev *dev, struct viu_fh *fh)
767{
768 int bpp;
769
770 dprintk(1, "%s %dx%d %s\n", __func__,
771 fh->win.w.width, fh->win.w.height, dev->ovfmt->name);
772
773 reg_val.status_cfg = 0;
774
775 /* setup window */
776 reg_val.picture_count = (fh->win.w.height / 2) << 16 |
777 fh->win.w.width;
778
779 /* setup color depth and dma increment */
780 bpp = dev->ovfmt->depth / 8;
781 switch (bpp) {
782 case 2:
783 reg_val.status_cfg &= ~MODE_32BIT;
784 reg_val.dma_inc = fh->win.w.width * 2;
785 break;
786 case 4:
787 reg_val.status_cfg |= MODE_32BIT;
788 reg_val.dma_inc = fh->win.w.width * 4;
789 break;
790 default:
791 dprintk(0, "device doesn't support color depth(%d)\n",
792 bpp * 8);
793 return -EINVAL;
794 }
795
796 dev->ovfield = fh->win.field;
797 if (!V4L2_FIELD_HAS_BOTH(dev->ovfield))
798 reg_val.dma_inc = 0;
799
800 reg_val.status_cfg |= DMA_ACT | INT_DMA_END_EN | INT_FIELD_EN;
801
802 /* setup the base address of the overlay buffer */
803 reg_val.field_base_addr = (u32)dev->ovbuf.base;
804
805 dev->ovenable = 1;
806 viu_activate_overlay(dev->vr);
807
808 /* start dma */
809 viu_start_dma(dev);
810 return 0;
811}
812
813static int vidioc_s_fmt_overlay(struct file *file, void *priv,
814 struct v4l2_format *f)
815{
816 struct viu_fh *fh = priv;
817 struct viu_dev *dev = (struct viu_dev *)fh->dev;
818 unsigned long flags;
819 int err;
820
821 err = verify_preview(dev, &f->fmt.win);
822 if (err)
823 return err;
824
825 mutex_lock(&dev->lock);
826 fh->win = f->fmt.win;
827
828 spin_lock_irqsave(&dev->slock, flags);
829 viu_start_preview(dev, fh);
830 spin_unlock_irqrestore(&dev->slock, flags);
831 mutex_unlock(&dev->lock);
832 return 0;
833}
834
835static int vidioc_try_fmt_overlay(struct file *file, void *priv,
836 struct v4l2_format *f)
837{
838 return 0;
839}
840
841int vidioc_g_fbuf(struct file *file, void *priv, struct v4l2_framebuffer *arg)
842{
843 struct viu_fh *fh = priv;
844 struct viu_dev *dev = fh->dev;
845 struct v4l2_framebuffer *fb = arg;
846
847 *fb = dev->ovbuf;
848 fb->capability = V4L2_FBUF_CAP_LIST_CLIPPING;
849 return 0;
850}
851
852int vidioc_s_fbuf(struct file *file, void *priv, struct v4l2_framebuffer *arg)
853{
854 struct viu_fh *fh = priv;
855 struct viu_dev *dev = fh->dev;
856 struct v4l2_framebuffer *fb = arg;
857 struct viu_fmt *fmt;
858
859 if (!capable(CAP_SYS_ADMIN) && !capable(CAP_SYS_RAWIO))
860 return -EPERM;
861
862 /* check args */
863 fmt = format_by_fourcc(fb->fmt.pixelformat);
864 if (fmt == NULL)
865 return -EINVAL;
866
867 /* ok, accept it */
868 dev->ovbuf = *fb;
869 dev->ovfmt = fmt;
870 if (dev->ovbuf.fmt.bytesperline == 0) {
871 dev->ovbuf.fmt.bytesperline =
872 dev->ovbuf.fmt.width * fmt->depth / 8;
873 }
874 return 0;
875}
876
877static int vidioc_reqbufs(struct file *file, void *priv,
878 struct v4l2_requestbuffers *p)
879{
880 struct viu_fh *fh = priv;
881
882 return videobuf_reqbufs(&fh->vb_vidq, p);
883}
884
885static int vidioc_querybuf(struct file *file, void *priv,
886 struct v4l2_buffer *p)
887{
888 struct viu_fh *fh = priv;
889
890 return videobuf_querybuf(&fh->vb_vidq, p);
891}
892
893static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *p)
894{
895 struct viu_fh *fh = priv;
896
897 return videobuf_qbuf(&fh->vb_vidq, p);
898}
899
900static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *p)
901{
902 struct viu_fh *fh = priv;
903
904 return videobuf_dqbuf(&fh->vb_vidq, p,
905 file->f_flags & O_NONBLOCK);
906}
907
908static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
909{
910 struct viu_fh *fh = priv;
911
912 if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
913 return -EINVAL;
914 if (fh->type != i)
915 return -EINVAL;
916
917 return videobuf_streamon(&fh->vb_vidq);
918}
919
920static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
921{
922 struct viu_fh *fh = priv;
923
924 if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
925 return -EINVAL;
926 if (fh->type != i)
927 return -EINVAL;
928
929 return videobuf_streamoff(&fh->vb_vidq);
930}
931
932#define decoder_call(viu, o, f, args...) \
933 v4l2_subdev_call(viu->decoder, o, f, ##args)
934
935static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id *id)
936{
937 struct viu_fh *fh = priv;
938
939 decoder_call(fh->dev, core, s_std, *id);
940 return 0;
941}
942
943/* only one input in this driver */
944static int vidioc_enum_input(struct file *file, void *priv,
945 struct v4l2_input *inp)
946{
947 struct viu_fh *fh = priv;
948
949 if (inp->index != 0)
950 return -EINVAL;
951
952 inp->type = V4L2_INPUT_TYPE_CAMERA;
953 inp->std = fh->dev->vdev->tvnorms;
954 strcpy(inp->name, "Camera");
955 return 0;
956}
957
958static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
959{
960 *i = 0;
961 return 0;
962}
963
964static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
965{
966 struct viu_fh *fh = priv;
967
968 if (i > 1)
969 return -EINVAL;
970
971 decoder_call(fh->dev, video, s_routing, i, 0, 0);
972 return 0;
973}
974
975/* Controls */
976static int vidioc_queryctrl(struct file *file, void *priv,
977 struct v4l2_queryctrl *qc)
978{
979 int i;
980
981 for (i = 0; i < ARRAY_SIZE(viu_qctrl); i++) {
982 if (qc->id && qc->id == viu_qctrl[i].id) {
983 memcpy(qc, &(viu_qctrl[i]), sizeof(*qc));
984 return 0;
985 }
986 }
987 return -EINVAL;
988}
989
990static int vidioc_g_ctrl(struct file *file, void *priv,
991 struct v4l2_control *ctrl)
992{
993 int i;
994
995 for (i = 0; i < ARRAY_SIZE(viu_qctrl); i++) {
996 if (ctrl->id == viu_qctrl[i].id) {
997 ctrl->value = qctl_regs[i];
998 return 0;
999 }
1000 }
1001 return -EINVAL;
1002}
1003static int vidioc_s_ctrl(struct file *file, void *priv,
1004 struct v4l2_control *ctrl)
1005{
1006 int i;
1007
1008 for (i = 0; i < ARRAY_SIZE(viu_qctrl); i++) {
1009 if (ctrl->id == viu_qctrl[i].id) {
1010 if (ctrl->value < viu_qctrl[i].minimum
1011 || ctrl->value > viu_qctrl[i].maximum)
1012 return -ERANGE;
1013 qctl_regs[i] = ctrl->value;
1014 return 0;
1015 }
1016 }
1017 return -EINVAL;
1018}
1019
1020inline void viu_activate_next_buf(struct viu_dev *dev,
1021 struct viu_dmaqueue *viuq)
1022{
1023 struct viu_dmaqueue *vidq = viuq;
1024 struct viu_buf *buf;
1025
1026 /* launch another DMA operation for an active/queued buffer */
1027 if (!list_empty(&vidq->active)) {
1028 buf = list_entry(vidq->active.next, struct viu_buf,
1029 vb.queue);
1030 dprintk(1, "start another queued buffer: 0x%p\n", buf);
1031 buffer_activate(dev, buf);
1032 } else if (!list_empty(&vidq->queued)) {
1033 buf = list_entry(vidq->queued.next, struct viu_buf,
1034 vb.queue);
1035 list_del(&buf->vb.queue);
1036
1037 dprintk(1, "start another queued buffer: 0x%p\n", buf);
1038 list_add_tail(&buf->vb.queue, &vidq->active);
1039 buf->vb.state = VIDEOBUF_ACTIVE;
1040 buffer_activate(dev, buf);
1041 }
1042}
1043
1044inline void viu_default_settings(struct viu_reg *viu_reg)
1045{
1046 struct viu_reg *vr = viu_reg;
1047
1048 out_be32(&vr->luminance, 0x9512A254);
1049 out_be32(&vr->chroma_r, 0x03310000);
1050 out_be32(&vr->chroma_g, 0x06600F38);
1051 out_be32(&vr->chroma_b, 0x00000409);
1052 out_be32(&vr->alpha, 0x000000ff);
1053 out_be32(&vr->req_alarm, 0x00000090);
1054 dprintk(1, "status reg: 0x%08x, field base: 0x%08x\n",
1055 in_be32(&vr->status_cfg), in_be32(&vr->field_base_addr));
1056}
1057
1058static void viu_overlay_intr(struct viu_dev *dev, u32 status)
1059{
1060 struct viu_reg *vr = dev->vr;
1061
1062 if (status & INT_DMA_END_STATUS)
1063 dev->dma_done = 1;
1064
1065 if (status & INT_FIELD_STATUS) {
1066 if (dev->dma_done) {
1067 u32 addr = reg_val.field_base_addr;
1068
1069 dev->dma_done = 0;
1070 if (status & FIELD_NO)
1071 addr += reg_val.dma_inc;
1072
1073 out_be32(&vr->field_base_addr, addr);
1074 out_be32(&vr->dma_inc, reg_val.dma_inc);
1075 out_be32(&vr->status_cfg,
1076 (status & 0xffc0ffff) |
1077 (status & INT_ALL_STATUS) |
1078 reg_val.status_cfg);
1079 } else if (status & INT_VSYNC_STATUS) {
1080 out_be32(&vr->status_cfg,
1081 (status & 0xffc0ffff) |
1082 (status & INT_ALL_STATUS) |
1083 reg_val.status_cfg);
1084 }
1085 }
1086}
1087
1088static void viu_capture_intr(struct viu_dev *dev, u32 status)
1089{
1090 struct viu_dmaqueue *vidq = &dev->vidq;
1091 struct viu_reg *vr = dev->vr;
1092 struct viu_buf *buf;
1093 int field_num;
1094 int need_two;
1095 int dma_done = 0;
1096
1097 field_num = status & FIELD_NO;
1098 need_two = V4L2_FIELD_HAS_BOTH(dev->capfield);
1099
1100 if (status & INT_DMA_END_STATUS) {
1101 dma_done = 1;
1102 if (((field_num == 0) && (dev->field == 0)) ||
1103 (field_num && (dev->field == 1)))
1104 dev->field++;
1105 }
1106
1107 if (status & INT_FIELD_STATUS) {
1108 dprintk(1, "irq: field %d, done %d\n",
1109 !!field_num, dma_done);
1110 if (unlikely(dev->first)) {
1111 if (field_num == 0) {
1112 dev->first = 0;
1113 dprintk(1, "activate first buf\n");
1114 viu_activate_next_buf(dev, vidq);
1115 } else
1116 dprintk(1, "wait field 0\n");
1117 return;
1118 }
1119
1120 /* setup buffer address for next dma operation */
1121 if (!list_empty(&vidq->active)) {
1122 u32 addr = reg_val.field_base_addr;
1123
1124 if (field_num && need_two) {
1125 addr += reg_val.dma_inc;
1126 dprintk(1, "field 1, 0x%lx, dev field %d\n",
1127 (unsigned long)addr, dev->field);
1128 }
1129 out_be32(&vr->field_base_addr, addr);
1130 out_be32(&vr->dma_inc, reg_val.dma_inc);
1131 out_be32(&vr->status_cfg,
1132 (status & 0xffc0ffff) |
1133 (status & INT_ALL_STATUS) |
1134 reg_val.status_cfg);
1135 return;
1136 }
1137 }
1138
1139 if (dma_done && field_num && (dev->field == 2)) {
1140 dev->field = 0;
1141 buf = list_entry(vidq->active.next,
1142 struct viu_buf, vb.queue);
1143 dprintk(1, "viu/0: [%p/%d] 0x%lx/0x%lx: dma complete\n",
1144 buf, buf->vb.i,
1145 (unsigned long)videobuf_to_dma_contig(&buf->vb),
1146 (unsigned long)in_be32(&vr->field_base_addr));
1147
1148 if (waitqueue_active(&buf->vb.done)) {
1149 list_del(&buf->vb.queue);
1150 do_gettimeofday(&buf->vb.ts);
1151 buf->vb.state = VIDEOBUF_DONE;
1152 buf->vb.field_count++;
1153 wake_up(&buf->vb.done);
1154 }
1155 /* activate next dma buffer */
1156 viu_activate_next_buf(dev, vidq);
1157 }
1158}
1159
1160static irqreturn_t viu_intr(int irq, void *dev_id)
1161{
1162 struct viu_dev *dev = (struct viu_dev *)dev_id;
1163 struct viu_reg *vr = dev->vr;
1164 u32 status;
1165 u32 error;
1166
1167 status = in_be32(&vr->status_cfg);
1168