diff options
author | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-03-15 05:43:57 -0400 |
---|---|---|
committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-03-21 12:34:53 -0400 |
commit | f32b0696eabd7a9dc6efd6a97448742d5f2a7db0 (patch) | |
tree | 3b70e7fea3fdadd88fea733c7b758e935b2f1659 /drivers | |
parent | b86b493eb29120b82ba919e2653c863c0b3804d6 (diff) |
clk: renesas: r8a7740: Always use readl()/writel()
On arm32, there is no reason to use the (soon deprecated)
clk_readl()/clk_writel(). Hence use the generic readl()/writel()
instead.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/clk/renesas/clk-r8a7740.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/clk/renesas/clk-r8a7740.c b/drivers/clk/renesas/clk-r8a7740.c index 2f7ce6696b6c..d074f8e982d0 100644 --- a/drivers/clk/renesas/clk-r8a7740.c +++ b/drivers/clk/renesas/clk-r8a7740.c | |||
@@ -98,20 +98,20 @@ r8a7740_cpg_register_clock(struct device_node *np, struct r8a7740_cpg *cpg, | |||
98 | * clock implementation and we currently have no need to change | 98 | * clock implementation and we currently have no need to change |
99 | * the multiplier value. | 99 | * the multiplier value. |
100 | */ | 100 | */ |
101 | u32 value = clk_readl(cpg->reg + CPG_FRQCRC); | 101 | u32 value = readl(cpg->reg + CPG_FRQCRC); |
102 | parent_name = "system"; | 102 | parent_name = "system"; |
103 | mult = ((value >> 24) & 0x7f) + 1; | 103 | mult = ((value >> 24) & 0x7f) + 1; |
104 | } else if (!strcmp(name, "pllc1")) { | 104 | } else if (!strcmp(name, "pllc1")) { |
105 | u32 value = clk_readl(cpg->reg + CPG_FRQCRA); | 105 | u32 value = readl(cpg->reg + CPG_FRQCRA); |
106 | parent_name = "system"; | 106 | parent_name = "system"; |
107 | mult = ((value >> 24) & 0x7f) + 1; | 107 | mult = ((value >> 24) & 0x7f) + 1; |
108 | div = 2; | 108 | div = 2; |
109 | } else if (!strcmp(name, "pllc2")) { | 109 | } else if (!strcmp(name, "pllc2")) { |
110 | u32 value = clk_readl(cpg->reg + CPG_PLLC2CR); | 110 | u32 value = readl(cpg->reg + CPG_PLLC2CR); |
111 | parent_name = "system"; | 111 | parent_name = "system"; |
112 | mult = ((value >> 24) & 0x3f) + 1; | 112 | mult = ((value >> 24) & 0x3f) + 1; |
113 | } else if (!strcmp(name, "usb24s")) { | 113 | } else if (!strcmp(name, "usb24s")) { |
114 | u32 value = clk_readl(cpg->reg + CPG_USBCKCR); | 114 | u32 value = readl(cpg->reg + CPG_USBCKCR); |
115 | if (value & BIT(7)) | 115 | if (value & BIT(7)) |
116 | /* extal2 */ | 116 | /* extal2 */ |
117 | parent_name = of_clk_get_parent_name(np, 1); | 117 | parent_name = of_clk_get_parent_name(np, 1); |