aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorVille Syrjälä <ville.syrjala@linux.intel.com>2016-11-14 11:53:58 -0500
committerVille Syrjälä <ville.syrjala@linux.intel.com>2016-11-14 12:57:42 -0500
commitf22aa14352cc6f40fdb81cdb2e4f4f9d75613a37 (patch)
tree02d47d890733b45ec600efc322bbe214cdf42419 /drivers
parent5697d60f6e56f90e191d00579307eba044d061a4 (diff)
drm/i915: Use & instead if == to check for rotations
Using == to check for 180 degree rotation only works as long as the reflection bits aren't set. That will change soon enough for CHV, so let's stop doing things the wrong way. v2: Drop the BIT() Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1479142440-25283-2-git-send-email-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c8
-rw-r--r--drivers/gpu/drm/i915/intel_sprite.c6
2 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a4f4b45b586b..10dd1ef57c30 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3084,7 +3084,7 @@ static void i9xx_update_primary_plane(struct drm_plane *primary,
3084 intel_crtc->dspaddr_offset = 3084 intel_crtc->dspaddr_offset =
3085 intel_compute_tile_offset(&x, &y, plane_state, 0); 3085 intel_compute_tile_offset(&x, &y, plane_state, 0);
3086 3086
3087 if (rotation == DRM_ROTATE_180) { 3087 if (rotation & DRM_ROTATE_180) {
3088 dspcntr |= DISPPLANE_ROTATE_180; 3088 dspcntr |= DISPPLANE_ROTATE_180;
3089 3089
3090 x += (crtc_state->pipe_src_w - 1); 3090 x += (crtc_state->pipe_src_w - 1);
@@ -3188,7 +3188,7 @@ static void ironlake_update_primary_plane(struct drm_plane *primary,
3188 intel_crtc->dspaddr_offset = 3188 intel_crtc->dspaddr_offset =
3189 intel_compute_tile_offset(&x, &y, plane_state, 0); 3189 intel_compute_tile_offset(&x, &y, plane_state, 0);
3190 3190
3191 if (rotation == DRM_ROTATE_180) { 3191 if (rotation & DRM_ROTATE_180) {
3192 dspcntr |= DISPPLANE_ROTATE_180; 3192 dspcntr |= DISPPLANE_ROTATE_180;
3193 3193
3194 if (!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)) { 3194 if (!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)) {
@@ -10881,7 +10881,7 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base,
10881 if (HAS_DDI(dev_priv)) 10881 if (HAS_DDI(dev_priv))
10882 cntl |= CURSOR_PIPE_CSC_ENABLE; 10882 cntl |= CURSOR_PIPE_CSC_ENABLE;
10883 10883
10884 if (plane_state->base.rotation == DRM_ROTATE_180) 10884 if (plane_state->base.rotation & DRM_ROTATE_180)
10885 cntl |= CURSOR_ROTATE_180; 10885 cntl |= CURSOR_ROTATE_180;
10886 } 10886 }
10887 10887
@@ -10927,7 +10927,7 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,
10927 10927
10928 /* ILK+ do this automagically */ 10928 /* ILK+ do this automagically */
10929 if (HAS_GMCH_DISPLAY(dev_priv) && 10929 if (HAS_GMCH_DISPLAY(dev_priv) &&
10930 plane_state->base.rotation == DRM_ROTATE_180) { 10930 plane_state->base.rotation & DRM_ROTATE_180) {
10931 base += (plane_state->base.crtc_h * 10931 base += (plane_state->base.crtc_h *
10932 plane_state->base.crtc_w - 1) * 4; 10932 plane_state->base.crtc_w - 1) * 4;
10933 } 10933 }
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 5e4eb7cafef0..ea85d27af217 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -436,7 +436,7 @@ vlv_update_plane(struct drm_plane *dplane,
436 intel_add_fb_offsets(&x, &y, plane_state, 0); 436 intel_add_fb_offsets(&x, &y, plane_state, 0);
437 sprsurf_offset = intel_compute_tile_offset(&x, &y, plane_state, 0); 437 sprsurf_offset = intel_compute_tile_offset(&x, &y, plane_state, 0);
438 438
439 if (rotation == DRM_ROTATE_180) { 439 if (rotation & DRM_ROTATE_180) {
440 sprctl |= SP_ROTATE_180; 440 sprctl |= SP_ROTATE_180;
441 441
442 x += src_w; 442 x += src_w;
@@ -566,7 +566,7 @@ ivb_update_plane(struct drm_plane *plane,
566 intel_add_fb_offsets(&x, &y, plane_state, 0); 566 intel_add_fb_offsets(&x, &y, plane_state, 0);
567 sprsurf_offset = intel_compute_tile_offset(&x, &y, plane_state, 0); 567 sprsurf_offset = intel_compute_tile_offset(&x, &y, plane_state, 0);
568 568
569 if (rotation == DRM_ROTATE_180) { 569 if (rotation & DRM_ROTATE_180) {
570 sprctl |= SPRITE_ROTATE_180; 570 sprctl |= SPRITE_ROTATE_180;
571 571
572 /* HSW and BDW does this automagically in hardware */ 572 /* HSW and BDW does this automagically in hardware */
@@ -700,7 +700,7 @@ ilk_update_plane(struct drm_plane *plane,
700 intel_add_fb_offsets(&x, &y, plane_state, 0); 700 intel_add_fb_offsets(&x, &y, plane_state, 0);
701 dvssurf_offset = intel_compute_tile_offset(&x, &y, plane_state, 0); 701 dvssurf_offset = intel_compute_tile_offset(&x, &y, plane_state, 0);
702 702
703 if (rotation == DRM_ROTATE_180) { 703 if (rotation & DRM_ROTATE_180) {
704 dvscntr |= DVS_ROTATE_180; 704 dvscntr |= DVS_ROTATE_180;
705 705
706 x += src_w; 706 x += src_w;