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authorKenneth Feng <kenneth.feng@amd.com>2018-04-20 01:55:39 -0400
committerAlex Deucher <alexander.deucher@amd.com>2018-05-15 14:43:35 -0400
commite0e93d03efa1c53012cc609fd48112df3e06da69 (patch)
tree37fca8101a3ccc1cbddd9172d268be4893165742 /drivers
parentb1f223c02a3a2b41847f48f75797eba5979ea25d (diff)
drm/amd/powerplay: add registry key to disable ACG
For the dummy ACG fuses,need to disable ACG, otherwise corruption will be caused. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c5
-rw-r--r--drivers/gpu/drm/amd/powerplay/inc/hwmgr.h1
2 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c
index 7fa1ba89ac54..888ddca902d8 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c
@@ -224,6 +224,11 @@ static int append_vbios_pptable(struct pp_hwmgr *hwmgr, PPTable_t *ppsmc_pptable
224 ppsmc_pptable->AcgGfxclkSpreadPercent = smc_dpm_table.acggfxclkspreadpercent; 224 ppsmc_pptable->AcgGfxclkSpreadPercent = smc_dpm_table.acggfxclkspreadpercent;
225 ppsmc_pptable->AcgGfxclkSpreadFreq = smc_dpm_table.acggfxclkspreadfreq; 225 ppsmc_pptable->AcgGfxclkSpreadFreq = smc_dpm_table.acggfxclkspreadfreq;
226 226
227 /* 0xFFFF will disable the ACG feature */
228 if (!(hwmgr->feature_mask & PP_ACG_MASK)) {
229 ppsmc_pptable->AcgThresholdFreqHigh = 0xFFFF;
230 ppsmc_pptable->AcgThresholdFreqLow = 0xFFFF;
231 }
227 232
228 return 0; 233 return 0;
229} 234}
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index 9b3dd7dce4e2..2f203ec3d19c 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -82,6 +82,7 @@ enum PP_FEATURE_MASK {
82 PP_SOCCLK_DPM_MASK = 0x1000, 82 PP_SOCCLK_DPM_MASK = 0x1000,
83 PP_DCEFCLK_DPM_MASK = 0x2000, 83 PP_DCEFCLK_DPM_MASK = 0x2000,
84 PP_OVERDRIVE_MASK = 0x4000, 84 PP_OVERDRIVE_MASK = 0x4000,
85 PP_ACG_MASK = 0x10000,
85}; 86};
86 87
87enum PHM_BackEnd_Magic { 88enum PHM_BackEnd_Magic {