aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2019-02-20 10:16:07 -0500
committerArnd Bergmann <arnd@arndb.de>2019-02-20 10:18:50 -0500
commitdc3e1ac12b0a8fd5db727a8f938726f63bc31950 (patch)
tree54f7a872d5726cbbcf9a4a04de3c8a516526c9da /drivers
parentf17b5f06cb92ef2250513a1e154c47b78df07d40 (diff)
parent49b654fd43b29e8decaa38035eed9ca8f221e48a (diff)
Merge tag 'davinci-for-v5.1/soc-part3' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into arm/late
DaVinci SoC updates for v5.1 (part 3) ------------------------------------- This pull request gets rid of mach-davinci private interrupt controller implmentations (aintc and cp_initc) and moves them to drivers/irqchip. mach/irqs.h usage outside of mach-davinci has been rid of. The driver changes (input and irqchip) have been acked by respective maintainers. * tag 'davinci-for-v5.1/soc-part3' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: (57 commits) ARM: davinci: remove intc related fields from davinci_soc_info irqchip: davinci-cp-intc: move the driver to drivers/irqchip ARM: davinci: cp-intc: remove redundant comments ARM: davinci: cp-intc: drop GPL license boilerplate ARM: davinci: cp-intc: use readl/writel_relaxed() ARM: davinci: cp-intc: unify error handling ARM: davinci: cp-intc: improve coding style ARM: davinci: cp-intc: request the memory region before remapping it ARM: davinci: cp-intc: use the new-style config structure ARM: davinci: cp-intc: convert all hex numbers to lowercase ARM: davinci: cp-intc: use a common prefix for all symbols ARM: davinci: cp-intc: add the new config structures for da8xx SoCs irqchip: davinci-cp-intc: add a new config structure ARM: davinci: cp-intc: add a wrapper around cp_intc_init() ARM: davinci: cp-intc: remove cp_intc.h irqchip: davinci-aintc: move the driver to drivers/irqchip ARM: davinci: aintc: remove unnecessary includes ARM: davinci: aintc: remove the timer-specific irq_set_handler() ARM: davinci: aintc: request memory region before remapping it ARM: davinci: aintc: unify error handling ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/input/keyboard/davinci_keyscan.c4
-rw-r--r--drivers/irqchip/Kconfig10
-rw-r--r--drivers/irqchip/Makefile2
-rw-r--r--drivers/irqchip/irq-davinci-aintc.c163
-rw-r--r--drivers/irqchip/irq-davinci-cp-intc.c260
-rw-r--r--drivers/usb/host/ohci-da8xx.c118
6 files changed, 495 insertions, 62 deletions
diff --git a/drivers/input/keyboard/davinci_keyscan.c b/drivers/input/keyboard/davinci_keyscan.c
index b20a5d044caa..b4db72f833ca 100644
--- a/drivers/input/keyboard/davinci_keyscan.c
+++ b/drivers/input/keyboard/davinci_keyscan.c
@@ -32,10 +32,6 @@
32#include <linux/errno.h> 32#include <linux/errno.h>
33#include <linux/slab.h> 33#include <linux/slab.h>
34 34
35#include <asm/irq.h>
36
37#include <mach/hardware.h>
38#include <mach/irqs.h>
39#include <linux/platform_data/keyscan-davinci.h> 35#include <linux/platform_data/keyscan-davinci.h>
40 36
41/* Key scan registers */ 37/* Key scan registers */
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 3d1e60779078..48fc5024c073 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -129,6 +129,16 @@ config BRCMSTB_L2_IRQ
129 select GENERIC_IRQ_CHIP 129 select GENERIC_IRQ_CHIP
130 select IRQ_DOMAIN 130 select IRQ_DOMAIN
131 131
132config DAVINCI_AINTC
133 bool
134 select GENERIC_IRQ_CHIP
135 select IRQ_DOMAIN
136
137config DAVINCI_CP_INTC
138 bool
139 select GENERIC_IRQ_CHIP
140 select IRQ_DOMAIN
141
132config DW_APB_ICTL 142config DW_APB_ICTL
133 bool 143 bool
134 select GENERIC_IRQ_CHIP 144 select GENERIC_IRQ_CHIP
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index c93713d24b86..e6cd0c98eff2 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -6,6 +6,8 @@ obj-$(CONFIG_ATH79) += irq-ath79-cpu.o
6obj-$(CONFIG_ATH79) += irq-ath79-misc.o 6obj-$(CONFIG_ATH79) += irq-ath79-misc.o
7obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o 7obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
8obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o 8obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
9obj-$(CONFIG_DAVINCI_AINTC) += irq-davinci-aintc.o
10obj-$(CONFIG_DAVINCI_CP_INTC) += irq-davinci-cp-intc.o
9obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o 11obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o
10obj-$(CONFIG_FARADAY_FTINTC010) += irq-ftintc010.o 12obj-$(CONFIG_FARADAY_FTINTC010) += irq-ftintc010.o
11obj-$(CONFIG_ARCH_HIP04) += irq-hip04.o 13obj-$(CONFIG_ARCH_HIP04) += irq-hip04.o
diff --git a/drivers/irqchip/irq-davinci-aintc.c b/drivers/irqchip/irq-davinci-aintc.c
new file mode 100644
index 000000000000..810ccc4fe476
--- /dev/null
+++ b/drivers/irqchip/irq-davinci-aintc.c
@@ -0,0 +1,163 @@
1// SPDX-License-Identifier: GPL-2.0-or-later
2//
3// Copyright (C) 2006, 2019 Texas Instruments.
4//
5// Interrupt handler for DaVinci boards.
6
7#include <linux/kernel.h>
8#include <linux/init.h>
9#include <linux/interrupt.h>
10#include <linux/irq.h>
11#include <linux/irqchip/irq-davinci-aintc.h>
12#include <linux/io.h>
13#include <linux/irqdomain.h>
14
15#include <asm/exception.h>
16
17#define DAVINCI_AINTC_FIQ_REG0 0x00
18#define DAVINCI_AINTC_FIQ_REG1 0x04
19#define DAVINCI_AINTC_IRQ_REG0 0x08
20#define DAVINCI_AINTC_IRQ_REG1 0x0c
21#define DAVINCI_AINTC_IRQ_IRQENTRY 0x14
22#define DAVINCI_AINTC_IRQ_ENT_REG0 0x18
23#define DAVINCI_AINTC_IRQ_ENT_REG1 0x1c
24#define DAVINCI_AINTC_IRQ_INCTL_REG 0x20
25#define DAVINCI_AINTC_IRQ_EABASE_REG 0x24
26#define DAVINCI_AINTC_IRQ_INTPRI0_REG 0x30
27#define DAVINCI_AINTC_IRQ_INTPRI7_REG 0x4c
28
29static void __iomem *davinci_aintc_base;
30static struct irq_domain *davinci_aintc_irq_domain;
31
32static inline void davinci_aintc_writel(unsigned long value, int offset)
33{
34 writel_relaxed(value, davinci_aintc_base + offset);
35}
36
37static inline unsigned long davinci_aintc_readl(int offset)
38{
39 return readl_relaxed(davinci_aintc_base + offset);
40}
41
42static __init void
43davinci_aintc_setup_gc(void __iomem *base,
44 unsigned int irq_start, unsigned int num)
45{
46 struct irq_chip_generic *gc;
47 struct irq_chip_type *ct;
48
49 gc = irq_get_domain_generic_chip(davinci_aintc_irq_domain, irq_start);
50 gc->reg_base = base;
51 gc->irq_base = irq_start;
52
53 ct = gc->chip_types;
54 ct->chip.irq_ack = irq_gc_ack_set_bit;
55 ct->chip.irq_mask = irq_gc_mask_clr_bit;
56 ct->chip.irq_unmask = irq_gc_mask_set_bit;
57
58 ct->regs.ack = DAVINCI_AINTC_IRQ_REG0;
59 ct->regs.mask = DAVINCI_AINTC_IRQ_ENT_REG0;
60 irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,
61 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
62}
63
64static asmlinkage void __exception_irq_entry
65davinci_aintc_handle_irq(struct pt_regs *regs)
66{
67 int irqnr = davinci_aintc_readl(DAVINCI_AINTC_IRQ_IRQENTRY);
68
69 /*
70 * Use the formula for entry vector index generation from section
71 * 8.3.3 of the manual.
72 */
73 irqnr >>= 2;
74 irqnr -= 1;
75
76 handle_domain_irq(davinci_aintc_irq_domain, irqnr, regs);
77}
78
79/* ARM Interrupt Controller Initialization */
80void __init davinci_aintc_init(const struct davinci_aintc_config *config)
81{
82 unsigned int irq_off, reg_off, prio, shift;
83 void __iomem *req;
84 int ret, irq_base;
85 const u8 *prios;
86
87 req = request_mem_region(config->reg.start,
88 resource_size(&config->reg),
89 "davinci-cp-intc");
90 if (!req) {
91 pr_err("%s: register range busy\n", __func__);
92 return;
93 }
94
95 davinci_aintc_base = ioremap(config->reg.start,
96 resource_size(&config->reg));
97 if (!davinci_aintc_base) {
98 pr_err("%s: unable to ioremap register range\n", __func__);
99 return;
100 }
101
102 /* Clear all interrupt requests */
103 davinci_aintc_writel(~0x0, DAVINCI_AINTC_FIQ_REG0);
104 davinci_aintc_writel(~0x0, DAVINCI_AINTC_FIQ_REG1);
105 davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG0);
106 davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG1);
107
108 /* Disable all interrupts */
109 davinci_aintc_writel(0x0, DAVINCI_AINTC_IRQ_ENT_REG0);
110 davinci_aintc_writel(0x0, DAVINCI_AINTC_IRQ_ENT_REG1);
111
112 /* Interrupts disabled immediately, IRQ entry reflects all */
113 davinci_aintc_writel(0x0, DAVINCI_AINTC_IRQ_INCTL_REG);
114
115 /* we don't use the hardware vector table, just its entry addresses */
116 davinci_aintc_writel(0, DAVINCI_AINTC_IRQ_EABASE_REG);
117
118 /* Clear all interrupt requests */
119 davinci_aintc_writel(~0x0, DAVINCI_AINTC_FIQ_REG0);
120 davinci_aintc_writel(~0x0, DAVINCI_AINTC_FIQ_REG1);
121 davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG0);
122 davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG1);
123
124 prios = config->prios;
125 for (reg_off = DAVINCI_AINTC_IRQ_INTPRI0_REG;
126 reg_off <= DAVINCI_AINTC_IRQ_INTPRI7_REG; reg_off += 4) {
127 for (shift = 0, prio = 0; shift < 32; shift += 4, prios++)
128 prio |= (*prios & 0x07) << shift;
129 davinci_aintc_writel(prio, reg_off);
130 }
131
132 irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0);
133 if (irq_base < 0) {
134 pr_err("%s: unable to allocate interrupt descriptors: %d\n",
135 __func__, irq_base);
136 return;
137 }
138
139 davinci_aintc_irq_domain = irq_domain_add_legacy(NULL,
140 config->num_irqs, irq_base, 0,
141 &irq_domain_simple_ops, NULL);
142 if (!davinci_aintc_irq_domain) {
143 pr_err("%s: unable to create interrupt domain\n", __func__);
144 return;
145 }
146
147 ret = irq_alloc_domain_generic_chips(davinci_aintc_irq_domain, 32, 1,
148 "AINTC", handle_edge_irq,
149 IRQ_NOREQUEST | IRQ_NOPROBE, 0, 0);
150 if (ret) {
151 pr_err("%s: unable to allocate generic irq chips for domain\n",
152 __func__);
153 return;
154 }
155
156 for (irq_off = 0, reg_off = 0;
157 irq_off < config->num_irqs;
158 irq_off += 32, reg_off += 0x04)
159 davinci_aintc_setup_gc(davinci_aintc_base + reg_off,
160 irq_base + irq_off, 32);
161
162 set_handle_irq(davinci_aintc_handle_irq);
163}
diff --git a/drivers/irqchip/irq-davinci-cp-intc.c b/drivers/irqchip/irq-davinci-cp-intc.c
new file mode 100644
index 000000000000..276da2772e7f
--- /dev/null
+++ b/drivers/irqchip/irq-davinci-cp-intc.c
@@ -0,0 +1,260 @@
1// SPDX-License-Identifier: GPL-2.0-only
2//
3// Author: Steve Chen <schen@mvista.com>
4// Copyright (C) 2008-2009, MontaVista Software, Inc. <source@mvista.com>
5// Author: Bartosz Golaszewski <bgolaszewski@baylibre.com>
6// Copyright (C) 2019, Texas Instruments
7//
8// TI Common Platform Interrupt Controller (cp_intc) driver
9
10#include <linux/export.h>
11#include <linux/init.h>
12#include <linux/irq.h>
13#include <linux/irqchip.h>
14#include <linux/irqchip/irq-davinci-cp-intc.h>
15#include <linux/irqdomain.h>
16#include <linux/io.h>
17#include <linux/of.h>
18#include <linux/of_address.h>
19#include <linux/of_irq.h>
20
21#include <asm/exception.h>
22
23#define DAVINCI_CP_INTC_CTRL 0x04
24#define DAVINCI_CP_INTC_HOST_CTRL 0x0c
25#define DAVINCI_CP_INTC_GLOBAL_ENABLE 0x10
26#define DAVINCI_CP_INTC_SYS_STAT_IDX_CLR 0x24
27#define DAVINCI_CP_INTC_SYS_ENABLE_IDX_SET 0x28
28#define DAVINCI_CP_INTC_SYS_ENABLE_IDX_CLR 0x2c
29#define DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET 0x34
30#define DAVINCI_CP_INTC_HOST_ENABLE_IDX_CLR 0x38
31#define DAVINCI_CP_INTC_PRIO_IDX 0x80
32#define DAVINCI_CP_INTC_SYS_STAT_CLR(n) (0x0280 + (n << 2))
33#define DAVINCI_CP_INTC_SYS_ENABLE_CLR(n) (0x0380 + (n << 2))
34#define DAVINCI_CP_INTC_CHAN_MAP(n) (0x0400 + (n << 2))
35#define DAVINCI_CP_INTC_SYS_POLARITY(n) (0x0d00 + (n << 2))
36#define DAVINCI_CP_INTC_SYS_TYPE(n) (0x0d80 + (n << 2))
37#define DAVINCI_CP_INTC_HOST_ENABLE(n) (0x1500 + (n << 2))
38#define DAVINCI_CP_INTC_PRI_INDX_MASK GENMASK(9, 0)
39#define DAVINCI_CP_INTC_GPIR_NONE BIT(31)
40
41static void __iomem *davinci_cp_intc_base;
42static struct irq_domain *davinci_cp_intc_irq_domain;
43
44static inline unsigned int davinci_cp_intc_read(unsigned int offset)
45{
46 return readl_relaxed(davinci_cp_intc_base + offset);
47}
48
49static inline void davinci_cp_intc_write(unsigned long value,
50 unsigned int offset)
51{
52 writel_relaxed(value, davinci_cp_intc_base + offset);
53}
54
55static void davinci_cp_intc_ack_irq(struct irq_data *d)
56{
57 davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_STAT_IDX_CLR);
58}
59
60static void davinci_cp_intc_mask_irq(struct irq_data *d)
61{
62 /* XXX don't know why we need to disable nIRQ here... */
63 davinci_cp_intc_write(1, DAVINCI_CP_INTC_HOST_ENABLE_IDX_CLR);
64 davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_ENABLE_IDX_CLR);
65 davinci_cp_intc_write(1, DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET);
66}
67
68static void davinci_cp_intc_unmask_irq(struct irq_data *d)
69{
70 davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_ENABLE_IDX_SET);
71}
72
73static int davinci_cp_intc_set_irq_type(struct irq_data *d,
74 unsigned int flow_type)
75{
76 unsigned int reg, mask, polarity, type;
77
78 reg = BIT_WORD(d->hwirq);
79 mask = BIT_MASK(d->hwirq);
80 polarity = davinci_cp_intc_read(DAVINCI_CP_INTC_SYS_POLARITY(reg));
81 type = davinci_cp_intc_read(DAVINCI_CP_INTC_SYS_TYPE(reg));
82
83 switch (flow_type) {
84 case IRQ_TYPE_EDGE_RISING:
85 polarity |= mask;
86 type |= mask;
87 break;
88 case IRQ_TYPE_EDGE_FALLING:
89 polarity &= ~mask;
90 type |= mask;
91 break;
92 case IRQ_TYPE_LEVEL_HIGH:
93 polarity |= mask;
94 type &= ~mask;
95 break;
96 case IRQ_TYPE_LEVEL_LOW:
97 polarity &= ~mask;
98 type &= ~mask;
99 break;
100 default:
101 return -EINVAL;
102 }
103
104 davinci_cp_intc_write(polarity, DAVINCI_CP_INTC_SYS_POLARITY(reg));
105 davinci_cp_intc_write(type, DAVINCI_CP_INTC_SYS_TYPE(reg));
106
107 return 0;
108}
109
110static struct irq_chip davinci_cp_intc_irq_chip = {
111 .name = "cp_intc",
112 .irq_ack = davinci_cp_intc_ack_irq,
113 .irq_mask = davinci_cp_intc_mask_irq,
114 .irq_unmask = davinci_cp_intc_unmask_irq,
115 .irq_set_type = davinci_cp_intc_set_irq_type,
116 .flags = IRQCHIP_SKIP_SET_WAKE,
117};
118
119static asmlinkage void __exception_irq_entry
120davinci_cp_intc_handle_irq(struct pt_regs *regs)
121{
122 int gpir, irqnr, none;
123
124 /*
125 * The interrupt number is in first ten bits. The NONE field set to 1
126 * indicates a spurious irq.
127 */
128
129 gpir = davinci_cp_intc_read(DAVINCI_CP_INTC_PRIO_IDX);
130 irqnr = gpir & DAVINCI_CP_INTC_PRI_INDX_MASK;
131 none = gpir & DAVINCI_CP_INTC_GPIR_NONE;
132
133 if (unlikely(none)) {
134 pr_err_once("%s: spurious irq!\n", __func__);
135 return;
136 }
137
138 handle_domain_irq(davinci_cp_intc_irq_domain, irqnr, regs);
139}
140
141static int davinci_cp_intc_host_map(struct irq_domain *h, unsigned int virq,
142 irq_hw_number_t hw)
143{
144 pr_debug("cp_intc_host_map(%d, 0x%lx)\n", virq, hw);
145
146 irq_set_chip(virq, &davinci_cp_intc_irq_chip);
147 irq_set_probe(virq);
148 irq_set_handler(virq, handle_edge_irq);
149
150 return 0;
151}
152
153static const struct irq_domain_ops davinci_cp_intc_irq_domain_ops = {
154 .map = davinci_cp_intc_host_map,
155 .xlate = irq_domain_xlate_onetwocell,
156};
157
158static int __init
159davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config,
160 struct device_node *node)
161{
162 unsigned int num_regs = BITS_TO_LONGS(config->num_irqs);
163 int offset, irq_base;
164 void __iomem *req;
165
166 req = request_mem_region(config->reg.start,
167 resource_size(&config->reg),
168 "davinci-cp-intc");
169 if (!req) {
170 pr_err("%s: register range busy\n", __func__);
171 return -EBUSY;
172 }
173
174 davinci_cp_intc_base = ioremap(config->reg.start,
175 resource_size(&config->reg));
176 if (!davinci_cp_intc_base) {
177 pr_err("%s: unable to ioremap register range\n", __func__);
178 return -EINVAL;
179 }
180
181 davinci_cp_intc_write(0, DAVINCI_CP_INTC_GLOBAL_ENABLE);
182
183 /* Disable all host interrupts */
184 davinci_cp_intc_write(0, DAVINCI_CP_INTC_HOST_ENABLE(0));
185
186 /* Disable system interrupts */
187 for (offset = 0; offset < num_regs; offset++)
188 davinci_cp_intc_write(~0,
189 DAVINCI_CP_INTC_SYS_ENABLE_CLR(offset));
190
191 /* Set to normal mode, no nesting, no priority hold */
192 davinci_cp_intc_write(0, DAVINCI_CP_INTC_CTRL);
193 davinci_cp_intc_write(0, DAVINCI_CP_INTC_HOST_CTRL);
194
195 /* Clear system interrupt status */
196 for (offset = 0; offset < num_regs; offset++)
197 davinci_cp_intc_write(~0,
198 DAVINCI_CP_INTC_SYS_STAT_CLR(offset));
199
200 /* Enable nIRQ (what about nFIQ?) */
201 davinci_cp_intc_write(1, DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET);
202
203 /* Default all priorities to channel 7. */
204 num_regs = (config->num_irqs + 3) >> 2; /* 4 channels per register */
205 for (offset = 0; offset < num_regs; offset++)
206 davinci_cp_intc_write(0x07070707,
207 DAVINCI_CP_INTC_CHAN_MAP(offset));
208
209 irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0);
210 if (irq_base < 0) {
211 pr_err("%s: unable to allocate interrupt descriptors: %d\n",
212 __func__, irq_base);
213 return irq_base;
214 }
215
216 davinci_cp_intc_irq_domain = irq_domain_add_legacy(
217 node, config->num_irqs, irq_base, 0,
218 &davinci_cp_intc_irq_domain_ops, NULL);
219
220 if (!davinci_cp_intc_irq_domain) {
221 pr_err("%s: unable to create an interrupt domain\n", __func__);
222 return -EINVAL;
223 }
224
225 set_handle_irq(davinci_cp_intc_handle_irq);
226
227 /* Enable global interrupt */
228 davinci_cp_intc_write(1, DAVINCI_CP_INTC_GLOBAL_ENABLE);
229
230 return 0;
231}
232
233int __init davinci_cp_intc_init(const struct davinci_cp_intc_config *config)
234{
235 return davinci_cp_intc_do_init(config, NULL);
236}
237
238static int __init davinci_cp_intc_of_init(struct device_node *node,
239 struct device_node *parent)
240{
241 struct davinci_cp_intc_config config = { };
242 int ret;
243
244 ret = of_address_to_resource(node, 0, &config.reg);
245 if (ret) {
246 pr_err("%s: unable to get the register range from device-tree\n",
247 __func__);
248 return ret;
249 }
250
251 ret = of_property_read_u32(node, "ti,intc-size", &config.num_irqs);
252 if (ret) {
253 pr_err("%s: unable to read the 'ti,intc-size' property\n",
254 __func__);
255 return ret;
256 }
257
258 return davinci_cp_intc_do_init(&config, node);
259}
260IRQCHIP_DECLARE(cp_intc, "ti,cp-intc", davinci_cp_intc_of_init);
diff --git a/drivers/usb/host/ohci-da8xx.c b/drivers/usb/host/ohci-da8xx.c
index a55cbba40a5a..ca8a94f15ac0 100644
--- a/drivers/usb/host/ohci-da8xx.c
+++ b/drivers/usb/host/ohci-da8xx.c
@@ -9,6 +9,7 @@
9 */ 9 */
10 10
11#include <linux/clk.h> 11#include <linux/clk.h>
12#include <linux/gpio/consumer.h>
12#include <linux/io.h> 13#include <linux/io.h>
13#include <linux/interrupt.h> 14#include <linux/interrupt.h>
14#include <linux/jiffies.h> 15#include <linux/jiffies.h>
@@ -40,6 +41,8 @@ struct da8xx_ohci_hcd {
40 struct regulator *vbus_reg; 41 struct regulator *vbus_reg;
41 struct notifier_block nb; 42 struct notifier_block nb;
42 unsigned int reg_enabled; 43 unsigned int reg_enabled;
44 struct gpio_desc *vbus_gpio;
45 struct gpio_desc *oc_gpio;
43}; 46};
44 47
45#define to_da8xx_ohci(hcd) (struct da8xx_ohci_hcd *)(hcd_to_ohci(hcd)->priv) 48#define to_da8xx_ohci(hcd) (struct da8xx_ohci_hcd *)(hcd_to_ohci(hcd)->priv)
@@ -86,12 +89,13 @@ static void ohci_da8xx_disable(struct usb_hcd *hcd)
86static int ohci_da8xx_set_power(struct usb_hcd *hcd, int on) 89static int ohci_da8xx_set_power(struct usb_hcd *hcd, int on)
87{ 90{
88 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd); 91 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd);
89 struct device *dev = hcd->self.controller; 92 struct device *dev = hcd->self.controller;
90 struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
91 int ret; 93 int ret;
92 94
93 if (hub && hub->set_power) 95 if (da8xx_ohci->vbus_gpio) {
94 return hub->set_power(1, on); 96 gpiod_set_value_cansleep(da8xx_ohci->vbus_gpio, on);
97 return 0;
98 }
95 99
96 if (!da8xx_ohci->vbus_reg) 100 if (!da8xx_ohci->vbus_reg)
97 return 0; 101 return 0;
@@ -119,11 +123,9 @@ static int ohci_da8xx_set_power(struct usb_hcd *hcd, int on)
119static int ohci_da8xx_get_power(struct usb_hcd *hcd) 123static int ohci_da8xx_get_power(struct usb_hcd *hcd)
120{ 124{
121 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd); 125 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd);
122 struct device *dev = hcd->self.controller;
123 struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
124 126
125 if (hub && hub->get_power) 127 if (da8xx_ohci->vbus_gpio)
126 return hub->get_power(1); 128 return gpiod_get_value_cansleep(da8xx_ohci->vbus_gpio);
127 129
128 if (da8xx_ohci->vbus_reg) 130 if (da8xx_ohci->vbus_reg)
129 return regulator_is_enabled(da8xx_ohci->vbus_reg); 131 return regulator_is_enabled(da8xx_ohci->vbus_reg);
@@ -134,13 +136,11 @@ static int ohci_da8xx_get_power(struct usb_hcd *hcd)
134static int ohci_da8xx_get_oci(struct usb_hcd *hcd) 136static int ohci_da8xx_get_oci(struct usb_hcd *hcd)
135{ 137{
136 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd); 138 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd);
137 struct device *dev = hcd->self.controller;
138 struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
139 unsigned int flags; 139 unsigned int flags;
140 int ret; 140 int ret;
141 141
142 if (hub && hub->get_oci) 142 if (da8xx_ohci->oc_gpio)
143 return hub->get_oci(1); 143 return gpiod_get_value_cansleep(da8xx_ohci->oc_gpio);
144 144
145 if (!da8xx_ohci->vbus_reg) 145 if (!da8xx_ohci->vbus_reg)
146 return 0; 146 return 0;
@@ -158,10 +158,8 @@ static int ohci_da8xx_get_oci(struct usb_hcd *hcd)
158static int ohci_da8xx_has_set_power(struct usb_hcd *hcd) 158static int ohci_da8xx_has_set_power(struct usb_hcd *hcd)
159{ 159{
160 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd); 160 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd);
161 struct device *dev = hcd->self.controller;
162 struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
163 161
164 if (hub && hub->set_power) 162 if (da8xx_ohci->vbus_gpio)
165 return 1; 163 return 1;
166 164
167 if (da8xx_ohci->vbus_reg) 165 if (da8xx_ohci->vbus_reg)
@@ -173,10 +171,8 @@ static int ohci_da8xx_has_set_power(struct usb_hcd *hcd)
173static int ohci_da8xx_has_oci(struct usb_hcd *hcd) 171static int ohci_da8xx_has_oci(struct usb_hcd *hcd)
174{ 172{
175 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd); 173 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd);
176 struct device *dev = hcd->self.controller;
177 struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
178 174
179 if (hub && hub->get_oci) 175 if (da8xx_ohci->oc_gpio)
180 return 1; 176 return 1;
181 177
182 if (da8xx_ohci->vbus_reg) 178 if (da8xx_ohci->vbus_reg)
@@ -196,19 +192,6 @@ static int ohci_da8xx_has_potpgt(struct usb_hcd *hcd)
196 return 0; 192 return 0;
197} 193}
198 194
199/*
200 * Handle the port over-current indicator change.
201 */
202static void ohci_da8xx_ocic_handler(struct da8xx_ohci_root_hub *hub,
203 unsigned port)
204{
205 ocic_mask |= 1 << port;
206
207 /* Once over-current is detected, the port needs to be powered down */
208 if (hub->get_oci(port) > 0)
209 hub->set_power(port, 0);
210}
211
212static int ohci_da8xx_regulator_event(struct notifier_block *nb, 195static int ohci_da8xx_regulator_event(struct notifier_block *nb,
213 unsigned long event, void *data) 196 unsigned long event, void *data)
214{ 197{
@@ -223,16 +206,23 @@ static int ohci_da8xx_regulator_event(struct notifier_block *nb,
223 return 0; 206 return 0;
224} 207}
225 208
209static irqreturn_t ohci_da8xx_oc_handler(int irq, void *data)
210{
211 struct da8xx_ohci_hcd *da8xx_ohci = data;
212
213 if (gpiod_get_value(da8xx_ohci->oc_gpio))
214 gpiod_set_value(da8xx_ohci->vbus_gpio, 0);
215
216 return IRQ_HANDLED;
217}
218
226static int ohci_da8xx_register_notify(struct usb_hcd *hcd) 219static int ohci_da8xx_register_notify(struct usb_hcd *hcd)
227{ 220{
228 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd); 221 struct da8xx_ohci_hcd *da8xx_ohci = to_da8xx_ohci(hcd);
229 struct device *dev = hcd->self.controller; 222 struct device *dev = hcd->self.controller;
230 struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
231 int ret = 0; 223 int ret = 0;
232 224
233 if (hub && hub->ocic_notify) { 225 if (!da8xx_ohci->oc_gpio && da8xx_ohci->vbus_reg) {
234 ret = hub->ocic_notify(ohci_da8xx_ocic_handler);
235 } else if (da8xx_ohci->vbus_reg) {
236 da8xx_ohci->nb.notifier_call = ohci_da8xx_regulator_event; 226 da8xx_ohci->nb.notifier_call = ohci_da8xx_regulator_event;
237 ret = devm_regulator_register_notifier(da8xx_ohci->vbus_reg, 227 ret = devm_regulator_register_notifier(da8xx_ohci->vbus_reg,
238 &da8xx_ohci->nb); 228 &da8xx_ohci->nb);
@@ -244,15 +234,6 @@ static int ohci_da8xx_register_notify(struct usb_hcd *hcd)
244 return ret; 234 return ret;
245} 235}
246 236
247static void ohci_da8xx_unregister_notify(struct usb_hcd *hcd)
248{
249 struct device *dev = hcd->self.controller;
250 struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
251
252 if (hub && hub->ocic_notify)
253 hub->ocic_notify(NULL);
254}
255
256static int ohci_da8xx_reset(struct usb_hcd *hcd) 237static int ohci_da8xx_reset(struct usb_hcd *hcd)
257{ 238{
258 struct device *dev = hcd->self.controller; 239 struct device *dev = hcd->self.controller;
@@ -402,34 +383,35 @@ MODULE_DEVICE_TABLE(of, da8xx_ohci_ids);
402static int ohci_da8xx_probe(struct platform_device *pdev) 383static int ohci_da8xx_probe(struct platform_device *pdev)
403{ 384{
404 struct da8xx_ohci_hcd *da8xx_ohci; 385 struct da8xx_ohci_hcd *da8xx_ohci;
386 struct device *dev = &pdev->dev;
387 int error, hcd_irq, oc_irq;
405 struct usb_hcd *hcd; 388 struct usb_hcd *hcd;
406 struct resource *mem; 389 struct resource *mem;
407 int error, irq; 390
408 hcd = usb_create_hcd(&ohci_da8xx_hc_driver, &pdev->dev, 391 hcd = usb_create_hcd(&ohci_da8xx_hc_driver, dev, dev_name(dev));
409 dev_name(&pdev->dev));
410 if (!hcd) 392 if (!hcd)
411 return -ENOMEM; 393 return -ENOMEM;
412 394
413 da8xx_ohci = to_da8xx_ohci(hcd); 395 da8xx_ohci = to_da8xx_ohci(hcd);
414 da8xx_ohci->hcd = hcd; 396 da8xx_ohci->hcd = hcd;
415 397
416 da8xx_ohci->usb11_clk = devm_clk_get(&pdev->dev, NULL); 398 da8xx_ohci->usb11_clk = devm_clk_get(dev, NULL);
417 if (IS_ERR(da8xx_ohci->usb11_clk)) { 399 if (IS_ERR(da8xx_ohci->usb11_clk)) {
418 error = PTR_ERR(da8xx_ohci->usb11_clk); 400 error = PTR_ERR(da8xx_ohci->usb11_clk);
419 if (error != -EPROBE_DEFER) 401 if (error != -EPROBE_DEFER)
420 dev_err(&pdev->dev, "Failed to get clock.\n"); 402 dev_err(dev, "Failed to get clock.\n");
421 goto err; 403 goto err;
422 } 404 }
423 405
424 da8xx_ohci->usb11_phy = devm_phy_get(&pdev->dev, "usb-phy"); 406 da8xx_ohci->usb11_phy = devm_phy_get(dev, "usb-phy");
425 if (IS_ERR(da8xx_ohci->usb11_phy)) { 407 if (IS_ERR(da8xx_ohci->usb11_phy)) {
426 error = PTR_ERR(da8xx_ohci->usb11_phy); 408 error = PTR_ERR(da8xx_ohci->usb11_phy);
427 if (error != -EPROBE_DEFER) 409 if (error != -EPROBE_DEFER)
428 dev_err(&pdev->dev, "Failed to get phy.\n"); 410 dev_err(dev, "Failed to get phy.\n");
429 goto err; 411 goto err;
430 } 412 }
431 413
432 da8xx_ohci->vbus_reg = devm_regulator_get_optional(&pdev->dev, "vbus"); 414 da8xx_ohci->vbus_reg = devm_regulator_get_optional(dev, "vbus");
433 if (IS_ERR(da8xx_ohci->vbus_reg)) { 415 if (IS_ERR(da8xx_ohci->vbus_reg)) {
434 error = PTR_ERR(da8xx_ohci->vbus_reg); 416 error = PTR_ERR(da8xx_ohci->vbus_reg);
435 if (error == -ENODEV) { 417 if (error == -ENODEV) {
@@ -437,13 +419,34 @@ static int ohci_da8xx_probe(struct platform_device *pdev)
437 } else if (error == -EPROBE_DEFER) { 419 } else if (error == -EPROBE_DEFER) {
438 goto err; 420 goto err;
439 } else { 421 } else {
440 dev_err(&pdev->dev, "Failed to get regulator\n"); 422 dev_err(dev, "Failed to get regulator\n");
441 goto err; 423 goto err;
442 } 424 }
443 } 425 }
444 426
427 da8xx_ohci->vbus_gpio = devm_gpiod_get_optional(dev, "vbus",
428 GPIOD_OUT_HIGH);
429 if (IS_ERR(da8xx_ohci->vbus_gpio))
430 goto err;
431
432 da8xx_ohci->oc_gpio = devm_gpiod_get_optional(dev, "oc", GPIOD_IN);
433 if (IS_ERR(da8xx_ohci->oc_gpio))
434 goto err;
435
436 if (da8xx_ohci->oc_gpio) {
437 oc_irq = gpiod_to_irq(da8xx_ohci->oc_gpio);
438 if (oc_irq < 0)
439 goto err;
440
441 error = devm_request_irq(dev, oc_irq, ohci_da8xx_oc_handler,
442 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
443 "OHCI over-current indicator", da8xx_ohci);
444 if (error)
445 goto err;
446 }
447
445 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 448 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
446 hcd->regs = devm_ioremap_resource(&pdev->dev, mem); 449 hcd->regs = devm_ioremap_resource(dev, mem);
447 if (IS_ERR(hcd->regs)) { 450 if (IS_ERR(hcd->regs)) {
448 error = PTR_ERR(hcd->regs); 451 error = PTR_ERR(hcd->regs);
449 goto err; 452 goto err;
@@ -451,13 +454,13 @@ static int ohci_da8xx_probe(struct platform_device *pdev)
451 hcd->rsrc_start = mem->start; 454 hcd->rsrc_start = mem->start;
452 hcd->rsrc_len = resource_size(mem); 455 hcd->rsrc_len = resource_size(mem);
453 456
454 irq = platform_get_irq(pdev, 0); 457 hcd_irq = platform_get_irq(pdev, 0);
455 if (irq < 0) { 458 if (hcd_irq < 0) {
456 error = -ENODEV; 459 error = -ENODEV;
457 goto err; 460 goto err;
458 } 461 }
459 462
460 error = usb_add_hcd(hcd, irq, 0); 463 error = usb_add_hcd(hcd, hcd_irq, 0);
461 if (error) 464 if (error)
462 goto err; 465 goto err;
463 466
@@ -480,7 +483,6 @@ static int ohci_da8xx_remove(struct platform_device *pdev)
480{ 483{
481 struct usb_hcd *hcd = platform_get_drvdata(pdev); 484 struct usb_hcd *hcd = platform_get_drvdata(pdev);
482 485
483 ohci_da8xx_unregister_notify(hcd);
484 usb_remove_hcd(hcd); 486 usb_remove_hcd(hcd);
485 usb_put_hcd(hcd); 487 usb_put_hcd(hcd);
486 488