Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal

Pull thermal soc updates from Eduardo Valentin:
 "Specifics:

   - mediatek thermal now supports MT8183

   - broadcom thermal now supports Stingray

   - qoirq now supports multiple sensors

   - fixes on different drivers: rcar, tsens, tegra

  Some new drivers are still pending further review and I chose to leave
  them for the next merge window while still sending this material"

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal:
  thermal: rcar_gen3_thermal: Register hwmon sysfs interface
  thermal/qcom/tsens-common : fix possible object reference leak
  thermal: tegra: add get_trend ops
  thermal: tegra: fix memory allocation
  thermal: tegra: remove unnecessary warnings
  thermal: mediatek: add support for MT8183
  dt-bindings: thermal: add binding document for mt8183 thermal controller
  thermal: mediatek: add flag for bank selection
  thermal: mediatek: add thermal controller offset
  thermal: mediatek: add calibration item
  thermal: mediatek: add common index of vts settings.
  thermal: mediatek: fix register index error
  thermal: qoriq: add multiple sensors support
  thermal: broadcom: Add Stingray thermal driver
  dt-bindings: thermal: Add binding document for SR thermal

9 files changed, 514 insertions, 130 deletions

diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 58bb7d72dc2b..653aa27a25a4 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -344,7 +344,8 @@ source "drivers/thermal/intel/Kconfig"
 endmenu
 
 menu "Broadcom thermal drivers"
-depends on ARCH_BCM || ARCH_BRCMSTB || ARCH_BCM2835 || COMPILE_TEST
+depends on ARCH_BCM || ARCH_BRCMSTB || ARCH_BCM2835 || ARCH_BCM_IPROC || \
+                COMPILE_TEST
 source "drivers/thermal/broadcom/Kconfig"
 endmenu
 
diff --git a/drivers/thermal/broadcom/Kconfig b/drivers/thermal/broadcom/Kconfig
index c106a15bf7f9..dc9a9bdde3ed 100644
--- a/drivers/thermal/broadcom/Kconfig
+++ b/drivers/thermal/broadcom/Kconfig
@@ -22,3 +22,12 @@ config BCM_NS_THERMAL
           BCM4708, BCM4709, BCM5301x, BCM95852X, etc). It contains DMU (Device
           Management Unit) block with a thermal sensor that allows checking CPU
           temperature.
+
+config BCM_SR_THERMAL
+        tristate "Stingray thermal driver"
+        depends on ARCH_BCM_IPROC || COMPILE_TEST
+        default ARCH_BCM_IPROC
+        help
+          Support for the Stingray family of SoCs. Its different blocks like
+          iHost, CRMU and NITRO has thermal sensor that allows checking its
+          temperature.
diff --git a/drivers/thermal/broadcom/Makefile b/drivers/thermal/broadcom/Makefile
index fae10ecafaef..79df69eb2b8c 100644
--- a/drivers/thermal/broadcom/Makefile
+++ b/drivers/thermal/broadcom/Makefile
@@ -1,3 +1,4 @@
 obj-$(CONFIG_BCM2835_THERMAL)           += bcm2835_thermal.o
 obj-$(CONFIG_BRCMSTB_THERMAL)           += brcmstb_thermal.o
 obj-$(CONFIG_BCM_NS_THERMAL)            += ns-thermal.o
+obj-$(CONFIG_BCM_SR_THERMAL)            += sr-thermal.o
diff --git a/drivers/thermal/broadcom/sr-thermal.c b/drivers/thermal/broadcom/sr-thermal.c
new file mode 100644
index 000000000000..2284cbecedf3
--- /dev/null
+++ b/drivers/thermal/broadcom/sr-thermal.c
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 Broadcom
+ */
+
+#include <linux/acpi.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/thermal.h>
+
+/*
+ * In stingray thermal IO memory,
+ * Total Number of available TMONs MASK is at offset 0
+ * temperature registers BASE is at 4 byte offset.
+ * Each TMON temperature register size is 4.
+ */
+#define SR_TMON_TEMP_BASE(id)   ((id) * 0x4)
+
+#define SR_TMON_MAX_LIST        6
+
+struct sr_tmon {
+        struct thermal_zone_device *tz;
+        unsigned int crit_temp;
+        unsigned int tmon_id;
+        struct sr_thermal *priv;
+};
+
+struct sr_thermal {
+        void __iomem *regs;
+        unsigned int max_crit_temp;
+        struct sr_tmon tmon[SR_TMON_MAX_LIST];
+};
+
+static int sr_get_temp(void *data, int *temp)
+{
+        struct sr_tmon *tmon = data;
+        struct sr_thermal *sr_thermal = tmon->priv;
+
+        *temp = readl(sr_thermal->regs + SR_TMON_TEMP_BASE(tmon->tmon_id));
+
+        return 0;
+}
+
+static const struct thermal_zone_of_device_ops sr_tz_ops = {
+        .get_temp = sr_get_temp,
+};
+
+static int sr_thermal_probe(struct platform_device *pdev)
+{
+        struct device *dev = &pdev->dev;
+        struct sr_thermal *sr_thermal;
+        struct sr_tmon *tmon;
+        struct resource *res;
+        u32 sr_tmon_list = 0;
+        unsigned int i;
+        int ret;
+
+        sr_thermal = devm_kzalloc(dev, sizeof(*sr_thermal), GFP_KERNEL);
+        if (!sr_thermal)
+                return -ENOMEM;
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        sr_thermal->regs = (void __iomem *)devm_memremap(&pdev->dev, res->start,
+                                                         resource_size(res),
+                                                         MEMREMAP_WB);
+        if (IS_ERR(sr_thermal->regs)) {
+                dev_err(dev, "failed to get io address\n");
+                return PTR_ERR(sr_thermal->regs);
+        }
+
+        ret = device_property_read_u32(dev, "brcm,tmon-mask", &sr_tmon_list);
+        if (ret)
+                return ret;
+
+        tmon = sr_thermal->tmon;
+        for (i = 0; i < SR_TMON_MAX_LIST; i++, tmon++) {
+                if (!(sr_tmon_list & BIT(i)))
+                        continue;
+
+                /* Flush temperature registers */
+                writel(0, sr_thermal->regs + SR_TMON_TEMP_BASE(i));
+                tmon->tmon_id = i;
+                tmon->priv = sr_thermal;
+                tmon->tz = devm_thermal_zone_of_sensor_register(dev, i, tmon,
+                                                                &sr_tz_ops);
+                if (IS_ERR(tmon->tz))
+                        return PTR_ERR(tmon->tz);
+
+                dev_dbg(dev, "thermal sensor %d registered\n", i);
+        }
+        platform_set_drvdata(pdev, sr_thermal);
+
+        return 0;
+}
+
+static const struct of_device_id sr_thermal_of_match[] = {
+        { .compatible = "brcm,sr-thermal", },
+        {},
+};
+MODULE_DEVICE_TABLE(of, sr_thermal_of_match);
+
+static const struct acpi_device_id sr_thermal_acpi_ids[] = {
+        { .id = "BRCM0500" },
+        { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(acpi, sr_thermal_acpi_ids);
+
+static struct platform_driver sr_thermal_driver = {
+        .probe          = sr_thermal_probe,
+        .driver = {
+                .name = "sr-thermal",
+                .of_match_table = sr_thermal_of_match,
+                .acpi_match_table = ACPI_PTR(sr_thermal_acpi_ids),
+        },
+};
+module_platform_driver(sr_thermal_driver);
+
+MODULE_AUTHOR("Pramod Kumar <pramod.kumar@broadcom.com>");
+MODULE_DESCRIPTION("Stingray thermal driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c
index 0691f260f6ea..5c07a61447d3 100644
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -71,6 +71,15 @@
 
 #define TEMP_SPARE0             0x0f0
 
+#define TEMP_ADCPNP0_1          0x148
+#define TEMP_ADCPNP1_1          0x14c
+#define TEMP_ADCPNP2_1          0x150
+#define TEMP_MSR0_1             0x190
+#define TEMP_MSR1_1             0x194
+#define TEMP_MSR2_1             0x198
+#define TEMP_ADCPNP3_1          0x1b4
+#define TEMP_MSR3_1             0x1B8
+
 #define PTPCORESEL              0x400
 
 #define TEMP_MONCTL1_PERIOD_UNIT(x)     ((x) & 0x3ff)
@@ -105,24 +114,42 @@
 /* The number of sensing points per bank */
 #define MT8173_NUM_SENSORS_PER_ZONE     4
 
+/* The number of controller in the MT8173 */
+#define MT8173_NUM_CONTROLLER           1
+
+/* The calibration coefficient of sensor  */
+#define MT8173_CALIBRATION      165
+
 /*
  * Layout of the fuses providing the calibration data
- * These macros could be used for MT8173, MT2701, and MT2712.
+ * These macros could be used for MT8183, MT8173, MT2701, and MT2712.
+ * MT8183 has 6 sensors and needs 6 VTS calibration data.
  * MT8173 has 5 sensors and needs 5 VTS calibration data.
  * MT2701 has 3 sensors and needs 3 VTS calibration data.
  * MT2712 has 4 sensors and needs 4 VTS calibration data.
  */
-#define MT8173_CALIB_BUF0_VALID         BIT(0)
-#define MT8173_CALIB_BUF1_ADC_GE(x)     (((x) >> 22) & 0x3ff)
-#define MT8173_CALIB_BUF0_VTS_TS1(x)    (((x) >> 17) & 0x1ff)
-#define MT8173_CALIB_BUF0_VTS_TS2(x)    (((x) >> 8) & 0x1ff)
-#define MT8173_CALIB_BUF1_VTS_TS3(x)    (((x) >> 0) & 0x1ff)
-#define MT8173_CALIB_BUF2_VTS_TS4(x)    (((x) >> 23) & 0x1ff)
-#define MT8173_CALIB_BUF2_VTS_TSABB(x)  (((x) >> 14) & 0x1ff)
-#define MT8173_CALIB_BUF0_DEGC_CALI(x)  (((x) >> 1) & 0x3f)
-#define MT8173_CALIB_BUF0_O_SLOPE(x)    (((x) >> 26) & 0x3f)
-#define MT8173_CALIB_BUF0_O_SLOPE_SIGN(x)       (((x) >> 7) & 0x1)
-#define MT8173_CALIB_BUF1_ID(x) (((x) >> 9) & 0x1)
+#define CALIB_BUF0_VALID                BIT(0)
+#define CALIB_BUF1_ADC_GE(x)            (((x) >> 22) & 0x3ff)
+#define CALIB_BUF0_VTS_TS1(x)           (((x) >> 17) & 0x1ff)
+#define CALIB_BUF0_VTS_TS2(x)           (((x) >> 8) & 0x1ff)
+#define CALIB_BUF1_VTS_TS3(x)           (((x) >> 0) & 0x1ff)
+#define CALIB_BUF2_VTS_TS4(x)           (((x) >> 23) & 0x1ff)
+#define CALIB_BUF2_VTS_TS5(x)           (((x) >> 5) & 0x1ff)
+#define CALIB_BUF2_VTS_TSABB(x)         (((x) >> 14) & 0x1ff)
+#define CALIB_BUF0_DEGC_CALI(x)         (((x) >> 1) & 0x3f)
+#define CALIB_BUF0_O_SLOPE(x)           (((x) >> 26) & 0x3f)
+#define CALIB_BUF0_O_SLOPE_SIGN(x)      (((x) >> 7) & 0x1)
+#define CALIB_BUF1_ID(x)                (((x) >> 9) & 0x1)
+
+enum {
+        VTS1,
+        VTS2,
+        VTS3,
+        VTS4,
+        VTS5,
+        VTSABB,
+        MAX_NUM_VTS,
+};
 
 /* MT2701 thermal sensors */
 #define MT2701_TS1      0
@@ -138,6 +165,12 @@
 /* The number of sensing points per bank */
 #define MT2701_NUM_SENSORS_PER_ZONE     3
 
+/* The number of controller in the MT2701 */
+#define MT2701_NUM_CONTROLLER           1
+
+/* The calibration coefficient of sensor  */
+#define MT2701_CALIBRATION      165
+
 /* MT2712 thermal sensors */
 #define MT2712_TS1      0
 #define MT2712_TS2      1
@@ -153,11 +186,44 @@
 /* The number of sensing points per bank */
 #define MT2712_NUM_SENSORS_PER_ZONE     4
 
+/* The number of controller in the MT2712 */
+#define MT2712_NUM_CONTROLLER           1
+
+/* The calibration coefficient of sensor  */
+#define MT2712_CALIBRATION      165
+
 #define MT7622_TEMP_AUXADC_CHANNEL      11
 #define MT7622_NUM_SENSORS              1
 #define MT7622_NUM_ZONES                1
 #define MT7622_NUM_SENSORS_PER_ZONE     1
 #define MT7622_TS1      0
+#define MT7622_NUM_CONTROLLER           1
+
+/* The calibration coefficient of sensor  */
+#define MT7622_CALIBRATION      165
+
+/* MT8183 thermal sensors */
+#define MT8183_TS1      0
+#define MT8183_TS2      1
+#define MT8183_TS3      2
+#define MT8183_TS4      3
+#define MT8183_TS5      4
+#define MT8183_TSABB    5
+
+/* AUXADC channel  is used for the temperature sensors */
+#define MT8183_TEMP_AUXADC_CHANNEL      11
+
+/* The total number of temperature sensors in the MT8183 */
+#define MT8183_NUM_SENSORS      6
+
+/* The number of sensing points per bank */
+#define MT8183_NUM_SENSORS_PER_ZONE      6
+
+/* The number of controller in the MT8183 */
+#define MT8183_NUM_CONTROLLER           2
+
+/* The calibration coefficient of sensor  */
+#define MT8183_CALIBRATION      153
 
 struct mtk_thermal;
 
@@ -175,9 +241,14 @@ struct mtk_thermal_data {
         s32 num_banks;
         s32 num_sensors;
         s32 auxadc_channel;
+        const int *vts_index;
         const int *sensor_mux_values;
         const int *msr;
         const int *adcpnp;
+        const int cali_val;
+        const int num_controller;
+        const int *controller_offset;
+        bool need_switch_bank;
         struct thermal_bank_cfg bank_data[];
 };
 
@@ -194,12 +265,33 @@ struct mtk_thermal {
         s32 adc_ge;
         s32 degc_cali;
         s32 o_slope;
-        s32 vts[MT8173_NUM_SENSORS];
+        s32 vts[MAX_NUM_VTS];
 
         const struct mtk_thermal_data *conf;
         struct mtk_thermal_bank banks[];
 };
 
+/* MT8183 thermal sensor data */
+static const int mt8183_bank_data[MT8183_NUM_SENSORS] = {
+        MT8183_TS1, MT8183_TS2, MT8183_TS3, MT8183_TS4, MT8183_TS5, MT8183_TSABB
+};
+
+static const int mt8183_msr[MT8183_NUM_SENSORS_PER_ZONE] = {
+        TEMP_MSR0_1, TEMP_MSR1_1, TEMP_MSR2_1, TEMP_MSR1, TEMP_MSR0, TEMP_MSR3_1
+};
+
+static const int mt8183_adcpnp[MT8183_NUM_SENSORS_PER_ZONE] = {
+        TEMP_ADCPNP0_1, TEMP_ADCPNP1_1, TEMP_ADCPNP2_1,
+        TEMP_ADCPNP1, TEMP_ADCPNP0, TEMP_ADCPNP3_1
+};
+
+static const int mt8183_mux_values[MT8183_NUM_SENSORS] = { 0, 1, 2, 3, 4, 0 };
+static const int mt8183_tc_offset[MT8183_NUM_CONTROLLER] = {0x0, 0x100};
+
+static const int mt8183_vts_index[MT8183_NUM_SENSORS] = {
+        VTS1, VTS2, VTS3, VTS4, VTS5, VTSABB
+};
+
 /* MT8173 thermal sensor data */
 static const int mt8173_bank_data[MT8173_NUM_ZONES][3] = {
         { MT8173_TS2, MT8173_TS3 },
@@ -217,6 +309,11 @@ static const int mt8173_adcpnp[MT8173_NUM_SENSORS_PER_ZONE] = {
 };
 
 static const int mt8173_mux_values[MT8173_NUM_SENSORS] = { 0, 1, 2, 3, 16 };
+static const int mt8173_tc_offset[MT8173_NUM_CONTROLLER] = { 0x0, };
+
+static const int mt8173_vts_index[MT8173_NUM_SENSORS] = {
+        VTS1, VTS2, VTS3, VTS4, VTSABB
+};
 
 /* MT2701 thermal sensor data */
 static const int mt2701_bank_data[MT2701_NUM_SENSORS] = {
@@ -232,6 +329,11 @@ static const int mt2701_adcpnp[MT2701_NUM_SENSORS_PER_ZONE] = {
 };
 
 static const int mt2701_mux_values[MT2701_NUM_SENSORS] = { 0, 1, 16 };
+static const int mt2701_tc_offset[MT2701_NUM_CONTROLLER] = { 0x0, };
+
+static const int mt2701_vts_index[MT2701_NUM_SENSORS] = {
+        VTS1, VTS2, VTS3
+};
 
 /* MT2712 thermal sensor data */
 static const int mt2712_bank_data[MT2712_NUM_SENSORS] = {
@@ -247,12 +349,19 @@ static const int mt2712_adcpnp[MT2712_NUM_SENSORS_PER_ZONE] = {
 };
 
 static const int mt2712_mux_values[MT2712_NUM_SENSORS] = { 0, 1, 2, 3 };
+static const int mt2712_tc_offset[MT2712_NUM_CONTROLLER] = { 0x0, };
+
+static const int mt2712_vts_index[MT2712_NUM_SENSORS] = {
+        VTS1, VTS2, VTS3, VTS4
+};
 
 /* MT7622 thermal sensor data */
 static const int mt7622_bank_data[MT7622_NUM_SENSORS] = { MT7622_TS1, };
 static const int mt7622_msr[MT7622_NUM_SENSORS_PER_ZONE] = { TEMP_MSR0, };
 static const int mt7622_adcpnp[MT7622_NUM_SENSORS_PER_ZONE] = { TEMP_ADCPNP0, };
 static const int mt7622_mux_values[MT7622_NUM_SENSORS] = { 0, };
+static const int mt7622_vts_index[MT7622_NUM_SENSORS] = { VTS1 };
+static const int mt7622_tc_offset[MT7622_NUM_CONTROLLER] = { 0x0, };
 
 /**
  * The MT8173 thermal controller has four banks. Each bank can read up to
@@ -271,6 +380,11 @@ static const struct mtk_thermal_data mt8173_thermal_data = {
         .auxadc_channel = MT8173_TEMP_AUXADC_CHANNEL,
         .num_banks = MT8173_NUM_ZONES,
         .num_sensors = MT8173_NUM_SENSORS,
+        .vts_index = mt8173_vts_index,
+        .cali_val = MT8173_CALIBRATION,
+        .num_controller = MT8173_NUM_CONTROLLER,
+        .controller_offset = mt8173_tc_offset,
+        .need_switch_bank = true,
         .bank_data = {
                 {
                         .num_sensors = 2,
@@ -305,6 +419,11 @@ static const struct mtk_thermal_data mt2701_thermal_data = {
         .auxadc_channel = MT2701_TEMP_AUXADC_CHANNEL,
         .num_banks = 1,
         .num_sensors = MT2701_NUM_SENSORS,
+        .vts_index = mt2701_vts_index,
+        .cali_val = MT2701_CALIBRATION,
+        .num_controller = MT2701_NUM_CONTROLLER,
+        .controller_offset = mt2701_tc_offset,
+        .need_switch_bank = true,
         .bank_data = {
                 {
                         .num_sensors = 3,
@@ -330,6 +449,11 @@ static const struct mtk_thermal_data mt2712_thermal_data = {
         .auxadc_channel = MT2712_TEMP_AUXADC_CHANNEL,
         .num_banks = 1,
         .num_sensors = MT2712_NUM_SENSORS,
+        .vts_index = mt2712_vts_index,
+        .cali_val = MT2712_CALIBRATION,
+        .num_controller = MT2712_NUM_CONTROLLER,
+        .controller_offset = mt2712_tc_offset,
+        .need_switch_bank = true,
         .bank_data = {
                 {
                         .num_sensors = 4,
@@ -349,6 +473,11 @@ static const struct mtk_thermal_data mt7622_thermal_data = {
         .auxadc_channel = MT7622_TEMP_AUXADC_CHANNEL,
         .num_banks = MT7622_NUM_ZONES,
         .num_sensors = MT7622_NUM_SENSORS,
+        .vts_index = mt7622_vts_index,
+        .cali_val = MT7622_CALIBRATION,
+        .num_controller = MT7622_NUM_CONTROLLER,
+        .controller_offset = mt7622_tc_offset,
+        .need_switch_bank = true,
         .bank_data = {
                 {
                         .num_sensors = 1,
@@ -361,6 +490,39 @@ static const struct mtk_thermal_data mt7622_thermal_data = {
 };
 
 /**
+ * The MT8183 thermal controller has one bank for the current SW framework.
+ * The MT8183 has a total of 6 temperature sensors.
+ * There are two thermal controller to control the six sensor.
+ * The first one bind 2 sensor, and the other bind 4 sensors.
+ * The thermal core only gets the maximum temperature of all sensor, so
+ * the bank concept wouldn't be necessary here. However, the SVS (Smart
+ * Voltage Scaling) unit makes its decisions based on the same bank
+ * data, and this indeed needs the temperatures of the individual banks
+ * for making better decisions.
+ */
+
+static const struct mtk_thermal_data mt8183_thermal_data = {
+        .auxadc_channel = MT8183_TEMP_AUXADC_CHANNEL,
+        .num_banks = MT8183_NUM_SENSORS_PER_ZONE,
+        .num_sensors = MT8183_NUM_SENSORS,
+        .vts_index = mt8183_vts_index,
+        .cali_val = MT8183_CALIBRATION,
+        .num_controller = MT8183_NUM_CONTROLLER,
+        .controller_offset = mt8183_tc_offset,
+        .need_switch_bank = false,
+        .bank_data = {
+                {
+                        .num_sensors = 6,
+                        .sensors = mt8183_bank_data,
+                },
+        },
+
+        .msr = mt8183_msr,
+        .adcpnp = mt8183_adcpnp,
+        .sensor_mux_values = mt8183_mux_values,
+};
+
+/**
  * raw_to_mcelsius - convert a raw ADC value to mcelsius
  * @mt:         The thermal controller
  * @raw:        raw ADC value
@@ -375,7 +537,7 @@ static int raw_to_mcelsius(struct mtk_thermal *mt, int sensno, s32 raw)
         raw &= 0xfff;
 
         tmp = 203450520 << 3;
-        tmp /= 165 + mt->o_slope;
+        tmp /= mt->conf->cali_val + mt->o_slope;
         tmp /= 10000 + mt->adc_ge;
         tmp *= raw - mt->vts[sensno] - 3350;
         tmp >>= 3;
@@ -395,12 +557,14 @@ static void mtk_thermal_get_bank(struct mtk_thermal_bank *bank)
         struct mtk_thermal *mt = bank->mt;
         u32 val;
 
-        mutex_lock(&mt->lock);
+        if (mt->conf->need_switch_bank) {
+                mutex_lock(&mt->lock);
 
-        val = readl(mt->thermal_base + PTPCORESEL);
-        val &= ~0xf;
-        val |= bank->id;
-        writel(val, mt->thermal_base + PTPCORESEL);
+                val = readl(mt->thermal_base + PTPCORESEL);
+                val &= ~0xf;
+                val |= bank->id;
+                writel(val, mt->thermal_base + PTPCORESEL);
+        }
 }
 
 /**
@@ -413,7 +577,8 @@ static void mtk_thermal_put_bank(struct mtk_thermal_bank *bank)
 {
         struct mtk_thermal *mt = bank->mt;
 
-        mutex_unlock(&mt->lock);
+        if (mt->conf->need_switch_bank)
+                mutex_unlock(&mt->lock);
 }
 
 /**
@@ -431,7 +596,8 @@ static int mtk_thermal_bank_temperature(struct mtk_thermal_bank *bank)
         u32 raw;
 
         for (i = 0; i < conf->bank_data[bank->id].num_sensors; i++) {
-                raw = readl(mt->thermal_base + conf->msr[i]);
+                raw = readl(mt->thermal_base +
+                            conf->msr[conf->bank_data[bank->id].sensors[i]]);
 
                 temp = raw_to_mcelsius(mt,
                                        conf->bank_data[bank->id].sensors[i],
@@ -478,19 +644,23 @@ static const struct thermal_zone_of_device_ops mtk_thermal_ops = {
 };
 
 static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
-                                  u32 apmixed_phys_base, u32 auxadc_phys_base)
+                                  u32 apmixed_phys_base, u32 auxadc_phys_base,
+                                  int ctrl_id)
 {
         struct mtk_thermal_bank *bank = &mt->banks[num];
         const struct mtk_thermal_data *conf = mt->conf;
         int i;
 
+        int offset = mt->conf->controller_offset[ctrl_id];
+        void __iomem *controller_base = mt->thermal_base + offset;
+
         bank->id = num;
         bank->mt = mt;
 
         mtk_thermal_get_bank(bank);
 
         /* bus clock 66M counting unit is 12 * 15.15ns * 256 = 46.540us */
-        writel(TEMP_MONCTL1_PERIOD_UNIT(12), mt->thermal_base + TEMP_MONCTL1);
+        writel(TEMP_MONCTL1_PERIOD_UNIT(12), controller_base + TEMP_MONCTL1);
 
         /*
          * filt interval is 1 * 46.540us = 46.54us,
@@ -498,21 +668,21 @@ static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
          */
         writel(TEMP_MONCTL2_FILTER_INTERVAL(1) |
                         TEMP_MONCTL2_SENSOR_INTERVAL(429),
-                        mt->thermal_base + TEMP_MONCTL2);
+                        controller_base + TEMP_MONCTL2);
 
         /* poll is set to 10u */
         writel(TEMP_AHBPOLL_ADC_POLL_INTERVAL(768),
-               mt->thermal_base + TEMP_AHBPOLL);
+               controller_base + TEMP_AHBPOLL);
 
         /* temperature sampling control, 1 sample */
-        writel(0x0, mt->thermal_base + TEMP_MSRCTL0);
+        writel(0x0, controller_base + TEMP_MSRCTL0);
 
         /* exceed this polling time, IRQ would be inserted */
-        writel(0xffffffff, mt->thermal_base + TEMP_AHBTO);
+        writel(0xffffffff, controller_base + TEMP_AHBTO);
 
         /* number of interrupts per event, 1 is enough */
-        writel(0x0, mt->thermal_base + TEMP_MONIDET0);
-        writel(0x0, mt->thermal_base + TEMP_MONIDET1);
+        writel(0x0, controller_base + TEMP_MONIDET0);
+        writel(0x0, controller_base + TEMP_MONIDET1);
 
         /*
          * The MT8173 thermal controller does not have its own ADC. Instead it
@@ -527,55 +697,56 @@ static void mtk_thermal_init_bank(struct mtk_thermal *mt, int num,
          * this value will be stored to TEMP_PNPMUXADDR (TEMP_SPARE0)
          * automatically by hw
          */
-        writel(BIT(conf->auxadc_channel), mt->thermal_base + TEMP_ADCMUX);
+        writel(BIT(conf->auxadc_channel), controller_base + TEMP_ADCMUX);
 
         /* AHB address for auxadc mux selection */
         writel(auxadc_phys_base + AUXADC_CON1_CLR_V,
-               mt->thermal_base + TEMP_ADCMUXADDR);
+               controller_base + TEMP_ADCMUXADDR);
 
         /* AHB address for pnp sensor mux selection */
         writel(apmixed_phys_base + APMIXED_SYS_TS_CON1,
-               mt->thermal_base + TEMP_PNPMUXADDR);
+               controller_base + TEMP_PNPMUXADDR);
 
         /* AHB value for auxadc enable */
-        writel(BIT(conf->auxadc_channel), mt->thermal_base + TEMP_ADCEN);
+        writel(BIT(conf->auxadc_channel), controller_base + TEMP_ADCEN);
 
         /* AHB address for auxadc enable (channel 0 immediate mode selected) */
         writel(auxadc_phys_base + AUXADC_CON1_SET_V,
-               mt->thermal_base + TEMP_ADCENADDR);
+               controller_base + TEMP_ADCENADDR);
 
         /* AHB address for auxadc valid bit */
         writel(auxadc_phys_base + AUXADC_DATA(conf->auxadc_channel),
-               mt->thermal_base + TEMP_ADCVALIDADDR);
+               controller_base + TEMP_ADCVALIDADDR);
 
         /* AHB address for auxadc voltage output */
         writel(auxadc_phys_base + AUXADC_DATA(conf->auxadc_channel),
-               mt->thermal_base + TEMP_ADCVOLTADDR);
+               controller_base + TEMP_ADCVOLTADDR);
 
         /* read valid & voltage are at the same register */
-        writel(0x0, mt->thermal_base + TEMP_RDCTRL);
+        writel(0x0, controller_base + TEMP_RDCTRL);
 
         /* indicate where the valid bit is */
         writel(TEMP_ADCVALIDMASK_VALID_HIGH | TEMP_ADCVALIDMASK_VALID_POS(12),
-               mt->thermal_base + TEMP_ADCVALIDMASK);
+               controller_base + TEMP_ADCVALIDMASK);
 
         /* no shift */
-        writel(0x0, mt->thermal_base + TEMP_ADCVOLTAGESHIFT);
+        writel(0x0, controller_base + TEMP_ADCVOLTAGESHIFT);
 
         /* enable auxadc mux write transaction */
         writel(TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
-               mt->thermal_base + TEMP_ADCWRITECTRL);
+                controller_base + TEMP_ADCWRITECTRL);
 
         for (i = 0; i < conf->bank_data[num].num_sensors; i++)
                 writel(conf->sensor_mux_values[conf->bank_data[num].sensors[i]],
-                       mt->thermal_base + conf->adcpnp[i]);
+                       mt->thermal_base +
+                       conf->adcpnp[conf->bank_data[num].sensors[i]]);
 
         writel((1 << conf->bank_data[num].num_sensors) - 1,
-               mt->thermal_base + TEMP_MONCTL0);
+               controller_base + TEMP_MONCTL0);
 
         writel(TEMP_ADCWRITECTRL_ADC_PNP_WRITE |
                TEMP_ADCWRITECTRL_ADC_MUX_WRITE,
-               mt->thermal_base + TEMP_ADCWRITECTRL);
+               controller_base + TEMP_ADCWRITECTRL);
 
         mtk_thermal_put_bank(bank);
 }
@@ -627,19 +798,40 @@ static int mtk_thermal_get_calibration_data(struct device *dev,
                 goto out;
         }
 
-        if (buf[0] & MT8173_CALIB_BUF0_VALID) {
-                mt->adc_ge = MT8173_CALIB_BUF1_ADC_GE(buf[1]);
-                mt->vts[MT8173_TS1] = MT8173_CALIB_BUF0_VTS_TS1(buf[0]);
-                mt->vts[MT8173_TS2] = MT8173_CALIB_BUF0_VTS_TS2(buf[0]);
-                mt->vts[MT8173_TS3] = MT8173_CALIB_BUF1_VTS_TS3(buf[1]);
-                mt->vts[MT8173_TS4] = MT8173_CALIB_BUF2_VTS_TS4(buf[2]);
-                mt->vts[MT8173_TSABB] = MT8173_CALIB_BUF2_VTS_TSABB(buf[2]);
-                mt->degc_cali = MT8173_CALIB_BUF0_DEGC_CALI(buf[0]);
-                if (MT8173_CALIB_BUF1_ID(buf[1]) &
-                    MT8173_CALIB_BUF0_O_SLOPE_SIGN(buf[0]))
-                        mt->o_slope = -MT8173_CALIB_BUF0_O_SLOPE(buf[0]);
+        if (buf[0] & CALIB_BUF0_VALID) {
+                mt->adc_ge = CALIB_BUF1_ADC_GE(buf[1]);
+
+                for (i = 0; i < mt->conf->num_sensors; i++) {
+                        switch (mt->conf->vts_index[i]) {
+                        case VTS1:
+                                mt->vts[VTS1] = CALIB_BUF0_VTS_TS1(buf[0]);
+                                break;
+                        case VTS2:
+                                mt->vts[VTS2] = CALIB_BUF0_VTS_TS2(buf[0]);
+                                break;
+                        case VTS3:
+                                mt->vts[VTS3] = CALIB_BUF1_VTS_TS3(buf[1]);
+                                break;
+                        case VTS4:
+                                mt->vts[VTS4] = CALIB_BUF2_VTS_TS4(buf[2]);
+                                break;
+                        case VTS5:
+                                mt->vts[VTS5] = CALIB_BUF2_VTS_TS5(buf[2]);
+                                break;
+                        case VTSABB:
+                                mt->vts[VTSABB] = CALIB_BUF2_VTS_TSABB(buf[2]);
+                                break;
+                        default:
+                                break;
+                        }
+                }
+
+                mt->degc_cali = CALIB_BUF0_DEGC_CALI(buf[0]);
+                if (CALIB_BUF1_ID(buf[1]) &
+                    CALIB_BUF0_O_SLOPE_SIGN(buf[0]))
+                        mt->o_slope = -CALIB_BUF0_O_SLOPE(buf[0]);
                 else
-                        mt->o_slope = MT8173_CALIB_BUF0_O_SLOPE(buf[0]);
+                        mt->o_slope = CALIB_BUF0_O_SLOPE(buf[0]);
         } else {
                 dev_info(dev, "Device not calibrated, using default calibration values\n");
         }
@@ -666,6 +858,10 @@ static const struct of_device_id mtk_thermal_of_match[] = {
         {
                 .compatible = "mediatek,mt7622-thermal",
                 .data = (void *)&mt7622_thermal_data,
+        },
+        {
+                .compatible = "mediatek,mt8183-thermal",
+                .data = (void *)&mt8183_thermal_data,
         }, {
         },
 };
@@ -673,7 +869,7 @@ MODULE_DEVICE_TABLE(of, mtk_thermal_of_match);
 
 static int mtk_thermal_probe(struct platform_device *pdev)
 {
-        int ret, i;
+        int ret, i, ctrl_id;
         struct device_node *auxadc, *apmixedsys, *np = pdev->dev.of_node;
         struct mtk_thermal *mt;
         struct resource *res;
@@ -753,9 +949,10 @@ static int mtk_thermal_probe(struct platform_device *pdev)
                 goto err_disable_clk_auxadc;
         }
 
-        for (i = 0; i < mt->conf->num_banks; i++)
-                mtk_thermal_init_bank(mt, i, apmixed_phys_base,
-                                      auxadc_phys_base);
+        for (ctrl_id = 0; ctrl_id < mt->conf->num_controller ; ctrl_id++)
+                for (i = 0; i < mt->conf->num_banks; i++)
+                        mtk_thermal_init_bank(mt, i, apmixed_phys_base,
+                                              auxadc_phys_base, ctrl_id);
 
         platform_set_drvdata(pdev, mt);
 
@@ -797,6 +994,7 @@ static struct platform_driver mtk_thermal_driver = {
 
 module_platform_driver(mtk_thermal_driver);
 
+MODULE_AUTHOR("Michael Kao <michael.kao@mediatek.com>");
 MODULE_AUTHOR("Louis Yu <louis.yu@mediatek.com>");
 MODULE_AUTHOR("Dawei Chien <dawei.chien@mediatek.com>");
 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c
index 78652cac7f3d..f80c73f11740 100644
--- a/drivers/thermal/qcom/tsens-common.c
+++ b/drivers/thermal/qcom/tsens-common.c
@@ -144,13 +144,17 @@ int __init init_common(struct tsens_device *tmdev)
                 tmdev->tm_offset = 0;
                 res = platform_get_resource(op, IORESOURCE_MEM, 1);
                 srot_base = devm_ioremap_resource(&op->dev, res);
-                if (IS_ERR(srot_base))
-                        return PTR_ERR(srot_base);
+                if (IS_ERR(srot_base)) {
+                        ret = PTR_ERR(srot_base);
+                        goto err_put_device;
+                }
 
                 tmdev->srot_map = devm_regmap_init_mmio(tmdev->dev, srot_base,
                                                         &tsens_srot_config);
-                if (IS_ERR(tmdev->srot_map))
-                        return PTR_ERR(tmdev->srot_map);
+                if (IS_ERR(tmdev->srot_map)) {
+                        ret = PTR_ERR(tmdev->srot_map);
+                        goto err_put_device;
+                }
 
         } else {
                 /* old DTs where SROT and TM were in a contiguous 2K block */
@@ -159,22 +163,31 @@ int __init init_common(struct tsens_device *tmdev)
 
         res = platform_get_resource(op, IORESOURCE_MEM, 0);
         tm_base = devm_ioremap_resource(&op->dev, res);
-        if (IS_ERR(tm_base))
-                return PTR_ERR(tm_base);
+        if (IS_ERR(tm_base)) {
+                ret = PTR_ERR(tm_base);
+                goto err_put_device;
+        }
 
         tmdev->tm_map = devm_regmap_init_mmio(tmdev->dev, tm_base, &tsens_config);
-        if (IS_ERR(tmdev->tm_map))
-                return PTR_ERR(tmdev->tm_map);
+        if (IS_ERR(tmdev->tm_map)) {
+                ret = PTR_ERR(tmdev->tm_map);
+                goto err_put_device;
+        }
 
         if (tmdev->srot_map) {
                 ret = regmap_read(tmdev->srot_map, ctrl_offset, &code);
                 if (ret)
-                        return ret;
+                        goto err_put_device;
                 if (!(code & TSENS_EN)) {
                         dev_err(tmdev->dev, "tsens device is not enabled\n");
-                        return -ENODEV;
+                        ret = -ENODEV;
+                        goto err_put_device;
                 }
         }
 
         return 0;
+
+err_put_device:
+        put_device(&op->dev);
+        return ret;
 }
diff --git a/drivers/thermal/qoriq_thermal.c b/drivers/thermal/qoriq_thermal.c
index 18c711b19514..3b5f5b3fb1bc 100644
--- a/drivers/thermal/qoriq_thermal.c
+++ b/drivers/thermal/qoriq_thermal.c
@@ -59,14 +59,21 @@ struct qoriq_tmu_regs {
         u32 ttr3cr;             /* Temperature Range 3 Control Register */
 };
 
+struct qoriq_tmu_data;
+
 /*
  * Thermal zone data
  */
+struct qoriq_sensor {
+        struct thermal_zone_device      *tzd;
+        struct qoriq_tmu_data           *qdata;
+        int                             id;
+};
+
 struct qoriq_tmu_data {
-        struct thermal_zone_device *tz;
         struct qoriq_tmu_regs __iomem *regs;
-        int sensor_id;
         bool little_endian;
+        struct qoriq_sensor     *sensor[SITES_MAX];
 };
 
 static void tmu_write(struct qoriq_tmu_data *p, u32 val, void __iomem *addr)
@@ -87,48 +94,50 @@ static u32 tmu_read(struct qoriq_tmu_data *p, void __iomem *addr)
 
 static int tmu_get_temp(void *p, int *temp)
 {
+        struct qoriq_sensor *qsensor = p;
+        struct qoriq_tmu_data *qdata = qsensor->qdata;
         u32 val;
-        struct qoriq_tmu_data *data = p;
 
-        val = tmu_read(data, &data->regs->site[data->sensor_id].tritsr);
+        val = tmu_read(qdata, &qdata->regs->site[qsensor->id].tritsr);
         *temp = (val & 0xff) * 1000;
 
         return 0;
 }
 
-static int qoriq_tmu_get_sensor_id(void)
-{
-        int ret, id;
-        struct of_phandle_args sensor_specs;
-        struct device_node *np, *sensor_np;
-
-        np = of_find_node_by_name(NULL, "thermal-zones");
-        if (!np)
-                return -ENODEV;
-
-        sensor_np = of_get_next_child(np, NULL);
-        ret = of_parse_phandle_with_args(sensor_np, "thermal-sensors",
-                        "#thermal-sensor-cells",
-                        0, &sensor_specs);
-        if (ret) {
-                of_node_put(np);
-                of_node_put(sensor_np);
-                return ret;
-        }
+static const struct thermal_zone_of_device_ops tmu_tz_ops = {
+        .get_temp = tmu_get_temp,
+};
 
-        if (sensor_specs.args_count >= 1) {
-                id = sensor_specs.args[0];
-                WARN(sensor_specs.args_count > 1,
-                                "%pOFn: too many cells in sensor specifier %d\n",
-                                sensor_specs.np, sensor_specs.args_count);
-        } else {
-                id = 0;
+static int qoriq_tmu_register_tmu_zone(struct platform_device *pdev)
+{
+        struct qoriq_tmu_data *qdata = platform_get_drvdata(pdev);
+        int id, sites = 0;
+
+        for (id = 0; id < SITES_MAX; id++) {
+                qdata->sensor[id] = devm_kzalloc(&pdev->dev,
+                                sizeof(struct qoriq_sensor), GFP_KERNEL);
+                if (!qdata->sensor[id])
+                        return -ENOMEM;
+
+                qdata->sensor[id]->id = id;
+                qdata->sensor[id]->qdata = qdata;
+                qdata->sensor[id]->tzd = devm_thermal_zone_of_sensor_register(
+                                &pdev->dev, id, qdata->sensor[id], &tmu_tz_ops);
+                if (IS_ERR(qdata->sensor[id]->tzd)) {
+                        if (PTR_ERR(qdata->sensor[id]->tzd) == -ENODEV)
+                                continue;
+                        else
+                                return PTR_ERR(qdata->sensor[id]->tzd);
+                }
+
+                sites |= 0x1 << (15 - id);
         }
 
-        of_node_put(np);
-        of_node_put(sensor_np);
+        /* Enable monitoring */
+        if (sites != 0)
+                tmu_write(qdata, sites | TMR_ME | TMR_ALPF, &qdata->regs->tmr);
 
-        return id;
+        return 0;
 }
 
 static int qoriq_tmu_calibration(struct platform_device *pdev)
@@ -178,16 +187,11 @@ static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
         tmu_write(data, TMR_DISABLE, &data->regs->tmr);
 }
 
-static const struct thermal_zone_of_device_ops tmu_tz_ops = {
-        .get_temp = tmu_get_temp,
-};
-
 static int qoriq_tmu_probe(struct platform_device *pdev)
 {
         int ret;
         struct qoriq_tmu_data *data;
         struct device_node *np = pdev->dev.of_node;
-        u32 site;
 
         if (!np) {
                 dev_err(&pdev->dev, "Device OF-Node is NULL");
@@ -203,13 +207,6 @@ static int qoriq_tmu_probe(struct platform_device *pdev)
 
         data->little_endian = of_property_read_bool(np, "little-endian");
 
-        data->sensor_id = qoriq_tmu_get_sensor_id();
-        if (data->sensor_id < 0) {
-                dev_err(&pdev->dev, "Failed to get sensor id\n");
-                ret = -ENODEV;
-                goto err_iomap;
-        }
-
         data->regs = of_iomap(np, 0);
         if (!data->regs) {
                 dev_err(&pdev->dev, "Failed to get memory region\n");
@@ -223,20 +220,13 @@ static int qoriq_tmu_probe(struct platform_device *pdev)
         if (ret < 0)
                 goto err_tmu;
 
-        data->tz = devm_thermal_zone_of_sensor_register(&pdev->dev,
-                                                        data->sensor_id,
-                                                        data, &tmu_tz_ops);
-        if (IS_ERR(data->tz)) {
-                ret = PTR_ERR(data->tz);
-                dev_err(&pdev->dev,
-                        "Failed to register thermal zone device %d\n", ret);
-                goto err_tmu;
+        ret = qoriq_tmu_register_tmu_zone(pdev);
+        if (ret < 0) {
+                dev_err(&pdev->dev, "Failed to register sensors\n");
+                ret = -ENODEV;
+                goto err_iomap;
         }
 
-        /* Enable monitoring */
-        site = 0x1 << (15 - data->sensor_id);
-        tmu_write(data, site | TMR_ME | TMR_ALPF, &data->regs->tmr);
-
         return 0;
 
 err_tmu:
diff --git a/drivers/thermal/rcar_gen3_thermal.c b/drivers/thermal/rcar_gen3_thermal.c
index 75786cc8e2f9..88fa41cf16e8 100644
--- a/drivers/thermal/rcar_gen3_thermal.c
+++ b/drivers/thermal/rcar_gen3_thermal.c
@@ -19,6 +19,7 @@
 #include <linux/thermal.h>
 
 #include "thermal_core.h"
+#include "thermal_hwmon.h"
 
 /* Register offsets */
 #define REG_GEN3_IRQSTR         0x04
@@ -337,6 +338,13 @@ static int rcar_gen3_thermal_remove(struct platform_device *pdev)
         return 0;
 }
 
+static void rcar_gen3_hwmon_action(void *data)
+{
+        struct thermal_zone_device *zone = data;
+
+        thermal_remove_hwmon_sysfs(zone);
+}
+
 static int rcar_gen3_thermal_probe(struct platform_device *pdev)
 {
         struct rcar_gen3_thermal_priv *priv;
@@ -429,6 +437,17 @@ static int rcar_gen3_thermal_probe(struct platform_device *pdev)
                 if (ret < 0)
                         goto error_unregister;
 
+                tsc->zone->tzp->no_hwmon = false;
+                ret = thermal_add_hwmon_sysfs(tsc->zone);
+                if (ret)
+                        goto error_unregister;
+
+                ret = devm_add_action(dev, rcar_gen3_hwmon_action, zone);
+                if (ret) {
+                        rcar_gen3_hwmon_action(zone);
+                        goto error_unregister;
+                }
+
                 dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
         }
 
diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c
index 45b41b885f49..70043a28eb7a 100644
--- a/drivers/thermal/tegra/soctherm.c
+++ b/drivers/thermal/tegra/soctherm.c
@@ -488,9 +488,41 @@ static int tegra_thermctl_set_trip_temp(void *data, int trip, int temp)
         return 0;
 }
 
+static int tegra_thermctl_get_trend(void *data, int trip,
+                                    enum thermal_trend *trend)
+{
+        struct tegra_thermctl_zone *zone = data;
+        struct thermal_zone_device *tz = zone->tz;
+        int trip_temp, temp, last_temp, ret;
+
+        if (!tz)
+                return -EINVAL;
+
+        ret = tz->ops->get_trip_temp(zone->tz, trip, &trip_temp);
+        if (ret)
+                return ret;
+
+        temp = READ_ONCE(tz->temperature);
+        last_temp = READ_ONCE(tz->last_temperature);
+
+        if (temp > trip_temp) {
+                if (temp >= last_temp)
+                        *trend = THERMAL_TREND_RAISING;
+                else
+                        *trend = THERMAL_TREND_STABLE;
+        } else if (temp < trip_temp) {
+                *trend = THERMAL_TREND_DROPPING;
+        } else {
+                *trend = THERMAL_TREND_STABLE;
+        }
+
+        return 0;
+}
+
 static const struct thermal_zone_of_device_ops tegra_of_thermal_ops = {
         .get_temp = tegra_thermctl_get_temp,
         .set_trip_temp = tegra_thermctl_set_trip_temp,
+        .get_trend = tegra_thermctl_get_trend,
 };
 
 static int get_hot_temp(struct thermal_zone_device *tz, int *trip, int *temp)
@@ -569,7 +601,7 @@ static int tegra_soctherm_set_hwtrips(struct device *dev,
 set_throttle:
         ret = get_hot_temp(tz, &trip, &temperature);
         if (ret) {
-                dev_warn(dev, "throttrip: %s: missing hot temperature\n",
+                dev_info(dev, "throttrip: %s: missing hot temperature\n",
                          sg->name);
                 return 0;
         }
@@ -600,7 +632,7 @@ set_throttle:
         }
 
         if (i == THROTTLE_SIZE)
-                dev_warn(dev, "throttrip: %s: missing throttle cdev\n",
+                dev_info(dev, "throttrip: %s: missing throttle cdev\n",
                          sg->name);
 
         return 0;
@@ -1329,7 +1361,7 @@ static int tegra_soctherm_probe(struct platform_device *pdev)
         }
 
         tegra->thermctl_tzs = devm_kcalloc(&pdev->dev,
-                                           soc->num_ttgs, sizeof(*z),
+                                           soc->num_ttgs, sizeof(z),
                                            GFP_KERNEL);
         if (!tegra->thermctl_tzs)
                 return -ENOMEM;