diff options
author | Lu Baolu <baolu.lu@linux.intel.com> | 2018-07-14 03:46:57 -0400 |
---|---|---|
committer | Joerg Roedel <jroedel@suse.de> | 2018-07-20 08:44:24 -0400 |
commit | 9ddbfb42138d84bb326023616c40a3dc30ea2837 (patch) | |
tree | bd840ece8015c3f3e97182f4bbd2df970d2dc54a /drivers | |
parent | af39507305fb83a5d3c475c2851f4d59545d8a18 (diff) |
iommu/vt-d: Move device_domain_info to header
This allows the per device iommu data and some helpers to be
used in other files.
Cc: Ashok Raj <ashok.raj@intel.com>
Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: Kevin Tian <kevin.tian@intel.com>
Cc: Liu Yi L <yi.l.liu@intel.com>
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: Liu Yi L <yi.l.liu@intel.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/iommu/intel-iommu.c | 63 |
1 files changed, 4 insertions, 59 deletions
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index fa15ed036ddc..bb7f2b2a37ee 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c | |||
@@ -381,61 +381,6 @@ static int hw_pass_through = 1; | |||
381 | for (idx = 0; idx < g_num_of_iommus; idx++) \ | 381 | for (idx = 0; idx < g_num_of_iommus; idx++) \ |
382 | if (domain->iommu_refcnt[idx]) | 382 | if (domain->iommu_refcnt[idx]) |
383 | 383 | ||
384 | struct dmar_domain { | ||
385 | int nid; /* node id */ | ||
386 | |||
387 | unsigned iommu_refcnt[DMAR_UNITS_SUPPORTED]; | ||
388 | /* Refcount of devices per iommu */ | ||
389 | |||
390 | |||
391 | u16 iommu_did[DMAR_UNITS_SUPPORTED]; | ||
392 | /* Domain ids per IOMMU. Use u16 since | ||
393 | * domain ids are 16 bit wide according | ||
394 | * to VT-d spec, section 9.3 */ | ||
395 | |||
396 | bool has_iotlb_device; | ||
397 | struct list_head devices; /* all devices' list */ | ||
398 | struct iova_domain iovad; /* iova's that belong to this domain */ | ||
399 | |||
400 | struct dma_pte *pgd; /* virtual address */ | ||
401 | int gaw; /* max guest address width */ | ||
402 | |||
403 | /* adjusted guest address width, 0 is level 2 30-bit */ | ||
404 | int agaw; | ||
405 | |||
406 | int flags; /* flags to find out type of domain */ | ||
407 | |||
408 | int iommu_coherency;/* indicate coherency of iommu access */ | ||
409 | int iommu_snooping; /* indicate snooping control feature*/ | ||
410 | int iommu_count; /* reference count of iommu */ | ||
411 | int iommu_superpage;/* Level of superpages supported: | ||
412 | 0 == 4KiB (no superpages), 1 == 2MiB, | ||
413 | 2 == 1GiB, 3 == 512GiB, 4 == 1TiB */ | ||
414 | u64 max_addr; /* maximum mapped address */ | ||
415 | |||
416 | struct iommu_domain domain; /* generic domain data structure for | ||
417 | iommu core */ | ||
418 | }; | ||
419 | |||
420 | /* PCI domain-device relationship */ | ||
421 | struct device_domain_info { | ||
422 | struct list_head link; /* link to domain siblings */ | ||
423 | struct list_head global; /* link to global list */ | ||
424 | u8 bus; /* PCI bus number */ | ||
425 | u8 devfn; /* PCI devfn number */ | ||
426 | u16 pfsid; /* SRIOV physical function source ID */ | ||
427 | u8 pasid_supported:3; | ||
428 | u8 pasid_enabled:1; | ||
429 | u8 pri_supported:1; | ||
430 | u8 pri_enabled:1; | ||
431 | u8 ats_supported:1; | ||
432 | u8 ats_enabled:1; | ||
433 | u8 ats_qdep; | ||
434 | struct device *dev; /* it's NULL for PCIe-to-PCI bridge */ | ||
435 | struct intel_iommu *iommu; /* IOMMU used by this device */ | ||
436 | struct dmar_domain *domain; /* pointer to domain */ | ||
437 | }; | ||
438 | |||
439 | struct dmar_rmrr_unit { | 384 | struct dmar_rmrr_unit { |
440 | struct list_head list; /* list of rmrr units */ | 385 | struct list_head list; /* list of rmrr units */ |
441 | struct acpi_dmar_header *hdr; /* ACPI header */ | 386 | struct acpi_dmar_header *hdr; /* ACPI header */ |
@@ -604,7 +549,7 @@ static void set_iommu_domain(struct intel_iommu *iommu, u16 did, | |||
604 | domains[did & 0xff] = domain; | 549 | domains[did & 0xff] = domain; |
605 | } | 550 | } |
606 | 551 | ||
607 | static inline void *alloc_pgtable_page(int node) | 552 | void *alloc_pgtable_page(int node) |
608 | { | 553 | { |
609 | struct page *page; | 554 | struct page *page; |
610 | void *vaddr = NULL; | 555 | void *vaddr = NULL; |
@@ -615,7 +560,7 @@ static inline void *alloc_pgtable_page(int node) | |||
615 | return vaddr; | 560 | return vaddr; |
616 | } | 561 | } |
617 | 562 | ||
618 | static inline void free_pgtable_page(void *vaddr) | 563 | void free_pgtable_page(void *vaddr) |
619 | { | 564 | { |
620 | free_page((unsigned long)vaddr); | 565 | free_page((unsigned long)vaddr); |
621 | } | 566 | } |
@@ -698,7 +643,7 @@ int iommu_calculate_agaw(struct intel_iommu *iommu) | |||
698 | } | 643 | } |
699 | 644 | ||
700 | /* This functionin only returns single iommu in a domain */ | 645 | /* This functionin only returns single iommu in a domain */ |
701 | static struct intel_iommu *domain_get_iommu(struct dmar_domain *domain) | 646 | struct intel_iommu *domain_get_iommu(struct dmar_domain *domain) |
702 | { | 647 | { |
703 | int iommu_id; | 648 | int iommu_id; |
704 | 649 | ||
@@ -3528,7 +3473,7 @@ static unsigned long intel_alloc_iova(struct device *dev, | |||
3528 | return iova_pfn; | 3473 | return iova_pfn; |
3529 | } | 3474 | } |
3530 | 3475 | ||
3531 | static struct dmar_domain *get_valid_domain_for_dev(struct device *dev) | 3476 | struct dmar_domain *get_valid_domain_for_dev(struct device *dev) |
3532 | { | 3477 | { |
3533 | struct dmar_domain *domain, *tmp; | 3478 | struct dmar_domain *domain, *tmp; |
3534 | struct dmar_rmrr_unit *rmrr; | 3479 | struct dmar_rmrr_unit *rmrr; |