drm/msm/adreno: Move clock parsing to adreno_gpu_init()

Move the clock parsing to adreno_gpu_init() to allow for target
specific probing and manipulation of the clock tables.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

3 files changed, 73 insertions, 77 deletions

diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
index fd2145489c5f..62bdb7316da1 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_device.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
@@ -17,7 +17,6 @@
  * this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-#include <linux/pm_opp.h>
 #include "adreno_gpu.h"
 
 #define ANY_ID 0xff
@@ -204,70 +203,6 @@ static int find_chipid(struct device *dev, struct adreno_rev *rev)
         return 0;
 }
 
-/* Get legacy powerlevels from qcom,gpu-pwrlevels and populate the opp table */
-static int adreno_get_legacy_pwrlevels(struct device *dev)
-{
-        struct device_node *child, *node;
-        int ret;
-
-        node = of_find_compatible_node(dev->of_node, NULL,
-                "qcom,gpu-pwrlevels");
-        if (!node) {
-                dev_err(dev, "Could not find the GPU powerlevels\n");
-                return -ENXIO;
-        }
-
-        for_each_child_of_node(node, child) {
-                unsigned int val;
-
-                ret = of_property_read_u32(child, "qcom,gpu-freq", &val);
-                if (ret)
-                        continue;
-
-                /*
-                 * Skip the intentionally bogus clock value found at the bottom
-                 * of most legacy frequency tables
-                 */
-                if (val != 27000000)
-                        dev_pm_opp_add(dev, val, 0);
-        }
-
-        return 0;
-}
-
-static int adreno_get_pwrlevels(struct device *dev,
-                struct adreno_platform_config *config)
-{
-        unsigned long freq = ULONG_MAX;
-        struct dev_pm_opp *opp;
-        int ret;
-
-        /* You down with OPP? */
-        if (!of_find_property(dev->of_node, "operating-points-v2", NULL))
-                ret = adreno_get_legacy_pwrlevels(dev);
-        else
-                ret = dev_pm_opp_of_add_table(dev);
-
-        if (ret)
-                return ret;
-
-        /* Find the fastest defined rate */
-        opp = dev_pm_opp_find_freq_floor(dev, &freq);
-        if (!IS_ERR(opp)) {
-                config->fast_rate = freq;
-                dev_pm_opp_put(opp);
-        }
-
-        if (!config->fast_rate) {
-                DRM_DEV_INFO(dev,
-                        "Could not find clock rate. Using default\n");
-                /* Pick a suitably safe clock speed for any target */
-                config->fast_rate = 200000000;
-        }
-
-        return 0;
-}
-
 static int adreno_bind(struct device *dev, struct device *master, void *data)
 {
         static struct adreno_platform_config config = {};
@@ -280,13 +215,6 @@ static int adreno_bind(struct device *dev, struct device *master, void *data)
         if (ret)
                 return ret;
 
-        /* find clock rates: */
-        config.fast_rate = 0;
-
-        ret = adreno_get_pwrlevels(dev, &config);
-        if (ret)
-                return ret;
-
         dev->platform_data = &config;
         set_gpu_pdev(drm, to_platform_device(dev));
 
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 61e3091fada9..b4bac84b3b4f 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -17,6 +17,7 @@
  * this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
+#include <linux/pm_opp.h>
 #include "adreno_gpu.h"
 #include "msm_gem.h"
 #include "msm_mmu.h"
@@ -465,6 +466,76 @@ void adreno_wait_ring(struct msm_ringbuffer *ring, uint32_t ndwords)
                         ring->id);
 }
 
+/* Get legacy powerlevels from qcom,gpu-pwrlevels and populate the opp table */
+static int adreno_get_legacy_pwrlevels(struct device *dev)
+{
+        struct device_node *child, *node;
+        int ret;
+
+        node = of_find_compatible_node(dev->of_node, NULL,
+                "qcom,gpu-pwrlevels");
+        if (!node) {
+                dev_err(dev, "Could not find the GPU powerlevels\n");
+                return -ENXIO;
+        }
+
+        for_each_child_of_node(node, child) {
+                unsigned int val;
+
+                ret = of_property_read_u32(child, "qcom,gpu-freq", &val);
+                if (ret)
+                        continue;
+
+                /*
+                 * Skip the intentionally bogus clock value found at the bottom
+                 * of most legacy frequency tables
+                 */
+                if (val != 27000000)
+                        dev_pm_opp_add(dev, val, 0);
+        }
+
+        return 0;
+}
+
+static int adreno_get_pwrlevels(struct device *dev,
+                struct msm_gpu *gpu)
+{
+        unsigned long freq = ULONG_MAX;
+        struct dev_pm_opp *opp;
+        int ret;
+
+        gpu->fast_rate = 0;
+
+        /* You down with OPP? */
+        if (!of_find_property(dev->of_node, "operating-points-v2", NULL))
+                ret = adreno_get_legacy_pwrlevels(dev);
+        else {
+                ret = dev_pm_opp_of_add_table(dev);
+                if (ret)
+                        dev_err(dev, "Unable to set the OPP table\n");
+        }
+
+        if (!ret) {
+                /* Find the fastest defined rate */
+                opp = dev_pm_opp_find_freq_floor(dev, &freq);
+                if (!IS_ERR(opp)) {
+                        gpu->fast_rate = freq;
+                        dev_pm_opp_put(opp);
+                }
+        }
+
+        if (!gpu->fast_rate) {
+                dev_warn(dev,
+                        "Could not find a clock rate. Using a reasonable default\n");
+                /* Pick a suitably safe clock speed for any target */
+                gpu->fast_rate = 200000000;
+        }
+
+        DBG("fast_rate=%u, slow_rate=27000000", gpu->fast_rate);
+
+        return 0;
+}
+
 int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
                 struct adreno_gpu *adreno_gpu,
                 const struct adreno_gpu_funcs *funcs, int nr_rings)
@@ -479,10 +550,6 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
         adreno_gpu->revn = adreno_gpu->info->revn;
         adreno_gpu->rev = config->rev;
 
-        gpu->fast_rate = config->fast_rate;
-
-        DBG("fast_rate=%u, slow_rate=27000000", gpu->fast_rate);
-
         adreno_gpu_config.ioname = "kgsl_3d0_reg_memory";
         adreno_gpu_config.irqname = "kgsl_3d0_irq";
 
@@ -491,6 +558,8 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
 
         adreno_gpu_config.nr_rings = nr_rings;
 
+        adreno_get_pwrlevels(&pdev->dev, gpu);
+
         pm_runtime_set_autosuspend_delay(&pdev->dev, DRM_MSM_INACTIVE_PERIOD);
         pm_runtime_use_autosuspend(&pdev->dev);
         pm_runtime_enable(&pdev->dev);
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index 88d1bdfd9aae..8d3d0a924908 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -129,7 +129,6 @@ struct adreno_gpu {
 /* platform config data (ie. from DT, or pdata) */
 struct adreno_platform_config {
         struct adreno_rev rev;
-        uint32_t fast_rate;
 };
 
 #define ADRENO_IDLE_TIMEOUT msecs_to_jiffies(1000)