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authorThomas Gleixner <tglx@linutronix.de>2015-05-18 17:59:13 -0400
committerThomas Gleixner <tglx@linutronix.de>2015-05-18 17:59:33 -0400
commit939ef66848ea2b069d938146332fe07e8b6c84af (patch)
tree8d69247238065db0437970fe512a9ecfec3a5541 /drivers
parent3c646f2c6aa9e918d7fc77867df7f430059f9ccc (diff)
parentb5cc5cbc116975812917db6de023cde928935910 (diff)
Merge branch 'irq/for-arm' into irq/core
Pull in the branch which can be consumed by ARM to build their changes on top.
Diffstat (limited to 'drivers')
-rw-r--r--drivers/irqchip/Kconfig1
-rw-r--r--drivers/irqchip/irq-nvic.c28
-rw-r--r--drivers/irqchip/irq-vf610-mscm-ir.c23
3 files changed, 45 insertions, 7 deletions
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 6de62a96e79c..99b9a9792975 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -30,6 +30,7 @@ config ARM_GIC_V3_ITS
30config ARM_NVIC 30config ARM_NVIC
31 bool 31 bool
32 select IRQ_DOMAIN 32 select IRQ_DOMAIN
33 select IRQ_DOMAIN_HIERARCHY
33 select GENERIC_IRQ_CHIP 34 select GENERIC_IRQ_CHIP
34 35
35config ARM_VIC 36config ARM_VIC
diff --git a/drivers/irqchip/irq-nvic.c b/drivers/irqchip/irq-nvic.c
index 4ff0805fca01..5fac9100f6cb 100644
--- a/drivers/irqchip/irq-nvic.c
+++ b/drivers/irqchip/irq-nvic.c
@@ -49,6 +49,31 @@ nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs)
49 handle_IRQ(irq, regs); 49 handle_IRQ(irq, regs);
50} 50}
51 51
52static int nvic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
53 unsigned int nr_irqs, void *arg)
54{
55 int i, ret;
56 irq_hw_number_t hwirq;
57 unsigned int type = IRQ_TYPE_NONE;
58 struct of_phandle_args *irq_data = arg;
59
60 ret = irq_domain_xlate_onecell(domain, irq_data->np, irq_data->args,
61 irq_data->args_count, &hwirq, &type);
62 if (ret)
63 return ret;
64
65 for (i = 0; i < nr_irqs; i++)
66 irq_map_generic_chip(domain, virq + i, hwirq + i);
67
68 return 0;
69}
70
71static const struct irq_domain_ops nvic_irq_domain_ops = {
72 .xlate = irq_domain_xlate_onecell,
73 .alloc = nvic_irq_domain_alloc,
74 .free = irq_domain_free_irqs_top,
75};
76
52static int __init nvic_of_init(struct device_node *node, 77static int __init nvic_of_init(struct device_node *node,
53 struct device_node *parent) 78 struct device_node *parent)
54{ 79{
@@ -70,7 +95,8 @@ static int __init nvic_of_init(struct device_node *node,
70 irqs = NVIC_MAX_IRQ; 95 irqs = NVIC_MAX_IRQ;
71 96
72 nvic_irq_domain = 97 nvic_irq_domain =
73 irq_domain_add_linear(node, irqs, &irq_generic_chip_ops, NULL); 98 irq_domain_add_linear(node, irqs, &nvic_irq_domain_ops, NULL);
99
74 if (!nvic_irq_domain) { 100 if (!nvic_irq_domain) {
75 pr_warn("Failed to allocate irq domain\n"); 101 pr_warn("Failed to allocate irq domain\n");
76 return -ENOMEM; 102 return -ENOMEM;
diff --git a/drivers/irqchip/irq-vf610-mscm-ir.c b/drivers/irqchip/irq-vf610-mscm-ir.c
index d0f940a3516d..f5c01cbcc73a 100644
--- a/drivers/irqchip/irq-vf610-mscm-ir.c
+++ b/drivers/irqchip/irq-vf610-mscm-ir.c
@@ -47,6 +47,7 @@ struct vf610_mscm_ir_chip_data {
47 void __iomem *mscm_ir_base; 47 void __iomem *mscm_ir_base;
48 u16 cpu_mask; 48 u16 cpu_mask;
49 u16 saved_irsprc[MSCM_IRSPRC_NUM]; 49 u16 saved_irsprc[MSCM_IRSPRC_NUM];
50 bool is_nvic;
50}; 51};
51 52
52static struct vf610_mscm_ir_chip_data *mscm_ir_data; 53static struct vf610_mscm_ir_chip_data *mscm_ir_data;
@@ -101,7 +102,7 @@ static void vf610_mscm_ir_enable(struct irq_data *data)
101 writew_relaxed(chip_data->cpu_mask, 102 writew_relaxed(chip_data->cpu_mask,
102 chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq)); 103 chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq));
103 104
104 irq_chip_unmask_parent(data); 105 irq_chip_enable_parent(data);
105} 106}
106 107
107static void vf610_mscm_ir_disable(struct irq_data *data) 108static void vf610_mscm_ir_disable(struct irq_data *data)
@@ -111,7 +112,7 @@ static void vf610_mscm_ir_disable(struct irq_data *data)
111 112
112 writew_relaxed(0x0, chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq)); 113 writew_relaxed(0x0, chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq));
113 114
114 irq_chip_mask_parent(data); 115 irq_chip_disable_parent(data);
115} 116}
116 117
117static struct irq_chip vf610_mscm_ir_irq_chip = { 118static struct irq_chip vf610_mscm_ir_irq_chip = {
@@ -143,10 +144,17 @@ static int vf610_mscm_ir_domain_alloc(struct irq_domain *domain, unsigned int vi
143 domain->host_data); 144 domain->host_data);
144 145
145 gic_data.np = domain->parent->of_node; 146 gic_data.np = domain->parent->of_node;
146 gic_data.args_count = 3; 147
147 gic_data.args[0] = GIC_SPI; 148 if (mscm_ir_data->is_nvic) {
148 gic_data.args[1] = irq_data->args[0]; 149 gic_data.args_count = 1;
149 gic_data.args[2] = irq_data->args[1]; 150 gic_data.args[0] = irq_data->args[0];
151 } else {
152 gic_data.args_count = 3;
153 gic_data.args[0] = GIC_SPI;
154 gic_data.args[1] = irq_data->args[0];
155 gic_data.args[2] = irq_data->args[1];
156 }
157
150 return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &gic_data); 158 return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &gic_data);
151} 159}
152 160
@@ -198,6 +206,9 @@ static int __init vf610_mscm_ir_of_init(struct device_node *node,
198 goto out_unmap; 206 goto out_unmap;
199 } 207 }
200 208
209 if (of_device_is_compatible(domain->parent->of_node, "arm,armv7m-nvic"))
210 mscm_ir_data->is_nvic = true;
211
201 cpu_pm_register_notifier(&mscm_ir_notifier_block); 212 cpu_pm_register_notifier(&mscm_ir_notifier_block);
202 213
203 return 0; 214 return 0;