drm/amd:Enable/Disable NBPSTATE on On/OFF of UVD

We observe black lines (underflow) on display when playing a
4K video with UVD. On Disabling Low memory P state this issue is
not seen.
In this patch ,disabling low memory P state only when video
size >= 4k.
Multiple runs of power measurement shows no impact

Signed-off-by: suresh guttula <suresh.guttula@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

3 files changed, 17 insertions, 0 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index 7235cd0b0fa9..0de8650c5d6e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -33,6 +33,8 @@
 #include <linux/hwmon.h>
 #include <linux/hwmon-sysfs.h>
 #include <linux/nospec.h>
+#include "hwmgr.h"
+#define WIDTH_4K 3840
 
 static int amdgpu_debugfs_pm_init(struct amdgpu_device *adev);
 
@@ -1956,6 +1958,17 @@ void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable)
                 amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_UVD, !enable);
                 mutex_unlock(&adev->pm.mutex);
         }
+        /* enable/disable Low Memory PState for UVD (4k videos) */
+        if (adev->asic_type == CHIP_STONEY &&
+                adev->uvd.decode_image_width >= WIDTH_4K) {
+                struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle;
+
+                if (hwmgr && hwmgr->hwmgr_func &&
+                    hwmgr->hwmgr_func->update_nbdpm_pstate)
+                        hwmgr->hwmgr_func->update_nbdpm_pstate(hwmgr,
+                                                               !enable,
+                                                               true);
+        }
 }
 
 void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 69896f451e8a..4e5d13e41f6a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -692,6 +692,8 @@ static int amdgpu_uvd_cs_msg_decode(struct amdgpu_device *adev, uint32_t *msg,
         buf_sizes[0x1] = dpb_size;
         buf_sizes[0x2] = image_size;
         buf_sizes[0x4] = min_ctx_size;
+        /* store image width to adjust nb memory pstate */
+        adev->uvd.decode_image_width = width;
         return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
index a3ab1a41060f..5eb63288d157 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
@@ -65,6 +65,8 @@ struct amdgpu_uvd {
         struct drm_sched_entity entity;
         struct delayed_work     idle_work;
         unsigned                harvest_config;
+        /* store image width to adjust nb memory state */
+        unsigned                decode_image_width;
 };
 
 int amdgpu_uvd_sw_init(struct amdgpu_device *adev);