diff options
author | Jeffy Chen <jeffy.chen@rock-chips.com> | 2018-03-02 12:57:56 -0500 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2018-03-08 11:32:53 -0500 |
commit | 8ba905f1ae64928d67e807139610c1c8d68aa075 (patch) | |
tree | d56bfa1c0b5a985fcef3426028efde7cb156078d /drivers | |
parent | 028a9e5c06d82aefbe4c508e045a1ee3be414cc0 (diff) |
drm/rockchip: dw_hdmi: Move HDMI vpll clock enable to bind()
The HDMI vpll clock should be enabled when bind() is called. So move the
clk_prepare_enable of that clock to bind() function and add the missing
clk_disable_unprepare() required in error handling path and unbind().
Fixes: 12b9f204e804 ("drm: bridge/dw_hdmi: add rockchip rk3288 support")
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20180302175757.28192-5-enric.balletbo@collabora.com
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index 3574b0ae2ad1..11309a2a4e43 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | |||
@@ -165,7 +165,6 @@ static const struct dw_hdmi_phy_config rockchip_phy_config[] = { | |||
165 | static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi) | 165 | static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi) |
166 | { | 166 | { |
167 | struct device_node *np = hdmi->dev->of_node; | 167 | struct device_node *np = hdmi->dev->of_node; |
168 | int ret; | ||
169 | 168 | ||
170 | hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); | 169 | hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); |
171 | if (IS_ERR(hdmi->regmap)) { | 170 | if (IS_ERR(hdmi->regmap)) { |
@@ -193,13 +192,6 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi) | |||
193 | return PTR_ERR(hdmi->grf_clk); | 192 | return PTR_ERR(hdmi->grf_clk); |
194 | } | 193 | } |
195 | 194 | ||
196 | ret = clk_prepare_enable(hdmi->vpll_clk); | ||
197 | if (ret) { | ||
198 | DRM_DEV_ERROR(hdmi->dev, | ||
199 | "Failed to enable HDMI vpll: %d\n", ret); | ||
200 | return ret; | ||
201 | } | ||
202 | |||
203 | return 0; | 195 | return 0; |
204 | } | 196 | } |
205 | 197 | ||
@@ -374,6 +366,13 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, | |||
374 | return ret; | 366 | return ret; |
375 | } | 367 | } |
376 | 368 | ||
369 | ret = clk_prepare_enable(hdmi->vpll_clk); | ||
370 | if (ret) { | ||
371 | DRM_DEV_ERROR(hdmi->dev, "Failed to enable HDMI vpll: %d\n", | ||
372 | ret); | ||
373 | return ret; | ||
374 | } | ||
375 | |||
377 | drm_encoder_helper_add(encoder, &dw_hdmi_rockchip_encoder_helper_funcs); | 376 | drm_encoder_helper_add(encoder, &dw_hdmi_rockchip_encoder_helper_funcs); |
378 | drm_encoder_init(drm, encoder, &dw_hdmi_rockchip_encoder_funcs, | 377 | drm_encoder_init(drm, encoder, &dw_hdmi_rockchip_encoder_funcs, |
379 | DRM_MODE_ENCODER_TMDS, NULL); | 378 | DRM_MODE_ENCODER_TMDS, NULL); |
@@ -389,6 +388,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, | |||
389 | if (IS_ERR(hdmi->hdmi)) { | 388 | if (IS_ERR(hdmi->hdmi)) { |
390 | ret = PTR_ERR(hdmi->hdmi); | 389 | ret = PTR_ERR(hdmi->hdmi); |
391 | drm_encoder_cleanup(encoder); | 390 | drm_encoder_cleanup(encoder); |
391 | clk_disable_unprepare(hdmi->vpll_clk); | ||
392 | } | 392 | } |
393 | 393 | ||
394 | return ret; | 394 | return ret; |
@@ -400,6 +400,7 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master, | |||
400 | struct rockchip_hdmi *hdmi = dev_get_drvdata(dev); | 400 | struct rockchip_hdmi *hdmi = dev_get_drvdata(dev); |
401 | 401 | ||
402 | dw_hdmi_unbind(hdmi->hdmi); | 402 | dw_hdmi_unbind(hdmi->hdmi); |
403 | clk_disable_unprepare(hdmi->vpll_clk); | ||
403 | } | 404 | } |
404 | 405 | ||
405 | static const struct component_ops dw_hdmi_rockchip_ops = { | 406 | static const struct component_ops dw_hdmi_rockchip_ops = { |