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authorWeinan Li <weinan.z.li@intel.com>2018-02-13 00:24:32 -0500
committerZhenyu Wang <zhenyuw@linux.intel.com>2018-03-06 00:19:22 -0500
commit64f46f55bb30aebf146ae3cd2c2a4e2a06bcea04 (patch)
tree1201b32a9cbb4e0aabf0cc9b39ac67b730aadee1 /drivers
parentf9a651c05d7ae492185027f6acde25e2bc54edd9 (diff)
drm/i915/gvt: add interface to check if context is inhibit
No functional change, just for easy to use. v4: - refine comment (Kevin) Signed-off-by: Weinan Li <weinan.z.li@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/gvt/mmio_context.c24
-rw-r--r--drivers/gpu/drm/i915/gvt/mmio_context.h2
2 files changed, 16 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c b/drivers/gpu/drm/i915/gvt/mmio_context.c
index ca4ba56fd60c..1bc1b28eb9e1 100644
--- a/drivers/gpu/drm/i915/gvt/mmio_context.c
+++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
@@ -295,6 +295,16 @@ static void switch_mocs(struct intel_vgpu *pre, struct intel_vgpu *next,
295 295
296#define CTX_CONTEXT_CONTROL_VAL 0x03 296#define CTX_CONTEXT_CONTROL_VAL 0x03
297 297
298bool is_inhibit_context(struct i915_gem_context *ctx, int ring_id)
299{
300 u32 *reg_state = ctx->engine[ring_id].lrc_reg_state;
301 u32 inhibit_mask =
302 _MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);
303
304 return inhibit_mask ==
305 (reg_state[CTX_CONTEXT_CONTROL_VAL] & inhibit_mask);
306}
307
298/* Switch ring mmio values (context). */ 308/* Switch ring mmio values (context). */
299static void switch_mmio(struct intel_vgpu *pre, 309static void switch_mmio(struct intel_vgpu *pre,
300 struct intel_vgpu *next, 310 struct intel_vgpu *next,
@@ -302,9 +312,6 @@ static void switch_mmio(struct intel_vgpu *pre,
302{ 312{
303 struct drm_i915_private *dev_priv; 313 struct drm_i915_private *dev_priv;
304 struct intel_vgpu_submission *s; 314 struct intel_vgpu_submission *s;
305 u32 *reg_state, ctx_ctrl;
306 u32 inhibit_mask =
307 _MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);
308 struct engine_mmio *mmio; 315 struct engine_mmio *mmio;
309 u32 old_v, new_v; 316 u32 old_v, new_v;
310 317
@@ -329,16 +336,13 @@ static void switch_mmio(struct intel_vgpu *pre,
329 // restore 336 // restore
330 if (next) { 337 if (next) {
331 s = &next->submission; 338 s = &next->submission;
332 reg_state =
333 s->shadow_ctx->engine[ring_id].lrc_reg_state;
334 ctx_ctrl = reg_state[CTX_CONTEXT_CONTROL_VAL];
335 /* 339 /*
336 * if it is an inhibit context, load in_context mmio 340 * No need to restore the mmio which is in context state
337 * into HW by mmio write. If it is not, skip this mmio 341 * image if it's not inhibit context, it will restore
338 * write. 342 * itself.
339 */ 343 */
340 if (mmio->in_context && 344 if (mmio->in_context &&
341 (ctx_ctrl & inhibit_mask) != inhibit_mask) 345 !is_inhibit_context(s->shadow_ctx, ring_id))
342 continue; 346 continue;
343 347
344 if (mmio->mask) 348 if (mmio->mask)
diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.h b/drivers/gpu/drm/i915/gvt/mmio_context.h
index ca2c6a745673..4df87c7314c9 100644
--- a/drivers/gpu/drm/i915/gvt/mmio_context.h
+++ b/drivers/gpu/drm/i915/gvt/mmio_context.h
@@ -49,4 +49,6 @@ void intel_gvt_switch_mmio(struct intel_vgpu *pre,
49 49
50void intel_gvt_init_engine_mmio_context(struct intel_gvt *gvt); 50void intel_gvt_init_engine_mmio_context(struct intel_gvt *gvt);
51 51
52bool is_inhibit_context(struct i915_gem_context *ctx, int ring_id);
53
52#endif 54#endif