diff options
author | Christian König <christian.koenig@amd.com> | 2017-11-07 06:03:31 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-12-06 12:48:05 -0500 |
commit | 5b565e0e5a9872f8c5a459ce53f8d6a4b19a1a66 (patch) | |
tree | ad326d1021db14885adf202646210ef4a8f30878 /drivers | |
parent | 4b7f0848c4e1e7a92cc3c0243a38a8f183c9b869 (diff) |
drm/amdgpu: expose the VA above the hole to userspace
Let userspace know how much area we have above the 48bit VA hole on
Vega10.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 2614269c4d7f..3222e1d4636c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | |||
@@ -550,6 +550,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file | |||
550 | } | 550 | } |
551 | case AMDGPU_INFO_DEV_INFO: { | 551 | case AMDGPU_INFO_DEV_INFO: { |
552 | struct drm_amdgpu_info_device dev_info = {}; | 552 | struct drm_amdgpu_info_device dev_info = {}; |
553 | uint64_t vm_size; | ||
553 | 554 | ||
554 | dev_info.device_id = dev->pdev->device; | 555 | dev_info.device_id = dev->pdev->device; |
555 | dev_info.chip_rev = adev->rev_id; | 556 | dev_info.chip_rev = adev->rev_id; |
@@ -577,10 +578,17 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file | |||
577 | dev_info.ids_flags |= AMDGPU_IDS_FLAGS_FUSION; | 578 | dev_info.ids_flags |= AMDGPU_IDS_FLAGS_FUSION; |
578 | if (amdgpu_sriov_vf(adev)) | 579 | if (amdgpu_sriov_vf(adev)) |
579 | dev_info.ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION; | 580 | dev_info.ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION; |
581 | |||
582 | vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE; | ||
580 | dev_info.virtual_address_offset = AMDGPU_VA_RESERVED_SIZE; | 583 | dev_info.virtual_address_offset = AMDGPU_VA_RESERVED_SIZE; |
581 | dev_info.virtual_address_max = | 584 | dev_info.virtual_address_max = |
582 | min(adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE, | 585 | min(vm_size, AMDGPU_VA_HOLE_START); |
583 | AMDGPU_VA_HOLE_START); | 586 | |
587 | vm_size -= AMDGPU_VA_RESERVED_SIZE; | ||
588 | if (vm_size > AMDGPU_VA_HOLE_START) { | ||
589 | dev_info.high_va_offset = AMDGPU_VA_HOLE_END; | ||
590 | dev_info.high_va_max = AMDGPU_VA_HOLE_END | vm_size; | ||
591 | } | ||
584 | dev_info.virtual_address_alignment = max((int)PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE); | 592 | dev_info.virtual_address_alignment = max((int)PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE); |
585 | dev_info.pte_fragment_size = (1 << adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE; | 593 | dev_info.pte_fragment_size = (1 << adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE; |
586 | dev_info.gart_page_size = AMDGPU_GPU_PAGE_SIZE; | 594 | dev_info.gart_page_size = AMDGPU_GPU_PAGE_SIZE; |