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authorLinus Torvalds <torvalds@linux-foundation.org>2017-02-22 15:17:25 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2017-02-22 15:17:25 -0500
commit37c85961c3f87f2141c84e53df31e59db072fd2e (patch)
treeff020df86c8c893e4524dda9205254be202560cc /drivers
parentcaa59428971d5ad81d19512365c9ba580d83268c (diff)
parentd8a4995bcea168dfac8ee41c28c79109907e4fba (diff)
Merge tag 'tty-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull tty/serial driver updates from Greg KH: "Here is the big tty/serial driver patchset for 4.11-rc1. Not much here, but a lot of little fixes and individual serial driver updates all over the subsystem. Majority are for the sh-sci driver and platform (the arch-specific changes have acks from the maintainer). The start of the "serial bus" code is here as well, but nothing is converted to use it yet. That work is still ongoing, hopefully will start to show up across different subsystems for 4.12 (bluetooth is one major place that will be used.) All of these have been in linux-next for a while with no reported issues" * tag 'tty-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (109 commits) tty: pl011: Work around QDF2400 E44 stuck BUSY bit atmel_serial: Use the fractional divider when possible tty: Remove extra include in HVC console tty framework serial: exar: Enable MSI support serial: exar: Move register defines from uapi header to consumer site serial: pci: Remove unused pci_boards entries serial: exar: Move Commtech adapters to 8250_exar as well serial: exar: Fix feature control register constants serial: exar: Fix initialization of EXAR registers for ports > 0 serial: exar: Fix mapping of port I/O resources serial: sh-sci: fix hardware RX trigger level setting tty/serial: atmel: ensure state is restored after suspending serial: 8250_dw: Avoid "too much work" from bogus rx timeout interrupt serdev: ttyport: check whether tty_init_dev() fails serial: 8250_pci: make pciserial_detach_ports() static ARM: dts: STiH410-b2260: Enable HW flow-control ARM: dts: STiH407-family: Use new Pinctrl groups ARM: dts: STiH407-pinctrl: Add Pinctrl group for HW flow-control ARM: dts: STiH410-b2260: Identify the UART RTS line dt-bindings: serial: Update 'uart-has-rtscts' description ...
Diffstat (limited to 'drivers')
-rw-r--r--drivers/acpi/spcr.c23
-rw-r--r--drivers/char/Kconfig1
-rw-r--r--drivers/dma/hsu/pci.c17
-rw-r--r--drivers/tty/Makefile1
-rw-r--r--drivers/tty/goldfish.c2
-rw-r--r--drivers/tty/hvc/hvc_console.c1
-rw-r--r--drivers/tty/serdev/Kconfig16
-rw-r--r--drivers/tty/serdev/Makefile5
-rw-r--r--drivers/tty/serdev/core.c421
-rw-r--r--drivers/tty/serdev/serdev-ttyport.c226
-rw-r--r--drivers/tty/serial/8250/8250_dw.c28
-rw-r--r--drivers/tty/serial/8250/8250_exar.c487
-rw-r--r--drivers/tty/serial/8250/8250_gsc.c4
-rw-r--r--drivers/tty/serial/8250/8250_hp300.c2
-rw-r--r--drivers/tty/serial/8250/8250_lpss.c4
-rw-r--r--drivers/tty/serial/8250/8250_mid.c45
-rw-r--r--drivers/tty/serial/8250/8250_moxa.c1
-rw-r--r--drivers/tty/serial/8250/8250_of.c94
-rw-r--r--drivers/tty/serial/8250/8250_omap.c33
-rw-r--r--drivers/tty/serial/8250/8250_pci.c515
-rw-r--r--drivers/tty/serial/8250/8250_port.c32
-rw-r--r--drivers/tty/serial/8250/Kconfig11
-rw-r--r--drivers/tty/serial/8250/Makefile1
-rw-r--r--drivers/tty/serial/Kconfig1
-rw-r--r--drivers/tty/serial/amba-pl010.c2
-rw-r--r--drivers/tty/serial/amba-pl011.c70
-rw-r--r--drivers/tty/serial/ar933x_uart.c2
-rw-r--r--drivers/tty/serial/atmel_serial.c51
-rw-r--r--drivers/tty/serial/bfin_sport_uart.c2
-rw-r--r--drivers/tty/serial/cpm_uart/cpm_uart_core.c18
-rw-r--r--drivers/tty/serial/dz.c2
-rw-r--r--drivers/tty/serial/efm32-uart.c2
-rw-r--r--drivers/tty/serial/fsl_lpuart.c35
-rw-r--r--drivers/tty/serial/icom.c2
-rw-r--r--drivers/tty/serial/imx.c32
-rw-r--r--drivers/tty/serial/ioc3_serial.c2
-rw-r--r--drivers/tty/serial/ioc4_serial.c2
-rw-r--r--drivers/tty/serial/ip22zilog.c2
-rw-r--r--drivers/tty/serial/lantiq.c42
-rw-r--r--drivers/tty/serial/lpc32xx_hs.c2
-rw-r--r--drivers/tty/serial/max310x.c2
-rw-r--r--drivers/tty/serial/meson_uart.c2
-rw-r--r--drivers/tty/serial/mpsc.c2
-rw-r--r--drivers/tty/serial/msm_serial.c1
-rw-r--r--drivers/tty/serial/mxs-auart.c3
-rw-r--r--drivers/tty/serial/omap-serial.c57
-rw-r--r--drivers/tty/serial/pic32_uart.c6
-rw-r--r--drivers/tty/serial/pmac_zilog.c2
-rw-r--r--drivers/tty/serial/pnx8xxx_uart.c2
-rw-r--r--drivers/tty/serial/pxa.c2
-rw-r--r--drivers/tty/serial/samsung.c20
-rw-r--r--drivers/tty/serial/samsung.h4
-rw-r--r--drivers/tty/serial/serial-tegra.c2
-rw-r--r--drivers/tty/serial/serial_txx9.c2
-rw-r--r--drivers/tty/serial/sh-sci.c1092
-rw-r--r--drivers/tty/serial/sh-sci.h12
-rw-r--r--drivers/tty/serial/sirfsoc_uart.c2
-rw-r--r--drivers/tty/serial/sn_console.c2
-rw-r--r--drivers/tty/serial/sprd_serial.c2
-rw-r--r--drivers/tty/serial/st-asc.c101
-rw-r--r--drivers/tty/serial/sunhv.c2
-rw-r--r--drivers/tty/serial/sunzilog.c2
-rw-r--r--drivers/tty/serial/vr41xx_siu.c2
-rw-r--r--drivers/tty/serial/vt8500_serial.c2
-rw-r--r--drivers/tty/serial/xilinx_uartps.c9
-rw-r--r--drivers/tty/serial/zs.c2
-rw-r--r--drivers/tty/tty_buffer.c19
-rw-r--r--drivers/tty/tty_io.c52
-rw-r--r--drivers/tty/tty_port.c65
-rw-r--r--drivers/tty/vt/vt.c9
-rw-r--r--drivers/video/console/Kconfig27
-rw-r--r--drivers/video/console/vgacon.c164
72 files changed, 2583 insertions, 1329 deletions
diff --git a/drivers/acpi/spcr.c b/drivers/acpi/spcr.c
index b8019c4c1d38..2b5d0fac81f0 100644
--- a/drivers/acpi/spcr.c
+++ b/drivers/acpi/spcr.c
@@ -16,6 +16,26 @@
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/serial_core.h> 17#include <linux/serial_core.h>
18 18
19/*
20 * Some Qualcomm Datacenter Technologies SoCs have a defective UART BUSY bit.
21 * Detect them by examining the OEM fields in the SPCR header, similiar to PCI
22 * quirk detection in pci_mcfg.c.
23 */
24static bool qdf2400_erratum_44_present(struct acpi_table_header *h)
25{
26 if (memcmp(h->oem_id, "QCOM ", ACPI_OEM_ID_SIZE))
27 return false;
28
29 if (!memcmp(h->oem_table_id, "QDF2432 ", ACPI_OEM_TABLE_ID_SIZE))
30 return true;
31
32 if (!memcmp(h->oem_table_id, "QDF2400 ", ACPI_OEM_TABLE_ID_SIZE) &&
33 h->oem_revision == 0)
34 return true;
35
36 return false;
37}
38
19/** 39/**
20 * parse_spcr() - parse ACPI SPCR table and add preferred console 40 * parse_spcr() - parse ACPI SPCR table and add preferred console
21 * 41 *
@@ -93,6 +113,9 @@ int __init parse_spcr(bool earlycon)
93 goto done; 113 goto done;
94 } 114 }
95 115
116 if (qdf2400_erratum_44_present(&table->header))
117 uart = "qdf2400_e44";
118
96 snprintf(opts, sizeof(opts), "%s,%s,0x%llx,%d", uart, iotype, 119 snprintf(opts, sizeof(opts), "%s,%s,0x%llx,%d", uart, iotype,
97 table->serial_port.address, baud_rate); 120 table->serial_port.address, baud_rate);
98 121
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index 4ee2a10207d0..31adbebf812e 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -46,6 +46,7 @@ config SGI_MBCS
46 say Y or M here, otherwise say N. 46 say Y or M here, otherwise say N.
47 47
48source "drivers/tty/serial/Kconfig" 48source "drivers/tty/serial/Kconfig"
49source "drivers/tty/serdev/Kconfig"
49 50
50config TTY_PRINTK 51config TTY_PRINTK
51 tristate "TTY driver to output user messages via printk" 52 tristate "TTY driver to output user messages via printk"
diff --git a/drivers/dma/hsu/pci.c b/drivers/dma/hsu/pci.c
index 4875fa428e81..ad45cd344bba 100644
--- a/drivers/dma/hsu/pci.c
+++ b/drivers/dma/hsu/pci.c
@@ -23,15 +23,28 @@
23 23
24#define HSU_PCI_CHAN_OFFSET 0x100 24#define HSU_PCI_CHAN_OFFSET 0x100
25 25
26#define PCI_DEVICE_ID_INTEL_MFLD_HSU_DMA 0x081e
27#define PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA 0x1192
28
26static irqreturn_t hsu_pci_irq(int irq, void *dev) 29static irqreturn_t hsu_pci_irq(int irq, void *dev)
27{ 30{
28 struct hsu_dma_chip *chip = dev; 31 struct hsu_dma_chip *chip = dev;
32 struct pci_dev *pdev = to_pci_dev(chip->dev);
29 u32 dmaisr; 33 u32 dmaisr;
30 u32 status; 34 u32 status;
31 unsigned short i; 35 unsigned short i;
32 int ret = 0; 36 int ret = 0;
33 int err; 37 int err;
34 38
39 /*
40 * On Intel Tangier B0 and Anniedale the interrupt line, disregarding
41 * to have different numbers, is shared between HSU DMA and UART IPs.
42 * Thus on such SoCs we are expecting that IRQ handler is called in
43 * UART driver only.
44 */
45 if (pdev->device == PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA)
46 return IRQ_HANDLED;
47
35 dmaisr = readl(chip->regs + HSU_PCI_DMAISR); 48 dmaisr = readl(chip->regs + HSU_PCI_DMAISR);
36 for (i = 0; i < chip->hsu->nr_channels; i++) { 49 for (i = 0; i < chip->hsu->nr_channels; i++) {
37 if (dmaisr & 0x1) { 50 if (dmaisr & 0x1) {
@@ -113,8 +126,8 @@ static void hsu_pci_remove(struct pci_dev *pdev)
113} 126}
114 127
115static const struct pci_device_id hsu_pci_id_table[] = { 128static const struct pci_device_id hsu_pci_id_table[] = {
116 { PCI_VDEVICE(INTEL, 0x081e), 0 }, 129 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MFLD_HSU_DMA), 0 },
117 { PCI_VDEVICE(INTEL, 0x1192), 0 }, 130 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA), 0 },
118 { } 131 { }
119}; 132};
120MODULE_DEVICE_TABLE(pci, hsu_pci_id_table); 133MODULE_DEVICE_TABLE(pci, hsu_pci_id_table);
diff --git a/drivers/tty/Makefile b/drivers/tty/Makefile
index 5817e2397463..b95bed92da9f 100644
--- a/drivers/tty/Makefile
+++ b/drivers/tty/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_R3964) += n_r3964.o
13obj-y += vt/ 13obj-y += vt/
14obj-$(CONFIG_HVC_DRIVER) += hvc/ 14obj-$(CONFIG_HVC_DRIVER) += hvc/
15obj-y += serial/ 15obj-y += serial/
16obj-$(CONFIG_SERIAL_DEV_BUS) += serdev/
16 17
17# tty drivers 18# tty drivers
18obj-$(CONFIG_AMIGA_BUILTIN_SERIAL) += amiserial.o 19obj-$(CONFIG_AMIGA_BUILTIN_SERIAL) += amiserial.o
diff --git a/drivers/tty/goldfish.c b/drivers/tty/goldfish.c
index 3fc912373adf..996bd473dd03 100644
--- a/drivers/tty/goldfish.c
+++ b/drivers/tty/goldfish.c
@@ -300,7 +300,7 @@ static int goldfish_tty_probe(struct platform_device *pdev)
300 return 0; 300 return 0;
301 301
302err_tty_register_device_failed: 302err_tty_register_device_failed:
303 free_irq(irq, pdev); 303 free_irq(irq, qtty);
304err_request_irq_failed: 304err_request_irq_failed:
305 goldfish_tty_current_line_count--; 305 goldfish_tty_current_line_count--;
306 if (goldfish_tty_current_line_count == 0) 306 if (goldfish_tty_current_line_count == 0)
diff --git a/drivers/tty/hvc/hvc_console.c b/drivers/tty/hvc/hvc_console.c
index 9b5c0fb216b5..b19ae36a05ec 100644
--- a/drivers/tty/hvc/hvc_console.c
+++ b/drivers/tty/hvc/hvc_console.c
@@ -29,7 +29,6 @@
29#include <linux/kernel.h> 29#include <linux/kernel.h>
30#include <linux/kthread.h> 30#include <linux/kthread.h>
31#include <linux/list.h> 31#include <linux/list.h>
32#include <linux/init.h>
33#include <linux/major.h> 32#include <linux/major.h>
34#include <linux/atomic.h> 33#include <linux/atomic.h>
35#include <linux/sysrq.h> 34#include <linux/sysrq.h>
diff --git a/drivers/tty/serdev/Kconfig b/drivers/tty/serdev/Kconfig
new file mode 100644
index 000000000000..cdc6b820cf93
--- /dev/null
+++ b/drivers/tty/serdev/Kconfig
@@ -0,0 +1,16 @@
1#
2# Serial bus device driver configuration
3#
4menuconfig SERIAL_DEV_BUS
5 tristate "Serial device bus"
6 help
7 Core support for devices connected via a serial port.
8
9if SERIAL_DEV_BUS
10
11config SERIAL_DEV_CTRL_TTYPORT
12 bool "Serial device TTY port controller"
13 depends on TTY
14 depends on SERIAL_DEV_BUS != m
15
16endif
diff --git a/drivers/tty/serdev/Makefile b/drivers/tty/serdev/Makefile
new file mode 100644
index 000000000000..0cbdb9444d9d
--- /dev/null
+++ b/drivers/tty/serdev/Makefile
@@ -0,0 +1,5 @@
1serdev-objs := core.o
2
3obj-$(CONFIG_SERIAL_DEV_BUS) += serdev.o
4
5obj-$(CONFIG_SERIAL_DEV_CTRL_TTYPORT) += serdev-ttyport.o
diff --git a/drivers/tty/serdev/core.c b/drivers/tty/serdev/core.c
new file mode 100644
index 000000000000..f4c6c90add78
--- /dev/null
+++ b/drivers/tty/serdev/core.c
@@ -0,0 +1,421 @@
1/*
2 * Copyright (C) 2016-2017 Linaro Ltd., Rob Herring <robh@kernel.org>
3 *
4 * Based on drivers/spmi/spmi.c:
5 * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 and
9 * only version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <linux/errno.h>
18#include <linux/idr.h>
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/of.h>
22#include <linux/of_device.h>
23#include <linux/serdev.h>
24#include <linux/slab.h>
25
26static bool is_registered;
27static DEFINE_IDA(ctrl_ida);
28
29static void serdev_device_release(struct device *dev)
30{
31 struct serdev_device *serdev = to_serdev_device(dev);
32 kfree(serdev);
33}
34
35static const struct device_type serdev_device_type = {
36 .release = serdev_device_release,
37};
38
39static void serdev_ctrl_release(struct device *dev)
40{
41 struct serdev_controller *ctrl = to_serdev_controller(dev);
42 ida_simple_remove(&ctrl_ida, ctrl->nr);
43 kfree(ctrl);
44}
45
46static const struct device_type serdev_ctrl_type = {
47 .release = serdev_ctrl_release,
48};
49
50static int serdev_device_match(struct device *dev, struct device_driver *drv)
51{
52 /* TODO: ACPI and platform matching */
53 return of_driver_match_device(dev, drv);
54}
55
56static int serdev_uevent(struct device *dev, struct kobj_uevent_env *env)
57{
58 /* TODO: ACPI and platform modalias */
59 return of_device_uevent_modalias(dev, env);
60}
61
62/**
63 * serdev_device_add() - add a device previously constructed via serdev_device_alloc()
64 * @serdev: serdev_device to be added
65 */
66int serdev_device_add(struct serdev_device *serdev)
67{
68 struct device *parent = serdev->dev.parent;
69 int err;
70
71 dev_set_name(&serdev->dev, "%s-%d", dev_name(parent), serdev->nr);
72
73 err = device_add(&serdev->dev);
74 if (err < 0) {
75 dev_err(&serdev->dev, "Can't add %s, status %d\n",
76 dev_name(&serdev->dev), err);
77 goto err_device_add;
78 }
79
80 dev_dbg(&serdev->dev, "device %s registered\n", dev_name(&serdev->dev));
81
82err_device_add:
83 return err;
84}
85EXPORT_SYMBOL_GPL(serdev_device_add);
86
87/**
88 * serdev_device_remove(): remove an serdev device
89 * @serdev: serdev_device to be removed
90 */
91void serdev_device_remove(struct serdev_device *serdev)
92{
93 device_unregister(&serdev->dev);
94}
95EXPORT_SYMBOL_GPL(serdev_device_remove);
96
97int serdev_device_open(struct serdev_device *serdev)
98{
99 struct serdev_controller *ctrl = serdev->ctrl;
100
101 if (!ctrl || !ctrl->ops->open)
102 return -EINVAL;
103
104 return ctrl->ops->open(ctrl);
105}
106EXPORT_SYMBOL_GPL(serdev_device_open);
107
108void serdev_device_close(struct serdev_device *serdev)
109{
110 struct serdev_controller *ctrl = serdev->ctrl;
111
112 if (!ctrl || !ctrl->ops->close)
113 return;
114
115 ctrl->ops->close(ctrl);
116}
117EXPORT_SYMBOL_GPL(serdev_device_close);
118
119int serdev_device_write_buf(struct serdev_device *serdev,
120 const unsigned char *buf, size_t count)
121{
122 struct serdev_controller *ctrl = serdev->ctrl;
123
124 if (!ctrl || !ctrl->ops->write_buf)
125 return -EINVAL;
126
127 return ctrl->ops->write_buf(ctrl, buf, count);
128}
129EXPORT_SYMBOL_GPL(serdev_device_write_buf);
130
131void serdev_device_write_flush(struct serdev_device *serdev)
132{
133 struct serdev_controller *ctrl = serdev->ctrl;
134
135 if (!ctrl || !ctrl->ops->write_flush)
136 return;
137
138 ctrl->ops->write_flush(ctrl);
139}
140EXPORT_SYMBOL_GPL(serdev_device_write_flush);
141
142int serdev_device_write_room(struct serdev_device *serdev)
143{
144 struct serdev_controller *ctrl = serdev->ctrl;
145
146 if (!ctrl || !ctrl->ops->write_room)
147 return 0;
148
149 return serdev->ctrl->ops->write_room(ctrl);
150}
151EXPORT_SYMBOL_GPL(serdev_device_write_room);
152
153unsigned int serdev_device_set_baudrate(struct serdev_device *serdev, unsigned int speed)
154{
155 struct serdev_controller *ctrl = serdev->ctrl;
156
157 if (!ctrl || !ctrl->ops->set_baudrate)
158 return 0;
159
160 return ctrl->ops->set_baudrate(ctrl, speed);
161
162}
163EXPORT_SYMBOL_GPL(serdev_device_set_baudrate);
164
165void serdev_device_set_flow_control(struct serdev_device *serdev, bool enable)
166{
167 struct serdev_controller *ctrl = serdev->ctrl;
168
169 if (!ctrl || !ctrl->ops->set_flow_control)
170 return;
171
172 ctrl->ops->set_flow_control(ctrl, enable);
173}
174EXPORT_SYMBOL_GPL(serdev_device_set_flow_control);
175
176static int serdev_drv_probe(struct device *dev)
177{
178 const struct serdev_device_driver *sdrv = to_serdev_device_driver(dev->driver);
179
180 return sdrv->probe(to_serdev_device(dev));
181}
182
183static int serdev_drv_remove(struct device *dev)
184{
185 const struct serdev_device_driver *sdrv = to_serdev_device_driver(dev->driver);
186
187 sdrv->remove(to_serdev_device(dev));
188 return 0;
189}
190
191static ssize_t modalias_show(struct device *dev,
192 struct device_attribute *attr, char *buf)
193{
194 ssize_t len = of_device_get_modalias(dev, buf, PAGE_SIZE - 2);
195 buf[len] = '\n';
196 buf[len+1] = 0;
197 return len+1;
198}
199
200static struct device_attribute serdev_device_attrs[] = {
201 __ATTR_RO(modalias),
202 __ATTR_NULL
203};
204
205static struct bus_type serdev_bus_type = {
206 .name = "serial",
207 .match = serdev_device_match,
208 .probe = serdev_drv_probe,
209 .remove = serdev_drv_remove,
210 .uevent = serdev_uevent,
211 .dev_attrs = serdev_device_attrs,
212};
213
214/**
215 * serdev_controller_alloc() - Allocate a new serdev device
216 * @ctrl: associated controller
217 *
218 * Caller is responsible for either calling serdev_device_add() to add the
219 * newly allocated controller, or calling serdev_device_put() to discard it.
220 */
221struct serdev_device *serdev_device_alloc(struct serdev_controller *ctrl)
222{
223 struct serdev_device *serdev;
224
225 serdev = kzalloc(sizeof(*serdev), GFP_KERNEL);
226 if (!serdev)
227 return NULL;
228
229 serdev->ctrl = ctrl;
230 ctrl->serdev = serdev;
231 device_initialize(&serdev->dev);
232 serdev->dev.parent = &ctrl->dev;
233 serdev->dev.bus = &serdev_bus_type;
234 serdev->dev.type = &serdev_device_type;
235 return serdev;
236}
237EXPORT_SYMBOL_GPL(serdev_device_alloc);
238
239/**
240 * serdev_controller_alloc() - Allocate a new serdev controller
241 * @parent: parent device
242 * @size: size of private data
243 *
244 * Caller is responsible for either calling serdev_controller_add() to add the
245 * newly allocated controller, or calling serdev_controller_put() to discard it.
246 * The allocated private data region may be accessed via
247 * serdev_controller_get_drvdata()
248 */
249struct serdev_controller *serdev_controller_alloc(struct device *parent,
250 size_t size)
251{
252 struct serdev_controller *ctrl;
253 int id;
254
255 if (WARN_ON(!parent))
256 return NULL;
257
258 ctrl = kzalloc(sizeof(*ctrl) + size, GFP_KERNEL);
259 if (!ctrl)
260 return NULL;
261
262 device_initialize(&ctrl->dev);
263 ctrl->dev.type = &serdev_ctrl_type;
264 ctrl->dev.bus = &serdev_bus_type;
265 ctrl->dev.parent = parent;
266 ctrl->dev.of_node = parent->of_node;
267 serdev_controller_set_drvdata(ctrl, &ctrl[1]);
268
269 id = ida_simple_get(&ctrl_ida, 0, 0, GFP_KERNEL);
270 if (id < 0) {
271 dev_err(parent,
272 "unable to allocate serdev controller identifier.\n");
273 serdev_controller_put(ctrl);
274 return NULL;
275 }
276
277 ctrl->nr = id;
278 dev_set_name(&ctrl->dev, "serial%d", id);
279
280 dev_dbg(&ctrl->dev, "allocated controller 0x%p id %d\n", ctrl, id);
281 return ctrl;
282}
283EXPORT_SYMBOL_GPL(serdev_controller_alloc);
284
285static int of_serdev_register_devices(struct serdev_controller *ctrl)
286{
287 struct device_node *node;
288 struct serdev_device *serdev = NULL;
289 int err;
290 bool found = false;
291
292 for_each_available_child_of_node(ctrl->dev.of_node, node) {
293 if (!of_get_property(node, "compatible", NULL))
294 continue;
295
296 dev_dbg(&ctrl->dev, "adding child %s\n", node->full_name);
297
298 serdev = serdev_device_alloc(ctrl);
299 if (!serdev)
300 continue;
301
302 serdev->dev.of_node = node;
303
304 err = serdev_device_add(serdev);
305 if (err) {
306 dev_err(&serdev->dev,
307 "failure adding device. status %d\n", err);
308 serdev_device_put(serdev);
309 } else
310 found = true;
311 }
312 if (!found)
313 return -ENODEV;
314
315 return 0;
316}
317
318/**
319 * serdev_controller_add() - Add an serdev controller
320 * @ctrl: controller to be registered.
321 *
322 * Register a controller previously allocated via serdev_controller_alloc() with
323 * the serdev core.
324 */
325int serdev_controller_add(struct serdev_controller *ctrl)
326{
327 int ret;
328
329 /* Can't register until after driver model init */
330 if (WARN_ON(!is_registered))
331 return -EAGAIN;
332
333 ret = device_add(&ctrl->dev);
334 if (ret)
335 return ret;
336
337 ret = of_serdev_register_devices(ctrl);
338 if (ret)
339 goto out_dev_del;
340
341 dev_dbg(&ctrl->dev, "serdev%d registered: dev:%p\n",
342 ctrl->nr, &ctrl->dev);
343 return 0;
344
345out_dev_del:
346 device_del(&ctrl->dev);
347 return ret;
348};
349EXPORT_SYMBOL_GPL(serdev_controller_add);
350
351/* Remove a device associated with a controller */
352static int serdev_remove_device(struct device *dev, void *data)
353{
354 struct serdev_device *serdev = to_serdev_device(dev);
355 if (dev->type == &serdev_device_type)
356 serdev_device_remove(serdev);
357 return 0;
358}
359
360/**
361 * serdev_controller_remove(): remove an serdev controller
362 * @ctrl: controller to remove
363 *
364 * Remove a serdev controller. Caller is responsible for calling
365 * serdev_controller_put() to discard the allocated controller.
366 */
367void serdev_controller_remove(struct serdev_controller *ctrl)
368{
369 int dummy;
370
371 if (!ctrl)
372 return;
373
374 dummy = device_for_each_child(&ctrl->dev, NULL,
375 serdev_remove_device);
376 device_del(&ctrl->dev);
377}
378EXPORT_SYMBOL_GPL(serdev_controller_remove);
379
380/**
381 * serdev_driver_register() - Register client driver with serdev core
382 * @sdrv: client driver to be associated with client-device.
383 *
384 * This API will register the client driver with the serdev framework.
385 * It is typically called from the driver's module-init function.
386 */
387int __serdev_device_driver_register(struct serdev_device_driver *sdrv, struct module *owner)
388{
389 sdrv->driver.bus = &serdev_bus_type;
390 sdrv->driver.owner = owner;
391
392 /* force drivers to async probe so I/O is possible in probe */
393 sdrv->driver.probe_type = PROBE_PREFER_ASYNCHRONOUS;
394
395 return driver_register(&sdrv->driver);
396}
397EXPORT_SYMBOL_GPL(__serdev_device_driver_register);
398
399static void __exit serdev_exit(void)
400{
401 bus_unregister(&serdev_bus_type);
402}
403module_exit(serdev_exit);
404
405static int __init serdev_init(void)
406{
407 int ret;
408
409 ret = bus_register(&serdev_bus_type);
410 if (ret)
411 return ret;
412
413 is_registered = true;
414 return 0;
415}
416/* Must be before serial drivers register */
417postcore_initcall(serdev_init);
418
419MODULE_AUTHOR("Rob Herring <robh@kernel.org>");
420MODULE_LICENSE("GPL v2");
421MODULE_DESCRIPTION("Serial attached device bus");
diff --git a/drivers/tty/serdev/serdev-ttyport.c b/drivers/tty/serdev/serdev-ttyport.c
new file mode 100644
index 000000000000..d05393594f15
--- /dev/null
+++ b/drivers/tty/serdev/serdev-ttyport.c
@@ -0,0 +1,226 @@
1/*
2 * Copyright (C) 2016-2017 Linaro Ltd., Rob Herring <robh@kernel.org>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13#include <linux/kernel.h>
14#include <linux/serdev.h>
15#include <linux/tty.h>
16#include <linux/tty_driver.h>
17
18#define SERPORT_ACTIVE 1
19
20struct serport {
21 struct tty_port *port;
22 struct tty_struct *tty;
23 struct tty_driver *tty_drv;
24 int tty_idx;
25 unsigned long flags;
26};
27
28/*
29 * Callback functions from the tty port.
30 */
31
32static int ttyport_receive_buf(struct tty_port *port, const unsigned char *cp,
33 const unsigned char *fp, size_t count)
34{
35 struct serdev_controller *ctrl = port->client_data;
36 struct serport *serport = serdev_controller_get_drvdata(ctrl);
37
38 if (!test_bit(SERPORT_ACTIVE, &serport->flags))
39 return 0;
40
41 return serdev_controller_receive_buf(ctrl, cp, count);
42}
43
44static void ttyport_write_wakeup(struct tty_port *port)
45{
46 struct serdev_controller *ctrl = port->client_data;
47 struct serport *serport = serdev_controller_get_drvdata(ctrl);
48
49 if (!test_and_clear_bit(TTY_DO_WRITE_WAKEUP, &port->tty->flags))
50 return;
51
52 if (test_bit(SERPORT_ACTIVE, &serport->flags))
53 serdev_controller_write_wakeup(ctrl);
54}
55
56static const struct tty_port_client_operations client_ops = {
57 .receive_buf = ttyport_receive_buf,
58 .write_wakeup = ttyport_write_wakeup,
59};
60
61/*
62 * Callback functions from the serdev core.
63 */
64
65static int ttyport_write_buf(struct serdev_controller *ctrl, const unsigned char *data, size_t len)
66{
67 struct serport *serport = serdev_controller_get_drvdata(ctrl);
68 struct tty_struct *tty = serport->tty;
69
70 if (!test_bit(SERPORT_ACTIVE, &serport->flags))
71 return 0;
72
73 set_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
74 return tty->ops->write(serport->tty, data, len);
75}
76
77static void ttyport_write_flush(struct serdev_controller *ctrl)
78{
79 struct serport *serport = serdev_controller_get_drvdata(ctrl);
80 struct tty_struct *tty = serport->tty;
81
82 tty_driver_flush_buffer(tty);
83}
84
85static int ttyport_write_room(struct serdev_controller *ctrl)
86{
87 struct serport *serport = serdev_controller_get_drvdata(ctrl);
88 struct tty_struct *tty = serport->tty;
89
90 return tty_write_room(tty);
91}
92
93static int ttyport_open(struct serdev_controller *ctrl)
94{
95 struct serport *serport = serdev_controller_get_drvdata(ctrl);
96 struct tty_struct *tty;
97 struct ktermios ktermios;
98
99 tty = tty_init_dev(serport->tty_drv, serport->tty_idx);
100 if (IS_ERR(tty))
101 return PTR_ERR(tty);
102 serport->tty = tty;
103
104 serport->port->client_ops = &client_ops;
105 serport->port->client_data = ctrl;
106
107 if (tty->ops->open)
108 tty->ops->open(serport->tty, NULL);
109 else
110 tty_port_open(serport->port, tty, NULL);
111
112 /* Bring the UART into a known 8 bits no parity hw fc state */
113 ktermios = tty->termios;
114 ktermios.c_iflag &= ~(IGNBRK | BRKINT | PARMRK | ISTRIP |
115 INLCR | IGNCR | ICRNL | IXON);
116 ktermios.c_oflag &= ~OPOST;
117 ktermios.c_lflag &= ~(ECHO | ECHONL | ICANON | ISIG | IEXTEN);
118 ktermios.c_cflag &= ~(CSIZE | PARENB);
119 ktermios.c_cflag |= CS8;
120 ktermios.c_cflag |= CRTSCTS;
121 tty_set_termios(tty, &ktermios);
122
123 set_bit(SERPORT_ACTIVE, &serport->flags);
124
125 tty_unlock(serport->tty);
126 return 0;
127}
128
129static void ttyport_close(struct serdev_controller *ctrl)
130{
131 struct serport *serport = serdev_controller_get_drvdata(ctrl);
132 struct tty_struct *tty = serport->tty;
133
134 clear_bit(SERPORT_ACTIVE, &serport->flags);
135
136 if (tty->ops->close)
137 tty->ops->close(tty, NULL);
138
139 tty_release_struct(tty, serport->tty_idx);
140}
141
142static unsigned int ttyport_set_baudrate(struct serdev_controller *ctrl, unsigned int speed)
143{
144 struct serport *serport = serdev_controller_get_drvdata(ctrl);
145 struct tty_struct *tty = serport->tty;
146 struct ktermios ktermios = tty->termios;
147
148 ktermios.c_cflag &= ~CBAUD;
149 tty_termios_encode_baud_rate(&ktermios, speed, speed);
150
151 /* tty_set_termios() return not checked as it is always 0 */
152 tty_set_termios(tty, &ktermios);
153 return speed;
154}
155
156static void ttyport_set_flow_control(struct serdev_controller *ctrl, bool enable)
157{
158 struct serport *serport = serdev_controller_get_drvdata(ctrl);
159 struct tty_struct *tty = serport->tty;
160 struct ktermios ktermios = tty->termios;
161
162 if (enable)
163 ktermios.c_cflag |= CRTSCTS;
164 else
165 ktermios.c_cflag &= ~CRTSCTS;
166
167 tty_set_termios(tty, &ktermios);
168}
169
170static const struct serdev_controller_ops ctrl_ops = {
171 .write_buf = ttyport_write_buf,
172 .write_flush = ttyport_write_flush,
173 .write_room = ttyport_write_room,
174 .open = ttyport_open,
175 .close = ttyport_close,
176 .set_flow_control = ttyport_set_flow_control,
177 .set_baudrate = ttyport_set_baudrate,
178};
179
180struct device *serdev_tty_port_register(struct tty_port *port,
181 struct device *parent,
182 struct tty_driver *drv, int idx)
183{
184 struct serdev_controller *ctrl;
185 struct serport *serport;
186 int ret;
187
188 if (!port || !drv || !parent)
189 return ERR_PTR(-ENODEV);
190
191 ctrl = serdev_controller_alloc(parent, sizeof(struct serport));
192 if (!ctrl)
193 return ERR_PTR(-ENOMEM);
194 serport = serdev_controller_get_drvdata(ctrl);
195
196 serport->port = port;
197 serport->tty_idx = idx;
198 serport->tty_drv = drv;
199
200 ctrl->ops = &ctrl_ops;
201
202 ret = serdev_controller_add(ctrl);
203 if (ret)
204 goto err_controller_put;
205
206 dev_info(&ctrl->dev, "tty port %s%d registered\n", drv->name, idx);
207 return &ctrl->dev;
208
209err_controller_put:
210 serdev_controller_put(ctrl);
211 return ERR_PTR(ret);
212}
213
214void serdev_tty_port_unregister(struct tty_port *port)
215{
216 struct serdev_controller *ctrl = port->client_data;
217 struct serport *serport = serdev_controller_get_drvdata(ctrl);
218
219 if (!serport)
220 return;
221
222 serdev_controller_remove(ctrl);
223 port->client_ops = NULL;
224 port->client_data = NULL;
225 serdev_controller_put(ctrl);
226}
diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
index c89fafc972b6..6ee55a2d47bb 100644
--- a/drivers/tty/serial/8250/8250_dw.c
+++ b/drivers/tty/serial/8250/8250_dw.c
@@ -201,8 +201,31 @@ static unsigned int dw8250_serial_in32be(struct uart_port *p, int offset)
201 201
202static int dw8250_handle_irq(struct uart_port *p) 202static int dw8250_handle_irq(struct uart_port *p)
203{ 203{
204 struct uart_8250_port *up = up_to_u8250p(p);
204 struct dw8250_data *d = p->private_data; 205 struct dw8250_data *d = p->private_data;
205 unsigned int iir = p->serial_in(p, UART_IIR); 206 unsigned int iir = p->serial_in(p, UART_IIR);
207 unsigned int status;
208 unsigned long flags;
209
210 /*
211 * There are ways to get Designware-based UARTs into a state where
212 * they are asserting UART_IIR_RX_TIMEOUT but there is no actual
213 * data available. If we see such a case then we'll do a bogus
214 * read. If we don't do this then the "RX TIMEOUT" interrupt will
215 * fire forever.
216 *
217 * This problem has only been observed so far when not in DMA mode
218 * so we limit the workaround only to non-DMA mode.
219 */
220 if (!up->dma && ((iir & 0x3f) == UART_IIR_RX_TIMEOUT)) {
221 spin_lock_irqsave(&p->lock, flags);
222 status = p->serial_in(p, UART_LSR);
223
224 if (!(status & (UART_LSR_DR | UART_LSR_BI)))
225 (void) p->serial_in(p, UART_RX);
226
227 spin_unlock_irqrestore(&p->lock, flags);
228 }
206 229
207 if (serial8250_handle_irq(p, iir)) 230 if (serial8250_handle_irq(p, iir))
208 return 1; 231 return 1;
@@ -248,11 +271,11 @@ static void dw8250_set_termios(struct uart_port *p, struct ktermios *termios,
248 if (!ret) 271 if (!ret)
249 p->uartclk = rate; 272 p->uartclk = rate;
250 273
274out:
251 p->status &= ~UPSTAT_AUTOCTS; 275 p->status &= ~UPSTAT_AUTOCTS;
252 if (termios->c_cflag & CRTSCTS) 276 if (termios->c_cflag & CRTSCTS)
253 p->status |= UPSTAT_AUTOCTS; 277 p->status |= UPSTAT_AUTOCTS;
254 278
255out:
256 serial8250_do_set_termios(p, termios, old); 279 serial8250_do_set_termios(p, termios, old);
257} 280}
258 281
@@ -326,13 +349,11 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data)
326 p->serial_in = dw8250_serial_in32; 349 p->serial_in = dw8250_serial_in32;
327 data->uart_16550_compatible = true; 350 data->uart_16550_compatible = true;
328 } 351 }
329 p->set_termios = dw8250_set_termios;
330 } 352 }
331 353
332 /* Platforms with iDMA */ 354 /* Platforms with iDMA */
333 if (platform_get_resource_byname(to_platform_device(p->dev), 355 if (platform_get_resource_byname(to_platform_device(p->dev),
334 IORESOURCE_MEM, "lpss_priv")) { 356 IORESOURCE_MEM, "lpss_priv")) {
335 p->set_termios = dw8250_set_termios;
336 data->dma.rx_param = p->dev->parent; 357 data->dma.rx_param = p->dev->parent;
337 data->dma.tx_param = p->dev->parent; 358 data->dma.tx_param = p->dev->parent;
338 data->dma.fn = dw8250_idma_filter; 359 data->dma.fn = dw8250_idma_filter;
@@ -414,6 +435,7 @@ static int dw8250_probe(struct platform_device *pdev)
414 p->serial_in = dw8250_serial_in; 435 p->serial_in = dw8250_serial_in;
415 p->serial_out = dw8250_serial_out; 436 p->serial_out = dw8250_serial_out;
416 p->set_ldisc = dw8250_set_ldisc; 437 p->set_ldisc = dw8250_set_ldisc;
438 p->set_termios = dw8250_set_termios;
417 439
418 p->membase = devm_ioremap(dev, regs->start, resource_size(regs)); 440 p->membase = devm_ioremap(dev, regs->start, resource_size(regs));
419 if (!p->membase) 441 if (!p->membase)
diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/8250_exar.c
new file mode 100644
index 000000000000..b89c4ffc0486
--- /dev/null
+++ b/drivers/tty/serial/8250/8250_exar.c
@@ -0,0 +1,487 @@
1/*
2 * Probe module for 8250/16550-type Exar chips PCI serial ports.
3 *
4 * Based on drivers/tty/serial/8250/8250_pci.c,
5 *
6 * Copyright (C) 2017 Sudip Mukherjee, All Rights Reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License.
11 */
12#include <linux/io.h>
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/pci.h>
16#include <linux/serial_core.h>
17#include <linux/serial_reg.h>
18#include <linux/slab.h>
19#include <linux/string.h>
20#include <linux/tty.h>
21#include <linux/8250_pci.h>
22
23#include <asm/byteorder.h>
24
25#include "8250.h"
26
27#define PCI_DEVICE_ID_COMMTECH_4224PCI335 0x0002
28#define PCI_DEVICE_ID_COMMTECH_4222PCI335 0x0004
29#define PCI_DEVICE_ID_COMMTECH_2324PCI335 0x000a
30#define PCI_DEVICE_ID_COMMTECH_2328PCI335 0x000b
31#define PCI_DEVICE_ID_COMMTECH_4224PCIE 0x0020
32#define PCI_DEVICE_ID_COMMTECH_4228PCIE 0x0021
33#define PCI_DEVICE_ID_COMMTECH_4222PCIE 0x0022
34#define PCI_DEVICE_ID_EXAR_XR17V4358 0x4358
35#define PCI_DEVICE_ID_EXAR_XR17V8358 0x8358
36
37#define UART_EXAR_8XMODE 0x88 /* 8X sampling rate select */
38
39#define UART_EXAR_FCTR 0x08 /* Feature Control Register */
40#define UART_FCTR_EXAR_IRDA 0x10 /* IrDa data encode select */
41#define UART_FCTR_EXAR_485 0x20 /* Auto 485 half duplex dir ctl */
42#define UART_FCTR_EXAR_TRGA 0x00 /* FIFO trigger table A */
43#define UART_FCTR_EXAR_TRGB 0x60 /* FIFO trigger table B */
44#define UART_FCTR_EXAR_TRGC 0x80 /* FIFO trigger table C */
45#define UART_FCTR_EXAR_TRGD 0xc0 /* FIFO trigger table D programmable */
46
47#define UART_EXAR_TXTRG 0x0a /* Tx FIFO trigger level write-only */
48#define UART_EXAR_RXTRG 0x0b /* Rx FIFO trigger level write-only */
49
50#define UART_EXAR_MPIOINT_7_0 0x8f /* MPIOINT[7:0] */
51#define UART_EXAR_MPIOLVL_7_0 0x90 /* MPIOLVL[7:0] */
52#define UART_EXAR_MPIO3T_7_0 0x91 /* MPIO3T[7:0] */
53#define UART_EXAR_MPIOINV_7_0 0x92 /* MPIOINV[7:0] */
54#define UART_EXAR_MPIOSEL_7_0 0x93 /* MPIOSEL[7:0] */
55#define UART_EXAR_MPIOOD_7_0 0x94 /* MPIOOD[7:0] */
56#define UART_EXAR_MPIOINT_15_8 0x95 /* MPIOINT[15:8] */
57#define UART_EXAR_MPIOLVL_15_8 0x96 /* MPIOLVL[15:8] */
58#define UART_EXAR_MPIO3T_15_8 0x97 /* MPIO3T[15:8] */
59#define UART_EXAR_MPIOINV_15_8 0x98 /* MPIOINV[15:8] */
60#define UART_EXAR_MPIOSEL_15_8 0x99 /* MPIOSEL[15:8] */
61#define UART_EXAR_MPIOOD_15_8 0x9a /* MPIOOD[15:8] */
62
63struct exar8250;
64
65/**
66 * struct exar8250_board - board information
67 * @num_ports: number of serial ports
68 * @reg_shift: describes UART register mapping in PCI memory
69 */
70struct exar8250_board {
71 unsigned int num_ports;
72 unsigned int reg_shift;
73 bool has_slave;
74 int (*setup)(struct exar8250 *, struct pci_dev *,
75 struct uart_8250_port *, int);
76 void (*exit)(struct pci_dev *pcidev);
77};
78
79struct exar8250 {
80 unsigned int nr;
81 struct exar8250_board *board;
82 int line[0];
83};
84
85static int default_setup(struct exar8250 *priv, struct pci_dev *pcidev,
86 int idx, unsigned int offset,
87 struct uart_8250_port *port)
88{
89 const struct exar8250_board *board = priv->board;
90 unsigned int bar = 0;
91
92 if (!pcim_iomap_table(pcidev)[bar] && !pcim_iomap(pcidev, bar, 0))
93 return -ENOMEM;
94
95 port->port.iotype = UPIO_MEM;
96 port->port.mapbase = pci_resource_start(pcidev, bar) + offset;
97 port->port.membase = pcim_iomap_table(pcidev)[bar] + offset;
98 port->port.regshift = board->reg_shift;
99
100 return 0;
101}
102
103static int
104pci_fastcom335_setup(struct exar8250 *priv, struct pci_dev *pcidev,
105 struct uart_8250_port *port, int idx)
106{
107 unsigned int offset = idx * 0x200;
108 unsigned int baud = 1843200;
109 u8 __iomem *p;
110 int err;
111
112 port->port.flags |= UPF_EXAR_EFR;
113 port->port.uartclk = baud * 16;
114
115 err = default_setup(priv, pcidev, idx, offset, port);
116 if (err)
117 return err;
118
119 p = port->port.membase;
120
121 writeb(0x00, p + UART_EXAR_8XMODE);
122 writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR);
123 writeb(32, p + UART_EXAR_TXTRG);
124 writeb(32, p + UART_EXAR_RXTRG);
125
126 /*
127 * Setup Multipurpose Input/Output pins.
128 */
129 if (idx == 0) {
130 switch (pcidev->device) {
131 case PCI_DEVICE_ID_COMMTECH_4222PCI335:
132 case PCI_DEVICE_ID_COMMTECH_4224PCI335:
133 writeb(0x78, p + UART_EXAR_MPIOLVL_7_0);
134 writeb(0x00, p + UART_EXAR_MPIOINV_7_0);
135 writeb(0x00, p + UART_EXAR_MPIOSEL_7_0);
136 break;
137 case PCI_DEVICE_ID_COMMTECH_2324PCI335:
138 case PCI_DEVICE_ID_COMMTECH_2328PCI335:
139 writeb(0x00, p + UART_EXAR_MPIOLVL_7_0);
140 writeb(0xc0, p + UART_EXAR_MPIOINV_7_0);
141 writeb(0xc0, p + UART_EXAR_MPIOSEL_7_0);
142 break;
143 }
144 writeb(0x00, p + UART_EXAR_MPIOINT_7_0);
145 writeb(0x00, p + UART_EXAR_MPIO3T_7_0);
146 writeb(0x00, p + UART_EXAR_MPIOOD_7_0);
147 }
148
149 return 0;
150}
151
152static int
153pci_connect_tech_setup(struct exar8250 *priv, struct pci_dev *pcidev,
154 struct uart_8250_port *port, int idx)
155{
156 unsigned int offset = idx * 0x200;
157 unsigned int baud = 1843200;
158
159 port->port.uartclk = baud * 16;
160 return default_setup(priv, pcidev, idx, offset, port);
161}
162
163static int
164pci_xr17c154_setup(struct exar8250 *priv, struct pci_dev *pcidev,
165 struct uart_8250_port *port, int idx)
166{
167 unsigned int offset = idx * 0x200;
168 unsigned int baud = 921600;
169
170 port->port.uartclk = baud * 16;
171 return default_setup(priv, pcidev, idx, offset, port);
172}
173
174static void setup_gpio(u8 __iomem *p)
175{
176 writeb(0x00, p + UART_EXAR_MPIOINT_7_0);
177 writeb(0x00, p + UART_EXAR_MPIOLVL_7_0);
178 writeb(0x00, p + UART_EXAR_MPIO3T_7_0);
179 writeb(0x00, p + UART_EXAR_MPIOINV_7_0);
180 writeb(0x00, p + UART_EXAR_MPIOSEL_7_0);
181 writeb(0x00, p + UART_EXAR_MPIOOD_7_0);
182 writeb(0x00, p + UART_EXAR_MPIOINT_15_8);
183 writeb(0x00, p + UART_EXAR_MPIOLVL_15_8);
184 writeb(0x00, p + UART_EXAR_MPIO3T_15_8);
185 writeb(0x00, p + UART_EXAR_MPIOINV_15_8);
186 writeb(0x00, p + UART_EXAR_MPIOSEL_15_8);
187 writeb(0x00, p + UART_EXAR_MPIOOD_15_8);
188}
189
190static void *
191xr17v35x_register_gpio(struct pci_dev *pcidev)
192{
193 struct platform_device *pdev;
194
195 pdev = platform_device_alloc("gpio_exar", PLATFORM_DEVID_AUTO);
196 if (!pdev)
197 return NULL;
198
199 platform_set_drvdata(pdev, pcidev);
200 if (platform_device_add(pdev) < 0) {
201 platform_device_put(pdev);
202 return NULL;
203 }
204
205 return pdev;
206}
207
208static int
209pci_xr17v35x_setup(struct exar8250 *priv, struct pci_dev *pcidev,
210 struct uart_8250_port *port, int idx)
211{
212 const struct exar8250_board *board = priv->board;
213 unsigned int offset = idx * 0x400;
214 unsigned int baud = 7812500;
215 u8 __iomem *p;
216 int ret;
217
218 port->port.uartclk = baud * 16;
219 /*
220 * Setup the uart clock for the devices on expansion slot to
221 * half the clock speed of the main chip (which is 125MHz)
222 */
223 if (board->has_slave && idx >= 8)
224 port->port.uartclk /= 2;
225
226 ret = default_setup(priv, pcidev, idx, offset, port);
227 if (ret)
228 return ret;
229
230 p = port->port.membase;
231
232 writeb(0x00, p + UART_EXAR_8XMODE);
233 writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR);
234 writeb(128, p + UART_EXAR_TXTRG);
235 writeb(128, p + UART_EXAR_RXTRG);
236
237 if (idx == 0) {
238 /* Setup Multipurpose Input/Output pins. */
239 setup_gpio(p);
240
241 port->port.private_data = xr17v35x_register_gpio(pcidev);
242 }
243
244 return 0;
245}
246
247static void pci_xr17v35x_exit(struct pci_dev *pcidev)
248{
249 struct exar8250 *priv = pci_get_drvdata(pcidev);
250 struct uart_8250_port *port = serial8250_get_port(priv->line[0]);
251 struct platform_device *pdev = port->port.private_data;
252
253 platform_device_unregister(pdev);
254 port->port.private_data = NULL;
255}
256
257static int
258exar_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
259{
260 unsigned int nr_ports, i, bar = 0, maxnr;
261 struct exar8250_board *board;
262 struct uart_8250_port uart;
263 struct exar8250 *priv;
264 int rc;
265
266 board = (struct exar8250_board *)ent->driver_data;
267 if (!board)
268 return -EINVAL;
269
270 rc = pcim_enable_device(pcidev);
271 if (rc)
272 return rc;
273
274 maxnr = pci_resource_len(pcidev, bar) >> (board->reg_shift + 3);
275
276 nr_ports = board->num_ports ? board->num_ports : pcidev->device & 0x0f;
277
278 priv = devm_kzalloc(&pcidev->dev, sizeof(*priv) +
279 sizeof(unsigned int) * nr_ports,
280 GFP_KERNEL);
281 if (!priv)
282 return -ENOMEM;
283
284 priv->board = board;
285
286 pci_set_master(pcidev);
287
288 rc = pci_alloc_irq_vectors(pcidev, 1, 1, PCI_IRQ_ALL_TYPES);
289 if (rc < 0)
290 return rc;
291
292 memset(&uart, 0, sizeof(uart));
293 uart.port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ
294 | UPF_EXAR_EFR;
295 uart.port.irq = pci_irq_vector(pcidev, 0);
296 uart.port.dev = &pcidev->dev;
297
298 for (i = 0; i < nr_ports && i < maxnr; i++) {
299 rc = board->setup(priv, pcidev, &uart, i);
300 if (rc) {
301 dev_err(&pcidev->dev, "Failed to setup port %u\n", i);
302 break;
303 }
304
305 dev_dbg(&pcidev->dev, "Setup PCI port: port %lx, irq %d, type %d\n",
306 uart.port.iobase, uart.port.irq, uart.port.iotype);
307
308 priv->line[i] = serial8250_register_8250_port(&uart);
309 if (priv->line[i] < 0) {
310 dev_err(&pcidev->dev,
311 "Couldn't register serial port %lx, irq %d, type %d, error %d\n",
312 uart.port.iobase, uart.port.irq,
313 uart.port.iotype, priv->line[i]);
314 break;
315 }
316 }
317 priv->nr = i;
318 pci_set_drvdata(pcidev, priv);
319 return 0;
320}
321
322static void exar_pci_remove(struct pci_dev *pcidev)
323{
324 struct exar8250 *priv = pci_get_drvdata(pcidev);
325 unsigned int i;
326
327 for (i = 0; i < priv->nr; i++)
328 serial8250_unregister_port(priv->line[i]);
329
330 if (priv->board->exit)
331 priv->board->exit(pcidev);
332}
333
334static int __maybe_unused exar_suspend(struct device *dev)
335{
336 struct pci_dev *pcidev = to_pci_dev(dev);
337 struct exar8250 *priv = pci_get_drvdata(pcidev);
338 unsigned int i;
339
340 for (i = 0; i < priv->nr; i++)
341 if (priv->line[i] >= 0)
342 serial8250_suspend_port(priv->line[i]);
343
344 /* Ensure that every init quirk is properly torn down */
345 if (priv->board->exit)
346 priv->board->exit(pcidev);
347
348 return 0;
349}
350
351static int __maybe_unused exar_resume(struct device *dev)
352{
353 struct pci_dev *pcidev = to_pci_dev(dev);
354 struct exar8250 *priv = pci_get_drvdata(pcidev);
355 unsigned int i;
356
357 for (i = 0; i < priv->nr; i++)
358 if (priv->line[i] >= 0)
359 serial8250_resume_port(priv->line[i]);
360
361 return 0;
362}
363
364static SIMPLE_DEV_PM_OPS(exar_pci_pm, exar_suspend, exar_resume);
365
366static const struct exar8250_board pbn_fastcom335_2 = {
367 .num_ports = 2,
368 .setup = pci_fastcom335_setup,
369};
370
371static const struct exar8250_board pbn_fastcom335_4 = {
372 .num_ports = 4,
373 .setup = pci_fastcom335_setup,
374};
375
376static const struct exar8250_board pbn_fastcom335_8 = {
377 .num_ports = 8,
378 .setup = pci_fastcom335_setup,
379};
380
381static const struct exar8250_board pbn_connect = {
382 .setup = pci_connect_tech_setup,
383};
384
385static const struct exar8250_board pbn_exar_ibm_saturn = {
386 .num_ports = 1,
387 .setup = pci_xr17c154_setup,
388};
389
390static const struct exar8250_board pbn_exar_XR17C15x = {
391 .setup = pci_xr17c154_setup,
392};
393
394static const struct exar8250_board pbn_exar_XR17V35x = {
395 .setup = pci_xr17v35x_setup,
396 .exit = pci_xr17v35x_exit,
397};
398
399static const struct exar8250_board pbn_exar_XR17V4358 = {
400 .num_ports = 12,
401 .has_slave = true,
402 .setup = pci_xr17v35x_setup,
403 .exit = pci_xr17v35x_exit,
404};
405
406static const struct exar8250_board pbn_exar_XR17V8358 = {
407 .num_ports = 16,
408 .has_slave = true,
409 .setup = pci_xr17v35x_setup,
410 .exit = pci_xr17v35x_exit,
411};
412
413#define CONNECT_DEVICE(devid, sdevid, bd) { \
414 PCI_DEVICE_SUB( \
415 PCI_VENDOR_ID_EXAR, \
416 PCI_DEVICE_ID_EXAR_##devid, \
417 PCI_SUBVENDOR_ID_CONNECT_TECH, \
418 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_##sdevid), 0, 0, \
419 (kernel_ulong_t)&bd \
420 }
421
422#define EXAR_DEVICE(vend, devid, bd) { \
423 PCI_VDEVICE(vend, PCI_DEVICE_ID_##devid), (kernel_ulong_t)&bd \
424 }
425
426#define IBM_DEVICE(devid, sdevid, bd) { \
427 PCI_DEVICE_SUB( \
428 PCI_VENDOR_ID_EXAR, \
429 PCI_DEVICE_ID_EXAR_##devid, \
430 PCI_VENDOR_ID_IBM, \
431 PCI_SUBDEVICE_ID_IBM_##sdevid), 0, 0, \
432 (kernel_ulong_t)&bd \
433 }
434
435static struct pci_device_id exar_pci_tbl[] = {
436 CONNECT_DEVICE(XR17C152, UART_2_232, pbn_connect),
437 CONNECT_DEVICE(XR17C154, UART_4_232, pbn_connect),
438 CONNECT_DEVICE(XR17C158, UART_8_232, pbn_connect),
439 CONNECT_DEVICE(XR17C152, UART_1_1, pbn_connect),
440 CONNECT_DEVICE(XR17C154, UART_2_2, pbn_connect),
441 CONNECT_DEVICE(XR17C158, UART_4_4, pbn_connect),
442 CONNECT_DEVICE(XR17C152, UART_2, pbn_connect),
443 CONNECT_DEVICE(XR17C154, UART_4, pbn_connect),
444 CONNECT_DEVICE(XR17C158, UART_8, pbn_connect),
445 CONNECT_DEVICE(XR17C152, UART_2_485, pbn_connect),
446 CONNECT_DEVICE(XR17C154, UART_4_485, pbn_connect),
447 CONNECT_DEVICE(XR17C158, UART_8_485, pbn_connect),
448
449 IBM_DEVICE(XR17C152, SATURN_SERIAL_ONE_PORT, pbn_exar_ibm_saturn),
450
451 /* Exar Corp. XR17C15[248] Dual/Quad/Octal UART */
452 EXAR_DEVICE(EXAR, EXAR_XR17C152, pbn_exar_XR17C15x),
453 EXAR_DEVICE(EXAR, EXAR_XR17C154, pbn_exar_XR17C15x),
454 EXAR_DEVICE(EXAR, EXAR_XR17C158, pbn_exar_XR17C15x),
455
456 /* Exar Corp. XR17V[48]35[248] Dual/Quad/Octal/Hexa PCIe UARTs */
457 EXAR_DEVICE(EXAR, EXAR_XR17V352, pbn_exar_XR17V35x),
458 EXAR_DEVICE(EXAR, EXAR_XR17V354, pbn_exar_XR17V35x),
459 EXAR_DEVICE(EXAR, EXAR_XR17V358, pbn_exar_XR17V35x),
460 EXAR_DEVICE(EXAR, EXAR_XR17V4358, pbn_exar_XR17V4358),
461 EXAR_DEVICE(EXAR, EXAR_XR17V8358, pbn_exar_XR17V8358),
462 EXAR_DEVICE(COMMTECH, COMMTECH_4222PCIE, pbn_exar_XR17V35x),
463 EXAR_DEVICE(COMMTECH, COMMTECH_4224PCIE, pbn_exar_XR17V35x),
464 EXAR_DEVICE(COMMTECH, COMMTECH_4228PCIE, pbn_exar_XR17V35x),
465
466 EXAR_DEVICE(COMMTECH, COMMTECH_4222PCI335, pbn_fastcom335_2),
467 EXAR_DEVICE(COMMTECH, COMMTECH_4224PCI335, pbn_fastcom335_4),
468 EXAR_DEVICE(COMMTECH, COMMTECH_2324PCI335, pbn_fastcom335_4),
469 EXAR_DEVICE(COMMTECH, COMMTECH_2328PCI335, pbn_fastcom335_8),
470 { 0, }
471};
472MODULE_DEVICE_TABLE(pci, exar_pci_tbl);
473
474static struct pci_driver exar_pci_driver = {
475 .name = "exar_serial",
476 .probe = exar_pci_probe,
477 .remove = exar_pci_remove,
478 .driver = {
479 .pm = &exar_pci_pm,
480 },
481 .id_table = exar_pci_tbl,
482};
483module_pci_driver(exar_pci_driver);
484
485MODULE_LICENSE("GPL");
486MODULE_DESCRIPTION("Exar Serial Dricer");
487MODULE_AUTHOR("Sudip Mukherjee <sudip.mukherjee@codethink.co.uk>");
diff --git a/drivers/tty/serial/8250/8250_gsc.c b/drivers/tty/serial/8250/8250_gsc.c
index b1e6ae9f1ff9..63306de4390d 100644
--- a/drivers/tty/serial/8250/8250_gsc.c
+++ b/drivers/tty/serial/8250/8250_gsc.c
@@ -60,6 +60,10 @@ static int __init serial_init_chip(struct parisc_device *dev)
60 7272727 : 1843200; 60 7272727 : 1843200;
61 uart.port.mapbase = address; 61 uart.port.mapbase = address;
62 uart.port.membase = ioremap_nocache(address, 16); 62 uart.port.membase = ioremap_nocache(address, 16);
63 if (!uart.port.membase) {
64 dev_warn(&dev->dev, "Failed to map memory\n");
65 return -ENOMEM;
66 }
63 uart.port.irq = dev->irq; 67 uart.port.irq = dev->irq;
64 uart.port.flags = UPF_BOOT_AUTOCONF; 68 uart.port.flags = UPF_BOOT_AUTOCONF;
65 uart.port.dev = &dev->dev; 69 uart.port.dev = &dev->dev;
diff --git a/drivers/tty/serial/8250/8250_hp300.c b/drivers/tty/serial/8250/8250_hp300.c
index 38166db2b824..115190b7962a 100644
--- a/drivers/tty/serial/8250/8250_hp300.c
+++ b/drivers/tty/serial/8250/8250_hp300.c
@@ -19,7 +19,7 @@
19 19
20#include "8250.h" 20#include "8250.h"
21 21
22#if !defined(CONFIG_HPDCA) && !defined(CONFIG_HPAPCI) 22#if !defined(CONFIG_HPDCA) && !defined(CONFIG_HPAPCI) && !defined(CONFIG_COMPILE_TEST)
23#warning CONFIG_SERIAL_8250 defined but neither CONFIG_HPDCA nor CONFIG_HPAPCI defined, are you sure? 23#warning CONFIG_SERIAL_8250 defined but neither CONFIG_HPDCA nor CONFIG_HPAPCI defined, are you sure?
24#endif 24#endif
25 25
diff --git a/drivers/tty/serial/8250/8250_lpss.c b/drivers/tty/serial/8250/8250_lpss.c
index 58cbb30a9401..f3ea90f0e411 100644
--- a/drivers/tty/serial/8250/8250_lpss.c
+++ b/drivers/tty/serial/8250/8250_lpss.c
@@ -332,10 +332,10 @@ static void lpss8250_remove(struct pci_dev *pdev)
332{ 332{
333 struct lpss8250 *lpss = pci_get_drvdata(pdev); 333 struct lpss8250 *lpss = pci_get_drvdata(pdev);
334 334
335 serial8250_unregister_port(lpss->line);
336
335 if (lpss->board->exit) 337 if (lpss->board->exit)
336 lpss->board->exit(lpss); 338 lpss->board->exit(lpss);
337
338 serial8250_unregister_port(lpss->line);
339} 339}
340 340
341static const struct lpss8250_board byt_board = { 341static const struct lpss8250_board byt_board = {
diff --git a/drivers/tty/serial/8250/8250_mid.c b/drivers/tty/serial/8250/8250_mid.c
index ac013edf4992..ec957cce8c9a 100644
--- a/drivers/tty/serial/8250/8250_mid.c
+++ b/drivers/tty/serial/8250/8250_mid.c
@@ -75,6 +75,37 @@ static int pnw_setup(struct mid8250 *mid, struct uart_port *p)
75 return 0; 75 return 0;
76} 76}
77 77
78static int tng_handle_irq(struct uart_port *p)
79{
80 struct mid8250 *mid = p->private_data;
81 struct uart_8250_port *up = up_to_u8250p(p);
82 struct hsu_dma_chip *chip;
83 u32 status;
84 int ret = 0;
85 int err;
86
87 chip = pci_get_drvdata(mid->dma_dev);
88
89 /* Rx DMA */
90 err = hsu_dma_get_status(chip, mid->dma_index * 2 + 1, &status);
91 if (err > 0) {
92 serial8250_rx_dma_flush(up);
93 ret |= 1;
94 } else if (err == 0)
95 ret |= hsu_dma_do_irq(chip, mid->dma_index * 2 + 1, status);
96
97 /* Tx DMA */
98 err = hsu_dma_get_status(chip, mid->dma_index * 2, &status);
99 if (err > 0)
100 ret |= 1;
101 else if (err == 0)
102 ret |= hsu_dma_do_irq(chip, mid->dma_index * 2, status);
103
104 /* UART */
105 ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
106 return IRQ_RETVAL(ret);
107}
108
78static int tng_setup(struct mid8250 *mid, struct uart_port *p) 109static int tng_setup(struct mid8250 *mid, struct uart_port *p)
79{ 110{
80 struct pci_dev *pdev = to_pci_dev(p->dev); 111 struct pci_dev *pdev = to_pci_dev(p->dev);
@@ -90,6 +121,8 @@ static int tng_setup(struct mid8250 *mid, struct uart_port *p)
90 121
91 mid->dma_index = index; 122 mid->dma_index = index;
92 mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0)); 123 mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0));
124
125 p->handle_irq = tng_handle_irq;
93 return 0; 126 return 0;
94} 127}
95 128
@@ -131,8 +164,16 @@ static int dnv_setup(struct mid8250 *mid, struct uart_port *p)
131 unsigned int bar = FL_GET_BASE(mid->board->flags); 164 unsigned int bar = FL_GET_BASE(mid->board->flags);
132 int ret; 165 int ret;
133 166
167 pci_set_master(pdev);
168
169 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
170 if (ret < 0)
171 return ret;
172
173 p->irq = pci_irq_vector(pdev, 0);
174
134 chip->dev = &pdev->dev; 175 chip->dev = &pdev->dev;
135 chip->irq = pdev->irq; 176 chip->irq = pci_irq_vector(pdev, 0);
136 chip->regs = p->membase; 177 chip->regs = p->membase;
137 chip->length = pci_resource_len(pdev, bar); 178 chip->length = pci_resource_len(pdev, bar);
138 chip->offset = DNV_DMA_CHAN_OFFSET; 179 chip->offset = DNV_DMA_CHAN_OFFSET;
@@ -250,8 +291,6 @@ static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
250 if (ret) 291 if (ret)
251 return ret; 292 return ret;
252 293
253 pci_set_master(pdev);
254
255 mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL); 294 mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL);
256 if (!mid) 295 if (!mid)
257 return -ENOMEM; 296 return -ENOMEM;
diff --git a/drivers/tty/serial/8250/8250_moxa.c b/drivers/tty/serial/8250/8250_moxa.c
index 26eb5393a263..d5069b2d4d79 100644
--- a/drivers/tty/serial/8250/8250_moxa.c
+++ b/drivers/tty/serial/8250/8250_moxa.c
@@ -68,6 +68,7 @@ static int moxa8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
68 sizeof(unsigned int) * nr_ports, GFP_KERNEL); 68 sizeof(unsigned int) * nr_ports, GFP_KERNEL);
69 if (!brd) 69 if (!brd)
70 return -ENOMEM; 70 return -ENOMEM;
71 brd->num_ports = nr_ports;
71 72
72 memset(&uart, 0, sizeof(struct uart_8250_port)); 73 memset(&uart, 0, sizeof(struct uart_8250_port));
73 74
diff --git a/drivers/tty/serial/8250/8250_of.c b/drivers/tty/serial/8250/8250_of.c
index d25ab1cd4295..1cbadafc6889 100644
--- a/drivers/tty/serial/8250/8250_of.c
+++ b/drivers/tty/serial/8250/8250_of.c
@@ -172,7 +172,8 @@ static int of_platform_serial_probe(struct platform_device *ofdev)
172{ 172{
173 const struct of_device_id *match; 173 const struct of_device_id *match;
174 struct of_serial_info *info; 174 struct of_serial_info *info;
175 struct uart_port port; 175 struct uart_8250_port port8250;
176 u32 tx_threshold;
176 int port_type; 177 int port_type;
177 int ret; 178 int ret;
178 179
@@ -188,41 +189,24 @@ static int of_platform_serial_probe(struct platform_device *ofdev)
188 return -ENOMEM; 189 return -ENOMEM;
189 190
190 port_type = (unsigned long)match->data; 191 port_type = (unsigned long)match->data;
191 ret = of_platform_serial_setup(ofdev, port_type, &port, info); 192 memset(&port8250, 0, sizeof(port8250));
193 ret = of_platform_serial_setup(ofdev, port_type, &port8250.port, info);
192 if (ret) 194 if (ret)
193 goto out; 195 goto out;
194 196
195 switch (port_type) { 197 if (port8250.port.fifosize)
196 case PORT_8250 ... PORT_MAX_8250: 198 port8250.capabilities = UART_CAP_FIFO;
197 {
198 u32 tx_threshold;
199 struct uart_8250_port port8250;
200 memset(&port8250, 0, sizeof(port8250));
201 port8250.port = port;
202 199
203 if (port.fifosize) 200 /* Check for TX FIFO threshold & set tx_loadsz */
204 port8250.capabilities = UART_CAP_FIFO; 201 if ((of_property_read_u32(ofdev->dev.of_node, "tx-threshold",
202 &tx_threshold) == 0) &&
203 (tx_threshold < port8250.port.fifosize))
204 port8250.tx_loadsz = port8250.port.fifosize - tx_threshold;
205 205
206 /* Check for TX FIFO threshold & set tx_loadsz */ 206 if (of_property_read_bool(ofdev->dev.of_node, "auto-flow-control"))
207 if ((of_property_read_u32(ofdev->dev.of_node, "tx-threshold", 207 port8250.capabilities |= UART_CAP_AFE;
208 &tx_threshold) == 0) &&
209 (tx_threshold < port.fifosize))
210 port8250.tx_loadsz = port.fifosize - tx_threshold;
211 208
212 if (of_property_read_bool(ofdev->dev.of_node, 209 ret = serial8250_register_8250_port(&port8250);
213 "auto-flow-control"))
214 port8250.capabilities |= UART_CAP_AFE;
215
216 ret = serial8250_register_8250_port(&port8250);
217 break;
218 }
219 default:
220 /* need to add code for these */
221 case PORT_UNKNOWN:
222 dev_info(&ofdev->dev, "Unknown serial port found, ignored\n");
223 ret = -ENODEV;
224 break;
225 }
226 if (ret < 0) 210 if (ret < 0)
227 goto out; 211 goto out;
228 212
@@ -232,7 +216,7 @@ static int of_platform_serial_probe(struct platform_device *ofdev)
232 return 0; 216 return 0;
233out: 217out:
234 kfree(info); 218 kfree(info);
235 irq_dispose_mapping(port.irq); 219 irq_dispose_mapping(port8250.port.irq);
236 return ret; 220 return ret;
237} 221}
238 222
@@ -242,14 +226,8 @@ out:
242static int of_platform_serial_remove(struct platform_device *ofdev) 226static int of_platform_serial_remove(struct platform_device *ofdev)
243{ 227{
244 struct of_serial_info *info = platform_get_drvdata(ofdev); 228 struct of_serial_info *info = platform_get_drvdata(ofdev);
245 switch (info->type) { 229
246 case PORT_8250 ... PORT_MAX_8250: 230 serial8250_unregister_port(info->line);
247 serial8250_unregister_port(info->line);
248 break;
249 default:
250 /* need to add code for these */
251 break;
252 }
253 231
254 if (info->clk) 232 if (info->clk)
255 clk_disable_unprepare(info->clk); 233 clk_disable_unprepare(info->clk);
@@ -258,18 +236,23 @@ static int of_platform_serial_remove(struct platform_device *ofdev)
258} 236}
259 237
260#ifdef CONFIG_PM_SLEEP 238#ifdef CONFIG_PM_SLEEP
261static void of_serial_suspend_8250(struct of_serial_info *info) 239static int of_serial_suspend(struct device *dev)
262{ 240{
241 struct of_serial_info *info = dev_get_drvdata(dev);
263 struct uart_8250_port *port8250 = serial8250_get_port(info->line); 242 struct uart_8250_port *port8250 = serial8250_get_port(info->line);
264 struct uart_port *port = &port8250->port; 243 struct uart_port *port = &port8250->port;
265 244
266 serial8250_suspend_port(info->line); 245 serial8250_suspend_port(info->line);
246
267 if (info->clk && (!uart_console(port) || console_suspend_enabled)) 247 if (info->clk && (!uart_console(port) || console_suspend_enabled))
268 clk_disable_unprepare(info->clk); 248 clk_disable_unprepare(info->clk);
249
250 return 0;
269} 251}
270 252
271static void of_serial_resume_8250(struct of_serial_info *info) 253static int of_serial_resume(struct device *dev)
272{ 254{
255 struct of_serial_info *info = dev_get_drvdata(dev);
273 struct uart_8250_port *port8250 = serial8250_get_port(info->line); 256 struct uart_8250_port *port8250 = serial8250_get_port(info->line);
274 struct uart_port *port = &port8250->port; 257 struct uart_port *port = &port8250->port;
275 258
@@ -277,34 +260,6 @@ static void of_serial_resume_8250(struct of_serial_info *info)
277 clk_prepare_enable(info->clk); 260 clk_prepare_enable(info->clk);
278 261
279 serial8250_resume_port(info->line); 262 serial8250_resume_port(info->line);
280}
281
282static int of_serial_suspend(struct device *dev)
283{
284 struct of_serial_info *info = dev_get_drvdata(dev);
285
286 switch (info->type) {
287 case PORT_8250 ... PORT_MAX_8250:
288 of_serial_suspend_8250(info);
289 break;
290 default:
291 break;
292 }
293
294 return 0;
295}
296
297static int of_serial_resume(struct device *dev)
298{
299 struct of_serial_info *info = dev_get_drvdata(dev);
300
301 switch (info->type) {
302 case PORT_8250 ... PORT_MAX_8250:
303 of_serial_resume_8250(info);
304 break;
305 default:
306 break;
307 }
308 263
309 return 0; 264 return 0;
310} 265}
@@ -332,6 +287,7 @@ static const struct of_device_id of_platform_serial_table[] = {
332 .data = (void *)PORT_ALTR_16550_F128, }, 287 .data = (void *)PORT_ALTR_16550_F128, },
333 { .compatible = "mrvl,mmp-uart", 288 { .compatible = "mrvl,mmp-uart",
334 .data = (void *)PORT_XSCALE, }, 289 .data = (void *)PORT_XSCALE, },
290 { .compatible = "ti,da830-uart", .data = (void *)PORT_DA830, },
335 { /* end of list */ }, 291 { /* end of list */ },
336}; 292};
337MODULE_DEVICE_TABLE(of, of_platform_serial_table); 293MODULE_DEVICE_TABLE(of, of_platform_serial_table);
diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c
index 61ad6c3b20a0..e7e64913a748 100644
--- a/drivers/tty/serial/8250/8250_omap.c
+++ b/drivers/tty/serial/8250/8250_omap.c
@@ -790,6 +790,7 @@ static void omap_8250_rx_dma_flush(struct uart_8250_port *p)
790{ 790{
791 struct omap8250_priv *priv = p->port.private_data; 791 struct omap8250_priv *priv = p->port.private_data;
792 struct uart_8250_dma *dma = p->dma; 792 struct uart_8250_dma *dma = p->dma;
793 struct dma_tx_state state;
793 unsigned long flags; 794 unsigned long flags;
794 int ret; 795 int ret;
795 796
@@ -800,10 +801,12 @@ static void omap_8250_rx_dma_flush(struct uart_8250_port *p)
800 return; 801 return;
801 } 802 }
802 803
803 ret = dmaengine_pause(dma->rxchan); 804 ret = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
804 if (WARN_ON_ONCE(ret)) 805 if (ret == DMA_IN_PROGRESS) {
805 priv->rx_dma_broken = true; 806 ret = dmaengine_pause(dma->rxchan);
806 807 if (WARN_ON_ONCE(ret))
808 priv->rx_dma_broken = true;
809 }
807 spin_unlock_irqrestore(&priv->rx_dma_lock, flags); 810 spin_unlock_irqrestore(&priv->rx_dma_lock, flags);
808 811
809 __dma_rx_do_complete(p); 812 __dma_rx_do_complete(p);
@@ -1075,15 +1078,15 @@ static int omap8250_no_handle_irq(struct uart_port *port)
1075} 1078}
1076 1079
1077static const u8 am3352_habit = OMAP_DMA_TX_KICK | UART_ERRATA_CLOCK_DISABLE; 1080static const u8 am3352_habit = OMAP_DMA_TX_KICK | UART_ERRATA_CLOCK_DISABLE;
1078static const u8 am4372_habit = UART_ERRATA_CLOCK_DISABLE; 1081static const u8 dra742_habit = UART_ERRATA_CLOCK_DISABLE;
1079 1082
1080static const struct of_device_id omap8250_dt_ids[] = { 1083static const struct of_device_id omap8250_dt_ids[] = {
1081 { .compatible = "ti,omap2-uart" }, 1084 { .compatible = "ti,omap2-uart" },
1082 { .compatible = "ti,omap3-uart" }, 1085 { .compatible = "ti,omap3-uart" },
1083 { .compatible = "ti,omap4-uart" }, 1086 { .compatible = "ti,omap4-uart" },
1084 { .compatible = "ti,am3352-uart", .data = &am3352_habit, }, 1087 { .compatible = "ti,am3352-uart", .data = &am3352_habit, },
1085 { .compatible = "ti,am4372-uart", .data = &am4372_habit, }, 1088 { .compatible = "ti,am4372-uart", .data = &am3352_habit, },
1086 { .compatible = "ti,dra742-uart", .data = &am4372_habit, }, 1089 { .compatible = "ti,dra742-uart", .data = &dra742_habit, },
1087 {}, 1090 {},
1088}; 1091};
1089MODULE_DEVICE_TABLE(of, omap8250_dt_ids); 1092MODULE_DEVICE_TABLE(of, omap8250_dt_ids);
@@ -1218,14 +1221,6 @@ static int omap8250_probe(struct platform_device *pdev)
1218 priv->omap8250_dma.rx_size = RX_TRIGGER; 1221 priv->omap8250_dma.rx_size = RX_TRIGGER;
1219 priv->omap8250_dma.rxconf.src_maxburst = RX_TRIGGER; 1222 priv->omap8250_dma.rxconf.src_maxburst = RX_TRIGGER;
1220 priv->omap8250_dma.txconf.dst_maxburst = TX_TRIGGER; 1223 priv->omap8250_dma.txconf.dst_maxburst = TX_TRIGGER;
1221
1222 if (of_machine_is_compatible("ti,am33xx"))
1223 priv->habit |= OMAP_DMA_TX_KICK;
1224 /*
1225 * pause is currently not supported atleast on omap-sdma
1226 * and edma on most earlier kernels.
1227 */
1228 priv->rx_dma_broken = true;
1229 } 1224 }
1230 } 1225 }
1231#endif 1226#endif
@@ -1240,7 +1235,8 @@ static int omap8250_probe(struct platform_device *pdev)
1240 pm_runtime_put_autosuspend(&pdev->dev); 1235 pm_runtime_put_autosuspend(&pdev->dev);
1241 return 0; 1236 return 0;
1242err: 1237err:
1243 pm_runtime_put(&pdev->dev); 1238 pm_runtime_dont_use_autosuspend(&pdev->dev);
1239 pm_runtime_put_sync(&pdev->dev);
1244 pm_runtime_disable(&pdev->dev); 1240 pm_runtime_disable(&pdev->dev);
1245 return ret; 1241 return ret;
1246} 1242}
@@ -1249,6 +1245,7 @@ static int omap8250_remove(struct platform_device *pdev)
1249{ 1245{
1250 struct omap8250_priv *priv = platform_get_drvdata(pdev); 1246 struct omap8250_priv *priv = platform_get_drvdata(pdev);
1251 1247
1248 pm_runtime_dont_use_autosuspend(&pdev->dev);
1252 pm_runtime_put_sync(&pdev->dev); 1249 pm_runtime_put_sync(&pdev->dev);
1253 pm_runtime_disable(&pdev->dev); 1250 pm_runtime_disable(&pdev->dev);
1254 serial8250_unregister_port(priv->line); 1251 serial8250_unregister_port(priv->line);
@@ -1348,6 +1345,10 @@ static int omap8250_runtime_suspend(struct device *dev)
1348 struct omap8250_priv *priv = dev_get_drvdata(dev); 1345 struct omap8250_priv *priv = dev_get_drvdata(dev);
1349 struct uart_8250_port *up; 1346 struct uart_8250_port *up;
1350 1347
1348 /* In case runtime-pm tries this before we are setup */
1349 if (!priv)
1350 return 0;
1351
1351 up = serial8250_get_port(priv->line); 1352 up = serial8250_get_port(priv->line);
1352 /* 1353 /*
1353 * When using 'no_console_suspend', the console UART must not be 1354 * When using 'no_console_suspend', the console UART must not be
diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index 116436b7fa52..00e51a064388 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -1477,11 +1477,16 @@ static int pci_fintek_init(struct pci_dev *dev)
1477{ 1477{
1478 unsigned long iobase; 1478 unsigned long iobase;
1479 u32 max_port, i; 1479 u32 max_port, i;
1480 u32 bar_data[3]; 1480 resource_size_t bar_data[3];
1481 u8 config_base; 1481 u8 config_base;
1482 struct serial_private *priv = pci_get_drvdata(dev); 1482 struct serial_private *priv = pci_get_drvdata(dev);
1483 struct uart_8250_port *port; 1483 struct uart_8250_port *port;
1484 1484
1485 if (!(pci_resource_flags(dev, 5) & IORESOURCE_IO) ||
1486 !(pci_resource_flags(dev, 4) & IORESOURCE_IO) ||
1487 !(pci_resource_flags(dev, 3) & IORESOURCE_IO))
1488 return -ENODEV;
1489
1485 switch (dev->device) { 1490 switch (dev->device) {
1486 case 0x1104: /* 4 ports */ 1491 case 0x1104: /* 4 ports */
1487 case 0x1108: /* 8 ports */ 1492 case 0x1108: /* 8 ports */
@@ -1495,9 +1500,9 @@ static int pci_fintek_init(struct pci_dev *dev)
1495 } 1500 }
1496 1501
1497 /* Get the io address dispatch from the BIOS */ 1502 /* Get the io address dispatch from the BIOS */
1498 pci_read_config_dword(dev, 0x24, &bar_data[0]); 1503 bar_data[0] = pci_resource_start(dev, 5);
1499 pci_read_config_dword(dev, 0x20, &bar_data[1]); 1504 bar_data[1] = pci_resource_start(dev, 4);
1500 pci_read_config_dword(dev, 0x1c, &bar_data[2]); 1505 bar_data[2] = pci_resource_start(dev, 3);
1501 1506
1502 for (i = 0; i < max_port; ++i) { 1507 for (i = 0; i < max_port; ++i) {
1503 /* UART0 configuration offset start from 0x40 */ 1508 /* UART0 configuration offset start from 0x40 */
@@ -1605,135 +1610,6 @@ static int pci_eg20t_init(struct pci_dev *dev)
1605#endif 1610#endif
1606} 1611}
1607 1612
1608#define PCI_DEVICE_ID_EXAR_XR17V4358 0x4358
1609#define PCI_DEVICE_ID_EXAR_XR17V8358 0x8358
1610
1611#define UART_EXAR_MPIOINT_7_0 0x8f /* MPIOINT[7:0] */
1612#define UART_EXAR_MPIOLVL_7_0 0x90 /* MPIOLVL[7:0] */
1613#define UART_EXAR_MPIO3T_7_0 0x91 /* MPIO3T[7:0] */
1614#define UART_EXAR_MPIOINV_7_0 0x92 /* MPIOINV[7:0] */
1615#define UART_EXAR_MPIOSEL_7_0 0x93 /* MPIOSEL[7:0] */
1616#define UART_EXAR_MPIOOD_7_0 0x94 /* MPIOOD[7:0] */
1617#define UART_EXAR_MPIOINT_15_8 0x95 /* MPIOINT[15:8] */
1618#define UART_EXAR_MPIOLVL_15_8 0x96 /* MPIOLVL[15:8] */
1619#define UART_EXAR_MPIO3T_15_8 0x97 /* MPIO3T[15:8] */
1620#define UART_EXAR_MPIOINV_15_8 0x98 /* MPIOINV[15:8] */
1621#define UART_EXAR_MPIOSEL_15_8 0x99 /* MPIOSEL[15:8] */
1622#define UART_EXAR_MPIOOD_15_8 0x9a /* MPIOOD[15:8] */
1623
1624static int
1625pci_xr17c154_setup(struct serial_private *priv,
1626 const struct pciserial_board *board,
1627 struct uart_8250_port *port, int idx)
1628{
1629 port->port.flags |= UPF_EXAR_EFR;
1630 return pci_default_setup(priv, board, port, idx);
1631}
1632
1633static inline int
1634xr17v35x_has_slave(struct serial_private *priv)
1635{
1636 const int dev_id = priv->dev->device;
1637
1638 return ((dev_id == PCI_DEVICE_ID_EXAR_XR17V4358) ||
1639 (dev_id == PCI_DEVICE_ID_EXAR_XR17V8358));
1640}
1641
1642static int
1643pci_xr17v35x_setup(struct serial_private *priv,
1644 const struct pciserial_board *board,
1645 struct uart_8250_port *port, int idx)
1646{
1647 u8 __iomem *p;
1648
1649 p = pci_ioremap_bar(priv->dev, 0);
1650 if (p == NULL)
1651 return -ENOMEM;
1652
1653 port->port.flags |= UPF_EXAR_EFR;
1654
1655 /*
1656 * Setup the uart clock for the devices on expansion slot to
1657 * half the clock speed of the main chip (which is 125MHz)
1658 */
1659 if (xr17v35x_has_slave(priv) && idx >= 8)
1660 port->port.uartclk = (7812500 * 16 / 2);
1661
1662 /*
1663 * Setup Multipurpose Input/Output pins.
1664 */
1665 if (idx == 0) {
1666 writeb(0x00, p + UART_EXAR_MPIOINT_7_0);
1667 writeb(0x00, p + UART_EXAR_MPIOLVL_7_0);
1668 writeb(0x00, p + UART_EXAR_MPIO3T_7_0);
1669 writeb(0x00, p + UART_EXAR_MPIOINV_7_0);
1670 writeb(0x00, p + UART_EXAR_MPIOSEL_7_0);
1671 writeb(0x00, p + UART_EXAR_MPIOOD_7_0);
1672 writeb(0x00, p + UART_EXAR_MPIOINT_15_8);
1673 writeb(0x00, p + UART_EXAR_MPIOLVL_15_8);
1674 writeb(0x00, p + UART_EXAR_MPIO3T_15_8);
1675 writeb(0x00, p + UART_EXAR_MPIOINV_15_8);
1676 writeb(0x00, p + UART_EXAR_MPIOSEL_15_8);
1677 writeb(0x00, p + UART_EXAR_MPIOOD_15_8);
1678 }
1679 writeb(0x00, p + UART_EXAR_8XMODE);
1680 writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR);
1681 writeb(128, p + UART_EXAR_TXTRG);
1682 writeb(128, p + UART_EXAR_RXTRG);
1683 iounmap(p);
1684
1685 return pci_default_setup(priv, board, port, idx);
1686}
1687
1688#define PCI_DEVICE_ID_COMMTECH_4222PCI335 0x0004
1689#define PCI_DEVICE_ID_COMMTECH_4224PCI335 0x0002
1690#define PCI_DEVICE_ID_COMMTECH_2324PCI335 0x000a
1691#define PCI_DEVICE_ID_COMMTECH_2328PCI335 0x000b
1692
1693static int
1694pci_fastcom335_setup(struct serial_private *priv,
1695 const struct pciserial_board *board,
1696 struct uart_8250_port *port, int idx)
1697{
1698 u8 __iomem *p;
1699
1700 p = pci_ioremap_bar(priv->dev, 0);
1701 if (p == NULL)
1702 return -ENOMEM;
1703
1704 port->port.flags |= UPF_EXAR_EFR;
1705
1706 /*
1707 * Setup Multipurpose Input/Output pins.
1708 */
1709 if (idx == 0) {
1710 switch (priv->dev->device) {
1711 case PCI_DEVICE_ID_COMMTECH_4222PCI335:
1712 case PCI_DEVICE_ID_COMMTECH_4224PCI335:
1713 writeb(0x78, p + UART_EXAR_MPIOLVL_7_0);
1714 writeb(0x00, p + UART_EXAR_MPIOINV_7_0);
1715 writeb(0x00, p + UART_EXAR_MPIOSEL_7_0);
1716 break;
1717 case PCI_DEVICE_ID_COMMTECH_2324PCI335:
1718 case PCI_DEVICE_ID_COMMTECH_2328PCI335:
1719 writeb(0x00, p + UART_EXAR_MPIOLVL_7_0);
1720 writeb(0xc0, p + UART_EXAR_MPIOINV_7_0);
1721 writeb(0xc0, p + UART_EXAR_MPIOSEL_7_0);
1722 break;
1723 }
1724 writeb(0x00, p + UART_EXAR_MPIOINT_7_0);
1725 writeb(0x00, p + UART_EXAR_MPIO3T_7_0);
1726 writeb(0x00, p + UART_EXAR_MPIOOD_7_0);
1727 }
1728 writeb(0x00, p + UART_EXAR_8XMODE);
1729 writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR);
1730 writeb(32, p + UART_EXAR_TXTRG);
1731 writeb(32, p + UART_EXAR_RXTRG);
1732 iounmap(p);
1733
1734 return pci_default_setup(priv, board, port, idx);
1735}
1736
1737static int 1613static int
1738pci_wch_ch353_setup(struct serial_private *priv, 1614pci_wch_ch353_setup(struct serial_private *priv,
1739 const struct pciserial_board *board, 1615 const struct pciserial_board *board,
@@ -1809,9 +1685,6 @@ pci_wch_ch38x_setup(struct serial_private *priv,
1809#define PCI_VENDOR_ID_AGESTAR 0x5372 1685#define PCI_VENDOR_ID_AGESTAR 0x5372
1810#define PCI_DEVICE_ID_AGESTAR_9375 0x6872 1686#define PCI_DEVICE_ID_AGESTAR_9375 0x6872
1811#define PCI_VENDOR_ID_ASIX 0x9710 1687#define PCI_VENDOR_ID_ASIX 0x9710
1812#define PCI_DEVICE_ID_COMMTECH_4224PCIE 0x0020
1813#define PCI_DEVICE_ID_COMMTECH_4228PCIE 0x0021
1814#define PCI_DEVICE_ID_COMMTECH_4222PCIE 0x0022
1815#define PCI_DEVICE_ID_BROADCOM_TRUMANAGE 0x160a 1688#define PCI_DEVICE_ID_BROADCOM_TRUMANAGE 0x160a
1816#define PCI_DEVICE_ID_AMCC_ADDIDATA_APCI7800 0x818e 1689#define PCI_DEVICE_ID_AMCC_ADDIDATA_APCI7800 0x818e
1817 1690
@@ -2273,65 +2146,6 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
2273 .setup = pci_timedia_setup, 2146 .setup = pci_timedia_setup,
2274 }, 2147 },
2275 /* 2148 /*
2276 * Exar cards
2277 */
2278 {
2279 .vendor = PCI_VENDOR_ID_EXAR,
2280 .device = PCI_DEVICE_ID_EXAR_XR17C152,
2281 .subvendor = PCI_ANY_ID,
2282 .subdevice = PCI_ANY_ID,
2283 .setup = pci_xr17c154_setup,
2284 },
2285 {
2286 .vendor = PCI_VENDOR_ID_EXAR,
2287 .device = PCI_DEVICE_ID_EXAR_XR17C154,
2288 .subvendor = PCI_ANY_ID,
2289 .subdevice = PCI_ANY_ID,
2290 .setup = pci_xr17c154_setup,
2291 },
2292 {
2293 .vendor = PCI_VENDOR_ID_EXAR,
2294 .device = PCI_DEVICE_ID_EXAR_XR17C158,
2295 .subvendor = PCI_ANY_ID,
2296 .subdevice = PCI_ANY_ID,
2297 .setup = pci_xr17c154_setup,
2298 },
2299 {
2300 .vendor = PCI_VENDOR_ID_EXAR,
2301 .device = PCI_DEVICE_ID_EXAR_XR17V352,
2302 .subvendor = PCI_ANY_ID,
2303 .subdevice = PCI_ANY_ID,
2304 .setup = pci_xr17v35x_setup,
2305 },
2306 {
2307 .vendor = PCI_VENDOR_ID_EXAR,
2308 .device = PCI_DEVICE_ID_EXAR_XR17V354,
2309 .subvendor = PCI_ANY_ID,
2310 .subdevice = PCI_ANY_ID,
2311 .setup = pci_xr17v35x_setup,
2312 },
2313 {
2314 .vendor = PCI_VENDOR_ID_EXAR,
2315 .device = PCI_DEVICE_ID_EXAR_XR17V358,
2316 .subvendor = PCI_ANY_ID,
2317 .subdevice = PCI_ANY_ID,
2318 .setup = pci_xr17v35x_setup,
2319 },
2320 {
2321 .vendor = PCI_VENDOR_ID_EXAR,
2322 .device = PCI_DEVICE_ID_EXAR_XR17V4358,
2323 .subvendor = PCI_ANY_ID,
2324 .subdevice = PCI_ANY_ID,
2325 .setup = pci_xr17v35x_setup,
2326 },
2327 {
2328 .vendor = PCI_VENDOR_ID_EXAR,
2329 .device = PCI_DEVICE_ID_EXAR_XR17V8358,
2330 .subvendor = PCI_ANY_ID,
2331 .subdevice = PCI_ANY_ID,
2332 .setup = pci_xr17v35x_setup,
2333 },
2334 /*
2335 * Xircom cards 2149 * Xircom cards
2336 */ 2150 */
2337 { 2151 {
@@ -2556,59 +2370,6 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
2556 .setup = pci_asix_setup, 2370 .setup = pci_asix_setup,
2557 }, 2371 },
2558 /* 2372 /*
2559 * Commtech, Inc. Fastcom adapters
2560 *
2561 */
2562 {
2563 .vendor = PCI_VENDOR_ID_COMMTECH,
2564 .device = PCI_DEVICE_ID_COMMTECH_4222PCI335,
2565 .subvendor = PCI_ANY_ID,
2566 .subdevice = PCI_ANY_ID,
2567 .setup = pci_fastcom335_setup,
2568 },
2569 {
2570 .vendor = PCI_VENDOR_ID_COMMTECH,
2571 .device = PCI_DEVICE_ID_COMMTECH_4224PCI335,
2572 .subvendor = PCI_ANY_ID,
2573 .subdevice = PCI_ANY_ID,
2574 .setup = pci_fastcom335_setup,
2575 },
2576 {
2577 .vendor = PCI_VENDOR_ID_COMMTECH,
2578 .device = PCI_DEVICE_ID_COMMTECH_2324PCI335,
2579 .subvendor = PCI_ANY_ID,
2580 .subdevice = PCI_ANY_ID,
2581 .setup = pci_fastcom335_setup,
2582 },
2583 {
2584 .vendor = PCI_VENDOR_ID_COMMTECH,
2585 .device = PCI_DEVICE_ID_COMMTECH_2328PCI335,
2586 .subvendor = PCI_ANY_ID,
2587 .subdevice = PCI_ANY_ID,
2588 .setup = pci_fastcom335_setup,
2589 },
2590 {
2591 .vendor = PCI_VENDOR_ID_COMMTECH,
2592 .device = PCI_DEVICE_ID_COMMTECH_4222PCIE,
2593 .subvendor = PCI_ANY_ID,
2594 .subdevice = PCI_ANY_ID,
2595 .setup = pci_xr17v35x_setup,
2596 },
2597 {
2598 .vendor = PCI_VENDOR_ID_COMMTECH,
2599 .device = PCI_DEVICE_ID_COMMTECH_4224PCIE,
2600 .subvendor = PCI_ANY_ID,
2601 .subdevice = PCI_ANY_ID,
2602 .setup = pci_xr17v35x_setup,
2603 },
2604 {
2605 .vendor = PCI_VENDOR_ID_COMMTECH,
2606 .device = PCI_DEVICE_ID_COMMTECH_4228PCIE,
2607 .subvendor = PCI_ANY_ID,
2608 .subdevice = PCI_ANY_ID,
2609 .setup = pci_xr17v35x_setup,
2610 },
2611 /*
2612 * Broadcom TruManage (NetXtreme) 2373 * Broadcom TruManage (NetXtreme)
2613 */ 2374 */
2614 { 2375 {
@@ -2719,17 +2480,11 @@ enum pci_board_num_t {
2719 2480
2720 pbn_b0_4_1152000, 2481 pbn_b0_4_1152000,
2721 2482
2722 pbn_b0_2_1152000_200, 2483 pbn_b0_4_1250000,
2723 pbn_b0_4_1152000_200,
2724 pbn_b0_8_1152000_200,
2725 2484
2726 pbn_b0_2_1843200, 2485 pbn_b0_2_1843200,
2727 pbn_b0_4_1843200, 2486 pbn_b0_4_1843200,
2728 2487
2729 pbn_b0_2_1843200_200,
2730 pbn_b0_4_1843200_200,
2731 pbn_b0_8_1843200_200,
2732
2733 pbn_b0_1_4000000, 2488 pbn_b0_1_4000000,
2734 2489
2735 pbn_b0_bt_1_115200, 2490 pbn_b0_bt_1_115200,
@@ -2820,15 +2575,6 @@ enum pci_board_num_t {
2820 pbn_computone_6, 2575 pbn_computone_6,
2821 pbn_computone_8, 2576 pbn_computone_8,
2822 pbn_sbsxrsio, 2577 pbn_sbsxrsio,
2823 pbn_exar_XR17C152,
2824 pbn_exar_XR17C154,
2825 pbn_exar_XR17C158,
2826 pbn_exar_XR17V352,
2827 pbn_exar_XR17V354,
2828 pbn_exar_XR17V358,
2829 pbn_exar_XR17V4358,
2830 pbn_exar_XR17V8358,
2831 pbn_exar_ibm_saturn,
2832 pbn_pasemi_1682M, 2578 pbn_pasemi_1682M,
2833 pbn_ni8430_2, 2579 pbn_ni8430_2,
2834 pbn_ni8430_4, 2580 pbn_ni8430_4,
@@ -2933,25 +2679,11 @@ static struct pciserial_board pci_boards[] = {
2933 .uart_offset = 8, 2679 .uart_offset = 8,
2934 }, 2680 },
2935 2681
2936 [pbn_b0_2_1152000_200] = { 2682 [pbn_b0_4_1250000] = {
2937 .flags = FL_BASE0,
2938 .num_ports = 2,
2939 .base_baud = 1152000,
2940 .uart_offset = 0x200,
2941 },
2942
2943 [pbn_b0_4_1152000_200] = {
2944 .flags = FL_BASE0, 2683 .flags = FL_BASE0,
2945 .num_ports = 4, 2684 .num_ports = 4,
2946 .base_baud = 1152000, 2685 .base_baud = 1250000,
2947 .uart_offset = 0x200, 2686 .uart_offset = 8,
2948 },
2949
2950 [pbn_b0_8_1152000_200] = {
2951 .flags = FL_BASE0,
2952 .num_ports = 8,
2953 .base_baud = 1152000,
2954 .uart_offset = 0x200,
2955 }, 2687 },
2956 2688
2957 [pbn_b0_2_1843200] = { 2689 [pbn_b0_2_1843200] = {
@@ -2967,24 +2699,6 @@ static struct pciserial_board pci_boards[] = {
2967 .uart_offset = 8, 2699 .uart_offset = 8,
2968 }, 2700 },
2969 2701
2970 [pbn_b0_2_1843200_200] = {
2971 .flags = FL_BASE0,
2972 .num_ports = 2,
2973 .base_baud = 1843200,
2974 .uart_offset = 0x200,
2975 },
2976 [pbn_b0_4_1843200_200] = {
2977 .flags = FL_BASE0,
2978 .num_ports = 4,
2979 .base_baud = 1843200,
2980 .uart_offset = 0x200,
2981 },
2982 [pbn_b0_8_1843200_200] = {
2983 .flags = FL_BASE0,
2984 .num_ports = 8,
2985 .base_baud = 1843200,
2986 .uart_offset = 0x200,
2987 },
2988 [pbn_b0_1_4000000] = { 2702 [pbn_b0_1_4000000] = {
2989 .flags = FL_BASE0, 2703 .flags = FL_BASE0,
2990 .num_ports = 1, 2704 .num_ports = 1,
@@ -3469,76 +3183,6 @@ static struct pciserial_board pci_boards[] = {
3469 .reg_shift = 4, 3183 .reg_shift = 4,
3470 }, 3184 },
3471 /* 3185 /*
3472 * Exar Corp. XR17C15[248] Dual/Quad/Octal UART
3473 * Only basic 16550A support.
3474 * XR17C15[24] are not tested, but they should work.
3475 */
3476 [pbn_exar_XR17C152] = {
3477 .flags = FL_BASE0,
3478 .num_ports = 2,
3479 .base_baud = 921600,
3480 .uart_offset = 0x200,
3481 },
3482 [pbn_exar_XR17C154] = {
3483 .flags = FL_BASE0,
3484 .num_ports = 4,
3485 .base_baud = 921600,
3486 .uart_offset = 0x200,
3487 },
3488 [pbn_exar_XR17C158] = {
3489 .flags = FL_BASE0,
3490 .num_ports = 8,
3491 .base_baud = 921600,
3492 .uart_offset = 0x200,
3493 },
3494 [pbn_exar_XR17V352] = {
3495 .flags = FL_BASE0,
3496 .num_ports = 2,
3497 .base_baud = 7812500,
3498 .uart_offset = 0x400,
3499 .reg_shift = 0,
3500 .first_offset = 0,
3501 },
3502 [pbn_exar_XR17V354] = {
3503 .flags = FL_BASE0,
3504 .num_ports = 4,
3505 .base_baud = 7812500,
3506 .uart_offset = 0x400,
3507 .reg_shift = 0,
3508 .first_offset = 0,
3509 },
3510 [pbn_exar_XR17V358] = {
3511 .flags = FL_BASE0,
3512 .num_ports = 8,
3513 .base_baud = 7812500,
3514 .uart_offset = 0x400,
3515 .reg_shift = 0,
3516 .first_offset = 0,
3517 },
3518 [pbn_exar_XR17V4358] = {
3519 .flags = FL_BASE0,
3520 .num_ports = 12,
3521 .base_baud = 7812500,
3522 .uart_offset = 0x400,
3523 .reg_shift = 0,
3524 .first_offset = 0,
3525 },
3526 [pbn_exar_XR17V8358] = {
3527 .flags = FL_BASE0,
3528 .num_ports = 16,
3529 .base_baud = 7812500,
3530 .uart_offset = 0x400,
3531 .reg_shift = 0,
3532 .first_offset = 0,
3533 },
3534 [pbn_exar_ibm_saturn] = {
3535 .flags = FL_BASE0,
3536 .num_ports = 1,
3537 .base_baud = 921600,
3538 .uart_offset = 0x200,
3539 },
3540
3541 /*
3542 * PA Semi PWRficient PA6T-1682M on-chip UART 3186 * PA Semi PWRficient PA6T-1682M on-chip UART
3543 */ 3187 */
3544 [pbn_pasemi_1682M] = { 3188 [pbn_pasemi_1682M] = {
@@ -3734,6 +3378,10 @@ static const struct pci_device_id blacklist[] = {
3734 { PCI_VDEVICE(INTEL, 0x228c), }, 3378 { PCI_VDEVICE(INTEL, 0x228c), },
3735 { PCI_VDEVICE(INTEL, 0x9ce3), }, 3379 { PCI_VDEVICE(INTEL, 0x9ce3), },
3736 { PCI_VDEVICE(INTEL, 0x9ce4), }, 3380 { PCI_VDEVICE(INTEL, 0x9ce4), },
3381
3382 /* Exar devices */
3383 { PCI_VDEVICE(EXAR, PCI_ANY_ID), },
3384 { PCI_VDEVICE(COMMTECH, PCI_ANY_ID), },
3737}; 3385};
3738 3386
3739/* 3387/*
@@ -3908,7 +3556,7 @@ err_out:
3908} 3556}
3909EXPORT_SYMBOL_GPL(pciserial_init_ports); 3557EXPORT_SYMBOL_GPL(pciserial_init_ports);
3910 3558
3911void pciserial_detach_ports(struct serial_private *priv) 3559static void pciserial_detach_ports(struct serial_private *priv)
3912{ 3560{
3913 struct pci_serial_quirk *quirk; 3561 struct pci_serial_quirk *quirk;
3914 int i; 3562 int i;
@@ -4159,58 +3807,6 @@ static struct pci_device_id serial_pci_tbl[] = {
4159 PCI_VENDOR_ID_AFAVLAB, 3807 PCI_VENDOR_ID_AFAVLAB,
4160 PCI_SUBDEVICE_ID_AFAVLAB_P061, 0, 0, 3808 PCI_SUBDEVICE_ID_AFAVLAB_P061, 0, 0,
4161 pbn_b0_4_1152000 }, 3809 pbn_b0_4_1152000 },
4162 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152,
4163 PCI_SUBVENDOR_ID_CONNECT_TECH,
4164 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_232, 0, 0,
4165 pbn_b0_2_1843200_200 },
4166 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C154,
4167 PCI_SUBVENDOR_ID_CONNECT_TECH,
4168 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_232, 0, 0,
4169 pbn_b0_4_1843200_200 },
4170 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C158,
4171 PCI_SUBVENDOR_ID_CONNECT_TECH,
4172 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_232, 0, 0,
4173 pbn_b0_8_1843200_200 },
4174 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152,
4175 PCI_SUBVENDOR_ID_CONNECT_TECH,
4176 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_1_1, 0, 0,
4177 pbn_b0_2_1843200_200 },
4178 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C154,
4179 PCI_SUBVENDOR_ID_CONNECT_TECH,
4180 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_2, 0, 0,
4181 pbn_b0_4_1843200_200 },
4182 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C158,
4183 PCI_SUBVENDOR_ID_CONNECT_TECH,
4184 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_4, 0, 0,
4185 pbn_b0_8_1843200_200 },
4186 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152,
4187 PCI_SUBVENDOR_ID_CONNECT_TECH,
4188 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2, 0, 0,
4189 pbn_b0_2_1843200_200 },
4190 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C154,
4191 PCI_SUBVENDOR_ID_CONNECT_TECH,
4192 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4, 0, 0,
4193 pbn_b0_4_1843200_200 },
4194 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C158,
4195 PCI_SUBVENDOR_ID_CONNECT_TECH,
4196 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8, 0, 0,
4197 pbn_b0_8_1843200_200 },
4198 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152,
4199 PCI_SUBVENDOR_ID_CONNECT_TECH,
4200 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_485, 0, 0,
4201 pbn_b0_2_1843200_200 },
4202 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C154,
4203 PCI_SUBVENDOR_ID_CONNECT_TECH,
4204 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_485, 0, 0,
4205 pbn_b0_4_1843200_200 },
4206 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C158,
4207 PCI_SUBVENDOR_ID_CONNECT_TECH,
4208 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_485, 0, 0,
4209 pbn_b0_8_1843200_200 },
4210 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152,
4211 PCI_VENDOR_ID_IBM, PCI_SUBDEVICE_ID_IBM_SATURN_SERIAL_ONE_PORT,
4212 0, 0, pbn_exar_ibm_saturn },
4213
4214 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_U530, 3810 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_U530,
4215 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3811 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
4216 pbn_b2_bt_1_115200 }, 3812 pbn_b2_bt_1_115200 },
@@ -4938,45 +4534,6 @@ static struct pci_device_id serial_pci_tbl[] = {
4938 { PCI_VENDOR_ID_DCI, PCI_DEVICE_ID_DCI_PCCOM8, 4534 { PCI_VENDOR_ID_DCI, PCI_DEVICE_ID_DCI_PCCOM8,
4939 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4535 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
4940 pbn_b3_8_115200 }, 4536 pbn_b3_8_115200 },
4941
4942 /*
4943 * Exar Corp. XR17C15[248] Dual/Quad/Octal UART
4944 */
4945 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152,
4946 PCI_ANY_ID, PCI_ANY_ID,
4947 0,
4948 0, pbn_exar_XR17C152 },
4949 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C154,
4950 PCI_ANY_ID, PCI_ANY_ID,
4951 0,
4952 0, pbn_exar_XR17C154 },
4953 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C158,
4954 PCI_ANY_ID, PCI_ANY_ID,
4955 0,
4956 0, pbn_exar_XR17C158 },
4957 /*
4958 * Exar Corp. XR17V[48]35[248] Dual/Quad/Octal/Hexa PCIe UARTs
4959 */
4960 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17V352,
4961 PCI_ANY_ID, PCI_ANY_ID,
4962 0,
4963 0, pbn_exar_XR17V352 },
4964 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17V354,
4965 PCI_ANY_ID, PCI_ANY_ID,
4966 0,
4967 0, pbn_exar_XR17V354 },
4968 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17V358,
4969 PCI_ANY_ID, PCI_ANY_ID,
4970 0,
4971 0, pbn_exar_XR17V358 },
4972 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17V4358,
4973 PCI_ANY_ID, PCI_ANY_ID,
4974 0,
4975 0, pbn_exar_XR17V4358 },
4976 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17V8358,
4977 PCI_ANY_ID, PCI_ANY_ID,
4978 0,
4979 0, pbn_exar_XR17V8358 },
4980 /* 4537 /*
4981 * Pericom PI7C9X795[1248] Uno/Dual/Quad/Octal UART 4538 * Pericom PI7C9X795[1248] Uno/Dual/Quad/Octal UART
4982 */ 4539 */
@@ -5552,43 +5109,15 @@ static struct pci_device_id serial_pci_tbl[] = {
5552 PCI_ANY_ID, PCI_ANY_ID, 5109 PCI_ANY_ID, PCI_ANY_ID,
5553 0, 0, pbn_wch384_4 }, 5110 0, 0, pbn_wch384_4 },
5554 5111
5555 /*
5556 * Commtech, Inc. Fastcom adapters
5557 */
5558 { PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_4222PCI335,
5559 PCI_ANY_ID, PCI_ANY_ID,
5560 0,
5561 0, pbn_b0_2_1152000_200 },
5562 { PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_4224PCI335,
5563 PCI_ANY_ID, PCI_ANY_ID,
5564 0,
5565 0, pbn_b0_4_1152000_200 },
5566 { PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_2324PCI335,
5567 PCI_ANY_ID, PCI_ANY_ID,
5568 0,
5569 0, pbn_b0_4_1152000_200 },
5570 { PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_2328PCI335,
5571 PCI_ANY_ID, PCI_ANY_ID,
5572 0,
5573 0, pbn_b0_8_1152000_200 },
5574 { PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_4222PCIE,
5575 PCI_ANY_ID, PCI_ANY_ID,
5576 0,
5577 0, pbn_exar_XR17V352 },
5578 { PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_4224PCIE,
5579 PCI_ANY_ID, PCI_ANY_ID,
5580 0,
5581 0, pbn_exar_XR17V354 },
5582 { PCI_VENDOR_ID_COMMTECH, PCI_DEVICE_ID_COMMTECH_4228PCIE,
5583 PCI_ANY_ID, PCI_ANY_ID,
5584 0,
5585 0, pbn_exar_XR17V358 },
5586
5587 /* Fintek PCI serial cards */ 5112 /* Fintek PCI serial cards */
5588 { PCI_DEVICE(0x1c29, 0x1104), .driver_data = pbn_fintek_4 }, 5113 { PCI_DEVICE(0x1c29, 0x1104), .driver_data = pbn_fintek_4 },
5589 { PCI_DEVICE(0x1c29, 0x1108), .driver_data = pbn_fintek_8 }, 5114 { PCI_DEVICE(0x1c29, 0x1108), .driver_data = pbn_fintek_8 },
5590 { PCI_DEVICE(0x1c29, 0x1112), .driver_data = pbn_fintek_12 }, 5115 { PCI_DEVICE(0x1c29, 0x1112), .driver_data = pbn_fintek_12 },
5591 5116
5117 /* MKS Tenta SCOM-080x serial cards */
5118 { PCI_DEVICE(0x1601, 0x0800), .driver_data = pbn_b0_4_1250000 },
5119 { PCI_DEVICE(0x1601, 0xa801), .driver_data = pbn_b0_4_1250000 },
5120
5592 /* 5121 /*
5593 * These entries match devices with class COMMUNICATION_SERIAL, 5122 * These entries match devices with class COMMUNICATION_SERIAL,
5594 * COMMUNICATION_MODEM or COMMUNICATION_MULTISERIAL 5123 * COMMUNICATION_MODEM or COMMUNICATION_MULTISERIAL
diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
index c13fec451d03..6119516ef5fc 100644
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
@@ -45,6 +45,12 @@
45#include "8250.h" 45#include "8250.h"
46 46
47/* 47/*
48 * These are definitions for the Exar XR17V35X and XR17(C|D)15X
49 */
50#define UART_EXAR_SLEEP 0x8b /* Sleep mode */
51#define UART_EXAR_DVID 0x8d /* Device identification */
52
53/*
48 * Debugging. 54 * Debugging.
49 */ 55 */
50#if 0 56#if 0
@@ -273,6 +279,15 @@ static const struct serial8250_config uart_config[] = {
273 .rxtrig_bytes = {1, 4, 8, 14}, 279 .rxtrig_bytes = {1, 4, 8, 14},
274 .flags = UART_CAP_FIFO, 280 .flags = UART_CAP_FIFO,
275 }, 281 },
282 [PORT_DA830] = {
283 .name = "TI DA8xx/66AK2x",
284 .fifo_size = 16,
285 .tx_loadsz = 16,
286 .fcr = UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO |
287 UART_FCR_R_TRIG_10,
288 .rxtrig_bytes = {1, 4, 8, 14},
289 .flags = UART_CAP_FIFO | UART_CAP_AFE,
290 },
276}; 291};
277 292
278/* Uart divisor latch read */ 293/* Uart divisor latch read */
@@ -1753,8 +1768,6 @@ void serial8250_tx_chars(struct uart_8250_port *up)
1753 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 1768 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1754 uart_write_wakeup(port); 1769 uart_write_wakeup(port);
1755 1770
1756 pr_debug("%s: THRE\n", __func__);
1757
1758 /* 1771 /*
1759 * With RPM enabled, we have to wait until the FIFO is empty before the 1772 * With RPM enabled, we have to wait until the FIFO is empty before the
1760 * HW can go idle. So we get here once again with empty FIFO and disable 1773 * HW can go idle. So we get here once again with empty FIFO and disable
@@ -1819,8 +1832,6 @@ int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1819 1832
1820 status = serial_port_in(port, UART_LSR); 1833 status = serial_port_in(port, UART_LSR);
1821 1834
1822 pr_debug("%s: status = %x\n", __func__, status);
1823
1824 if (status & (UART_LSR_DR | UART_LSR_BI)) { 1835 if (status & (UART_LSR_DR | UART_LSR_BI)) {
1825 if (!up->dma || handle_rx_dma(up, iir)) 1836 if (!up->dma || handle_rx_dma(up, iir))
1826 status = serial8250_rx_chars(up, status); 1837 status = serial8250_rx_chars(up, status);
@@ -2118,6 +2129,19 @@ int serial8250_do_startup(struct uart_port *port)
2118 serial_port_out(port, UART_LCR, 0); 2129 serial_port_out(port, UART_LCR, 0);
2119 } 2130 }
2120 2131
2132 if (port->type == PORT_DA830) {
2133 /* Reset the port */
2134 serial_port_out(port, UART_IER, 0);
2135 serial_port_out(port, UART_DA830_PWREMU_MGMT, 0);
2136 mdelay(10);
2137
2138 /* Enable Tx, Rx and free run mode */
2139 serial_port_out(port, UART_DA830_PWREMU_MGMT,
2140 UART_DA830_PWREMU_MGMT_UTRST |
2141 UART_DA830_PWREMU_MGMT_URRST |
2142 UART_DA830_PWREMU_MGMT_FREE);
2143 }
2144
2121#ifdef CONFIG_SERIAL_8250_RSA 2145#ifdef CONFIG_SERIAL_8250_RSA
2122 /* 2146 /*
2123 * If this is an RSA port, see if we can kick it up to the 2147 * If this is an RSA port, see if we can kick it up to the
diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kconfig
index 0b8b6740ba43..a65fb8197aec 100644
--- a/drivers/tty/serial/8250/Kconfig
+++ b/drivers/tty/serial/8250/Kconfig
@@ -117,7 +117,7 @@ config SERIAL_8250_DMA
117 compatible UART controllers that support DMA signaling. 117 compatible UART controllers that support DMA signaling.
118 118
119config SERIAL_8250_PCI 119config SERIAL_8250_PCI
120 tristate "8250/16550 PCI device support" if EXPERT 120 tristate "8250/16550 PCI device support"
121 depends on SERIAL_8250 && PCI 121 depends on SERIAL_8250 && PCI
122 default SERIAL_8250 122 default SERIAL_8250
123 help 123 help
@@ -127,6 +127,11 @@ config SERIAL_8250_PCI
127 Note that serial ports on NetMos 9835 Multi-I/O cards are handled 127 Note that serial ports on NetMos 9835 Multi-I/O cards are handled
128 by the parport_serial driver, enabled with CONFIG_PARPORT_SERIAL. 128 by the parport_serial driver, enabled with CONFIG_PARPORT_SERIAL.
129 129
130config SERIAL_8250_EXAR
131 tristate "8250/16550 PCI device support"
132 depends on SERIAL_8250_PCI
133 default SERIAL_8250
134
130config SERIAL_8250_HP300 135config SERIAL_8250_HP300
131 tristate 136 tristate
132 depends on SERIAL_8250 && HP300 137 depends on SERIAL_8250 && HP300
@@ -402,7 +407,7 @@ config SERIAL_8250_INGENIC
402 its UARTs, say Y to this option. If unsure, say N. 407 its UARTs, say Y to this option. If unsure, say N.
403 408
404config SERIAL_8250_LPSS 409config SERIAL_8250_LPSS
405 tristate "Support for serial ports on Intel LPSS platforms" if EXPERT 410 tristate "Support for serial ports on Intel LPSS platforms"
406 default SERIAL_8250 411 default SERIAL_8250
407 depends on SERIAL_8250 && PCI 412 depends on SERIAL_8250 && PCI
408 depends on X86 || COMPILE_TEST 413 depends on X86 || COMPILE_TEST
@@ -417,7 +422,7 @@ config SERIAL_8250_LPSS
417 - Intel Quark X1000 SoC 422 - Intel Quark X1000 SoC
418 423
419config SERIAL_8250_MID 424config SERIAL_8250_MID
420 tristate "Support for serial ports on Intel MID platforms" if EXPERT 425 tristate "Support for serial ports on Intel MID platforms"
421 default SERIAL_8250 426 default SERIAL_8250
422 depends on SERIAL_8250 && PCI 427 depends on SERIAL_8250 && PCI
423 depends on X86 || COMPILE_TEST 428 depends on X86 || COMPILE_TEST
diff --git a/drivers/tty/serial/8250/Makefile b/drivers/tty/serial/8250/Makefile
index 850e721877a9..2f30f9ecdb1b 100644
--- a/drivers/tty/serial/8250/Makefile
+++ b/drivers/tty/serial/8250/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_SERIAL_8250) += 8250.o 8250_base.o
108250_base-$(CONFIG_SERIAL_8250_FINTEK) += 8250_fintek.o 108250_base-$(CONFIG_SERIAL_8250_FINTEK) += 8250_fintek.o
11obj-$(CONFIG_SERIAL_8250_GSC) += 8250_gsc.o 11obj-$(CONFIG_SERIAL_8250_GSC) += 8250_gsc.o
12obj-$(CONFIG_SERIAL_8250_PCI) += 8250_pci.o 12obj-$(CONFIG_SERIAL_8250_PCI) += 8250_pci.o
13obj-$(CONFIG_SERIAL_8250_EXAR) += 8250_exar.o
13obj-$(CONFIG_SERIAL_8250_HP300) += 8250_hp300.o 14obj-$(CONFIG_SERIAL_8250_HP300) += 8250_hp300.o
14obj-$(CONFIG_SERIAL_8250_CS) += serial_cs.o 15obj-$(CONFIG_SERIAL_8250_CS) += serial_cs.o
15obj-$(CONFIG_SERIAL_8250_ACORN) += 8250_acorn.o 16obj-$(CONFIG_SERIAL_8250_ACORN) += 8250_acorn.o
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index e9cf5b67f1b7..6117ac8da48f 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1161,6 +1161,7 @@ config SERIAL_LANTIQ
1161 depends on LANTIQ 1161 depends on LANTIQ
1162 select SERIAL_CORE 1162 select SERIAL_CORE
1163 select SERIAL_CORE_CONSOLE 1163 select SERIAL_CORE_CONSOLE
1164 select SERIAL_EARLYCON
1164 help 1165 help
1165 Support for console and UART on Lantiq SoCs. 1166 Support for console and UART on Lantiq SoCs.
1166 1167
diff --git a/drivers/tty/serial/amba-pl010.c b/drivers/tty/serial/amba-pl010.c
index 5d41d5b92619..f2f251075109 100644
--- a/drivers/tty/serial/amba-pl010.c
+++ b/drivers/tty/serial/amba-pl010.c
@@ -554,7 +554,7 @@ static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser)
554 return ret; 554 return ret;
555} 555}
556 556
557static struct uart_ops amba_pl010_pops = { 557static const struct uart_ops amba_pl010_pops = {
558 .tx_empty = pl010_tx_empty, 558 .tx_empty = pl010_tx_empty,
559 .set_mctrl = pl010_set_mctrl, 559 .set_mctrl = pl010_set_mctrl,
560 .get_mctrl = pl010_get_mctrl, 560 .get_mctrl = pl010_get_mctrl,
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index d4171d71a258..8789ea423ccf 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -97,6 +97,7 @@ struct vendor_data {
97 unsigned int fr_dsr; 97 unsigned int fr_dsr;
98 unsigned int fr_cts; 98 unsigned int fr_cts;
99 unsigned int fr_ri; 99 unsigned int fr_ri;
100 unsigned int inv_fr;
100 bool access_32b; 101 bool access_32b;
101 bool oversampling; 102 bool oversampling;
102 bool dma_threshold; 103 bool dma_threshold;
@@ -141,6 +142,30 @@ static struct vendor_data vendor_sbsa = {
141 .fixed_options = true, 142 .fixed_options = true,
142}; 143};
143 144
145/*
146 * Erratum 44 for QDF2432v1 and QDF2400v1 SoCs describes the BUSY bit as
147 * occasionally getting stuck as 1. To avoid the potential for a hang, check
148 * TXFE == 0 instead of BUSY == 1. This may not be suitable for all UART
149 * implementations, so only do so if an affected platform is detected in
150 * parse_spcr().
151 */
152static bool qdf2400_e44_present = false;
153
154static struct vendor_data vendor_qdt_qdf2400_e44 = {
155 .reg_offset = pl011_std_offsets,
156 .fr_busy = UART011_FR_TXFE,
157 .fr_dsr = UART01x_FR_DSR,
158 .fr_cts = UART01x_FR_CTS,
159 .fr_ri = UART011_FR_RI,
160 .inv_fr = UART011_FR_TXFE,
161 .access_32b = true,
162 .oversampling = false,
163 .dma_threshold = false,
164 .cts_event_workaround = false,
165 .always_enabled = true,
166 .fixed_options = true,
167};
168
144static u16 pl011_st_offsets[REG_ARRAY_SIZE] = { 169static u16 pl011_st_offsets[REG_ARRAY_SIZE] = {
145 [REG_DR] = UART01x_DR, 170 [REG_DR] = UART01x_DR,
146 [REG_ST_DMAWM] = ST_UART011_DMAWM, 171 [REG_ST_DMAWM] = ST_UART011_DMAWM,
@@ -1518,7 +1543,10 @@ static unsigned int pl011_tx_empty(struct uart_port *port)
1518{ 1543{
1519 struct uart_amba_port *uap = 1544 struct uart_amba_port *uap =
1520 container_of(port, struct uart_amba_port, port); 1545 container_of(port, struct uart_amba_port, port);
1521 unsigned int status = pl011_read(uap, REG_FR); 1546
1547 /* Allow feature register bits to be inverted to work around errata */
1548 unsigned int status = pl011_read(uap, REG_FR) ^ uap->vendor->inv_fr;
1549
1522 return status & (uap->vendor->fr_busy | UART01x_FR_TXFF) ? 1550 return status & (uap->vendor->fr_busy | UART01x_FR_TXFF) ?
1523 0 : TIOCSER_TEMT; 1551 0 : TIOCSER_TEMT;
1524} 1552}
@@ -2114,7 +2142,7 @@ static int pl011_verify_port(struct uart_port *port, struct serial_struct *ser)
2114 return ret; 2142 return ret;
2115} 2143}
2116 2144
2117static struct uart_ops amba_pl011_pops = { 2145static const struct uart_ops amba_pl011_pops = {
2118 .tx_empty = pl011_tx_empty, 2146 .tx_empty = pl011_tx_empty,
2119 .set_mctrl = pl011_set_mctrl, 2147 .set_mctrl = pl011_set_mctrl,
2120 .get_mctrl = pl011_get_mctrl, 2148 .get_mctrl = pl011_get_mctrl,
@@ -2215,10 +2243,12 @@ pl011_console_write(struct console *co, const char *s, unsigned int count)
2215 uart_console_write(&uap->port, s, count, pl011_console_putchar); 2243 uart_console_write(&uap->port, s, count, pl011_console_putchar);
2216 2244
2217 /* 2245 /*
2218 * Finally, wait for transmitter to become empty 2246 * Finally, wait for transmitter to become empty and restore the
2219 * and restore the TCR 2247 * TCR. Allow feature register bits to be inverted to work around
2248 * errata.
2220 */ 2249 */
2221 while (pl011_read(uap, REG_FR) & uap->vendor->fr_busy) 2250 while ((pl011_read(uap, REG_FR) ^ uap->vendor->inv_fr)
2251 & uap->vendor->fr_busy)
2222 cpu_relax(); 2252 cpu_relax();
2223 if (!uap->vendor->always_enabled) 2253 if (!uap->vendor->always_enabled)
2224 pl011_write(old_cr, uap, REG_CR); 2254 pl011_write(old_cr, uap, REG_CR);
@@ -2340,8 +2370,12 @@ static int __init pl011_console_match(struct console *co, char *name, int idx,
2340 resource_size_t addr; 2370 resource_size_t addr;
2341 int i; 2371 int i;
2342 2372
2343 if (strcmp(name, "pl011") != 0) 2373 if (strcmp(name, "qdf2400_e44") == 0) {
2374 pr_info_once("UART: Working around QDF2400 SoC erratum 44");
2375 qdf2400_e44_present = true;
2376 } else if (strcmp(name, "pl011") != 0 || strcmp(name, "ttyAMA") != 0) {
2344 return -ENODEV; 2377 return -ENODEV;
2378 }
2345 2379
2346 if (uart_parse_earlycon(options, &iotype, &addr, &options)) 2380 if (uart_parse_earlycon(options, &iotype, &addr, &options))
2347 return -ENODEV; 2381 return -ENODEV;
@@ -2376,13 +2410,29 @@ static struct console amba_console = {
2376 .device = uart_console_device, 2410 .device = uart_console_device,
2377 .setup = pl011_console_setup, 2411 .setup = pl011_console_setup,
2378 .match = pl011_console_match, 2412 .match = pl011_console_match,
2379 .flags = CON_PRINTBUFFER, 2413 .flags = CON_PRINTBUFFER | CON_ANYTIME,
2380 .index = -1, 2414 .index = -1,
2381 .data = &amba_reg, 2415 .data = &amba_reg,
2382}; 2416};
2383 2417
2384#define AMBA_CONSOLE (&amba_console) 2418#define AMBA_CONSOLE (&amba_console)
2385 2419
2420static void qdf2400_e44_putc(struct uart_port *port, int c)
2421{
2422 while (readl(port->membase + UART01x_FR) & UART01x_FR_TXFF)
2423 cpu_relax();
2424 writel(c, port->membase + UART01x_DR);
2425 while (!(readl(port->membase + UART01x_FR) & UART011_FR_TXFE))
2426 cpu_relax();
2427}
2428
2429static void qdf2400_e44_early_write(struct console *con, const char *s, unsigned n)
2430{
2431 struct earlycon_device *dev = con->data;
2432
2433 uart_console_write(&dev->port, s, n, qdf2400_e44_putc);
2434}
2435
2386static void pl011_putc(struct uart_port *port, int c) 2436static void pl011_putc(struct uart_port *port, int c)
2387{ 2437{
2388 while (readl(port->membase + UART01x_FR) & UART01x_FR_TXFF) 2438 while (readl(port->membase + UART01x_FR) & UART01x_FR_TXFF)
@@ -2408,7 +2458,8 @@ static int __init pl011_early_console_setup(struct earlycon_device *device,
2408 if (!device->port.membase) 2458 if (!device->port.membase)
2409 return -ENODEV; 2459 return -ENODEV;
2410 2460
2411 device->con->write = pl011_early_write; 2461 device->con->write = qdf2400_e44_present ?
2462 qdf2400_e44_early_write : pl011_early_write;
2412 return 0; 2463 return 0;
2413} 2464}
2414OF_EARLYCON_DECLARE(pl011, "arm,pl011", pl011_early_console_setup); 2465OF_EARLYCON_DECLARE(pl011, "arm,pl011", pl011_early_console_setup);
@@ -2645,7 +2696,8 @@ static int sbsa_uart_probe(struct platform_device *pdev)
2645 uap->port.irq = ret; 2696 uap->port.irq = ret;
2646 2697
2647 uap->reg_offset = vendor_sbsa.reg_offset; 2698 uap->reg_offset = vendor_sbsa.reg_offset;
2648 uap->vendor = &vendor_sbsa; 2699 uap->vendor = qdf2400_e44_present ?
2700 &vendor_qdt_qdf2400_e44 : &vendor_sbsa;
2649 uap->fifosize = 32; 2701 uap->fifosize = 32;
2650 uap->port.iotype = vendor_sbsa.access_32b ? UPIO_MEM32 : UPIO_MEM; 2702 uap->port.iotype = vendor_sbsa.access_32b ? UPIO_MEM32 : UPIO_MEM;
2651 uap->port.ops = &sbsa_uart_pops; 2703 uap->port.ops = &sbsa_uart_pops;
diff --git a/drivers/tty/serial/ar933x_uart.c b/drivers/tty/serial/ar933x_uart.c
index 73137f4aac20..decc7f3c1ab2 100644
--- a/drivers/tty/serial/ar933x_uart.c
+++ b/drivers/tty/serial/ar933x_uart.c
@@ -493,7 +493,7 @@ static int ar933x_uart_verify_port(struct uart_port *port,
493 return 0; 493 return 0;
494} 494}
495 495
496static struct uart_ops ar933x_uart_ops = { 496static const struct uart_ops ar933x_uart_ops = {
497 .tx_empty = ar933x_uart_tx_empty, 497 .tx_empty = ar933x_uart_tx_empty,
498 .set_mctrl = ar933x_uart_set_mctrl, 498 .set_mctrl = ar933x_uart_set_mctrl,
499 .get_mctrl = ar933x_uart_get_mctrl, 499 .get_mctrl = ar933x_uart_get_mctrl,
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index fabbe76203bb..dcebb28ffbc4 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -175,6 +175,17 @@ struct atmel_uart_port {
175 unsigned int pending_status; 175 unsigned int pending_status;
176 spinlock_t lock_suspended; 176 spinlock_t lock_suspended;
177 177
178 struct {
179 u32 cr;
180 u32 mr;
181 u32 imr;
182 u32 brgr;
183 u32 rtor;
184 u32 ttgr;
185 u32 fmr;
186 u32 fimr;
187 } cache;
188
178 int (*prepare_rx)(struct uart_port *port); 189 int (*prepare_rx)(struct uart_port *port);
179 int (*prepare_tx)(struct uart_port *port); 190 int (*prepare_tx)(struct uart_port *port);
180 void (*schedule_rx)(struct uart_port *port); 191 void (*schedule_rx)(struct uart_port *port);
@@ -1758,7 +1769,9 @@ static void atmel_get_ip_name(struct uart_port *port)
1758 1769
1759 /* 1770 /*
1760 * Only USART devices from at91sam9260 SOC implement fractional 1771 * Only USART devices from at91sam9260 SOC implement fractional
1761 * baudrate. 1772 * baudrate. It is available for all asynchronous modes, with the
1773 * following restriction: the sampling clock's duty cycle is not
1774 * constant.
1762 */ 1775 */
1763 atmel_port->has_frac_baudrate = false; 1776 atmel_port->has_frac_baudrate = false;
1764 atmel_port->has_hw_timer = false; 1777 atmel_port->has_hw_timer = false;
@@ -2202,8 +2215,7 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
2202 * then 2215 * then
2203 * 8 CD + FP = selected clock / (2 * baudrate) 2216 * 8 CD + FP = selected clock / (2 * baudrate)
2204 */ 2217 */
2205 if (atmel_port->has_frac_baudrate && 2218 if (atmel_port->has_frac_baudrate) {
2206 (mode & ATMEL_US_USMODE) == ATMEL_US_USMODE_NORMAL) {
2207 div = DIV_ROUND_CLOSEST(port->uartclk, baud * 2); 2219 div = DIV_ROUND_CLOSEST(port->uartclk, baud * 2);
2208 cd = div >> 3; 2220 cd = div >> 3;
2209 fp = div & ATMEL_US_FP_MASK; 2221 fp = div & ATMEL_US_FP_MASK;
@@ -2659,6 +2671,20 @@ static int atmel_serial_suspend(struct platform_device *pdev,
2659 cpu_relax(); 2671 cpu_relax();
2660 } 2672 }
2661 2673
2674 if (atmel_is_console_port(port) && !console_suspend_enabled) {
2675 /* Cache register values as we won't get a full shutdown/startup
2676 * cycle
2677 */
2678 atmel_port->cache.mr = atmel_uart_readl(port, ATMEL_US_MR);
2679 atmel_port->cache.imr = atmel_uart_readl(port, ATMEL_US_IMR);
2680 atmel_port->cache.brgr = atmel_uart_readl(port, ATMEL_US_BRGR);
2681 atmel_port->cache.rtor = atmel_uart_readl(port,
2682 atmel_port->rtor);
2683 atmel_port->cache.ttgr = atmel_uart_readl(port, ATMEL_US_TTGR);
2684 atmel_port->cache.fmr = atmel_uart_readl(port, ATMEL_US_FMR);
2685 atmel_port->cache.fimr = atmel_uart_readl(port, ATMEL_US_FIMR);
2686 }
2687
2662 /* we can not wake up if we're running on slow clock */ 2688 /* we can not wake up if we're running on slow clock */
2663 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev); 2689 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
2664 if (atmel_serial_clk_will_stop()) { 2690 if (atmel_serial_clk_will_stop()) {
@@ -2681,6 +2707,25 @@ static int atmel_serial_resume(struct platform_device *pdev)
2681 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 2707 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2682 unsigned long flags; 2708 unsigned long flags;
2683 2709
2710 if (atmel_is_console_port(port) && !console_suspend_enabled) {
2711 atmel_uart_writel(port, ATMEL_US_MR, atmel_port->cache.mr);
2712 atmel_uart_writel(port, ATMEL_US_IER, atmel_port->cache.imr);
2713 atmel_uart_writel(port, ATMEL_US_BRGR, atmel_port->cache.brgr);
2714 atmel_uart_writel(port, atmel_port->rtor,
2715 atmel_port->cache.rtor);
2716 atmel_uart_writel(port, ATMEL_US_TTGR, atmel_port->cache.ttgr);
2717
2718 if (atmel_port->fifo_size) {
2719 atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_FIFOEN |
2720 ATMEL_US_RXFCLR | ATMEL_US_TXFLCLR);
2721 atmel_uart_writel(port, ATMEL_US_FMR,
2722 atmel_port->cache.fmr);
2723 atmel_uart_writel(port, ATMEL_US_FIER,
2724 atmel_port->cache.fimr);
2725 }
2726 atmel_start_rx(port);
2727 }
2728
2684 spin_lock_irqsave(&atmel_port->lock_suspended, flags); 2729 spin_lock_irqsave(&atmel_port->lock_suspended, flags);
2685 if (atmel_port->pending) { 2730 if (atmel_port->pending) {
2686 atmel_handle_receive(port, atmel_port->pending); 2731 atmel_handle_receive(port, atmel_port->pending);
diff --git a/drivers/tty/serial/bfin_sport_uart.c b/drivers/tty/serial/bfin_sport_uart.c
index 984e1c050096..6b03fb12cd19 100644
--- a/drivers/tty/serial/bfin_sport_uart.c
+++ b/drivers/tty/serial/bfin_sport_uart.c
@@ -740,7 +740,7 @@ static int sport_uart_resume(struct device *dev)
740 return 0; 740 return 0;
741} 741}
742 742
743static struct dev_pm_ops bfin_sport_uart_dev_pm_ops = { 743static const struct dev_pm_ops bfin_sport_uart_dev_pm_ops = {
744 .suspend = sport_uart_suspend, 744 .suspend = sport_uart_suspend,
745 .resume = sport_uart_resume, 745 .resume = sport_uart_resume,
746}; 746};
diff --git a/drivers/tty/serial/cpm_uart/cpm_uart_core.c b/drivers/tty/serial/cpm_uart/cpm_uart_core.c
index d3e3d42c0c12..f6bcc19c99d5 100644
--- a/drivers/tty/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/tty/serial/cpm_uart/cpm_uart_core.c
@@ -1302,7 +1302,7 @@ static int __init cpm_uart_console_setup(struct console *co, char *options)
1302 struct uart_cpm_port *pinfo; 1302 struct uart_cpm_port *pinfo;
1303 struct uart_port *port; 1303 struct uart_port *port;
1304 1304
1305 struct device_node *np = NULL; 1305 struct device_node *np;
1306 int i = 0; 1306 int i = 0;
1307 1307
1308 if (co->index >= UART_NR) { 1308 if (co->index >= UART_NR) {
@@ -1311,17 +1311,19 @@ static int __init cpm_uart_console_setup(struct console *co, char *options)
1311 return -ENODEV; 1311 return -ENODEV;
1312 } 1312 }
1313 1313
1314 do { 1314 for_each_node_by_type(np, "serial") {
1315 np = of_find_node_by_type(np, "serial");
1316 if (!np)
1317 return -ENODEV;
1318
1319 if (!of_device_is_compatible(np, "fsl,cpm1-smc-uart") && 1315 if (!of_device_is_compatible(np, "fsl,cpm1-smc-uart") &&
1320 !of_device_is_compatible(np, "fsl,cpm1-scc-uart") && 1316 !of_device_is_compatible(np, "fsl,cpm1-scc-uart") &&
1321 !of_device_is_compatible(np, "fsl,cpm2-smc-uart") && 1317 !of_device_is_compatible(np, "fsl,cpm2-smc-uart") &&
1322 !of_device_is_compatible(np, "fsl,cpm2-scc-uart")) 1318 !of_device_is_compatible(np, "fsl,cpm2-scc-uart"))
1323 i--; 1319 continue;
1324 } while (i++ != co->index); 1320
1321 if (i++ == co->index)
1322 break;
1323 }
1324
1325 if (!np)
1326 return -ENODEV;
1325 1327
1326 pinfo = &cpm_uart_ports[co->index]; 1328 pinfo = &cpm_uart_ports[co->index];
1327 1329
diff --git a/drivers/tty/serial/dz.c b/drivers/tty/serial/dz.c
index c121f16a973f..ff465ff43577 100644
--- a/drivers/tty/serial/dz.c
+++ b/drivers/tty/serial/dz.c
@@ -739,7 +739,7 @@ static int dz_verify_port(struct uart_port *uport, struct serial_struct *ser)
739 return ret; 739 return ret;
740} 740}
741 741
742static struct uart_ops dz_ops = { 742static const struct uart_ops dz_ops = {
743 .tx_empty = dz_tx_empty, 743 .tx_empty = dz_tx_empty,
744 .get_mctrl = dz_get_mctrl, 744 .get_mctrl = dz_get_mctrl,
745 .set_mctrl = dz_set_mctrl, 745 .set_mctrl = dz_set_mctrl,
diff --git a/drivers/tty/serial/efm32-uart.c b/drivers/tty/serial/efm32-uart.c
index 195acc868763..ebd8569f9ad5 100644
--- a/drivers/tty/serial/efm32-uart.c
+++ b/drivers/tty/serial/efm32-uart.c
@@ -487,7 +487,7 @@ static int efm32_uart_verify_port(struct uart_port *port,
487 return ret; 487 return ret;
488} 488}
489 489
490static struct uart_ops efm32_uart_pops = { 490static const struct uart_ops efm32_uart_pops = {
491 .tx_empty = efm32_uart_tx_empty, 491 .tx_empty = efm32_uart_tx_empty,
492 .set_mctrl = efm32_uart_set_mctrl, 492 .set_mctrl = efm32_uart_set_mctrl,
493 .get_mctrl = efm32_uart_get_mctrl, 493 .get_mctrl = efm32_uart_get_mctrl,
diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
index a1c6519837a4..f02934ffb329 100644
--- a/drivers/tty/serial/fsl_lpuart.c
+++ b/drivers/tty/serial/fsl_lpuart.c
@@ -1407,6 +1407,18 @@ lpuart_set_termios(struct uart_port *port, struct ktermios *termios,
1407 /* ask the core to calculate the divisor */ 1407 /* ask the core to calculate the divisor */
1408 baud = uart_get_baud_rate(port, termios, old, 50, port->uartclk / 16); 1408 baud = uart_get_baud_rate(port, termios, old, 50, port->uartclk / 16);
1409 1409
1410 /*
1411 * Need to update the Ring buffer length according to the selected
1412 * baud rate and restart Rx DMA path.
1413 *
1414 * Since timer function acqures sport->port.lock, need to stop before
1415 * acquring same lock because otherwise del_timer_sync() can deadlock.
1416 */
1417 if (old && sport->lpuart_dma_rx_use) {
1418 del_timer_sync(&sport->lpuart_timer);
1419 lpuart_dma_rx_free(&sport->port);
1420 }
1421
1410 spin_lock_irqsave(&sport->port.lock, flags); 1422 spin_lock_irqsave(&sport->port.lock, flags);
1411 1423
1412 sport->port.read_status_mask = 0; 1424 sport->port.read_status_mask = 0;
@@ -1456,22 +1468,11 @@ lpuart_set_termios(struct uart_port *port, struct ktermios *termios,
1456 /* restore control register */ 1468 /* restore control register */
1457 writeb(old_cr2, sport->port.membase + UARTCR2); 1469 writeb(old_cr2, sport->port.membase + UARTCR2);
1458 1470
1459 /* 1471 if (old && sport->lpuart_dma_rx_use) {
1460 * If new baud rate is set, we will also need to update the Ring buffer 1472 if (!lpuart_start_rx_dma(sport))
1461 * length according to the selected baud rate and restart Rx DMA path.
1462 */
1463 if (old) {
1464 if (sport->lpuart_dma_rx_use) {
1465 del_timer_sync(&sport->lpuart_timer);
1466 lpuart_dma_rx_free(&sport->port);
1467 }
1468
1469 if (sport->dma_rx_chan && !lpuart_start_rx_dma(sport)) {
1470 sport->lpuart_dma_rx_use = true;
1471 rx_dma_timer_init(sport); 1473 rx_dma_timer_init(sport);
1472 } else { 1474 else
1473 sport->lpuart_dma_rx_use = false; 1475 sport->lpuart_dma_rx_use = false;
1474 }
1475 } 1476 }
1476 1477
1477 spin_unlock_irqrestore(&sport->port.lock, flags); 1478 spin_unlock_irqrestore(&sport->port.lock, flags);
@@ -2131,12 +2132,10 @@ static int lpuart_resume(struct device *dev)
2131 2132
2132 if (sport->lpuart_dma_rx_use) { 2133 if (sport->lpuart_dma_rx_use) {
2133 if (sport->port.irq_wake) { 2134 if (sport->port.irq_wake) {
2134 if (!lpuart_start_rx_dma(sport)) { 2135 if (!lpuart_start_rx_dma(sport))
2135 sport->lpuart_dma_rx_use = true;
2136 rx_dma_timer_init(sport); 2136 rx_dma_timer_init(sport);
2137 } else { 2137 else
2138 sport->lpuart_dma_rx_use = false; 2138 sport->lpuart_dma_rx_use = false;
2139 }
2140 } 2139 }
2141 } 2140 }
2142 2141
diff --git a/drivers/tty/serial/icom.c b/drivers/tty/serial/icom.c
index d83783cfbade..fe92d74f4ea5 100644
--- a/drivers/tty/serial/icom.c
+++ b/drivers/tty/serial/icom.c
@@ -1286,7 +1286,7 @@ static void icom_config_port(struct uart_port *port, int flags)
1286 port->type = PORT_ICOM; 1286 port->type = PORT_ICOM;
1287} 1287}
1288 1288
1289static struct uart_ops icom_ops = { 1289static const struct uart_ops icom_ops = {
1290 .tx_empty = icom_tx_empty, 1290 .tx_empty = icom_tx_empty,
1291 .set_mctrl = icom_set_mctrl, 1291 .set_mctrl = icom_set_mctrl,
1292 .get_mctrl = icom_get_mctrl, 1292 .get_mctrl = icom_get_mctrl,
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index a70356dad1b7..e3e152cbc75e 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -205,6 +205,7 @@ struct imx_port {
205 struct timer_list timer; 205 struct timer_list timer;
206 unsigned int old_status; 206 unsigned int old_status;
207 unsigned int have_rtscts:1; 207 unsigned int have_rtscts:1;
208 unsigned int have_rtsgpio:1;
208 unsigned int dte_mode:1; 209 unsigned int dte_mode:1;
209 unsigned int irda_inv_rx:1; 210 unsigned int irda_inv_rx:1;
210 unsigned int irda_inv_tx:1; 211 unsigned int irda_inv_tx:1;
@@ -335,15 +336,15 @@ static void imx_port_ucrs_restore(struct uart_port *port,
335 336
336static void imx_port_rts_active(struct imx_port *sport, unsigned long *ucr2) 337static void imx_port_rts_active(struct imx_port *sport, unsigned long *ucr2)
337{ 338{
338 *ucr2 &= ~UCR2_CTSC; 339 *ucr2 &= ~(UCR2_CTSC | UCR2_CTS);
339 *ucr2 |= UCR2_CTS;
340 340
341 mctrl_gpio_set(sport->gpios, sport->port.mctrl | TIOCM_RTS); 341 mctrl_gpio_set(sport->gpios, sport->port.mctrl | TIOCM_RTS);
342} 342}
343 343
344static void imx_port_rts_inactive(struct imx_port *sport, unsigned long *ucr2) 344static void imx_port_rts_inactive(struct imx_port *sport, unsigned long *ucr2)
345{ 345{
346 *ucr2 &= ~(UCR2_CTSC | UCR2_CTS); 346 *ucr2 &= ~UCR2_CTSC;
347 *ucr2 |= UCR2_CTS;
347 348
348 mctrl_gpio_set(sport->gpios, sport->port.mctrl & ~TIOCM_RTS); 349 mctrl_gpio_set(sport->gpios, sport->port.mctrl & ~TIOCM_RTS);
349} 350}
@@ -376,9 +377,9 @@ static void imx_stop_tx(struct uart_port *port)
376 readl(port->membase + USR2) & USR2_TXDC) { 377 readl(port->membase + USR2) & USR2_TXDC) {
377 temp = readl(port->membase + UCR2); 378 temp = readl(port->membase + UCR2);
378 if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND) 379 if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
379 imx_port_rts_inactive(sport, &temp);
380 else
381 imx_port_rts_active(sport, &temp); 380 imx_port_rts_active(sport, &temp);
381 else
382 imx_port_rts_inactive(sport, &temp);
382 temp |= UCR2_RXEN; 383 temp |= UCR2_RXEN;
383 writel(temp, port->membase + UCR2); 384 writel(temp, port->membase + UCR2);
384 385
@@ -584,9 +585,9 @@ static void imx_start_tx(struct uart_port *port)
584 if (port->rs485.flags & SER_RS485_ENABLED) { 585 if (port->rs485.flags & SER_RS485_ENABLED) {
585 temp = readl(port->membase + UCR2); 586 temp = readl(port->membase + UCR2);
586 if (port->rs485.flags & SER_RS485_RTS_ON_SEND) 587 if (port->rs485.flags & SER_RS485_RTS_ON_SEND)
587 imx_port_rts_inactive(sport, &temp);
588 else
589 imx_port_rts_active(sport, &temp); 588 imx_port_rts_active(sport, &temp);
589 else
590 imx_port_rts_inactive(sport, &temp);
590 if (!(port->rs485.flags & SER_RS485_RX_DURING_TX)) 591 if (!(port->rs485.flags & SER_RS485_RX_DURING_TX))
591 temp &= ~UCR2_RXEN; 592 temp &= ~UCR2_RXEN;
592 writel(temp, port->membase + UCR2); 593 writel(temp, port->membase + UCR2);
@@ -1476,9 +1477,9 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios,
1476 */ 1477 */
1477 if (port->rs485.flags & 1478 if (port->rs485.flags &
1478 SER_RS485_RTS_AFTER_SEND) 1479 SER_RS485_RTS_AFTER_SEND)
1479 imx_port_rts_inactive(sport, &ucr2);
1480 else
1481 imx_port_rts_active(sport, &ucr2); 1480 imx_port_rts_active(sport, &ucr2);
1481 else
1482 imx_port_rts_inactive(sport, &ucr2);
1482 } else { 1483 } else {
1483 imx_port_rts_auto(sport, &ucr2); 1484 imx_port_rts_auto(sport, &ucr2);
1484 } 1485 }
@@ -1488,9 +1489,9 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios,
1488 } else if (port->rs485.flags & SER_RS485_ENABLED) { 1489 } else if (port->rs485.flags & SER_RS485_ENABLED) {
1489 /* disable transmitter */ 1490 /* disable transmitter */
1490 if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND) 1491 if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
1491 imx_port_rts_inactive(sport, &ucr2);
1492 else
1493 imx_port_rts_active(sport, &ucr2); 1492 imx_port_rts_active(sport, &ucr2);
1493 else
1494 imx_port_rts_inactive(sport, &ucr2);
1494 } 1495 }
1495 1496
1496 1497
@@ -1725,16 +1726,16 @@ static int imx_rs485_config(struct uart_port *port,
1725 rs485conf->delay_rts_after_send = 0; 1726 rs485conf->delay_rts_after_send = 0;
1726 1727
1727 /* RTS is required to control the transmitter */ 1728 /* RTS is required to control the transmitter */
1728 if (!sport->have_rtscts) 1729 if (!sport->have_rtscts && !sport->have_rtsgpio)
1729 rs485conf->flags &= ~SER_RS485_ENABLED; 1730 rs485conf->flags &= ~SER_RS485_ENABLED;
1730 1731
1731 if (rs485conf->flags & SER_RS485_ENABLED) { 1732 if (rs485conf->flags & SER_RS485_ENABLED) {
1732 /* disable transmitter */ 1733 /* disable transmitter */
1733 temp = readl(sport->port.membase + UCR2); 1734 temp = readl(sport->port.membase + UCR2);
1734 if (rs485conf->flags & SER_RS485_RTS_AFTER_SEND) 1735 if (rs485conf->flags & SER_RS485_RTS_AFTER_SEND)
1735 imx_port_rts_inactive(sport, &temp);
1736 else
1737 imx_port_rts_active(sport, &temp); 1736 imx_port_rts_active(sport, &temp);
1737 else
1738 imx_port_rts_inactive(sport, &temp);
1738 writel(temp, sport->port.membase + UCR2); 1739 writel(temp, sport->port.membase + UCR2);
1739 } 1740 }
1740 1741
@@ -2048,6 +2049,9 @@ static int serial_imx_probe_dt(struct imx_port *sport,
2048 if (of_get_property(np, "fsl,dte-mode", NULL)) 2049 if (of_get_property(np, "fsl,dte-mode", NULL))
2049 sport->dte_mode = 1; 2050 sport->dte_mode = 1;
2050 2051
2052 if (of_get_property(np, "rts-gpios", NULL))
2053 sport->have_rtsgpio = 1;
2054
2051 return 0; 2055 return 0;
2052} 2056}
2053#else 2057#else
diff --git a/drivers/tty/serial/ioc3_serial.c b/drivers/tty/serial/ioc3_serial.c
index 27b5fefac171..2a61dd6b4009 100644
--- a/drivers/tty/serial/ioc3_serial.c
+++ b/drivers/tty/serial/ioc3_serial.c
@@ -1873,7 +1873,7 @@ static int ic3_request_port(struct uart_port *port)
1873} 1873}
1874 1874
1875/* Associate the uart functions above - given to serial core */ 1875/* Associate the uart functions above - given to serial core */
1876static struct uart_ops ioc3_ops = { 1876static const struct uart_ops ioc3_ops = {
1877 .tx_empty = ic3_tx_empty, 1877 .tx_empty = ic3_tx_empty,
1878 .set_mctrl = ic3_set_mctrl, 1878 .set_mctrl = ic3_set_mctrl,
1879 .get_mctrl = ic3_get_mctrl, 1879 .get_mctrl = ic3_get_mctrl,
diff --git a/drivers/tty/serial/ioc4_serial.c b/drivers/tty/serial/ioc4_serial.c
index 3be051abb2a2..6ad26f802b51 100644
--- a/drivers/tty/serial/ioc4_serial.c
+++ b/drivers/tty/serial/ioc4_serial.c
@@ -2596,7 +2596,7 @@ static int ic4_request_port(struct uart_port *port)
2596 2596
2597/* Associate the uart functions above - given to serial core */ 2597/* Associate the uart functions above - given to serial core */
2598 2598
2599static struct uart_ops ioc4_ops = { 2599static const struct uart_ops ioc4_ops = {
2600 .tx_empty = ic4_tx_empty, 2600 .tx_empty = ic4_tx_empty,
2601 .set_mctrl = ic4_set_mctrl, 2601 .set_mctrl = ic4_set_mctrl,
2602 .get_mctrl = ic4_get_mctrl, 2602 .get_mctrl = ic4_get_mctrl,
diff --git a/drivers/tty/serial/ip22zilog.c b/drivers/tty/serial/ip22zilog.c
index 991e6dce916e..7ddddb4c3844 100644
--- a/drivers/tty/serial/ip22zilog.c
+++ b/drivers/tty/serial/ip22zilog.c
@@ -930,7 +930,7 @@ static int ip22zilog_verify_port(struct uart_port *port, struct serial_struct *s
930 return -EINVAL; 930 return -EINVAL;
931} 931}
932 932
933static struct uart_ops ip22zilog_pops = { 933static const struct uart_ops ip22zilog_pops = {
934 .tx_empty = ip22zilog_tx_empty, 934 .tx_empty = ip22zilog_tx_empty,
935 .set_mctrl = ip22zilog_set_mctrl, 935 .set_mctrl = ip22zilog_set_mctrl,
936 .get_mctrl = ip22zilog_get_mctrl, 936 .get_mctrl = ip22zilog_get_mctrl,
diff --git a/drivers/tty/serial/lantiq.c b/drivers/tty/serial/lantiq.c
index b88832e8ee82..22df94f107e5 100644
--- a/drivers/tty/serial/lantiq.c
+++ b/drivers/tty/serial/lantiq.c
@@ -16,7 +16,7 @@
16 * 16 *
17 * Copyright (C) 2004 Infineon IFAP DC COM CPE 17 * Copyright (C) 2004 Infineon IFAP DC COM CPE
18 * Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org> 18 * Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
19 * Copyright (C) 2007 John Crispin <blogic@openwrt.org> 19 * Copyright (C) 2007 John Crispin <john@phrozen.org>
20 * Copyright (C) 2010 Thomas Langer, <thomas.langer@lantiq.com> 20 * Copyright (C) 2010 Thomas Langer, <thomas.langer@lantiq.com>
21 */ 21 */
22 22
@@ -557,7 +557,7 @@ lqasc_verify_port(struct uart_port *port,
557 return ret; 557 return ret;
558} 558}
559 559
560static struct uart_ops lqasc_pops = { 560static const struct uart_ops lqasc_pops = {
561 .tx_empty = lqasc_tx_empty, 561 .tx_empty = lqasc_tx_empty,
562 .set_mctrl = lqasc_set_mctrl, 562 .set_mctrl = lqasc_set_mctrl,
563 .get_mctrl = lqasc_get_mctrl, 563 .get_mctrl = lqasc_get_mctrl,
@@ -590,13 +590,20 @@ lqasc_console_putchar(struct uart_port *port, int ch)
590 ltq_w8(ch, port->membase + LTQ_ASC_TBUF); 590 ltq_w8(ch, port->membase + LTQ_ASC_TBUF);
591} 591}
592 592
593static void lqasc_serial_port_write(struct uart_port *port, const char *s,
594 u_int count)
595{
596 unsigned long flags;
597
598 spin_lock_irqsave(&ltq_asc_lock, flags);
599 uart_console_write(port, s, count, lqasc_console_putchar);
600 spin_unlock_irqrestore(&ltq_asc_lock, flags);
601}
593 602
594static void 603static void
595lqasc_console_write(struct console *co, const char *s, u_int count) 604lqasc_console_write(struct console *co, const char *s, u_int count)
596{ 605{
597 struct ltq_uart_port *ltq_port; 606 struct ltq_uart_port *ltq_port;
598 struct uart_port *port;
599 unsigned long flags;
600 607
601 if (co->index >= MAXPORTS) 608 if (co->index >= MAXPORTS)
602 return; 609 return;
@@ -605,11 +612,7 @@ lqasc_console_write(struct console *co, const char *s, u_int count)
605 if (!ltq_port) 612 if (!ltq_port)
606 return; 613 return;
607 614
608 port = &ltq_port->port; 615 lqasc_serial_port_write(&ltq_port->port, s, count);
609
610 spin_lock_irqsave(&ltq_asc_lock, flags);
611 uart_console_write(port, s, count, lqasc_console_putchar);
612 spin_unlock_irqrestore(&ltq_asc_lock, flags);
613} 616}
614 617
615static int __init 618static int __init
@@ -659,6 +662,27 @@ lqasc_console_init(void)
659} 662}
660console_initcall(lqasc_console_init); 663console_initcall(lqasc_console_init);
661 664
665static void lqasc_serial_early_console_write(struct console *co,
666 const char *s,
667 u_int count)
668{
669 struct earlycon_device *dev = co->data;
670
671 lqasc_serial_port_write(&dev->port, s, count);
672}
673
674static int __init
675lqasc_serial_early_console_setup(struct earlycon_device *device,
676 const char *opt)
677{
678 if (!device->port.membase)
679 return -ENODEV;
680
681 device->con->write = lqasc_serial_early_console_write;
682 return 0;
683}
684OF_EARLYCON_DECLARE(lantiq, DRVNAME, lqasc_serial_early_console_setup);
685
662static struct uart_driver lqasc_reg = { 686static struct uart_driver lqasc_reg = {
663 .owner = THIS_MODULE, 687 .owner = THIS_MODULE,
664 .driver_name = DRVNAME, 688 .driver_name = DRVNAME,
diff --git a/drivers/tty/serial/lpc32xx_hs.c b/drivers/tty/serial/lpc32xx_hs.c
index 7eb04ae71cc8..cea57ff32c33 100644
--- a/drivers/tty/serial/lpc32xx_hs.c
+++ b/drivers/tty/serial/lpc32xx_hs.c
@@ -645,7 +645,7 @@ static int serial_lpc32xx_verify_port(struct uart_port *port,
645 return ret; 645 return ret;
646} 646}
647 647
648static struct uart_ops serial_lpc32xx_pops = { 648static const struct uart_ops serial_lpc32xx_pops = {
649 .tx_empty = serial_lpc32xx_tx_empty, 649 .tx_empty = serial_lpc32xx_tx_empty,
650 .set_mctrl = serial_lpc32xx_set_mctrl, 650 .set_mctrl = serial_lpc32xx_set_mctrl,
651 .get_mctrl = serial_lpc32xx_get_mctrl, 651 .get_mctrl = serial_lpc32xx_get_mctrl,
diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c
index 8a3e92638e10..9dfedbe6c071 100644
--- a/drivers/tty/serial/max310x.c
+++ b/drivers/tty/serial/max310x.c
@@ -236,7 +236,7 @@
236 236
237/* Misc definitions */ 237/* Misc definitions */
238#define MAX310X_FIFO_SIZE (128) 238#define MAX310X_FIFO_SIZE (128)
239#define MAX310x_REV_MASK (0xfc) 239#define MAX310x_REV_MASK (0xf8)
240 240
241/* MAX3107 specific */ 241/* MAX3107 specific */
242#define MAX3107_REV_ID (0xa0) 242#define MAX3107_REV_ID (0xa0)
diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
index 6aea0f4a9165..60f16795d16b 100644
--- a/drivers/tty/serial/meson_uart.c
+++ b/drivers/tty/serial/meson_uart.c
@@ -364,7 +364,7 @@ static void meson_uart_set_termios(struct uart_port *port,
364 364
365 writel(val, port->membase + AML_UART_CONTROL); 365 writel(val, port->membase + AML_UART_CONTROL);
366 366
367 baud = uart_get_baud_rate(port, termios, old, 9600, 115200); 367 baud = uart_get_baud_rate(port, termios, old, 9600, 4000000);
368 meson_uart_change_speed(port, baud); 368 meson_uart_change_speed(port, baud);
369 369
370 port->read_status_mask = AML_UART_TX_FIFO_WERR; 370 port->read_status_mask = AML_UART_TX_FIFO_WERR;
diff --git a/drivers/tty/serial/mpsc.c b/drivers/tty/serial/mpsc.c
index 4a3021bcc859..1a60a2063e75 100644
--- a/drivers/tty/serial/mpsc.c
+++ b/drivers/tty/serial/mpsc.c
@@ -1670,7 +1670,7 @@ static void mpsc_put_poll_char(struct uart_port *port,
1670} 1670}
1671#endif 1671#endif
1672 1672
1673static struct uart_ops mpsc_pops = { 1673static const struct uart_ops mpsc_pops = {
1674 .tx_empty = mpsc_tx_empty, 1674 .tx_empty = mpsc_tx_empty,
1675 .set_mctrl = mpsc_set_mctrl, 1675 .set_mctrl = mpsc_set_mctrl,
1676 .get_mctrl = mpsc_get_mctrl, 1676 .get_mctrl = mpsc_get_mctrl,
diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c
index 7312e7e01b7e..6788e7532dff 100644
--- a/drivers/tty/serial/msm_serial.c
+++ b/drivers/tty/serial/msm_serial.c
@@ -1809,6 +1809,7 @@ static const struct of_device_id msm_match_table[] = {
1809 { .compatible = "qcom,msm-uartdm" }, 1809 { .compatible = "qcom,msm-uartdm" },
1810 {} 1810 {}
1811}; 1811};
1812MODULE_DEVICE_TABLE(of, msm_match_table);
1812 1813
1813static struct platform_driver msm_platform_driver = { 1814static struct platform_driver msm_platform_driver = {
1814 .remove = msm_serial_remove, 1815 .remove = msm_serial_remove,
diff --git a/drivers/tty/serial/mxs-auart.c b/drivers/tty/serial/mxs-auart.c
index 8c1c9112b3fd..6989b227d134 100644
--- a/drivers/tty/serial/mxs-auart.c
+++ b/drivers/tty/serial/mxs-auart.c
@@ -95,6 +95,7 @@
95#define AUART_LINECTRL_BAUD_DIVFRAC_SHIFT 8 95#define AUART_LINECTRL_BAUD_DIVFRAC_SHIFT 8
96#define AUART_LINECTRL_BAUD_DIVFRAC_MASK 0x00003f00 96#define AUART_LINECTRL_BAUD_DIVFRAC_MASK 0x00003f00
97#define AUART_LINECTRL_BAUD_DIVFRAC(v) (((v) & 0x3f) << 8) 97#define AUART_LINECTRL_BAUD_DIVFRAC(v) (((v) & 0x3f) << 8)
98#define AUART_LINECTRL_SPS (1 << 7)
98#define AUART_LINECTRL_WLEN_MASK 0x00000060 99#define AUART_LINECTRL_WLEN_MASK 0x00000060
99#define AUART_LINECTRL_WLEN(v) (((v) & 0x3) << 5) 100#define AUART_LINECTRL_WLEN(v) (((v) & 0x3) << 5)
100#define AUART_LINECTRL_FEN (1 << 4) 101#define AUART_LINECTRL_FEN (1 << 4)
@@ -1014,6 +1015,8 @@ static void mxs_auart_settermios(struct uart_port *u,
1014 ctrl |= AUART_LINECTRL_PEN; 1015 ctrl |= AUART_LINECTRL_PEN;
1015 if ((cflag & PARODD) == 0) 1016 if ((cflag & PARODD) == 0)
1016 ctrl |= AUART_LINECTRL_EPS; 1017 ctrl |= AUART_LINECTRL_EPS;
1018 if (cflag & CMSPAR)
1019 ctrl |= AUART_LINECTRL_SPS;
1017 } 1020 }
1018 1021
1019 u->read_status_mask = AUART_STAT_OERR; 1022 u->read_status_mask = AUART_STAT_OERR;
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index a2a529994ba5..6c6f82ad8d5c 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -1234,6 +1234,61 @@ out:
1234 1234
1235#ifdef CONFIG_SERIAL_OMAP_CONSOLE 1235#ifdef CONFIG_SERIAL_OMAP_CONSOLE
1236 1236
1237#ifdef CONFIG_SERIAL_EARLYCON
1238static unsigned int __init omap_serial_early_in(struct uart_port *port,
1239 int offset)
1240{
1241 offset <<= port->regshift;
1242 return readw(port->membase + offset);
1243}
1244
1245static void __init omap_serial_early_out(struct uart_port *port, int offset,
1246 int value)
1247{
1248 offset <<= port->regshift;
1249 writew(value, port->membase + offset);
1250}
1251
1252static void __init omap_serial_early_putc(struct uart_port *port, int c)
1253{
1254 unsigned int status;
1255
1256 for (;;) {
1257 status = omap_serial_early_in(port, UART_LSR);
1258 if ((status & BOTH_EMPTY) == BOTH_EMPTY)
1259 break;
1260 cpu_relax();
1261 }
1262 omap_serial_early_out(port, UART_TX, c);
1263}
1264
1265static void __init early_omap_serial_write(struct console *console,
1266 const char *s, unsigned int count)
1267{
1268 struct earlycon_device *device = console->data;
1269 struct uart_port *port = &device->port;
1270
1271 uart_console_write(port, s, count, omap_serial_early_putc);
1272}
1273
1274static int __init early_omap_serial_setup(struct earlycon_device *device,
1275 const char *options)
1276{
1277 struct uart_port *port = &device->port;
1278
1279 if (!(device->port.membase || device->port.iobase))
1280 return -ENODEV;
1281
1282 port->regshift = 2;
1283 device->con->write = early_omap_serial_write;
1284 return 0;
1285}
1286
1287OF_EARLYCON_DECLARE(omapserial, "ti,omap2-uart", early_omap_serial_setup);
1288OF_EARLYCON_DECLARE(omapserial, "ti,omap3-uart", early_omap_serial_setup);
1289OF_EARLYCON_DECLARE(omapserial, "ti,omap4-uart", early_omap_serial_setup);
1290#endif /* CONFIG_SERIAL_EARLYCON */
1291
1237static struct uart_omap_port *serial_omap_console_ports[OMAP_MAX_HSUART_PORTS]; 1292static struct uart_omap_port *serial_omap_console_ports[OMAP_MAX_HSUART_PORTS];
1238 1293
1239static struct uart_driver serial_omap_reg; 1294static struct uart_driver serial_omap_reg;
@@ -1395,7 +1450,7 @@ serial_omap_config_rs485(struct uart_port *port, struct serial_rs485 *rs485)
1395 return 0; 1450 return 0;
1396} 1451}
1397 1452
1398static struct uart_ops serial_omap_pops = { 1453static const struct uart_ops serial_omap_pops = {
1399 .tx_empty = serial_omap_tx_empty, 1454 .tx_empty = serial_omap_tx_empty,
1400 .set_mctrl = serial_omap_set_mctrl, 1455 .set_mctrl = serial_omap_set_mctrl,
1401 .get_mctrl = serial_omap_get_mctrl, 1456 .get_mctrl = serial_omap_get_mctrl,
diff --git a/drivers/tty/serial/pic32_uart.c b/drivers/tty/serial/pic32_uart.c
index 7f8e99bbcb73..00a33eb859d3 100644
--- a/drivers/tty/serial/pic32_uart.c
+++ b/drivers/tty/serial/pic32_uart.c
@@ -495,13 +495,13 @@ static int pic32_uart_startup(struct uart_port *port)
495 495
496out_t: 496out_t:
497 kfree(sport->irq_tx_name); 497 kfree(sport->irq_tx_name);
498 free_irq(sport->irq_tx, sport); 498 free_irq(sport->irq_tx, port);
499out_r: 499out_r:
500 kfree(sport->irq_rx_name); 500 kfree(sport->irq_rx_name);
501 free_irq(sport->irq_rx, sport); 501 free_irq(sport->irq_rx, port);
502out_f: 502out_f:
503 kfree(sport->irq_fault_name); 503 kfree(sport->irq_fault_name);
504 free_irq(sport->irq_fault, sport); 504 free_irq(sport->irq_fault, port);
505out_done: 505out_done:
506 return ret; 506 return ret;
507} 507}
diff --git a/drivers/tty/serial/pmac_zilog.c b/drivers/tty/serial/pmac_zilog.c
index b24b0556f5a8..0da52947e59e 100644
--- a/drivers/tty/serial/pmac_zilog.c
+++ b/drivers/tty/serial/pmac_zilog.c
@@ -1379,7 +1379,7 @@ static void pmz_poll_put_char(struct uart_port *port, unsigned char c)
1379 1379
1380#endif /* CONFIG_CONSOLE_POLL */ 1380#endif /* CONFIG_CONSOLE_POLL */
1381 1381
1382static struct uart_ops pmz_pops = { 1382static const struct uart_ops pmz_pops = {
1383 .tx_empty = pmz_tx_empty, 1383 .tx_empty = pmz_tx_empty,
1384 .set_mctrl = pmz_set_mctrl, 1384 .set_mctrl = pmz_set_mctrl,
1385 .get_mctrl = pmz_get_mctrl, 1385 .get_mctrl = pmz_get_mctrl,
diff --git a/drivers/tty/serial/pnx8xxx_uart.c b/drivers/tty/serial/pnx8xxx_uart.c
index 7a3bb9cf1f2e..dab2668d3879 100644
--- a/drivers/tty/serial/pnx8xxx_uart.c
+++ b/drivers/tty/serial/pnx8xxx_uart.c
@@ -631,7 +631,7 @@ pnx8xxx_verify_port(struct uart_port *port, struct serial_struct *ser)
631 return ret; 631 return ret;
632} 632}
633 633
634static struct uart_ops pnx8xxx_pops = { 634static const struct uart_ops pnx8xxx_pops = {
635 .tx_empty = pnx8xxx_tx_empty, 635 .tx_empty = pnx8xxx_tx_empty,
636 .set_mctrl = pnx8xxx_set_mctrl, 636 .set_mctrl = pnx8xxx_set_mctrl,
637 .get_mctrl = pnx8xxx_get_mctrl, 637 .get_mctrl = pnx8xxx_get_mctrl,
diff --git a/drivers/tty/serial/pxa.c b/drivers/tty/serial/pxa.c
index 75952811c0da..905631df1f8b 100644
--- a/drivers/tty/serial/pxa.c
+++ b/drivers/tty/serial/pxa.c
@@ -762,7 +762,7 @@ static struct console serial_pxa_console = {
762#define PXA_CONSOLE NULL 762#define PXA_CONSOLE NULL
763#endif 763#endif
764 764
765static struct uart_ops serial_pxa_pops = { 765static const struct uart_ops serial_pxa_pops = {
766 .tx_empty = serial_pxa_tx_empty, 766 .tx_empty = serial_pxa_tx_empty,
767 .set_mctrl = serial_pxa_set_mctrl, 767 .set_mctrl = serial_pxa_set_mctrl,
768 .get_mctrl = serial_pxa_get_mctrl, 768 .get_mctrl = serial_pxa_get_mctrl,
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index f44615fa474d..b4f86c219db1 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -859,7 +859,6 @@ static void s3c24xx_serial_break_ctl(struct uart_port *port, int break_state)
859static int s3c24xx_serial_request_dma(struct s3c24xx_uart_port *p) 859static int s3c24xx_serial_request_dma(struct s3c24xx_uart_port *p)
860{ 860{
861 struct s3c24xx_uart_dma *dma = p->dma; 861 struct s3c24xx_uart_dma *dma = p->dma;
862 dma_cap_mask_t mask;
863 unsigned long flags; 862 unsigned long flags;
864 863
865 /* Default slave configuration parameters */ 864 /* Default slave configuration parameters */
@@ -876,21 +875,17 @@ static int s3c24xx_serial_request_dma(struct s3c24xx_uart_port *p)
876 else 875 else
877 dma->tx_conf.dst_maxburst = 1; 876 dma->tx_conf.dst_maxburst = 1;
878 877
879 dma_cap_zero(mask); 878 dma->rx_chan = dma_request_chan(p->port.dev, "rx");
880 dma_cap_set(DMA_SLAVE, mask);
881 879
882 dma->rx_chan = dma_request_slave_channel_compat(mask, dma->fn, 880 if (IS_ERR(dma->rx_chan))
883 dma->rx_param, p->port.dev, "rx"); 881 return PTR_ERR(dma->rx_chan);
884 if (!dma->rx_chan)
885 return -ENODEV;
886 882
887 dmaengine_slave_config(dma->rx_chan, &dma->rx_conf); 883 dmaengine_slave_config(dma->rx_chan, &dma->rx_conf);
888 884
889 dma->tx_chan = dma_request_slave_channel_compat(mask, dma->fn, 885 dma->tx_chan = dma_request_chan(p->port.dev, "tx");
890 dma->tx_param, p->port.dev, "tx"); 886 if (IS_ERR(dma->tx_chan)) {
891 if (!dma->tx_chan) {
892 dma_release_channel(dma->rx_chan); 887 dma_release_channel(dma->rx_chan);
893 return -ENODEV; 888 return PTR_ERR(dma->tx_chan);
894 } 889 }
895 890
896 dmaengine_slave_config(dma->tx_chan, &dma->tx_conf); 891 dmaengine_slave_config(dma->tx_chan, &dma->tx_conf);
@@ -1921,6 +1916,7 @@ static int s3c24xx_serial_resume(struct device *dev)
1921static int s3c24xx_serial_resume_noirq(struct device *dev) 1916static int s3c24xx_serial_resume_noirq(struct device *dev)
1922{ 1917{
1923 struct uart_port *port = s3c24xx_dev_to_port(dev); 1918 struct uart_port *port = s3c24xx_dev_to_port(dev);
1919 struct s3c24xx_uart_port *ourport = to_ourport(port);
1924 1920
1925 if (port) { 1921 if (port) {
1926 /* restore IRQ mask */ 1922 /* restore IRQ mask */
@@ -1930,7 +1926,9 @@ static int s3c24xx_serial_resume_noirq(struct device *dev)
1930 uintm &= ~S3C64XX_UINTM_TXD_MSK; 1926 uintm &= ~S3C64XX_UINTM_TXD_MSK;
1931 if (rx_enabled(port)) 1927 if (rx_enabled(port))
1932 uintm &= ~S3C64XX_UINTM_RXD_MSK; 1928 uintm &= ~S3C64XX_UINTM_RXD_MSK;
1929 clk_prepare_enable(ourport->clk);
1933 wr_regl(port, S3C64XX_UINTM, uintm); 1930 wr_regl(port, S3C64XX_UINTM, uintm);
1931 clk_disable_unprepare(ourport->clk);
1934 } 1932 }
1935 } 1933 }
1936 1934
diff --git a/drivers/tty/serial/samsung.h b/drivers/tty/serial/samsung.h
index a04acef1cb20..965199b6c16f 100644
--- a/drivers/tty/serial/samsung.h
+++ b/drivers/tty/serial/samsung.h
@@ -44,10 +44,6 @@ struct s3c24xx_serial_drv_data {
44}; 44};
45 45
46struct s3c24xx_uart_dma { 46struct s3c24xx_uart_dma {
47 dma_filter_fn fn;
48 void *rx_param;
49 void *tx_param;
50
51 unsigned int rx_chan_id; 47 unsigned int rx_chan_id;
52 unsigned int tx_chan_id; 48 unsigned int tx_chan_id;
53 49
diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c
index 731ac35acb31..d92a150c8733 100644
--- a/drivers/tty/serial/serial-tegra.c
+++ b/drivers/tty/serial/serial-tegra.c
@@ -1191,7 +1191,7 @@ static const char *tegra_uart_type(struct uart_port *u)
1191 return TEGRA_UART_TYPE; 1191 return TEGRA_UART_TYPE;
1192} 1192}
1193 1193
1194static struct uart_ops tegra_uart_ops = { 1194static const struct uart_ops tegra_uart_ops = {
1195 .tx_empty = tegra_uart_tx_empty, 1195 .tx_empty = tegra_uart_tx_empty,
1196 .set_mctrl = tegra_uart_set_mctrl, 1196 .set_mctrl = tegra_uart_set_mctrl,
1197 .get_mctrl = tegra_uart_get_mctrl, 1197 .get_mctrl = tegra_uart_get_mctrl,
diff --git a/drivers/tty/serial/serial_txx9.c b/drivers/tty/serial/serial_txx9.c
index f80312eed4fd..f80fead6c5fc 100644
--- a/drivers/tty/serial/serial_txx9.c
+++ b/drivers/tty/serial/serial_txx9.c
@@ -845,7 +845,7 @@ serial_txx9_type(struct uart_port *port)
845 return "txx9"; 845 return "txx9";
846} 846}
847 847
848static struct uart_ops serial_txx9_pops = { 848static const struct uart_ops serial_txx9_pops = {
849 .tx_empty = serial_txx9_tx_empty, 849 .tx_empty = serial_txx9_tx_empty,
850 .set_mctrl = serial_txx9_set_mctrl, 850 .set_mctrl = serial_txx9_set_mctrl,
851 .get_mctrl = serial_txx9_get_mctrl, 851 .get_mctrl = serial_txx9_get_mctrl,
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 91e7dddbf72c..9a47cc4f16a2 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -101,23 +101,30 @@ enum SCI_CLKS {
101 for ((_sr) = max_sr(_port); (_sr) >= min_sr(_port); (_sr)--) \ 101 for ((_sr) = max_sr(_port); (_sr) >= min_sr(_port); (_sr)--) \
102 if ((_port)->sampling_rate_mask & SCI_SR((_sr))) 102 if ((_port)->sampling_rate_mask & SCI_SR((_sr)))
103 103
104struct plat_sci_reg {
105 u8 offset, size;
106};
107
108struct sci_port_params {
109 const struct plat_sci_reg regs[SCIx_NR_REGS];
110 unsigned int fifosize;
111 unsigned int overrun_reg;
112 unsigned int overrun_mask;
113 unsigned int sampling_rate_mask;
114 unsigned int error_mask;
115 unsigned int error_clear;
116};
117
104struct sci_port { 118struct sci_port {
105 struct uart_port port; 119 struct uart_port port;
106 120
107 /* Platform configuration */ 121 /* Platform configuration */
108 struct plat_sci_port *cfg; 122 const struct sci_port_params *params;
109 unsigned int overrun_reg; 123 const struct plat_sci_port *cfg;
110 unsigned int overrun_mask;
111 unsigned int error_mask;
112 unsigned int error_clear;
113 unsigned int sampling_rate_mask; 124 unsigned int sampling_rate_mask;
114 resource_size_t reg_size; 125 resource_size_t reg_size;
115 struct mctrl_gpios *gpios; 126 struct mctrl_gpios *gpios;
116 127
117 /* Break timer */
118 struct timer_list break_timer;
119 int break_flag;
120
121 /* Clocks */ 128 /* Clocks */
122 struct clk *clks[SCI_NUM_CLKS]; 129 struct clk *clks[SCI_NUM_CLKS];
123 unsigned long clk_rates[SCI_NUM_CLKS]; 130 unsigned long clk_rates[SCI_NUM_CLKS];
@@ -141,7 +148,12 @@ struct sci_port {
141 struct timer_list rx_timer; 148 struct timer_list rx_timer;
142 unsigned int rx_timeout; 149 unsigned int rx_timeout;
143#endif 150#endif
151 unsigned int rx_frame;
152 int rx_trigger;
153 struct timer_list rx_fifo_timer;
154 int rx_fifo_timeout;
144 155
156 bool has_rtscts;
145 bool autorts; 157 bool autorts;
146}; 158};
147 159
@@ -156,110 +168,97 @@ to_sci_port(struct uart_port *uart)
156 return container_of(uart, struct sci_port, port); 168 return container_of(uart, struct sci_port, port);
157} 169}
158 170
159struct plat_sci_reg { 171static const struct sci_port_params sci_port_params[SCIx_NR_REGTYPES] = {
160 u8 offset, size;
161};
162
163/* Helper for invalidating specific entries of an inherited map. */
164#define sci_reg_invalid { .offset = 0, .size = 0 }
165
166static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
167 [SCIx_PROBE_REGTYPE] = {
168 [0 ... SCIx_NR_REGS - 1] = sci_reg_invalid,
169 },
170
171 /* 172 /*
172 * Common SCI definitions, dependent on the port's regshift 173 * Common SCI definitions, dependent on the port's regshift
173 * value. 174 * value.
174 */ 175 */
175 [SCIx_SCI_REGTYPE] = { 176 [SCIx_SCI_REGTYPE] = {
176 [SCSMR] = { 0x00, 8 }, 177 .regs = {
177 [SCBRR] = { 0x01, 8 }, 178 [SCSMR] = { 0x00, 8 },
178 [SCSCR] = { 0x02, 8 }, 179 [SCBRR] = { 0x01, 8 },
179 [SCxTDR] = { 0x03, 8 }, 180 [SCSCR] = { 0x02, 8 },
180 [SCxSR] = { 0x04, 8 }, 181 [SCxTDR] = { 0x03, 8 },
181 [SCxRDR] = { 0x05, 8 }, 182 [SCxSR] = { 0x04, 8 },
182 [SCFCR] = sci_reg_invalid, 183 [SCxRDR] = { 0x05, 8 },
183 [SCFDR] = sci_reg_invalid, 184 },
184 [SCTFDR] = sci_reg_invalid, 185 .fifosize = 1,
185 [SCRFDR] = sci_reg_invalid, 186 .overrun_reg = SCxSR,
186 [SCSPTR] = sci_reg_invalid, 187 .overrun_mask = SCI_ORER,
187 [SCLSR] = sci_reg_invalid, 188 .sampling_rate_mask = SCI_SR(32),
188 [HSSRR] = sci_reg_invalid, 189 .error_mask = SCI_DEFAULT_ERROR_MASK | SCI_ORER,
189 [SCPCR] = sci_reg_invalid, 190 .error_clear = SCI_ERROR_CLEAR & ~SCI_ORER,
190 [SCPDR] = sci_reg_invalid,
191 [SCDL] = sci_reg_invalid,
192 [SCCKS] = sci_reg_invalid,
193 }, 191 },
194 192
195 /* 193 /*
196 * Common definitions for legacy IrDA ports, dependent on 194 * Common definitions for legacy IrDA ports.
197 * regshift value.
198 */ 195 */
199 [SCIx_IRDA_REGTYPE] = { 196 [SCIx_IRDA_REGTYPE] = {
200 [SCSMR] = { 0x00, 8 }, 197 .regs = {
201 [SCBRR] = { 0x01, 8 }, 198 [SCSMR] = { 0x00, 8 },
202 [SCSCR] = { 0x02, 8 }, 199 [SCBRR] = { 0x02, 8 },
203 [SCxTDR] = { 0x03, 8 }, 200 [SCSCR] = { 0x04, 8 },
204 [SCxSR] = { 0x04, 8 }, 201 [SCxTDR] = { 0x06, 8 },
205 [SCxRDR] = { 0x05, 8 }, 202 [SCxSR] = { 0x08, 16 },
206 [SCFCR] = { 0x06, 8 }, 203 [SCxRDR] = { 0x0a, 8 },
207 [SCFDR] = { 0x07, 16 }, 204 [SCFCR] = { 0x0c, 8 },
208 [SCTFDR] = sci_reg_invalid, 205 [SCFDR] = { 0x0e, 16 },
209 [SCRFDR] = sci_reg_invalid, 206 },
210 [SCSPTR] = sci_reg_invalid, 207 .fifosize = 1,
211 [SCLSR] = sci_reg_invalid, 208 .overrun_reg = SCxSR,
212 [HSSRR] = sci_reg_invalid, 209 .overrun_mask = SCI_ORER,
213 [SCPCR] = sci_reg_invalid, 210 .sampling_rate_mask = SCI_SR(32),
214 [SCPDR] = sci_reg_invalid, 211 .error_mask = SCI_DEFAULT_ERROR_MASK | SCI_ORER,
215 [SCDL] = sci_reg_invalid, 212 .error_clear = SCI_ERROR_CLEAR & ~SCI_ORER,
216 [SCCKS] = sci_reg_invalid,
217 }, 213 },
218 214
219 /* 215 /*
220 * Common SCIFA definitions. 216 * Common SCIFA definitions.
221 */ 217 */
222 [SCIx_SCIFA_REGTYPE] = { 218 [SCIx_SCIFA_REGTYPE] = {
223 [SCSMR] = { 0x00, 16 }, 219 .regs = {
224 [SCBRR] = { 0x04, 8 }, 220 [SCSMR] = { 0x00, 16 },
225 [SCSCR] = { 0x08, 16 }, 221 [SCBRR] = { 0x04, 8 },
226 [SCxTDR] = { 0x20, 8 }, 222 [SCSCR] = { 0x08, 16 },
227 [SCxSR] = { 0x14, 16 }, 223 [SCxTDR] = { 0x20, 8 },
228 [SCxRDR] = { 0x24, 8 }, 224 [SCxSR] = { 0x14, 16 },
229 [SCFCR] = { 0x18, 16 }, 225 [SCxRDR] = { 0x24, 8 },
230 [SCFDR] = { 0x1c, 16 }, 226 [SCFCR] = { 0x18, 16 },
231 [SCTFDR] = sci_reg_invalid, 227 [SCFDR] = { 0x1c, 16 },
232 [SCRFDR] = sci_reg_invalid, 228 [SCPCR] = { 0x30, 16 },
233 [SCSPTR] = sci_reg_invalid, 229 [SCPDR] = { 0x34, 16 },
234 [SCLSR] = sci_reg_invalid, 230 },
235 [HSSRR] = sci_reg_invalid, 231 .fifosize = 64,
236 [SCPCR] = { 0x30, 16 }, 232 .overrun_reg = SCxSR,
237 [SCPDR] = { 0x34, 16 }, 233 .overrun_mask = SCIFA_ORER,
238 [SCDL] = sci_reg_invalid, 234 .sampling_rate_mask = SCI_SR_SCIFAB,
239 [SCCKS] = sci_reg_invalid, 235 .error_mask = SCIF_DEFAULT_ERROR_MASK | SCIFA_ORER,
236 .error_clear = SCIF_ERROR_CLEAR & ~SCIFA_ORER,
240 }, 237 },
241 238
242 /* 239 /*
243 * Common SCIFB definitions. 240 * Common SCIFB definitions.
244 */ 241 */
245 [SCIx_SCIFB_REGTYPE] = { 242 [SCIx_SCIFB_REGTYPE] = {
246 [SCSMR] = { 0x00, 16 }, 243 .regs = {
247 [SCBRR] = { 0x04, 8 }, 244 [SCSMR] = { 0x00, 16 },
248 [SCSCR] = { 0x08, 16 }, 245 [SCBRR] = { 0x04, 8 },
249 [SCxTDR] = { 0x40, 8 }, 246 [SCSCR] = { 0x08, 16 },
250 [SCxSR] = { 0x14, 16 }, 247 [SCxTDR] = { 0x40, 8 },
251 [SCxRDR] = { 0x60, 8 }, 248 [SCxSR] = { 0x14, 16 },
252 [SCFCR] = { 0x18, 16 }, 249 [SCxRDR] = { 0x60, 8 },
253 [SCFDR] = sci_reg_invalid, 250 [SCFCR] = { 0x18, 16 },
254 [SCTFDR] = { 0x38, 16 }, 251 [SCTFDR] = { 0x38, 16 },
255 [SCRFDR] = { 0x3c, 16 }, 252 [SCRFDR] = { 0x3c, 16 },
256 [SCSPTR] = sci_reg_invalid, 253 [SCPCR] = { 0x30, 16 },
257 [SCLSR] = sci_reg_invalid, 254 [SCPDR] = { 0x34, 16 },
258 [HSSRR] = sci_reg_invalid, 255 },
259 [SCPCR] = { 0x30, 16 }, 256 .fifosize = 256,
260 [SCPDR] = { 0x34, 16 }, 257 .overrun_reg = SCxSR,
261 [SCDL] = sci_reg_invalid, 258 .overrun_mask = SCIFA_ORER,
262 [SCCKS] = sci_reg_invalid, 259 .sampling_rate_mask = SCI_SR_SCIFAB,
260 .error_mask = SCIF_DEFAULT_ERROR_MASK | SCIFA_ORER,
261 .error_clear = SCIF_ERROR_CLEAR & ~SCIFA_ORER,
263 }, 262 },
264 263
265 /* 264 /*
@@ -267,69 +266,70 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
267 * count registers. 266 * count registers.
268 */ 267 */
269 [SCIx_SH2_SCIF_FIFODATA_REGTYPE] = { 268 [SCIx_SH2_SCIF_FIFODATA_REGTYPE] = {
270 [SCSMR] = { 0x00, 16 }, 269 .regs = {
271 [SCBRR] = { 0x04, 8 }, 270 [SCSMR] = { 0x00, 16 },
272 [SCSCR] = { 0x08, 16 }, 271 [SCBRR] = { 0x04, 8 },
273 [SCxTDR] = { 0x0c, 8 }, 272 [SCSCR] = { 0x08, 16 },
274 [SCxSR] = { 0x10, 16 }, 273 [SCxTDR] = { 0x0c, 8 },
275 [SCxRDR] = { 0x14, 8 }, 274 [SCxSR] = { 0x10, 16 },
276 [SCFCR] = { 0x18, 16 }, 275 [SCxRDR] = { 0x14, 8 },
277 [SCFDR] = { 0x1c, 16 }, 276 [SCFCR] = { 0x18, 16 },
278 [SCTFDR] = sci_reg_invalid, 277 [SCFDR] = { 0x1c, 16 },
279 [SCRFDR] = sci_reg_invalid, 278 [SCSPTR] = { 0x20, 16 },
280 [SCSPTR] = { 0x20, 16 }, 279 [SCLSR] = { 0x24, 16 },
281 [SCLSR] = { 0x24, 16 }, 280 },
282 [HSSRR] = sci_reg_invalid, 281 .fifosize = 16,
283 [SCPCR] = sci_reg_invalid, 282 .overrun_reg = SCLSR,
284 [SCPDR] = sci_reg_invalid, 283 .overrun_mask = SCLSR_ORER,
285 [SCDL] = sci_reg_invalid, 284 .sampling_rate_mask = SCI_SR(32),
286 [SCCKS] = sci_reg_invalid, 285 .error_mask = SCIF_DEFAULT_ERROR_MASK,
286 .error_clear = SCIF_ERROR_CLEAR,
287 }, 287 },
288 288
289 /* 289 /*
290 * Common SH-3 SCIF definitions. 290 * Common SH-3 SCIF definitions.
291 */ 291 */
292 [SCIx_SH3_SCIF_REGTYPE] = { 292 [SCIx_SH3_SCIF_REGTYPE] = {
293 [SCSMR] = { 0x00, 8 }, 293 .regs = {
294 [SCBRR] = { 0x02, 8 }, 294 [SCSMR] = { 0x00, 8 },
295 [SCSCR] = { 0x04, 8 }, 295 [SCBRR] = { 0x02, 8 },
296 [SCxTDR] = { 0x06, 8 }, 296 [SCSCR] = { 0x04, 8 },
297 [SCxSR] = { 0x08, 16 }, 297 [SCxTDR] = { 0x06, 8 },
298 [SCxRDR] = { 0x0a, 8 }, 298 [SCxSR] = { 0x08, 16 },
299 [SCFCR] = { 0x0c, 8 }, 299 [SCxRDR] = { 0x0a, 8 },
300 [SCFDR] = { 0x0e, 16 }, 300 [SCFCR] = { 0x0c, 8 },
301 [SCTFDR] = sci_reg_invalid, 301 [SCFDR] = { 0x0e, 16 },
302 [SCRFDR] = sci_reg_invalid, 302 },
303 [SCSPTR] = sci_reg_invalid, 303 .fifosize = 16,
304 [SCLSR] = sci_reg_invalid, 304 .overrun_reg = SCLSR,
305 [HSSRR] = sci_reg_invalid, 305 .overrun_mask = SCLSR_ORER,
306 [SCPCR] = sci_reg_invalid, 306 .sampling_rate_mask = SCI_SR(32),
307 [SCPDR] = sci_reg_invalid, 307 .error_mask = SCIF_DEFAULT_ERROR_MASK,
308 [SCDL] = sci_reg_invalid, 308 .error_clear = SCIF_ERROR_CLEAR,
309 [SCCKS] = sci_reg_invalid,
310 }, 309 },
311 310
312 /* 311 /*
313 * Common SH-4(A) SCIF(B) definitions. 312 * Common SH-4(A) SCIF(B) definitions.
314 */ 313 */
315 [SCIx_SH4_SCIF_REGTYPE] = { 314 [SCIx_SH4_SCIF_REGTYPE] = {
316 [SCSMR] = { 0x00, 16 }, 315 .regs = {
317 [SCBRR] = { 0x04, 8 }, 316 [SCSMR] = { 0x00, 16 },
318 [SCSCR] = { 0x08, 16 }, 317 [SCBRR] = { 0x04, 8 },
319 [SCxTDR] = { 0x0c, 8 }, 318 [SCSCR] = { 0x08, 16 },
320 [SCxSR] = { 0x10, 16 }, 319 [SCxTDR] = { 0x0c, 8 },
321 [SCxRDR] = { 0x14, 8 }, 320 [SCxSR] = { 0x10, 16 },
322 [SCFCR] = { 0x18, 16 }, 321 [SCxRDR] = { 0x14, 8 },
323 [SCFDR] = { 0x1c, 16 }, 322 [SCFCR] = { 0x18, 16 },
324 [SCTFDR] = sci_reg_invalid, 323 [SCFDR] = { 0x1c, 16 },
325 [SCRFDR] = sci_reg_invalid, 324 [SCSPTR] = { 0x20, 16 },
326 [SCSPTR] = { 0x20, 16 }, 325 [SCLSR] = { 0x24, 16 },
327 [SCLSR] = { 0x24, 16 }, 326 },
328 [HSSRR] = sci_reg_invalid, 327 .fifosize = 16,
329 [SCPCR] = sci_reg_invalid, 328 .overrun_reg = SCLSR,
330 [SCPDR] = sci_reg_invalid, 329 .overrun_mask = SCLSR_ORER,
331 [SCDL] = sci_reg_invalid, 330 .sampling_rate_mask = SCI_SR(32),
332 [SCCKS] = sci_reg_invalid, 331 .error_mask = SCIF_DEFAULT_ERROR_MASK,
332 .error_clear = SCIF_ERROR_CLEAR,
333 }, 333 },
334 334
335 /* 335 /*
@@ -337,46 +337,55 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
337 * External Clock (BRG). 337 * External Clock (BRG).
338 */ 338 */
339 [SCIx_SH4_SCIF_BRG_REGTYPE] = { 339 [SCIx_SH4_SCIF_BRG_REGTYPE] = {
340 [SCSMR] = { 0x00, 16 }, 340 .regs = {
341 [SCBRR] = { 0x04, 8 }, 341 [SCSMR] = { 0x00, 16 },
342 [SCSCR] = { 0x08, 16 }, 342 [SCBRR] = { 0x04, 8 },
343 [SCxTDR] = { 0x0c, 8 }, 343 [SCSCR] = { 0x08, 16 },
344 [SCxSR] = { 0x10, 16 }, 344 [SCxTDR] = { 0x0c, 8 },
345 [SCxRDR] = { 0x14, 8 }, 345 [SCxSR] = { 0x10, 16 },
346 [SCFCR] = { 0x18, 16 }, 346 [SCxRDR] = { 0x14, 8 },
347 [SCFDR] = { 0x1c, 16 }, 347 [SCFCR] = { 0x18, 16 },
348 [SCTFDR] = sci_reg_invalid, 348 [SCFDR] = { 0x1c, 16 },
349 [SCRFDR] = sci_reg_invalid, 349 [SCSPTR] = { 0x20, 16 },
350 [SCSPTR] = { 0x20, 16 }, 350 [SCLSR] = { 0x24, 16 },
351 [SCLSR] = { 0x24, 16 }, 351 [SCDL] = { 0x30, 16 },
352 [HSSRR] = sci_reg_invalid, 352 [SCCKS] = { 0x34, 16 },
353 [SCPCR] = sci_reg_invalid, 353 },
354 [SCPDR] = sci_reg_invalid, 354 .fifosize = 16,
355 [SCDL] = { 0x30, 16 }, 355 .overrun_reg = SCLSR,
356 [SCCKS] = { 0x34, 16 }, 356 .overrun_mask = SCLSR_ORER,
357 .sampling_rate_mask = SCI_SR(32),
358 .error_mask = SCIF_DEFAULT_ERROR_MASK,
359 .error_clear = SCIF_ERROR_CLEAR,
357 }, 360 },
358 361
359 /* 362 /*
360 * Common HSCIF definitions. 363 * Common HSCIF definitions.
361 */ 364 */
362 [SCIx_HSCIF_REGTYPE] = { 365 [SCIx_HSCIF_REGTYPE] = {
363 [SCSMR] = { 0x00, 16 }, 366 .regs = {
364 [SCBRR] = { 0x04, 8 }, 367 [SCSMR] = { 0x00, 16 },
365 [SCSCR] = { 0x08, 16 }, 368 [SCBRR] = { 0x04, 8 },
366 [SCxTDR] = { 0x0c, 8 }, 369 [SCSCR] = { 0x08, 16 },
367 [SCxSR] = { 0x10, 16 }, 370 [SCxTDR] = { 0x0c, 8 },
368 [SCxRDR] = { 0x14, 8 }, 371 [SCxSR] = { 0x10, 16 },
369 [SCFCR] = { 0x18, 16 }, 372 [SCxRDR] = { 0x14, 8 },
370 [SCFDR] = { 0x1c, 16 }, 373 [SCFCR] = { 0x18, 16 },
371 [SCTFDR] = sci_reg_invalid, 374 [SCFDR] = { 0x1c, 16 },
372 [SCRFDR] = sci_reg_invalid, 375 [SCSPTR] = { 0x20, 16 },
373 [SCSPTR] = { 0x20, 16 }, 376 [SCLSR] = { 0x24, 16 },
374 [SCLSR] = { 0x24, 16 }, 377 [HSSRR] = { 0x40, 16 },
375 [HSSRR] = { 0x40, 16 }, 378 [SCDL] = { 0x30, 16 },
376 [SCPCR] = sci_reg_invalid, 379 [SCCKS] = { 0x34, 16 },
377 [SCPDR] = sci_reg_invalid, 380 [HSRTRGR] = { 0x54, 16 },
378 [SCDL] = { 0x30, 16 }, 381 [HSTTRGR] = { 0x58, 16 },
379 [SCCKS] = { 0x34, 16 }, 382 },
383 .fifosize = 128,
384 .overrun_reg = SCLSR,
385 .overrun_mask = SCLSR_ORER,
386 .sampling_rate_mask = SCI_SR_RANGE(8, 32),
387 .error_mask = SCIF_DEFAULT_ERROR_MASK,
388 .error_clear = SCIF_ERROR_CLEAR,
380 }, 389 },
381 390
382 /* 391 /*
@@ -384,23 +393,23 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
384 * register. 393 * register.
385 */ 394 */
386 [SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE] = { 395 [SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE] = {
387 [SCSMR] = { 0x00, 16 }, 396 .regs = {
388 [SCBRR] = { 0x04, 8 }, 397 [SCSMR] = { 0x00, 16 },
389 [SCSCR] = { 0x08, 16 }, 398 [SCBRR] = { 0x04, 8 },
390 [SCxTDR] = { 0x0c, 8 }, 399 [SCSCR] = { 0x08, 16 },
391 [SCxSR] = { 0x10, 16 }, 400 [SCxTDR] = { 0x0c, 8 },
392 [SCxRDR] = { 0x14, 8 }, 401 [SCxSR] = { 0x10, 16 },
393 [SCFCR] = { 0x18, 16 }, 402 [SCxRDR] = { 0x14, 8 },
394 [SCFDR] = { 0x1c, 16 }, 403 [SCFCR] = { 0x18, 16 },
395 [SCTFDR] = sci_reg_invalid, 404 [SCFDR] = { 0x1c, 16 },
396 [SCRFDR] = sci_reg_invalid, 405 [SCLSR] = { 0x24, 16 },
397 [SCSPTR] = sci_reg_invalid, 406 },
398 [SCLSR] = { 0x24, 16 }, 407 .fifosize = 16,
399 [HSSRR] = sci_reg_invalid, 408 .overrun_reg = SCLSR,
400 [SCPCR] = sci_reg_invalid, 409 .overrun_mask = SCLSR_ORER,
401 [SCPDR] = sci_reg_invalid, 410 .sampling_rate_mask = SCI_SR(32),
402 [SCDL] = sci_reg_invalid, 411 .error_mask = SCIF_DEFAULT_ERROR_MASK,
403 [SCCKS] = sci_reg_invalid, 412 .error_clear = SCIF_ERROR_CLEAR,
404 }, 413 },
405 414
406 /* 415 /*
@@ -408,23 +417,26 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
408 * count registers. 417 * count registers.
409 */ 418 */
410 [SCIx_SH4_SCIF_FIFODATA_REGTYPE] = { 419 [SCIx_SH4_SCIF_FIFODATA_REGTYPE] = {
411 [SCSMR] = { 0x00, 16 }, 420 .regs = {
412 [SCBRR] = { 0x04, 8 }, 421 [SCSMR] = { 0x00, 16 },
413 [SCSCR] = { 0x08, 16 }, 422 [SCBRR] = { 0x04, 8 },
414 [SCxTDR] = { 0x0c, 8 }, 423 [SCSCR] = { 0x08, 16 },
415 [SCxSR] = { 0x10, 16 }, 424 [SCxTDR] = { 0x0c, 8 },
416 [SCxRDR] = { 0x14, 8 }, 425 [SCxSR] = { 0x10, 16 },
417 [SCFCR] = { 0x18, 16 }, 426 [SCxRDR] = { 0x14, 8 },
418 [SCFDR] = { 0x1c, 16 }, 427 [SCFCR] = { 0x18, 16 },
419 [SCTFDR] = { 0x1c, 16 }, /* aliased to SCFDR */ 428 [SCFDR] = { 0x1c, 16 },
420 [SCRFDR] = { 0x20, 16 }, 429 [SCTFDR] = { 0x1c, 16 }, /* aliased to SCFDR */
421 [SCSPTR] = { 0x24, 16 }, 430 [SCRFDR] = { 0x20, 16 },
422 [SCLSR] = { 0x28, 16 }, 431 [SCSPTR] = { 0x24, 16 },
423 [HSSRR] = sci_reg_invalid, 432 [SCLSR] = { 0x28, 16 },
424 [SCPCR] = sci_reg_invalid, 433 },
425 [SCPDR] = sci_reg_invalid, 434 .fifosize = 16,
426 [SCDL] = sci_reg_invalid, 435 .overrun_reg = SCLSR,
427 [SCCKS] = sci_reg_invalid, 436 .overrun_mask = SCLSR_ORER,
437 .sampling_rate_mask = SCI_SR(32),
438 .error_mask = SCIF_DEFAULT_ERROR_MASK,
439 .error_clear = SCIF_ERROR_CLEAR,
428 }, 440 },
429 441
430 /* 442 /*
@@ -432,27 +444,26 @@ static const struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
432 * registers. 444 * registers.
433 */ 445 */
434 [SCIx_SH7705_SCIF_REGTYPE] = { 446 [SCIx_SH7705_SCIF_REGTYPE] = {
435 [SCSMR] = { 0x00, 16 }, 447 .regs = {
436 [SCBRR] = { 0x04, 8 }, 448 [SCSMR] = { 0x00, 16 },
437 [SCSCR] = { 0x08, 16 }, 449 [SCBRR] = { 0x04, 8 },
438 [SCxTDR] = { 0x20, 8 }, 450 [SCSCR] = { 0x08, 16 },
439 [SCxSR] = { 0x14, 16 }, 451 [SCxTDR] = { 0x20, 8 },
440 [SCxRDR] = { 0x24, 8 }, 452 [SCxSR] = { 0x14, 16 },
441 [SCFCR] = { 0x18, 16 }, 453 [SCxRDR] = { 0x24, 8 },
442 [SCFDR] = { 0x1c, 16 }, 454 [SCFCR] = { 0x18, 16 },
443 [SCTFDR] = sci_reg_invalid, 455 [SCFDR] = { 0x1c, 16 },
444 [SCRFDR] = sci_reg_invalid, 456 },
445 [SCSPTR] = sci_reg_invalid, 457 .fifosize = 64,
446 [SCLSR] = sci_reg_invalid, 458 .overrun_reg = SCxSR,
447 [HSSRR] = sci_reg_invalid, 459 .overrun_mask = SCIFA_ORER,
448 [SCPCR] = sci_reg_invalid, 460 .sampling_rate_mask = SCI_SR(16),
449 [SCPDR] = sci_reg_invalid, 461 .error_mask = SCIF_DEFAULT_ERROR_MASK | SCIFA_ORER,
450 [SCDL] = sci_reg_invalid, 462 .error_clear = SCIF_ERROR_CLEAR & ~SCIFA_ORER,
451 [SCCKS] = sci_reg_invalid,
452 }, 463 },
453}; 464};
454 465
455#define sci_getreg(up, offset) (sci_regmap[to_sci_port(up)->cfg->regtype] + offset) 466#define sci_getreg(up, offset) (&to_sci_port(up)->params->regs[offset])
456 467
457/* 468/*
458 * The "offset" here is rather misleading, in that it refers to an enum 469 * The "offset" here is rather misleading, in that it refers to an enum
@@ -486,41 +497,6 @@ static void sci_serial_out(struct uart_port *p, int offset, int value)
486 WARN(1, "Invalid register access\n"); 497 WARN(1, "Invalid register access\n");
487} 498}
488 499
489static int sci_probe_regmap(struct plat_sci_port *cfg)
490{
491 switch (cfg->type) {
492 case PORT_SCI:
493 cfg->regtype = SCIx_SCI_REGTYPE;
494 break;
495 case PORT_IRDA:
496 cfg->regtype = SCIx_IRDA_REGTYPE;
497 break;
498 case PORT_SCIFA:
499 cfg->regtype = SCIx_SCIFA_REGTYPE;
500 break;
501 case PORT_SCIFB:
502 cfg->regtype = SCIx_SCIFB_REGTYPE;
503 break;
504 case PORT_SCIF:
505 /*
506 * The SH-4 is a bit of a misnomer here, although that's
507 * where this particular port layout originated. This
508 * configuration (or some slight variation thereof)
509 * remains the dominant model for all SCIFs.
510 */
511 cfg->regtype = SCIx_SH4_SCIF_REGTYPE;
512 break;
513 case PORT_HSCIF:
514 cfg->regtype = SCIx_HSCIF_REGTYPE;
515 break;
516 default:
517 pr_err("Can't probe register map for given port\n");
518 return -EINVAL;
519 }
520
521 return 0;
522}
523
524static void sci_port_enable(struct sci_port *sci_port) 500static void sci_port_enable(struct sci_port *sci_port)
525{ 501{
526 unsigned int i; 502 unsigned int i;
@@ -544,14 +520,6 @@ static void sci_port_disable(struct sci_port *sci_port)
544 if (!sci_port->port.dev) 520 if (!sci_port->port.dev)
545 return; 521 return;
546 522
547 /* Cancel the break timer to ensure that the timer handler will not try
548 * to access the hardware with clocks and power disabled. Reset the
549 * break flag to make the break debouncing state machine ready for the
550 * next break.
551 */
552 del_timer_sync(&sci_port->break_timer);
553 sci_port->break_flag = 0;
554
555 for (i = SCI_NUM_CLKS; i-- > 0; ) 523 for (i = SCI_NUM_CLKS; i-- > 0; )
556 clk_disable_unprepare(sci_port->clks[i]); 524 clk_disable_unprepare(sci_port->clks[i]);
557 525
@@ -646,7 +614,7 @@ static void sci_clear_SCxSR(struct uart_port *port, unsigned int mask)
646 if (port->type == PORT_SCI) { 614 if (port->type == PORT_SCI) {
647 /* Just store the mask */ 615 /* Just store the mask */
648 serial_port_out(port, SCxSR, mask); 616 serial_port_out(port, SCxSR, mask);
649 } else if (to_sci_port(port)->overrun_mask == SCIFA_ORER) { 617 } else if (to_sci_port(port)->params->overrun_mask == SCIFA_ORER) {
650 /* SCIFA/SCIFB and SCIF on SH7705/SH7720/SH7721 */ 618 /* SCIFA/SCIFB and SCIF on SH7705/SH7720/SH7721 */
651 /* Only clear the status bits we want to clear */ 619 /* Only clear the status bits we want to clear */
652 serial_port_out(port, SCxSR, 620 serial_port_out(port, SCxSR,
@@ -719,7 +687,7 @@ static void sci_init_pins(struct uart_port *port, unsigned int cflag)
719 687
720 /* Enable RXD and TXD pin functions */ 688 /* Enable RXD and TXD pin functions */
721 ctrl &= ~(SCPCR_RXDC | SCPCR_TXDC); 689 ctrl &= ~(SCPCR_RXDC | SCPCR_TXDC);
722 if (to_sci_port(port)->cfg->capabilities & SCIx_HAVE_RTSCTS) { 690 if (to_sci_port(port)->has_rtscts) {
723 /* RTS# is output, driven 1 */ 691 /* RTS# is output, driven 1 */
724 ctrl |= SCPCR_RTSC; 692 ctrl |= SCPCR_RTSC;
725 serial_port_out(port, SCPDR, 693 serial_port_out(port, SCPDR,
@@ -741,11 +709,13 @@ static void sci_init_pins(struct uart_port *port, unsigned int cflag)
741 709
742static int sci_txfill(struct uart_port *port) 710static int sci_txfill(struct uart_port *port)
743{ 711{
712 struct sci_port *s = to_sci_port(port);
713 unsigned int fifo_mask = (s->params->fifosize << 1) - 1;
744 const struct plat_sci_reg *reg; 714 const struct plat_sci_reg *reg;
745 715
746 reg = sci_getreg(port, SCTFDR); 716 reg = sci_getreg(port, SCTFDR);
747 if (reg->size) 717 if (reg->size)
748 return serial_port_in(port, SCTFDR) & ((port->fifosize << 1) - 1); 718 return serial_port_in(port, SCTFDR) & fifo_mask;
749 719
750 reg = sci_getreg(port, SCFDR); 720 reg = sci_getreg(port, SCFDR);
751 if (reg->size) 721 if (reg->size)
@@ -761,33 +731,21 @@ static int sci_txroom(struct uart_port *port)
761 731
762static int sci_rxfill(struct uart_port *port) 732static int sci_rxfill(struct uart_port *port)
763{ 733{
734 struct sci_port *s = to_sci_port(port);
735 unsigned int fifo_mask = (s->params->fifosize << 1) - 1;
764 const struct plat_sci_reg *reg; 736 const struct plat_sci_reg *reg;
765 737
766 reg = sci_getreg(port, SCRFDR); 738 reg = sci_getreg(port, SCRFDR);
767 if (reg->size) 739 if (reg->size)
768 return serial_port_in(port, SCRFDR) & ((port->fifosize << 1) - 1); 740 return serial_port_in(port, SCRFDR) & fifo_mask;
769 741
770 reg = sci_getreg(port, SCFDR); 742 reg = sci_getreg(port, SCFDR);
771 if (reg->size) 743 if (reg->size)
772 return serial_port_in(port, SCFDR) & ((port->fifosize << 1) - 1); 744 return serial_port_in(port, SCFDR) & fifo_mask;
773 745
774 return (serial_port_in(port, SCxSR) & SCxSR_RDxF(port)) != 0; 746 return (serial_port_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
775} 747}
776 748
777/*
778 * SCI helper for checking the state of the muxed port/RXD pins.
779 */
780static inline int sci_rxd_in(struct uart_port *port)
781{
782 struct sci_port *s = to_sci_port(port);
783
784 if (s->cfg->port_reg <= 0)
785 return 1;
786
787 /* Cast for ARM damage */
788 return !!__raw_readb((void __iomem *)(uintptr_t)s->cfg->port_reg);
789}
790
791/* ********************************************************************** * 749/* ********************************************************************** *
792 * the interrupt related routines * 750 * the interrupt related routines *
793 * ********************************************************************** */ 751 * ********************************************************************** */
@@ -855,7 +813,6 @@ static void sci_transmit_chars(struct uart_port *port)
855 813
856static void sci_receive_chars(struct uart_port *port) 814static void sci_receive_chars(struct uart_port *port)
857{ 815{
858 struct sci_port *sci_port = to_sci_port(port);
859 struct tty_port *tport = &port->state->port; 816 struct tty_port *tport = &port->state->port;
860 int i, count, copied = 0; 817 int i, count, copied = 0;
861 unsigned short status; 818 unsigned short status;
@@ -875,8 +832,7 @@ static void sci_receive_chars(struct uart_port *port)
875 832
876 if (port->type == PORT_SCI) { 833 if (port->type == PORT_SCI) {
877 char c = serial_port_in(port, SCxRDR); 834 char c = serial_port_in(port, SCxRDR);
878 if (uart_handle_sysrq_char(port, c) || 835 if (uart_handle_sysrq_char(port, c))
879 sci_port->break_flag)
880 count = 0; 836 count = 0;
881 else 837 else
882 tty_insert_flip_char(tport, c, TTY_NORMAL); 838 tty_insert_flip_char(tport, c, TTY_NORMAL);
@@ -885,25 +841,6 @@ static void sci_receive_chars(struct uart_port *port)
885 char c = serial_port_in(port, SCxRDR); 841 char c = serial_port_in(port, SCxRDR);
886 842
887 status = serial_port_in(port, SCxSR); 843 status = serial_port_in(port, SCxSR);
888#if defined(CONFIG_CPU_SH3)
889 /* Skip "chars" during break */
890 if (sci_port->break_flag) {
891 if ((c == 0) &&
892 (status & SCxSR_FER(port))) {
893 count--; i--;
894 continue;
895 }
896
897 /* Nonzero => end-of-break */
898 dev_dbg(port->dev, "debounce<%02x>\n", c);
899 sci_port->break_flag = 0;
900
901 if (STEPFN(c)) {
902 count--; i--;
903 continue;
904 }
905 }
906#endif /* CONFIG_CPU_SH3 */
907 if (uart_handle_sysrq_char(port, c)) { 844 if (uart_handle_sysrq_char(port, c)) {
908 count--; i--; 845 count--; i--;
909 continue; 846 continue;
@@ -941,37 +878,6 @@ static void sci_receive_chars(struct uart_port *port)
941 } 878 }
942} 879}
943 880
944#define SCI_BREAK_JIFFIES (HZ/20)
945
946/*
947 * The sci generates interrupts during the break,
948 * 1 per millisecond or so during the break period, for 9600 baud.
949 * So dont bother disabling interrupts.
950 * But dont want more than 1 break event.
951 * Use a kernel timer to periodically poll the rx line until
952 * the break is finished.
953 */
954static inline void sci_schedule_break_timer(struct sci_port *port)
955{
956 mod_timer(&port->break_timer, jiffies + SCI_BREAK_JIFFIES);
957}
958
959/* Ensure that two consecutive samples find the break over. */
960static void sci_break_timer(unsigned long data)
961{
962 struct sci_port *port = (struct sci_port *)data;
963
964 if (sci_rxd_in(&port->port) == 0) {
965 port->break_flag = 1;
966 sci_schedule_break_timer(port);
967 } else if (port->break_flag == 1) {
968 /* break is over. */
969 port->break_flag = 2;
970 sci_schedule_break_timer(port);
971 } else
972 port->break_flag = 0;
973}
974
975static int sci_handle_errors(struct uart_port *port) 881static int sci_handle_errors(struct uart_port *port)
976{ 882{
977 int copied = 0; 883 int copied = 0;
@@ -980,7 +886,7 @@ static int sci_handle_errors(struct uart_port *port)
980 struct sci_port *s = to_sci_port(port); 886 struct sci_port *s = to_sci_port(port);
981 887
982 /* Handle overruns */ 888 /* Handle overruns */
983 if (status & s->overrun_mask) { 889 if (status & s->params->overrun_mask) {
984 port->icount.overrun++; 890 port->icount.overrun++;
985 891
986 /* overrun error */ 892 /* overrun error */
@@ -991,35 +897,13 @@ static int sci_handle_errors(struct uart_port *port)
991 } 897 }
992 898
993 if (status & SCxSR_FER(port)) { 899 if (status & SCxSR_FER(port)) {
994 if (sci_rxd_in(port) == 0) { 900 /* frame error */
995 /* Notify of BREAK */ 901 port->icount.frame++;
996 struct sci_port *sci_port = to_sci_port(port);
997
998 if (!sci_port->break_flag) {
999 port->icount.brk++;
1000
1001 sci_port->break_flag = 1;
1002 sci_schedule_break_timer(sci_port);
1003 902
1004 /* Do sysrq handling. */ 903 if (tty_insert_flip_char(tport, 0, TTY_FRAME))
1005 if (uart_handle_break(port)) 904 copied++;
1006 return 0;
1007
1008 dev_dbg(port->dev, "BREAK detected\n");
1009
1010 if (tty_insert_flip_char(tport, 0, TTY_BREAK))
1011 copied++;
1012 }
1013
1014 } else {
1015 /* frame error */
1016 port->icount.frame++;
1017
1018 if (tty_insert_flip_char(tport, 0, TTY_FRAME))
1019 copied++;
1020 905
1021 dev_notice(port->dev, "frame error\n"); 906 dev_notice(port->dev, "frame error\n");
1022 }
1023 } 907 }
1024 908
1025 if (status & SCxSR_PER(port)) { 909 if (status & SCxSR_PER(port)) {
@@ -1046,14 +930,14 @@ static int sci_handle_fifo_overrun(struct uart_port *port)
1046 int copied = 0; 930 int copied = 0;
1047 u16 status; 931 u16 status;
1048 932
1049 reg = sci_getreg(port, s->overrun_reg); 933 reg = sci_getreg(port, s->params->overrun_reg);
1050 if (!reg->size) 934 if (!reg->size)
1051 return 0; 935 return 0;
1052 936
1053 status = serial_port_in(port, s->overrun_reg); 937 status = serial_port_in(port, s->params->overrun_reg);
1054 if (status & s->overrun_mask) { 938 if (status & s->params->overrun_mask) {
1055 status &= ~s->overrun_mask; 939 status &= ~s->params->overrun_mask;
1056 serial_port_out(port, s->overrun_reg, status); 940 serial_port_out(port, s->params->overrun_reg, status);
1057 941
1058 port->icount.overrun++; 942 port->icount.overrun++;
1059 943
@@ -1072,17 +956,11 @@ static int sci_handle_breaks(struct uart_port *port)
1072 int copied = 0; 956 int copied = 0;
1073 unsigned short status = serial_port_in(port, SCxSR); 957 unsigned short status = serial_port_in(port, SCxSR);
1074 struct tty_port *tport = &port->state->port; 958 struct tty_port *tport = &port->state->port;
1075 struct sci_port *s = to_sci_port(port);
1076 959
1077 if (uart_handle_break(port)) 960 if (uart_handle_break(port))
1078 return 0; 961 return 0;
1079 962
1080 if (!s->break_flag && status & SCxSR_BRK(port)) { 963 if (status & SCxSR_BRK(port)) {
1081#if defined(CONFIG_CPU_SH3)
1082 /* Debounce break */
1083 s->break_flag = 1;
1084#endif
1085
1086 port->icount.brk++; 964 port->icount.brk++;
1087 965
1088 /* Notify of BREAK */ 966 /* Notify of BREAK */
@@ -1100,6 +978,146 @@ static int sci_handle_breaks(struct uart_port *port)
1100 return copied; 978 return copied;
1101} 979}
1102 980
981static int scif_set_rtrg(struct uart_port *port, int rx_trig)
982{
983 unsigned int bits;
984
985 if (rx_trig < 1)
986 rx_trig = 1;
987 if (rx_trig >= port->fifosize)
988 rx_trig = port->fifosize;
989
990 /* HSCIF can be set to an arbitrary level. */
991 if (sci_getreg(port, HSRTRGR)->size) {
992 serial_port_out(port, HSRTRGR, rx_trig);
993 return rx_trig;
994 }
995
996 switch (port->type) {
997 case PORT_SCIF:
998 if (rx_trig < 4) {
999 bits = 0;
1000 rx_trig = 1;
1001 } else if (rx_trig < 8) {
1002 bits = SCFCR_RTRG0;
1003 rx_trig = 4;
1004 } else if (rx_trig < 14) {
1005 bits = SCFCR_RTRG1;
1006 rx_trig = 8;
1007 } else {
1008 bits = SCFCR_RTRG0 | SCFCR_RTRG1;
1009 rx_trig = 14;
1010 }
1011 break;
1012 case PORT_SCIFA:
1013 case PORT_SCIFB:
1014 if (rx_trig < 16) {
1015 bits = 0;
1016 rx_trig = 1;
1017 } else if (rx_trig < 32) {
1018 bits = SCFCR_RTRG0;
1019 rx_trig = 16;
1020 } else if (rx_trig < 48) {
1021 bits = SCFCR_RTRG1;
1022 rx_trig = 32;
1023 } else {
1024 bits = SCFCR_RTRG0 | SCFCR_RTRG1;
1025 rx_trig = 48;
1026 }
1027 break;
1028 default:
1029 WARN(1, "unknown FIFO configuration");
1030 return 1;
1031 }
1032
1033 serial_port_out(port, SCFCR,
1034 (serial_port_in(port, SCFCR) &
1035 ~(SCFCR_RTRG1 | SCFCR_RTRG0)) | bits);
1036
1037 return rx_trig;
1038}
1039
1040static int scif_rtrg_enabled(struct uart_port *port)
1041{
1042 if (sci_getreg(port, HSRTRGR)->size)
1043 return serial_port_in(port, HSRTRGR) != 0;
1044 else
1045 return (serial_port_in(port, SCFCR) &
1046 (SCFCR_RTRG0 | SCFCR_RTRG1)) != 0;
1047}
1048
1049static void rx_fifo_timer_fn(unsigned long arg)
1050{
1051 struct sci_port *s = (struct sci_port *)arg;
1052 struct uart_port *port = &s->port;
1053
1054 dev_dbg(port->dev, "Rx timed out\n");
1055 scif_set_rtrg(port, 1);
1056}
1057
1058static ssize_t rx_trigger_show(struct device *dev,
1059 struct device_attribute *attr,
1060 char *buf)
1061{
1062 struct uart_port *port = dev_get_drvdata(dev);
1063 struct sci_port *sci = to_sci_port(port);
1064
1065 return sprintf(buf, "%d\n", sci->rx_trigger);
1066}
1067
1068static ssize_t rx_trigger_store(struct device *dev,
1069 struct device_attribute *attr,
1070 const char *buf,
1071 size_t count)
1072{
1073 struct uart_port *port = dev_get_drvdata(dev);
1074 struct sci_port *sci = to_sci_port(port);
1075 long r;
1076
1077 if (kstrtol(buf, 0, &r) == -EINVAL)
1078 return -EINVAL;
1079
1080 sci->rx_trigger = scif_set_rtrg(port, r);
1081 if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
1082 scif_set_rtrg(port, 1);
1083
1084 return count;
1085}
1086
1087static DEVICE_ATTR(rx_fifo_trigger, 0644, rx_trigger_show, rx_trigger_store);
1088
1089static ssize_t rx_fifo_timeout_show(struct device *dev,
1090 struct device_attribute *attr,
1091 char *buf)
1092{
1093 struct uart_port *port = dev_get_drvdata(dev);
1094 struct sci_port *sci = to_sci_port(port);
1095
1096 return sprintf(buf, "%d\n", sci->rx_fifo_timeout);
1097}
1098
1099static ssize_t rx_fifo_timeout_store(struct device *dev,
1100 struct device_attribute *attr,
1101 const char *buf,
1102 size_t count)
1103{
1104 struct uart_port *port = dev_get_drvdata(dev);
1105 struct sci_port *sci = to_sci_port(port);
1106 long r;
1107
1108 if (kstrtol(buf, 0, &r) == -EINVAL)
1109 return -EINVAL;
1110 sci->rx_fifo_timeout = r;
1111 scif_set_rtrg(port, 1);
1112 if (r > 0)
1113 setup_timer(&sci->rx_fifo_timer, rx_fifo_timer_fn,
1114 (unsigned long)sci);
1115 return count;
1116}
1117
1118static DEVICE_ATTR(rx_fifo_timeout, 0644, rx_fifo_timeout_show, rx_fifo_timeout_store);
1119
1120
1103#ifdef CONFIG_SERIAL_SH_SCI_DMA 1121#ifdef CONFIG_SERIAL_SH_SCI_DMA
1104static void sci_dma_tx_complete(void *arg) 1122static void sci_dma_tx_complete(void *arg)
1105{ 1123{
@@ -1410,20 +1428,14 @@ static void rx_timer_fn(unsigned long arg)
1410} 1428}
1411 1429
1412static struct dma_chan *sci_request_dma_chan(struct uart_port *port, 1430static struct dma_chan *sci_request_dma_chan(struct uart_port *port,
1413 enum dma_transfer_direction dir, 1431 enum dma_transfer_direction dir)
1414 unsigned int id)
1415{ 1432{
1416 dma_cap_mask_t mask;
1417 struct dma_chan *chan; 1433 struct dma_chan *chan;
1418 struct dma_slave_config cfg; 1434 struct dma_slave_config cfg;
1419 int ret; 1435 int ret;
1420 1436
1421 dma_cap_zero(mask); 1437 chan = dma_request_slave_channel(port->dev,
1422 dma_cap_set(DMA_SLAVE, mask); 1438 dir == DMA_MEM_TO_DEV ? "tx" : "rx");
1423
1424 chan = dma_request_slave_channel_compat(mask, shdma_chan_filter,
1425 (void *)(unsigned long)id, port->dev,
1426 dir == DMA_MEM_TO_DEV ? "tx" : "rx");
1427 if (!chan) { 1439 if (!chan) {
1428 dev_warn(port->dev, 1440 dev_warn(port->dev,
1429 "dma_request_slave_channel_compat failed\n"); 1441 "dma_request_slave_channel_compat failed\n");
@@ -1459,12 +1471,11 @@ static void sci_request_dma(struct uart_port *port)
1459 1471
1460 dev_dbg(port->dev, "%s: port %d\n", __func__, port->line); 1472 dev_dbg(port->dev, "%s: port %d\n", __func__, port->line);
1461 1473
1462 if (!port->dev->of_node && 1474 if (!port->dev->of_node)
1463 (s->cfg->dma_slave_tx <= 0 || s->cfg->dma_slave_rx <= 0))
1464 return; 1475 return;
1465 1476
1466 s->cookie_tx = -EINVAL; 1477 s->cookie_tx = -EINVAL;
1467 chan = sci_request_dma_chan(port, DMA_MEM_TO_DEV, s->cfg->dma_slave_tx); 1478 chan = sci_request_dma_chan(port, DMA_MEM_TO_DEV);
1468 dev_dbg(port->dev, "%s: TX: got channel %p\n", __func__, chan); 1479 dev_dbg(port->dev, "%s: TX: got channel %p\n", __func__, chan);
1469 if (chan) { 1480 if (chan) {
1470 s->chan_tx = chan; 1481 s->chan_tx = chan;
@@ -1486,7 +1497,7 @@ static void sci_request_dma(struct uart_port *port)
1486 INIT_WORK(&s->work_tx, work_fn_tx); 1497 INIT_WORK(&s->work_tx, work_fn_tx);
1487 } 1498 }
1488 1499
1489 chan = sci_request_dma_chan(port, DMA_DEV_TO_MEM, s->cfg->dma_slave_rx); 1500 chan = sci_request_dma_chan(port, DMA_DEV_TO_MEM);
1490 dev_dbg(port->dev, "%s: RX: got channel %p\n", __func__, chan); 1501 dev_dbg(port->dev, "%s: RX: got channel %p\n", __func__, chan);
1491 if (chan) { 1502 if (chan) {
1492 unsigned int i; 1503 unsigned int i;
@@ -1546,10 +1557,10 @@ static inline void sci_free_dma(struct uart_port *port)
1546 1557
1547static irqreturn_t sci_rx_interrupt(int irq, void *ptr) 1558static irqreturn_t sci_rx_interrupt(int irq, void *ptr)
1548{ 1559{
1549#ifdef CONFIG_SERIAL_SH_SCI_DMA
1550 struct uart_port *port = ptr; 1560 struct uart_port *port = ptr;
1551 struct sci_port *s = to_sci_port(port); 1561 struct sci_port *s = to_sci_port(port);
1552 1562
1563#ifdef CONFIG_SERIAL_SH_SCI_DMA
1553 if (s->chan_rx) { 1564 if (s->chan_rx) {
1554 u16 scr = serial_port_in(port, SCSCR); 1565 u16 scr = serial_port_in(port, SCSCR);
1555 u16 ssr = serial_port_in(port, SCxSR); 1566 u16 ssr = serial_port_in(port, SCxSR);
@@ -1574,6 +1585,14 @@ static irqreturn_t sci_rx_interrupt(int irq, void *ptr)
1574 } 1585 }
1575#endif 1586#endif
1576 1587
1588 if (s->rx_trigger > 1 && s->rx_fifo_timeout > 0) {
1589 if (!scif_rtrg_enabled(port))
1590 scif_set_rtrg(port, s->rx_trigger);
1591
1592 mod_timer(&s->rx_fifo_timer, jiffies + DIV_ROUND_UP(
1593 s->rx_frame * s->rx_fifo_timeout, 1000));
1594 }
1595
1577 /* I think sci_receive_chars has to be called irrespective 1596 /* I think sci_receive_chars has to be called irrespective
1578 * of whether the I_IXOFF is set, otherwise, how is the interrupt 1597 * of whether the I_IXOFF is set, otherwise, how is the interrupt
1579 * to be disabled? 1598 * to be disabled?
@@ -1642,12 +1661,10 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
1642 1661
1643 ssr_status = serial_port_in(port, SCxSR); 1662 ssr_status = serial_port_in(port, SCxSR);
1644 scr_status = serial_port_in(port, SCSCR); 1663 scr_status = serial_port_in(port, SCSCR);
1645 if (s->overrun_reg == SCxSR) 1664 if (s->params->overrun_reg == SCxSR)
1646 orer_status = ssr_status; 1665 orer_status = ssr_status;
1647 else { 1666 else if (sci_getreg(port, s->params->overrun_reg)->size)
1648 if (sci_getreg(port, s->overrun_reg)->size) 1667 orer_status = serial_port_in(port, s->params->overrun_reg);
1649 orer_status = serial_port_in(port, s->overrun_reg);
1650 }
1651 1668
1652 err_enabled = scr_status & port_rx_irq_mask(port); 1669 err_enabled = scr_status & port_rx_irq_mask(port);
1653 1670
@@ -1673,7 +1690,7 @@ static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
1673 ret = sci_br_interrupt(irq, ptr); 1690 ret = sci_br_interrupt(irq, ptr);
1674 1691
1675 /* Overrun Interrupt */ 1692 /* Overrun Interrupt */
1676 if (orer_status & s->overrun_mask) { 1693 if (orer_status & s->params->overrun_mask) {
1677 sci_handle_fifo_overrun(port); 1694 sci_handle_fifo_overrun(port);
1678 ret = IRQ_HANDLED; 1695 ret = IRQ_HANDLED;
1679 } 1696 }
@@ -1743,8 +1760,10 @@ static int sci_request_irq(struct sci_port *port)
1743 desc = sci_irq_desc + i; 1760 desc = sci_irq_desc + i;
1744 port->irqstr[j] = kasprintf(GFP_KERNEL, "%s:%s", 1761 port->irqstr[j] = kasprintf(GFP_KERNEL, "%s:%s",
1745 dev_name(up->dev), desc->desc); 1762 dev_name(up->dev), desc->desc);
1746 if (!port->irqstr[j]) 1763 if (!port->irqstr[j]) {
1764 ret = -ENOMEM;
1747 goto out_nomem; 1765 goto out_nomem;
1766 }
1748 1767
1749 ret = request_irq(irq, desc->handler, up->irqflags, 1768 ret = request_irq(irq, desc->handler, up->irqflags,
1750 port->irqstr[j], port); 1769 port->irqstr[j], port);
@@ -1874,7 +1893,7 @@ static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
1874 1893
1875 mctrl_gpio_set(s->gpios, mctrl); 1894 mctrl_gpio_set(s->gpios, mctrl);
1876 1895
1877 if (!(s->cfg->capabilities & SCIx_HAVE_RTSCTS)) 1896 if (!s->has_rtscts)
1878 return; 1897 return;
1879 1898
1880 if (!(mctrl & TIOCM_RTS)) { 1899 if (!(mctrl & TIOCM_RTS)) {
@@ -2136,6 +2155,7 @@ static void sci_reset(struct uart_port *port)
2136{ 2155{
2137 const struct plat_sci_reg *reg; 2156 const struct plat_sci_reg *reg;
2138 unsigned int status; 2157 unsigned int status;
2158 struct sci_port *s = to_sci_port(port);
2139 2159
2140 do { 2160 do {
2141 status = serial_port_in(port, SCxSR); 2161 status = serial_port_in(port, SCxSR);
@@ -2155,12 +2175,26 @@ static void sci_reset(struct uart_port *port)
2155 status &= ~(SCLSR_TO | SCLSR_ORER); 2175 status &= ~(SCLSR_TO | SCLSR_ORER);
2156 serial_port_out(port, SCLSR, status); 2176 serial_port_out(port, SCLSR, status);
2157 } 2177 }
2178
2179 if (s->rx_trigger > 1) {
2180 if (s->rx_fifo_timeout) {
2181 scif_set_rtrg(port, 1);
2182 setup_timer(&s->rx_fifo_timer, rx_fifo_timer_fn,
2183 (unsigned long)s);
2184 } else {
2185 if (port->type == PORT_SCIFA ||
2186 port->type == PORT_SCIFB)
2187 scif_set_rtrg(port, 1);
2188 else
2189 scif_set_rtrg(port, s->rx_trigger);
2190 }
2191 }
2158} 2192}
2159 2193
2160static void sci_set_termios(struct uart_port *port, struct ktermios *termios, 2194static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
2161 struct ktermios *old) 2195 struct ktermios *old)
2162{ 2196{
2163 unsigned int baud, smr_val = SCSMR_ASYNC, scr_val = 0, i; 2197 unsigned int baud, smr_val = SCSMR_ASYNC, scr_val = 0, i, bits;
2164 unsigned int brr = 255, cks = 0, srr = 15, dl = 0, sccks = 0; 2198 unsigned int brr = 255, cks = 0, srr = 15, dl = 0, sccks = 0;
2165 unsigned int brr1 = 255, cks1 = 0, srr1 = 15, dl1 = 0; 2199 unsigned int brr1 = 255, cks1 = 0, srr1 = 15, dl1 = 0;
2166 struct sci_port *s = to_sci_port(port); 2200 struct sci_port *s = to_sci_port(port);
@@ -2341,7 +2375,8 @@ done:
2341 serial_port_out(port, SCFCR, ctrl); 2375 serial_port_out(port, SCFCR, ctrl);
2342 } 2376 }
2343 2377
2344 scr_val |= s->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0); 2378 scr_val |= SCSCR_RE | SCSCR_TE |
2379 (s->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0));
2345 dev_dbg(port->dev, "SCSCR 0x%x\n", scr_val); 2380 dev_dbg(port->dev, "SCSCR 0x%x\n", scr_val);
2346 serial_port_out(port, SCSCR, scr_val); 2381 serial_port_out(port, SCSCR, scr_val);
2347 if ((srr + 1 == 5) && 2382 if ((srr + 1 == 5) &&
@@ -2355,7 +2390,6 @@ done:
2355 udelay(DIV_ROUND_UP(10 * 1000000, baud)); 2390 udelay(DIV_ROUND_UP(10 * 1000000, baud));
2356 } 2391 }
2357 2392
2358#ifdef CONFIG_SERIAL_SH_SCI_DMA
2359 /* 2393 /*
2360 * Calculate delay for 2 DMA buffers (4 FIFO). 2394 * Calculate delay for 2 DMA buffers (4 FIFO).
2361 * See serial_core.c::uart_update_timeout(). 2395 * See serial_core.c::uart_update_timeout().
@@ -2366,36 +2400,34 @@ done:
2366 * value obtained by this formula is too small. Therefore, if the value 2400 * value obtained by this formula is too small. Therefore, if the value
2367 * is smaller than 20ms, use 20ms as the timeout value for DMA. 2401 * is smaller than 20ms, use 20ms as the timeout value for DMA.
2368 */ 2402 */
2369 if (s->chan_rx) { 2403 /* byte size and parity */
2370 unsigned int bits; 2404 switch (termios->c_cflag & CSIZE) {
2405 case CS5:
2406 bits = 7;
2407 break;
2408 case CS6:
2409 bits = 8;
2410 break;
2411 case CS7:
2412 bits = 9;
2413 break;
2414 default:
2415 bits = 10;
2416 break;
2417 }
2371 2418
2372 /* byte size and parity */ 2419 if (termios->c_cflag & CSTOPB)
2373 switch (termios->c_cflag & CSIZE) { 2420 bits++;
2374 case CS5: 2421 if (termios->c_cflag & PARENB)
2375 bits = 7; 2422 bits++;
2376 break;
2377 case CS6:
2378 bits = 8;
2379 break;
2380 case CS7:
2381 bits = 9;
2382 break;
2383 default:
2384 bits = 10;
2385 break;
2386 }
2387 2423
2388 if (termios->c_cflag & CSTOPB) 2424 s->rx_frame = (100 * bits * HZ) / (baud / 10);
2389 bits++; 2425#ifdef CONFIG_SERIAL_SH_SCI_DMA
2390 if (termios->c_cflag & PARENB) 2426 s->rx_timeout = DIV_ROUND_UP(s->buf_len_rx * 2 * s->rx_frame, 1000);
2391 bits++; 2427 dev_dbg(port->dev, "DMA Rx t-out %ums, tty t-out %u jiffies\n",
2392 s->rx_timeout = DIV_ROUND_UP((s->buf_len_rx * 2 * bits * HZ) / 2428 s->rx_timeout * 1000 / HZ, port->timeout);
2393 (baud / 10), 10); 2429 if (s->rx_timeout < msecs_to_jiffies(20))
2394 dev_dbg(port->dev, "DMA Rx t-out %ums, tty t-out %u jiffies\n", 2430 s->rx_timeout = msecs_to_jiffies(20);
2395 s->rx_timeout * 1000 / HZ, port->timeout);
2396 if (s->rx_timeout < msecs_to_jiffies(20))
2397 s->rx_timeout = msecs_to_jiffies(20);
2398 }
2399#endif 2431#endif
2400 2432
2401 if ((termios->c_cflag & CREAD) != 0) 2433 if ((termios->c_cflag & CREAD) != 0)
@@ -2452,7 +2484,7 @@ static int sci_remap_port(struct uart_port *port)
2452 if (port->membase) 2484 if (port->membase)
2453 return 0; 2485 return 0;
2454 2486
2455 if (port->flags & UPF_IOREMAP) { 2487 if (port->dev->of_node || (port->flags & UPF_IOREMAP)) {
2456 port->membase = ioremap_nocache(port->mapbase, sport->reg_size); 2488 port->membase = ioremap_nocache(port->mapbase, sport->reg_size);
2457 if (unlikely(!port->membase)) { 2489 if (unlikely(!port->membase)) {
2458 dev_err(port->dev, "can't remap port#%d\n", port->line); 2490 dev_err(port->dev, "can't remap port#%d\n", port->line);
@@ -2474,7 +2506,7 @@ static void sci_release_port(struct uart_port *port)
2474{ 2506{
2475 struct sci_port *sport = to_sci_port(port); 2507 struct sci_port *sport = to_sci_port(port);
2476 2508
2477 if (port->flags & UPF_IOREMAP) { 2509 if (port->dev->of_node || (port->flags & UPF_IOREMAP)) {
2478 iounmap(port->membase); 2510 iounmap(port->membase);
2479 port->membase = NULL; 2511 port->membase = NULL;
2480 } 2512 }
@@ -2604,9 +2636,50 @@ found:
2604 return 0; 2636 return 0;
2605} 2637}
2606 2638
2639static const struct sci_port_params *
2640sci_probe_regmap(const struct plat_sci_port *cfg)
2641{
2642 unsigned int regtype;
2643
2644 if (cfg->regtype != SCIx_PROBE_REGTYPE)
2645 return &sci_port_params[cfg->regtype];
2646
2647 switch (cfg->type) {
2648 case PORT_SCI:
2649 regtype = SCIx_SCI_REGTYPE;
2650 break;
2651 case PORT_IRDA:
2652 regtype = SCIx_IRDA_REGTYPE;
2653 break;
2654 case PORT_SCIFA:
2655 regtype = SCIx_SCIFA_REGTYPE;
2656 break;
2657 case PORT_SCIFB:
2658 regtype = SCIx_SCIFB_REGTYPE;
2659 break;
2660 case PORT_SCIF:
2661 /*
2662 * The SH-4 is a bit of a misnomer here, although that's
2663 * where this particular port layout originated. This
2664 * configuration (or some slight variation thereof)
2665 * remains the dominant model for all SCIFs.
2666 */
2667 regtype = SCIx_SH4_SCIF_REGTYPE;
2668 break;
2669 case PORT_HSCIF:
2670 regtype = SCIx_HSCIF_REGTYPE;
2671 break;
2672 default:
2673 pr_err("Can't probe register map for given port\n");
2674 return NULL;
2675 }
2676
2677 return &sci_port_params[regtype];
2678}
2679
2607static int sci_init_single(struct platform_device *dev, 2680static int sci_init_single(struct platform_device *dev,
2608 struct sci_port *sci_port, unsigned int index, 2681 struct sci_port *sci_port, unsigned int index,
2609 struct plat_sci_port *p, bool early) 2682 const struct plat_sci_port *p, bool early)
2610{ 2683{
2611 struct uart_port *port = &sci_port->port; 2684 struct uart_port *port = &sci_port->port;
2612 const struct resource *res; 2685 const struct resource *res;
@@ -2643,57 +2716,41 @@ static int sci_init_single(struct platform_device *dev,
2643 sci_port->irqs[3] = sci_port->irqs[0]; 2716 sci_port->irqs[3] = sci_port->irqs[0];
2644 } 2717 }
2645 2718
2646 if (p->regtype == SCIx_PROBE_REGTYPE) { 2719 sci_port->params = sci_probe_regmap(p);
2647 ret = sci_probe_regmap(p); 2720 if (unlikely(sci_port->params == NULL))
2648 if (unlikely(ret)) 2721 return -EINVAL;
2649 return ret;
2650 }
2651 2722
2652 switch (p->type) { 2723 switch (p->type) {
2653 case PORT_SCIFB: 2724 case PORT_SCIFB:
2654 port->fifosize = 256; 2725 sci_port->rx_trigger = 48;
2655 sci_port->overrun_reg = SCxSR;
2656 sci_port->overrun_mask = SCIFA_ORER;
2657 sci_port->sampling_rate_mask = SCI_SR_SCIFAB;
2658 break; 2726 break;
2659 case PORT_HSCIF: 2727 case PORT_HSCIF:
2660 port->fifosize = 128; 2728 sci_port->rx_trigger = 64;
2661 sci_port->overrun_reg = SCLSR;
2662 sci_port->overrun_mask = SCLSR_ORER;
2663 sci_port->sampling_rate_mask = SCI_SR_RANGE(8, 32);
2664 break; 2729 break;
2665 case PORT_SCIFA: 2730 case PORT_SCIFA:
2666 port->fifosize = 64; 2731 sci_port->rx_trigger = 32;
2667 sci_port->overrun_reg = SCxSR;
2668 sci_port->overrun_mask = SCIFA_ORER;
2669 sci_port->sampling_rate_mask = SCI_SR_SCIFAB;
2670 break; 2732 break;
2671 case PORT_SCIF: 2733 case PORT_SCIF:
2672 port->fifosize = 16; 2734 if (p->regtype == SCIx_SH7705_SCIF_REGTYPE)
2673 if (p->regtype == SCIx_SH7705_SCIF_REGTYPE) { 2735 /* RX triggering not implemented for this IP */
2674 sci_port->overrun_reg = SCxSR; 2736 sci_port->rx_trigger = 1;
2675 sci_port->overrun_mask = SCIFA_ORER; 2737 else
2676 sci_port->sampling_rate_mask = SCI_SR(16); 2738 sci_port->rx_trigger = 8;
2677 } else {
2678 sci_port->overrun_reg = SCLSR;
2679 sci_port->overrun_mask = SCLSR_ORER;
2680 sci_port->sampling_rate_mask = SCI_SR(32);
2681 }
2682 break; 2739 break;
2683 default: 2740 default:
2684 port->fifosize = 1; 2741 sci_port->rx_trigger = 1;
2685 sci_port->overrun_reg = SCxSR;
2686 sci_port->overrun_mask = SCI_ORER;
2687 sci_port->sampling_rate_mask = SCI_SR(32);
2688 break; 2742 break;
2689 } 2743 }
2690 2744
2745 sci_port->rx_fifo_timeout = 0;
2746
2691 /* SCIFA on sh7723 and sh7724 need a custom sampling rate that doesn't 2747 /* SCIFA on sh7723 and sh7724 need a custom sampling rate that doesn't
2692 * match the SoC datasheet, this should be investigated. Let platform 2748 * match the SoC datasheet, this should be investigated. Let platform
2693 * data override the sampling rate for now. 2749 * data override the sampling rate for now.
2694 */ 2750 */
2695 if (p->sampling_rate) 2751 sci_port->sampling_rate_mask = p->sampling_rate
2696 sci_port->sampling_rate_mask = SCI_SR(p->sampling_rate); 2752 ? SCI_SR(p->sampling_rate)
2753 : sci_port->params->sampling_rate_mask;
2697 2754
2698 if (!early) { 2755 if (!early) {
2699 ret = sci_init_clocks(sci_port, &dev->dev); 2756 ret = sci_init_clocks(sci_port, &dev->dev);
@@ -2705,34 +2762,17 @@ static int sci_init_single(struct platform_device *dev,
2705 pm_runtime_enable(&dev->dev); 2762 pm_runtime_enable(&dev->dev);
2706 } 2763 }
2707 2764
2708 sci_port->break_timer.data = (unsigned long)sci_port; 2765 port->type = p->type;
2709 sci_port->break_timer.function = sci_break_timer; 2766 port->flags = UPF_FIXED_PORT | UPF_BOOT_AUTOCONF | p->flags;
2710 init_timer(&sci_port->break_timer); 2767 port->fifosize = sci_port->params->fifosize;
2711
2712 /*
2713 * Establish some sensible defaults for the error detection.
2714 */
2715 if (p->type == PORT_SCI) {
2716 sci_port->error_mask = SCI_DEFAULT_ERROR_MASK;
2717 sci_port->error_clear = SCI_ERROR_CLEAR;
2718 } else {
2719 sci_port->error_mask = SCIF_DEFAULT_ERROR_MASK;
2720 sci_port->error_clear = SCIF_ERROR_CLEAR;
2721 }
2722 2768
2723 /* 2769 if (port->type == PORT_SCI) {
2724 * Make the error mask inclusive of overrun detection, if 2770 if (sci_port->reg_size >= 0x20)
2725 * supported. 2771 port->regshift = 2;
2726 */ 2772 else
2727 if (sci_port->overrun_reg == SCxSR) { 2773 port->regshift = 1;
2728 sci_port->error_mask |= sci_port->overrun_mask;
2729 sci_port->error_clear &= ~sci_port->overrun_mask;
2730 } 2774 }
2731 2775
2732 port->type = p->type;
2733 port->flags = UPF_FIXED_PORT | p->flags;
2734 port->regshift = p->regshift;
2735
2736 /* 2776 /*
2737 * The UART port needs an IRQ value, so we peg this to the RX IRQ 2777 * The UART port needs an IRQ value, so we peg this to the RX IRQ
2738 * for the multi-IRQ ports, which is where we are primarily 2778 * for the multi-IRQ ports, which is where we are primarily
@@ -2746,10 +2786,6 @@ static int sci_init_single(struct platform_device *dev,
2746 port->serial_in = sci_serial_in; 2786 port->serial_in = sci_serial_in;
2747 port->serial_out = sci_serial_out; 2787 port->serial_out = sci_serial_out;
2748 2788
2749 if (p->dma_slave_tx > 0 && p->dma_slave_rx > 0)
2750 dev_dbg(port->dev, "DMA tx %d, rx %d\n",
2751 p->dma_slave_tx, p->dma_slave_rx);
2752
2753 return 0; 2789 return 0;
2754} 2790}
2755 2791
@@ -2791,7 +2827,8 @@ static void serial_console_write(struct console *co, const char *s,
2791 2827
2792 /* first save SCSCR then disable interrupts, keep clock source */ 2828 /* first save SCSCR then disable interrupts, keep clock source */
2793 ctrl = serial_port_in(port, SCSCR); 2829 ctrl = serial_port_in(port, SCSCR);
2794 ctrl_temp = (sci_port->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0)) | 2830 ctrl_temp = SCSCR_RE | SCSCR_TE |
2831 (sci_port->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0)) |
2795 (ctrl & (SCSCR_CKE1 | SCSCR_CKE0)); 2832 (ctrl & (SCSCR_CKE1 | SCSCR_CKE0));
2796 serial_port_out(port, SCSCR, ctrl_temp); 2833 serial_port_out(port, SCSCR, ctrl_temp);
2797 2834
@@ -2866,7 +2903,7 @@ static char early_serial_buf[32];
2866 2903
2867static int sci_probe_earlyprintk(struct platform_device *pdev) 2904static int sci_probe_earlyprintk(struct platform_device *pdev)
2868{ 2905{
2869 struct plat_sci_port *cfg = dev_get_platdata(&pdev->dev); 2906 const struct plat_sci_port *cfg = dev_get_platdata(&pdev->dev);
2870 2907
2871 if (early_serial_console.data) 2908 if (early_serial_console.data)
2872 return -EEXIST; 2909 return -EEXIST;
@@ -2916,6 +2953,15 @@ static int sci_remove(struct platform_device *dev)
2916 2953
2917 sci_cleanup_single(port); 2954 sci_cleanup_single(port);
2918 2955
2956 if (port->port.fifosize > 1) {
2957 sysfs_remove_file(&dev->dev.kobj,
2958 &dev_attr_rx_fifo_trigger.attr);
2959 }
2960 if (port->port.type == PORT_SCIFA || port->port.type == PORT_SCIFB) {
2961 sysfs_remove_file(&dev->dev.kobj,
2962 &dev_attr_rx_fifo_timeout.attr);
2963 }
2964
2919 return 0; 2965 return 0;
2920} 2966}
2921 2967
@@ -2963,12 +3009,13 @@ static const struct of_device_id of_sci_match[] = {
2963}; 3009};
2964MODULE_DEVICE_TABLE(of, of_sci_match); 3010MODULE_DEVICE_TABLE(of, of_sci_match);
2965 3011
2966static struct plat_sci_port * 3012static struct plat_sci_port *sci_parse_dt(struct platform_device *pdev,
2967sci_parse_dt(struct platform_device *pdev, unsigned int *dev_id) 3013 unsigned int *dev_id)
2968{ 3014{
2969 struct device_node *np = pdev->dev.of_node; 3015 struct device_node *np = pdev->dev.of_node;
2970 const struct of_device_id *match; 3016 const struct of_device_id *match;
2971 struct plat_sci_port *p; 3017 struct plat_sci_port *p;
3018 struct sci_port *sp;
2972 int id; 3019 int id;
2973 3020
2974 if (!IS_ENABLED(CONFIG_OF) || !np) 3021 if (!IS_ENABLED(CONFIG_OF) || !np)
@@ -2989,15 +3036,14 @@ sci_parse_dt(struct platform_device *pdev, unsigned int *dev_id)
2989 return NULL; 3036 return NULL;
2990 } 3037 }
2991 3038
3039 sp = &sci_ports[id];
2992 *dev_id = id; 3040 *dev_id = id;
2993 3041
2994 p->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
2995 p->type = SCI_OF_TYPE(match->data); 3042 p->type = SCI_OF_TYPE(match->data);
2996 p->regtype = SCI_OF_REGTYPE(match->data); 3043 p->regtype = SCI_OF_REGTYPE(match->data);
2997 p->scscr = SCSCR_RE | SCSCR_TE;
2998 3044
2999 if (of_find_property(np, "uart-has-rtscts", NULL)) 3045 if (of_find_property(np, "uart-has-rtscts", NULL))
3000 p->capabilities |= SCIx_HAVE_RTSCTS; 3046 sp->has_rtscts = true;
3001 3047
3002 return p; 3048 return p;
3003} 3049}
@@ -3025,7 +3071,7 @@ static int sci_probe_single(struct platform_device *dev,
3025 if (IS_ERR(sciport->gpios) && PTR_ERR(sciport->gpios) != -ENOSYS) 3071 if (IS_ERR(sciport->gpios) && PTR_ERR(sciport->gpios) != -ENOSYS)
3026 return PTR_ERR(sciport->gpios); 3072 return PTR_ERR(sciport->gpios);
3027 3073
3028 if (p->capabilities & SCIx_HAVE_RTSCTS) { 3074 if (sciport->has_rtscts) {
3029 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(sciport->gpios, 3075 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(sciport->gpios,
3030 UART_GPIO_CTS)) || 3076 UART_GPIO_CTS)) ||
3031 !IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(sciport->gpios, 3077 !IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(sciport->gpios,
@@ -3081,6 +3127,24 @@ static int sci_probe(struct platform_device *dev)
3081 if (ret) 3127 if (ret)
3082 return ret; 3128 return ret;
3083 3129
3130 if (sp->port.fifosize > 1) {
3131 ret = sysfs_create_file(&dev->dev.kobj,
3132 &dev_attr_rx_fifo_trigger.attr);
3133 if (ret)
3134 return ret;
3135 }
3136 if (sp->port.type == PORT_SCIFA || sp->port.type == PORT_SCIFB) {
3137 ret = sysfs_create_file(&dev->dev.kobj,
3138 &dev_attr_rx_fifo_timeout.attr);
3139 if (ret) {
3140 if (sp->port.fifosize > 1) {
3141 sysfs_remove_file(&dev->dev.kobj,
3142 &dev_attr_rx_fifo_trigger.attr);
3143 }
3144 return ret;
3145 }
3146 }
3147
3084#ifdef CONFIG_SH_STANDARD_BIOS 3148#ifdef CONFIG_SH_STANDARD_BIOS
3085 sh_bios_gdb_detach(); 3149 sh_bios_gdb_detach();
3086#endif 3150#endif
@@ -3159,12 +3223,12 @@ static int __init early_console_setup(struct earlycon_device *device,
3159 device->port.serial_out = sci_serial_out; 3223 device->port.serial_out = sci_serial_out;
3160 device->port.type = type; 3224 device->port.type = type;
3161 memcpy(&sci_ports[0].port, &device->port, sizeof(struct uart_port)); 3225 memcpy(&sci_ports[0].port, &device->port, sizeof(struct uart_port));
3226 port_cfg.type = type;
3162 sci_ports[0].cfg = &port_cfg; 3227 sci_ports[0].cfg = &port_cfg;
3163 sci_ports[0].cfg->type = type; 3228 sci_ports[0].params = sci_probe_regmap(&port_cfg);
3164 sci_probe_regmap(sci_ports[0].cfg); 3229 port_cfg.scscr = sci_serial_in(&sci_ports[0].port, SCSCR);
3165 port_cfg.scscr = sci_serial_in(&sci_ports[0].port, SCSCR) | 3230 sci_serial_out(&sci_ports[0].port, SCSCR,
3166 SCSCR_RE | SCSCR_TE; 3231 SCSCR_RE | SCSCR_TE | port_cfg.scscr);
3167 sci_serial_out(&sci_ports[0].port, SCSCR, port_cfg.scscr);
3168 3232
3169 device->con->write = serial_console_write; 3233 device->con->write = serial_console_write;
3170 return 0; 3234 return 0;
diff --git a/drivers/tty/serial/sh-sci.h b/drivers/tty/serial/sh-sci.h
index ffa6d688c335..971b2ab088d8 100644
--- a/drivers/tty/serial/sh-sci.h
+++ b/drivers/tty/serial/sh-sci.h
@@ -29,6 +29,8 @@ enum {
29 SCPDR, /* Serial Port Data Register */ 29 SCPDR, /* Serial Port Data Register */
30 SCDL, /* BRG Frequency Division Register */ 30 SCDL, /* BRG Frequency Division Register */
31 SCCKS, /* BRG Clock Select Register */ 31 SCCKS, /* BRG Clock Select Register */
32 HSRTRGR, /* Rx FIFO Data Count Trigger Register */
33 HSTTRGR, /* Tx FIFO Data Count Trigger Register */
32 34
33 SCIx_NR_REGS, 35 SCIx_NR_REGS,
34}; 36};
@@ -99,6 +101,10 @@ enum {
99#define SCIF_BREAK_CLEAR (u32)(~(SCIF_PER | SCIF_FER | SCIF_BRK)) 101#define SCIF_BREAK_CLEAR (u32)(~(SCIF_PER | SCIF_FER | SCIF_BRK))
100 102
101/* SCFCR (FIFO Control Register) */ 103/* SCFCR (FIFO Control Register) */
104#define SCFCR_RTRG1 BIT(7) /* Receive FIFO Data Count Trigger */
105#define SCFCR_RTRG0 BIT(6)
106#define SCFCR_TTRG1 BIT(5) /* Transmit FIFO Data Count Trigger */
107#define SCFCR_TTRG0 BIT(4)
102#define SCFCR_MCE BIT(3) /* Modem Control Enable */ 108#define SCFCR_MCE BIT(3) /* Modem Control Enable */
103#define SCFCR_TFRST BIT(2) /* Transmit FIFO Data Register Reset */ 109#define SCFCR_TFRST BIT(2) /* Transmit FIFO Data Register Reset */
104#define SCFCR_RFRST BIT(1) /* Receive FIFO Data Register Reset */ 110#define SCFCR_RFRST BIT(1) /* Receive FIFO Data Register Reset */
@@ -145,18 +151,18 @@ enum {
145#define SCCKS_XIN BIT(14) /* SC_CLK uses bus clock (1) or SCIF_CLK (0) */ 151#define SCCKS_XIN BIT(14) /* SC_CLK uses bus clock (1) or SCIF_CLK (0) */
146 152
147#define SCxSR_TEND(port) (((port)->type == PORT_SCI) ? SCI_TEND : SCIF_TEND) 153#define SCxSR_TEND(port) (((port)->type == PORT_SCI) ? SCI_TEND : SCIF_TEND)
148#define SCxSR_RDxF(port) (((port)->type == PORT_SCI) ? SCI_RDRF : SCIF_RDF) 154#define SCxSR_RDxF(port) (((port)->type == PORT_SCI) ? SCI_RDRF : SCIF_DR | SCIF_RDF)
149#define SCxSR_TDxE(port) (((port)->type == PORT_SCI) ? SCI_TDRE : SCIF_TDFE) 155#define SCxSR_TDxE(port) (((port)->type == PORT_SCI) ? SCI_TDRE : SCIF_TDFE)
150#define SCxSR_FER(port) (((port)->type == PORT_SCI) ? SCI_FER : SCIF_FER) 156#define SCxSR_FER(port) (((port)->type == PORT_SCI) ? SCI_FER : SCIF_FER)
151#define SCxSR_PER(port) (((port)->type == PORT_SCI) ? SCI_PER : SCIF_PER) 157#define SCxSR_PER(port) (((port)->type == PORT_SCI) ? SCI_PER : SCIF_PER)
152#define SCxSR_BRK(port) (((port)->type == PORT_SCI) ? 0x00 : SCIF_BRK) 158#define SCxSR_BRK(port) (((port)->type == PORT_SCI) ? 0x00 : SCIF_BRK)
153 159
154#define SCxSR_ERRORS(port) (to_sci_port(port)->error_mask) 160#define SCxSR_ERRORS(port) (to_sci_port(port)->params->error_mask)
155 161
156#define SCxSR_RDxF_CLEAR(port) \ 162#define SCxSR_RDxF_CLEAR(port) \
157 (((port)->type == PORT_SCI) ? SCI_RDxF_CLEAR : SCIF_RDxF_CLEAR) 163 (((port)->type == PORT_SCI) ? SCI_RDxF_CLEAR : SCIF_RDxF_CLEAR)
158#define SCxSR_ERROR_CLEAR(port) \ 164#define SCxSR_ERROR_CLEAR(port) \
159 (to_sci_port(port)->error_clear) 165 (to_sci_port(port)->params->error_clear)
160#define SCxSR_TDxE_CLEAR(port) \ 166#define SCxSR_TDxE_CLEAR(port) \
161 (((port)->type == PORT_SCI) ? SCI_TDxE_CLEAR : SCIF_TDxE_CLEAR) 167 (((port)->type == PORT_SCI) ? SCI_TDxE_CLEAR : SCIF_TDxE_CLEAR)
162#define SCxSR_BREAK_CLEAR(port) \ 168#define SCxSR_BREAK_CLEAR(port) \
diff --git a/drivers/tty/serial/sirfsoc_uart.c b/drivers/tty/serial/sirfsoc_uart.c
index b186c9c4f850..e03282d92b59 100644
--- a/drivers/tty/serial/sirfsoc_uart.c
+++ b/drivers/tty/serial/sirfsoc_uart.c
@@ -1061,7 +1061,7 @@ static void sirfsoc_uart_config_port(struct uart_port *port, int flags)
1061 } 1061 }
1062} 1062}
1063 1063
1064static struct uart_ops sirfsoc_uart_ops = { 1064static const struct uart_ops sirfsoc_uart_ops = {
1065 .tx_empty = sirfsoc_uart_tx_empty, 1065 .tx_empty = sirfsoc_uart_tx_empty,
1066 .get_mctrl = sirfsoc_uart_get_mctrl, 1066 .get_mctrl = sirfsoc_uart_get_mctrl,
1067 .set_mctrl = sirfsoc_uart_set_mctrl, 1067 .set_mctrl = sirfsoc_uart_set_mctrl,
diff --git a/drivers/tty/serial/sn_console.c b/drivers/tty/serial/sn_console.c
index d4692d888e9d..9e0e6586c698 100644
--- a/drivers/tty/serial/sn_console.c
+++ b/drivers/tty/serial/sn_console.c
@@ -380,7 +380,7 @@ static void snp_config_port(struct uart_port *port, int flags)
380 380
381/* Associate the uart functions above - given to serial core */ 381/* Associate the uart functions above - given to serial core */
382 382
383static struct uart_ops sn_console_ops = { 383static const struct uart_ops sn_console_ops = {
384 .tx_empty = snp_tx_empty, 384 .tx_empty = snp_tx_empty,
385 .set_mctrl = snp_set_mctrl, 385 .set_mctrl = snp_set_mctrl,
386 .get_mctrl = snp_get_mctrl, 386 .get_mctrl = snp_get_mctrl,
diff --git a/drivers/tty/serial/sprd_serial.c b/drivers/tty/serial/sprd_serial.c
index 699447aa8b43..d98e3dc4838e 100644
--- a/drivers/tty/serial/sprd_serial.c
+++ b/drivers/tty/serial/sprd_serial.c
@@ -498,7 +498,7 @@ static int sprd_verify_port(struct uart_port *port,
498 return 0; 498 return 0;
499} 499}
500 500
501static struct uart_ops serial_sprd_ops = { 501static const struct uart_ops serial_sprd_ops = {
502 .tx_empty = sprd_tx_empty, 502 .tx_empty = sprd_tx_empty,
503 .get_mctrl = sprd_get_mctrl, 503 .get_mctrl = sprd_get_mctrl,
504 .set_mctrl = sprd_set_mctrl, 504 .set_mctrl = sprd_set_mctrl,
diff --git a/drivers/tty/serial/st-asc.c b/drivers/tty/serial/st-asc.c
index 379e5bd37df9..bcf1d33e6ffe 100644
--- a/drivers/tty/serial/st-asc.c
+++ b/drivers/tty/serial/st-asc.c
@@ -18,6 +18,7 @@
18#include <linux/serial.h> 18#include <linux/serial.h>
19#include <linux/console.h> 19#include <linux/console.h>
20#include <linux/sysrq.h> 20#include <linux/sysrq.h>
21#include <linux/pinctrl/consumer.h>
21#include <linux/platform_device.h> 22#include <linux/platform_device.h>
22#include <linux/io.h> 23#include <linux/io.h>
23#include <linux/irq.h> 24#include <linux/irq.h>
@@ -30,15 +31,23 @@
30#include <linux/of_platform.h> 31#include <linux/of_platform.h>
31#include <linux/serial_core.h> 32#include <linux/serial_core.h>
32#include <linux/clk.h> 33#include <linux/clk.h>
34#include <linux/gpio/consumer.h>
33 35
34#define DRIVER_NAME "st-asc" 36#define DRIVER_NAME "st-asc"
35#define ASC_SERIAL_NAME "ttyAS" 37#define ASC_SERIAL_NAME "ttyAS"
36#define ASC_FIFO_SIZE 16 38#define ASC_FIFO_SIZE 16
37#define ASC_MAX_PORTS 8 39#define ASC_MAX_PORTS 8
38 40
41/* Pinctrl states */
42#define DEFAULT 0
43#define NO_HW_FLOWCTRL 1
44
39struct asc_port { 45struct asc_port {
40 struct uart_port port; 46 struct uart_port port;
47 struct gpio_desc *rts;
41 struct clk *clk; 48 struct clk *clk;
49 struct pinctrl *pinctrl;
50 struct pinctrl_state *states[2];
42 unsigned int hw_flow_control:1; 51 unsigned int hw_flow_control:1;
43 unsigned int force_m1:1; 52 unsigned int force_m1:1;
44}; 53};
@@ -287,9 +296,19 @@ static void asc_transmit_chars(struct uart_port *port)
287static void asc_receive_chars(struct uart_port *port) 296static void asc_receive_chars(struct uart_port *port)
288{ 297{
289 struct tty_port *tport = &port->state->port; 298 struct tty_port *tport = &port->state->port;
290 unsigned long status; 299 unsigned long status, mode;
291 unsigned long c = 0; 300 unsigned long c = 0;
292 char flag; 301 char flag;
302 bool ignore_pe = false;
303
304 /*
305 * Datasheet states: If the MODE field selects an 8-bit frame then
306 * this [parity error] bit is undefined. Software should ignore this
307 * bit when reading 8-bit frames.
308 */
309 mode = asc_in(port, ASC_CTL) & ASC_CTL_MODE_MSK;
310 if (mode == ASC_CTL_MODE_8BIT || mode == ASC_CTL_MODE_8BIT_PAR)
311 ignore_pe = true;
293 312
294 if (port->irq_wake) 313 if (port->irq_wake)
295 pm_wakeup_event(tport->tty->dev, 0); 314 pm_wakeup_event(tport->tty->dev, 0);
@@ -299,8 +318,8 @@ static void asc_receive_chars(struct uart_port *port)
299 flag = TTY_NORMAL; 318 flag = TTY_NORMAL;
300 port->icount.rx++; 319 port->icount.rx++;
301 320
302 if ((c & (ASC_RXBUF_FE | ASC_RXBUF_PE)) || 321 if (status & ASC_STA_OE || c & ASC_RXBUF_FE ||
303 status & ASC_STA_OE) { 322 (c & ASC_RXBUF_PE && !ignore_pe)) {
304 323
305 if (c & ASC_RXBUF_FE) { 324 if (c & ASC_RXBUF_FE) {
306 if (c == (ASC_RXBUF_FE | ASC_RXBUF_DUMMY_RX)) { 325 if (c == (ASC_RXBUF_FE | ASC_RXBUF_DUMMY_RX)) {
@@ -381,12 +400,27 @@ static unsigned int asc_tx_empty(struct uart_port *port)
381 400
382static void asc_set_mctrl(struct uart_port *port, unsigned int mctrl) 401static void asc_set_mctrl(struct uart_port *port, unsigned int mctrl)
383{ 402{
403 struct asc_port *ascport = to_asc_port(port);
404
384 /* 405 /*
385 * This routine is used for seting signals of: DTR, DCD, CTS/RTS 406 * This routine is used for seting signals of: DTR, DCD, CTS and RTS.
386 * We use ASC's hardware for CTS/RTS, so don't need any for that. 407 * We use ASC's hardware for CTS/RTS when hardware flow-control is
387 * Some boards have DTR and DCD implemented using PIO pins, 408 * enabled, however if the RTS line is required for another purpose,
388 * code to do this should be hooked in here. 409 * commonly controlled using HUP from userspace, then we need to toggle
410 * it manually, using GPIO.
411 *
412 * Some boards also have DTR and DCD implemented using PIO pins, code to
413 * do this should be hooked in here.
389 */ 414 */
415
416 if (!ascport->rts)
417 return;
418
419 /* If HW flow-control is enabled, we can't fiddle with the RTS line */
420 if (asc_in(port, ASC_CTL) & ASC_CTL_CTSENABLE)
421 return;
422
423 gpiod_set_value(ascport->rts, mctrl & TIOCM_RTS);
390} 424}
391 425
392static unsigned int asc_get_mctrl(struct uart_port *port) 426static unsigned int asc_get_mctrl(struct uart_port *port)
@@ -479,6 +513,8 @@ static void asc_set_termios(struct uart_port *port, struct ktermios *termios,
479 struct ktermios *old) 513 struct ktermios *old)
480{ 514{
481 struct asc_port *ascport = to_asc_port(port); 515 struct asc_port *ascport = to_asc_port(port);
516 struct device_node *np = port->dev->of_node;
517 struct gpio_desc *gpiod;
482 unsigned int baud; 518 unsigned int baud;
483 u32 ctrl_val; 519 u32 ctrl_val;
484 tcflag_t cflag; 520 tcflag_t cflag;
@@ -522,9 +558,32 @@ static void asc_set_termios(struct uart_port *port, struct ktermios *termios,
522 ctrl_val |= ASC_CTL_PARITYODD; 558 ctrl_val |= ASC_CTL_PARITYODD;
523 559
524 /* hardware flow control */ 560 /* hardware flow control */
525 if ((cflag & CRTSCTS)) 561 if ((cflag & CRTSCTS)) {
526 ctrl_val |= ASC_CTL_CTSENABLE; 562 ctrl_val |= ASC_CTL_CTSENABLE;
527 563
564 /* If flow-control selected, stop handling RTS manually */
565 if (ascport->rts) {
566 devm_gpiod_put(port->dev, ascport->rts);
567 ascport->rts = NULL;
568
569 pinctrl_select_state(ascport->pinctrl,
570 ascport->states[DEFAULT]);
571 }
572 } else {
573 /* If flow-control disabled, it's safe to handle RTS manually */
574 if (!ascport->rts && ascport->states[NO_HW_FLOWCTRL]) {
575 pinctrl_select_state(ascport->pinctrl,
576 ascport->states[NO_HW_FLOWCTRL]);
577
578 gpiod = devm_get_gpiod_from_child(port->dev, "rts",
579 &np->fwnode);
580 if (!IS_ERR(gpiod)) {
581 gpiod_direction_output(gpiod, 0);
582 ascport->rts = gpiod;
583 }
584 }
585 }
586
528 if ((baud < 19200) && !ascport->force_m1) { 587 if ((baud < 19200) && !ascport->force_m1) {
529 asc_out(port, ASC_BAUDRATE, (port->uartclk / (16 * baud))); 588 asc_out(port, ASC_BAUDRATE, (port->uartclk / (16 * baud)));
530 } else { 589 } else {
@@ -667,6 +726,7 @@ static int asc_init_port(struct asc_port *ascport,
667{ 726{
668 struct uart_port *port = &ascport->port; 727 struct uart_port *port = &ascport->port;
669 struct resource *res; 728 struct resource *res;
729 int ret;
670 730
671 port->iotype = UPIO_MEM; 731 port->iotype = UPIO_MEM;
672 port->flags = UPF_BOOT_AUTOCONF; 732 port->flags = UPF_BOOT_AUTOCONF;
@@ -693,6 +753,27 @@ static int asc_init_port(struct asc_port *ascport,
693 WARN_ON(ascport->port.uartclk == 0); 753 WARN_ON(ascport->port.uartclk == 0);
694 clk_disable_unprepare(ascport->clk); 754 clk_disable_unprepare(ascport->clk);
695 755
756 ascport->pinctrl = devm_pinctrl_get(&pdev->dev);
757 if (IS_ERR(ascport->pinctrl)) {
758 ret = PTR_ERR(ascport->pinctrl);
759 dev_err(&pdev->dev, "Failed to get Pinctrl: %d\n", ret);
760 }
761
762 ascport->states[DEFAULT] =
763 pinctrl_lookup_state(ascport->pinctrl, "default");
764 if (IS_ERR(ascport->states[DEFAULT])) {
765 ret = PTR_ERR(ascport->states[DEFAULT]);
766 dev_err(&pdev->dev,
767 "Failed to look up Pinctrl state 'default': %d\n", ret);
768 return ret;
769 }
770
771 /* "no-hw-flowctrl" state is optional */
772 ascport->states[NO_HW_FLOWCTRL] =
773 pinctrl_lookup_state(ascport->pinctrl, "no-hw-flowctrl");
774 if (IS_ERR(ascport->states[NO_HW_FLOWCTRL]))
775 ascport->states[NO_HW_FLOWCTRL] = NULL;
776
696 return 0; 777 return 0;
697} 778}
698 779
@@ -713,9 +794,11 @@ static struct asc_port *asc_of_get_asc_port(struct platform_device *pdev)
713 return NULL; 794 return NULL;
714 795
715 asc_ports[id].hw_flow_control = of_property_read_bool(np, 796 asc_ports[id].hw_flow_control = of_property_read_bool(np,
716 "st,hw-flow-control"); 797 "uart-has-rtscts");
717 asc_ports[id].force_m1 = of_property_read_bool(np, "st,force_m1"); 798 asc_ports[id].force_m1 = of_property_read_bool(np, "st,force_m1");
718 asc_ports[id].port.line = id; 799 asc_ports[id].port.line = id;
800 asc_ports[id].rts = NULL;
801
719 return &asc_ports[id]; 802 return &asc_ports[id];
720} 803}
721 804
diff --git a/drivers/tty/serial/sunhv.c b/drivers/tty/serial/sunhv.c
index 99ef5c6e4766..73abd89c0108 100644
--- a/drivers/tty/serial/sunhv.c
+++ b/drivers/tty/serial/sunhv.c
@@ -370,7 +370,7 @@ static int sunhv_verify_port(struct uart_port *port, struct serial_struct *ser)
370 return -EINVAL; 370 return -EINVAL;
371} 371}
372 372
373static struct uart_ops sunhv_pops = { 373static const struct uart_ops sunhv_pops = {
374 .tx_empty = sunhv_tx_empty, 374 .tx_empty = sunhv_tx_empty,
375 .set_mctrl = sunhv_set_mctrl, 375 .set_mctrl = sunhv_set_mctrl,
376 .get_mctrl = sunhv_get_mctrl, 376 .get_mctrl = sunhv_get_mctrl,
diff --git a/drivers/tty/serial/sunzilog.c b/drivers/tty/serial/sunzilog.c
index 8b6ace341029..252cea49c068 100644
--- a/drivers/tty/serial/sunzilog.c
+++ b/drivers/tty/serial/sunzilog.c
@@ -1046,7 +1046,7 @@ static void sunzilog_put_poll_char(struct uart_port *port,
1046} 1046}
1047#endif /* CONFIG_CONSOLE_POLL */ 1047#endif /* CONFIG_CONSOLE_POLL */
1048 1048
1049static struct uart_ops sunzilog_pops = { 1049static const struct uart_ops sunzilog_pops = {
1050 .tx_empty = sunzilog_tx_empty, 1050 .tx_empty = sunzilog_tx_empty,
1051 .set_mctrl = sunzilog_set_mctrl, 1051 .set_mctrl = sunzilog_set_mctrl,
1052 .get_mctrl = sunzilog_get_mctrl, 1052 .get_mctrl = sunzilog_get_mctrl,
diff --git a/drivers/tty/serial/vr41xx_siu.c b/drivers/tty/serial/vr41xx_siu.c
index 485de53c5d75..439057e8107a 100644
--- a/drivers/tty/serial/vr41xx_siu.c
+++ b/drivers/tty/serial/vr41xx_siu.c
@@ -681,7 +681,7 @@ static int siu_verify_port(struct uart_port *port, struct serial_struct *serial)
681 return 0; 681 return 0;
682} 682}
683 683
684static struct uart_ops siu_uart_ops = { 684static const struct uart_ops siu_uart_ops = {
685 .tx_empty = siu_tx_empty, 685 .tx_empty = siu_tx_empty,
686 .set_mctrl = siu_set_mctrl, 686 .set_mctrl = siu_set_mctrl,
687 .get_mctrl = siu_get_mctrl, 687 .get_mctrl = siu_get_mctrl,
diff --git a/drivers/tty/serial/vt8500_serial.c b/drivers/tty/serial/vt8500_serial.c
index 6b85adce0ac9..435a6f3260be 100644
--- a/drivers/tty/serial/vt8500_serial.c
+++ b/drivers/tty/serial/vt8500_serial.c
@@ -592,7 +592,7 @@ static void vt8500_put_poll_char(struct uart_port *port, unsigned char c)
592} 592}
593#endif 593#endif
594 594
595static struct uart_ops vt8500_uart_pops = { 595static const struct uart_ops vt8500_uart_pops = {
596 .tx_empty = vt8500_tx_empty, 596 .tx_empty = vt8500_tx_empty,
597 .set_mctrl = vt8500_set_mctrl, 597 .set_mctrl = vt8500_set_mctrl,
598 .get_mctrl = vt8500_get_mctrl, 598 .get_mctrl = vt8500_get_mctrl,
diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
index dd4c02fa4820..ad77d0ed0c46 100644
--- a/drivers/tty/serial/xilinx_uartps.c
+++ b/drivers/tty/serial/xilinx_uartps.c
@@ -93,6 +93,7 @@ MODULE_PARM_DESC(rx_timeout, "Rx timeout, 1-255");
93#define CDNS_UART_MR_CLKSEL 0x00000001 /* Pre-scalar selection */ 93#define CDNS_UART_MR_CLKSEL 0x00000001 /* Pre-scalar selection */
94#define CDNS_UART_MR_CHMODE_L_LOOP 0x00000200 /* Local loop back mode */ 94#define CDNS_UART_MR_CHMODE_L_LOOP 0x00000200 /* Local loop back mode */
95#define CDNS_UART_MR_CHMODE_NORM 0x00000000 /* Normal mode */ 95#define CDNS_UART_MR_CHMODE_NORM 0x00000000 /* Normal mode */
96#define CDNS_UART_MR_CHMODE_MASK 0x00000300 /* Mask for mode bits */
96 97
97#define CDNS_UART_MR_STOPMODE_2_BIT 0x00000080 /* 2 stop bits */ 98#define CDNS_UART_MR_STOPMODE_2_BIT 0x00000080 /* 2 stop bits */
98#define CDNS_UART_MR_STOPMODE_1_BIT 0x00000000 /* 1 stop bit */ 99#define CDNS_UART_MR_STOPMODE_1_BIT 0x00000000 /* 1 stop bit */
@@ -998,17 +999,25 @@ static unsigned int cdns_uart_get_mctrl(struct uart_port *port)
998static void cdns_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) 999static void cdns_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
999{ 1000{
1000 u32 val; 1001 u32 val;
1002 u32 mode_reg;
1001 1003
1002 val = readl(port->membase + CDNS_UART_MODEMCR); 1004 val = readl(port->membase + CDNS_UART_MODEMCR);
1005 mode_reg = readl(port->membase + CDNS_UART_MR);
1003 1006
1004 val &= ~(CDNS_UART_MODEMCR_RTS | CDNS_UART_MODEMCR_DTR); 1007 val &= ~(CDNS_UART_MODEMCR_RTS | CDNS_UART_MODEMCR_DTR);
1008 mode_reg &= ~CDNS_UART_MR_CHMODE_MASK;
1005 1009
1006 if (mctrl & TIOCM_RTS) 1010 if (mctrl & TIOCM_RTS)
1007 val |= CDNS_UART_MODEMCR_RTS; 1011 val |= CDNS_UART_MODEMCR_RTS;
1008 if (mctrl & TIOCM_DTR) 1012 if (mctrl & TIOCM_DTR)
1009 val |= CDNS_UART_MODEMCR_DTR; 1013 val |= CDNS_UART_MODEMCR_DTR;
1014 if (mctrl & TIOCM_LOOP)
1015 mode_reg |= CDNS_UART_MR_CHMODE_L_LOOP;
1016 else
1017 mode_reg |= CDNS_UART_MR_CHMODE_NORM;
1010 1018
1011 writel(val, port->membase + CDNS_UART_MODEMCR); 1019 writel(val, port->membase + CDNS_UART_MODEMCR);
1020 writel(mode_reg, port->membase + CDNS_UART_MR);
1012} 1021}
1013 1022
1014#ifdef CONFIG_CONSOLE_POLL 1023#ifdef CONFIG_CONSOLE_POLL
diff --git a/drivers/tty/serial/zs.c b/drivers/tty/serial/zs.c
index eeefd76a30da..d32bd499d684 100644
--- a/drivers/tty/serial/zs.c
+++ b/drivers/tty/serial/zs.c
@@ -1045,7 +1045,7 @@ static int zs_verify_port(struct uart_port *uport, struct serial_struct *ser)
1045} 1045}
1046 1046
1047 1047
1048static struct uart_ops zs_ops = { 1048static const struct uart_ops zs_ops = {
1049 .tx_empty = zs_tx_empty, 1049 .tx_empty = zs_tx_empty,
1050 .set_mctrl = zs_set_mctrl, 1050 .set_mctrl = zs_set_mctrl,
1051 .get_mctrl = zs_get_mctrl, 1051 .get_mctrl = zs_get_mctrl,
diff --git a/drivers/tty/tty_buffer.c b/drivers/tty/tty_buffer.c
index aa80dc94ddc2..4e7a4e9dcf4d 100644
--- a/drivers/tty/tty_buffer.c
+++ b/drivers/tty/tty_buffer.c
@@ -422,7 +422,7 @@ EXPORT_SYMBOL_GPL(tty_prepare_flip_string);
422 * 422 *
423 * Returns the number of bytes not processed 423 * Returns the number of bytes not processed
424 */ 424 */
425int tty_ldisc_receive_buf(struct tty_ldisc *ld, unsigned char *p, 425int tty_ldisc_receive_buf(struct tty_ldisc *ld, const unsigned char *p,
426 char *f, int count) 426 char *f, int count)
427{ 427{
428 if (ld->ops->receive_buf2) 428 if (ld->ops->receive_buf2)
@@ -437,7 +437,7 @@ int tty_ldisc_receive_buf(struct tty_ldisc *ld, unsigned char *p,
437EXPORT_SYMBOL_GPL(tty_ldisc_receive_buf); 437EXPORT_SYMBOL_GPL(tty_ldisc_receive_buf);
438 438
439static int 439static int
440receive_buf(struct tty_ldisc *ld, struct tty_buffer *head, int count) 440receive_buf(struct tty_port *port, struct tty_buffer *head, int count)
441{ 441{
442 unsigned char *p = char_buf_ptr(head, head->read); 442 unsigned char *p = char_buf_ptr(head, head->read);
443 char *f = NULL; 443 char *f = NULL;
@@ -445,7 +445,7 @@ receive_buf(struct tty_ldisc *ld, struct tty_buffer *head, int count)
445 if (~head->flags & TTYB_NORMAL) 445 if (~head->flags & TTYB_NORMAL)
446 f = flag_buf_ptr(head, head->read); 446 f = flag_buf_ptr(head, head->read);
447 447
448 return tty_ldisc_receive_buf(ld, p, f, count); 448 return port->client_ops->receive_buf(port, p, f, count);
449} 449}
450 450
451/** 451/**
@@ -465,16 +465,6 @@ static void flush_to_ldisc(struct work_struct *work)
465{ 465{
466 struct tty_port *port = container_of(work, struct tty_port, buf.work); 466 struct tty_port *port = container_of(work, struct tty_port, buf.work);
467 struct tty_bufhead *buf = &port->buf; 467 struct tty_bufhead *buf = &port->buf;
468 struct tty_struct *tty;
469 struct tty_ldisc *disc;
470
471 tty = READ_ONCE(port->itty);
472 if (tty == NULL)
473 return;
474
475 disc = tty_ldisc_ref(tty);
476 if (disc == NULL)
477 return;
478 468
479 mutex_lock(&buf->lock); 469 mutex_lock(&buf->lock);
480 470
@@ -504,7 +494,7 @@ static void flush_to_ldisc(struct work_struct *work)
504 continue; 494 continue;
505 } 495 }
506 496
507 count = receive_buf(disc, head, count); 497 count = receive_buf(port, head, count);
508 if (!count) 498 if (!count)
509 break; 499 break;
510 head->read += count; 500 head->read += count;
@@ -512,7 +502,6 @@ static void flush_to_ldisc(struct work_struct *work)
512 502
513 mutex_unlock(&buf->lock); 503 mutex_unlock(&buf->lock);
514 504
515 tty_ldisc_deref(disc);
516} 505}
517 506
518/** 507/**
diff --git a/drivers/tty/tty_io.c b/drivers/tty/tty_io.c
index 734a635e7363..a1fd3f7d487a 100644
--- a/drivers/tty/tty_io.c
+++ b/drivers/tty/tty_io.c
@@ -855,7 +855,7 @@ static void tty_vhangup_session(struct tty_struct *tty)
855 855
856int tty_hung_up_p(struct file *filp) 856int tty_hung_up_p(struct file *filp)
857{ 857{
858 return (filp->f_op == &hung_up_tty_fops); 858 return (filp && filp->f_op == &hung_up_tty_fops);
859} 859}
860 860
861EXPORT_SYMBOL(tty_hung_up_p); 861EXPORT_SYMBOL(tty_hung_up_p);
@@ -1745,6 +1745,37 @@ static int tty_release_checks(struct tty_struct *tty, int idx)
1745} 1745}
1746 1746
1747/** 1747/**
1748 * tty_release_struct - release a tty struct
1749 * @tty: tty device
1750 * @idx: index of the tty
1751 *
1752 * Performs the final steps to release and free a tty device. It is
1753 * roughly the reverse of tty_init_dev.
1754 */
1755void tty_release_struct(struct tty_struct *tty, int idx)
1756{
1757 /*
1758 * Ask the line discipline code to release its structures
1759 */
1760 tty_ldisc_release(tty);
1761
1762 /* Wait for pending work before tty destruction commmences */
1763 tty_flush_works(tty);
1764
1765 tty_debug_hangup(tty, "freeing structure\n");
1766 /*
1767 * The release_tty function takes care of the details of clearing
1768 * the slots and preserving the termios structure. The tty_unlock_pair
1769 * should be safe as we keep a kref while the tty is locked (so the
1770 * unlock never unlocks a freed tty).
1771 */
1772 mutex_lock(&tty_mutex);
1773 release_tty(tty, idx);
1774 mutex_unlock(&tty_mutex);
1775}
1776EXPORT_SYMBOL_GPL(tty_release_struct);
1777
1778/**
1748 * tty_release - vfs callback for close 1779 * tty_release - vfs callback for close
1749 * @inode: inode of tty 1780 * @inode: inode of tty
1750 * @filp: file pointer for handle to tty 1781 * @filp: file pointer for handle to tty
@@ -1898,25 +1929,8 @@ int tty_release(struct inode *inode, struct file *filp)
1898 return 0; 1929 return 0;
1899 1930
1900 tty_debug_hangup(tty, "final close\n"); 1931 tty_debug_hangup(tty, "final close\n");
1901 /*
1902 * Ask the line discipline code to release its structures
1903 */
1904 tty_ldisc_release(tty);
1905
1906 /* Wait for pending work before tty destruction commmences */
1907 tty_flush_works(tty);
1908
1909 tty_debug_hangup(tty, "freeing structure\n");
1910 /*
1911 * The release_tty function takes care of the details of clearing
1912 * the slots and preserving the termios structure. The tty_unlock_pair
1913 * should be safe as we keep a kref while the tty is locked (so the
1914 * unlock never unlocks a freed tty).
1915 */
1916 mutex_lock(&tty_mutex);
1917 release_tty(tty, idx);
1918 mutex_unlock(&tty_mutex);
1919 1932
1933 tty_release_struct(tty, idx);
1920 return 0; 1934 return 0;
1921} 1935}
1922 1936
diff --git a/drivers/tty/tty_port.c b/drivers/tty/tty_port.c
index c3f9d93ba227..5cd3cd932293 100644
--- a/drivers/tty/tty_port.c
+++ b/drivers/tty/tty_port.c
@@ -16,6 +16,45 @@
16#include <linux/bitops.h> 16#include <linux/bitops.h>
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/module.h> 18#include <linux/module.h>
19#include <linux/serdev.h>
20
21static int tty_port_default_receive_buf(struct tty_port *port,
22 const unsigned char *p,
23 const unsigned char *f, size_t count)
24{
25 int ret;
26 struct tty_struct *tty;
27 struct tty_ldisc *disc;
28
29 tty = READ_ONCE(port->itty);
30 if (!tty)
31 return 0;
32
33 disc = tty_ldisc_ref(tty);
34 if (!disc)
35 return 0;
36
37 ret = tty_ldisc_receive_buf(disc, p, (char *)f, count);
38
39 tty_ldisc_deref(disc);
40
41 return ret;
42}
43
44static void tty_port_default_wakeup(struct tty_port *port)
45{
46 struct tty_struct *tty = tty_port_tty_get(port);
47
48 if (tty) {
49 tty_wakeup(tty);
50 tty_kref_put(tty);
51 }
52}
53
54static const struct tty_port_client_operations default_client_ops = {
55 .receive_buf = tty_port_default_receive_buf,
56 .write_wakeup = tty_port_default_wakeup,
57};
19 58
20void tty_port_init(struct tty_port *port) 59void tty_port_init(struct tty_port *port)
21{ 60{
@@ -28,6 +67,7 @@ void tty_port_init(struct tty_port *port)
28 spin_lock_init(&port->lock); 67 spin_lock_init(&port->lock);
29 port->close_delay = (50 * HZ) / 100; 68 port->close_delay = (50 * HZ) / 100;
30 port->closing_wait = (3000 * HZ) / 100; 69 port->closing_wait = (3000 * HZ) / 100;
70 port->client_ops = &default_client_ops;
31 kref_init(&port->kref); 71 kref_init(&port->kref);
32} 72}
33EXPORT_SYMBOL(tty_port_init); 73EXPORT_SYMBOL(tty_port_init);
@@ -67,8 +107,7 @@ struct device *tty_port_register_device(struct tty_port *port,
67 struct tty_driver *driver, unsigned index, 107 struct tty_driver *driver, unsigned index,
68 struct device *device) 108 struct device *device)
69{ 109{
70 tty_port_link_device(port, driver, index); 110 return tty_port_register_device_attr(port, driver, index, device, NULL, NULL);
71 return tty_register_device(driver, index, device);
72} 111}
73EXPORT_SYMBOL_GPL(tty_port_register_device); 112EXPORT_SYMBOL_GPL(tty_port_register_device);
74 113
@@ -90,7 +129,15 @@ struct device *tty_port_register_device_attr(struct tty_port *port,
90 struct device *device, void *drvdata, 129 struct device *device, void *drvdata,
91 const struct attribute_group **attr_grp) 130 const struct attribute_group **attr_grp)
92{ 131{
132 struct device *dev;
133
93 tty_port_link_device(port, driver, index); 134 tty_port_link_device(port, driver, index);
135
136 dev = serdev_tty_port_register(port, device, driver, index);
137 if (PTR_ERR(dev) != -ENODEV)
138 /* Skip creating cdev if we registered a serdev device */
139 return dev;
140
94 return tty_register_device_attr(driver, index, device, drvdata, 141 return tty_register_device_attr(driver, index, device, drvdata,
95 attr_grp); 142 attr_grp);
96} 143}
@@ -142,6 +189,9 @@ static void tty_port_destructor(struct kref *kref)
142 /* check if last port ref was dropped before tty release */ 189 /* check if last port ref was dropped before tty release */
143 if (WARN_ON(port->itty)) 190 if (WARN_ON(port->itty))
144 return; 191 return;
192
193 serdev_tty_port_unregister(port);
194
145 if (port->xmit_buf) 195 if (port->xmit_buf)
146 free_page((unsigned long)port->xmit_buf); 196 free_page((unsigned long)port->xmit_buf);
147 tty_port_destroy(port); 197 tty_port_destroy(port);
@@ -273,12 +323,7 @@ EXPORT_SYMBOL_GPL(tty_port_tty_hangup);
273 */ 323 */
274void tty_port_tty_wakeup(struct tty_port *port) 324void tty_port_tty_wakeup(struct tty_port *port)
275{ 325{
276 struct tty_struct *tty = tty_port_tty_get(port); 326 port->client_ops->write_wakeup(port);
277
278 if (tty) {
279 tty_wakeup(tty);
280 tty_kref_put(tty);
281 }
282} 327}
283EXPORT_SYMBOL_GPL(tty_port_tty_wakeup); 328EXPORT_SYMBOL_GPL(tty_port_tty_wakeup);
284 329
@@ -335,7 +380,7 @@ EXPORT_SYMBOL(tty_port_lower_dtr_rts);
335 * tty_port_block_til_ready - Waiting logic for tty open 380 * tty_port_block_til_ready - Waiting logic for tty open
336 * @port: the tty port being opened 381 * @port: the tty port being opened
337 * @tty: the tty device being bound 382 * @tty: the tty device being bound
338 * @filp: the file pointer of the opener 383 * @filp: the file pointer of the opener or NULL
339 * 384 *
340 * Implement the core POSIX/SuS tty behaviour when opening a tty device. 385 * Implement the core POSIX/SuS tty behaviour when opening a tty device.
341 * Handles: 386 * Handles:
@@ -369,7 +414,7 @@ int tty_port_block_til_ready(struct tty_port *port,
369 tty_port_set_active(port, 1); 414 tty_port_set_active(port, 1);
370 return 0; 415 return 0;
371 } 416 }
372 if (filp->f_flags & O_NONBLOCK) { 417 if (filp == NULL || (filp->f_flags & O_NONBLOCK)) {
373 /* Indicate we are open */ 418 /* Indicate we are open */
374 if (C_BAUD(tty)) 419 if (C_BAUD(tty))
375 tty_port_raise_dtr_rts(port); 420 tty_port_raise_dtr_rts(port);
diff --git a/drivers/tty/vt/vt.c b/drivers/tty/vt/vt.c
index 4c10a9df3b91..9d3ce505e7ab 100644
--- a/drivers/tty/vt/vt.c
+++ b/drivers/tty/vt/vt.c
@@ -625,6 +625,14 @@ static void save_screen(struct vc_data *vc)
625 vc->vc_sw->con_save_screen(vc); 625 vc->vc_sw->con_save_screen(vc);
626} 626}
627 627
628static void flush_scrollback(struct vc_data *vc)
629{
630 WARN_CONSOLE_UNLOCKED();
631
632 if (vc->vc_sw->con_flush_scrollback)
633 vc->vc_sw->con_flush_scrollback(vc);
634}
635
628/* 636/*
629 * Redrawing of screen 637 * Redrawing of screen
630 */ 638 */
@@ -1171,6 +1179,7 @@ static void csi_J(struct vc_data *vc, int vpar)
1171 case 3: /* erase scroll-back buffer (and whole display) */ 1179 case 3: /* erase scroll-back buffer (and whole display) */
1172 scr_memsetw(vc->vc_screenbuf, vc->vc_video_erase_char, 1180 scr_memsetw(vc->vc_screenbuf, vc->vc_video_erase_char,
1173 vc->vc_screenbuf_size); 1181 vc->vc_screenbuf_size);
1182 flush_scrollback(vc);
1174 set_origin(vc); 1183 set_origin(vc);
1175 if (con_is_visible(vc)) 1184 if (con_is_visible(vc))
1176 update_screen(vc); 1185 update_screen(vc);
diff --git a/drivers/video/console/Kconfig b/drivers/video/console/Kconfig
index c3f1fb9ee820..5b71bd905a60 100644
--- a/drivers/video/console/Kconfig
+++ b/drivers/video/console/Kconfig
@@ -43,9 +43,30 @@ config VGACON_SOFT_SCROLLBACK_SIZE
43 range 1 1024 43 range 1 1024
44 default "64" 44 default "64"
45 help 45 help
46 Enter the amount of System RAM to allocate for the scrollback 46 Enter the amount of System RAM to allocate for scrollback
47 buffer. Each 64KB will give you approximately 16 80x25 47 buffers of VGA consoles. Each 64KB will give you approximately
48 screenfuls of scrollback buffer 48 16 80x25 screenfuls of scrollback buffer.
49
50config VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT
51 bool "Persistent Scrollback History for each console by default"
52 depends on VGACON_SOFT_SCROLLBACK
53 default n
54 help
55 Say Y here if the scrollback history should persist by default when
56 switching between consoles. Otherwise, the scrollback history will be
57 flushed each time the console is switched. This feature can also be
58 enabled using the boot command line parameter
59 'vgacon.scrollback_persistent=1'.
60
61 This feature might break your tool of choice to flush the scrollback
62 buffer, e.g. clear(1) will work fine but Debian's clear_console(1)
63 will be broken, which might cause security issues.
64 You can use the escape sequence \e[3J instead if this feature is
65 activated.
66
67 Note that a buffer of VGACON_SOFT_SCROLLBACK_SIZE is taken for each
68 created tty device.
69 So if you use a RAM-constrained system, say N here.
49 70
50config MDA_CONSOLE 71config MDA_CONSOLE
51 depends on !M68K && !PARISC && ISA 72 depends on !M68K && !PARISC && ISA
diff --git a/drivers/video/console/vgacon.c b/drivers/video/console/vgacon.c
index c22a56232b7c..dc06cb6a15dc 100644
--- a/drivers/video/console/vgacon.c
+++ b/drivers/video/console/vgacon.c
@@ -162,70 +162,118 @@ static inline void vga_set_mem_top(struct vc_data *c)
162 162
163#ifdef CONFIG_VGACON_SOFT_SCROLLBACK 163#ifdef CONFIG_VGACON_SOFT_SCROLLBACK
164/* software scrollback */ 164/* software scrollback */
165static void *vgacon_scrollback; 165struct vgacon_scrollback_info {
166static int vgacon_scrollback_tail; 166 void *data;
167static int vgacon_scrollback_size; 167 int tail;
168static int vgacon_scrollback_rows; 168 int size;
169static int vgacon_scrollback_cnt; 169 int rows;
170static int vgacon_scrollback_cur; 170 int cnt;
171static int vgacon_scrollback_save; 171 int cur;
172static int vgacon_scrollback_restore; 172 int save;
173 173 int restore;
174static void vgacon_scrollback_init(int pitch) 174};
175
176static struct vgacon_scrollback_info *vgacon_scrollback_cur;
177static struct vgacon_scrollback_info vgacon_scrollbacks[MAX_NR_CONSOLES];
178static bool scrollback_persistent = \
179 IS_ENABLED(CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT);
180module_param_named(scrollback_persistent, scrollback_persistent, bool, 0000);
181MODULE_PARM_DESC(scrollback_persistent, "Enable persistent scrollback for all vga consoles");
182
183static void vgacon_scrollback_reset(int vc_num, size_t reset_size)
184{
185 struct vgacon_scrollback_info *scrollback = &vgacon_scrollbacks[vc_num];
186
187 if (scrollback->data && reset_size > 0)
188 memset(scrollback->data, 0, reset_size);
189
190 scrollback->cnt = 0;
191 scrollback->tail = 0;
192 scrollback->cur = 0;
193}
194
195static void vgacon_scrollback_init(int vc_num)
196{
197 int pitch = vga_video_num_columns * 2;
198 size_t size = CONFIG_VGACON_SOFT_SCROLLBACK_SIZE * 1024;
199 int rows = size / pitch;
200 void *data;
201
202 data = kmalloc_array(CONFIG_VGACON_SOFT_SCROLLBACK_SIZE, 1024,
203 GFP_NOWAIT);
204
205 vgacon_scrollbacks[vc_num].data = data;
206 vgacon_scrollback_cur = &vgacon_scrollbacks[vc_num];
207
208 vgacon_scrollback_cur->rows = rows - 1;
209 vgacon_scrollback_cur->size = rows * pitch;
210
211 vgacon_scrollback_reset(vc_num, size);
212}
213
214static void vgacon_scrollback_switch(int vc_num)
175{ 215{
176 int rows = CONFIG_VGACON_SOFT_SCROLLBACK_SIZE * 1024/pitch; 216 if (!scrollback_persistent)
177 217 vc_num = 0;
178 if (vgacon_scrollback) { 218
179 vgacon_scrollback_cnt = 0; 219 if (!vgacon_scrollbacks[vc_num].data) {
180 vgacon_scrollback_tail = 0; 220 vgacon_scrollback_init(vc_num);
181 vgacon_scrollback_cur = 0; 221 } else {
182 vgacon_scrollback_rows = rows - 1; 222 if (scrollback_persistent) {
183 vgacon_scrollback_size = rows * pitch; 223 vgacon_scrollback_cur = &vgacon_scrollbacks[vc_num];
224 } else {
225 size_t size = CONFIG_VGACON_SOFT_SCROLLBACK_SIZE * 1024;
226
227 vgacon_scrollback_reset(vc_num, size);
228 }
184 } 229 }
185} 230}
186 231
187static void vgacon_scrollback_startup(void) 232static void vgacon_scrollback_startup(void)
188{ 233{
189 vgacon_scrollback = kcalloc(CONFIG_VGACON_SOFT_SCROLLBACK_SIZE, 1024, GFP_NOWAIT); 234 vgacon_scrollback_cur = &vgacon_scrollbacks[0];
190 vgacon_scrollback_init(vga_video_num_columns * 2); 235 vgacon_scrollback_init(0);
191} 236}
192 237
193static void vgacon_scrollback_update(struct vc_data *c, int t, int count) 238static void vgacon_scrollback_update(struct vc_data *c, int t, int count)
194{ 239{
195 void *p; 240 void *p;
196 241
197 if (!vgacon_scrollback_size || c->vc_num != fg_console) 242 if (!vgacon_scrollback_cur->data || !vgacon_scrollback_cur->size ||
243 c->vc_num != fg_console)
198 return; 244 return;
199 245
200 p = (void *) (c->vc_origin + t * c->vc_size_row); 246 p = (void *) (c->vc_origin + t * c->vc_size_row);
201 247
202 while (count--) { 248 while (count--) {
203 scr_memcpyw(vgacon_scrollback + vgacon_scrollback_tail, 249 scr_memcpyw(vgacon_scrollback_cur->data +
250 vgacon_scrollback_cur->tail,
204 p, c->vc_size_row); 251 p, c->vc_size_row);
205 vgacon_scrollback_cnt++; 252
253 vgacon_scrollback_cur->cnt++;
206 p += c->vc_size_row; 254 p += c->vc_size_row;
207 vgacon_scrollback_tail += c->vc_size_row; 255 vgacon_scrollback_cur->tail += c->vc_size_row;
208 256
209 if (vgacon_scrollback_tail >= vgacon_scrollback_size) 257 if (vgacon_scrollback_cur->tail >= vgacon_scrollback_cur->size)
210 vgacon_scrollback_tail = 0; 258 vgacon_scrollback_cur->tail = 0;
211 259
212 if (vgacon_scrollback_cnt > vgacon_scrollback_rows) 260 if (vgacon_scrollback_cur->cnt > vgacon_scrollback_cur->rows)
213 vgacon_scrollback_cnt = vgacon_scrollback_rows; 261 vgacon_scrollback_cur->cnt = vgacon_scrollback_cur->rows;
214 262
215 vgacon_scrollback_cur = vgacon_scrollback_cnt; 263 vgacon_scrollback_cur->cur = vgacon_scrollback_cur->cnt;
216 } 264 }
217} 265}
218 266
219static void vgacon_restore_screen(struct vc_data *c) 267static void vgacon_restore_screen(struct vc_data *c)
220{ 268{
221 vgacon_scrollback_save = 0; 269 vgacon_scrollback_cur->save = 0;
222 270
223 if (!vga_is_gfx && !vgacon_scrollback_restore) { 271 if (!vga_is_gfx && !vgacon_scrollback_cur->restore) {
224 scr_memcpyw((u16 *) c->vc_origin, (u16 *) c->vc_screenbuf, 272 scr_memcpyw((u16 *) c->vc_origin, (u16 *) c->vc_screenbuf,
225 c->vc_screenbuf_size > vga_vram_size ? 273 c->vc_screenbuf_size > vga_vram_size ?
226 vga_vram_size : c->vc_screenbuf_size); 274 vga_vram_size : c->vc_screenbuf_size);
227 vgacon_scrollback_restore = 1; 275 vgacon_scrollback_cur->restore = 1;
228 vgacon_scrollback_cur = vgacon_scrollback_cnt; 276 vgacon_scrollback_cur->cur = vgacon_scrollback_cur->cnt;
229 } 277 }
230} 278}
231 279
@@ -239,41 +287,41 @@ static void vgacon_scrolldelta(struct vc_data *c, int lines)
239 return; 287 return;
240 } 288 }
241 289
242 if (!vgacon_scrollback) 290 if (!vgacon_scrollback_cur->data)
243 return; 291 return;
244 292
245 if (!vgacon_scrollback_save) { 293 if (!vgacon_scrollback_cur->save) {
246 vgacon_cursor(c, CM_ERASE); 294 vgacon_cursor(c, CM_ERASE);
247 vgacon_save_screen(c); 295 vgacon_save_screen(c);
248 vgacon_scrollback_save = 1; 296 vgacon_scrollback_cur->save = 1;
249 } 297 }
250 298
251 vgacon_scrollback_restore = 0; 299 vgacon_scrollback_cur->restore = 0;
252 start = vgacon_scrollback_cur + lines; 300 start = vgacon_scrollback_cur->cur + lines;
253 end = start + abs(lines); 301 end = start + abs(lines);
254 302
255 if (start < 0) 303 if (start < 0)
256 start = 0; 304 start = 0;
257 305
258 if (start > vgacon_scrollback_cnt) 306 if (start > vgacon_scrollback_cur->cnt)
259 start = vgacon_scrollback_cnt; 307 start = vgacon_scrollback_cur->cnt;
260 308
261 if (end < 0) 309 if (end < 0)
262 end = 0; 310 end = 0;
263 311
264 if (end > vgacon_scrollback_cnt) 312 if (end > vgacon_scrollback_cur->cnt)
265 end = vgacon_scrollback_cnt; 313 end = vgacon_scrollback_cur->cnt;
266 314
267 vgacon_scrollback_cur = start; 315 vgacon_scrollback_cur->cur = start;
268 count = end - start; 316 count = end - start;
269 soff = vgacon_scrollback_tail - ((vgacon_scrollback_cnt - end) * 317 soff = vgacon_scrollback_cur->tail -
270 c->vc_size_row); 318 ((vgacon_scrollback_cur->cnt - end) * c->vc_size_row);
271 soff -= count * c->vc_size_row; 319 soff -= count * c->vc_size_row;
272 320
273 if (soff < 0) 321 if (soff < 0)
274 soff += vgacon_scrollback_size; 322 soff += vgacon_scrollback_cur->size;
275 323
276 count = vgacon_scrollback_cnt - start; 324 count = vgacon_scrollback_cur->cnt - start;
277 325
278 if (count > c->vc_rows) 326 if (count > c->vc_rows)
279 count = c->vc_rows; 327 count = c->vc_rows;
@@ -287,13 +335,13 @@ static void vgacon_scrolldelta(struct vc_data *c, int lines)
287 335
288 count *= c->vc_size_row; 336 count *= c->vc_size_row;
289 /* how much memory to end of buffer left? */ 337 /* how much memory to end of buffer left? */
290 copysize = min(count, vgacon_scrollback_size - soff); 338 copysize = min(count, vgacon_scrollback_cur->size - soff);
291 scr_memcpyw(d, vgacon_scrollback + soff, copysize); 339 scr_memcpyw(d, vgacon_scrollback_cur->data + soff, copysize);
292 d += copysize; 340 d += copysize;
293 count -= copysize; 341 count -= copysize;
294 342
295 if (count) { 343 if (count) {
296 scr_memcpyw(d, vgacon_scrollback, count); 344 scr_memcpyw(d, vgacon_scrollback_cur->data, count);
297 d += count; 345 d += count;
298 } 346 }
299 347
@@ -302,10 +350,18 @@ static void vgacon_scrolldelta(struct vc_data *c, int lines)
302 } else 350 } else
303 vgacon_cursor(c, CM_MOVE); 351 vgacon_cursor(c, CM_MOVE);
304} 352}
353
354static void vgacon_flush_scrollback(struct vc_data *c)
355{
356 size_t size = CONFIG_VGACON_SOFT_SCROLLBACK_SIZE * 1024;
357
358 vgacon_scrollback_reset(c->vc_num, size);
359}
305#else 360#else
306#define vgacon_scrollback_startup(...) do { } while (0) 361#define vgacon_scrollback_startup(...) do { } while (0)
307#define vgacon_scrollback_init(...) do { } while (0) 362#define vgacon_scrollback_init(...) do { } while (0)
308#define vgacon_scrollback_update(...) do { } while (0) 363#define vgacon_scrollback_update(...) do { } while (0)
364#define vgacon_scrollback_switch(...) do { } while (0)
309 365
310static void vgacon_restore_screen(struct vc_data *c) 366static void vgacon_restore_screen(struct vc_data *c)
311{ 367{
@@ -319,6 +375,10 @@ static void vgacon_scrolldelta(struct vc_data *c, int lines)
319 vga_vram_size); 375 vga_vram_size);
320 vga_set_mem_top(c); 376 vga_set_mem_top(c);
321} 377}
378
379static void vgacon_flush_scrollback(struct vc_data *c)
380{
381}
322#endif /* CONFIG_VGACON_SOFT_SCROLLBACK */ 382#endif /* CONFIG_VGACON_SOFT_SCROLLBACK */
323 383
324static const char *vgacon_startup(void) 384static const char *vgacon_startup(void)
@@ -780,7 +840,7 @@ static int vgacon_switch(struct vc_data *c)
780 vgacon_doresize(c, c->vc_cols, c->vc_rows); 840 vgacon_doresize(c, c->vc_cols, c->vc_rows);
781 } 841 }
782 842
783 vgacon_scrollback_init(c->vc_size_row); 843 vgacon_scrollback_switch(c->vc_num);
784 return 0; /* Redrawing not needed */ 844 return 0; /* Redrawing not needed */
785} 845}
786 846
@@ -1326,7 +1386,6 @@ static bool vgacon_scroll(struct vc_data *c, unsigned int t, unsigned int b,
1326 return true; 1386 return true;
1327} 1387}
1328 1388
1329
1330/* 1389/*
1331 * The console `switch' structure for the VGA based console 1390 * The console `switch' structure for the VGA based console
1332 */ 1391 */
@@ -1359,6 +1418,7 @@ const struct consw vga_con = {
1359 .con_save_screen = vgacon_save_screen, 1418 .con_save_screen = vgacon_save_screen,
1360 .con_build_attr = vgacon_build_attr, 1419 .con_build_attr = vgacon_build_attr,
1361 .con_invert_region = vgacon_invert_region, 1420 .con_invert_region = vgacon_invert_region,
1421 .con_flush_scrollback = vgacon_flush_scrollback,
1362}; 1422};
1363EXPORT_SYMBOL(vga_con); 1423EXPORT_SYMBOL(vga_con);
1364 1424
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-26 21:28:36 -0400