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authorVille Syrjälä <ville.syrjala@linux.intel.com>2016-05-13 16:41:39 -0400
committerVille Syrjälä <ville.syrjala@linux.intel.com>2016-05-23 14:11:17 -0400
commit342be926e0368018d9c22c4ab54d4a2bc6e9c15f (patch)
tree25a7d200bd94c00b1bf764d21286f25fe34c72c3 /drivers
parent5f199dfa8dda965d1b2fc83bd8f8e205d2b8f9f1 (diff)
drm/i915: Replace bxt_verify_cdclk_state() with a more generic cdclk check
Rather than having a BXT specific function to make sure the DE PLL is enabled after disabling DC6, let's just make sure the current cdclk is the same as what we last programmed. Having another check in bxt_display_core_init() almost immediately after the cdclk init seems redundant, so let's just kill that one. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1463172100-24715-21-git-send-email-ville.syrjala@linux.intel.com Reviewed-by: Imre Deak <imre.deak@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c15
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h1
-rw-r--r--drivers/gpu/drm/i915/intel_runtime_pm.c8
3 files changed, 4 insertions, 20 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a0b46b5b17b2..d53b670328e4 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5410,21 +5410,6 @@ static void broxton_set_cdclk(struct drm_i915_private *dev_priv, int cdclk)
5410 intel_update_cdclk(dev_priv->dev); 5410 intel_update_cdclk(dev_priv->dev);
5411} 5411}
5412 5412
5413static bool broxton_cdclk_is_enabled(struct drm_i915_private *dev_priv)
5414{
5415 if (!(I915_READ(BXT_DE_PLL_ENABLE) & BXT_DE_PLL_PLL_ENABLE))
5416 return false;
5417
5418 /* TODO: Check for a valid CDCLK rate */
5419
5420 return true;
5421}
5422
5423bool broxton_cdclk_verify_state(struct drm_i915_private *dev_priv)
5424{
5425 return broxton_cdclk_is_enabled(dev_priv);
5426}
5427
5428void broxton_init_cdclk(struct drm_i915_private *dev_priv) 5413void broxton_init_cdclk(struct drm_i915_private *dev_priv)
5429{ 5414{
5430 intel_update_cdclk(dev_priv->dev); 5415 intel_update_cdclk(dev_priv->dev);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 3854b2ee1077..03d4b1ade2d1 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1270,7 +1270,6 @@ void hsw_enable_pc8(struct drm_i915_private *dev_priv);
1270void hsw_disable_pc8(struct drm_i915_private *dev_priv); 1270void hsw_disable_pc8(struct drm_i915_private *dev_priv);
1271void broxton_init_cdclk(struct drm_i915_private *dev_priv); 1271void broxton_init_cdclk(struct drm_i915_private *dev_priv);
1272void broxton_uninit_cdclk(struct drm_i915_private *dev_priv); 1272void broxton_uninit_cdclk(struct drm_i915_private *dev_priv);
1273bool broxton_cdclk_verify_state(struct drm_i915_private *dev_priv);
1274void broxton_ddi_phy_init(struct drm_i915_private *dev_priv); 1273void broxton_ddi_phy_init(struct drm_i915_private *dev_priv);
1275void broxton_ddi_phy_uninit(struct drm_i915_private *dev_priv); 1274void broxton_ddi_phy_uninit(struct drm_i915_private *dev_priv);
1276void broxton_ddi_phy_verify_state(struct drm_i915_private *dev_priv); 1275void broxton_ddi_phy_verify_state(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index dc74f38d945f..a1741182f924 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -811,10 +811,11 @@ static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv,
811{ 811{
812 gen9_set_dc_state(dev_priv, DC_STATE_DISABLE); 812 gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
813 813
814 if (IS_BROXTON(dev_priv)) { 814 WARN_ON(dev_priv->cdclk_freq !=
815 broxton_cdclk_verify_state(dev_priv); 815 dev_priv->display.get_display_clock_speed(dev_priv->dev));
816
817 if (IS_BROXTON(dev_priv))
816 broxton_ddi_phy_verify_state(dev_priv); 818 broxton_ddi_phy_verify_state(dev_priv);
817 }
818} 819}
819 820
820static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv, 821static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv,
@@ -2288,7 +2289,6 @@ void bxt_display_core_init(struct drm_i915_private *dev_priv,
2288 2289
2289 broxton_ddi_phy_init(dev_priv); 2290 broxton_ddi_phy_init(dev_priv);
2290 2291
2291 broxton_cdclk_verify_state(dev_priv);
2292 broxton_ddi_phy_verify_state(dev_priv); 2292 broxton_ddi_phy_verify_state(dev_priv);
2293 2293
2294 if (resume && dev_priv->csr.dmc_payload) 2294 if (resume && dev_priv->csr.dmc_payload)