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authorHarry Wentland <harry.wentland@amd.com>2018-01-03 09:58:58 -0500
committerAlex Deucher <alexander.deucher@amd.com>2018-01-24 15:47:25 -0500
commit30305f58ebd8f964ecb46fb33c81744c0d7de110 (patch)
treea22c4ebbe03078d49faaef1c27e238544f204e88 /drivers
parent458d876eb869d5a88b53074c6c271b8b9adc0f07 (diff)
drm/amd/display: Demote error print to debug print when ATOM impl missing
I assumed wrongfully that all relevant functions should be implemented. Apparently this isn't the case. Demote the print to debug level for now. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/display/dc/bios/command_table.c22
-rw-r--r--drivers/gpu/drm/amd/display/dc/bios/command_table2.c16
2 files changed, 19 insertions, 19 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table.c b/drivers/gpu/drm/amd/display/dc/bios/command_table.c
index 1aefed8cf98b..4b5fdd577848 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/command_table.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/command_table.c
@@ -387,7 +387,7 @@ static void init_transmitter_control(struct bios_parser *bp)
387 bp->cmd_tbl.transmitter_control = transmitter_control_v1_6; 387 bp->cmd_tbl.transmitter_control = transmitter_control_v1_6;
388 break; 388 break;
389 default: 389 default:
390 dm_error("Don't have transmitter_control for v%d\n", crev); 390 dm_output_to_console("Don't have transmitter_control for v%d\n", crev);
391 bp->cmd_tbl.transmitter_control = NULL; 391 bp->cmd_tbl.transmitter_control = NULL;
392 break; 392 break;
393 } 393 }
@@ -911,7 +911,7 @@ static void init_set_pixel_clock(struct bios_parser *bp)
911 bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v7; 911 bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v7;
912 break; 912 break;
913 default: 913 default:
914 dm_error("Don't have set_pixel_clock for v%d\n", 914 dm_output_to_console("Don't have set_pixel_clock for v%d\n",
915 BIOS_CMD_TABLE_PARA_REVISION(SetPixelClock)); 915 BIOS_CMD_TABLE_PARA_REVISION(SetPixelClock));
916 bp->cmd_tbl.set_pixel_clock = NULL; 916 bp->cmd_tbl.set_pixel_clock = NULL;
917 break; 917 break;
@@ -1230,7 +1230,7 @@ static void init_enable_spread_spectrum_on_ppll(struct bios_parser *bp)
1230 enable_spread_spectrum_on_ppll_v3; 1230 enable_spread_spectrum_on_ppll_v3;
1231 break; 1231 break;
1232 default: 1232 default:
1233 dm_error("Don't have enable_spread_spectrum_on_ppll for v%d\n", 1233 dm_output_to_console("Don't have enable_spread_spectrum_on_ppll for v%d\n",
1234 BIOS_CMD_TABLE_PARA_REVISION(EnableSpreadSpectrumOnPPLL)); 1234 BIOS_CMD_TABLE_PARA_REVISION(EnableSpreadSpectrumOnPPLL));
1235 bp->cmd_tbl.enable_spread_spectrum_on_ppll = NULL; 1235 bp->cmd_tbl.enable_spread_spectrum_on_ppll = NULL;
1236 break; 1236 break;
@@ -1427,7 +1427,7 @@ static void init_adjust_display_pll(struct bios_parser *bp)
1427 bp->cmd_tbl.adjust_display_pll = adjust_display_pll_v3; 1427 bp->cmd_tbl.adjust_display_pll = adjust_display_pll_v3;
1428 break; 1428 break;
1429 default: 1429 default:
1430 dm_error("Don't have adjust_display_pll for v%d\n", 1430 dm_output_to_console("Don't have adjust_display_pll for v%d\n",
1431 BIOS_CMD_TABLE_PARA_REVISION(AdjustDisplayPll)); 1431 BIOS_CMD_TABLE_PARA_REVISION(AdjustDisplayPll));
1432 bp->cmd_tbl.adjust_display_pll = NULL; 1432 bp->cmd_tbl.adjust_display_pll = NULL;
1433 break; 1433 break;
@@ -1702,7 +1702,7 @@ static void init_set_crtc_timing(struct bios_parser *bp)
1702 set_crtc_using_dtd_timing_v3; 1702 set_crtc_using_dtd_timing_v3;
1703 break; 1703 break;
1704 default: 1704 default:
1705 dm_error("Don't have set_crtc_timing for dtd v%d\n", 1705 dm_output_to_console("Don't have set_crtc_timing for dtd v%d\n",
1706 dtd_version); 1706 dtd_version);
1707 bp->cmd_tbl.set_crtc_timing = NULL; 1707 bp->cmd_tbl.set_crtc_timing = NULL;
1708 break; 1708 break;
@@ -1713,7 +1713,7 @@ static void init_set_crtc_timing(struct bios_parser *bp)
1713 bp->cmd_tbl.set_crtc_timing = set_crtc_timing_v1; 1713 bp->cmd_tbl.set_crtc_timing = set_crtc_timing_v1;
1714 break; 1714 break;
1715 default: 1715 default:
1716 dm_error("Don't have set_crtc_timing for v%d\n", 1716 dm_output_to_console("Don't have set_crtc_timing for v%d\n",
1717 BIOS_CMD_TABLE_PARA_REVISION(SetCRTC_Timing)); 1717 BIOS_CMD_TABLE_PARA_REVISION(SetCRTC_Timing));
1718 bp->cmd_tbl.set_crtc_timing = NULL; 1718 bp->cmd_tbl.set_crtc_timing = NULL;
1719 break; 1719 break;
@@ -1901,7 +1901,7 @@ static void init_select_crtc_source(struct bios_parser *bp)
1901 bp->cmd_tbl.select_crtc_source = select_crtc_source_v3; 1901 bp->cmd_tbl.select_crtc_source = select_crtc_source_v3;
1902 break; 1902 break;
1903 default: 1903 default:
1904 dm_error("Don't select_crtc_source enable_crtc for v%d\n", 1904 dm_output_to_console("Don't select_crtc_source enable_crtc for v%d\n",
1905 BIOS_CMD_TABLE_PARA_REVISION(SelectCRTC_Source)); 1905 BIOS_CMD_TABLE_PARA_REVISION(SelectCRTC_Source));
1906 bp->cmd_tbl.select_crtc_source = NULL; 1906 bp->cmd_tbl.select_crtc_source = NULL;
1907 break; 1907 break;
@@ -2010,7 +2010,7 @@ static void init_enable_crtc(struct bios_parser *bp)
2010 bp->cmd_tbl.enable_crtc = enable_crtc_v1; 2010 bp->cmd_tbl.enable_crtc = enable_crtc_v1;
2011 break; 2011 break;
2012 default: 2012 default:
2013 dm_error("Don't have enable_crtc for v%d\n", 2013 dm_output_to_console("Don't have enable_crtc for v%d\n",
2014 BIOS_CMD_TABLE_PARA_REVISION(EnableCRTC)); 2014 BIOS_CMD_TABLE_PARA_REVISION(EnableCRTC));
2015 bp->cmd_tbl.enable_crtc = NULL; 2015 bp->cmd_tbl.enable_crtc = NULL;
2016 break; 2016 break;
@@ -2118,7 +2118,7 @@ static void init_program_clock(struct bios_parser *bp)
2118 bp->cmd_tbl.program_clock = program_clock_v6; 2118 bp->cmd_tbl.program_clock = program_clock_v6;
2119 break; 2119 break;
2120 default: 2120 default:
2121 dm_error("Don't have program_clock for v%d\n", 2121 dm_output_to_console("Don't have program_clock for v%d\n",
2122 BIOS_CMD_TABLE_PARA_REVISION(SetPixelClock)); 2122 BIOS_CMD_TABLE_PARA_REVISION(SetPixelClock));
2123 bp->cmd_tbl.program_clock = NULL; 2123 bp->cmd_tbl.program_clock = NULL;
2124 break; 2124 break;
@@ -2341,7 +2341,7 @@ static void init_enable_disp_power_gating(
2341 enable_disp_power_gating_v2_1; 2341 enable_disp_power_gating_v2_1;
2342 break; 2342 break;
2343 default: 2343 default:
2344 dm_error("Don't enable_disp_power_gating enable_crtc for v%d\n", 2344 dm_output_to_console("Don't enable_disp_power_gating enable_crtc for v%d\n",
2345 BIOS_CMD_TABLE_PARA_REVISION(EnableDispPowerGating)); 2345 BIOS_CMD_TABLE_PARA_REVISION(EnableDispPowerGating));
2346 bp->cmd_tbl.enable_disp_power_gating = NULL; 2346 bp->cmd_tbl.enable_disp_power_gating = NULL;
2347 break; 2347 break;
@@ -2390,7 +2390,7 @@ static void init_set_dce_clock(struct bios_parser *bp)
2390 bp->cmd_tbl.set_dce_clock = set_dce_clock_v2_1; 2390 bp->cmd_tbl.set_dce_clock = set_dce_clock_v2_1;
2391 break; 2391 break;
2392 default: 2392 default:
2393 dm_error("Don't have set_dce_clock for v%d\n", 2393 dm_output_to_console("Don't have set_dce_clock for v%d\n",
2394 BIOS_CMD_TABLE_PARA_REVISION(SetDCEClock)); 2394 BIOS_CMD_TABLE_PARA_REVISION(SetDCEClock));
2395 bp->cmd_tbl.set_dce_clock = NULL; 2395 bp->cmd_tbl.set_dce_clock = NULL;
2396 break; 2396 break;
diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c b/drivers/gpu/drm/amd/display/dc/bios/command_table2.c
index 946db12388d6..fea5e83736fd 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/command_table2.c
@@ -118,7 +118,7 @@ static void init_dig_encoder_control(struct bios_parser *bp)
118 bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v1_5; 118 bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v1_5;
119 break; 119 break;
120 default: 120 default:
121 dm_error("Don't have dig_encoder_control for v%d\n", version); 121 dm_output_to_console("Don't have dig_encoder_control for v%d\n", version);
122 bp->cmd_tbl.dig_encoder_control = NULL; 122 bp->cmd_tbl.dig_encoder_control = NULL;
123 break; 123 break;
124 } 124 }
@@ -206,7 +206,7 @@ static void init_transmitter_control(struct bios_parser *bp)
206 bp->cmd_tbl.transmitter_control = transmitter_control_v1_6; 206 bp->cmd_tbl.transmitter_control = transmitter_control_v1_6;
207 break; 207 break;
208 default: 208 default:
209 dm_error("Don't have transmitter_control for v%d\n", crev); 209 dm_output_to_console("Don't have transmitter_control for v%d\n", crev);
210 bp->cmd_tbl.transmitter_control = NULL; 210 bp->cmd_tbl.transmitter_control = NULL;
211 break; 211 break;
212 } 212 }
@@ -270,7 +270,7 @@ static void init_set_pixel_clock(struct bios_parser *bp)
270 bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v7; 270 bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v7;
271 break; 271 break;
272 default: 272 default:
273 dm_error("Don't have set_pixel_clock for v%d\n", 273 dm_output_to_console("Don't have set_pixel_clock for v%d\n",
274 BIOS_CMD_TABLE_PARA_REVISION(setpixelclock)); 274 BIOS_CMD_TABLE_PARA_REVISION(setpixelclock));
275 bp->cmd_tbl.set_pixel_clock = NULL; 275 bp->cmd_tbl.set_pixel_clock = NULL;
276 break; 276 break;
@@ -383,7 +383,7 @@ static void init_set_crtc_timing(struct bios_parser *bp)
383 set_crtc_using_dtd_timing_v3; 383 set_crtc_using_dtd_timing_v3;
384 break; 384 break;
385 default: 385 default:
386 dm_error("Don't have set_crtc_timing for v%d\n", dtd_version); 386 dm_output_to_console("Don't have set_crtc_timing for v%d\n", dtd_version);
387 bp->cmd_tbl.set_crtc_timing = NULL; 387 bp->cmd_tbl.set_crtc_timing = NULL;
388 break; 388 break;
389 } 389 }
@@ -503,7 +503,7 @@ static void init_select_crtc_source(struct bios_parser *bp)
503 bp->cmd_tbl.select_crtc_source = select_crtc_source_v3; 503 bp->cmd_tbl.select_crtc_source = select_crtc_source_v3;
504 break; 504 break;
505 default: 505 default:
506 dm_error("Don't select_crtc_source enable_crtc for v%d\n", 506 dm_output_to_console("Don't select_crtc_source enable_crtc for v%d\n",
507 BIOS_CMD_TABLE_PARA_REVISION(selectcrtc_source)); 507 BIOS_CMD_TABLE_PARA_REVISION(selectcrtc_source));
508 bp->cmd_tbl.select_crtc_source = NULL; 508 bp->cmd_tbl.select_crtc_source = NULL;
509 break; 509 break;
@@ -572,7 +572,7 @@ static void init_enable_crtc(struct bios_parser *bp)
572 bp->cmd_tbl.enable_crtc = enable_crtc_v1; 572 bp->cmd_tbl.enable_crtc = enable_crtc_v1;
573 break; 573 break;
574 default: 574 default:
575 dm_error("Don't have enable_crtc for v%d\n", 575 dm_output_to_console("Don't have enable_crtc for v%d\n",
576 BIOS_CMD_TABLE_PARA_REVISION(enablecrtc)); 576 BIOS_CMD_TABLE_PARA_REVISION(enablecrtc));
577 bp->cmd_tbl.enable_crtc = NULL; 577 bp->cmd_tbl.enable_crtc = NULL;
578 break; 578 break;
@@ -670,7 +670,7 @@ static void init_enable_disp_power_gating(
670 enable_disp_power_gating_v2_1; 670 enable_disp_power_gating_v2_1;
671 break; 671 break;
672 default: 672 default:
673 dm_error("Don't enable_disp_power_gating enable_crtc for v%d\n", 673 dm_output_to_console("Don't enable_disp_power_gating enable_crtc for v%d\n",
674 BIOS_CMD_TABLE_PARA_REVISION(enabledisppowergating)); 674 BIOS_CMD_TABLE_PARA_REVISION(enabledisppowergating));
675 bp->cmd_tbl.enable_disp_power_gating = NULL; 675 bp->cmd_tbl.enable_disp_power_gating = NULL;
676 break; 676 break;
@@ -721,7 +721,7 @@ static void init_set_dce_clock(struct bios_parser *bp)
721 bp->cmd_tbl.set_dce_clock = set_dce_clock_v2_1; 721 bp->cmd_tbl.set_dce_clock = set_dce_clock_v2_1;
722 break; 722 break;
723 default: 723 default:
724 dm_error("Don't have set_dce_clock for v%d\n", 724 dm_output_to_console("Don't have set_dce_clock for v%d\n",
725 BIOS_CMD_TABLE_PARA_REVISION(setdceclock)); 725 BIOS_CMD_TABLE_PARA_REVISION(setdceclock));
726 bp->cmd_tbl.set_dce_clock = NULL; 726 bp->cmd_tbl.set_dce_clock = NULL;
727 break; 727 break;