aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorArchit Taneja <architt@codeaurora.org>2018-01-17 04:34:42 -0500
committerRob Clark <robdclark@gmail.com>2018-02-20 10:41:21 -0500
commit29a1157ceba2bf885479d6dcd2933a6b0778266b (patch)
tree19870c67d3acd62a2c0214c0e605c7038e569ef4 /drivers
parentff73ff19406098f71ec7628b951e0765f1df8128 (diff)
drm/msm/dsi: Use msm_clk_get in dsi_get_config
We try to get the interface clock in dsi_get_config early during DSI's component bind. Try getting both the "iface" and "iface_clk" clock name variants so that we are compatible with both new and legacy DT. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/msm/dsi/dsi_host.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 0f7324a686ca..7611fe014036 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -214,7 +214,7 @@ static const struct msm_dsi_cfg_handler *dsi_get_config(
214 goto exit; 214 goto exit;
215 } 215 }
216 216
217 ahb_clk = clk_get(dev, "iface_clk"); 217 ahb_clk = msm_clk_get(msm_host->pdev, "iface");
218 if (IS_ERR(ahb_clk)) { 218 if (IS_ERR(ahb_clk)) {
219 pr_err("%s: cannot get interface clock\n", __func__); 219 pr_err("%s: cannot get interface clock\n", __func__);
220 goto put_gdsc; 220 goto put_gdsc;
@@ -225,7 +225,7 @@ static const struct msm_dsi_cfg_handler *dsi_get_config(
225 ret = regulator_enable(gdsc_reg); 225 ret = regulator_enable(gdsc_reg);
226 if (ret) { 226 if (ret) {
227 pr_err("%s: unable to enable gdsc\n", __func__); 227 pr_err("%s: unable to enable gdsc\n", __func__);
228 goto put_clk; 228 goto put_gdsc;
229 } 229 }
230 230
231 ret = clk_prepare_enable(ahb_clk); 231 ret = clk_prepare_enable(ahb_clk);
@@ -249,8 +249,6 @@ disable_clks:
249disable_gdsc: 249disable_gdsc:
250 regulator_disable(gdsc_reg); 250 regulator_disable(gdsc_reg);
251 pm_runtime_put_sync(dev); 251 pm_runtime_put_sync(dev);
252put_clk:
253 clk_put(ahb_clk);
254put_gdsc: 252put_gdsc:
255 regulator_put(gdsc_reg); 253 regulator_put(gdsc_reg);
256exit: 254exit: