diff options
author | Christian König <christian.koenig@amd.com> | 2018-08-27 07:12:19 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-08-29 13:35:30 -0400 |
commit | 22d8bfafcc12dfa17b91d2e8ae4e1898e782003a (patch) | |
tree | 41ffb2f8182acd62f4a9237ea8b2fd9529f81240 /drivers | |
parent | 0be655d1c6c6a98811067544f6a84ebd42ba46b3 (diff) |
drm/amdgpu: stop using gart_start as offset for the GTT domain
Further separate GART and GTT domain.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 6 |
2 files changed, 5 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c index da7b1b92d9cf..c2539f6821c0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | |||
@@ -143,7 +143,8 @@ static int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man, | |||
143 | spin_unlock(&mgr->lock); | 143 | spin_unlock(&mgr->lock); |
144 | 144 | ||
145 | if (!r) | 145 | if (!r) |
146 | mem->start = node->node.start; | 146 | mem->start = node->node.start + |
147 | (adev->gmc.gart_start >> PAGE_SHIFT); | ||
147 | 148 | ||
148 | return r; | 149 | return r; |
149 | } | 150 | } |
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index 2f304f9dd543..5cadf4f1ee2c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | |||
@@ -188,7 +188,7 @@ static int amdgpu_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, | |||
188 | case TTM_PL_TT: | 188 | case TTM_PL_TT: |
189 | /* GTT memory */ | 189 | /* GTT memory */ |
190 | man->func = &amdgpu_gtt_mgr_func; | 190 | man->func = &amdgpu_gtt_mgr_func; |
191 | man->gpu_offset = adev->gmc.gart_start; | 191 | man->gpu_offset = 0; |
192 | man->available_caching = TTM_PL_MASK_CACHING; | 192 | man->available_caching = TTM_PL_MASK_CACHING; |
193 | man->default_caching = TTM_PL_FLAG_CACHED; | 193 | man->default_caching = TTM_PL_FLAG_CACHED; |
194 | man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA; | 194 | man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA; |
@@ -1062,7 +1062,7 @@ static int amdgpu_ttm_backend_bind(struct ttm_tt *ttm, | |||
1062 | flags = amdgpu_ttm_tt_pte_flags(adev, ttm, bo_mem); | 1062 | flags = amdgpu_ttm_tt_pte_flags(adev, ttm, bo_mem); |
1063 | 1063 | ||
1064 | /* bind pages into GART page tables */ | 1064 | /* bind pages into GART page tables */ |
1065 | gtt->offset = (u64)bo_mem->start << PAGE_SHIFT; | 1065 | gtt->offset = ((u64)bo_mem->start << PAGE_SHIFT) - adev->gmc.gart_start; |
1066 | r = amdgpu_gart_bind(adev, gtt->offset, ttm->num_pages, | 1066 | r = amdgpu_gart_bind(adev, gtt->offset, ttm->num_pages, |
1067 | ttm->pages, gtt->ttm.dma_address, flags); | 1067 | ttm->pages, gtt->ttm.dma_address, flags); |
1068 | 1068 | ||
@@ -1110,7 +1110,7 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo) | |||
1110 | flags = amdgpu_ttm_tt_pte_flags(adev, bo->ttm, &tmp); | 1110 | flags = amdgpu_ttm_tt_pte_flags(adev, bo->ttm, &tmp); |
1111 | 1111 | ||
1112 | /* Bind pages */ | 1112 | /* Bind pages */ |
1113 | gtt->offset = (u64)tmp.start << PAGE_SHIFT; | 1113 | gtt->offset = ((u64)tmp.start << PAGE_SHIFT) - adev->gmc.gart_start; |
1114 | r = amdgpu_ttm_gart_bind(adev, bo, flags); | 1114 | r = amdgpu_ttm_gart_bind(adev, bo, flags); |
1115 | if (unlikely(r)) { | 1115 | if (unlikely(r)) { |
1116 | ttm_bo_mem_put(bo, &tmp); | 1116 | ttm_bo_mem_put(bo, &tmp); |