diff options
author | Rex Zhu <Rex.Zhu@amd.com> | 2015-11-10 18:25:24 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2015-12-21 16:42:08 -0500 |
commit | 1b5708ffb1032a2f24b4224320753532303c1ae4 (patch) | |
tree | 6e3875c3000588eec6d4c8a6134a7225cbbb6e2c /drivers | |
parent | ba5c2a87b0c614013296901205ed693007964a59 (diff) |
drm/amdgpu: export amd_powerplay_func to amdgpu and other ip block
Update amdgpu to deal with the new powerplay module properly.
v2: squash in fixes
v3: squash in Rex's power state reporting fix
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu.h | 46 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 215 |
2 files changed, 180 insertions, 81 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index 6f08d39a3232..d9ef4d25be79 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h | |||
@@ -2264,20 +2264,54 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring) | |||
2264 | #define amdgpu_dpm_set_power_state(adev) (adev)->pm.funcs->set_power_state((adev)) | 2264 | #define amdgpu_dpm_set_power_state(adev) (adev)->pm.funcs->set_power_state((adev)) |
2265 | #define amdgpu_dpm_post_set_power_state(adev) (adev)->pm.funcs->post_set_power_state((adev)) | 2265 | #define amdgpu_dpm_post_set_power_state(adev) (adev)->pm.funcs->post_set_power_state((adev)) |
2266 | #define amdgpu_dpm_display_configuration_changed(adev) (adev)->pm.funcs->display_configuration_changed((adev)) | 2266 | #define amdgpu_dpm_display_configuration_changed(adev) (adev)->pm.funcs->display_configuration_changed((adev)) |
2267 | #define amdgpu_dpm_get_sclk(adev, l) (adev)->pm.funcs->get_sclk((adev), (l)) | ||
2268 | #define amdgpu_dpm_get_mclk(adev, l) (adev)->pm.funcs->get_mclk((adev), (l)) | ||
2269 | #define amdgpu_dpm_print_power_state(adev, ps) (adev)->pm.funcs->print_power_state((adev), (ps)) | 2267 | #define amdgpu_dpm_print_power_state(adev, ps) (adev)->pm.funcs->print_power_state((adev), (ps)) |
2270 | #define amdgpu_dpm_debugfs_print_current_performance_level(adev, m) (adev)->pm.funcs->debugfs_print_current_performance_level((adev), (m)) | ||
2271 | #define amdgpu_dpm_force_performance_level(adev, l) (adev)->pm.funcs->force_performance_level((adev), (l)) | ||
2272 | #define amdgpu_dpm_vblank_too_short(adev) (adev)->pm.funcs->vblank_too_short((adev)) | 2268 | #define amdgpu_dpm_vblank_too_short(adev) (adev)->pm.funcs->vblank_too_short((adev)) |
2273 | #define amdgpu_dpm_powergate_uvd(adev, g) (adev)->pm.funcs->powergate_uvd((adev), (g)) | ||
2274 | #define amdgpu_dpm_powergate_vce(adev, g) (adev)->pm.funcs->powergate_vce((adev), (g)) | ||
2275 | #define amdgpu_dpm_enable_bapm(adev, e) (adev)->pm.funcs->enable_bapm((adev), (e)) | 2269 | #define amdgpu_dpm_enable_bapm(adev, e) (adev)->pm.funcs->enable_bapm((adev), (e)) |
2276 | #define amdgpu_dpm_set_fan_control_mode(adev, m) (adev)->pm.funcs->set_fan_control_mode((adev), (m)) | 2270 | #define amdgpu_dpm_set_fan_control_mode(adev, m) (adev)->pm.funcs->set_fan_control_mode((adev), (m)) |
2277 | #define amdgpu_dpm_get_fan_control_mode(adev) (adev)->pm.funcs->get_fan_control_mode((adev)) | 2271 | #define amdgpu_dpm_get_fan_control_mode(adev) (adev)->pm.funcs->get_fan_control_mode((adev)) |
2278 | #define amdgpu_dpm_set_fan_speed_percent(adev, s) (adev)->pm.funcs->set_fan_speed_percent((adev), (s)) | 2272 | #define amdgpu_dpm_set_fan_speed_percent(adev, s) (adev)->pm.funcs->set_fan_speed_percent((adev), (s)) |
2279 | #define amdgpu_dpm_get_fan_speed_percent(adev, s) (adev)->pm.funcs->get_fan_speed_percent((adev), (s)) | 2273 | #define amdgpu_dpm_get_fan_speed_percent(adev, s) (adev)->pm.funcs->get_fan_speed_percent((adev), (s)) |
2280 | 2274 | ||
2275 | #define amdgpu_dpm_get_sclk(adev, l) \ | ||
2276 | amdgpu_powerplay ? \ | ||
2277 | (adev)->powerplay.pp_funcs->get_sclk((adev)->powerplay.pp_handle, (l)) : \ | ||
2278 | (adev)->pm.funcs->get_sclk((adev), (l)) | ||
2279 | |||
2280 | #define amdgpu_dpm_get_mclk(adev, l) \ | ||
2281 | amdgpu_powerplay ? \ | ||
2282 | (adev)->powerplay.pp_funcs->get_mclk((adev)->powerplay.pp_handle, (l)) : \ | ||
2283 | (adev)->pm.funcs->get_mclk((adev), (l)) | ||
2284 | |||
2285 | |||
2286 | #define amdgpu_dpm_force_performance_level(adev, l) \ | ||
2287 | amdgpu_powerplay ? \ | ||
2288 | (adev)->powerplay.pp_funcs->force_performance_level((adev)->powerplay.pp_handle, (l)) : \ | ||
2289 | (adev)->pm.funcs->force_performance_level((adev), (l)) | ||
2290 | |||
2291 | #define amdgpu_dpm_powergate_uvd(adev, g) \ | ||
2292 | amdgpu_powerplay ? \ | ||
2293 | (adev)->powerplay.pp_funcs->powergate_uvd((adev)->powerplay.pp_handle, (g)) : \ | ||
2294 | (adev)->pm.funcs->powergate_uvd((adev), (g)) | ||
2295 | |||
2296 | #define amdgpu_dpm_powergate_vce(adev, g) \ | ||
2297 | amdgpu_powerplay ? \ | ||
2298 | (adev)->powerplay.pp_funcs->powergate_vce((adev)->powerplay.pp_handle, (g)) : \ | ||
2299 | (adev)->pm.funcs->powergate_vce((adev), (g)) | ||
2300 | |||
2301 | #define amdgpu_dpm_debugfs_print_current_performance_level(adev, m) \ | ||
2302 | amdgpu_powerplay ? \ | ||
2303 | (adev)->powerplay.pp_funcs->print_current_performance_level((adev)->powerplay.pp_handle, (m)) : \ | ||
2304 | (adev)->pm.funcs->debugfs_print_current_performance_level((adev), (m)) | ||
2305 | |||
2306 | #define amdgpu_dpm_get_current_power_state(adev) \ | ||
2307 | (adev)->powerplay.pp_funcs->get_current_power_state((adev)->powerplay.pp_handle) | ||
2308 | |||
2309 | #define amdgpu_dpm_get_performance_level(adev) \ | ||
2310 | (adev)->powerplay.pp_funcs->get_performance_level((adev)->powerplay.pp_handle) | ||
2311 | |||
2312 | #define amdgpu_dpm_dispatch_task(adev, event_id, input, output) \ | ||
2313 | (adev)->powerplay.pp_funcs->dispatch_tasks((adev)->powerplay.pp_handle, (event_id), (input), (output)) | ||
2314 | |||
2281 | #define amdgpu_gds_switch(adev, r, v, d, w, a) (adev)->gds.funcs->patch_gds_switch((r), (v), (d), (w), (a)) | 2315 | #define amdgpu_gds_switch(adev, r, v, d, w, a) (adev)->gds.funcs->patch_gds_switch((r), (v), (d), (w), (a)) |
2282 | 2316 | ||
2283 | /* Common functions */ | 2317 | /* Common functions */ |
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c index eea1933947ae..235fae54724b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | |||
@@ -30,10 +30,16 @@ | |||
30 | #include <linux/hwmon.h> | 30 | #include <linux/hwmon.h> |
31 | #include <linux/hwmon-sysfs.h> | 31 | #include <linux/hwmon-sysfs.h> |
32 | 32 | ||
33 | #include "amd_powerplay.h" | ||
34 | |||
33 | static int amdgpu_debugfs_pm_init(struct amdgpu_device *adev); | 35 | static int amdgpu_debugfs_pm_init(struct amdgpu_device *adev); |
34 | 36 | ||
35 | void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev) | 37 | void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev) |
36 | { | 38 | { |
39 | if (amdgpu_powerplay) | ||
40 | /* TODO */ | ||
41 | return; | ||
42 | |||
37 | if (adev->pm.dpm_enabled) { | 43 | if (adev->pm.dpm_enabled) { |
38 | mutex_lock(&adev->pm.mutex); | 44 | mutex_lock(&adev->pm.mutex); |
39 | if (power_supply_is_system_supplied() > 0) | 45 | if (power_supply_is_system_supplied() > 0) |
@@ -52,7 +58,12 @@ static ssize_t amdgpu_get_dpm_state(struct device *dev, | |||
52 | { | 58 | { |
53 | struct drm_device *ddev = dev_get_drvdata(dev); | 59 | struct drm_device *ddev = dev_get_drvdata(dev); |
54 | struct amdgpu_device *adev = ddev->dev_private; | 60 | struct amdgpu_device *adev = ddev->dev_private; |
55 | enum amd_pm_state_type pm = adev->pm.dpm.user_state; | 61 | enum amd_pm_state_type pm; |
62 | |||
63 | if (amdgpu_powerplay) { | ||
64 | pm = amdgpu_dpm_get_current_power_state(adev); | ||
65 | } else | ||
66 | pm = adev->pm.dpm.user_state; | ||
56 | 67 | ||
57 | return snprintf(buf, PAGE_SIZE, "%s\n", | 68 | return snprintf(buf, PAGE_SIZE, "%s\n", |
58 | (pm == POWER_STATE_TYPE_BATTERY) ? "battery" : | 69 | (pm == POWER_STATE_TYPE_BATTERY) ? "battery" : |
@@ -66,40 +77,57 @@ static ssize_t amdgpu_set_dpm_state(struct device *dev, | |||
66 | { | 77 | { |
67 | struct drm_device *ddev = dev_get_drvdata(dev); | 78 | struct drm_device *ddev = dev_get_drvdata(dev); |
68 | struct amdgpu_device *adev = ddev->dev_private; | 79 | struct amdgpu_device *adev = ddev->dev_private; |
80 | enum amd_pm_state_type state; | ||
69 | 81 | ||
70 | mutex_lock(&adev->pm.mutex); | ||
71 | if (strncmp("battery", buf, strlen("battery")) == 0) | 82 | if (strncmp("battery", buf, strlen("battery")) == 0) |
72 | adev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY; | 83 | state = POWER_STATE_TYPE_BATTERY; |
73 | else if (strncmp("balanced", buf, strlen("balanced")) == 0) | 84 | else if (strncmp("balanced", buf, strlen("balanced")) == 0) |
74 | adev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; | 85 | state = POWER_STATE_TYPE_BALANCED; |
75 | else if (strncmp("performance", buf, strlen("performance")) == 0) | 86 | else if (strncmp("performance", buf, strlen("performance")) == 0) |
76 | adev->pm.dpm.user_state = POWER_STATE_TYPE_PERFORMANCE; | 87 | state = POWER_STATE_TYPE_PERFORMANCE; |
77 | else { | 88 | else { |
78 | mutex_unlock(&adev->pm.mutex); | ||
79 | count = -EINVAL; | 89 | count = -EINVAL; |
80 | goto fail; | 90 | goto fail; |
81 | } | 91 | } |
82 | mutex_unlock(&adev->pm.mutex); | ||
83 | 92 | ||
84 | /* Can't set dpm state when the card is off */ | 93 | if (amdgpu_powerplay) { |
85 | if (!(adev->flags & AMD_IS_PX) || | 94 | amdgpu_dpm_dispatch_task(adev, AMD_PP_EVENT_ENABLE_USER_STATE, &state, NULL); |
86 | (ddev->switch_power_state == DRM_SWITCH_POWER_ON)) | 95 | } else { |
87 | amdgpu_pm_compute_clocks(adev); | 96 | mutex_lock(&adev->pm.mutex); |
97 | adev->pm.dpm.user_state = state; | ||
98 | mutex_unlock(&adev->pm.mutex); | ||
99 | |||
100 | /* Can't set dpm state when the card is off */ | ||
101 | if (!(adev->flags & AMD_IS_PX) || | ||
102 | (ddev->switch_power_state == DRM_SWITCH_POWER_ON)) | ||
103 | amdgpu_pm_compute_clocks(adev); | ||
104 | } | ||
88 | fail: | 105 | fail: |
89 | return count; | 106 | return count; |
90 | } | 107 | } |
91 | 108 | ||
92 | static ssize_t amdgpu_get_dpm_forced_performance_level(struct device *dev, | 109 | static ssize_t amdgpu_get_dpm_forced_performance_level(struct device *dev, |
93 | struct device_attribute *attr, | 110 | struct device_attribute *attr, |
94 | char *buf) | 111 | char *buf) |
95 | { | 112 | { |
96 | struct drm_device *ddev = dev_get_drvdata(dev); | 113 | struct drm_device *ddev = dev_get_drvdata(dev); |
97 | struct amdgpu_device *adev = ddev->dev_private; | 114 | struct amdgpu_device *adev = ddev->dev_private; |
98 | enum amdgpu_dpm_forced_level level = adev->pm.dpm.forced_level; | ||
99 | 115 | ||
100 | return snprintf(buf, PAGE_SIZE, "%s\n", | 116 | if (amdgpu_powerplay) { |
101 | (level == AMDGPU_DPM_FORCED_LEVEL_AUTO) ? "auto" : | 117 | enum amd_dpm_forced_level level; |
102 | (level == AMDGPU_DPM_FORCED_LEVEL_LOW) ? "low" : "high"); | 118 | |
119 | level = amdgpu_dpm_get_performance_level(adev); | ||
120 | return snprintf(buf, PAGE_SIZE, "%s\n", | ||
121 | (level == AMD_DPM_FORCED_LEVEL_AUTO) ? "auto" : | ||
122 | (level == AMD_DPM_FORCED_LEVEL_LOW) ? "low" : "high"); | ||
123 | } else { | ||
124 | enum amdgpu_dpm_forced_level level; | ||
125 | |||
126 | level = adev->pm.dpm.forced_level; | ||
127 | return snprintf(buf, PAGE_SIZE, "%s\n", | ||
128 | (level == AMDGPU_DPM_FORCED_LEVEL_AUTO) ? "auto" : | ||
129 | (level == AMDGPU_DPM_FORCED_LEVEL_LOW) ? "low" : "high"); | ||
130 | } | ||
103 | } | 131 | } |
104 | 132 | ||
105 | static ssize_t amdgpu_set_dpm_forced_performance_level(struct device *dev, | 133 | static ssize_t amdgpu_set_dpm_forced_performance_level(struct device *dev, |
@@ -112,7 +140,6 @@ static ssize_t amdgpu_set_dpm_forced_performance_level(struct device *dev, | |||
112 | enum amdgpu_dpm_forced_level level; | 140 | enum amdgpu_dpm_forced_level level; |
113 | int ret = 0; | 141 | int ret = 0; |
114 | 142 | ||
115 | mutex_lock(&adev->pm.mutex); | ||
116 | if (strncmp("low", buf, strlen("low")) == 0) { | 143 | if (strncmp("low", buf, strlen("low")) == 0) { |
117 | level = AMDGPU_DPM_FORCED_LEVEL_LOW; | 144 | level = AMDGPU_DPM_FORCED_LEVEL_LOW; |
118 | } else if (strncmp("high", buf, strlen("high")) == 0) { | 145 | } else if (strncmp("high", buf, strlen("high")) == 0) { |
@@ -123,7 +150,11 @@ static ssize_t amdgpu_set_dpm_forced_performance_level(struct device *dev, | |||
123 | count = -EINVAL; | 150 | count = -EINVAL; |
124 | goto fail; | 151 | goto fail; |
125 | } | 152 | } |
126 | if (adev->pm.funcs->force_performance_level) { | 153 | |
154 | if (amdgpu_powerplay) | ||
155 | amdgpu_dpm_force_performance_level(adev, level); | ||
156 | else { | ||
157 | mutex_lock(&adev->pm.mutex); | ||
127 | if (adev->pm.dpm.thermal_active) { | 158 | if (adev->pm.dpm.thermal_active) { |
128 | count = -EINVAL; | 159 | count = -EINVAL; |
129 | goto fail; | 160 | goto fail; |
@@ -131,6 +162,9 @@ static ssize_t amdgpu_set_dpm_forced_performance_level(struct device *dev, | |||
131 | ret = amdgpu_dpm_force_performance_level(adev, level); | 162 | ret = amdgpu_dpm_force_performance_level(adev, level); |
132 | if (ret) | 163 | if (ret) |
133 | count = -EINVAL; | 164 | count = -EINVAL; |
165 | else | ||
166 | adev->pm.dpm.forced_level = level; | ||
167 | mutex_unlock(&adev->pm.mutex); | ||
134 | } | 168 | } |
135 | fail: | 169 | fail: |
136 | mutex_unlock(&adev->pm.mutex); | 170 | mutex_unlock(&adev->pm.mutex); |
@@ -197,7 +231,7 @@ static ssize_t amdgpu_hwmon_set_pwm1_enable(struct device *dev, | |||
197 | int err; | 231 | int err; |
198 | int value; | 232 | int value; |
199 | 233 | ||
200 | if(!adev->pm.funcs->set_fan_control_mode) | 234 | if (!adev->pm.funcs->set_fan_control_mode) |
201 | return -EINVAL; | 235 | return -EINVAL; |
202 | 236 | ||
203 | err = kstrtoint(buf, 10, &value); | 237 | err = kstrtoint(buf, 10, &value); |
@@ -294,7 +328,10 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj, | |||
294 | struct amdgpu_device *adev = dev_get_drvdata(dev); | 328 | struct amdgpu_device *adev = dev_get_drvdata(dev); |
295 | umode_t effective_mode = attr->mode; | 329 | umode_t effective_mode = attr->mode; |
296 | 330 | ||
297 | /* Skip attributes if DPM is not enabled */ | 331 | if (amdgpu_powerplay) |
332 | return 0; /* to do */ | ||
333 | |||
334 | /* Skip limit attributes if DPM is not enabled */ | ||
298 | if (!adev->pm.dpm_enabled && | 335 | if (!adev->pm.dpm_enabled && |
299 | (attr == &sensor_dev_attr_temp1_crit.dev_attr.attr || | 336 | (attr == &sensor_dev_attr_temp1_crit.dev_attr.attr || |
300 | attr == &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr || | 337 | attr == &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr || |
@@ -635,49 +672,54 @@ done: | |||
635 | 672 | ||
636 | void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable) | 673 | void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable) |
637 | { | 674 | { |
638 | if (adev->pm.funcs->powergate_uvd) { | 675 | if (amdgpu_powerplay) |
639 | mutex_lock(&adev->pm.mutex); | ||
640 | /* enable/disable UVD */ | ||
641 | amdgpu_dpm_powergate_uvd(adev, !enable); | 676 | amdgpu_dpm_powergate_uvd(adev, !enable); |
642 | mutex_unlock(&adev->pm.mutex); | 677 | else { |
643 | } else { | 678 | if (adev->pm.funcs->powergate_uvd) { |
644 | if (enable) { | ||
645 | mutex_lock(&adev->pm.mutex); | 679 | mutex_lock(&adev->pm.mutex); |
646 | adev->pm.dpm.uvd_active = true; | 680 | /* enable/disable UVD */ |
647 | adev->pm.dpm.state = POWER_STATE_TYPE_INTERNAL_UVD; | 681 | amdgpu_dpm_powergate_uvd(adev, !enable); |
648 | mutex_unlock(&adev->pm.mutex); | 682 | mutex_unlock(&adev->pm.mutex); |
649 | } else { | 683 | } else { |
650 | mutex_lock(&adev->pm.mutex); | 684 | if (enable) { |
651 | adev->pm.dpm.uvd_active = false; | 685 | mutex_lock(&adev->pm.mutex); |
652 | mutex_unlock(&adev->pm.mutex); | 686 | adev->pm.dpm.uvd_active = true; |
687 | adev->pm.dpm.state = POWER_STATE_TYPE_INTERNAL_UVD; | ||
688 | mutex_unlock(&adev->pm.mutex); | ||
689 | } else { | ||
690 | mutex_lock(&adev->pm.mutex); | ||
691 | adev->pm.dpm.uvd_active = false; | ||
692 | mutex_unlock(&adev->pm.mutex); | ||
693 | } | ||
694 | amdgpu_pm_compute_clocks(adev); | ||
653 | } | 695 | } |
654 | 696 | ||
655 | amdgpu_pm_compute_clocks(adev); | ||
656 | } | 697 | } |
657 | } | 698 | } |
658 | 699 | ||
659 | void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable) | 700 | void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable) |
660 | { | 701 | { |
661 | if (adev->pm.funcs->powergate_vce) { | 702 | if (amdgpu_powerplay) |
662 | mutex_lock(&adev->pm.mutex); | ||
663 | /* enable/disable VCE */ | ||
664 | amdgpu_dpm_powergate_vce(adev, !enable); | 703 | amdgpu_dpm_powergate_vce(adev, !enable); |
665 | 704 | else { | |
666 | mutex_unlock(&adev->pm.mutex); | 705 | if (adev->pm.funcs->powergate_vce) { |
667 | } else { | ||
668 | if (enable) { | ||
669 | mutex_lock(&adev->pm.mutex); | 706 | mutex_lock(&adev->pm.mutex); |
670 | adev->pm.dpm.vce_active = true; | 707 | amdgpu_dpm_powergate_vce(adev, !enable); |
671 | /* XXX select vce level based on ring/task */ | ||
672 | adev->pm.dpm.vce_level = AMDGPU_VCE_LEVEL_AC_ALL; | ||
673 | mutex_unlock(&adev->pm.mutex); | 708 | mutex_unlock(&adev->pm.mutex); |
674 | } else { | 709 | } else { |
675 | mutex_lock(&adev->pm.mutex); | 710 | if (enable) { |
676 | adev->pm.dpm.vce_active = false; | 711 | mutex_lock(&adev->pm.mutex); |
677 | mutex_unlock(&adev->pm.mutex); | 712 | adev->pm.dpm.vce_active = true; |
713 | /* XXX select vce level based on ring/task */ | ||
714 | adev->pm.dpm.vce_level = AMDGPU_VCE_LEVEL_AC_ALL; | ||
715 | mutex_unlock(&adev->pm.mutex); | ||
716 | } else { | ||
717 | mutex_lock(&adev->pm.mutex); | ||
718 | adev->pm.dpm.vce_active = false; | ||
719 | mutex_unlock(&adev->pm.mutex); | ||
720 | } | ||
721 | amdgpu_pm_compute_clocks(adev); | ||
678 | } | 722 | } |
679 | |||
680 | amdgpu_pm_compute_clocks(adev); | ||
681 | } | 723 | } |
682 | } | 724 | } |
683 | 725 | ||
@@ -685,10 +727,13 @@ void amdgpu_pm_print_power_states(struct amdgpu_device *adev) | |||
685 | { | 727 | { |
686 | int i; | 728 | int i; |
687 | 729 | ||
688 | for (i = 0; i < adev->pm.dpm.num_ps; i++) { | 730 | if (amdgpu_powerplay) |
689 | printk("== power state %d ==\n", i); | 731 | /* TO DO */ |
732 | return; | ||
733 | |||
734 | for (i = 0; i < adev->pm.dpm.num_ps; i++) | ||
690 | amdgpu_dpm_print_power_state(adev, &adev->pm.dpm.ps[i]); | 735 | amdgpu_dpm_print_power_state(adev, &adev->pm.dpm.ps[i]); |
691 | } | 736 | |
692 | } | 737 | } |
693 | 738 | ||
694 | int amdgpu_pm_sysfs_init(struct amdgpu_device *adev) | 739 | int amdgpu_pm_sysfs_init(struct amdgpu_device *adev) |
@@ -698,8 +743,11 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev) | |||
698 | if (adev->pm.sysfs_initialized) | 743 | if (adev->pm.sysfs_initialized) |
699 | return 0; | 744 | return 0; |
700 | 745 | ||
701 | if (adev->pm.funcs->get_temperature == NULL) | 746 | if (!amdgpu_powerplay) { |
702 | return 0; | 747 | if (adev->pm.funcs->get_temperature == NULL) |
748 | return 0; | ||
749 | } | ||
750 | |||
703 | adev->pm.int_hwmon_dev = hwmon_device_register_with_groups(adev->dev, | 751 | adev->pm.int_hwmon_dev = hwmon_device_register_with_groups(adev->dev, |
704 | DRIVER_NAME, adev, | 752 | DRIVER_NAME, adev, |
705 | hwmon_groups); | 753 | hwmon_groups); |
@@ -748,32 +796,43 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev) | |||
748 | if (!adev->pm.dpm_enabled) | 796 | if (!adev->pm.dpm_enabled) |
749 | return; | 797 | return; |
750 | 798 | ||
751 | mutex_lock(&adev->pm.mutex); | 799 | if (amdgpu_powerplay) { |
800 | int i = 0; | ||
801 | |||
802 | amdgpu_display_bandwidth_update(adev); | ||
803 | mutex_lock(&adev->ring_lock); | ||
804 | for (i = 0; i < AMDGPU_MAX_RINGS; i++) { | ||
805 | struct amdgpu_ring *ring = adev->rings[i]; | ||
806 | if (ring && ring->ready) | ||
807 | amdgpu_fence_wait_empty(ring); | ||
808 | } | ||
809 | mutex_unlock(&adev->ring_lock); | ||
752 | 810 | ||
753 | /* update active crtc counts */ | 811 | amdgpu_dpm_dispatch_task(adev, AMD_PP_EVENT_DISPLAY_CONFIG_CHANGE, NULL, NULL); |
754 | adev->pm.dpm.new_active_crtcs = 0; | 812 | } else { |
755 | adev->pm.dpm.new_active_crtc_count = 0; | 813 | mutex_lock(&adev->pm.mutex); |
756 | if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) { | 814 | adev->pm.dpm.new_active_crtcs = 0; |
757 | list_for_each_entry(crtc, | 815 | adev->pm.dpm.new_active_crtc_count = 0; |
758 | &ddev->mode_config.crtc_list, head) { | 816 | if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) { |
759 | amdgpu_crtc = to_amdgpu_crtc(crtc); | 817 | list_for_each_entry(crtc, |
760 | if (crtc->enabled) { | 818 | &ddev->mode_config.crtc_list, head) { |
761 | adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id); | 819 | amdgpu_crtc = to_amdgpu_crtc(crtc); |
762 | adev->pm.dpm.new_active_crtc_count++; | 820 | if (crtc->enabled) { |
821 | adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id); | ||
822 | adev->pm.dpm.new_active_crtc_count++; | ||
823 | } | ||
763 | } | 824 | } |
764 | } | 825 | } |
765 | } | 826 | /* update battery/ac status */ |
766 | 827 | if (power_supply_is_system_supplied() > 0) | |
767 | /* update battery/ac status */ | 828 | adev->pm.dpm.ac_power = true; |
768 | if (power_supply_is_system_supplied() > 0) | 829 | else |
769 | adev->pm.dpm.ac_power = true; | 830 | adev->pm.dpm.ac_power = false; |
770 | else | ||
771 | adev->pm.dpm.ac_power = false; | ||
772 | |||
773 | amdgpu_dpm_change_power_state_locked(adev); | ||
774 | 831 | ||
775 | mutex_unlock(&adev->pm.mutex); | 832 | amdgpu_dpm_change_power_state_locked(adev); |
776 | 833 | ||
834 | mutex_unlock(&adev->pm.mutex); | ||
835 | } | ||
777 | } | 836 | } |
778 | 837 | ||
779 | /* | 838 | /* |
@@ -787,7 +846,13 @@ static int amdgpu_debugfs_pm_info(struct seq_file *m, void *data) | |||
787 | struct drm_device *dev = node->minor->dev; | 846 | struct drm_device *dev = node->minor->dev; |
788 | struct amdgpu_device *adev = dev->dev_private; | 847 | struct amdgpu_device *adev = dev->dev_private; |
789 | 848 | ||
790 | if (adev->pm.dpm_enabled) { | 849 | if (!adev->pm.dpm_enabled) { |
850 | seq_printf(m, "dpm not enabled\n"); | ||
851 | return 0; | ||
852 | } | ||
853 | if (amdgpu_powerplay) { | ||
854 | amdgpu_dpm_debugfs_print_current_performance_level(adev, m); | ||
855 | } else { | ||
791 | mutex_lock(&adev->pm.mutex); | 856 | mutex_lock(&adev->pm.mutex); |
792 | if (adev->pm.funcs->debugfs_print_current_performance_level) | 857 | if (adev->pm.funcs->debugfs_print_current_performance_level) |
793 | amdgpu_dpm_debugfs_print_current_performance_level(adev, m); | 858 | amdgpu_dpm_debugfs_print_current_performance_level(adev, m); |