aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2017-11-10 06:35:00 -0500
committerMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2017-11-17 06:14:25 -0500
commit199ea381d9887bc8b1720176c443e203d9664cd3 (patch)
tree1676187eabe096ce971696d4807930a698d7ce75 /drivers
parent93313538c15341f44e8e879aa071663795f07bdf (diff)
drm/i915: Pass crtc_state to ips toggle functions, v2
Changes since v1: - Only pass crtc_state, not crtc. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171110113503.16253-8-maarten.lankhorst@linux.intel.com Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_color.c4
-rw-r--r--drivers/gpu/drm/i915/intel_display.c24
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c6
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h4
4 files changed, 21 insertions, 17 deletions
diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
index b8315bca852b..aa66e952a95d 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -370,7 +370,7 @@ static void haswell_load_luts(struct drm_crtc_state *crtc_state)
370 */ 370 */
371 if (IS_HASWELL(dev_priv) && intel_crtc_state->ips_enabled && 371 if (IS_HASWELL(dev_priv) && intel_crtc_state->ips_enabled &&
372 (intel_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) { 372 (intel_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
373 hsw_disable_ips(intel_crtc); 373 hsw_disable_ips(intel_crtc_state);
374 reenable_ips = true; 374 reenable_ips = true;
375 } 375 }
376 376
@@ -380,7 +380,7 @@ static void haswell_load_luts(struct drm_crtc_state *crtc_state)
380 i9xx_load_luts(crtc_state); 380 i9xx_load_luts(crtc_state);
381 381
382 if (reenable_ips) 382 if (reenable_ips)
383 hsw_enable_ips(intel_crtc); 383 hsw_enable_ips(intel_crtc_state);
384} 384}
385 385
386static void bdw_load_degamma_lut(struct drm_crtc_state *state) 386static void bdw_load_degamma_lut(struct drm_crtc_state *state)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5196a1683cd3..3b3dec1e6640 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4864,8 +4864,9 @@ static void ironlake_pfit_enable(struct intel_crtc *crtc)
4864 } 4864 }
4865} 4865}
4866 4866
4867void hsw_enable_ips(struct intel_crtc *crtc) 4867void hsw_enable_ips(const struct intel_crtc_state *crtc_state)
4868{ 4868{
4869 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
4869 struct drm_device *dev = crtc->base.dev; 4870 struct drm_device *dev = crtc->base.dev;
4870 struct drm_i915_private *dev_priv = to_i915(dev); 4871 struct drm_i915_private *dev_priv = to_i915(dev);
4871 4872
@@ -4903,12 +4904,13 @@ void hsw_enable_ips(struct intel_crtc *crtc)
4903 } 4904 }
4904} 4905}
4905 4906
4906void hsw_disable_ips(struct intel_crtc *crtc) 4907void hsw_disable_ips(const struct intel_crtc_state *crtc_state)
4907{ 4908{
4909 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
4908 struct drm_device *dev = crtc->base.dev; 4910 struct drm_device *dev = crtc->base.dev;
4909 struct drm_i915_private *dev_priv = to_i915(dev); 4911 struct drm_i915_private *dev_priv = to_i915(dev);
4910 4912
4911 if (!crtc->config->ips_enabled) 4913 if (!crtc_state->ips_enabled)
4912 return; 4914 return;
4913 4915
4914 assert_plane_enabled(dev_priv, crtc->plane); 4916 assert_plane_enabled(dev_priv, crtc->plane);
@@ -4956,7 +4958,8 @@ static void intel_crtc_dpms_overlay_disable(struct intel_crtc *intel_crtc)
4956 * completely hide the primary plane. 4958 * completely hide the primary plane.
4957 */ 4959 */
4958static void 4960static void
4959intel_post_enable_primary(struct drm_crtc *crtc) 4961intel_post_enable_primary(struct drm_crtc *crtc,
4962 const struct intel_crtc_state *new_crtc_state)
4960{ 4963{
4961 struct drm_device *dev = crtc->dev; 4964 struct drm_device *dev = crtc->dev;
4962 struct drm_i915_private *dev_priv = to_i915(dev); 4965 struct drm_i915_private *dev_priv = to_i915(dev);
@@ -4969,7 +4972,7 @@ intel_post_enable_primary(struct drm_crtc *crtc)
4969 * when going from primary only to sprite only and vice 4972 * when going from primary only to sprite only and vice
4970 * versa. 4973 * versa.
4971 */ 4974 */
4972 hsw_enable_ips(intel_crtc); 4975 hsw_enable_ips(new_crtc_state);
4973 4976
4974 /* 4977 /*
4975 * Gen2 reports pipe underruns whenever all planes are disabled. 4978 * Gen2 reports pipe underruns whenever all planes are disabled.
@@ -4988,7 +4991,8 @@ intel_post_enable_primary(struct drm_crtc *crtc)
4988 4991
4989/* FIXME move all this to pre_plane_update() with proper state tracking */ 4992/* FIXME move all this to pre_plane_update() with proper state tracking */
4990static void 4993static void
4991intel_pre_disable_primary(struct drm_crtc *crtc) 4994intel_pre_disable_primary(struct drm_crtc *crtc,
4995 const struct intel_crtc_state *old_crtc_state)
4992{ 4996{
4993 struct drm_device *dev = crtc->dev; 4997 struct drm_device *dev = crtc->dev;
4994 struct drm_i915_private *dev_priv = to_i915(dev); 4998 struct drm_i915_private *dev_priv = to_i915(dev);
@@ -5010,7 +5014,7 @@ intel_pre_disable_primary(struct drm_crtc *crtc)
5010 * when going from primary only to sprite only and vice 5014 * when going from primary only to sprite only and vice
5011 * versa. 5015 * versa.
5012 */ 5016 */
5013 hsw_disable_ips(intel_crtc); 5017 hsw_disable_ips(old_crtc_state);
5014} 5018}
5015 5019
5016/* FIXME get rid of this and use pre_plane_update */ 5020/* FIXME get rid of this and use pre_plane_update */
@@ -5022,7 +5026,7 @@ intel_pre_disable_primary_noatomic(struct drm_crtc *crtc)
5022 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 5026 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
5023 int pipe = intel_crtc->pipe; 5027 int pipe = intel_crtc->pipe;
5024 5028
5025 intel_pre_disable_primary(crtc); 5029 intel_pre_disable_primary(crtc, to_intel_crtc_state(crtc->state));
5026 5030
5027 /* 5031 /*
5028 * Vblank time updates from the shadow to live plane control register 5032 * Vblank time updates from the shadow to live plane control register
@@ -5066,7 +5070,7 @@ static void intel_post_plane_update(struct intel_crtc_state *old_crtc_state)
5066 if (primary_state->base.visible && 5070 if (primary_state->base.visible &&
5067 (needs_modeset(&pipe_config->base) || 5071 (needs_modeset(&pipe_config->base) ||
5068 !old_primary_state->base.visible)) 5072 !old_primary_state->base.visible))
5069 intel_post_enable_primary(&crtc->base); 5073 intel_post_enable_primary(&crtc->base, pipe_config);
5070 } 5074 }
5071} 5075}
5072 5076
@@ -5095,7 +5099,7 @@ static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state,
5095 5099
5096 if (old_primary_state->base.visible && 5100 if (old_primary_state->base.visible &&
5097 (modeset || !primary_state->base.visible)) 5101 (modeset || !primary_state->base.visible))
5098 intel_pre_disable_primary(&crtc->base); 5102 intel_pre_disable_primary(&crtc->base, old_crtc_state);
5099 } 5103 }
5100 5104
5101 /* 5105 /*
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 74c7cd655db4..bc61f38b131d 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3903,7 +3903,7 @@ static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp,
3903 3903
3904 out: 3904 out:
3905 if (disable_wa) 3905 if (disable_wa)
3906 hsw_enable_ips(intel_crtc); 3906 hsw_enable_ips(crtc_state);
3907 return ret; 3907 return ret;
3908} 3908}
3909 3909
@@ -3931,11 +3931,11 @@ static int intel_dp_sink_crc_start(struct intel_dp *intel_dp,
3931 return ret; 3931 return ret;
3932 } 3932 }
3933 3933
3934 hsw_disable_ips(intel_crtc); 3934 hsw_disable_ips(crtc_state);
3935 3935
3936 if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK, 3936 if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK,
3937 buf | DP_TEST_SINK_START) < 0) { 3937 buf | DP_TEST_SINK_START) < 0) {
3938 hsw_enable_ips(intel_crtc); 3938 hsw_enable_ips(crtc_state);
3939 return -EIO; 3939 return -EIO;
3940 } 3940 }
3941 3941
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 225392fe6762..69aab324aaa1 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1485,8 +1485,8 @@ bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state, int target_clock,
1485int chv_calc_dpll_params(int refclk, struct dpll *pll_clock); 1485int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
1486 1486
1487bool intel_crtc_active(struct intel_crtc *crtc); 1487bool intel_crtc_active(struct intel_crtc *crtc);
1488void hsw_enable_ips(struct intel_crtc *crtc); 1488void hsw_enable_ips(const struct intel_crtc_state *crtc_state);
1489void hsw_disable_ips(struct intel_crtc *crtc); 1489void hsw_disable_ips(const struct intel_crtc_state *crtc_state);
1490enum intel_display_power_domain intel_port_to_power_domain(enum port port); 1490enum intel_display_power_domain intel_port_to_power_domain(enum port port);
1491void intel_mode_from_pipe_config(struct drm_display_mode *mode, 1491void intel_mode_from_pipe_config(struct drm_display_mode *mode,
1492 struct intel_crtc_state *pipe_config); 1492 struct intel_crtc_state *pipe_config);