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authorHeiner Kallweit <hkallweit1@gmail.com>2017-11-19 05:09:58 -0500
committerDavid S. Miller <davem@davemloft.net>2017-11-19 07:27:49 -0500
commit1814d6a8c4be3954810d72d9223cfa37091a5e68 (patch)
tree9f6262bc451b43e049ae3a2e23a95a2b1fc43011 /drivers
parent654d573845f35017dc397840fa03610fef3d08b0 (diff)
r8169: fix RTL8111EVL EEE and green settings
Name of functions rtl_w0w1_eri and rtl_w0w1_phy is somewhat misleading regarding order of arguments. One could assume that w0w1 means argument with bits to be reset comes before argument with bits to set. However this is not the case. So fix the order of arguments in several statements. In addition fix EEE advertisement. The current code resets the bits for 100BaseT and 1000BaseT EEE advertisement what is not what we want. I have a little of a hard time to find a proper "Fixes" line as the issue seems to have been there forever (at least it existed already when the driver was moved to the current place in 2011). The patch was tested on a Zotac Mini-PC with a RTL8111E-VL chip. Before the patch EEE was disabled, now it's properly advertised and works fine. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/ethernet/realtek/r8169.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index dcb8c39382e7..19f3074a0a68 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -3789,26 +3789,26 @@ static void rtl8168e_2_hw_phy_config(struct rtl8169_private *tp)
3789 rtl_writephy(tp, 0x1f, 0x0000); 3789 rtl_writephy(tp, 0x1f, 0x0000);
3790 3790
3791 /* EEE setting */ 3791 /* EEE setting */
3792 rtl_w0w1_eri(tp, 0x1b0, ERIAR_MASK_1111, 0x0000, 0x0003, ERIAR_EXGMAC); 3792 rtl_w0w1_eri(tp, 0x1b0, ERIAR_MASK_1111, 0x0003, 0x0000, ERIAR_EXGMAC);
3793 rtl_writephy(tp, 0x1f, 0x0005); 3793 rtl_writephy(tp, 0x1f, 0x0005);
3794 rtl_writephy(tp, 0x05, 0x8b85); 3794 rtl_writephy(tp, 0x05, 0x8b85);
3795 rtl_w0w1_phy(tp, 0x06, 0x0000, 0x2000); 3795 rtl_w0w1_phy(tp, 0x06, 0x2000, 0x0000);
3796 rtl_writephy(tp, 0x1f, 0x0004); 3796 rtl_writephy(tp, 0x1f, 0x0004);
3797 rtl_writephy(tp, 0x1f, 0x0007); 3797 rtl_writephy(tp, 0x1f, 0x0007);
3798 rtl_writephy(tp, 0x1e, 0x0020); 3798 rtl_writephy(tp, 0x1e, 0x0020);
3799 rtl_w0w1_phy(tp, 0x15, 0x0000, 0x0100); 3799 rtl_w0w1_phy(tp, 0x15, 0x0100, 0x0000);
3800 rtl_writephy(tp, 0x1f, 0x0002); 3800 rtl_writephy(tp, 0x1f, 0x0002);
3801 rtl_writephy(tp, 0x1f, 0x0000); 3801 rtl_writephy(tp, 0x1f, 0x0000);
3802 rtl_writephy(tp, 0x0d, 0x0007); 3802 rtl_writephy(tp, 0x0d, 0x0007);
3803 rtl_writephy(tp, 0x0e, 0x003c); 3803 rtl_writephy(tp, 0x0e, 0x003c);
3804 rtl_writephy(tp, 0x0d, 0x4007); 3804 rtl_writephy(tp, 0x0d, 0x4007);
3805 rtl_writephy(tp, 0x0e, 0x0000); 3805 rtl_writephy(tp, 0x0e, 0x0006);
3806 rtl_writephy(tp, 0x0d, 0x0000); 3806 rtl_writephy(tp, 0x0d, 0x0000);
3807 3807
3808 /* Green feature */ 3808 /* Green feature */
3809 rtl_writephy(tp, 0x1f, 0x0003); 3809 rtl_writephy(tp, 0x1f, 0x0003);
3810 rtl_w0w1_phy(tp, 0x19, 0x0000, 0x0001); 3810 rtl_w0w1_phy(tp, 0x19, 0x0001, 0x0000);
3811 rtl_w0w1_phy(tp, 0x10, 0x0000, 0x0400); 3811 rtl_w0w1_phy(tp, 0x10, 0x0400, 0x0000);
3812 rtl_writephy(tp, 0x1f, 0x0000); 3812 rtl_writephy(tp, 0x1f, 0x0000);
3813 3813
3814 /* Broken BIOS workaround: feed GigaMAC registers with MAC address. */ 3814 /* Broken BIOS workaround: feed GigaMAC registers with MAC address. */