irqchip/gic-v3-its: Move minimum LPI requirements to individual busses

At the moment, the core ITS driver imposes the allocation to be
in chunks of 32. As we want to relax this on a per bus basis, let's
move the the the allocation constraints to each bus.

No functionnal change.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>

4 files changed, 16 insertions, 6 deletions

diff --git a/drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c b/drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c
index 4eca5c763766..606efa64adff 100644
--- a/drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c
+++ b/drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c
@@ -45,6 +45,9 @@ static int its_fsl_mc_msi_prepare(struct irq_domain *msi_domain,
          */
         info->scratchpad[0].ul = mc_bus_dev->icid;
         msi_info = msi_get_domain_info(msi_domain->parent);
+
+        /* Allocate at least 32 MSIs, and always as a power of 2 */
+        nvec = max_t(int, 32, roundup_pow_of_two(nvec));
         return msi_info->ops->msi_prepare(msi_domain->parent, dev, nvec, info);
 }
 
diff --git a/drivers/irqchip/irq-gic-v3-its-pci-msi.c b/drivers/irqchip/irq-gic-v3-its-pci-msi.c
index 25a98de5cfb2..75c3cafabc6a 100644
--- a/drivers/irqchip/irq-gic-v3-its-pci-msi.c
+++ b/drivers/irqchip/irq-gic-v3-its-pci-msi.c
@@ -86,8 +86,10 @@ static int its_pci_msi_prepare(struct irq_domain *domain, struct device *dev,
         /* ITS specific DeviceID, as the core ITS ignores dev. */
         info->scratchpad[0].ul = pci_msi_domain_get_msi_rid(domain, pdev);
 
-        return msi_info->ops->msi_prepare(domain->parent,
-                                          dev, max(nvec, alias_count), info);
+        /* Allocate at least 32 MSIs, and always as a power of 2 */
+        nvec = max(nvec, alias_count);
+        nvec = max_t(int, 32, roundup_pow_of_two(nvec));
+        return msi_info->ops->msi_prepare(domain->parent, dev, nvec, info);
 }
 
 static struct msi_domain_ops its_pci_msi_ops = {
diff --git a/drivers/irqchip/irq-gic-v3-its-platform-msi.c b/drivers/irqchip/irq-gic-v3-its-platform-msi.c
index 8881a053c173..7b8e87b493fe 100644
--- a/drivers/irqchip/irq-gic-v3-its-platform-msi.c
+++ b/drivers/irqchip/irq-gic-v3-its-platform-msi.c
@@ -73,6 +73,8 @@ static int its_pmsi_prepare(struct irq_domain *domain, struct device *dev,
         /* ITS specific DeviceID, as the core ITS ignores dev. */
         info->scratchpad[0].ul = dev_id;
 
+        /* Allocate at least 32 MSIs, and always as a power of 2 */
+        nvec = max_t(int, 32, roundup_pow_of_two(nvec));
         return msi_info->ops->msi_prepare(domain->parent,
                                           dev, nvec, info);
 }
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 20244006cd82..03ac8d05279d 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -2200,12 +2200,15 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
         if (!its_alloc_device_table(its, dev_id))
                 return NULL;
 
+        if (WARN_ON(!is_power_of_2(nvecs)))
+                nvecs = roundup_pow_of_two(nvecs);
+
         dev = kzalloc(sizeof(*dev), GFP_KERNEL);
         /*
-         * We allocate at least one chunk worth of LPIs bet device,
-         * and thus that many ITEs. The device may require less though.
+         * Even if the device wants a single LPI, the ITT must be
+         * sized as a power of two (and you need at least one bit...).
          */
-        nr_ites = max(IRQS_PER_CHUNK, roundup_pow_of_two(nvecs));
+        nr_ites = max(2, nvecs);
         sz = nr_ites * its->ite_size;
         sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1;
         itt = kzalloc(sz, GFP_KERNEL);
@@ -2861,7 +2864,7 @@ static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq
 
         BUG_ON(!vm);
 
-        bitmap = its_lpi_alloc_chunks(nr_irqs, &base, &nr_ids);
+        bitmap = its_lpi_alloc_chunks(roundup_pow_of_two(nr_irqs), &base, &nr_ids);
         if (!bitmap)
                 return -ENOMEM;