diff options
| author | Ulrich Hecht <uli+renesas@fpond.eu> | 2018-08-14 09:49:56 -0400 |
|---|---|---|
| committer | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2018-09-24 17:41:05 -0400 |
| commit | 122702077e4492e02de8a6257e6cb2227c617cf0 (patch) | |
| tree | 342364c18872fe0d8a781dcf58d049504ec05af1 /drivers | |
| parent | ffd15c3e7898cfb6d2a986b2aa8014ad7dc9e333 (diff) | |
drm: rcar-du: Add r8a77990 and r8a77995 device support
Add support for the R-Car D3 (R8A77995) and E3 (R8A77990) SoCs to the
R-Car DU driver. The two SoCs instantiate compatible DUs, so a single
information structure is enough.
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
[Add support for R8A77990]
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/rcar-du/rcar_du_drv.c | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c index fa0d381c2d0f..084f58df4a8c 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c | |||
| @@ -311,6 +311,34 @@ static const struct rcar_du_device_info rcar_du_r8a77970_info = { | |||
| 311 | .num_lvds = 1, | 311 | .num_lvds = 1, |
| 312 | }; | 312 | }; |
| 313 | 313 | ||
| 314 | static const struct rcar_du_device_info rcar_du_r8a7799x_info = { | ||
| 315 | .gen = 3, | ||
| 316 | .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | ||
| 317 | | RCAR_DU_FEATURE_EXT_CTRL_REGS | ||
| 318 | | RCAR_DU_FEATURE_VSP1_SOURCE, | ||
| 319 | .channels_mask = BIT(1) | BIT(0), | ||
| 320 | .routes = { | ||
| 321 | /* | ||
| 322 | * R8A77990 and R8A77995 have one RGB output and two LVDS | ||
| 323 | * outputs. | ||
| 324 | */ | ||
| 325 | [RCAR_DU_OUTPUT_DPAD0] = { | ||
| 326 | .possible_crtcs = BIT(0) | BIT(1), | ||
| 327 | .port = 0, | ||
| 328 | }, | ||
| 329 | [RCAR_DU_OUTPUT_LVDS0] = { | ||
| 330 | .possible_crtcs = BIT(0), | ||
| 331 | .port = 1, | ||
| 332 | }, | ||
| 333 | [RCAR_DU_OUTPUT_LVDS1] = { | ||
| 334 | .possible_crtcs = BIT(1), | ||
| 335 | .port = 2, | ||
| 336 | }, | ||
| 337 | }, | ||
| 338 | .num_lvds = 2, | ||
| 339 | .lvds_clk_mask = BIT(1) | BIT(0), | ||
| 340 | }; | ||
| 341 | |||
| 314 | static const struct of_device_id rcar_du_of_table[] = { | 342 | static const struct of_device_id rcar_du_of_table[] = { |
| 315 | { .compatible = "renesas,du-r8a7743", .data = &rzg1_du_r8a7743_info }, | 343 | { .compatible = "renesas,du-r8a7743", .data = &rzg1_du_r8a7743_info }, |
| 316 | { .compatible = "renesas,du-r8a7745", .data = &rzg1_du_r8a7745_info }, | 344 | { .compatible = "renesas,du-r8a7745", .data = &rzg1_du_r8a7745_info }, |
| @@ -324,6 +352,8 @@ static const struct of_device_id rcar_du_of_table[] = { | |||
| 324 | { .compatible = "renesas,du-r8a7796", .data = &rcar_du_r8a7796_info }, | 352 | { .compatible = "renesas,du-r8a7796", .data = &rcar_du_r8a7796_info }, |
| 325 | { .compatible = "renesas,du-r8a77965", .data = &rcar_du_r8a77965_info }, | 353 | { .compatible = "renesas,du-r8a77965", .data = &rcar_du_r8a77965_info }, |
| 326 | { .compatible = "renesas,du-r8a77970", .data = &rcar_du_r8a77970_info }, | 354 | { .compatible = "renesas,du-r8a77970", .data = &rcar_du_r8a77970_info }, |
| 355 | { .compatible = "renesas,du-r8a77990", .data = &rcar_du_r8a7799x_info }, | ||
| 356 | { .compatible = "renesas,du-r8a77995", .data = &rcar_du_r8a7799x_info }, | ||
| 327 | { } | 357 | { } |
| 328 | }; | 358 | }; |
| 329 | 359 | ||
