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authorxinhui pan <xinhui.pan@amd.com>2019-03-11 03:23:00 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-03-19 16:36:52 -0400
commit108c6a6309c96a27010ff300c96ebba341cae44a (patch)
treed4d4e650a5c7dd91d9e95a2ac35e22ae0ad97ca8 /drivers
parent5d0f903fe215e7f0fc790106827207f5185ea9b5 (diff)
drm/amdgpu: add new ras workflow control flags
add ras post init function. Do some initialization after all IP have finished their late init. Add new member flags which will control the ras work flow. For now, vbios enable ras for us on boot. That might change in the future. So there should be a flag from vbios to tell us if ras is enabled or not on boot. Looks like there is no such info now. Other bits of the flags are reserved to control other parts of ras. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_device.c3
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c34
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h3
3 files changed, 39 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 8b3978aad5ca..69d74c0a5cbe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2707,6 +2707,9 @@ fence_driver_init:
2707 goto failed; 2707 goto failed;
2708 } 2708 }
2709 2709
2710 /* must succeed. */
2711 amdgpu_ras_post_init(adev);
2712
2710 return 0; 2713 return 0;
2711 2714
2712failed: 2715failed:
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 10ce40d2c040..238b46c304cc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -118,6 +118,11 @@ const char *ras_block_string[] = {
118#define ras_err_str(i) (ras_error_string[ffs(i)]) 118#define ras_err_str(i) (ras_error_string[ffs(i)])
119#define ras_block_str(i) (ras_block_string[i]) 119#define ras_block_str(i) (ras_block_string[i])
120 120
121enum amdgpu_ras_flags {
122 AMDGPU_RAS_FLAG_INIT_BY_VBIOS = 1,
123};
124#define RAS_DEFAULT_FLAGS (AMDGPU_RAS_FLAG_INIT_BY_VBIOS)
125
121static void amdgpu_ras_self_test(struct amdgpu_device *adev) 126static void amdgpu_ras_self_test(struct amdgpu_device *adev)
122{ 127{
123 /* TODO */ 128 /* TODO */
@@ -1387,13 +1392,16 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
1387 &con->supported); 1392 &con->supported);
1388 con->features = 0; 1393 con->features = 0;
1389 INIT_LIST_HEAD(&con->head); 1394 INIT_LIST_HEAD(&con->head);
1395 /* Might need get this flag from vbios. */
1396 con->flags = RAS_DEFAULT_FLAGS;
1390 1397
1391 if (amdgpu_ras_recovery_init(adev)) 1398 if (amdgpu_ras_recovery_init(adev))
1392 goto recovery_out; 1399 goto recovery_out;
1393 1400
1394 amdgpu_ras_mask &= AMDGPU_RAS_BLOCK_MASK; 1401 amdgpu_ras_mask &= AMDGPU_RAS_BLOCK_MASK;
1395 1402
1396 amdgpu_ras_enable_all_features(adev, 1); 1403 if (con->flags & AMDGPU_RAS_FLAG_INIT_BY_VBIOS)
1404 amdgpu_ras_enable_all_features(adev, 1);
1397 1405
1398 if (amdgpu_ras_fs_init(adev)) 1406 if (amdgpu_ras_fs_init(adev))
1399 goto fs_out; 1407 goto fs_out;
@@ -1413,6 +1421,30 @@ recovery_out:
1413 return -EINVAL; 1421 return -EINVAL;
1414} 1422}
1415 1423
1424/* do some init work after IP late init as dependence */
1425void amdgpu_ras_post_init(struct amdgpu_device *adev)
1426{
1427 struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
1428 struct ras_manager *obj, *tmp;
1429
1430 if (!con)
1431 return;
1432
1433 /* We enable ras on all hw_supported block, but as boot parameter might
1434 * disable some of them and one or more IP has not implemented yet.
1435 * So we disable them on behalf.
1436 */
1437 if (con->flags & AMDGPU_RAS_FLAG_INIT_BY_VBIOS) {
1438 list_for_each_entry_safe(obj, tmp, &con->head, node) {
1439 if (!amdgpu_ras_is_supported(adev, obj->head.block)) {
1440 amdgpu_ras_feature_enable(adev, &obj->head, 0);
1441 /* there should be no any reference. */
1442 WARN_ON(alive_obj(obj));
1443 }
1444 };
1445 }
1446}
1447
1416/* do some fini work before IP fini as dependence */ 1448/* do some fini work before IP fini as dependence */
1417int amdgpu_ras_pre_fini(struct amdgpu_device *adev) 1449int amdgpu_ras_pre_fini(struct amdgpu_device *adev)
1418{ 1450{
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
index 2b6077762b91..7a35316baab0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
@@ -103,6 +103,8 @@ struct amdgpu_ras {
103 /* error handler data */ 103 /* error handler data */
104 struct ras_err_handler_data *eh_data; 104 struct ras_err_handler_data *eh_data;
105 struct mutex recovery_lock; 105 struct mutex recovery_lock;
106
107 uint32_t flags;
106}; 108};
107 109
108/* interfaces for IP */ 110/* interfaces for IP */
@@ -197,6 +199,7 @@ static inline int amdgpu_ras_reset_gpu(struct amdgpu_device *adev,
197 199
198/* called in ip_init and ip_fini */ 200/* called in ip_init and ip_fini */
199int amdgpu_ras_init(struct amdgpu_device *adev); 201int amdgpu_ras_init(struct amdgpu_device *adev);
202void amdgpu_ras_post_init(struct amdgpu_device *adev);
200int amdgpu_ras_fini(struct amdgpu_device *adev); 203int amdgpu_ras_fini(struct amdgpu_device *adev);
201int amdgpu_ras_pre_fini(struct amdgpu_device *adev); 204int amdgpu_ras_pre_fini(struct amdgpu_device *adev);
202 205