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authorChristian König <christian.koenig@amd.com>2017-07-31 09:32:40 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-08-17 15:46:05 -0400
commit0f4b3c68626199cd5ce619e2a3105d44b81f2753 (patch)
tree138bbebec60074a45000a2e14ab6204c02270350 /drivers
parentc0573af349f649516863254fad386175777d5672 (diff)
drm/amdgpu: cleanup static CSA handling
Move the CSA bo_va from the VM to the fpriv structure. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu.h1
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c3
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c6
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c25
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h3
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h2
6 files changed, 20 insertions, 20 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index ad944aea0d4b..1f915a5ce9ba 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -748,6 +748,7 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr);
748struct amdgpu_fpriv { 748struct amdgpu_fpriv {
749 struct amdgpu_vm vm; 749 struct amdgpu_vm vm;
750 struct amdgpu_bo_va *prt_va; 750 struct amdgpu_bo_va *prt_va;
751 struct amdgpu_bo_va *csa_va;
751 struct mutex bo_list_lock; 752 struct mutex bo_list_lock;
752 struct idr bo_list_handles; 753 struct idr bo_list_handles;
753 struct amdgpu_ctx_mgr ctx_mgr; 754 struct amdgpu_ctx_mgr ctx_mgr;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 7e71a511990e..3c64248673ee 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -787,7 +787,8 @@ static int amdgpu_bo_vm_update_pte(struct amdgpu_cs_parser *p)
787 787
788 if (amdgpu_sriov_vf(adev)) { 788 if (amdgpu_sriov_vf(adev)) {
789 struct dma_fence *f; 789 struct dma_fence *f;
790 bo_va = vm->csa_bo_va; 790
791 bo_va = fpriv->csa_va;
791 BUG_ON(!bo_va); 792 BUG_ON(!bo_va);
792 r = amdgpu_vm_bo_update(adev, bo_va, false); 793 r = amdgpu_vm_bo_update(adev, bo_va, false);
793 if (r) 794 if (r)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 29cd5dabf8b5..1aac5821ac8f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -843,7 +843,7 @@ int amdgpu_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
843 } 843 }
844 844
845 if (amdgpu_sriov_vf(adev)) { 845 if (amdgpu_sriov_vf(adev)) {
846 r = amdgpu_map_static_csa(adev, &fpriv->vm); 846 r = amdgpu_map_static_csa(adev, &fpriv->vm, &fpriv->csa_va);
847 if (r) 847 if (r)
848 goto out_suspend; 848 goto out_suspend;
849 } 849 }
@@ -896,8 +896,8 @@ void amdgpu_driver_postclose_kms(struct drm_device *dev,
896 if (amdgpu_sriov_vf(adev)) { 896 if (amdgpu_sriov_vf(adev)) {
897 /* TODO: how to handle reserve failure */ 897 /* TODO: how to handle reserve failure */
898 BUG_ON(amdgpu_bo_reserve(adev->virt.csa_obj, true)); 898 BUG_ON(amdgpu_bo_reserve(adev->virt.csa_obj, true));
899 amdgpu_vm_bo_rmv(adev, fpriv->vm.csa_bo_va); 899 amdgpu_vm_bo_rmv(adev, fpriv->csa_va);
900 fpriv->vm.csa_bo_va = NULL; 900 fpriv->csa_va = NULL;
901 amdgpu_bo_unreserve(adev->virt.csa_obj); 901 amdgpu_bo_unreserve(adev->virt.csa_obj);
902 } 902 }
903 903
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index 8a081e162d13..89208456d360 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -46,14 +46,14 @@ int amdgpu_allocate_static_csa(struct amdgpu_device *adev)
46 * address within META_DATA init package to support SRIOV gfx preemption. 46 * address within META_DATA init package to support SRIOV gfx preemption.
47 */ 47 */
48 48
49int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm) 49int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm,
50 struct amdgpu_bo_va **bo_va)
50{ 51{
51 int r;
52 struct amdgpu_bo_va *bo_va;
53 struct ww_acquire_ctx ticket; 52 struct ww_acquire_ctx ticket;
54 struct list_head list; 53 struct list_head list;
55 struct amdgpu_bo_list_entry pd; 54 struct amdgpu_bo_list_entry pd;
56 struct ttm_validate_buffer csa_tv; 55 struct ttm_validate_buffer csa_tv;
56 int r;
57 57
58 INIT_LIST_HEAD(&list); 58 INIT_LIST_HEAD(&list);
59 INIT_LIST_HEAD(&csa_tv.head); 59 INIT_LIST_HEAD(&csa_tv.head);
@@ -69,34 +69,33 @@ int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm)
69 return r; 69 return r;
70 } 70 }
71 71
72 bo_va = amdgpu_vm_bo_add(adev, vm, adev->virt.csa_obj); 72 *bo_va = amdgpu_vm_bo_add(adev, vm, adev->virt.csa_obj);
73 if (!bo_va) { 73 if (!*bo_va) {
74 ttm_eu_backoff_reservation(&ticket, &list); 74 ttm_eu_backoff_reservation(&ticket, &list);
75 DRM_ERROR("failed to create bo_va for static CSA\n"); 75 DRM_ERROR("failed to create bo_va for static CSA\n");
76 return -ENOMEM; 76 return -ENOMEM;
77 } 77 }
78 78
79 r = amdgpu_vm_alloc_pts(adev, bo_va->vm, AMDGPU_CSA_VADDR, 79 r = amdgpu_vm_alloc_pts(adev, (*bo_va)->vm, AMDGPU_CSA_VADDR,
80 AMDGPU_CSA_SIZE); 80 AMDGPU_CSA_SIZE);
81 if (r) { 81 if (r) {
82 DRM_ERROR("failed to allocate pts for static CSA, err=%d\n", r); 82 DRM_ERROR("failed to allocate pts for static CSA, err=%d\n", r);
83 amdgpu_vm_bo_rmv(adev, bo_va); 83 amdgpu_vm_bo_rmv(adev, *bo_va);
84 ttm_eu_backoff_reservation(&ticket, &list); 84 ttm_eu_backoff_reservation(&ticket, &list);
85 return r; 85 return r;
86 } 86 }
87 87
88 r = amdgpu_vm_bo_map(adev, bo_va, AMDGPU_CSA_VADDR, 0,AMDGPU_CSA_SIZE, 88 r = amdgpu_vm_bo_map(adev, *bo_va, AMDGPU_CSA_VADDR, 0, AMDGPU_CSA_SIZE,
89 AMDGPU_PTE_READABLE | AMDGPU_PTE_WRITEABLE | 89 AMDGPU_PTE_READABLE | AMDGPU_PTE_WRITEABLE |
90 AMDGPU_PTE_EXECUTABLE); 90 AMDGPU_PTE_EXECUTABLE);
91 91
92 if (r) { 92 if (r) {
93 DRM_ERROR("failed to do bo_map on static CSA, err=%d\n", r); 93 DRM_ERROR("failed to do bo_map on static CSA, err=%d\n", r);
94 amdgpu_vm_bo_rmv(adev, bo_va); 94 amdgpu_vm_bo_rmv(adev, *bo_va);
95 ttm_eu_backoff_reservation(&ticket, &list); 95 ttm_eu_backoff_reservation(&ticket, &list);
96 return r; 96 return r;
97 } 97 }
98 98
99 vm->csa_bo_va = bo_va;
100 ttm_eu_backoff_reservation(&ticket, &list); 99 ttm_eu_backoff_reservation(&ticket, &list);
101 return 0; 100 return 0;
102} 101}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
index e5b1baf387c1..afcfb8bcfb65 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
@@ -90,7 +90,8 @@ static inline bool is_virtual_machine(void)
90 90
91struct amdgpu_vm; 91struct amdgpu_vm;
92int amdgpu_allocate_static_csa(struct amdgpu_device *adev); 92int amdgpu_allocate_static_csa(struct amdgpu_device *adev);
93int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm); 93int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm,
94 struct amdgpu_bo_va **bo_va);
94void amdgpu_virt_init_setting(struct amdgpu_device *adev); 95void amdgpu_virt_init_setting(struct amdgpu_device *adev);
95uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg); 96uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg);
96void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v); 97void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 6e94cd2e610c..9c309c5a86f1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -141,8 +141,6 @@ struct amdgpu_vm {
141 u64 client_id; 141 u64 client_id;
142 /* dedicated to vm */ 142 /* dedicated to vm */
143 struct amdgpu_vm_id *reserved_vmid[AMDGPU_MAX_VMHUBS]; 143 struct amdgpu_vm_id *reserved_vmid[AMDGPU_MAX_VMHUBS];
144 /* each VM will map on CSA */
145 struct amdgpu_bo_va *csa_bo_va;
146 144
147 /* Flag to indicate if VM tables are updated by CPU or GPU (SDMA) */ 145 /* Flag to indicate if VM tables are updated by CPU or GPU (SDMA) */
148 bool use_cpu_for_update; 146 bool use_cpu_for_update;