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authorAndrey Grodzovsky <andrey.grodzovsky@amd.com>2017-10-10 16:50:17 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-10-19 15:26:59 -0400
commit0ae94444c08a0adf2fab4aab26be0646ee445a19 (patch)
treed5bc47553183dfe5ec29a23fe3e7d78f1906fc2d /drivers
parentad864d243826cedc53404a1c0db7d1e38ddceb84 (diff)
drm/amdgpu: Move old fence waiting before reservation lock is aquired v2
Helps avoiding deadlock during GPU reset. Added mutex to amdgpu_ctx to preserve order of fences on a ring. v2: Put waiting logic in a function in a seperate function in amdgpu_ctx.c Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu.h4
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c10
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c30
3 files changed, 34 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 951c8db01412..76033e2cdba8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -738,6 +738,7 @@ struct amdgpu_ctx {
738 bool preamble_presented; 738 bool preamble_presented;
739 enum amd_sched_priority init_priority; 739 enum amd_sched_priority init_priority;
740 enum amd_sched_priority override_priority; 740 enum amd_sched_priority override_priority;
741 struct mutex lock;
741}; 742};
742 743
743struct amdgpu_ctx_mgr { 744struct amdgpu_ctx_mgr {
@@ -760,9 +761,12 @@ void amdgpu_ctx_priority_override(struct amdgpu_ctx *ctx,
760int amdgpu_ctx_ioctl(struct drm_device *dev, void *data, 761int amdgpu_ctx_ioctl(struct drm_device *dev, void *data,
761 struct drm_file *filp); 762 struct drm_file *filp);
762 763
764int amdgpu_ctx_wait_prev_fence(struct amdgpu_ctx *ctx, unsigned ring_id);
765
763void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr); 766void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr);
764void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr); 767void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr);
765 768
769
766/* 770/*
767 * file private structure 771 * file private structure
768 */ 772 */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 9166d5e1e557..5de092eab0fa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -90,6 +90,8 @@ static int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
90 goto free_chunk; 90 goto free_chunk;
91 } 91 }
92 92
93 mutex_lock(&p->ctx->lock);
94
93 /* get chunks */ 95 /* get chunks */
94 chunk_array_user = u64_to_user_ptr(cs->in.chunks); 96 chunk_array_user = u64_to_user_ptr(cs->in.chunks);
95 if (copy_from_user(chunk_array, chunk_array_user, 97 if (copy_from_user(chunk_array, chunk_array_user,
@@ -737,8 +739,10 @@ static void amdgpu_cs_parser_fini(struct amdgpu_cs_parser *parser, int error,
737 739
738 dma_fence_put(parser->fence); 740 dma_fence_put(parser->fence);
739 741
740 if (parser->ctx) 742 if (parser->ctx) {
743 mutex_unlock(&parser->ctx->lock);
741 amdgpu_ctx_put(parser->ctx); 744 amdgpu_ctx_put(parser->ctx);
745 }
742 if (parser->bo_list) 746 if (parser->bo_list)
743 amdgpu_bo_list_put(parser->bo_list); 747 amdgpu_bo_list_put(parser->bo_list);
744 748
@@ -895,9 +899,7 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev,
895 r = amdgpu_ring_parse_cs(ring, p, j); 899 r = amdgpu_ring_parse_cs(ring, p, j);
896 if (r) 900 if (r)
897 return r; 901 return r;
898
899 } 902 }
900
901 j++; 903 j++;
902 } 904 }
903 905
@@ -985,7 +987,7 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev,
985 parser->job->ring->funcs->type == AMDGPU_RING_TYPE_VCE)) 987 parser->job->ring->funcs->type == AMDGPU_RING_TYPE_VCE))
986 return -EINVAL; 988 return -EINVAL;
987 989
988 return 0; 990 return amdgpu_ctx_wait_prev_fence(parser->ctx, parser->job->ring->idx);
989} 991}
990 992
991static int amdgpu_cs_process_fence_dep(struct amdgpu_cs_parser *p, 993static int amdgpu_cs_process_fence_dep(struct amdgpu_cs_parser *p,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index a78b03f65c69..4309820658c4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -67,6 +67,8 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev,
67 if (!ctx->fences) 67 if (!ctx->fences)
68 return -ENOMEM; 68 return -ENOMEM;
69 69
70 mutex_init(&ctx->lock);
71
70 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { 72 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
71 ctx->rings[i].sequence = 1; 73 ctx->rings[i].sequence = 1;
72 ctx->rings[i].fences = &ctx->fences[amdgpu_sched_jobs * i]; 74 ctx->rings[i].fences = &ctx->fences[amdgpu_sched_jobs * i];
@@ -126,6 +128,8 @@ static void amdgpu_ctx_fini(struct amdgpu_ctx *ctx)
126 &ctx->rings[i].entity); 128 &ctx->rings[i].entity);
127 129
128 amdgpu_queue_mgr_fini(adev, &ctx->queue_mgr); 130 amdgpu_queue_mgr_fini(adev, &ctx->queue_mgr);
131
132 mutex_destroy(&ctx->lock);
129} 133}
130 134
131static int amdgpu_ctx_alloc(struct amdgpu_device *adev, 135static int amdgpu_ctx_alloc(struct amdgpu_device *adev,
@@ -296,12 +300,8 @@ int amdgpu_ctx_add_fence(struct amdgpu_ctx *ctx, struct amdgpu_ring *ring,
296 300
297 idx = seq & (amdgpu_sched_jobs - 1); 301 idx = seq & (amdgpu_sched_jobs - 1);
298 other = cring->fences[idx]; 302 other = cring->fences[idx];
299 if (other) { 303 if (other)
300 signed long r; 304 BUG_ON(!dma_fence_is_signaled(other));
301 r = dma_fence_wait_timeout(other, true, MAX_SCHEDULE_TIMEOUT);
302 if (r < 0)
303 return r;
304 }
305 305
306 dma_fence_get(fence); 306 dma_fence_get(fence);
307 307
@@ -372,6 +372,24 @@ void amdgpu_ctx_priority_override(struct amdgpu_ctx *ctx,
372 } 372 }
373} 373}
374 374
375int amdgpu_ctx_wait_prev_fence(struct amdgpu_ctx *ctx, unsigned ring_id)
376{
377 struct amdgpu_ctx_ring *cring = &ctx->rings[ring_id];
378 unsigned idx = cring->sequence & (amdgpu_sched_jobs - 1);
379 struct dma_fence *other = cring->fences[idx];
380
381 if (other) {
382 signed long r;
383 r = dma_fence_wait_timeout(other, false, MAX_SCHEDULE_TIMEOUT);
384 if (r < 0) {
385 DRM_ERROR("Error (%ld) waiting for fence!\n", r);
386 return r;
387 }
388 }
389
390 return 0;
391}
392
375void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr) 393void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr)
376{ 394{
377 mutex_init(&mgr->lock); 395 mutex_init(&mgr->lock);