drm/i915/icl: Don't set pipe CSC/Gamma in PLANE_COLOR_CTL

These fields have been deprecated and moved in ICL+. Stop setting the
bits.

They have moved to GAMMA_MODE and CSC_MODE, respectively. This patch
is just to stop incorrectly setting bits in PLANE_COLOR_CTL while
we're waiting for the new replacement functionality to be done.

v2: Drop useless comment, and change !(GEN >= 11) to (GEN < 11). (Ville)

v3: No changes

v4 (from Paulo): Rebase.

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180328215803.13835-2-paulo.r.zanoni@intel.com

2 files changed, 8 insertions, 4 deletions

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 391825ae2361..8c322ff1c3e4 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6407,9 +6407,9 @@ enum {
 #define _PLANE_COLOR_CTL_1_A                    0x701CC /* GLK+ */
 #define _PLANE_COLOR_CTL_2_A                    0x702CC /* GLK+ */
 #define _PLANE_COLOR_CTL_3_A                    0x703CC /* GLK+ */
-#define   PLANE_COLOR_PIPE_GAMMA_ENABLE         (1 << 30)
+#define   PLANE_COLOR_PIPE_GAMMA_ENABLE         (1 << 30) /* Pre-ICL */
 #define   PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE      (1 << 28)
-#define   PLANE_COLOR_PIPE_CSC_ENABLE           (1 << 23)
+#define   PLANE_COLOR_PIPE_CSC_ENABLE           (1 << 23) /* Pre-ICL */
 #define   PLANE_COLOR_CSC_MODE_BYPASS                   (0 << 17)
 #define   PLANE_COLOR_CSC_MODE_YUV601_TO_RGB709         (1 << 17)
 #define   PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709         (2 << 17)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 687e70110800..efa8822f63d1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3623,11 +3623,15 @@ u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
 u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state,
                         const struct intel_plane_state *plane_state)
 {
+        struct drm_i915_private *dev_priv =
+                to_i915(plane_state->base.plane->dev);
         const struct drm_framebuffer *fb = plane_state->base.fb;
         u32 plane_color_ctl = 0;
 
-        plane_color_ctl |= PLANE_COLOR_PIPE_GAMMA_ENABLE;
-        plane_color_ctl |= PLANE_COLOR_PIPE_CSC_ENABLE;
+        if (INTEL_GEN(dev_priv) < 11) {
+                plane_color_ctl |= PLANE_COLOR_PIPE_GAMMA_ENABLE;
+                plane_color_ctl |= PLANE_COLOR_PIPE_CSC_ENABLE;
+        }
         plane_color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE;
         plane_color_ctl |= glk_plane_color_ctl_alpha(fb->format->format);