OMAPDSS: Features: Maintain dss_feats as a list

The number of dss_feat_id members has increased to a large value, the current
way of assigning a subset of these features (for a particular OMAP) as a mask
is no longer feasible.

Maintain the subset of features supported as lists. Make the function
dss_has_feature() traverse through this list.

Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>

1 files changed, 27 insertions, 27 deletions

diff --git a/drivers/video/omap2/dss/dss_features.h b/drivers/video/omap2/dss/dss_features.h
index 5f9b82156778..682f091cf02e 100644
--- a/drivers/video/omap2/dss/dss_features.h
+++ b/drivers/video/omap2/dss/dss_features.h
@@ -31,36 +31,36 @@
 
 /* DSS has feature id */
 enum dss_feat_id {
-        FEAT_LCDENABLEPOL               = 1 << 3,
-        FEAT_LCDENABLESIGNAL            = 1 << 4,
-        FEAT_PCKFREEENABLE              = 1 << 5,
-        FEAT_FUNCGATED                  = 1 << 6,
-        FEAT_MGR_LCD2                   = 1 << 7,
-        FEAT_LINEBUFFERSPLIT            = 1 << 8,
-        FEAT_ROWREPEATENABLE            = 1 << 9,
-        FEAT_RESIZECONF                 = 1 << 10,
+        FEAT_LCDENABLEPOL,
+        FEAT_LCDENABLESIGNAL,
+        FEAT_PCKFREEENABLE,
+        FEAT_FUNCGATED,
+        FEAT_MGR_LCD2,
+        FEAT_LINEBUFFERSPLIT,
+        FEAT_ROWREPEATENABLE,
+        FEAT_RESIZECONF,
         /* Independent core clk divider */
-        FEAT_CORE_CLK_DIV               = 1 << 11,
-        FEAT_LCD_CLK_SRC                = 1 << 12,
+        FEAT_CORE_CLK_DIV,
+        FEAT_LCD_CLK_SRC,
         /* DSI-PLL power command 0x3 is not working */
-        FEAT_DSI_PLL_PWR_BUG            = 1 << 13,
-        FEAT_DSI_PLL_FREQSEL            = 1 << 14,
-        FEAT_DSI_DCS_CMD_CONFIG_VC      = 1 << 15,
-        FEAT_DSI_VC_OCP_WIDTH           = 1 << 16,
-        FEAT_DSI_REVERSE_TXCLKESC       = 1 << 17,
-        FEAT_DSI_GNQ                    = 1 << 18,
-        FEAT_HDMI_CTS_SWMODE            = 1 << 19,
-        FEAT_HANDLE_UV_SEPARATE         = 1 << 20,
-        FEAT_ATTR2                      = 1 << 21,
-        FEAT_VENC_REQUIRES_TV_DAC_CLK   = 1 << 22,
-        FEAT_CPR                        = 1 << 23,
-        FEAT_PRELOAD                    = 1 << 24,
-        FEAT_FIR_COEF_V                 = 1 << 25,
-        FEAT_ALPHA_FIXED_ZORDER         = 1 << 26,
-        FEAT_ALPHA_FREE_ZORDER          = 1 << 27,
-        FEAT_FIFO_MERGE                 = 1 << 28,
+        FEAT_DSI_PLL_PWR_BUG,
+        FEAT_DSI_PLL_FREQSEL,
+        FEAT_DSI_DCS_CMD_CONFIG_VC,
+        FEAT_DSI_VC_OCP_WIDTH,
+        FEAT_DSI_REVERSE_TXCLKESC,
+        FEAT_DSI_GNQ,
+        FEAT_HDMI_CTS_SWMODE,
+        FEAT_HANDLE_UV_SEPARATE,
+        FEAT_ATTR2,
+        FEAT_VENC_REQUIRES_TV_DAC_CLK,
+        FEAT_CPR,
+        FEAT_PRELOAD,
+        FEAT_FIR_COEF_V,
+        FEAT_ALPHA_FIXED_ZORDER,
+        FEAT_ALPHA_FREE_ZORDER,
+        FEAT_FIFO_MERGE,
         /* An unknown HW bug causing the normal FIFO thresholds not to work */
-        FEAT_OMAP3_DSI_FIFO_BUG         = 1 << 29,
+        FEAT_OMAP3_DSI_FIFO_BUG,
 };
 
 /* DSS register field id */