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authorLinus Torvalds <torvalds@linux-foundation.org>2016-01-18 14:58:31 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2016-01-18 14:58:31 -0500
commitd43fb9f3c5dff281dd72bea5cd2e91386fdc33a8 (patch)
tree4f3f2b00629b2df1ce4f02684689ccaa4b434854 /drivers/video/fbdev
parent5807fcaa9bf7dd87241df739161c119cf78a6bc4 (diff)
parent6f6abd360603aff043352db90c28748c8c46560e (diff)
Merge tag 'fbdev-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux
Pull fbdev updates from Tomi Valkeinen: "Summary: - pxafb: device-tree support - An unsafe kernel parameter 'lockless_register_fb' for debugging problems happening while inside the console lock - Small miscellaneous fixes & cleanups - omapdss: add writeback support functions - Separation of omapfb and omapdrm (see below) About the separation of omapfb and omapdrm, see http://permalink.gmane.org/gmane.comp.video.dri.devel/143151 for longer story. The short version: omapfb and omapdrm have shared low level drivers (omapdss and panel drivers), making further development of omapdrm difficult. After these patches omapfb and omapdrm have their own versions of the drivers, which are more or less direct copies for now but will diverge soon. This also means that omapfb (everything under drivers/video/fbdev/omap2/) is now in maintenance mode, and all new development will be done for omapdrm (drivers/gpu/drm/omapdrm/)" * tag 'fbdev-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: (49 commits) video: fbdev: pxafb: fix out of memory error path drm/omap: make omapdrm select OMAP2_DSS drm/omap: move omapdss & displays under omapdrm omapfb: move vrfb into omapfb omapfb: take omapfb's private omapdss into use omapfb/displays: change CONFIG_DISPLAY_* to CONFIG_FB_OMAP2_* omapfb/dss: change CONFIG_OMAP* to CONFIG_FB_OMAP* omapdss: remove CONFIG_OMAP2_DSS_VENC from omapdss.h omapfb: copy omapdss & displays for omapfb omapfb: allow compilation only if DRM_OMAP is disabled fbdev: omap2: panel-dpi: simplify gpio setting fbdev: omap2: panel-dpi: in .disable first disable backlight then display OMAPDSS: DSS: fix a warning message video: omapdss: delete unneeded of_node_put OMAPDSS: DISPC: Remove boolean comparisons OMAPDSS: DSI: cleanup DSI_IRQ_ERROR_MASK define OMAPDSS: remove extra out == NULL checks OMAPDSS: change internal dispc functions to static OMAPDSS: make a two dss feat funcs internal to omapdss OMAPDSS: remove extra EXPORT_SYMBOLs ...
Diffstat (limited to 'drivers/video/fbdev')
-rw-r--r--drivers/video/fbdev/Kconfig17
-rw-r--r--drivers/video/fbdev/Makefile1
-rw-r--r--drivers/video/fbdev/auo_k190x.c11
-rw-r--r--drivers/video/fbdev/core/Makefile2
-rw-r--r--drivers/video/fbdev/core/fbmem.c14
-rw-r--r--drivers/video/fbdev/geode/display_gx1.c2
-rw-r--r--drivers/video/fbdev/geode/display_gx1.h2
-rw-r--r--drivers/video/fbdev/geode/geodefb.h4
-rw-r--r--drivers/video/fbdev/geode/video_cs5530.c2
-rw-r--r--drivers/video/fbdev/geode/video_cs5530.h2
-rw-r--r--drivers/video/fbdev/i740fb.c8
-rw-r--r--drivers/video/fbdev/omap2/Kconfig5
-rw-r--r--drivers/video/fbdev/omap2/Makefile6
-rw-r--r--drivers/video/fbdev/omap2/displays-new/Makefile14
-rw-r--r--drivers/video/fbdev/omap2/dss/Makefile18
-rw-r--r--drivers/video/fbdev/omap2/omapfb/Kconfig14
-rw-r--r--drivers/video/fbdev/omap2/omapfb/Makefile3
-rw-r--r--drivers/video/fbdev/omap2/omapfb/displays/Kconfig (renamed from drivers/video/fbdev/omap2/displays-new/Kconfig)32
-rw-r--r--drivers/video/fbdev/omap2/omapfb/displays/Makefile14
-rw-r--r--drivers/video/fbdev/omap2/omapfb/displays/connector-analog-tv.c (renamed from drivers/video/fbdev/omap2/displays-new/connector-analog-tv.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/displays/connector-dvi.c (renamed from drivers/video/fbdev/omap2/displays-new/connector-dvi.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/displays/connector-hdmi.c (renamed from drivers/video/fbdev/omap2/displays-new/connector-hdmi.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/displays/encoder-opa362.c (renamed from drivers/video/fbdev/omap2/displays-new/encoder-opa362.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/displays/encoder-tfp410.c (renamed from drivers/video/fbdev/omap2/displays-new/encoder-tfp410.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/displays/encoder-tpd12s015.c (renamed from drivers/video/fbdev/omap2/displays-new/encoder-tpd12s015.c)117
-rw-r--r--drivers/video/fbdev/omap2/omapfb/displays/panel-dpi.c (renamed from drivers/video/fbdev/omap2/displays-new/panel-dpi.c)8
-rw-r--r--drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c (renamed from drivers/video/fbdev/omap2/displays-new/panel-dsi-cm.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/displays/panel-lgphilips-lb035q02.c (renamed from drivers/video/fbdev/omap2/displays-new/panel-lgphilips-lb035q02.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/displays/panel-nec-nl8048hl11.c (renamed from drivers/video/fbdev/omap2/displays-new/panel-nec-nl8048hl11.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/displays/panel-sharp-ls037v7dw01.c (renamed from drivers/video/fbdev/omap2/displays-new/panel-sharp-ls037v7dw01.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c (renamed from drivers/video/fbdev/omap2/displays-new/panel-sony-acx565akm.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c (renamed from drivers/video/fbdev/omap2/displays-new/panel-tpo-td028ttec1.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td043mtea1.c (renamed from drivers/video/fbdev/omap2/displays-new/panel-tpo-td043mtea1.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/Kconfig (renamed from drivers/video/fbdev/omap2/dss/Kconfig)46
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/Makefile18
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/apply.c (renamed from drivers/video/fbdev/omap2/dss/apply.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/core.c (renamed from drivers/video/fbdev/omap2/dss/core.c)34
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/dispc-compat.c (renamed from drivers/video/fbdev/omap2/dss/dispc-compat.c)14
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/dispc-compat.h (renamed from drivers/video/fbdev/omap2/dss/dispc-compat.h)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/dispc.c (renamed from drivers/video/fbdev/omap2/dss/dispc.c)167
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/dispc.h (renamed from drivers/video/fbdev/omap2/dss/dispc.h)2
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/dispc_coefs.c (renamed from drivers/video/fbdev/omap2/dss/dispc_coefs.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/display-sysfs.c (renamed from drivers/video/fbdev/omap2/dss/display-sysfs.c)2
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/display.c (renamed from drivers/video/fbdev/omap2/dss/display.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/dpi.c (renamed from drivers/video/fbdev/omap2/dss/dpi.c)2
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/dsi.c (renamed from drivers/video/fbdev/omap2/dss/dsi.c)14
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/dss-of.c (renamed from drivers/video/fbdev/omap2/dss/dss-of.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/dss.c (renamed from drivers/video/fbdev/omap2/dss/dss.c)12
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/dss.h (renamed from drivers/video/fbdev/omap2/dss/dss.h)18
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/dss_features.c (renamed from drivers/video/fbdev/omap2/dss/dss_features.c)11
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/dss_features.h (renamed from drivers/video/fbdev/omap2/dss/dss_features.h)5
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/hdmi.h (renamed from drivers/video/fbdev/omap2/dss/hdmi.h)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c (renamed from drivers/video/fbdev/omap2/dss/hdmi4.c)2
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c (renamed from drivers/video/fbdev/omap2/dss/hdmi4_core.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.h (renamed from drivers/video/fbdev/omap2/dss/hdmi4_core.h)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c (renamed from drivers/video/fbdev/omap2/dss/hdmi5.c)2
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c (renamed from drivers/video/fbdev/omap2/dss/hdmi5_core.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.h (renamed from drivers/video/fbdev/omap2/dss/hdmi5_core.h)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/hdmi_common.c (renamed from drivers/video/fbdev/omap2/dss/hdmi_common.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/hdmi_phy.c (renamed from drivers/video/fbdev/omap2/dss/hdmi_phy.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/hdmi_pll.c (renamed from drivers/video/fbdev/omap2/dss/hdmi_pll.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c (renamed from drivers/video/fbdev/omap2/dss/hdmi_wp.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/manager-sysfs.c (renamed from drivers/video/fbdev/omap2/dss/manager-sysfs.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/manager.c (renamed from drivers/video/fbdev/omap2/dss/manager.c)2
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/omapdss-boot-init.c (renamed from drivers/video/fbdev/omap2/dss/omapdss-boot-init.c)4
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/output.c (renamed from drivers/video/fbdev/omap2/dss/output.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/overlay-sysfs.c (renamed from drivers/video/fbdev/omap2/dss/overlay-sysfs.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/overlay.c (renamed from drivers/video/fbdev/omap2/dss/overlay.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/pll.c (renamed from drivers/video/fbdev/omap2/dss/pll.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/rfbi.c (renamed from drivers/video/fbdev/omap2/dss/rfbi.c)2
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/sdi.c (renamed from drivers/video/fbdev/omap2/dss/sdi.c)2
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/venc.c (renamed from drivers/video/fbdev/omap2/dss/venc.c)16
-rw-r--r--drivers/video/fbdev/omap2/omapfb/dss/video-pll.c (renamed from drivers/video/fbdev/omap2/dss/video-pll.c)0
-rw-r--r--drivers/video/fbdev/omap2/omapfb/vrfb.c (renamed from drivers/video/fbdev/omap2/vrfb.c)0
-rw-r--r--drivers/video/fbdev/pxafb.c210
-rw-r--r--drivers/video/fbdev/pxafb.h2
-rw-r--r--drivers/video/fbdev/riva/fbdev.c1
-rw-r--r--drivers/video/fbdev/sh_mobile_hdmi.c1489
-rw-r--r--drivers/video/fbdev/simplefb.c120
-rw-r--r--drivers/video/fbdev/sm712fb.c16
80 files changed, 664 insertions, 1845 deletions
diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig
index e6d16d65e4e6..8ea45a5cd806 100644
--- a/drivers/video/fbdev/Kconfig
+++ b/drivers/video/fbdev/Kconfig
@@ -5,6 +5,7 @@
5menuconfig FB 5menuconfig FB
6 tristate "Support for frame buffer devices" 6 tristate "Support for frame buffer devices"
7 select FB_CMDLINE 7 select FB_CMDLINE
8 select FB_NOTIFY
8 ---help--- 9 ---help---
9 The frame buffer device provides an abstraction for the graphics 10 The frame buffer device provides an abstraction for the graphics
10 hardware. It represents the frame buffer of some video hardware and 11 hardware. It represents the frame buffer of some video hardware and
@@ -56,6 +57,9 @@ config FIRMWARE_EDID
56config FB_CMDLINE 57config FB_CMDLINE
57 bool 58 bool
58 59
60config FB_NOTIFY
61 bool
62
59config FB_DDC 63config FB_DDC
60 tristate 64 tristate
61 depends on FB 65 depends on FB
@@ -1506,6 +1510,7 @@ config FB_SIS
1506 select FB_CFB_COPYAREA 1510 select FB_CFB_COPYAREA
1507 select FB_CFB_IMAGEBLIT 1511 select FB_CFB_IMAGEBLIT
1508 select FB_BOOT_VESA_SUPPORT if FB_SIS = y 1512 select FB_BOOT_VESA_SUPPORT if FB_SIS = y
1513 select FB_SIS_300 if !FB_SIS_315
1509 help 1514 help
1510 This is the frame buffer device driver for the SiS 300, 315, 330 1515 This is the frame buffer device driver for the SiS 300, 315, 330
1511 and 340 series as well as XGI V3XT, V5, V8, Z7 graphics chipsets. 1516 and 340 series as well as XGI V3XT, V5, V8, Z7 graphics chipsets.
@@ -1880,6 +1885,8 @@ config FB_PXA
1880 select FB_CFB_FILLRECT 1885 select FB_CFB_FILLRECT
1881 select FB_CFB_COPYAREA 1886 select FB_CFB_COPYAREA
1882 select FB_CFB_IMAGEBLIT 1887 select FB_CFB_IMAGEBLIT
1888 select VIDEOMODE_HELPERS if OF
1889 select FB_MODE_HELPERS if OF
1883 ---help--- 1890 ---help---
1884 Frame buffer driver for the built-in LCD controller in the Intel 1891 Frame buffer driver for the built-in LCD controller in the Intel
1885 PXA2x0 processor. 1892 PXA2x0 processor.
@@ -1990,16 +1997,6 @@ config FB_SH_MOBILE_LCDC
1990 ---help--- 1997 ---help---
1991 Frame buffer driver for the on-chip SH-Mobile LCD controller. 1998 Frame buffer driver for the on-chip SH-Mobile LCD controller.
1992 1999
1993config FB_SH_MOBILE_HDMI
1994 tristate "SuperH Mobile HDMI controller support"
1995 depends on FB_SH_MOBILE_LCDC
1996 select FB_MODE_HELPERS
1997 select SOUND
1998 select SND
1999 select SND_SOC
2000 ---help---
2001 Driver for the on-chip SH-Mobile HDMI controller.
2002
2003config FB_TMIO 2000config FB_TMIO
2004 tristate "Toshiba Mobile IO FrameBuffer support" 2001 tristate "Toshiba Mobile IO FrameBuffer support"
2005 depends on FB && (MFD_TMIO || COMPILE_TEST) 2002 depends on FB && (MFD_TMIO || COMPILE_TEST)
diff --git a/drivers/video/fbdev/Makefile b/drivers/video/fbdev/Makefile
index 50ed1b4fc2bf..65fb15075c8f 100644
--- a/drivers/video/fbdev/Makefile
+++ b/drivers/video/fbdev/Makefile
@@ -118,7 +118,6 @@ obj-$(CONFIG_FB_UDL) += udlfb.o
118obj-$(CONFIG_FB_SMSCUFX) += smscufx.o 118obj-$(CONFIG_FB_SMSCUFX) += smscufx.o
119obj-$(CONFIG_FB_XILINX) += xilinxfb.o 119obj-$(CONFIG_FB_XILINX) += xilinxfb.o
120obj-$(CONFIG_SH_MIPI_DSI) += sh_mipi_dsi.o 120obj-$(CONFIG_SH_MIPI_DSI) += sh_mipi_dsi.o
121obj-$(CONFIG_FB_SH_MOBILE_HDMI) += sh_mobile_hdmi.o
122obj-$(CONFIG_FB_SH_MOBILE_MERAM) += sh_mobile_meram.o 121obj-$(CONFIG_FB_SH_MOBILE_MERAM) += sh_mobile_meram.o
123obj-$(CONFIG_FB_SH_MOBILE_LCDC) += sh_mobile_lcdcfb.o 122obj-$(CONFIG_FB_SH_MOBILE_LCDC) += sh_mobile_lcdcfb.o
124obj-$(CONFIG_FB_OMAP) += omap/ 123obj-$(CONFIG_FB_OMAP) += omap/
diff --git a/drivers/video/fbdev/auo_k190x.c b/drivers/video/fbdev/auo_k190x.c
index 8d2499d1cafb..9580374667ba 100644
--- a/drivers/video/fbdev/auo_k190x.c
+++ b/drivers/video/fbdev/auo_k190x.c
@@ -773,9 +773,7 @@ static void auok190x_recover(struct auok190xfb_par *par)
773/* 773/*
774 * Power-management 774 * Power-management
775 */ 775 */
776 776static int __maybe_unused auok190x_runtime_suspend(struct device *dev)
777#ifdef CONFIG_PM
778static int auok190x_runtime_suspend(struct device *dev)
779{ 777{
780 struct platform_device *pdev = to_platform_device(dev); 778 struct platform_device *pdev = to_platform_device(dev);
781 struct fb_info *info = platform_get_drvdata(pdev); 779 struct fb_info *info = platform_get_drvdata(pdev);
@@ -822,7 +820,7 @@ finish:
822 return 0; 820 return 0;
823} 821}
824 822
825static int auok190x_runtime_resume(struct device *dev) 823static int __maybe_unused auok190x_runtime_resume(struct device *dev)
826{ 824{
827 struct platform_device *pdev = to_platform_device(dev); 825 struct platform_device *pdev = to_platform_device(dev);
828 struct fb_info *info = platform_get_drvdata(pdev); 826 struct fb_info *info = platform_get_drvdata(pdev);
@@ -856,7 +854,7 @@ static int auok190x_runtime_resume(struct device *dev)
856 return 0; 854 return 0;
857} 855}
858 856
859static int auok190x_suspend(struct device *dev) 857static int __maybe_unused auok190x_suspend(struct device *dev)
860{ 858{
861 struct platform_device *pdev = to_platform_device(dev); 859 struct platform_device *pdev = to_platform_device(dev);
862 struct fb_info *info = platform_get_drvdata(pdev); 860 struct fb_info *info = platform_get_drvdata(pdev);
@@ -896,7 +894,7 @@ static int auok190x_suspend(struct device *dev)
896 return 0; 894 return 0;
897} 895}
898 896
899static int auok190x_resume(struct device *dev) 897static int __maybe_unused auok190x_resume(struct device *dev)
900{ 898{
901 struct platform_device *pdev = to_platform_device(dev); 899 struct platform_device *pdev = to_platform_device(dev);
902 struct fb_info *info = platform_get_drvdata(pdev); 900 struct fb_info *info = platform_get_drvdata(pdev);
@@ -933,7 +931,6 @@ static int auok190x_resume(struct device *dev)
933 931
934 return 0; 932 return 0;
935} 933}
936#endif
937 934
938const struct dev_pm_ops auok190x_pm = { 935const struct dev_pm_ops auok190x_pm = {
939 SET_RUNTIME_PM_OPS(auok190x_runtime_suspend, auok190x_runtime_resume, 936 SET_RUNTIME_PM_OPS(auok190x_runtime_suspend, auok190x_runtime_resume,
diff --git a/drivers/video/fbdev/core/Makefile b/drivers/video/fbdev/core/Makefile
index 23d86a8b7d7b..9e3ddf225393 100644
--- a/drivers/video/fbdev/core/Makefile
+++ b/drivers/video/fbdev/core/Makefile
@@ -1,5 +1,5 @@
1obj-y += fb_notify.o
2obj-$(CONFIG_FB_CMDLINE) += fb_cmdline.o 1obj-$(CONFIG_FB_CMDLINE) += fb_cmdline.o
2obj-$(CONFIG_FB_NOTIFY) += fb_notify.o
3obj-$(CONFIG_FB) += fb.o 3obj-$(CONFIG_FB) += fb.o
4fb-y := fbmem.o fbmon.o fbcmap.o fbsysfs.o \ 4fb-y := fbmem.o fbmon.o fbcmap.o fbsysfs.o \
5 modedb.o fbcvt.o 5 modedb.o fbcvt.o
diff --git a/drivers/video/fbdev/core/fbmem.c b/drivers/video/fbdev/core/fbmem.c
index 0705d8883ede..4e73b6f6b1c0 100644
--- a/drivers/video/fbdev/core/fbmem.c
+++ b/drivers/video/fbdev/core/fbmem.c
@@ -1608,6 +1608,11 @@ static int do_remove_conflicting_framebuffers(struct apertures_struct *a,
1608 return 0; 1608 return 0;
1609} 1609}
1610 1610
1611static bool lockless_register_fb;
1612module_param_named_unsafe(lockless_register_fb, lockless_register_fb, bool, 0400);
1613MODULE_PARM_DESC(lockless_register_fb,
1614 "Lockless framebuffer registration for debugging [default=off]");
1615
1611static int do_register_framebuffer(struct fb_info *fb_info) 1616static int do_register_framebuffer(struct fb_info *fb_info)
1612{ 1617{
1613 int i, ret; 1618 int i, ret;
@@ -1675,15 +1680,18 @@ static int do_register_framebuffer(struct fb_info *fb_info)
1675 registered_fb[i] = fb_info; 1680 registered_fb[i] = fb_info;
1676 1681
1677 event.info = fb_info; 1682 event.info = fb_info;
1678 console_lock(); 1683 if (!lockless_register_fb)
1684 console_lock();
1679 if (!lock_fb_info(fb_info)) { 1685 if (!lock_fb_info(fb_info)) {
1680 console_unlock(); 1686 if (!lockless_register_fb)
1687 console_unlock();
1681 return -ENODEV; 1688 return -ENODEV;
1682 } 1689 }
1683 1690
1684 fb_notifier_call_chain(FB_EVENT_FB_REGISTERED, &event); 1691 fb_notifier_call_chain(FB_EVENT_FB_REGISTERED, &event);
1685 unlock_fb_info(fb_info); 1692 unlock_fb_info(fb_info);
1686 console_unlock(); 1693 if (!lockless_register_fb)
1694 console_unlock();
1687 return 0; 1695 return 0;
1688} 1696}
1689 1697
diff --git a/drivers/video/fbdev/geode/display_gx1.c b/drivers/video/fbdev/geode/display_gx1.c
index 926d53eeb549..b383eb9882bf 100644
--- a/drivers/video/fbdev/geode/display_gx1.c
+++ b/drivers/video/fbdev/geode/display_gx1.c
@@ -208,7 +208,7 @@ static void gx1_set_hw_palette_reg(struct fb_info *info, unsigned regno,
208 writel(val, par->dc_regs + DC_PAL_DATA); 208 writel(val, par->dc_regs + DC_PAL_DATA);
209} 209}
210 210
211struct geode_dc_ops gx1_dc_ops = { 211const struct geode_dc_ops gx1_dc_ops = {
212 .set_mode = gx1_set_mode, 212 .set_mode = gx1_set_mode,
213 .set_palette_reg = gx1_set_hw_palette_reg, 213 .set_palette_reg = gx1_set_hw_palette_reg,
214}; 214};
diff --git a/drivers/video/fbdev/geode/display_gx1.h b/drivers/video/fbdev/geode/display_gx1.h
index 671c05558c79..e1cc41b343ca 100644
--- a/drivers/video/fbdev/geode/display_gx1.h
+++ b/drivers/video/fbdev/geode/display_gx1.h
@@ -18,7 +18,7 @@
18unsigned gx1_gx_base(void); 18unsigned gx1_gx_base(void);
19int gx1_frame_buffer_size(void); 19int gx1_frame_buffer_size(void);
20 20
21extern struct geode_dc_ops gx1_dc_ops; 21extern const struct geode_dc_ops gx1_dc_ops;
22 22
23/* GX1 configuration I/O registers */ 23/* GX1 configuration I/O registers */
24 24
diff --git a/drivers/video/fbdev/geode/geodefb.h b/drivers/video/fbdev/geode/geodefb.h
index ae04820e0c57..e2e07934868f 100644
--- a/drivers/video/fbdev/geode/geodefb.h
+++ b/drivers/video/fbdev/geode/geodefb.h
@@ -31,8 +31,8 @@ struct geodefb_par {
31 int panel_y; 31 int panel_y;
32 void __iomem *dc_regs; 32 void __iomem *dc_regs;
33 void __iomem *vid_regs; 33 void __iomem *vid_regs;
34 struct geode_dc_ops *dc_ops; 34 const struct geode_dc_ops *dc_ops;
35 struct geode_vid_ops *vid_ops; 35 const struct geode_vid_ops *vid_ops;
36}; 36};
37 37
38#endif /* !__GEODEFB_H__ */ 38#endif /* !__GEODEFB_H__ */
diff --git a/drivers/video/fbdev/geode/video_cs5530.c b/drivers/video/fbdev/geode/video_cs5530.c
index 649c3943d431..880613200ecf 100644
--- a/drivers/video/fbdev/geode/video_cs5530.c
+++ b/drivers/video/fbdev/geode/video_cs5530.c
@@ -186,7 +186,7 @@ static int cs5530_blank_display(struct fb_info *info, int blank_mode)
186 return 0; 186 return 0;
187} 187}
188 188
189struct geode_vid_ops cs5530_vid_ops = { 189const struct geode_vid_ops cs5530_vid_ops = {
190 .set_dclk = cs5530_set_dclk_frequency, 190 .set_dclk = cs5530_set_dclk_frequency,
191 .configure_display = cs5530_configure_display, 191 .configure_display = cs5530_configure_display,
192 .blank_display = cs5530_blank_display, 192 .blank_display = cs5530_blank_display,
diff --git a/drivers/video/fbdev/geode/video_cs5530.h b/drivers/video/fbdev/geode/video_cs5530.h
index 56cecca7f1ce..c843348bfa20 100644
--- a/drivers/video/fbdev/geode/video_cs5530.h
+++ b/drivers/video/fbdev/geode/video_cs5530.h
@@ -15,7 +15,7 @@
15#ifndef __VIDEO_CS5530_H__ 15#ifndef __VIDEO_CS5530_H__
16#define __VIDEO_CS5530_H__ 16#define __VIDEO_CS5530_H__
17 17
18extern struct geode_vid_ops cs5530_vid_ops; 18extern const struct geode_vid_ops cs5530_vid_ops;
19 19
20/* CS5530 Video device registers */ 20/* CS5530 Video device registers */
21 21
diff --git a/drivers/video/fbdev/i740fb.c b/drivers/video/fbdev/i740fb.c
index 452e1163ad02..cf5ccd0f2252 100644
--- a/drivers/video/fbdev/i740fb.c
+++ b/drivers/video/fbdev/i740fb.c
@@ -346,11 +346,10 @@ static void i740_calc_vclk(u32 freq, struct i740fb_par *par)
346 const u32 err_target = freq / (1000 * I740_RFREQ / I740_FFIX); 346 const u32 err_target = freq / (1000 * I740_RFREQ / I740_FFIX);
347 u32 err_best = 512 * I740_FFIX; 347 u32 err_best = 512 * I740_FFIX;
348 u32 f_err, f_vco; 348 u32 f_err, f_vco;
349 int m_best = 0, n_best = 0, p_best = 0, d_best = 0; 349 int m_best = 0, n_best = 0, p_best = 0;
350 int m, n; 350 int m, n;
351 351
352 p_best = min(15, ilog2(I740_MAX_VCO_FREQ / (freq / I740_RFREQ_FIX))); 352 p_best = min(15, ilog2(I740_MAX_VCO_FREQ / (freq / I740_RFREQ_FIX)));
353 d_best = 0;
354 f_vco = (freq * (1 << p_best)) / I740_RFREQ_FIX; 353 f_vco = (freq * (1 << p_best)) / I740_RFREQ_FIX;
355 freq = freq / I740_RFREQ_FIX; 354 freq = freq / I740_RFREQ_FIX;
356 355
@@ -363,7 +362,7 @@ static void i740_calc_vclk(u32 freq, struct i740fb_par *par)
363 m = 3; 362 m = 3;
364 363
365 { 364 {
366 u32 f_out = (((m * I740_REF_FREQ * (4 << 2 * d_best)) 365 u32 f_out = (((m * I740_REF_FREQ * 4)
367 / n) + ((1 << p_best) / 2)) / (1 << p_best); 366 / n) + ((1 << p_best) / 2)) / (1 << p_best);
368 367
369 f_err = (freq - f_out); 368 f_err = (freq - f_out);
@@ -386,8 +385,7 @@ static void i740_calc_vclk(u32 freq, struct i740fb_par *par)
386 par->video_clk2_n = (n_best - 2) & 0xFF; 385 par->video_clk2_n = (n_best - 2) & 0xFF;
387 par->video_clk2_mn_msbs = ((((n_best - 2) >> 4) & VCO_N_MSBS) 386 par->video_clk2_mn_msbs = ((((n_best - 2) >> 4) & VCO_N_MSBS)
388 | (((m_best - 2) >> 8) & VCO_M_MSBS)); 387 | (((m_best - 2) >> 8) & VCO_M_MSBS));
389 par->video_clk2_div_sel = 388 par->video_clk2_div_sel = ((p_best << 4) | REF_DIV_1);
390 ((p_best << 4) | (d_best ? 4 : 0) | REF_DIV_1);
391} 389}
392 390
393static int i740fb_decode_var(const struct fb_var_screeninfo *var, 391static int i740fb_decode_var(const struct fb_var_screeninfo *var,
diff --git a/drivers/video/fbdev/omap2/Kconfig b/drivers/video/fbdev/omap2/Kconfig
index c22955d2de9a..0921c4de8407 100644
--- a/drivers/video/fbdev/omap2/Kconfig
+++ b/drivers/video/fbdev/omap2/Kconfig
@@ -1,10 +1,5 @@
1config OMAP2_VRFB
2 bool
3
4if ARCH_OMAP2PLUS 1if ARCH_OMAP2PLUS
5 2
6source "drivers/video/fbdev/omap2/dss/Kconfig"
7source "drivers/video/fbdev/omap2/omapfb/Kconfig" 3source "drivers/video/fbdev/omap2/omapfb/Kconfig"
8source "drivers/video/fbdev/omap2/displays-new/Kconfig"
9 4
10endif 5endif
diff --git a/drivers/video/fbdev/omap2/Makefile b/drivers/video/fbdev/omap2/Makefile
index f8745ec369cc..71ab5ac91106 100644
--- a/drivers/video/fbdev/omap2/Makefile
+++ b/drivers/video/fbdev/omap2/Makefile
@@ -1,5 +1 @@
1obj-$(CONFIG_OMAP2_VRFB) += vrfb.o obj-y += omapfb/
2
3obj-y += dss/
4obj-y += displays-new/
5obj-$(CONFIG_FB_OMAP2) += omapfb/
diff --git a/drivers/video/fbdev/omap2/displays-new/Makefile b/drivers/video/fbdev/omap2/displays-new/Makefile
deleted file mode 100644
index 9aa176bfbf2e..000000000000
--- a/drivers/video/fbdev/omap2/displays-new/Makefile
+++ /dev/null
@@ -1,14 +0,0 @@
1obj-$(CONFIG_DISPLAY_ENCODER_OPA362) += encoder-opa362.o
2obj-$(CONFIG_DISPLAY_ENCODER_TFP410) += encoder-tfp410.o
3obj-$(CONFIG_DISPLAY_ENCODER_TPD12S015) += encoder-tpd12s015.o
4obj-$(CONFIG_DISPLAY_CONNECTOR_DVI) += connector-dvi.o
5obj-$(CONFIG_DISPLAY_CONNECTOR_HDMI) += connector-hdmi.o
6obj-$(CONFIG_DISPLAY_CONNECTOR_ANALOG_TV) += connector-analog-tv.o
7obj-$(CONFIG_DISPLAY_PANEL_DPI) += panel-dpi.o
8obj-$(CONFIG_DISPLAY_PANEL_DSI_CM) += panel-dsi-cm.o
9obj-$(CONFIG_DISPLAY_PANEL_SONY_ACX565AKM) += panel-sony-acx565akm.o
10obj-$(CONFIG_DISPLAY_PANEL_LGPHILIPS_LB035Q02) += panel-lgphilips-lb035q02.o
11obj-$(CONFIG_DISPLAY_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o
12obj-$(CONFIG_DISPLAY_PANEL_TPO_TD028TTEC1) += panel-tpo-td028ttec1.o
13obj-$(CONFIG_DISPLAY_PANEL_TPO_TD043MTEA1) += panel-tpo-td043mtea1.o
14obj-$(CONFIG_DISPLAY_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o
diff --git a/drivers/video/fbdev/omap2/dss/Makefile b/drivers/video/fbdev/omap2/dss/Makefile
deleted file mode 100644
index b5136d3d4b77..000000000000
--- a/drivers/video/fbdev/omap2/dss/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
1obj-$(CONFIG_OMAP2_DSS_INIT) += omapdss-boot-init.o
2obj-$(CONFIG_OMAP2_DSS) += omapdss.o
3# Core DSS files
4omapdss-y := core.o dss.o dss_features.o dispc.o dispc_coefs.o display.o \
5 output.o dss-of.o pll.o video-pll.o
6# DSS compat layer files
7omapdss-y += manager.o manager-sysfs.o overlay.o overlay-sysfs.o apply.o \
8 dispc-compat.o display-sysfs.o
9omapdss-$(CONFIG_OMAP2_DSS_DPI) += dpi.o
10omapdss-$(CONFIG_OMAP2_DSS_RFBI) += rfbi.o
11omapdss-$(CONFIG_OMAP2_DSS_VENC) += venc.o
12omapdss-$(CONFIG_OMAP2_DSS_SDI) += sdi.o
13omapdss-$(CONFIG_OMAP2_DSS_DSI) += dsi.o
14omapdss-$(CONFIG_OMAP2_DSS_HDMI_COMMON) += hdmi_common.o hdmi_wp.o hdmi_pll.o \
15 hdmi_phy.o
16omapdss-$(CONFIG_OMAP4_DSS_HDMI) += hdmi4.o hdmi4_core.o
17omapdss-$(CONFIG_OMAP5_DSS_HDMI) += hdmi5.o hdmi5_core.o
18ccflags-$(CONFIG_OMAP2_DSS_DEBUG) += -DDEBUG
diff --git a/drivers/video/fbdev/omap2/omapfb/Kconfig b/drivers/video/fbdev/omap2/omapfb/Kconfig
index 4cb12ce68855..e6226aeed17e 100644
--- a/drivers/video/fbdev/omap2/omapfb/Kconfig
+++ b/drivers/video/fbdev/omap2/omapfb/Kconfig
@@ -1,7 +1,12 @@
1config OMAP2_VRFB
2 bool
3
1menuconfig FB_OMAP2 4menuconfig FB_OMAP2
2 tristate "OMAP2+ frame buffer support" 5 tristate "OMAP2+ frame buffer support"
3 depends on FB && OMAP2_DSS && !DRM_OMAP 6 depends on FB
7 depends on DRM_OMAP = n
4 8
9 select FB_OMAP2_DSS
5 select OMAP2_VRFB if ARCH_OMAP2 || ARCH_OMAP3 10 select OMAP2_VRFB if ARCH_OMAP2 || ARCH_OMAP3
6 select FB_CFB_FILLRECT 11 select FB_CFB_FILLRECT
7 select FB_CFB_COPYAREA 12 select FB_CFB_COPYAREA
@@ -9,6 +14,8 @@ menuconfig FB_OMAP2
9 help 14 help
10 Frame buffer driver for OMAP2+ based boards. 15 Frame buffer driver for OMAP2+ based boards.
11 16
17if FB_OMAP2
18
12config FB_OMAP2_DEBUG_SUPPORT 19config FB_OMAP2_DEBUG_SUPPORT
13 bool "Debug support for OMAP2+ FB" 20 bool "Debug support for OMAP2+ FB"
14 default y 21 default y
@@ -25,3 +32,8 @@ config FB_OMAP2_NUM_FBS
25 help 32 help
26 Select the number of framebuffers created. OMAP2/3 has 3 overlays 33 Select the number of framebuffers created. OMAP2/3 has 3 overlays
27 so normally this would be 3. 34 so normally this would be 3.
35
36source "drivers/video/fbdev/omap2/omapfb/dss/Kconfig"
37source "drivers/video/fbdev/omap2/omapfb/displays/Kconfig"
38
39endif
diff --git a/drivers/video/fbdev/omap2/omapfb/Makefile b/drivers/video/fbdev/omap2/omapfb/Makefile
index 51c2e00d9bf8..ad68ecf141af 100644
--- a/drivers/video/fbdev/omap2/omapfb/Makefile
+++ b/drivers/video/fbdev/omap2/omapfb/Makefile
@@ -1,2 +1,5 @@
1obj-$(CONFIG_OMAP2_VRFB) += vrfb.o
2obj-y += dss/
3obj-y += displays/
1obj-$(CONFIG_FB_OMAP2) += omapfb.o 4obj-$(CONFIG_FB_OMAP2) += omapfb.o
2omapfb-y := omapfb-main.o omapfb-sysfs.o omapfb-ioctl.o 5omapfb-y := omapfb-main.o omapfb-sysfs.o omapfb-ioctl.o
diff --git a/drivers/video/fbdev/omap2/displays-new/Kconfig b/drivers/video/fbdev/omap2/omapfb/displays/Kconfig
index 574710141a61..08f12039dd02 100644
--- a/drivers/video/fbdev/omap2/displays-new/Kconfig
+++ b/drivers/video/fbdev/omap2/omapfb/displays/Kconfig
@@ -1,81 +1,81 @@
1menu "OMAP Display Device Drivers (new device model)" 1menu "OMAPFB Panel and Encoder Drivers"
2 depends on OMAP2_DSS 2 depends on FB_OMAP2_DSS
3 3
4config DISPLAY_ENCODER_OPA362 4config FB_OMAP2_ENCODER_OPA362
5 tristate "OPA362 external analog amplifier" 5 tristate "OPA362 external analog amplifier"
6 help 6 help
7 Driver for OPA362 external analog TV amplifier controlled 7 Driver for OPA362 external analog TV amplifier controlled
8 through a GPIO. 8 through a GPIO.
9 9
10config DISPLAY_ENCODER_TFP410 10config FB_OMAP2_ENCODER_TFP410
11 tristate "TFP410 DPI to DVI Encoder" 11 tristate "TFP410 DPI to DVI Encoder"
12 help 12 help
13 Driver for TFP410 DPI to DVI encoder. 13 Driver for TFP410 DPI to DVI encoder.
14 14
15config DISPLAY_ENCODER_TPD12S015 15config FB_OMAP2_ENCODER_TPD12S015
16 tristate "TPD12S015 HDMI ESD protection and level shifter" 16 tristate "TPD12S015 HDMI ESD protection and level shifter"
17 help 17 help
18 Driver for TPD12S015, which offers HDMI ESD protection and level 18 Driver for TPD12S015, which offers HDMI ESD protection and level
19 shifting. 19 shifting.
20 20
21config DISPLAY_CONNECTOR_DVI 21config FB_OMAP2_CONNECTOR_DVI
22 tristate "DVI Connector" 22 tristate "DVI Connector"
23 depends on I2C 23 depends on I2C
24 help 24 help
25 Driver for a generic DVI connector. 25 Driver for a generic DVI connector.
26 26
27config DISPLAY_CONNECTOR_HDMI 27config FB_OMAP2_CONNECTOR_HDMI
28 tristate "HDMI Connector" 28 tristate "HDMI Connector"
29 help 29 help
30 Driver for a generic HDMI connector. 30 Driver for a generic HDMI connector.
31 31
32config DISPLAY_CONNECTOR_ANALOG_TV 32config FB_OMAP2_CONNECTOR_ANALOG_TV
33 tristate "Analog TV Connector" 33 tristate "Analog TV Connector"
34 help 34 help
35 Driver for a generic analog TV connector. 35 Driver for a generic analog TV connector.
36 36
37config DISPLAY_PANEL_DPI 37config FB_OMAP2_PANEL_DPI
38 tristate "Generic DPI panel" 38 tristate "Generic DPI panel"
39 help 39 help
40 Driver for generic DPI panels. 40 Driver for generic DPI panels.
41 41
42config DISPLAY_PANEL_DSI_CM 42config FB_OMAP2_PANEL_DSI_CM
43 tristate "Generic DSI Command Mode Panel" 43 tristate "Generic DSI Command Mode Panel"
44 depends on BACKLIGHT_CLASS_DEVICE 44 depends on BACKLIGHT_CLASS_DEVICE
45 help 45 help
46 Driver for generic DSI command mode panels. 46 Driver for generic DSI command mode panels.
47 47
48config DISPLAY_PANEL_SONY_ACX565AKM 48config FB_OMAP2_PANEL_SONY_ACX565AKM
49 tristate "ACX565AKM Panel" 49 tristate "ACX565AKM Panel"
50 depends on SPI && BACKLIGHT_CLASS_DEVICE 50 depends on SPI && BACKLIGHT_CLASS_DEVICE
51 help 51 help
52 This is the LCD panel used on Nokia N900 52 This is the LCD panel used on Nokia N900
53 53
54config DISPLAY_PANEL_LGPHILIPS_LB035Q02 54config FB_OMAP2_PANEL_LGPHILIPS_LB035Q02
55 tristate "LG.Philips LB035Q02 LCD Panel" 55 tristate "LG.Philips LB035Q02 LCD Panel"
56 depends on SPI 56 depends on SPI
57 help 57 help
58 LCD Panel used on the Gumstix Overo Palo35 58 LCD Panel used on the Gumstix Overo Palo35
59 59
60config DISPLAY_PANEL_SHARP_LS037V7DW01 60config FB_OMAP2_PANEL_SHARP_LS037V7DW01
61 tristate "Sharp LS037V7DW01 LCD Panel" 61 tristate "Sharp LS037V7DW01 LCD Panel"
62 depends on BACKLIGHT_CLASS_DEVICE 62 depends on BACKLIGHT_CLASS_DEVICE
63 help 63 help
64 LCD Panel used in TI's SDP3430 and EVM boards 64 LCD Panel used in TI's SDP3430 and EVM boards
65 65
66config DISPLAY_PANEL_TPO_TD028TTEC1 66config FB_OMAP2_PANEL_TPO_TD028TTEC1
67 tristate "TPO TD028TTEC1 LCD Panel" 67 tristate "TPO TD028TTEC1 LCD Panel"
68 depends on SPI 68 depends on SPI
69 help 69 help
70 LCD panel used in Openmoko. 70 LCD panel used in Openmoko.
71 71
72config DISPLAY_PANEL_TPO_TD043MTEA1 72config FB_OMAP2_PANEL_TPO_TD043MTEA1
73 tristate "TPO TD043MTEA1 LCD Panel" 73 tristate "TPO TD043MTEA1 LCD Panel"
74 depends on SPI 74 depends on SPI
75 help 75 help
76 LCD Panel used in OMAP3 Pandora 76 LCD Panel used in OMAP3 Pandora
77 77
78config DISPLAY_PANEL_NEC_NL8048HL11 78config FB_OMAP2_PANEL_NEC_NL8048HL11
79 tristate "NEC NL8048HL11 Panel" 79 tristate "NEC NL8048HL11 Panel"
80 depends on SPI 80 depends on SPI
81 depends on BACKLIGHT_CLASS_DEVICE 81 depends on BACKLIGHT_CLASS_DEVICE
diff --git a/drivers/video/fbdev/omap2/omapfb/displays/Makefile b/drivers/video/fbdev/omap2/omapfb/displays/Makefile
new file mode 100644
index 000000000000..4f7459272256
--- /dev/null
+++ b/drivers/video/fbdev/omap2/omapfb/displays/Makefile
@@ -0,0 +1,14 @@
1obj-$(CONFIG_FB_OMAP2_ENCODER_OPA362) += encoder-opa362.o
2obj-$(CONFIG_FB_OMAP2_ENCODER_TFP410) += encoder-tfp410.o
3obj-$(CONFIG_FB_OMAP2_ENCODER_TPD12S015) += encoder-tpd12s015.o
4obj-$(CONFIG_FB_OMAP2_CONNECTOR_DVI) += connector-dvi.o
5obj-$(CONFIG_FB_OMAP2_CONNECTOR_HDMI) += connector-hdmi.o
6obj-$(CONFIG_FB_OMAP2_CONNECTOR_ANALOG_TV) += connector-analog-tv.o
7obj-$(CONFIG_FB_OMAP2_PANEL_DPI) += panel-dpi.o
8obj-$(CONFIG_FB_OMAP2_PANEL_DSI_CM) += panel-dsi-cm.o
9obj-$(CONFIG_FB_OMAP2_PANEL_SONY_ACX565AKM) += panel-sony-acx565akm.o
10obj-$(CONFIG_FB_OMAP2_PANEL_LGPHILIPS_LB035Q02) += panel-lgphilips-lb035q02.o
11obj-$(CONFIG_FB_OMAP2_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o
12obj-$(CONFIG_FB_OMAP2_PANEL_TPO_TD028TTEC1) += panel-tpo-td028ttec1.o
13obj-$(CONFIG_FB_OMAP2_PANEL_TPO_TD043MTEA1) += panel-tpo-td043mtea1.o
14obj-$(CONFIG_FB_OMAP2_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o
diff --git a/drivers/video/fbdev/omap2/displays-new/connector-analog-tv.c b/drivers/video/fbdev/omap2/omapfb/displays/connector-analog-tv.c
index 8511c648a15c..8511c648a15c 100644
--- a/drivers/video/fbdev/omap2/displays-new/connector-analog-tv.c
+++ b/drivers/video/fbdev/omap2/omapfb/displays/connector-analog-tv.c
diff --git a/drivers/video/fbdev/omap2/displays-new/connector-dvi.c b/drivers/video/fbdev/omap2/omapfb/displays/connector-dvi.c
index d811e6dcaef7..d811e6dcaef7 100644
--- a/drivers/video/fbdev/omap2/displays-new/connector-dvi.c
+++ b/drivers/video/fbdev/omap2/omapfb/displays/connector-dvi.c
diff --git a/drivers/video/fbdev/omap2/displays-new/connector-hdmi.c b/drivers/video/fbdev/omap2/omapfb/displays/connector-hdmi.c
index 6ee4129bc0c0..6ee4129bc0c0 100644
--- a/drivers/video/fbdev/omap2/displays-new/connector-hdmi.c
+++ b/drivers/video/fbdev/omap2/omapfb/displays/connector-hdmi.c
diff --git a/drivers/video/fbdev/omap2/displays-new/encoder-opa362.c b/drivers/video/fbdev/omap2/omapfb/displays/encoder-opa362.c
index 8c246c213e06..8c246c213e06 100644
--- a/drivers/video/fbdev/omap2/displays-new/encoder-opa362.c
+++ b/drivers/video/fbdev/omap2/omapfb/displays/encoder-opa362.c
diff --git a/drivers/video/fbdev/omap2/displays-new/encoder-tfp410.c b/drivers/video/fbdev/omap2/omapfb/displays/encoder-tfp410.c
index d9048b3df495..d9048b3df495 100644
--- a/drivers/video/fbdev/omap2/displays-new/encoder-tfp410.c
+++ b/drivers/video/fbdev/omap2/omapfb/displays/encoder-tfp410.c
diff --git a/drivers/video/fbdev/omap2/displays-new/encoder-tpd12s015.c b/drivers/video/fbdev/omap2/omapfb/displays/encoder-tpd12s015.c
index 990af6baeb0f..677e2545fcbe 100644
--- a/drivers/video/fbdev/omap2/displays-new/encoder-tpd12s015.c
+++ b/drivers/video/fbdev/omap2/omapfb/displays/encoder-tpd12s015.c
@@ -13,9 +13,8 @@
13#include <linux/delay.h> 13#include <linux/delay.h>
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/slab.h> 15#include <linux/slab.h>
16#include <linux/gpio.h>
17#include <linux/platform_device.h> 16#include <linux/platform_device.h>
18#include <linux/of_gpio.h> 17#include <linux/gpio/consumer.h>
19 18
20#include <video/omapdss.h> 19#include <video/omapdss.h>
21#include <video/omap-panel-data.h> 20#include <video/omap-panel-data.h>
@@ -24,9 +23,9 @@ struct panel_drv_data {
24 struct omap_dss_device dssdev; 23 struct omap_dss_device dssdev;
25 struct omap_dss_device *in; 24 struct omap_dss_device *in;
26 25
27 int ct_cp_hpd_gpio; 26 struct gpio_desc *ct_cp_hpd_gpio;
28 int ls_oe_gpio; 27 struct gpio_desc *ls_oe_gpio;
29 int hpd_gpio; 28 struct gpio_desc *hpd_gpio;
30 29
31 struct omap_video_timings timings; 30 struct omap_video_timings timings;
32}; 31};
@@ -47,9 +46,11 @@ static int tpd_connect(struct omap_dss_device *dssdev,
47 dst->src = dssdev; 46 dst->src = dssdev;
48 dssdev->dst = dst; 47 dssdev->dst = dst;
49 48
50 gpio_set_value_cansleep(ddata->ct_cp_hpd_gpio, 1); 49 if (ddata->ct_cp_hpd_gpio) {
51 /* DC-DC converter needs at max 300us to get to 90% of 5V */ 50 gpiod_set_value_cansleep(ddata->ct_cp_hpd_gpio, 1);
52 udelay(300); 51 /* DC-DC converter needs at max 300us to get to 90% of 5V */
52 udelay(300);
53 }
53 54
54 return 0; 55 return 0;
55} 56}
@@ -65,7 +66,7 @@ static void tpd_disconnect(struct omap_dss_device *dssdev,
65 if (dst != dssdev->dst) 66 if (dst != dssdev->dst)
66 return; 67 return;
67 68
68 gpio_set_value_cansleep(ddata->ct_cp_hpd_gpio, 0); 69 gpiod_set_value_cansleep(ddata->ct_cp_hpd_gpio, 0);
69 70
70 dst->src = NULL; 71 dst->src = NULL;
71 dssdev->dst = NULL; 72 dssdev->dst = NULL;
@@ -145,16 +146,14 @@ static int tpd_read_edid(struct omap_dss_device *dssdev,
145 struct omap_dss_device *in = ddata->in; 146 struct omap_dss_device *in = ddata->in;
146 int r; 147 int r;
147 148
148 if (!gpio_get_value_cansleep(ddata->hpd_gpio)) 149 if (!gpiod_get_value_cansleep(ddata->hpd_gpio))
149 return -ENODEV; 150 return -ENODEV;
150 151
151 if (gpio_is_valid(ddata->ls_oe_gpio)) 152 gpiod_set_value_cansleep(ddata->ls_oe_gpio, 1);
152 gpio_set_value_cansleep(ddata->ls_oe_gpio, 1);
153 153
154 r = in->ops.hdmi->read_edid(in, edid, len); 154 r = in->ops.hdmi->read_edid(in, edid, len);
155 155
156 if (gpio_is_valid(ddata->ls_oe_gpio)) 156 gpiod_set_value_cansleep(ddata->ls_oe_gpio, 0);
157 gpio_set_value_cansleep(ddata->ls_oe_gpio, 0);
158 157
159 return r; 158 return r;
160} 159}
@@ -163,7 +162,7 @@ static bool tpd_detect(struct omap_dss_device *dssdev)
163{ 162{
164 struct panel_drv_data *ddata = to_panel_data(dssdev); 163 struct panel_drv_data *ddata = to_panel_data(dssdev);
165 164
166 return gpio_get_value_cansleep(ddata->hpd_gpio); 165 return gpiod_get_value_cansleep(ddata->hpd_gpio);
167} 166}
168 167
169static int tpd_set_infoframe(struct omap_dss_device *dssdev, 168static int tpd_set_infoframe(struct omap_dss_device *dssdev,
@@ -201,63 +200,11 @@ static const struct omapdss_hdmi_ops tpd_hdmi_ops = {
201 .set_hdmi_mode = tpd_set_hdmi_mode, 200 .set_hdmi_mode = tpd_set_hdmi_mode,
202}; 201};
203 202
204static int tpd_probe_pdata(struct platform_device *pdev)
205{
206 struct panel_drv_data *ddata = platform_get_drvdata(pdev);
207 struct encoder_tpd12s015_platform_data *pdata;
208 struct omap_dss_device *dssdev, *in;
209
210 pdata = dev_get_platdata(&pdev->dev);
211
212 ddata->ct_cp_hpd_gpio = pdata->ct_cp_hpd_gpio;
213 ddata->ls_oe_gpio = pdata->ls_oe_gpio;
214 ddata->hpd_gpio = pdata->hpd_gpio;
215
216 in = omap_dss_find_output(pdata->source);
217 if (in == NULL) {
218 dev_err(&pdev->dev, "Failed to find video source\n");
219 return -ENODEV;
220 }
221
222 ddata->in = in;
223
224 dssdev = &ddata->dssdev;
225 dssdev->name = pdata->name;
226
227 return 0;
228}
229
230static int tpd_probe_of(struct platform_device *pdev) 203static int tpd_probe_of(struct platform_device *pdev)
231{ 204{
232 struct panel_drv_data *ddata = platform_get_drvdata(pdev); 205 struct panel_drv_data *ddata = platform_get_drvdata(pdev);
233 struct device_node *node = pdev->dev.of_node; 206 struct device_node *node = pdev->dev.of_node;
234 struct omap_dss_device *in; 207 struct omap_dss_device *in;
235 int gpio;
236
237 /* CT CP HPD GPIO */
238 gpio = of_get_gpio(node, 0);
239 if (!gpio_is_valid(gpio)) {
240 dev_err(&pdev->dev, "failed to parse CT CP HPD gpio\n");
241 return gpio;
242 }
243 ddata->ct_cp_hpd_gpio = gpio;
244
245 /* LS OE GPIO */
246 gpio = of_get_gpio(node, 1);
247 if (gpio_is_valid(gpio) || gpio == -ENOENT) {
248 ddata->ls_oe_gpio = gpio;
249 } else {
250 dev_err(&pdev->dev, "failed to parse LS OE gpio\n");
251 return gpio;
252 }
253
254 /* HPD GPIO */
255 gpio = of_get_gpio(node, 2);
256 if (!gpio_is_valid(gpio)) {
257 dev_err(&pdev->dev, "failed to parse HPD gpio\n");
258 return gpio;
259 }
260 ddata->hpd_gpio = gpio;
261 208
262 in = omapdss_of_find_source_for_first_ep(node); 209 in = omapdss_of_find_source_for_first_ep(node);
263 if (IS_ERR(in)) { 210 if (IS_ERR(in)) {
@@ -275,6 +222,7 @@ static int tpd_probe(struct platform_device *pdev)
275 struct omap_dss_device *in, *dssdev; 222 struct omap_dss_device *in, *dssdev;
276 struct panel_drv_data *ddata; 223 struct panel_drv_data *ddata;
277 int r; 224 int r;
225 struct gpio_desc *gpio;
278 226
279 ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL); 227 ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
280 if (!ddata) 228 if (!ddata)
@@ -282,11 +230,7 @@ static int tpd_probe(struct platform_device *pdev)
282 230
283 platform_set_drvdata(pdev, ddata); 231 platform_set_drvdata(pdev, ddata);
284 232
285 if (dev_get_platdata(&pdev->dev)) { 233 if (pdev->dev.of_node) {
286 r = tpd_probe_pdata(pdev);
287 if (r)
288 return r;
289 } else if (pdev->dev.of_node) {
290 r = tpd_probe_of(pdev); 234 r = tpd_probe_of(pdev);
291 if (r) 235 if (r)
292 return r; 236 return r;
@@ -294,23 +238,28 @@ static int tpd_probe(struct platform_device *pdev)
294 return -ENODEV; 238 return -ENODEV;
295 } 239 }
296 240
297 r = devm_gpio_request_one(&pdev->dev, ddata->ct_cp_hpd_gpio, 241
298 GPIOF_OUT_INIT_LOW, "hdmi_ct_cp_hpd"); 242 gpio = devm_gpiod_get_index_optional(&pdev->dev, NULL, 0,
299 if (r) 243 GPIOD_OUT_LOW);
244 if (IS_ERR(gpio))
300 goto err_gpio; 245 goto err_gpio;
301 246
302 if (gpio_is_valid(ddata->ls_oe_gpio)) { 247 ddata->ct_cp_hpd_gpio = gpio;
303 r = devm_gpio_request_one(&pdev->dev, ddata->ls_oe_gpio,
304 GPIOF_OUT_INIT_LOW, "hdmi_ls_oe");
305 if (r)
306 goto err_gpio;
307 }
308 248
309 r = devm_gpio_request_one(&pdev->dev, ddata->hpd_gpio, 249 gpio = devm_gpiod_get_index_optional(&pdev->dev, NULL, 1,
310 GPIOF_DIR_IN, "hdmi_hpd"); 250 GPIOD_OUT_LOW);
311 if (r) 251 if (IS_ERR(gpio))
312 goto err_gpio; 252 goto err_gpio;
313 253
254 ddata->ls_oe_gpio = gpio;
255
256 gpio = devm_gpiod_get_index(&pdev->dev, NULL, 2,
257 GPIOD_IN);
258 if (IS_ERR(gpio))
259 goto err_gpio;
260
261 ddata->hpd_gpio = gpio;
262
314 dssdev = &ddata->dssdev; 263 dssdev = &ddata->dssdev;
315 dssdev->ops.hdmi = &tpd_hdmi_ops; 264 dssdev->ops.hdmi = &tpd_hdmi_ops;
316 dssdev->dev = &pdev->dev; 265 dssdev->dev = &pdev->dev;
diff --git a/drivers/video/fbdev/omap2/displays-new/panel-dpi.c b/drivers/video/fbdev/omap2/omapfb/displays/panel-dpi.c
index f7be3489f744..e780fd4f8b46 100644
--- a/drivers/video/fbdev/omap2/displays-new/panel-dpi.c
+++ b/drivers/video/fbdev/omap2/omapfb/displays/panel-dpi.c
@@ -83,8 +83,7 @@ static int panel_dpi_enable(struct omap_dss_device *dssdev)
83 if (r) 83 if (r)
84 return r; 84 return r;
85 85
86 if (ddata->enable_gpio) 86 gpiod_set_value_cansleep(ddata->enable_gpio, 1);
87 gpiod_set_value_cansleep(ddata->enable_gpio, 1);
88 87
89 if (gpio_is_valid(ddata->backlight_gpio)) 88 if (gpio_is_valid(ddata->backlight_gpio))
90 gpio_set_value_cansleep(ddata->backlight_gpio, 1); 89 gpio_set_value_cansleep(ddata->backlight_gpio, 1);
@@ -102,12 +101,11 @@ static void panel_dpi_disable(struct omap_dss_device *dssdev)
102 if (!omapdss_device_is_enabled(dssdev)) 101 if (!omapdss_device_is_enabled(dssdev))
103 return; 102 return;
104 103
105 if (ddata->enable_gpio)
106 gpiod_set_value_cansleep(ddata->enable_gpio, 0);
107
108 if (gpio_is_valid(ddata->backlight_gpio)) 104 if (gpio_is_valid(ddata->backlight_gpio))
109 gpio_set_value_cansleep(ddata->backlight_gpio, 0); 105 gpio_set_value_cansleep(ddata->backlight_gpio, 0);
110 106
107 gpiod_set_value_cansleep(ddata->enable_gpio, 0);
108
111 in->ops.dpi->disable(in); 109 in->ops.dpi->disable(in);
112 110
113 dssdev->state = OMAP_DSS_DISPLAY_DISABLED; 111 dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
diff --git a/drivers/video/fbdev/omap2/displays-new/panel-dsi-cm.c b/drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c
index 3414c2609320..3414c2609320 100644
--- a/drivers/video/fbdev/omap2/displays-new/panel-dsi-cm.c
+++ b/drivers/video/fbdev/omap2/omapfb/displays/panel-dsi-cm.c
diff --git a/drivers/video/fbdev/omap2/displays-new/panel-lgphilips-lb035q02.c b/drivers/video/fbdev/omap2/omapfb/displays/panel-lgphilips-lb035q02.c
index 18eb60e9c9ec..18eb60e9c9ec 100644
--- a/drivers/video/fbdev/omap2/displays-new/panel-lgphilips-lb035q02.c
+++ b/drivers/video/fbdev/omap2/omapfb/displays/panel-lgphilips-lb035q02.c
diff --git a/drivers/video/fbdev/omap2/displays-new/panel-nec-nl8048hl11.c b/drivers/video/fbdev/omap2/omapfb/displays/panel-nec-nl8048hl11.c
index 8a928c9a2fc9..8a928c9a2fc9 100644
--- a/drivers/video/fbdev/omap2/displays-new/panel-nec-nl8048hl11.c
+++ b/drivers/video/fbdev/omap2/omapfb/displays/panel-nec-nl8048hl11.c
diff --git a/drivers/video/fbdev/omap2/displays-new/panel-sharp-ls037v7dw01.c b/drivers/video/fbdev/omap2/omapfb/displays/panel-sharp-ls037v7dw01.c
index abfd1f6e3327..abfd1f6e3327 100644
--- a/drivers/video/fbdev/omap2/displays-new/panel-sharp-ls037v7dw01.c
+++ b/drivers/video/fbdev/omap2/omapfb/displays/panel-sharp-ls037v7dw01.c
diff --git a/drivers/video/fbdev/omap2/displays-new/panel-sony-acx565akm.c b/drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c
index 31efcca801bd..31efcca801bd 100644
--- a/drivers/video/fbdev/omap2/displays-new/panel-sony-acx565akm.c
+++ b/drivers/video/fbdev/omap2/omapfb/displays/panel-sony-acx565akm.c
diff --git a/drivers/video/fbdev/omap2/displays-new/panel-tpo-td028ttec1.c b/drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c
index 4d657f3ab679..4d657f3ab679 100644
--- a/drivers/video/fbdev/omap2/displays-new/panel-tpo-td028ttec1.c
+++ b/drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td028ttec1.c
diff --git a/drivers/video/fbdev/omap2/displays-new/panel-tpo-td043mtea1.c b/drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td043mtea1.c
index 68e3b68a2920..68e3b68a2920 100644
--- a/drivers/video/fbdev/omap2/displays-new/panel-tpo-td043mtea1.c
+++ b/drivers/video/fbdev/omap2/omapfb/displays/panel-tpo-td043mtea1.c
diff --git a/drivers/video/fbdev/omap2/dss/Kconfig b/drivers/video/fbdev/omap2/omapfb/dss/Kconfig
index d1fa730c7d54..27d220212870 100644
--- a/drivers/video/fbdev/omap2/dss/Kconfig
+++ b/drivers/video/fbdev/omap2/omapfb/dss/Kconfig
@@ -1,17 +1,13 @@
1config OMAP2_DSS_INIT 1config FB_OMAP2_DSS_INIT
2 bool 2 bool
3 3
4menuconfig OMAP2_DSS 4config FB_OMAP2_DSS
5 tristate "OMAP2+ Display Subsystem support" 5 tristate
6 select VIDEOMODE_HELPERS 6 select VIDEOMODE_HELPERS
7 select OMAP2_DSS_INIT 7 select FB_OMAP2_DSS_INIT
8 select HDMI 8 select HDMI
9 help
10 OMAP2+ Display Subsystem support.
11 9
12if OMAP2_DSS 10config FB_OMAP2_DSS_DEBUG
13
14config OMAP2_DSS_DEBUG
15 bool "Debug support" 11 bool "Debug support"
16 default n 12 default n
17 help 13 help
@@ -19,7 +15,7 @@ config OMAP2_DSS_DEBUG
19 can also be enabled by setting CONFIG_DYNAMIC_DEBUG and then setting 15 can also be enabled by setting CONFIG_DYNAMIC_DEBUG and then setting
20 appropriate flags in <debugfs>/dynamic_debug/control. 16 appropriate flags in <debugfs>/dynamic_debug/control.
21 17
22config OMAP2_DSS_DEBUGFS 18config FB_OMAP2_DSS_DEBUGFS
23 bool "Debugfs filesystem support" 19 bool "Debugfs filesystem support"
24 depends on DEBUG_FS 20 depends on DEBUG_FS
25 default n 21 default n
@@ -28,9 +24,9 @@ config OMAP2_DSS_DEBUGFS
28 querying about clock configuration and register configuration of dss, 24 querying about clock configuration and register configuration of dss,
29 dispc, dsi, hdmi and rfbi. 25 dispc, dsi, hdmi and rfbi.
30 26
31config OMAP2_DSS_COLLECT_IRQ_STATS 27config FB_OMAP2_DSS_COLLECT_IRQ_STATS
32 bool "Collect DSS IRQ statistics" 28 bool "Collect DSS IRQ statistics"
33 depends on OMAP2_DSS_DEBUGFS 29 depends on FB_OMAP2_DSS_DEBUGFS
34 default n 30 default n
35 help 31 help
36 Collect DSS IRQ statistics, printable via debugfs. 32 Collect DSS IRQ statistics, printable via debugfs.
@@ -39,13 +35,13 @@ config OMAP2_DSS_COLLECT_IRQ_STATS
39 <debugfs>/omapdss/dispc_irq for DISPC interrupts, and 35 <debugfs>/omapdss/dispc_irq for DISPC interrupts, and
40 <debugfs>/omapdss/dsi_irq for DSI interrupts. 36 <debugfs>/omapdss/dsi_irq for DSI interrupts.
41 37
42config OMAP2_DSS_DPI 38config FB_OMAP2_DSS_DPI
43 bool "DPI support" 39 bool "DPI support"
44 default y 40 default y
45 help 41 help
46 DPI Interface. This is the Parallel Display Interface. 42 DPI Interface. This is the Parallel Display Interface.
47 43
48config OMAP2_DSS_RFBI 44config FB_OMAP2_DSS_RFBI
49 bool "RFBI support" 45 bool "RFBI support"
50 depends on BROKEN 46 depends on BROKEN
51 default n 47 default n
@@ -58,32 +54,32 @@ config OMAP2_DSS_RFBI
58 54
59 See http://www.mipi.org/ for DBI specifications. 55 See http://www.mipi.org/ for DBI specifications.
60 56
61config OMAP2_DSS_VENC 57config FB_OMAP2_DSS_VENC
62 bool "VENC support" 58 bool "VENC support"
63 default y 59 default y
64 help 60 help
65 OMAP Video Encoder support for S-Video and composite TV-out. 61 OMAP Video Encoder support for S-Video and composite TV-out.
66 62
67config OMAP2_DSS_HDMI_COMMON 63config FB_OMAP2_DSS_HDMI_COMMON
68 bool 64 bool
69 65
70config OMAP4_DSS_HDMI 66config FB_OMAP4_DSS_HDMI
71 bool "HDMI support for OMAP4" 67 bool "HDMI support for OMAP4"
72 default y 68 default y
73 select OMAP2_DSS_HDMI_COMMON 69 select FB_OMAP2_DSS_HDMI_COMMON
74 help 70 help
75 HDMI support for OMAP4 based SoCs. 71 HDMI support for OMAP4 based SoCs.
76 72
77config OMAP5_DSS_HDMI 73config FB_OMAP5_DSS_HDMI
78 bool "HDMI support for OMAP5" 74 bool "HDMI support for OMAP5"
79 default n 75 default n
80 select OMAP2_DSS_HDMI_COMMON 76 select FB_OMAP2_DSS_HDMI_COMMON
81 help 77 help
82 HDMI Interface for OMAP5 and similar cores. This adds the High 78 HDMI Interface for OMAP5 and similar cores. This adds the High
83 Definition Multimedia Interface. See http://www.hdmi.org/ for HDMI 79 Definition Multimedia Interface. See http://www.hdmi.org/ for HDMI
84 specification. 80 specification.
85 81
86config OMAP2_DSS_SDI 82config FB_OMAP2_DSS_SDI
87 bool "SDI support" 83 bool "SDI support"
88 default n 84 default n
89 help 85 help
@@ -92,7 +88,7 @@ config OMAP2_DSS_SDI
92 SDI is a high speed one-way display serial bus between the host 88 SDI is a high speed one-way display serial bus between the host
93 processor and a display. 89 processor and a display.
94 90
95config OMAP2_DSS_DSI 91config FB_OMAP2_DSS_DSI
96 bool "DSI support" 92 bool "DSI support"
97 default n 93 default n
98 help 94 help
@@ -103,7 +99,7 @@ config OMAP2_DSS_DSI
103 99
104 See http://www.mipi.org/ for DSI specifications. 100 See http://www.mipi.org/ for DSI specifications.
105 101
106config OMAP2_DSS_MIN_FCK_PER_PCK 102config FB_OMAP2_DSS_MIN_FCK_PER_PCK
107 int "Minimum FCK/PCK ratio (for scaling)" 103 int "Minimum FCK/PCK ratio (for scaling)"
108 range 0 32 104 range 0 32
109 default 0 105 default 0
@@ -121,7 +117,7 @@ config OMAP2_DSS_MIN_FCK_PER_PCK
121 Max FCK is 173MHz, so this doesn't work if your PCK 117 Max FCK is 173MHz, so this doesn't work if your PCK
122 is very high. 118 is very high.
123 119
124config OMAP2_DSS_SLEEP_AFTER_VENC_RESET 120config FB_OMAP2_DSS_SLEEP_AFTER_VENC_RESET
125 bool "Sleep 20ms after VENC reset" 121 bool "Sleep 20ms after VENC reset"
126 default y 122 default y
127 help 123 help
@@ -131,5 +127,3 @@ config OMAP2_DSS_SLEEP_AFTER_VENC_RESET
131 127
132 This option enables the sleep, and is enabled by default. You can 128 This option enables the sleep, and is enabled by default. You can
133 disable the sleep if it doesn't cause problems on your platform. 129 disable the sleep if it doesn't cause problems on your platform.
134
135endif
diff --git a/drivers/video/fbdev/omap2/omapfb/dss/Makefile b/drivers/video/fbdev/omap2/omapfb/dss/Makefile
new file mode 100644
index 000000000000..02308e24f3ef
--- /dev/null
+++ b/drivers/video/fbdev/omap2/omapfb/dss/Makefile
@@ -0,0 +1,18 @@
1obj-$(CONFIG_FB_OMAP2_DSS_INIT) += omapdss-boot-init.o
2obj-$(CONFIG_FB_OMAP2_DSS) += omapdss.o
3# Core DSS files
4omapdss-y := core.o dss.o dss_features.o dispc.o dispc_coefs.o display.o \
5 output.o dss-of.o pll.o video-pll.o
6# DSS compat layer files
7omapdss-y += manager.o manager-sysfs.o overlay.o overlay-sysfs.o apply.o \
8 dispc-compat.o display-sysfs.o
9omapdss-$(CONFIG_FB_OMAP2_DSS_DPI) += dpi.o
10omapdss-$(CONFIG_FB_OMAP2_DSS_RFBI) += rfbi.o
11omapdss-$(CONFIG_FB_OMAP2_DSS_VENC) += venc.o
12omapdss-$(CONFIG_FB_OMAP2_DSS_SDI) += sdi.o
13omapdss-$(CONFIG_FB_OMAP2_DSS_DSI) += dsi.o
14omapdss-$(CONFIG_FB_OMAP2_DSS_HDMI_COMMON) += hdmi_common.o hdmi_wp.o hdmi_pll.o \
15 hdmi_phy.o
16omapdss-$(CONFIG_FB_OMAP4_DSS_HDMI) += hdmi4.o hdmi4_core.o
17omapdss-$(CONFIG_FB_OMAP5_DSS_HDMI) += hdmi5.o hdmi5_core.o
18ccflags-$(CONFIG_FB_OMAP2_DSS_DEBUG) += -DDEBUG
diff --git a/drivers/video/fbdev/omap2/dss/apply.c b/drivers/video/fbdev/omap2/omapfb/dss/apply.c
index 663ccc3bf4e5..663ccc3bf4e5 100644
--- a/drivers/video/fbdev/omap2/dss/apply.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/apply.c
diff --git a/drivers/video/fbdev/omap2/dss/core.c b/drivers/video/fbdev/omap2/omapfb/dss/core.c
index 54eeb507f9b3..5a87179b7312 100644
--- a/drivers/video/fbdev/omap2/dss/core.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/core.c
@@ -98,7 +98,7 @@ int dss_set_min_bus_tput(struct device *dev, unsigned long tput)
98 return 0; 98 return 0;
99} 99}
100 100
101#if defined(CONFIG_OMAP2_DSS_DEBUGFS) 101#if defined(CONFIG_FB_OMAP2_DSS_DEBUGFS)
102static int dss_debug_show(struct seq_file *s, void *unused) 102static int dss_debug_show(struct seq_file *s, void *unused)
103{ 103{
104 void (*func)(struct seq_file *) = s->private; 104 void (*func)(struct seq_file *) = s->private;
@@ -150,7 +150,7 @@ int dss_debugfs_create_file(const char *name, void (*write)(struct seq_file *))
150 150
151 return PTR_ERR_OR_ZERO(d); 151 return PTR_ERR_OR_ZERO(d);
152} 152}
153#else /* CONFIG_OMAP2_DSS_DEBUGFS */ 153#else /* CONFIG_FB_OMAP2_DSS_DEBUGFS */
154static inline int dss_initialize_debugfs(void) 154static inline int dss_initialize_debugfs(void)
155{ 155{
156 return 0; 156 return 0;
@@ -162,7 +162,7 @@ int dss_debugfs_create_file(const char *name, void (*write)(struct seq_file *))
162{ 162{
163 return 0; 163 return 0;
164} 164}
165#endif /* CONFIG_OMAP2_DSS_DEBUGFS */ 165#endif /* CONFIG_FB_OMAP2_DSS_DEBUGFS */
166 166
167/* PLATFORM DEVICE */ 167/* PLATFORM DEVICE */
168static int omap_dss_pm_notif(struct notifier_block *b, unsigned long v, void *d) 168static int omap_dss_pm_notif(struct notifier_block *b, unsigned long v, void *d)
@@ -247,49 +247,49 @@ static struct platform_driver omap_dss_driver = {
247static int (*dss_output_drv_reg_funcs[])(void) __initdata = { 247static int (*dss_output_drv_reg_funcs[])(void) __initdata = {
248 dss_init_platform_driver, 248 dss_init_platform_driver,
249 dispc_init_platform_driver, 249 dispc_init_platform_driver,
250#ifdef CONFIG_OMAP2_DSS_DSI 250#ifdef CONFIG_FB_OMAP2_DSS_DSI
251 dsi_init_platform_driver, 251 dsi_init_platform_driver,
252#endif 252#endif
253#ifdef CONFIG_OMAP2_DSS_DPI 253#ifdef CONFIG_FB_OMAP2_DSS_DPI
254 dpi_init_platform_driver, 254 dpi_init_platform_driver,
255#endif 255#endif
256#ifdef CONFIG_OMAP2_DSS_SDI 256#ifdef CONFIG_FB_OMAP2_DSS_SDI
257 sdi_init_platform_driver, 257 sdi_init_platform_driver,
258#endif 258#endif
259#ifdef CONFIG_OMAP2_DSS_RFBI 259#ifdef CONFIG_FB_OMAP2_DSS_RFBI
260 rfbi_init_platform_driver, 260 rfbi_init_platform_driver,
261#endif 261#endif
262#ifdef CONFIG_OMAP2_DSS_VENC 262#ifdef CONFIG_FB_OMAP2_DSS_VENC
263 venc_init_platform_driver, 263 venc_init_platform_driver,
264#endif 264#endif
265#ifdef CONFIG_OMAP4_DSS_HDMI 265#ifdef CONFIG_FB_OMAP4_DSS_HDMI
266 hdmi4_init_platform_driver, 266 hdmi4_init_platform_driver,
267#endif 267#endif
268#ifdef CONFIG_OMAP5_DSS_HDMI 268#ifdef CONFIG_FB_OMAP5_DSS_HDMI
269 hdmi5_init_platform_driver, 269 hdmi5_init_platform_driver,
270#endif 270#endif
271}; 271};
272 272
273static void (*dss_output_drv_unreg_funcs[])(void) = { 273static void (*dss_output_drv_unreg_funcs[])(void) = {
274#ifdef CONFIG_OMAP5_DSS_HDMI 274#ifdef CONFIG_FB_OMAP5_DSS_HDMI
275 hdmi5_uninit_platform_driver, 275 hdmi5_uninit_platform_driver,
276#endif 276#endif
277#ifdef CONFIG_OMAP4_DSS_HDMI 277#ifdef CONFIG_FB_OMAP4_DSS_HDMI
278 hdmi4_uninit_platform_driver, 278 hdmi4_uninit_platform_driver,
279#endif 279#endif
280#ifdef CONFIG_OMAP2_DSS_VENC 280#ifdef CONFIG_FB_OMAP2_DSS_VENC
281 venc_uninit_platform_driver, 281 venc_uninit_platform_driver,
282#endif 282#endif
283#ifdef CONFIG_OMAP2_DSS_RFBI 283#ifdef CONFIG_FB_OMAP2_DSS_RFBI
284 rfbi_uninit_platform_driver, 284 rfbi_uninit_platform_driver,
285#endif 285#endif
286#ifdef CONFIG_OMAP2_DSS_SDI 286#ifdef CONFIG_FB_OMAP2_DSS_SDI
287 sdi_uninit_platform_driver, 287 sdi_uninit_platform_driver,
288#endif 288#endif
289#ifdef CONFIG_OMAP2_DSS_DPI 289#ifdef CONFIG_FB_OMAP2_DSS_DPI
290 dpi_uninit_platform_driver, 290 dpi_uninit_platform_driver,
291#endif 291#endif
292#ifdef CONFIG_OMAP2_DSS_DSI 292#ifdef CONFIG_FB_OMAP2_DSS_DSI
293 dsi_uninit_platform_driver, 293 dsi_uninit_platform_driver,
294#endif 294#endif
295 dispc_uninit_platform_driver, 295 dispc_uninit_platform_driver,
diff --git a/drivers/video/fbdev/omap2/dss/dispc-compat.c b/drivers/video/fbdev/omap2/omapfb/dss/dispc-compat.c
index 633c461fbc6e..6607db37a5e4 100644
--- a/drivers/video/fbdev/omap2/dss/dispc-compat.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/dispc-compat.c
@@ -60,14 +60,14 @@ static struct {
60 u32 error_irqs; 60 u32 error_irqs;
61 struct work_struct error_work; 61 struct work_struct error_work;
62 62
63#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS 63#ifdef CONFIG_FB_OMAP2_DSS_COLLECT_IRQ_STATS
64 spinlock_t irq_stats_lock; 64 spinlock_t irq_stats_lock;
65 struct dispc_irq_stats irq_stats; 65 struct dispc_irq_stats irq_stats;
66#endif 66#endif
67} dispc_compat; 67} dispc_compat;
68 68
69 69
70#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS 70#ifdef CONFIG_FB_OMAP2_DSS_COLLECT_IRQ_STATS
71static void dispc_dump_irqs(struct seq_file *s) 71static void dispc_dump_irqs(struct seq_file *s)
72{ 72{
73 unsigned long flags; 73 unsigned long flags;
@@ -279,7 +279,7 @@ static irqreturn_t omap_dispc_irq_handler(int irq, void *arg)
279 return IRQ_NONE; 279 return IRQ_NONE;
280 } 280 }
281 281
282#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS 282#ifdef CONFIG_FB_OMAP2_DSS_COLLECT_IRQ_STATS
283 spin_lock(&dispc_compat.irq_stats_lock); 283 spin_lock(&dispc_compat.irq_stats_lock);
284 dispc_compat.irq_stats.irq_count++; 284 dispc_compat.irq_stats.irq_count++;
285 dss_collect_irq_stats(irqstatus, dispc_compat.irq_stats.irqs); 285 dss_collect_irq_stats(irqstatus, dispc_compat.irq_stats.irqs);
@@ -416,7 +416,7 @@ int dss_dispc_initialize_irq(void)
416{ 416{
417 int r; 417 int r;
418 418
419#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS 419#ifdef CONFIG_FB_OMAP2_DSS_COLLECT_IRQ_STATS
420 spin_lock_init(&dispc_compat.irq_stats_lock); 420 spin_lock_init(&dispc_compat.irq_stats_lock);
421 dispc_compat.irq_stats.last_reset = jiffies; 421 dispc_compat.irq_stats.last_reset = jiffies;
422 dss_debugfs_create_file("dispc_irq", dispc_dump_irqs); 422 dss_debugfs_create_file("dispc_irq", dispc_dump_irqs);
@@ -476,7 +476,7 @@ static void dispc_mgr_disable_lcd_out(enum omap_channel channel)
476 int r; 476 int r;
477 u32 irq; 477 u32 irq;
478 478
479 if (dispc_mgr_is_enabled(channel) == false) 479 if (!dispc_mgr_is_enabled(channel))
480 return; 480 return;
481 481
482 /* 482 /*
@@ -524,7 +524,7 @@ static void dispc_mgr_enable_digit_out(void)
524 int r; 524 int r;
525 u32 irq_mask; 525 u32 irq_mask;
526 526
527 if (dispc_mgr_is_enabled(OMAP_DSS_CHANNEL_DIGIT) == true) 527 if (dispc_mgr_is_enabled(OMAP_DSS_CHANNEL_DIGIT))
528 return; 528 return;
529 529
530 /* 530 /*
@@ -562,7 +562,7 @@ static void dispc_mgr_disable_digit_out(void)
562 u32 irq_mask; 562 u32 irq_mask;
563 int num_irqs; 563 int num_irqs;
564 564
565 if (dispc_mgr_is_enabled(OMAP_DSS_CHANNEL_DIGIT) == false) 565 if (!dispc_mgr_is_enabled(OMAP_DSS_CHANNEL_DIGIT))
566 return; 566 return;
567 567
568 /* 568 /*
diff --git a/drivers/video/fbdev/omap2/dss/dispc-compat.h b/drivers/video/fbdev/omap2/omapfb/dss/dispc-compat.h
index 14a69b3d4fb0..14a69b3d4fb0 100644
--- a/drivers/video/fbdev/omap2/dss/dispc-compat.h
+++ b/drivers/video/fbdev/omap2/omapfb/dss/dispc-compat.h
diff --git a/drivers/video/fbdev/omap2/dss/dispc.c b/drivers/video/fbdev/omap2/omapfb/dss/dispc.c
index be716c9ffb88..5491e304f4fe 100644
--- a/drivers/video/fbdev/omap2/dss/dispc.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/dispc.c
@@ -99,6 +99,11 @@ struct dispc_features {
99 99
100 /* PIXEL_INC is not added to the last pixel of a line */ 100 /* PIXEL_INC is not added to the last pixel of a line */
101 bool last_pixel_inc_missing:1; 101 bool last_pixel_inc_missing:1;
102
103 /* POL_FREQ has ALIGN bit */
104 bool supports_sync_align:1;
105
106 bool has_writeback:1;
102}; 107};
103 108
104#define DISPC_MAX_NR_FIFOS 5 109#define DISPC_MAX_NR_FIFOS 5
@@ -246,6 +251,11 @@ struct color_conv_coef {
246 int full_range; 251 int full_range;
247}; 252};
248 253
254static unsigned long dispc_fclk_rate(void);
255static unsigned long dispc_core_clk_rate(void);
256static unsigned long dispc_mgr_lclk_rate(enum omap_channel channel);
257static unsigned long dispc_mgr_pclk_rate(enum omap_channel channel);
258
249static unsigned long dispc_plane_pclk_rate(enum omap_plane plane); 259static unsigned long dispc_plane_pclk_rate(enum omap_plane plane);
250static unsigned long dispc_plane_lclk_rate(enum omap_plane plane); 260static unsigned long dispc_plane_lclk_rate(enum omap_plane plane);
251 261
@@ -571,7 +581,7 @@ EXPORT_SYMBOL(dispc_mgr_go_busy);
571 581
572void dispc_mgr_go(enum omap_channel channel) 582void dispc_mgr_go(enum omap_channel channel)
573{ 583{
574 WARN_ON(dispc_mgr_is_enabled(channel) == false); 584 WARN_ON(!dispc_mgr_is_enabled(channel));
575 WARN_ON(dispc_mgr_go_busy(channel)); 585 WARN_ON(dispc_mgr_go_busy(channel));
576 586
577 DSSDBG("GO %s\n", mgr_desc[channel].name); 587 DSSDBG("GO %s\n", mgr_desc[channel].name);
@@ -707,19 +717,20 @@ static void dispc_setup_color_conv_coef(void)
707{ 717{
708 int i; 718 int i;
709 int num_ovl = dss_feat_get_num_ovls(); 719 int num_ovl = dss_feat_get_num_ovls();
710 int num_wb = dss_feat_get_num_wbs();
711 const struct color_conv_coef ctbl_bt601_5_ovl = { 720 const struct color_conv_coef ctbl_bt601_5_ovl = {
721 /* YUV -> RGB */
712 298, 409, 0, 298, -208, -100, 298, 0, 517, 0, 722 298, 409, 0, 298, -208, -100, 298, 0, 517, 0,
713 }; 723 };
714 const struct color_conv_coef ctbl_bt601_5_wb = { 724 const struct color_conv_coef ctbl_bt601_5_wb = {
715 66, 112, -38, 129, -94, -74, 25, -18, 112, 0, 725 /* RGB -> YUV */
726 66, 129, 25, 112, -94, -18, -38, -74, 112, 0,
716 }; 727 };
717 728
718 for (i = 1; i < num_ovl; i++) 729 for (i = 1; i < num_ovl; i++)
719 dispc_ovl_write_color_conv_coef(i, &ctbl_bt601_5_ovl); 730 dispc_ovl_write_color_conv_coef(i, &ctbl_bt601_5_ovl);
720 731
721 for (; i < num_wb; i++) 732 if (dispc.feat->has_writeback)
722 dispc_ovl_write_color_conv_coef(i, &ctbl_bt601_5_wb); 733 dispc_ovl_write_color_conv_coef(OMAP_DSS_WB, &ctbl_bt601_5_wb);
723} 734}
724 735
725static void dispc_ovl_set_ba0(enum omap_plane plane, u32 paddr) 736static void dispc_ovl_set_ba0(enum omap_plane plane, u32 paddr)
@@ -970,6 +981,10 @@ void dispc_ovl_set_channel_out(enum omap_plane plane, enum omap_channel channel)
970 return; 981 return;
971 } 982 }
972 break; 983 break;
984 case OMAP_DSS_CHANNEL_WB:
985 chan = 0;
986 chan2 = 3;
987 break;
973 default: 988 default:
974 BUG(); 989 BUG();
975 return; 990 return;
@@ -988,7 +1003,6 @@ static enum omap_channel dispc_ovl_get_channel_out(enum omap_plane plane)
988{ 1003{
989 int shift; 1004 int shift;
990 u32 val; 1005 u32 val;
991 enum omap_channel channel;
992 1006
993 switch (plane) { 1007 switch (plane) {
994 case OMAP_DSS_GFX: 1008 case OMAP_DSS_GFX:
@@ -1006,23 +1020,23 @@ static enum omap_channel dispc_ovl_get_channel_out(enum omap_plane plane)
1006 1020
1007 val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); 1021 val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane));
1008 1022
1009 if (dss_has_feature(FEAT_MGR_LCD3)) { 1023 if (FLD_GET(val, shift, shift) == 1)
1010 if (FLD_GET(val, 31, 30) == 0) 1024 return OMAP_DSS_CHANNEL_DIGIT;
1011 channel = FLD_GET(val, shift, shift); 1025
1012 else if (FLD_GET(val, 31, 30) == 1) 1026 if (!dss_has_feature(FEAT_MGR_LCD2))
1013 channel = OMAP_DSS_CHANNEL_LCD2; 1027 return OMAP_DSS_CHANNEL_LCD;
1014 else
1015 channel = OMAP_DSS_CHANNEL_LCD3;
1016 } else if (dss_has_feature(FEAT_MGR_LCD2)) {
1017 if (FLD_GET(val, 31, 30) == 0)
1018 channel = FLD_GET(val, shift, shift);
1019 else
1020 channel = OMAP_DSS_CHANNEL_LCD2;
1021 } else {
1022 channel = FLD_GET(val, shift, shift);
1023 }
1024 1028
1025 return channel; 1029 switch (FLD_GET(val, 31, 30)) {
1030 case 0:
1031 default:
1032 return OMAP_DSS_CHANNEL_LCD;
1033 case 1:
1034 return OMAP_DSS_CHANNEL_LCD2;
1035 case 2:
1036 return OMAP_DSS_CHANNEL_LCD3;
1037 case 3:
1038 return OMAP_DSS_CHANNEL_WB;
1039 }
1026} 1040}
1027 1041
1028void dispc_wb_set_channel_in(enum dss_writeback_channel channel) 1042void dispc_wb_set_channel_in(enum dss_writeback_channel channel)
@@ -1050,6 +1064,8 @@ static void dispc_configure_burst_sizes(void)
1050 /* Configure burst size always to maximum size */ 1064 /* Configure burst size always to maximum size */
1051 for (i = 0; i < dss_feat_get_num_ovls(); ++i) 1065 for (i = 0; i < dss_feat_get_num_ovls(); ++i)
1052 dispc_ovl_set_burst_size(i, burst_size); 1066 dispc_ovl_set_burst_size(i, burst_size);
1067 if (dispc.feat->has_writeback)
1068 dispc_ovl_set_burst_size(OMAP_DSS_WB, burst_size);
1053} 1069}
1054 1070
1055static u32 dispc_ovl_get_burst_size(enum omap_plane plane) 1071static u32 dispc_ovl_get_burst_size(enum omap_plane plane)
@@ -1196,6 +1212,17 @@ static void dispc_init_fifos(void)
1196 1212
1197 dispc_ovl_set_fifo_threshold(i, low, high); 1213 dispc_ovl_set_fifo_threshold(i, low, high);
1198 } 1214 }
1215
1216 if (dispc.feat->has_writeback) {
1217 u32 low, high;
1218 const bool use_fifomerge = false;
1219 const bool manual_update = false;
1220
1221 dispc_ovl_compute_fifo_thresholds(OMAP_DSS_WB, &low, &high,
1222 use_fifomerge, manual_update);
1223
1224 dispc_ovl_set_fifo_threshold(OMAP_DSS_WB, low, high);
1225 }
1199} 1226}
1200 1227
1201static u32 dispc_ovl_get_fifo_size(enum omap_plane plane) 1228static u32 dispc_ovl_get_fifo_size(enum omap_plane plane)
@@ -1248,7 +1275,6 @@ void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high)
1248 plane != OMAP_DSS_WB) 1275 plane != OMAP_DSS_WB)
1249 dispc_write_reg(DISPC_OVL_PRELOAD(plane), min(high, 0xfffu)); 1276 dispc_write_reg(DISPC_OVL_PRELOAD(plane), min(high, 0xfffu));
1250} 1277}
1251EXPORT_SYMBOL(dispc_ovl_set_fifo_threshold);
1252 1278
1253void dispc_enable_fifomerge(bool enable) 1279void dispc_enable_fifomerge(bool enable)
1254{ 1280{
@@ -1307,7 +1333,6 @@ void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,
1307 *fifo_high = total_fifo_size - buf_unit; 1333 *fifo_high = total_fifo_size - buf_unit;
1308 } 1334 }
1309} 1335}
1310EXPORT_SYMBOL(dispc_ovl_compute_fifo_thresholds);
1311 1336
1312static void dispc_ovl_set_mflag(enum omap_plane plane, bool enable) 1337static void dispc_ovl_set_mflag(enum omap_plane plane, bool enable)
1313{ 1338{
@@ -1364,6 +1389,25 @@ static void dispc_init_mflag(void)
1364 1389
1365 dispc_ovl_set_mflag_threshold(i, low, high); 1390 dispc_ovl_set_mflag_threshold(i, low, high);
1366 } 1391 }
1392
1393 if (dispc.feat->has_writeback) {
1394 u32 size = dispc_ovl_get_fifo_size(OMAP_DSS_WB);
1395 u32 unit = dss_feat_get_buffer_size_unit();
1396 u32 low, high;
1397
1398 dispc_ovl_set_mflag(OMAP_DSS_WB, true);
1399
1400 /*
1401 * Simulation team suggests below thesholds:
1402 * HT = fifosize * 5 / 8;
1403 * LT = fifosize * 4 / 8;
1404 */
1405
1406 low = size * 4 / 8 / unit;
1407 high = size * 5 / 8 / unit;
1408
1409 dispc_ovl_set_mflag_threshold(OMAP_DSS_WB, low, high);
1410 }
1367} 1411}
1368 1412
1369static void dispc_ovl_set_fir(enum omap_plane plane, 1413static void dispc_ovl_set_fir(enum omap_plane plane,
@@ -2438,7 +2482,7 @@ static int dispc_ovl_calc_scaling(unsigned long pclk, unsigned long lclk,
2438 if (width == out_width && height == out_height) 2482 if (width == out_width && height == out_height)
2439 return 0; 2483 return 0;
2440 2484
2441 if (pclk == 0 || mgr_timings->pixelclock == 0) { 2485 if (!mem_to_mem && (pclk == 0 || mgr_timings->pixelclock == 0)) {
2442 DSSERR("cannot calculate scaling settings: pclk is zero\n"); 2486 DSSERR("cannot calculate scaling settings: pclk is zero\n");
2443 return -EINVAL; 2487 return -EINVAL;
2444 } 2488 }
@@ -2816,8 +2860,25 @@ int dispc_wb_setup(const struct omap_dss_writeback_info *wi,
2816 l = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); 2860 l = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane));
2817 l = FLD_MOD(l, truncation, 10, 10); /* TRUNCATIONENABLE */ 2861 l = FLD_MOD(l, truncation, 10, 10); /* TRUNCATIONENABLE */
2818 l = FLD_MOD(l, mem_to_mem, 19, 19); /* WRITEBACKMODE */ 2862 l = FLD_MOD(l, mem_to_mem, 19, 19); /* WRITEBACKMODE */
2863 if (mem_to_mem)
2864 l = FLD_MOD(l, 1, 26, 24); /* CAPTUREMODE */
2865 else
2866 l = FLD_MOD(l, 0, 26, 24); /* CAPTUREMODE */
2819 dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), l); 2867 dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), l);
2820 2868
2869 if (mem_to_mem) {
2870 /* WBDELAYCOUNT */
2871 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), 0, 7, 0);
2872 } else {
2873 int wbdelay;
2874
2875 wbdelay = min(mgr_timings->vfp + mgr_timings->vsw +
2876 mgr_timings->vbp, 255);
2877
2878 /* WBDELAYCOUNT */
2879 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), wbdelay, 7, 0);
2880 }
2881
2821 return r; 2882 return r;
2822} 2883}
2823 2884
@@ -2896,7 +2957,7 @@ static void dispc_mgr_set_lcd_type_tft(enum omap_channel channel)
2896 mgr_fld_write(channel, DISPC_MGR_FLD_STNTFT, 1); 2957 mgr_fld_write(channel, DISPC_MGR_FLD_STNTFT, 1);
2897} 2958}
2898 2959
2899void dispc_set_loadmode(enum omap_dss_load_mode mode) 2960static void dispc_set_loadmode(enum omap_dss_load_mode mode)
2900{ 2961{
2901 REG_FLD_MOD(DISPC_CONFIG, mode, 2, 1); 2962 REG_FLD_MOD(DISPC_CONFIG, mode, 2, 1);
2902} 2963}
@@ -3163,6 +3224,10 @@ static void _dispc_mgr_set_lcd_timings(enum omap_channel channel, int hsw,
3163 FLD_VAL(hs, 13, 13) | 3224 FLD_VAL(hs, 13, 13) |
3164 FLD_VAL(vs, 12, 12); 3225 FLD_VAL(vs, 12, 12);
3165 3226
3227 /* always set ALIGN bit when available */
3228 if (dispc.feat->supports_sync_align)
3229 l |= (1 << 18);
3230
3166 dispc_write_reg(DISPC_POL_FREQ(channel), l); 3231 dispc_write_reg(DISPC_POL_FREQ(channel), l);
3167 3232
3168 if (dispc.syscon_pol) { 3233 if (dispc.syscon_pol) {
@@ -3220,7 +3285,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,
3220 3285
3221 DSSDBG("hsync %luHz, vsync %luHz\n", ht, vt); 3286 DSSDBG("hsync %luHz, vsync %luHz\n", ht, vt);
3222 } else { 3287 } else {
3223 if (t.interlace == true) 3288 if (t.interlace)
3224 t.y_res /= 2; 3289 t.y_res /= 2;
3225 } 3290 }
3226 3291
@@ -3237,7 +3302,7 @@ static void dispc_mgr_set_lcd_divisor(enum omap_channel channel, u16 lck_div,
3237 dispc_write_reg(DISPC_DIVISORo(channel), 3302 dispc_write_reg(DISPC_DIVISORo(channel),
3238 FLD_VAL(lck_div, 23, 16) | FLD_VAL(pck_div, 7, 0)); 3303 FLD_VAL(lck_div, 23, 16) | FLD_VAL(pck_div, 7, 0));
3239 3304
3240 if (dss_has_feature(FEAT_CORE_CLK_DIV) == false && 3305 if (!dss_has_feature(FEAT_CORE_CLK_DIV) &&
3241 channel == OMAP_DSS_CHANNEL_LCD) 3306 channel == OMAP_DSS_CHANNEL_LCD)
3242 dispc.core_clk_rate = dispc_fclk_rate() / lck_div; 3307 dispc.core_clk_rate = dispc_fclk_rate() / lck_div;
3243} 3308}
@@ -3251,7 +3316,7 @@ static void dispc_mgr_get_lcd_divisor(enum omap_channel channel, int *lck_div,
3251 *pck_div = FLD_GET(l, 7, 0); 3316 *pck_div = FLD_GET(l, 7, 0);
3252} 3317}
3253 3318
3254unsigned long dispc_fclk_rate(void) 3319static unsigned long dispc_fclk_rate(void)
3255{ 3320{
3256 struct dss_pll *pll; 3321 struct dss_pll *pll;
3257 unsigned long r = 0; 3322 unsigned long r = 0;
@@ -3282,7 +3347,7 @@ unsigned long dispc_fclk_rate(void)
3282 return r; 3347 return r;
3283} 3348}
3284 3349
3285unsigned long dispc_mgr_lclk_rate(enum omap_channel channel) 3350static unsigned long dispc_mgr_lclk_rate(enum omap_channel channel)
3286{ 3351{
3287 struct dss_pll *pll; 3352 struct dss_pll *pll;
3288 int lcd; 3353 int lcd;
@@ -3323,7 +3388,7 @@ unsigned long dispc_mgr_lclk_rate(enum omap_channel channel)
3323 } 3388 }
3324} 3389}
3325 3390
3326unsigned long dispc_mgr_pclk_rate(enum omap_channel channel) 3391static unsigned long dispc_mgr_pclk_rate(enum omap_channel channel)
3327{ 3392{
3328 unsigned long r; 3393 unsigned long r;
3329 3394
@@ -3348,7 +3413,7 @@ void dispc_set_tv_pclk(unsigned long pclk)
3348 dispc.tv_pclk_rate = pclk; 3413 dispc.tv_pclk_rate = pclk;
3349} 3414}
3350 3415
3351unsigned long dispc_core_clk_rate(void) 3416static unsigned long dispc_core_clk_rate(void)
3352{ 3417{
3353 return dispc.core_clk_rate; 3418 return dispc.core_clk_rate;
3354} 3419}
@@ -3448,6 +3513,7 @@ static void dispc_dump_regs(struct seq_file *s)
3448 [OMAP_DSS_VIDEO1] = "VID1", 3513 [OMAP_DSS_VIDEO1] = "VID1",
3449 [OMAP_DSS_VIDEO2] = "VID2", 3514 [OMAP_DSS_VIDEO2] = "VID2",
3450 [OMAP_DSS_VIDEO3] = "VID3", 3515 [OMAP_DSS_VIDEO3] = "VID3",
3516 [OMAP_DSS_WB] = "WB",
3451 }; 3517 };
3452 const char **p_names; 3518 const char **p_names;
3453 3519
@@ -3554,6 +3620,35 @@ static void dispc_dump_regs(struct seq_file *s)
3554 DUMPREG(i, DISPC_OVL_ATTRIBUTES2); 3620 DUMPREG(i, DISPC_OVL_ATTRIBUTES2);
3555 } 3621 }
3556 3622
3623 if (dispc.feat->has_writeback) {
3624 i = OMAP_DSS_WB;
3625 DUMPREG(i, DISPC_OVL_BA0);
3626 DUMPREG(i, DISPC_OVL_BA1);
3627 DUMPREG(i, DISPC_OVL_SIZE);
3628 DUMPREG(i, DISPC_OVL_ATTRIBUTES);
3629 DUMPREG(i, DISPC_OVL_FIFO_THRESHOLD);
3630 DUMPREG(i, DISPC_OVL_FIFO_SIZE_STATUS);
3631 DUMPREG(i, DISPC_OVL_ROW_INC);
3632 DUMPREG(i, DISPC_OVL_PIXEL_INC);
3633
3634 if (dss_has_feature(FEAT_MFLAG))
3635 DUMPREG(i, DISPC_OVL_MFLAG_THRESHOLD);
3636
3637 DUMPREG(i, DISPC_OVL_FIR);
3638 DUMPREG(i, DISPC_OVL_PICTURE_SIZE);
3639 DUMPREG(i, DISPC_OVL_ACCU0);
3640 DUMPREG(i, DISPC_OVL_ACCU1);
3641 if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
3642 DUMPREG(i, DISPC_OVL_BA0_UV);
3643 DUMPREG(i, DISPC_OVL_BA1_UV);
3644 DUMPREG(i, DISPC_OVL_FIR2);
3645 DUMPREG(i, DISPC_OVL_ACCU2_0);
3646 DUMPREG(i, DISPC_OVL_ACCU2_1);
3647 }
3648 if (dss_has_feature(FEAT_ATTR2))
3649 DUMPREG(i, DISPC_OVL_ATTRIBUTES2);
3650 }
3651
3557#undef DISPC_REG 3652#undef DISPC_REG
3558#undef DUMPREG 3653#undef DUMPREG
3559 3654
@@ -3626,8 +3721,8 @@ bool dispc_div_calc(unsigned long dispc,
3626 unsigned min_fck_per_pck; 3721 unsigned min_fck_per_pck;
3627 unsigned long fck; 3722 unsigned long fck;
3628 3723
3629#ifdef CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK 3724#ifdef CONFIG_FB_OMAP2_DSS_MIN_FCK_PER_PCK
3630 min_fck_per_pck = CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK; 3725 min_fck_per_pck = CONFIG_FB_OMAP2_DSS_MIN_FCK_PER_PCK;
3631#else 3726#else
3632 min_fck_per_pck = 0; 3727 min_fck_per_pck = 0;
3633#endif 3728#endif
@@ -3854,6 +3949,8 @@ static const struct dispc_features omap44xx_dispc_feats = {
3854 .num_fifos = 5, 3949 .num_fifos = 5,
3855 .gfx_fifo_workaround = true, 3950 .gfx_fifo_workaround = true,
3856 .set_max_preload = true, 3951 .set_max_preload = true,
3952 .supports_sync_align = true,
3953 .has_writeback = true,
3857}; 3954};
3858 3955
3859static const struct dispc_features omap54xx_dispc_feats = { 3956static const struct dispc_features omap54xx_dispc_feats = {
@@ -3875,6 +3972,8 @@ static const struct dispc_features omap54xx_dispc_feats = {
3875 .gfx_fifo_workaround = true, 3972 .gfx_fifo_workaround = true,
3876 .mstandby_workaround = true, 3973 .mstandby_workaround = true,
3877 .set_max_preload = true, 3974 .set_max_preload = true,
3975 .supports_sync_align = true,
3976 .has_writeback = true,
3878}; 3977};
3879 3978
3880static int dispc_init_features(struct platform_device *pdev) 3979static int dispc_init_features(struct platform_device *pdev)
diff --git a/drivers/video/fbdev/omap2/dss/dispc.h b/drivers/video/fbdev/omap2/omapfb/dss/dispc.h
index 3043d6e0a5f9..483744223dd1 100644
--- a/drivers/video/fbdev/omap2/dss/dispc.h
+++ b/drivers/video/fbdev/omap2/omapfb/dss/dispc.h
@@ -908,6 +908,8 @@ static inline u16 DISPC_MFLAG_THRESHOLD_OFFSET(enum omap_plane plane)
908 return 0x0868; 908 return 0x0868;
909 case OMAP_DSS_VIDEO3: 909 case OMAP_DSS_VIDEO3:
910 return 0x086c; 910 return 0x086c;
911 case OMAP_DSS_WB:
912 return 0x0870;
911 default: 913 default:
912 BUG(); 914 BUG();
913 return 0; 915 return 0;
diff --git a/drivers/video/fbdev/omap2/dss/dispc_coefs.c b/drivers/video/fbdev/omap2/omapfb/dss/dispc_coefs.c
index 038c15b04215..038c15b04215 100644
--- a/drivers/video/fbdev/omap2/dss/dispc_coefs.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/dispc_coefs.c
diff --git a/drivers/video/fbdev/omap2/dss/display-sysfs.c b/drivers/video/fbdev/omap2/omapfb/dss/display-sysfs.c
index 6ad0991f8259..75b5286029ee 100644
--- a/drivers/video/fbdev/omap2/dss/display-sysfs.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/display-sysfs.c
@@ -120,7 +120,7 @@ static ssize_t display_timings_store(struct omap_dss_device *dssdev,
120 return -ENOENT; 120 return -ENOENT;
121 121
122 found = 0; 122 found = 0;
123#ifdef CONFIG_OMAP2_DSS_VENC 123#ifdef CONFIG_FB_OMAP2_DSS_VENC
124 if (strncmp("pal", buf, 3) == 0) { 124 if (strncmp("pal", buf, 3) == 0) {
125 t = omap_dss_pal_timings; 125 t = omap_dss_pal_timings;
126 found = 1; 126 found = 1;
diff --git a/drivers/video/fbdev/omap2/dss/display.c b/drivers/video/fbdev/omap2/omapfb/dss/display.c
index ef5b9027985d..ef5b9027985d 100644
--- a/drivers/video/fbdev/omap2/dss/display.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/display.c
diff --git a/drivers/video/fbdev/omap2/dss/dpi.c b/drivers/video/fbdev/omap2/omapfb/dss/dpi.c
index fb45b6432968..7953e6a52346 100644
--- a/drivers/video/fbdev/omap2/dss/dpi.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/dpi.c
@@ -395,7 +395,7 @@ static int dpi_display_enable(struct omap_dss_device *dssdev)
395 goto err_no_reg; 395 goto err_no_reg;
396 } 396 }
397 397
398 if (out == NULL || out->manager == NULL) { 398 if (out->manager == NULL) {
399 DSSERR("failed to enable display: no output/manager\n"); 399 DSSERR("failed to enable display: no output/manager\n");
400 r = -ENODEV; 400 r = -ENODEV;
401 goto err_no_out_mgr; 401 goto err_no_out_mgr;
diff --git a/drivers/video/fbdev/omap2/dss/dsi.c b/drivers/video/fbdev/omap2/omapfb/dss/dsi.c
index b3606def5b7b..0eec073b3919 100644
--- a/drivers/video/fbdev/omap2/dss/dsi.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/dsi.c
@@ -144,7 +144,7 @@ struct dsi_reg { u16 module; u16 idx; };
144#define DSI_IRQ_TA_TIMEOUT (1 << 20) 144#define DSI_IRQ_TA_TIMEOUT (1 << 20)
145#define DSI_IRQ_ERROR_MASK \ 145#define DSI_IRQ_ERROR_MASK \
146 (DSI_IRQ_HS_TX_TIMEOUT | DSI_IRQ_LP_RX_TIMEOUT | DSI_IRQ_SYNC_LOST | \ 146 (DSI_IRQ_HS_TX_TIMEOUT | DSI_IRQ_LP_RX_TIMEOUT | DSI_IRQ_SYNC_LOST | \
147 DSI_IRQ_TA_TIMEOUT | DSI_IRQ_SYNC_LOST) 147 DSI_IRQ_TA_TIMEOUT)
148#define DSI_IRQ_CHANNEL_MASK 0xf 148#define DSI_IRQ_CHANNEL_MASK 0xf
149 149
150/* Virtual channel interrupts */ 150/* Virtual channel interrupts */
@@ -369,7 +369,7 @@ struct dsi_data {
369 int debug_read; 369 int debug_read;
370 int debug_write; 370 int debug_write;
371 371
372#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS 372#ifdef CONFIG_FB_OMAP2_DSS_COLLECT_IRQ_STATS
373 spinlock_t irq_stats_lock; 373 spinlock_t irq_stats_lock;
374 struct dsi_irq_stats irq_stats; 374 struct dsi_irq_stats irq_stats;
375#endif 375#endif
@@ -698,7 +698,7 @@ static void print_irq_status_cio(u32 status)
698#undef PIS 698#undef PIS
699} 699}
700 700
701#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS 701#ifdef CONFIG_FB_OMAP2_DSS_COLLECT_IRQ_STATS
702static void dsi_collect_irq_stats(struct platform_device *dsidev, u32 irqstatus, 702static void dsi_collect_irq_stats(struct platform_device *dsidev, u32 irqstatus,
703 u32 *vcstatus, u32 ciostatus) 703 u32 *vcstatus, u32 ciostatus)
704{ 704{
@@ -1551,7 +1551,7 @@ void dsi_dump_clocks(struct seq_file *s)
1551 } 1551 }
1552} 1552}
1553 1553
1554#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS 1554#ifdef CONFIG_FB_OMAP2_DSS_COLLECT_IRQ_STATS
1555static void dsi_dump_dsidev_irqs(struct platform_device *dsidev, 1555static void dsi_dump_dsidev_irqs(struct platform_device *dsidev,
1556 struct seq_file *s) 1556 struct seq_file *s)
1557{ 1557{
@@ -3833,7 +3833,7 @@ static int dsi_enable_video_output(struct omap_dss_device *dssdev, int channel)
3833 u16 word_count; 3833 u16 word_count;
3834 int r; 3834 int r;
3835 3835
3836 if (out == NULL || out->manager == NULL) { 3836 if (out->manager == NULL) {
3837 DSSERR("failed to enable display: no output/manager\n"); 3837 DSSERR("failed to enable display: no output/manager\n");
3838 return -ENODEV; 3838 return -ENODEV;
3839 } 3839 }
@@ -5296,7 +5296,7 @@ static int dsi_bind(struct device *dev, struct device *master, void *data)
5296 spin_lock_init(&dsi->errors_lock); 5296 spin_lock_init(&dsi->errors_lock);
5297 dsi->errors = 0; 5297 dsi->errors = 0;
5298 5298
5299#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS 5299#ifdef CONFIG_FB_OMAP2_DSS_COLLECT_IRQ_STATS
5300 spin_lock_init(&dsi->irq_stats_lock); 5300 spin_lock_init(&dsi->irq_stats_lock);
5301 dsi->irq_stats.last_reset = jiffies; 5301 dsi->irq_stats.last_reset = jiffies;
5302#endif 5302#endif
@@ -5468,7 +5468,7 @@ static int dsi_bind(struct device *dev, struct device *master, void *data)
5468 else if (dsi->module_id == 1) 5468 else if (dsi->module_id == 1)
5469 dss_debugfs_create_file("dsi2_regs", dsi2_dump_regs); 5469 dss_debugfs_create_file("dsi2_regs", dsi2_dump_regs);
5470 5470
5471#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS 5471#ifdef CONFIG_FB_OMAP2_DSS_COLLECT_IRQ_STATS
5472 if (dsi->module_id == 0) 5472 if (dsi->module_id == 0)
5473 dss_debugfs_create_file("dsi1_irqs", dsi1_dump_irqs); 5473 dss_debugfs_create_file("dsi1_irqs", dsi1_dump_irqs);
5474 else if (dsi->module_id == 1) 5474 else if (dsi->module_id == 1)
diff --git a/drivers/video/fbdev/omap2/dss/dss-of.c b/drivers/video/fbdev/omap2/omapfb/dss/dss-of.c
index bf407b6ba15c..bf407b6ba15c 100644
--- a/drivers/video/fbdev/omap2/dss/dss-of.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/dss-of.c
diff --git a/drivers/video/fbdev/omap2/dss/dss.c b/drivers/video/fbdev/omap2/omapfb/dss/dss.c
index 9200a8668b49..0078c4d1fc31 100644
--- a/drivers/video/fbdev/omap2/dss/dss.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/dss.c
@@ -793,12 +793,12 @@ void dss_runtime_put(void)
793} 793}
794 794
795/* DEBUGFS */ 795/* DEBUGFS */
796#if defined(CONFIG_OMAP2_DSS_DEBUGFS) 796#if defined(CONFIG_FB_OMAP2_DSS_DEBUGFS)
797void dss_debug_dump_clocks(struct seq_file *s) 797void dss_debug_dump_clocks(struct seq_file *s)
798{ 798{
799 dss_dump_clocks(s); 799 dss_dump_clocks(s);
800 dispc_dump_clocks(s); 800 dispc_dump_clocks(s);
801#ifdef CONFIG_OMAP2_DSS_DSI 801#ifdef CONFIG_FB_OMAP2_DSS_DSI
802 dsi_dump_clocks(s); 802 dsi_dump_clocks(s);
803#endif 803#endif
804} 804}
@@ -1144,7 +1144,7 @@ static int dss_bind(struct device *dev)
1144 1144
1145 dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK); 1145 dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
1146 1146
1147#ifdef CONFIG_OMAP2_DSS_VENC 1147#ifdef CONFIG_FB_OMAP2_DSS_VENC
1148 REG_FLD_MOD(DSS_CONTROL, 1, 4, 4); /* venc dac demen */ 1148 REG_FLD_MOD(DSS_CONTROL, 1, 4, 4); /* venc dac demen */
1149 REG_FLD_MOD(DSS_CONTROL, 1, 3, 3); /* venc clock 4x enable */ 1149 REG_FLD_MOD(DSS_CONTROL, 1, 3, 3); /* venc clock 4x enable */
1150 REG_FLD_MOD(DSS_CONTROL, 0, 2, 2); /* venc clock mode = normal */ 1150 REG_FLD_MOD(DSS_CONTROL, 0, 2, 2); /* venc clock mode = normal */
@@ -1264,12 +1264,18 @@ static int dss_runtime_suspend(struct device *dev)
1264{ 1264{
1265 dss_save_context(); 1265 dss_save_context();
1266 dss_set_min_bus_tput(dev, 0); 1266 dss_set_min_bus_tput(dev, 0);
1267
1268 pinctrl_pm_select_sleep_state(dev);
1269
1267 return 0; 1270 return 0;
1268} 1271}
1269 1272
1270static int dss_runtime_resume(struct device *dev) 1273static int dss_runtime_resume(struct device *dev)
1271{ 1274{
1272 int r; 1275 int r;
1276
1277 pinctrl_pm_select_default_state(dev);
1278
1273 /* 1279 /*
1274 * Set an arbitrarily high tput request to ensure OPP100. 1280 * Set an arbitrarily high tput request to ensure OPP100.
1275 * What we should really do is to make a request to stay in OPP100, 1281 * What we should really do is to make a request to stay in OPP100,
diff --git a/drivers/video/fbdev/omap2/dss/dss.h b/drivers/video/fbdev/omap2/omapfb/dss/dss.h
index 2406bcdb831a..b9066afee301 100644
--- a/drivers/video/fbdev/omap2/dss/dss.h
+++ b/drivers/video/fbdev/omap2/omapfb/dss/dss.h
@@ -278,7 +278,7 @@ void dss_video_pll_uninit(struct dss_pll *pll);
278struct device_node *dss_of_port_get_parent_device(struct device_node *port); 278struct device_node *dss_of_port_get_parent_device(struct device_node *port);
279u32 dss_of_port_get_port_number(struct device_node *port); 279u32 dss_of_port_get_port_number(struct device_node *port);
280 280
281#if defined(CONFIG_OMAP2_DSS_DEBUGFS) 281#if defined(CONFIG_FB_OMAP2_DSS_DEBUGFS)
282void dss_debug_dump_clocks(struct seq_file *s); 282void dss_debug_dump_clocks(struct seq_file *s);
283#endif 283#endif
284 284
@@ -311,7 +311,7 @@ bool dss_div_calc(unsigned long pck, unsigned long fck_min,
311int sdi_init_platform_driver(void) __init; 311int sdi_init_platform_driver(void) __init;
312void sdi_uninit_platform_driver(void); 312void sdi_uninit_platform_driver(void);
313 313
314#ifdef CONFIG_OMAP2_DSS_SDI 314#ifdef CONFIG_FB_OMAP2_DSS_SDI
315int sdi_init_port(struct platform_device *pdev, struct device_node *port); 315int sdi_init_port(struct platform_device *pdev, struct device_node *port);
316void sdi_uninit_port(struct device_node *port); 316void sdi_uninit_port(struct device_node *port);
317#else 317#else
@@ -327,7 +327,7 @@ static inline void sdi_uninit_port(struct device_node *port)
327 327
328/* DSI */ 328/* DSI */
329 329
330#ifdef CONFIG_OMAP2_DSS_DSI 330#ifdef CONFIG_FB_OMAP2_DSS_DSI
331 331
332struct dentry; 332struct dentry;
333struct file_operations; 333struct file_operations;
@@ -343,7 +343,8 @@ u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt);
343#else 343#else
344static inline u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt) 344static inline u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt)
345{ 345{
346 WARN("%s: DSI not compiled in, returning pixel_size as 0\n", __func__); 346 WARN(1, "%s: DSI not compiled in, returning pixel_size as 0\n",
347 __func__);
347 return 0; 348 return 0;
348} 349}
349#endif 350#endif
@@ -352,7 +353,7 @@ static inline u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt)
352int dpi_init_platform_driver(void) __init; 353int dpi_init_platform_driver(void) __init;
353void dpi_uninit_platform_driver(void); 354void dpi_uninit_platform_driver(void);
354 355
355#ifdef CONFIG_OMAP2_DSS_DPI 356#ifdef CONFIG_FB_OMAP2_DSS_DPI
356int dpi_init_port(struct platform_device *pdev, struct device_node *port); 357int dpi_init_port(struct platform_device *pdev, struct device_node *port);
357void dpi_uninit_port(struct device_node *port); 358void dpi_uninit_port(struct device_node *port);
358#else 359#else
@@ -378,7 +379,6 @@ void dispc_lcd_enable_signal(bool enable);
378void dispc_pck_free_enable(bool enable); 379void dispc_pck_free_enable(bool enable);
379void dispc_enable_fifomerge(bool enable); 380void dispc_enable_fifomerge(bool enable);
380void dispc_enable_gamma_table(bool enable); 381void dispc_enable_gamma_table(bool enable);
381void dispc_set_loadmode(enum omap_dss_load_mode mode);
382 382
383typedef bool (*dispc_div_calc_func)(int lckd, int pckd, unsigned long lck, 383typedef bool (*dispc_div_calc_func)(int lckd, int pckd, unsigned long lck,
384 unsigned long pck, void *data); 384 unsigned long pck, void *data);
@@ -388,7 +388,6 @@ bool dispc_div_calc(unsigned long dispc,
388 388
389bool dispc_mgr_timings_ok(enum omap_channel channel, 389bool dispc_mgr_timings_ok(enum omap_channel channel,
390 const struct omap_video_timings *timings); 390 const struct omap_video_timings *timings);
391unsigned long dispc_fclk_rate(void);
392int dispc_calc_clock_rates(unsigned long dispc_fclk_rate, 391int dispc_calc_clock_rates(unsigned long dispc_fclk_rate,
393 struct dispc_clock_info *cinfo); 392 struct dispc_clock_info *cinfo);
394 393
@@ -398,9 +397,6 @@ void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,
398 u32 *fifo_low, u32 *fifo_high, bool use_fifomerge, 397 u32 *fifo_low, u32 *fifo_high, bool use_fifomerge,
399 bool manual_update); 398 bool manual_update);
400 399
401unsigned long dispc_mgr_lclk_rate(enum omap_channel channel);
402unsigned long dispc_mgr_pclk_rate(enum omap_channel channel);
403unsigned long dispc_core_clk_rate(void);
404void dispc_mgr_set_clock_div(enum omap_channel channel, 400void dispc_mgr_set_clock_div(enum omap_channel channel,
405 const struct dispc_clock_info *cinfo); 401 const struct dispc_clock_info *cinfo);
406int dispc_mgr_get_clock_div(enum omap_channel channel, 402int dispc_mgr_get_clock_div(enum omap_channel channel,
@@ -432,7 +428,7 @@ int rfbi_init_platform_driver(void) __init;
432void rfbi_uninit_platform_driver(void); 428void rfbi_uninit_platform_driver(void);
433 429
434 430
435#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS 431#ifdef CONFIG_FB_OMAP2_DSS_COLLECT_IRQ_STATS
436static inline void dss_collect_irq_stats(u32 irqstatus, unsigned *irq_arr) 432static inline void dss_collect_irq_stats(u32 irqstatus, unsigned *irq_arr)
437{ 433{
438 int b; 434 int b;
diff --git a/drivers/video/fbdev/omap2/dss/dss_features.c b/drivers/video/fbdev/omap2/omapfb/dss/dss_features.c
index b0b6dfd657bf..c886a2927f73 100644
--- a/drivers/video/fbdev/omap2/dss/dss_features.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/dss_features.c
@@ -46,7 +46,6 @@ struct omap_dss_features {
46 46
47 const int num_mgrs; 47 const int num_mgrs;
48 const int num_ovls; 48 const int num_ovls;
49 const int num_wbs;
50 const enum omap_display_type *supported_displays; 49 const enum omap_display_type *supported_displays;
51 const enum omap_dss_output_id *supported_outputs; 50 const enum omap_dss_output_id *supported_outputs;
52 const enum omap_color_mode *supported_color_modes; 51 const enum omap_color_mode *supported_color_modes;
@@ -735,7 +734,6 @@ static const struct omap_dss_features omap4430_es1_0_dss_features = {
735 734
736 .num_mgrs = 3, 735 .num_mgrs = 3,
737 .num_ovls = 4, 736 .num_ovls = 4,
738 .num_wbs = 1,
739 .supported_displays = omap4_dss_supported_displays, 737 .supported_displays = omap4_dss_supported_displays,
740 .supported_outputs = omap4_dss_supported_outputs, 738 .supported_outputs = omap4_dss_supported_outputs,
741 .supported_color_modes = omap4_dss_supported_color_modes, 739 .supported_color_modes = omap4_dss_supported_color_modes,
@@ -757,7 +755,6 @@ static const struct omap_dss_features omap4430_es2_0_1_2_dss_features = {
757 755
758 .num_mgrs = 3, 756 .num_mgrs = 3,
759 .num_ovls = 4, 757 .num_ovls = 4,
760 .num_wbs = 1,
761 .supported_displays = omap4_dss_supported_displays, 758 .supported_displays = omap4_dss_supported_displays,
762 .supported_outputs = omap4_dss_supported_outputs, 759 .supported_outputs = omap4_dss_supported_outputs,
763 .supported_color_modes = omap4_dss_supported_color_modes, 760 .supported_color_modes = omap4_dss_supported_color_modes,
@@ -779,7 +776,6 @@ static const struct omap_dss_features omap4_dss_features = {
779 776
780 .num_mgrs = 3, 777 .num_mgrs = 3,
781 .num_ovls = 4, 778 .num_ovls = 4,
782 .num_wbs = 1,
783 .supported_displays = omap4_dss_supported_displays, 779 .supported_displays = omap4_dss_supported_displays,
784 .supported_outputs = omap4_dss_supported_outputs, 780 .supported_outputs = omap4_dss_supported_outputs,
785 .supported_color_modes = omap4_dss_supported_color_modes, 781 .supported_color_modes = omap4_dss_supported_color_modes,
@@ -825,11 +821,6 @@ int dss_feat_get_num_ovls(void)
825} 821}
826EXPORT_SYMBOL(dss_feat_get_num_ovls); 822EXPORT_SYMBOL(dss_feat_get_num_ovls);
827 823
828int dss_feat_get_num_wbs(void)
829{
830 return omap_current_dss_features->num_wbs;
831}
832
833unsigned long dss_feat_get_param_min(enum dss_range_param param) 824unsigned long dss_feat_get_param_min(enum dss_range_param param)
834{ 825{
835 return omap_current_dss_features->dss_params[param].min; 826 return omap_current_dss_features->dss_params[param].min;
@@ -844,13 +835,11 @@ enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel
844{ 835{
845 return omap_current_dss_features->supported_displays[channel]; 836 return omap_current_dss_features->supported_displays[channel];
846} 837}
847EXPORT_SYMBOL(dss_feat_get_supported_displays);
848 838
849enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel) 839enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel)
850{ 840{
851 return omap_current_dss_features->supported_outputs[channel]; 841 return omap_current_dss_features->supported_outputs[channel];
852} 842}
853EXPORT_SYMBOL(dss_feat_get_supported_outputs);
854 843
855enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane) 844enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane)
856{ 845{
diff --git a/drivers/video/fbdev/omap2/dss/dss_features.h b/drivers/video/fbdev/omap2/omapfb/dss/dss_features.h
index 100f7a2d0638..3d67d39f192f 100644
--- a/drivers/video/fbdev/omap2/dss/dss_features.h
+++ b/drivers/video/fbdev/omap2/omapfb/dss/dss_features.h
@@ -86,7 +86,6 @@ enum dss_range_param {
86}; 86};
87 87
88/* DSS Feature Functions */ 88/* DSS Feature Functions */
89int dss_feat_get_num_wbs(void);
90unsigned long dss_feat_get_param_min(enum dss_range_param param); 89unsigned long dss_feat_get_param_min(enum dss_range_param param);
91unsigned long dss_feat_get_param_max(enum dss_range_param param); 90unsigned long dss_feat_get_param_max(enum dss_range_param param);
92enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane); 91enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane);
@@ -102,4 +101,8 @@ bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type);
102bool dss_has_feature(enum dss_feat_id id); 101bool dss_has_feature(enum dss_feat_id id);
103void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end); 102void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end);
104void dss_features_init(enum omapdss_version version); 103void dss_features_init(enum omapdss_version version);
104
105enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
106enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel);
107
105#endif 108#endif
diff --git a/drivers/video/fbdev/omap2/dss/hdmi.h b/drivers/video/fbdev/omap2/omapfb/dss/hdmi.h
index 53616b02b613..53616b02b613 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi.h
+++ b/drivers/video/fbdev/omap2/omapfb/dss/hdmi.h
diff --git a/drivers/video/fbdev/omap2/dss/hdmi4.c b/drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
index 94c8d5549b4c..7103c659a534 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi4.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/hdmi4.c
@@ -343,7 +343,7 @@ static int hdmi_display_enable(struct omap_dss_device *dssdev)
343 343
344 mutex_lock(&hdmi.lock); 344 mutex_lock(&hdmi.lock);
345 345
346 if (out == NULL || out->manager == NULL) { 346 if (out->manager == NULL) {
347 DSSERR("failed to enable display: no output/manager\n"); 347 DSSERR("failed to enable display: no output/manager\n");
348 r = -ENODEV; 348 r = -ENODEV;
349 goto err0; 349 goto err0;
diff --git a/drivers/video/fbdev/omap2/dss/hdmi4_core.c b/drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c
index fa72e735dad2..fa72e735dad2 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi4_core.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.c
diff --git a/drivers/video/fbdev/omap2/dss/hdmi4_core.h b/drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.h
index a069f96ec6f6..a069f96ec6f6 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi4_core.h
+++ b/drivers/video/fbdev/omap2/omapfb/dss/hdmi4_core.h
diff --git a/drivers/video/fbdev/omap2/dss/hdmi5.c b/drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
index b59ba7902be1..a955a2c4c061 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi5.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c
@@ -373,7 +373,7 @@ static int hdmi_display_enable(struct omap_dss_device *dssdev)
373 373
374 mutex_lock(&hdmi.lock); 374 mutex_lock(&hdmi.lock);
375 375
376 if (out == NULL || out->manager == NULL) { 376 if (out->manager == NULL) {
377 DSSERR("failed to enable display: no output/manager\n"); 377 DSSERR("failed to enable display: no output/manager\n");
378 r = -ENODEV; 378 r = -ENODEV;
379 goto err0; 379 goto err0;
diff --git a/drivers/video/fbdev/omap2/dss/hdmi5_core.c b/drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c
index 8ea531d2652c..8ea531d2652c 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi5_core.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.c
diff --git a/drivers/video/fbdev/omap2/dss/hdmi5_core.h b/drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.h
index f2f1022c5516..f2f1022c5516 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi5_core.h
+++ b/drivers/video/fbdev/omap2/omapfb/dss/hdmi5_core.h
diff --git a/drivers/video/fbdev/omap2/dss/hdmi_common.c b/drivers/video/fbdev/omap2/omapfb/dss/hdmi_common.c
index 1b8fcc6c4ba1..1b8fcc6c4ba1 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi_common.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/hdmi_common.c
diff --git a/drivers/video/fbdev/omap2/dss/hdmi_phy.c b/drivers/video/fbdev/omap2/omapfb/dss/hdmi_phy.c
index 1f5d19c119ce..1f5d19c119ce 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi_phy.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/hdmi_phy.c
diff --git a/drivers/video/fbdev/omap2/dss/hdmi_pll.c b/drivers/video/fbdev/omap2/omapfb/dss/hdmi_pll.c
index 06e23a7c432c..06e23a7c432c 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi_pll.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/hdmi_pll.c
diff --git a/drivers/video/fbdev/omap2/dss/hdmi_wp.c b/drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c
index 7c544bc56fb5..7c544bc56fb5 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi_wp.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/hdmi_wp.c
diff --git a/drivers/video/fbdev/omap2/dss/manager-sysfs.c b/drivers/video/fbdev/omap2/omapfb/dss/manager-sysfs.c
index a7414fb12830..a7414fb12830 100644
--- a/drivers/video/fbdev/omap2/dss/manager-sysfs.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/manager-sysfs.c
diff --git a/drivers/video/fbdev/omap2/dss/manager.c b/drivers/video/fbdev/omap2/omapfb/dss/manager.c
index 1aac9b4191a9..08a67f4f6a20 100644
--- a/drivers/video/fbdev/omap2/dss/manager.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/manager.c
@@ -210,7 +210,7 @@ static int dss_mgr_check_lcd_config(struct omap_overlay_manager *mgr,
210 return -EINVAL; 210 return -EINVAL;
211 211
212 /* fifohandcheck should be used only with stallmode */ 212 /* fifohandcheck should be used only with stallmode */
213 if (stallmode == false && fifohandcheck == true) 213 if (!stallmode && fifohandcheck)
214 return -EINVAL; 214 return -EINVAL;
215 215
216 /* 216 /*
diff --git a/drivers/video/fbdev/omap2/dss/omapdss-boot-init.c b/drivers/video/fbdev/omap2/omapfb/dss/omapdss-boot-init.c
index 8b6f6d5fdd68..136d30484d02 100644
--- a/drivers/video/fbdev/omap2/dss/omapdss-boot-init.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/omapdss-boot-init.c
@@ -199,10 +199,8 @@ static int __init omapdss_boot_init(void)
199 omapdss_walk_device(dss, true); 199 omapdss_walk_device(dss, true);
200 200
201 for_each_available_child_of_node(dss, child) { 201 for_each_available_child_of_node(dss, child) {
202 if (!of_find_property(child, "compatible", NULL)) { 202 if (!of_find_property(child, "compatible", NULL))
203 of_node_put(child);
204 continue; 203 continue;
205 }
206 204
207 omapdss_walk_device(child, true); 205 omapdss_walk_device(child, true);
208 } 206 }
diff --git a/drivers/video/fbdev/omap2/dss/output.c b/drivers/video/fbdev/omap2/omapfb/dss/output.c
index 16072159bd24..16072159bd24 100644
--- a/drivers/video/fbdev/omap2/dss/output.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/output.c
diff --git a/drivers/video/fbdev/omap2/dss/overlay-sysfs.c b/drivers/video/fbdev/omap2/omapfb/dss/overlay-sysfs.c
index 4cc5ddebfb34..4cc5ddebfb34 100644
--- a/drivers/video/fbdev/omap2/dss/overlay-sysfs.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/overlay-sysfs.c
diff --git a/drivers/video/fbdev/omap2/dss/overlay.c b/drivers/video/fbdev/omap2/omapfb/dss/overlay.c
index 2f7cee985cdd..2f7cee985cdd 100644
--- a/drivers/video/fbdev/omap2/dss/overlay.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/overlay.c
diff --git a/drivers/video/fbdev/omap2/dss/pll.c b/drivers/video/fbdev/omap2/omapfb/dss/pll.c
index f974ddcd3b6e..f974ddcd3b6e 100644
--- a/drivers/video/fbdev/omap2/dss/pll.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/pll.c
diff --git a/drivers/video/fbdev/omap2/dss/rfbi.c b/drivers/video/fbdev/omap2/omapfb/dss/rfbi.c
index 1525a494d057..aea6a1d0fb20 100644
--- a/drivers/video/fbdev/omap2/dss/rfbi.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/rfbi.c
@@ -880,7 +880,7 @@ static int rfbi_display_enable(struct omap_dss_device *dssdev)
880 struct omap_dss_device *out = &rfbi.output; 880 struct omap_dss_device *out = &rfbi.output;
881 int r; 881 int r;
882 882
883 if (out == NULL || out->manager == NULL) { 883 if (out->manager == NULL) {
884 DSSERR("failed to enable display: no output/manager\n"); 884 DSSERR("failed to enable display: no output/manager\n");
885 return -ENODEV; 885 return -ENODEV;
886 } 886 }
diff --git a/drivers/video/fbdev/omap2/dss/sdi.c b/drivers/video/fbdev/omap2/omapfb/dss/sdi.c
index 5843580a1deb..d747cc6b59e1 100644
--- a/drivers/video/fbdev/omap2/dss/sdi.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/sdi.c
@@ -136,7 +136,7 @@ static int sdi_display_enable(struct omap_dss_device *dssdev)
136 unsigned long pck; 136 unsigned long pck;
137 int r; 137 int r;
138 138
139 if (out == NULL || out->manager == NULL) { 139 if (out->manager == NULL) {
140 DSSERR("failed to enable display: no output/manager\n"); 140 DSSERR("failed to enable display: no output/manager\n");
141 return -ENODEV; 141 return -ENODEV;
142 } 142 }
diff --git a/drivers/video/fbdev/omap2/dss/venc.c b/drivers/video/fbdev/omap2/omapfb/dss/venc.c
index d05a54922ba6..26e0ee30adf8 100644
--- a/drivers/video/fbdev/omap2/dss/venc.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/venc.c
@@ -275,12 +275,6 @@ const struct omap_video_timings omap_dss_pal_timings = {
275 .vbp = 41, 275 .vbp = 41,
276 276
277 .interlace = true, 277 .interlace = true,
278
279 .hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
280 .vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
281 .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
282 .de_level = OMAPDSS_SIG_ACTIVE_HIGH,
283 .sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
284}; 278};
285EXPORT_SYMBOL(omap_dss_pal_timings); 279EXPORT_SYMBOL(omap_dss_pal_timings);
286 280
@@ -296,12 +290,6 @@ const struct omap_video_timings omap_dss_ntsc_timings = {
296 .vbp = 31, 290 .vbp = 31,
297 291
298 .interlace = true, 292 .interlace = true,
299
300 .hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
301 .vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
302 .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
303 .de_level = OMAPDSS_SIG_ACTIVE_HIGH,
304 .sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
305}; 293};
306EXPORT_SYMBOL(omap_dss_ntsc_timings); 294EXPORT_SYMBOL(omap_dss_ntsc_timings);
307 295
@@ -400,7 +388,7 @@ static void venc_reset(void)
400 } 388 }
401 } 389 }
402 390
403#ifdef CONFIG_OMAP2_DSS_SLEEP_AFTER_VENC_RESET 391#ifdef CONFIG_FB_OMAP2_DSS_SLEEP_AFTER_VENC_RESET
404 /* the magical sleep that makes things work */ 392 /* the magical sleep that makes things work */
405 /* XXX more info? What bug this circumvents? */ 393 /* XXX more info? What bug this circumvents? */
406 msleep(20); 394 msleep(20);
@@ -515,7 +503,7 @@ static int venc_display_enable(struct omap_dss_device *dssdev)
515 503
516 mutex_lock(&venc.venc_lock); 504 mutex_lock(&venc.venc_lock);
517 505
518 if (out == NULL || out->manager == NULL) { 506 if (out->manager == NULL) {
519 DSSERR("Failed to enable display: no output/manager\n"); 507 DSSERR("Failed to enable display: no output/manager\n");
520 r = -ENODEV; 508 r = -ENODEV;
521 goto err0; 509 goto err0;
diff --git a/drivers/video/fbdev/omap2/dss/video-pll.c b/drivers/video/fbdev/omap2/omapfb/dss/video-pll.c
index b1ec59e42940..b1ec59e42940 100644
--- a/drivers/video/fbdev/omap2/dss/video-pll.c
+++ b/drivers/video/fbdev/omap2/omapfb/dss/video-pll.c
diff --git a/drivers/video/fbdev/omap2/vrfb.c b/drivers/video/fbdev/omap2/omapfb/vrfb.c
index f346b02eee1d..f346b02eee1d 100644
--- a/drivers/video/fbdev/omap2/vrfb.c
+++ b/drivers/video/fbdev/omap2/omapfb/vrfb.c
diff --git a/drivers/video/fbdev/pxafb.c b/drivers/video/fbdev/pxafb.c
index 94813af97f09..33b2bb315a2a 100644
--- a/drivers/video/fbdev/pxafb.c
+++ b/drivers/video/fbdev/pxafb.c
@@ -55,6 +55,9 @@
55#include <linux/kthread.h> 55#include <linux/kthread.h>
56#include <linux/freezer.h> 56#include <linux/freezer.h>
57#include <linux/console.h> 57#include <linux/console.h>
58#include <linux/of_graph.h>
59#include <video/of_display_timing.h>
60#include <video/videomode.h>
58 61
59#include <mach/hardware.h> 62#include <mach/hardware.h>
60#include <asm/io.h> 63#include <asm/io.h>
@@ -457,7 +460,7 @@ static int pxafb_adjust_timing(struct pxafb_info *fbi,
457static int pxafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) 460static int pxafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
458{ 461{
459 struct pxafb_info *fbi = container_of(info, struct pxafb_info, fb); 462 struct pxafb_info *fbi = container_of(info, struct pxafb_info, fb);
460 struct pxafb_mach_info *inf = dev_get_platdata(fbi->dev); 463 struct pxafb_mach_info *inf = fbi->inf;
461 int err; 464 int err;
462 465
463 if (inf->fixed_modes) { 466 if (inf->fixed_modes) {
@@ -1230,7 +1233,7 @@ static unsigned int __smart_timing(unsigned time_ns, unsigned long lcd_clk)
1230static void setup_smart_timing(struct pxafb_info *fbi, 1233static void setup_smart_timing(struct pxafb_info *fbi,
1231 struct fb_var_screeninfo *var) 1234 struct fb_var_screeninfo *var)
1232{ 1235{
1233 struct pxafb_mach_info *inf = dev_get_platdata(fbi->dev); 1236 struct pxafb_mach_info *inf = fbi->inf;
1234 struct pxafb_mode_info *mode = &inf->modes[0]; 1237 struct pxafb_mode_info *mode = &inf->modes[0];
1235 unsigned long lclk = clk_get_rate(fbi->clk); 1238 unsigned long lclk = clk_get_rate(fbi->clk);
1236 unsigned t1, t2, t3, t4; 1239 unsigned t1, t2, t3, t4;
@@ -1258,14 +1261,13 @@ static void setup_smart_timing(struct pxafb_info *fbi,
1258static int pxafb_smart_thread(void *arg) 1261static int pxafb_smart_thread(void *arg)
1259{ 1262{
1260 struct pxafb_info *fbi = arg; 1263 struct pxafb_info *fbi = arg;
1261 struct pxafb_mach_info *inf = dev_get_platdata(fbi->dev); 1264 struct pxafb_mach_info *inf = fbi->inf;
1262 1265
1263 if (!inf->smart_update) { 1266 if (!inf->smart_update) {
1264 pr_err("%s: not properly initialized, thread terminated\n", 1267 pr_err("%s: not properly initialized, thread terminated\n",
1265 __func__); 1268 __func__);
1266 return -EINVAL; 1269 return -EINVAL;
1267 } 1270 }
1268 inf = dev_get_platdata(fbi->dev);
1269 1271
1270 pr_debug("%s(): task starting\n", __func__); 1272 pr_debug("%s(): task starting\n", __func__);
1271 1273
@@ -1788,11 +1790,11 @@ decode_mode:
1788 fbi->video_mem_size = video_mem_size; 1790 fbi->video_mem_size = video_mem_size;
1789} 1791}
1790 1792
1791static struct pxafb_info *pxafb_init_fbinfo(struct device *dev) 1793static struct pxafb_info *pxafb_init_fbinfo(struct device *dev,
1794 struct pxafb_mach_info *inf)
1792{ 1795{
1793 struct pxafb_info *fbi; 1796 struct pxafb_info *fbi;
1794 void *addr; 1797 void *addr;
1795 struct pxafb_mach_info *inf = dev_get_platdata(dev);
1796 1798
1797 /* Alloc the pxafb_info and pseudo_palette in one step */ 1799 /* Alloc the pxafb_info and pseudo_palette in one step */
1798 fbi = kmalloc(sizeof(struct pxafb_info) + sizeof(u32) * 16, GFP_KERNEL); 1800 fbi = kmalloc(sizeof(struct pxafb_info) + sizeof(u32) * 16, GFP_KERNEL);
@@ -1801,6 +1803,7 @@ static struct pxafb_info *pxafb_init_fbinfo(struct device *dev)
1801 1803
1802 memset(fbi, 0, sizeof(struct pxafb_info)); 1804 memset(fbi, 0, sizeof(struct pxafb_info));
1803 fbi->dev = dev; 1805 fbi->dev = dev;
1806 fbi->inf = inf;
1804 1807
1805 fbi->clk = clk_get(dev, NULL); 1808 fbi->clk = clk_get(dev, NULL);
1806 if (IS_ERR(fbi->clk)) { 1809 if (IS_ERR(fbi->clk)) {
@@ -1852,10 +1855,9 @@ static struct pxafb_info *pxafb_init_fbinfo(struct device *dev)
1852} 1855}
1853 1856
1854#ifdef CONFIG_FB_PXA_PARAMETERS 1857#ifdef CONFIG_FB_PXA_PARAMETERS
1855static int parse_opt_mode(struct device *dev, const char *this_opt) 1858static int parse_opt_mode(struct device *dev, const char *this_opt,
1859 struct pxafb_mach_info *inf)
1856{ 1860{
1857 struct pxafb_mach_info *inf = dev_get_platdata(dev);
1858
1859 const char *name = this_opt+5; 1861 const char *name = this_opt+5;
1860 unsigned int namelen = strlen(name); 1862 unsigned int namelen = strlen(name);
1861 int res_specified = 0, bpp_specified = 0; 1863 int res_specified = 0, bpp_specified = 0;
@@ -1911,9 +1913,9 @@ done:
1911 return 0; 1913 return 0;
1912} 1914}
1913 1915
1914static int parse_opt(struct device *dev, char *this_opt) 1916static int parse_opt(struct device *dev, char *this_opt,
1917 struct pxafb_mach_info *inf)
1915{ 1918{
1916 struct pxafb_mach_info *inf = dev_get_platdata(dev);
1917 struct pxafb_mode_info *mode = &inf->modes[0]; 1919 struct pxafb_mode_info *mode = &inf->modes[0];
1918 char s[64]; 1920 char s[64];
1919 1921
@@ -1922,7 +1924,7 @@ static int parse_opt(struct device *dev, char *this_opt)
1922 if (!strncmp(this_opt, "vmem:", 5)) { 1924 if (!strncmp(this_opt, "vmem:", 5)) {
1923 video_mem_size = memparse(this_opt + 5, NULL); 1925 video_mem_size = memparse(this_opt + 5, NULL);
1924 } else if (!strncmp(this_opt, "mode:", 5)) { 1926 } else if (!strncmp(this_opt, "mode:", 5)) {
1925 return parse_opt_mode(dev, this_opt); 1927 return parse_opt_mode(dev, this_opt, inf);
1926 } else if (!strncmp(this_opt, "pixclock:", 9)) { 1928 } else if (!strncmp(this_opt, "pixclock:", 9)) {
1927 mode->pixclock = simple_strtoul(this_opt+9, NULL, 0); 1929 mode->pixclock = simple_strtoul(this_opt+9, NULL, 0);
1928 sprintf(s, "pixclock: %ld\n", mode->pixclock); 1930 sprintf(s, "pixclock: %ld\n", mode->pixclock);
@@ -2011,7 +2013,8 @@ static int parse_opt(struct device *dev, char *this_opt)
2011 return 0; 2013 return 0;
2012} 2014}
2013 2015
2014static int pxafb_parse_options(struct device *dev, char *options) 2016static int pxafb_parse_options(struct device *dev, char *options,
2017 struct pxafb_mach_info *inf)
2015{ 2018{
2016 char *this_opt; 2019 char *this_opt;
2017 int ret; 2020 int ret;
@@ -2023,7 +2026,7 @@ static int pxafb_parse_options(struct device *dev, char *options)
2023 2026
2024 /* could be made table driven or similar?... */ 2027 /* could be made table driven or similar?... */
2025 while ((this_opt = strsep(&options, ",")) != NULL) { 2028 while ((this_opt = strsep(&options, ",")) != NULL) {
2026 ret = parse_opt(dev, this_opt); 2029 ret = parse_opt(dev, this_opt, inf);
2027 if (ret) 2030 if (ret)
2028 return ret; 2031 return ret;
2029 } 2032 }
@@ -2092,22 +2095,180 @@ static void pxafb_check_options(struct device *dev, struct pxafb_mach_info *inf)
2092#define pxafb_check_options(...) do {} while (0) 2095#define pxafb_check_options(...) do {} while (0)
2093#endif 2096#endif
2094 2097
2098#if defined(CONFIG_OF)
2099static const char * const lcd_types[] = {
2100 "unknown", "mono-stn", "mono-dstn", "color-stn", "color-dstn",
2101 "color-tft", "smart-panel", NULL
2102};
2103
2104static int of_get_pxafb_display(struct device *dev, struct device_node *disp,
2105 struct pxafb_mach_info *info, u32 bus_width)
2106{
2107 struct display_timings *timings;
2108 struct videomode vm;
2109 int i, ret = -EINVAL;
2110 const char *s;
2111
2112 ret = of_property_read_string(disp, "lcd-type", &s);
2113 if (ret)
2114 s = "color-tft";
2115
2116 for (i = 0; lcd_types[i]; i++)
2117 if (!strcmp(s, lcd_types[i]))
2118 break;
2119 if (!i || !lcd_types[i]) {
2120 dev_err(dev, "lcd-type %s is unknown\n", s);
2121 return -EINVAL;
2122 }
2123 info->lcd_conn |= LCD_CONN_TYPE(i);
2124 info->lcd_conn |= LCD_CONN_WIDTH(bus_width);
2125
2126 timings = of_get_display_timings(disp);
2127 if (!timings)
2128 goto out;
2129
2130 ret = -ENOMEM;
2131 info->modes = kmalloc_array(timings->num_timings,
2132 sizeof(info->modes[0]), GFP_KERNEL);
2133 if (!info->modes)
2134 goto out;
2135 info->num_modes = timings->num_timings;
2136
2137 for (i = 0; i < timings->num_timings; i++) {
2138 ret = videomode_from_timings(timings, &vm, i);
2139 if (ret) {
2140 dev_err(dev, "videomode_from_timings %d failed: %d\n",
2141 i, ret);
2142 goto out;
2143 }
2144 if (vm.flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)
2145 info->lcd_conn |= LCD_PCLK_EDGE_RISE;
2146 if (vm.flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
2147 info->lcd_conn |= LCD_PCLK_EDGE_FALL;
2148 if (vm.flags & DISPLAY_FLAGS_DE_HIGH)
2149 info->lcd_conn |= LCD_BIAS_ACTIVE_HIGH;
2150 if (vm.flags & DISPLAY_FLAGS_DE_LOW)
2151 info->lcd_conn |= LCD_BIAS_ACTIVE_LOW;
2152 if (vm.flags & DISPLAY_FLAGS_HSYNC_HIGH)
2153 info->modes[i].sync |= FB_SYNC_HOR_HIGH_ACT;
2154 if (vm.flags & DISPLAY_FLAGS_VSYNC_HIGH)
2155 info->modes[i].sync |= FB_SYNC_VERT_HIGH_ACT;
2156
2157 info->modes[i].pixclock = 1000000000UL / (vm.pixelclock / 1000);
2158 info->modes[i].xres = vm.hactive;
2159 info->modes[i].yres = vm.vactive;
2160 info->modes[i].hsync_len = vm.hsync_len;
2161 info->modes[i].left_margin = vm.hback_porch;
2162 info->modes[i].right_margin = vm.hfront_porch;
2163 info->modes[i].vsync_len = vm.vsync_len;
2164 info->modes[i].upper_margin = vm.vback_porch;
2165 info->modes[i].lower_margin = vm.vfront_porch;
2166 }
2167 ret = 0;
2168
2169out:
2170 display_timings_release(timings);
2171 return ret;
2172}
2173
2174static int of_get_pxafb_mode_info(struct device *dev,
2175 struct pxafb_mach_info *info)
2176{
2177 struct device_node *display, *np;
2178 u32 bus_width;
2179 int ret, i;
2180
2181 np = of_graph_get_next_endpoint(dev->of_node, NULL);
2182 if (!np) {
2183 dev_err(dev, "could not find endpoint\n");
2184 return -EINVAL;
2185 }
2186 ret = of_property_read_u32(np, "bus-width", &bus_width);
2187 if (ret) {
2188 dev_err(dev, "no bus-width specified: %d\n", ret);
2189 return ret;
2190 }
2191
2192 display = of_graph_get_remote_port_parent(np);
2193 of_node_put(np);
2194 if (!display) {
2195 dev_err(dev, "no display defined\n");
2196 return -EINVAL;
2197 }
2198
2199 ret = of_get_pxafb_display(dev, display, info, bus_width);
2200 of_node_put(display);
2201 if (ret)
2202 return ret;
2203
2204 for (i = 0; i < info->num_modes; i++)
2205 info->modes[i].bpp = bus_width;
2206
2207 return 0;
2208}
2209
2210static struct pxafb_mach_info *of_pxafb_of_mach_info(struct device *dev)
2211{
2212 int ret;
2213 struct pxafb_mach_info *info;
2214
2215 if (!dev->of_node)
2216 return NULL;
2217 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
2218 if (!info)
2219 return ERR_PTR(-ENOMEM);
2220 ret = of_get_pxafb_mode_info(dev, info);
2221 if (ret) {
2222 kfree(info->modes);
2223 return ERR_PTR(ret);
2224 }
2225
2226 /*
2227 * On purpose, neither lccrX registers nor video memory size can be
2228 * specified through device-tree, they are considered more a debug hack
2229 * available through command line.
2230 */
2231 return info;
2232}
2233#else
2234static struct pxafb_mach_info *of_pxafb_of_mach_info(struct device *dev)
2235{
2236 return NULL;
2237}
2238#endif
2239
2095static int pxafb_probe(struct platform_device *dev) 2240static int pxafb_probe(struct platform_device *dev)
2096{ 2241{
2097 struct pxafb_info *fbi; 2242 struct pxafb_info *fbi;
2098 struct pxafb_mach_info *inf; 2243 struct pxafb_mach_info *inf, *pdata;
2099 struct resource *r; 2244 struct resource *r;
2100 int irq, ret; 2245 int i, irq, ret;
2101 2246
2102 dev_dbg(&dev->dev, "pxafb_probe\n"); 2247 dev_dbg(&dev->dev, "pxafb_probe\n");
2103 2248
2104 inf = dev_get_platdata(&dev->dev);
2105 ret = -ENOMEM; 2249 ret = -ENOMEM;
2106 fbi = NULL; 2250 pdata = dev_get_platdata(&dev->dev);
2251 inf = devm_kmalloc(&dev->dev, sizeof(*inf), GFP_KERNEL);
2107 if (!inf) 2252 if (!inf)
2108 goto failed; 2253 goto failed;
2109 2254
2110 ret = pxafb_parse_options(&dev->dev, g_options); 2255 if (pdata) {
2256 *inf = *pdata;
2257 inf->modes =
2258 devm_kmalloc_array(&dev->dev, pdata->num_modes,
2259 sizeof(inf->modes[0]), GFP_KERNEL);
2260 if (!inf->modes)
2261 goto failed;
2262 for (i = 0; i < inf->num_modes; i++)
2263 inf->modes[i] = pdata->modes[i];
2264 }
2265
2266 if (!pdata)
2267 inf = of_pxafb_of_mach_info(&dev->dev);
2268 if (IS_ERR_OR_NULL(inf))
2269 goto failed;
2270
2271 ret = pxafb_parse_options(&dev->dev, g_options, inf);
2111 if (ret < 0) 2272 if (ret < 0)
2112 goto failed; 2273 goto failed;
2113 2274
@@ -2125,7 +2286,7 @@ static int pxafb_probe(struct platform_device *dev)
2125 goto failed; 2286 goto failed;
2126 } 2287 }
2127 2288
2128 fbi = pxafb_init_fbinfo(&dev->dev); 2289 fbi = pxafb_init_fbinfo(&dev->dev, inf);
2129 if (!fbi) { 2290 if (!fbi) {
2130 /* only reason for pxafb_init_fbinfo to fail is kmalloc */ 2291 /* only reason for pxafb_init_fbinfo to fail is kmalloc */
2131 dev_err(&dev->dev, "Failed to initialize framebuffer device\n"); 2292 dev_err(&dev->dev, "Failed to initialize framebuffer device\n");
@@ -2299,11 +2460,20 @@ static int pxafb_remove(struct platform_device *dev)
2299 return 0; 2460 return 0;
2300} 2461}
2301 2462
2463static const struct of_device_id pxafb_of_dev_id[] = {
2464 { .compatible = "marvell,pxa270-lcdc", },
2465 { .compatible = "marvell,pxa300-lcdc", },
2466 { .compatible = "marvell,pxa2xx-lcdc", },
2467 { /* sentinel */ }
2468};
2469MODULE_DEVICE_TABLE(of, pxafb_of_dev_id);
2470
2302static struct platform_driver pxafb_driver = { 2471static struct platform_driver pxafb_driver = {
2303 .probe = pxafb_probe, 2472 .probe = pxafb_probe,
2304 .remove = pxafb_remove, 2473 .remove = pxafb_remove,
2305 .driver = { 2474 .driver = {
2306 .name = "pxa2xx-fb", 2475 .name = "pxa2xx-fb",
2476 .of_match_table = pxafb_of_dev_id,
2307#ifdef CONFIG_PM 2477#ifdef CONFIG_PM
2308 .pm = &pxafb_pm_ops, 2478 .pm = &pxafb_pm_ops,
2309#endif 2479#endif
diff --git a/drivers/video/fbdev/pxafb.h b/drivers/video/fbdev/pxafb.h
index 26ba9fa3f737..5dc414e26fc8 100644
--- a/drivers/video/fbdev/pxafb.h
+++ b/drivers/video/fbdev/pxafb.h
@@ -167,6 +167,8 @@ struct pxafb_info {
167 167
168 void (*lcd_power)(int, struct fb_var_screeninfo *); 168 void (*lcd_power)(int, struct fb_var_screeninfo *);
169 void (*backlight_power)(int); 169 void (*backlight_power)(int);
170
171 struct pxafb_mach_info *inf;
170}; 172};
171 173
172#define TO_INF(ptr,member) container_of(ptr,struct pxafb_info,member) 174#define TO_INF(ptr,member) container_of(ptr,struct pxafb_info,member)
diff --git a/drivers/video/fbdev/riva/fbdev.c b/drivers/video/fbdev/riva/fbdev.c
index f1ad2747064b..2ef26ad99341 100644
--- a/drivers/video/fbdev/riva/fbdev.c
+++ b/drivers/video/fbdev/riva/fbdev.c
@@ -1765,6 +1765,7 @@ static int riva_get_EDID_i2c(struct fb_info *info)
1765 int i; 1765 int i;
1766 1766
1767 NVTRACE_ENTER(); 1767 NVTRACE_ENTER();
1768 par->riva.LockUnlock(&par->riva, 0);
1768 riva_create_i2c_busses(par); 1769 riva_create_i2c_busses(par);
1769 for (i = 0; i < 3; i++) { 1770 for (i = 0; i < 3; i++) {
1770 if (!par->chan[i].par) 1771 if (!par->chan[i].par)
diff --git a/drivers/video/fbdev/sh_mobile_hdmi.c b/drivers/video/fbdev/sh_mobile_hdmi.c
deleted file mode 100644
index 7c72a3f02056..000000000000
--- a/drivers/video/fbdev/sh_mobile_hdmi.c
+++ /dev/null
@@ -1,1489 +0,0 @@
1/*
2 * SH-Mobile High-Definition Multimedia Interface (HDMI) driver
3 * for SLISHDMI13T and SLIPHDMIT IP cores
4 *
5 * Copyright (C) 2010, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/clk.h>
13#include <linux/console.h>
14#include <linux/delay.h>
15#include <linux/err.h>
16#include <linux/init.h>
17#include <linux/interrupt.h>
18#include <linux/io.h>
19#include <linux/module.h>
20#include <linux/platform_device.h>
21#include <linux/pm_runtime.h>
22#include <linux/slab.h>
23#include <linux/types.h>
24#include <linux/workqueue.h>
25#include <sound/soc.h>
26#include <sound/soc-dapm.h>
27#include <sound/initval.h>
28
29#include <video/sh_mobile_hdmi.h>
30#include <video/sh_mobile_lcdc.h>
31
32#include "sh_mobile_lcdcfb.h"
33
34/* HDMI Core Control Register (HTOP0) */
35#define HDMI_SYSTEM_CTRL 0x00 /* System control */
36#define HDMI_L_R_DATA_SWAP_CTRL_RPKT 0x01 /* L/R data swap control,
37 bits 19..16 of 20-bit N for Audio Clock Regeneration packet */
38#define HDMI_20_BIT_N_FOR_AUDIO_RPKT_15_8 0x02 /* bits 15..8 of 20-bit N for Audio Clock Regeneration packet */
39#define HDMI_20_BIT_N_FOR_AUDIO_RPKT_7_0 0x03 /* bits 7..0 of 20-bit N for Audio Clock Regeneration packet */
40#define HDMI_SPDIF_AUDIO_SAMP_FREQ_CTS 0x04 /* SPDIF audio sampling frequency,
41 bits 19..16 of Internal CTS */
42#define HDMI_INTERNAL_CTS_15_8 0x05 /* bits 15..8 of Internal CTS */
43#define HDMI_INTERNAL_CTS_7_0 0x06 /* bits 7..0 of Internal CTS */
44#define HDMI_EXTERNAL_CTS_19_16 0x07 /* External CTS */
45#define HDMI_EXTERNAL_CTS_15_8 0x08 /* External CTS */
46#define HDMI_EXTERNAL_CTS_7_0 0x09 /* External CTS */
47#define HDMI_AUDIO_SETTING_1 0x0A /* Audio setting.1 */
48#define HDMI_AUDIO_SETTING_2 0x0B /* Audio setting.2 */
49#define HDMI_I2S_AUDIO_SET 0x0C /* I2S audio setting */
50#define HDMI_DSD_AUDIO_SET 0x0D /* DSD audio setting */
51#define HDMI_DEBUG_MONITOR_1 0x0E /* Debug monitor.1 */
52#define HDMI_DEBUG_MONITOR_2 0x0F /* Debug monitor.2 */
53#define HDMI_I2S_INPUT_PIN_SWAP 0x10 /* I2S input pin swap */
54#define HDMI_AUDIO_STATUS_BITS_SETTING_1 0x11 /* Audio status bits setting.1 */
55#define HDMI_AUDIO_STATUS_BITS_SETTING_2 0x12 /* Audio status bits setting.2 */
56#define HDMI_CATEGORY_CODE 0x13 /* Category code */
57#define HDMI_SOURCE_NUM_AUDIO_WORD_LEN 0x14 /* Source number/Audio word length */
58#define HDMI_AUDIO_VIDEO_SETTING_1 0x15 /* Audio/Video setting.1 */
59#define HDMI_VIDEO_SETTING_1 0x16 /* Video setting.1 */
60#define HDMI_DEEP_COLOR_MODES 0x17 /* Deep Color Modes */
61
62/* 12 16- and 10-bit Color space conversion parameters: 0x18..0x2f */
63#define HDMI_COLOR_SPACE_CONVERSION_PARAMETERS 0x18
64
65#define HDMI_EXTERNAL_VIDEO_PARAM_SETTINGS 0x30 /* External video parameter settings */
66#define HDMI_EXTERNAL_H_TOTAL_7_0 0x31 /* External horizontal total (LSB) */
67#define HDMI_EXTERNAL_H_TOTAL_11_8 0x32 /* External horizontal total (MSB) */
68#define HDMI_EXTERNAL_H_BLANK_7_0 0x33 /* External horizontal blank (LSB) */
69#define HDMI_EXTERNAL_H_BLANK_9_8 0x34 /* External horizontal blank (MSB) */
70#define HDMI_EXTERNAL_H_DELAY_7_0 0x35 /* External horizontal delay (LSB) */
71#define HDMI_EXTERNAL_H_DELAY_9_8 0x36 /* External horizontal delay (MSB) */
72#define HDMI_EXTERNAL_H_DURATION_7_0 0x37 /* External horizontal duration (LSB) */
73#define HDMI_EXTERNAL_H_DURATION_9_8 0x38 /* External horizontal duration (MSB) */
74#define HDMI_EXTERNAL_V_TOTAL_7_0 0x39 /* External vertical total (LSB) */
75#define HDMI_EXTERNAL_V_TOTAL_9_8 0x3A /* External vertical total (MSB) */
76#define HDMI_AUDIO_VIDEO_SETTING_2 0x3B /* Audio/Video setting.2 */
77#define HDMI_EXTERNAL_V_BLANK 0x3D /* External vertical blank */
78#define HDMI_EXTERNAL_V_DELAY 0x3E /* External vertical delay */
79#define HDMI_EXTERNAL_V_DURATION 0x3F /* External vertical duration */
80#define HDMI_CTRL_PKT_MANUAL_SEND_CONTROL 0x40 /* Control packet manual send control */
81#define HDMI_CTRL_PKT_AUTO_SEND 0x41 /* Control packet auto send with VSYNC control */
82#define HDMI_AUTO_CHECKSUM_OPTION 0x42 /* Auto checksum option */
83#define HDMI_VIDEO_SETTING_2 0x45 /* Video setting.2 */
84#define HDMI_OUTPUT_OPTION 0x46 /* Output option */
85#define HDMI_SLIPHDMIT_PARAM_OPTION 0x51 /* SLIPHDMIT parameter option */
86#define HDMI_HSYNC_PMENT_AT_EMB_7_0 0x52 /* HSYNC placement at embedded sync (LSB) */
87#define HDMI_HSYNC_PMENT_AT_EMB_15_8 0x53 /* HSYNC placement at embedded sync (MSB) */
88#define HDMI_VSYNC_PMENT_AT_EMB_7_0 0x54 /* VSYNC placement at embedded sync (LSB) */
89#define HDMI_VSYNC_PMENT_AT_EMB_14_8 0x55 /* VSYNC placement at embedded sync (MSB) */
90#define HDMI_SLIPHDMIT_PARAM_SETTINGS_1 0x56 /* SLIPHDMIT parameter settings.1 */
91#define HDMI_SLIPHDMIT_PARAM_SETTINGS_2 0x57 /* SLIPHDMIT parameter settings.2 */
92#define HDMI_SLIPHDMIT_PARAM_SETTINGS_3 0x58 /* SLIPHDMIT parameter settings.3 */
93#define HDMI_SLIPHDMIT_PARAM_SETTINGS_5 0x59 /* SLIPHDMIT parameter settings.5 */
94#define HDMI_SLIPHDMIT_PARAM_SETTINGS_6 0x5A /* SLIPHDMIT parameter settings.6 */
95#define HDMI_SLIPHDMIT_PARAM_SETTINGS_7 0x5B /* SLIPHDMIT parameter settings.7 */
96#define HDMI_SLIPHDMIT_PARAM_SETTINGS_8 0x5C /* SLIPHDMIT parameter settings.8 */
97#define HDMI_SLIPHDMIT_PARAM_SETTINGS_9 0x5D /* SLIPHDMIT parameter settings.9 */
98#define HDMI_SLIPHDMIT_PARAM_SETTINGS_10 0x5E /* SLIPHDMIT parameter settings.10 */
99#define HDMI_CTRL_PKT_BUF_INDEX 0x5F /* Control packet buffer index */
100#define HDMI_CTRL_PKT_BUF_ACCESS_HB0 0x60 /* Control packet data buffer access window - HB0 */
101#define HDMI_CTRL_PKT_BUF_ACCESS_HB1 0x61 /* Control packet data buffer access window - HB1 */
102#define HDMI_CTRL_PKT_BUF_ACCESS_HB2 0x62 /* Control packet data buffer access window - HB2 */
103#define HDMI_CTRL_PKT_BUF_ACCESS_PB0 0x63 /* Control packet data buffer access window - PB0 */
104#define HDMI_CTRL_PKT_BUF_ACCESS_PB1 0x64 /* Control packet data buffer access window - PB1 */
105#define HDMI_CTRL_PKT_BUF_ACCESS_PB2 0x65 /* Control packet data buffer access window - PB2 */
106#define HDMI_CTRL_PKT_BUF_ACCESS_PB3 0x66 /* Control packet data buffer access window - PB3 */
107#define HDMI_CTRL_PKT_BUF_ACCESS_PB4 0x67 /* Control packet data buffer access window - PB4 */
108#define HDMI_CTRL_PKT_BUF_ACCESS_PB5 0x68 /* Control packet data buffer access window - PB5 */
109#define HDMI_CTRL_PKT_BUF_ACCESS_PB6 0x69 /* Control packet data buffer access window - PB6 */
110#define HDMI_CTRL_PKT_BUF_ACCESS_PB7 0x6A /* Control packet data buffer access window - PB7 */
111#define HDMI_CTRL_PKT_BUF_ACCESS_PB8 0x6B /* Control packet data buffer access window - PB8 */
112#define HDMI_CTRL_PKT_BUF_ACCESS_PB9 0x6C /* Control packet data buffer access window - PB9 */
113#define HDMI_CTRL_PKT_BUF_ACCESS_PB10 0x6D /* Control packet data buffer access window - PB10 */
114#define HDMI_CTRL_PKT_BUF_ACCESS_PB11 0x6E /* Control packet data buffer access window - PB11 */
115#define HDMI_CTRL_PKT_BUF_ACCESS_PB12 0x6F /* Control packet data buffer access window - PB12 */
116#define HDMI_CTRL_PKT_BUF_ACCESS_PB13 0x70 /* Control packet data buffer access window - PB13 */
117#define HDMI_CTRL_PKT_BUF_ACCESS_PB14 0x71 /* Control packet data buffer access window - PB14 */
118#define HDMI_CTRL_PKT_BUF_ACCESS_PB15 0x72 /* Control packet data buffer access window - PB15 */
119#define HDMI_CTRL_PKT_BUF_ACCESS_PB16 0x73 /* Control packet data buffer access window - PB16 */
120#define HDMI_CTRL_PKT_BUF_ACCESS_PB17 0x74 /* Control packet data buffer access window - PB17 */
121#define HDMI_CTRL_PKT_BUF_ACCESS_PB18 0x75 /* Control packet data buffer access window - PB18 */
122#define HDMI_CTRL_PKT_BUF_ACCESS_PB19 0x76 /* Control packet data buffer access window - PB19 */
123#define HDMI_CTRL_PKT_BUF_ACCESS_PB20 0x77 /* Control packet data buffer access window - PB20 */
124#define HDMI_CTRL_PKT_BUF_ACCESS_PB21 0x78 /* Control packet data buffer access window - PB21 */
125#define HDMI_CTRL_PKT_BUF_ACCESS_PB22 0x79 /* Control packet data buffer access window - PB22 */
126#define HDMI_CTRL_PKT_BUF_ACCESS_PB23 0x7A /* Control packet data buffer access window - PB23 */
127#define HDMI_CTRL_PKT_BUF_ACCESS_PB24 0x7B /* Control packet data buffer access window - PB24 */
128#define HDMI_CTRL_PKT_BUF_ACCESS_PB25 0x7C /* Control packet data buffer access window - PB25 */
129#define HDMI_CTRL_PKT_BUF_ACCESS_PB26 0x7D /* Control packet data buffer access window - PB26 */
130#define HDMI_CTRL_PKT_BUF_ACCESS_PB27 0x7E /* Control packet data buffer access window - PB27 */
131#define HDMI_EDID_KSV_FIFO_ACCESS_WINDOW 0x80 /* EDID/KSV FIFO access window */
132#define HDMI_DDC_BUS_ACCESS_FREQ_CTRL_7_0 0x81 /* DDC bus access frequency control (LSB) */
133#define HDMI_DDC_BUS_ACCESS_FREQ_CTRL_15_8 0x82 /* DDC bus access frequency control (MSB) */
134#define HDMI_INTERRUPT_MASK_1 0x92 /* Interrupt mask.1 */
135#define HDMI_INTERRUPT_MASK_2 0x93 /* Interrupt mask.2 */
136#define HDMI_INTERRUPT_STATUS_1 0x94 /* Interrupt status.1 */
137#define HDMI_INTERRUPT_STATUS_2 0x95 /* Interrupt status.2 */
138#define HDMI_INTERRUPT_MASK_3 0x96 /* Interrupt mask.3 */
139#define HDMI_INTERRUPT_MASK_4 0x97 /* Interrupt mask.4 */
140#define HDMI_INTERRUPT_STATUS_3 0x98 /* Interrupt status.3 */
141#define HDMI_INTERRUPT_STATUS_4 0x99 /* Interrupt status.4 */
142#define HDMI_SOFTWARE_HDCP_CONTROL_1 0x9A /* Software HDCP control.1 */
143#define HDMI_FRAME_COUNTER 0x9C /* Frame counter */
144#define HDMI_FRAME_COUNTER_FOR_RI_CHECK 0x9D /* Frame counter for Ri check */
145#define HDMI_HDCP_CONTROL 0xAF /* HDCP control */
146#define HDMI_RI_FRAME_COUNT_REGISTER 0xB2 /* Ri frame count register */
147#define HDMI_DDC_BUS_CONTROL 0xB7 /* DDC bus control */
148#define HDMI_HDCP_STATUS 0xB8 /* HDCP status */
149#define HDMI_SHA0 0xB9 /* sha0 */
150#define HDMI_SHA1 0xBA /* sha1 */
151#define HDMI_SHA2 0xBB /* sha2 */
152#define HDMI_SHA3 0xBC /* sha3 */
153#define HDMI_SHA4 0xBD /* sha4 */
154#define HDMI_BCAPS_READ 0xBE /* BCAPS read / debug */
155#define HDMI_AKSV_BKSV_7_0_MONITOR 0xBF /* AKSV/BKSV[7:0] monitor */
156#define HDMI_AKSV_BKSV_15_8_MONITOR 0xC0 /* AKSV/BKSV[15:8] monitor */
157#define HDMI_AKSV_BKSV_23_16_MONITOR 0xC1 /* AKSV/BKSV[23:16] monitor */
158#define HDMI_AKSV_BKSV_31_24_MONITOR 0xC2 /* AKSV/BKSV[31:24] monitor */
159#define HDMI_AKSV_BKSV_39_32_MONITOR 0xC3 /* AKSV/BKSV[39:32] monitor */
160#define HDMI_EDID_SEGMENT_POINTER 0xC4 /* EDID segment pointer */
161#define HDMI_EDID_WORD_ADDRESS 0xC5 /* EDID word address */
162#define HDMI_EDID_DATA_FIFO_ADDRESS 0xC6 /* EDID data FIFO address */
163#define HDMI_NUM_OF_HDMI_DEVICES 0xC7 /* Number of HDMI devices */
164#define HDMI_HDCP_ERROR_CODE 0xC8 /* HDCP error code */
165#define HDMI_100MS_TIMER_SET 0xC9 /* 100ms timer setting */
166#define HDMI_5SEC_TIMER_SET 0xCA /* 5sec timer setting */
167#define HDMI_RI_READ_COUNT 0xCB /* Ri read count */
168#define HDMI_AN_SEED 0xCC /* An seed */
169#define HDMI_MAX_NUM_OF_RCIVRS_ALLOWED 0xCD /* Maximum number of receivers allowed */
170#define HDMI_HDCP_MEMORY_ACCESS_CONTROL_1 0xCE /* HDCP memory access control.1 */
171#define HDMI_HDCP_MEMORY_ACCESS_CONTROL_2 0xCF /* HDCP memory access control.2 */
172#define HDMI_HDCP_CONTROL_2 0xD0 /* HDCP Control 2 */
173#define HDMI_HDCP_KEY_MEMORY_CONTROL 0xD2 /* HDCP Key Memory Control */
174#define HDMI_COLOR_SPACE_CONV_CONFIG_1 0xD3 /* Color space conversion configuration.1 */
175#define HDMI_VIDEO_SETTING_3 0xD4 /* Video setting.3 */
176#define HDMI_RI_7_0 0xD5 /* Ri[7:0] */
177#define HDMI_RI_15_8 0xD6 /* Ri[15:8] */
178#define HDMI_PJ 0xD7 /* Pj */
179#define HDMI_SHA_RD 0xD8 /* sha_rd */
180#define HDMI_RI_7_0_SAVED 0xD9 /* Ri[7:0] saved */
181#define HDMI_RI_15_8_SAVED 0xDA /* Ri[15:8] saved */
182#define HDMI_PJ_SAVED 0xDB /* Pj saved */
183#define HDMI_NUM_OF_DEVICES 0xDC /* Number of devices */
184#define HDMI_HOT_PLUG_MSENS_STATUS 0xDF /* Hot plug/MSENS status */
185#define HDMI_BCAPS_WRITE 0xE0 /* bcaps */
186#define HDMI_BSTAT_7_0 0xE1 /* bstat[7:0] */
187#define HDMI_BSTAT_15_8 0xE2 /* bstat[15:8] */
188#define HDMI_BKSV_7_0 0xE3 /* bksv[7:0] */
189#define HDMI_BKSV_15_8 0xE4 /* bksv[15:8] */
190#define HDMI_BKSV_23_16 0xE5 /* bksv[23:16] */
191#define HDMI_BKSV_31_24 0xE6 /* bksv[31:24] */
192#define HDMI_BKSV_39_32 0xE7 /* bksv[39:32] */
193#define HDMI_AN_7_0 0xE8 /* An[7:0] */
194#define HDMI_AN_15_8 0xE9 /* An [15:8] */
195#define HDMI_AN_23_16 0xEA /* An [23:16] */
196#define HDMI_AN_31_24 0xEB /* An [31:24] */
197#define HDMI_AN_39_32 0xEC /* An [39:32] */
198#define HDMI_AN_47_40 0xED /* An [47:40] */
199#define HDMI_AN_55_48 0xEE /* An [55:48] */
200#define HDMI_AN_63_56 0xEF /* An [63:56] */
201#define HDMI_PRODUCT_ID 0xF0 /* Product ID */
202#define HDMI_REVISION_ID 0xF1 /* Revision ID */
203#define HDMI_TEST_MODE 0xFE /* Test mode */
204
205/* HDMI Control Register (HTOP1) */
206#define HDMI_HTOP1_TEST_MODE 0x0000 /* Test mode */
207#define HDMI_HTOP1_VIDEO_INPUT 0x0008 /* VideoInput */
208#define HDMI_HTOP1_CORE_RSTN 0x000C /* CoreResetn */
209#define HDMI_HTOP1_PLLBW 0x0018 /* PLLBW */
210#define HDMI_HTOP1_CLK_TO_PHY 0x001C /* Clk to Phy */
211#define HDMI_HTOP1_VIDEO_INPUT2 0x0020 /* VideoInput2 */
212#define HDMI_HTOP1_TISEMP0_1 0x0024 /* tisemp0-1 */
213#define HDMI_HTOP1_TISEMP2_C 0x0028 /* tisemp2-c */
214#define HDMI_HTOP1_TISIDRV 0x002C /* tisidrv */
215#define HDMI_HTOP1_TISEN 0x0034 /* tisen */
216#define HDMI_HTOP1_TISDREN 0x0038 /* tisdren */
217#define HDMI_HTOP1_CISRANGE 0x003C /* cisrange */
218#define HDMI_HTOP1_ENABLE_SELECTOR 0x0040 /* Enable Selector */
219#define HDMI_HTOP1_MACRO_RESET 0x0044 /* Macro reset */
220#define HDMI_HTOP1_PLL_CALIBRATION 0x0048 /* PLL calibration */
221#define HDMI_HTOP1_RE_CALIBRATION 0x004C /* Re-calibration */
222#define HDMI_HTOP1_CURRENT 0x0050 /* Current */
223#define HDMI_HTOP1_PLL_LOCK_DETECT 0x0054 /* PLL lock detect */
224#define HDMI_HTOP1_PHY_TEST_MODE 0x0058 /* PHY Test Mode */
225#define HDMI_HTOP1_CLK_SET 0x0080 /* Clock Set */
226#define HDMI_HTOP1_DDC_FAIL_SAFE 0x0084 /* DDC fail safe */
227#define HDMI_HTOP1_PRBS 0x0088 /* PRBS */
228#define HDMI_HTOP1_EDID_AINC_CONTROL 0x008C /* EDID ainc Control */
229#define HDMI_HTOP1_HTOP_DCL_MODE 0x00FC /* Deep Coloer Mode */
230#define HDMI_HTOP1_HTOP_DCL_FRC_COEF0 0x0100 /* Deep Color:FRC COEF0 */
231#define HDMI_HTOP1_HTOP_DCL_FRC_COEF1 0x0104 /* Deep Color:FRC COEF1 */
232#define HDMI_HTOP1_HTOP_DCL_FRC_COEF2 0x0108 /* Deep Color:FRC COEF2 */
233#define HDMI_HTOP1_HTOP_DCL_FRC_COEF3 0x010C /* Deep Color:FRC COEF3 */
234#define HDMI_HTOP1_HTOP_DCL_FRC_COEF0_C 0x0110 /* Deep Color:FRC COEF0C */
235#define HDMI_HTOP1_HTOP_DCL_FRC_COEF1_C 0x0114 /* Deep Color:FRC COEF1C */
236#define HDMI_HTOP1_HTOP_DCL_FRC_COEF2_C 0x0118 /* Deep Color:FRC COEF2C */
237#define HDMI_HTOP1_HTOP_DCL_FRC_COEF3_C 0x011C /* Deep Color:FRC COEF3C */
238#define HDMI_HTOP1_HTOP_DCL_FRC_MODE 0x0120 /* Deep Color:FRC Mode */
239#define HDMI_HTOP1_HTOP_DCL_RECT_START1 0x0124 /* Deep Color:Rect Start1 */
240#define HDMI_HTOP1_HTOP_DCL_RECT_SIZE1 0x0128 /* Deep Color:Rect Size1 */
241#define HDMI_HTOP1_HTOP_DCL_RECT_START2 0x012C /* Deep Color:Rect Start2 */
242#define HDMI_HTOP1_HTOP_DCL_RECT_SIZE2 0x0130 /* Deep Color:Rect Size2 */
243#define HDMI_HTOP1_HTOP_DCL_RECT_START3 0x0134 /* Deep Color:Rect Start3 */
244#define HDMI_HTOP1_HTOP_DCL_RECT_SIZE3 0x0138 /* Deep Color:Rect Size3 */
245#define HDMI_HTOP1_HTOP_DCL_RECT_START4 0x013C /* Deep Color:Rect Start4 */
246#define HDMI_HTOP1_HTOP_DCL_RECT_SIZE4 0x0140 /* Deep Color:Rect Size4 */
247#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y1_1 0x0144 /* Deep Color:Fil Para Y1_1 */
248#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y1_2 0x0148 /* Deep Color:Fil Para Y1_2 */
249#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB1_1 0x014C /* Deep Color:Fil Para CB1_1 */
250#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB1_2 0x0150 /* Deep Color:Fil Para CB1_2 */
251#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR1_1 0x0154 /* Deep Color:Fil Para CR1_1 */
252#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR1_2 0x0158 /* Deep Color:Fil Para CR1_2 */
253#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y2_1 0x015C /* Deep Color:Fil Para Y2_1 */
254#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y2_2 0x0160 /* Deep Color:Fil Para Y2_2 */
255#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB2_1 0x0164 /* Deep Color:Fil Para CB2_1 */
256#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB2_2 0x0168 /* Deep Color:Fil Para CB2_2 */
257#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR2_1 0x016C /* Deep Color:Fil Para CR2_1 */
258#define HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR2_2 0x0170 /* Deep Color:Fil Para CR2_2 */
259#define HDMI_HTOP1_HTOP_DCL_COR_PARA_Y1 0x0174 /* Deep Color:Cor Para Y1 */
260#define HDMI_HTOP1_HTOP_DCL_COR_PARA_CB1 0x0178 /* Deep Color:Cor Para CB1 */
261#define HDMI_HTOP1_HTOP_DCL_COR_PARA_CR1 0x017C /* Deep Color:Cor Para CR1 */
262#define HDMI_HTOP1_HTOP_DCL_COR_PARA_Y2 0x0180 /* Deep Color:Cor Para Y2 */
263#define HDMI_HTOP1_HTOP_DCL_COR_PARA_CB2 0x0184 /* Deep Color:Cor Para CB2 */
264#define HDMI_HTOP1_HTOP_DCL_COR_PARA_CR2 0x0188 /* Deep Color:Cor Para CR2 */
265#define HDMI_HTOP1_EDID_DATA_READ 0x0200 /* EDID Data Read 128Byte:0x03FC */
266
267enum hotplug_state {
268 HDMI_HOTPLUG_DISCONNECTED,
269 HDMI_HOTPLUG_CONNECTED,
270 HDMI_HOTPLUG_EDID_DONE,
271};
272
273struct sh_hdmi {
274 struct sh_mobile_lcdc_entity entity;
275
276 void __iomem *base;
277 void __iomem *htop1;
278 enum hotplug_state hp_state; /* hot-plug status */
279 u8 preprogrammed_vic; /* use a pre-programmed VIC or
280 the external mode */
281 u8 edid_block_addr;
282 u8 edid_segment_nr;
283 u8 edid_blocks;
284 int irq;
285 struct clk *hdmi_clk;
286 struct device *dev;
287 struct delayed_work edid_work;
288 struct fb_videomode mode;
289 struct fb_monspecs monspec;
290
291 /* register access functions */
292 void (*write)(struct sh_hdmi *hdmi, u8 data, u8 reg);
293 u8 (*read)(struct sh_hdmi *hdmi, u8 reg);
294};
295
296#define entity_to_sh_hdmi(e) container_of(e, struct sh_hdmi, entity)
297
298static void __hdmi_write8(struct sh_hdmi *hdmi, u8 data, u8 reg)
299{
300 iowrite8(data, hdmi->base + reg);
301}
302
303static u8 __hdmi_read8(struct sh_hdmi *hdmi, u8 reg)
304{
305 return ioread8(hdmi->base + reg);
306}
307
308static void __hdmi_write32(struct sh_hdmi *hdmi, u8 data, u8 reg)
309{
310 iowrite32((u32)data, hdmi->base + (reg * 4));
311 udelay(100);
312}
313
314static u8 __hdmi_read32(struct sh_hdmi *hdmi, u8 reg)
315{
316 return (u8)ioread32(hdmi->base + (reg * 4));
317}
318
319static void hdmi_write(struct sh_hdmi *hdmi, u8 data, u8 reg)
320{
321 hdmi->write(hdmi, data, reg);
322}
323
324static u8 hdmi_read(struct sh_hdmi *hdmi, u8 reg)
325{
326 return hdmi->read(hdmi, reg);
327}
328
329static void hdmi_bit_set(struct sh_hdmi *hdmi, u8 mask, u8 data, u8 reg)
330{
331 u8 val = hdmi_read(hdmi, reg);
332
333 val &= ~mask;
334 val |= (data & mask);
335
336 hdmi_write(hdmi, val, reg);
337}
338
339static void hdmi_htop1_write(struct sh_hdmi *hdmi, u32 data, u32 reg)
340{
341 iowrite32(data, hdmi->htop1 + reg);
342 udelay(100);
343}
344
345static u32 hdmi_htop1_read(struct sh_hdmi *hdmi, u32 reg)
346{
347 return ioread32(hdmi->htop1 + reg);
348}
349
350/*
351 * HDMI sound
352 */
353static unsigned int sh_hdmi_snd_read(struct snd_soc_codec *codec,
354 unsigned int reg)
355{
356 struct sh_hdmi *hdmi = snd_soc_codec_get_drvdata(codec);
357
358 return hdmi_read(hdmi, reg);
359}
360
361static int sh_hdmi_snd_write(struct snd_soc_codec *codec,
362 unsigned int reg,
363 unsigned int value)
364{
365 struct sh_hdmi *hdmi = snd_soc_codec_get_drvdata(codec);
366
367 hdmi_write(hdmi, value, reg);
368 return 0;
369}
370
371static struct snd_soc_dai_driver sh_hdmi_dai = {
372 .name = "sh_mobile_hdmi-hifi",
373 .playback = {
374 .stream_name = "Playback",
375 .channels_min = 2,
376 .channels_max = 8,
377 .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
378 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
379 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
380 SNDRV_PCM_RATE_192000,
381 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
382 },
383};
384
385static int sh_hdmi_snd_probe(struct snd_soc_codec *codec)
386{
387 dev_info(codec->dev, "SH Mobile HDMI Audio Codec");
388
389 return 0;
390}
391
392static struct snd_soc_codec_driver soc_codec_dev_sh_hdmi = {
393 .probe = sh_hdmi_snd_probe,
394 .read = sh_hdmi_snd_read,
395 .write = sh_hdmi_snd_write,
396};
397
398/*
399 * HDMI video
400 */
401
402/* External video parameter settings */
403static void sh_hdmi_external_video_param(struct sh_hdmi *hdmi)
404{
405 struct fb_videomode *mode = &hdmi->mode;
406 u16 htotal, hblank, hdelay, vtotal, vblank, vdelay, voffset;
407 u8 sync = 0;
408
409 htotal = mode->xres + mode->right_margin + mode->left_margin
410 + mode->hsync_len;
411 hdelay = mode->hsync_len + mode->left_margin;
412 hblank = mode->right_margin + hdelay;
413
414 /*
415 * Vertical timing looks a bit different in Figure 18,
416 * but let's try the same first by setting offset = 0
417 */
418 vtotal = mode->yres + mode->upper_margin + mode->lower_margin
419 + mode->vsync_len;
420 vdelay = mode->vsync_len + mode->upper_margin;
421 vblank = mode->lower_margin + vdelay;
422 voffset = min(mode->upper_margin / 2, 6U);
423
424 /*
425 * [3]: VSYNC polarity: Positive
426 * [2]: HSYNC polarity: Positive
427 * [1]: Interlace/Progressive: Progressive
428 * [0]: External video settings enable: used.
429 */
430 if (mode->sync & FB_SYNC_HOR_HIGH_ACT)
431 sync |= 4;
432 if (mode->sync & FB_SYNC_VERT_HIGH_ACT)
433 sync |= 8;
434
435 dev_dbg(hdmi->dev, "H: %u, %u, %u, %u; V: %u, %u, %u, %u; sync 0x%x\n",
436 htotal, hblank, hdelay, mode->hsync_len,
437 vtotal, vblank, vdelay, mode->vsync_len, sync);
438
439 hdmi_write(hdmi, sync | (voffset << 4), HDMI_EXTERNAL_VIDEO_PARAM_SETTINGS);
440
441 hdmi_write(hdmi, htotal, HDMI_EXTERNAL_H_TOTAL_7_0);
442 hdmi_write(hdmi, htotal >> 8, HDMI_EXTERNAL_H_TOTAL_11_8);
443
444 hdmi_write(hdmi, hblank, HDMI_EXTERNAL_H_BLANK_7_0);
445 hdmi_write(hdmi, hblank >> 8, HDMI_EXTERNAL_H_BLANK_9_8);
446
447 hdmi_write(hdmi, hdelay, HDMI_EXTERNAL_H_DELAY_7_0);
448 hdmi_write(hdmi, hdelay >> 8, HDMI_EXTERNAL_H_DELAY_9_8);
449
450 hdmi_write(hdmi, mode->hsync_len, HDMI_EXTERNAL_H_DURATION_7_0);
451 hdmi_write(hdmi, mode->hsync_len >> 8, HDMI_EXTERNAL_H_DURATION_9_8);
452
453 hdmi_write(hdmi, vtotal, HDMI_EXTERNAL_V_TOTAL_7_0);
454 hdmi_write(hdmi, vtotal >> 8, HDMI_EXTERNAL_V_TOTAL_9_8);
455
456 hdmi_write(hdmi, vblank, HDMI_EXTERNAL_V_BLANK);
457
458 hdmi_write(hdmi, vdelay, HDMI_EXTERNAL_V_DELAY);
459
460 hdmi_write(hdmi, mode->vsync_len, HDMI_EXTERNAL_V_DURATION);
461
462 /* Set bit 0 of HDMI_EXTERNAL_VIDEO_PARAM_SETTINGS here for external mode */
463 if (!hdmi->preprogrammed_vic)
464 hdmi_write(hdmi, sync | 1 | (voffset << 4),
465 HDMI_EXTERNAL_VIDEO_PARAM_SETTINGS);
466}
467
468/**
469 * sh_hdmi_video_config()
470 */
471static void sh_hdmi_video_config(struct sh_hdmi *hdmi)
472{
473 /*
474 * [7:4]: Audio sampling frequency: 48kHz
475 * [3:1]: Input video format: RGB and YCbCr 4:4:4 (Y on Green)
476 * [0]: Internal/External DE select: internal
477 */
478 hdmi_write(hdmi, 0x20, HDMI_AUDIO_VIDEO_SETTING_1);
479
480 /*
481 * [7:6]: Video output format: RGB 4:4:4
482 * [5:4]: Input video data width: 8 bit
483 * [3:1]: EAV/SAV location: channel 1
484 * [0]: Video input color space: RGB
485 */
486 hdmi_write(hdmi, 0x34, HDMI_VIDEO_SETTING_1);
487
488 /*
489 * [7:6]: Together with bit [6] of HDMI_AUDIO_VIDEO_SETTING_2, which is
490 * left at 0 by default, this configures 24bpp and sets the Color Depth
491 * (CD) field in the General Control Packet
492 */
493 hdmi_write(hdmi, 0x20, HDMI_DEEP_COLOR_MODES);
494}
495
496/**
497 * sh_hdmi_audio_config()
498 */
499static void sh_hdmi_audio_config(struct sh_hdmi *hdmi)
500{
501 u8 data;
502 struct sh_mobile_hdmi_info *pdata = dev_get_platdata(hdmi->dev);
503
504 /*
505 * [7:4] L/R data swap control
506 * [3:0] appropriate N[19:16]
507 */
508 hdmi_write(hdmi, 0x00, HDMI_L_R_DATA_SWAP_CTRL_RPKT);
509 /* appropriate N[15:8] */
510 hdmi_write(hdmi, 0x18, HDMI_20_BIT_N_FOR_AUDIO_RPKT_15_8);
511 /* appropriate N[7:0] */
512 hdmi_write(hdmi, 0x00, HDMI_20_BIT_N_FOR_AUDIO_RPKT_7_0);
513
514 /* [7:4] 48 kHz SPDIF not used */
515 hdmi_write(hdmi, 0x20, HDMI_SPDIF_AUDIO_SAMP_FREQ_CTS);
516
517 /*
518 * [6:5] set required down sampling rate if required
519 * [4:3] set required audio source
520 */
521 switch (pdata->flags & HDMI_SND_SRC_MASK) {
522 default:
523 /* fall through */
524 case HDMI_SND_SRC_I2S:
525 data = 0x0 << 3;
526 break;
527 case HDMI_SND_SRC_SPDIF:
528 data = 0x1 << 3;
529 break;
530 case HDMI_SND_SRC_DSD:
531 data = 0x2 << 3;
532 break;
533 case HDMI_SND_SRC_HBR:
534 data = 0x3 << 3;
535 break;
536 }
537 hdmi_write(hdmi, data, HDMI_AUDIO_SETTING_1);
538
539 /* [3:0] set sending channel number for channel status */
540 hdmi_write(hdmi, 0x40, HDMI_AUDIO_SETTING_2);
541
542 /*
543 * [5:2] set valid I2S source input pin
544 * [1:0] set input I2S source mode
545 */
546 hdmi_write(hdmi, 0x04, HDMI_I2S_AUDIO_SET);
547
548 /* [7:4] set valid DSD source input pin */
549 hdmi_write(hdmi, 0x00, HDMI_DSD_AUDIO_SET);
550
551 /* [7:0] set appropriate I2S input pin swap settings if required */
552 hdmi_write(hdmi, 0x00, HDMI_I2S_INPUT_PIN_SWAP);
553
554 /*
555 * [7] set validity bit for channel status
556 * [3:0] set original sample frequency for channel status
557 */
558 hdmi_write(hdmi, 0x00, HDMI_AUDIO_STATUS_BITS_SETTING_1);
559
560 /*
561 * [7] set value for channel status
562 * [6] set value for channel status
563 * [5] set copyright bit for channel status
564 * [4:2] set additional information for channel status
565 * [1:0] set clock accuracy for channel status
566 */
567 hdmi_write(hdmi, 0x00, HDMI_AUDIO_STATUS_BITS_SETTING_2);
568
569 /* [7:0] set category code for channel status */
570 hdmi_write(hdmi, 0x00, HDMI_CATEGORY_CODE);
571
572 /*
573 * [7:4] set source number for channel status
574 * [3:0] set word length for channel status
575 */
576 hdmi_write(hdmi, 0x00, HDMI_SOURCE_NUM_AUDIO_WORD_LEN);
577
578 /* [7:4] set sample frequency for channel status */
579 hdmi_write(hdmi, 0x20, HDMI_AUDIO_VIDEO_SETTING_1);
580}
581
582/**
583 * sh_hdmi_phy_config() - configure the HDMI PHY for the used video mode
584 */
585static void sh_hdmi_phy_config(struct sh_hdmi *hdmi)
586{
587 if (hdmi->mode.pixclock < 10000) {
588 /* for 1080p8bit 148MHz */
589 hdmi_write(hdmi, 0x1d, HDMI_SLIPHDMIT_PARAM_SETTINGS_1);
590 hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_2);
591 hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_3);
592 hdmi_write(hdmi, 0x4c, HDMI_SLIPHDMIT_PARAM_SETTINGS_5);
593 hdmi_write(hdmi, 0x1e, HDMI_SLIPHDMIT_PARAM_SETTINGS_6);
594 hdmi_write(hdmi, 0x48, HDMI_SLIPHDMIT_PARAM_SETTINGS_7);
595 hdmi_write(hdmi, 0x0e, HDMI_SLIPHDMIT_PARAM_SETTINGS_8);
596 hdmi_write(hdmi, 0x25, HDMI_SLIPHDMIT_PARAM_SETTINGS_9);
597 hdmi_write(hdmi, 0x04, HDMI_SLIPHDMIT_PARAM_SETTINGS_10);
598 } else if (hdmi->mode.pixclock < 30000) {
599 /* 720p, 8bit, 74.25MHz. Might need to be adjusted for other formats */
600 /*
601 * [1:0] Speed_A
602 * [3:2] Speed_B
603 * [4] PLLA_Bypass
604 * [6] DRV_TEST_EN
605 * [7] DRV_TEST_IN
606 */
607 hdmi_write(hdmi, 0x0f, HDMI_SLIPHDMIT_PARAM_SETTINGS_1);
608 /* PLLB_CONFIG[17], PLLA_CONFIG[17] - not in PHY datasheet */
609 hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_2);
610 /*
611 * [2:0] BGR_I_OFFSET
612 * [6:4] BGR_V_OFFSET
613 */
614 hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_3);
615 /* PLLA_CONFIG[7:0]: VCO gain, VCO offset, LPF resistance[0] */
616 hdmi_write(hdmi, 0x44, HDMI_SLIPHDMIT_PARAM_SETTINGS_5);
617 /*
618 * PLLA_CONFIG[15:8]: regulator voltage[0], CP current,
619 * LPF capacitance, LPF resistance[1]
620 */
621 hdmi_write(hdmi, 0x32, HDMI_SLIPHDMIT_PARAM_SETTINGS_6);
622 /* PLLB_CONFIG[7:0]: LPF resistance[0], VCO offset, VCO gain */
623 hdmi_write(hdmi, 0x4A, HDMI_SLIPHDMIT_PARAM_SETTINGS_7);
624 /*
625 * PLLB_CONFIG[15:8]: regulator voltage[0], CP current,
626 * LPF capacitance, LPF resistance[1]
627 */
628 hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_8);
629 /* DRV_CONFIG, PE_CONFIG */
630 hdmi_write(hdmi, 0x25, HDMI_SLIPHDMIT_PARAM_SETTINGS_9);
631 /*
632 * [2:0] AMON_SEL (4 == LPF voltage)
633 * [4] PLLA_CONFIG[16]
634 * [5] PLLB_CONFIG[16]
635 */
636 hdmi_write(hdmi, 0x04, HDMI_SLIPHDMIT_PARAM_SETTINGS_10);
637 } else {
638 /* for 480p8bit 27MHz */
639 hdmi_write(hdmi, 0x19, HDMI_SLIPHDMIT_PARAM_SETTINGS_1);
640 hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_2);
641 hdmi_write(hdmi, 0x00, HDMI_SLIPHDMIT_PARAM_SETTINGS_3);
642 hdmi_write(hdmi, 0x44, HDMI_SLIPHDMIT_PARAM_SETTINGS_5);
643 hdmi_write(hdmi, 0x32, HDMI_SLIPHDMIT_PARAM_SETTINGS_6);
644 hdmi_write(hdmi, 0x48, HDMI_SLIPHDMIT_PARAM_SETTINGS_7);
645 hdmi_write(hdmi, 0x0F, HDMI_SLIPHDMIT_PARAM_SETTINGS_8);
646 hdmi_write(hdmi, 0x20, HDMI_SLIPHDMIT_PARAM_SETTINGS_9);
647 hdmi_write(hdmi, 0x04, HDMI_SLIPHDMIT_PARAM_SETTINGS_10);
648 }
649}
650
651/**
652 * sh_hdmi_avi_infoframe_setup() - Auxiliary Video Information InfoFrame CONTROL PACKET
653 */
654static void sh_hdmi_avi_infoframe_setup(struct sh_hdmi *hdmi)
655{
656 u8 vic;
657
658 /* AVI InfoFrame */
659 hdmi_write(hdmi, 0x06, HDMI_CTRL_PKT_BUF_INDEX);
660
661 /* Packet Type = 0x82 */
662 hdmi_write(hdmi, 0x82, HDMI_CTRL_PKT_BUF_ACCESS_HB0);
663
664 /* Version = 0x02 */
665 hdmi_write(hdmi, 0x02, HDMI_CTRL_PKT_BUF_ACCESS_HB1);
666
667 /* Length = 13 (0x0D) */
668 hdmi_write(hdmi, 0x0D, HDMI_CTRL_PKT_BUF_ACCESS_HB2);
669
670 /* N. A. Checksum */
671 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB0);
672
673 /*
674 * Y = RGB
675 * A0 = No Data
676 * B = Bar Data not valid
677 * S = No Data
678 */
679 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB1);
680
681 /*
682 * [7:6] C = Colorimetry: no data
683 * [5:4] M = 2: 16:9, 1: 4:3 Picture Aspect Ratio
684 * [3:0] R = 8: Active Frame Aspect Ratio: same as picture aspect ratio
685 */
686 hdmi_write(hdmi, 0x28, HDMI_CTRL_PKT_BUF_ACCESS_PB2);
687
688 /*
689 * ITC = No Data
690 * EC = xvYCC601
691 * Q = Default (depends on video format)
692 * SC = No Known non_uniform Scaling
693 */
694 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB3);
695
696 /*
697 * VIC should be ignored if external config is used, so, we could just use 0,
698 * but play safe and use a valid value in any case just in case
699 */
700 if (hdmi->preprogrammed_vic)
701 vic = hdmi->preprogrammed_vic;
702 else
703 vic = 4;
704 hdmi_write(hdmi, vic, HDMI_CTRL_PKT_BUF_ACCESS_PB4);
705
706 /* PR = No Repetition */
707 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB5);
708
709 /* Line Number of End of Top Bar (lower 8 bits) */
710 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB6);
711
712 /* Line Number of End of Top Bar (upper 8 bits) */
713 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB7);
714
715 /* Line Number of Start of Bottom Bar (lower 8 bits) */
716 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB8);
717
718 /* Line Number of Start of Bottom Bar (upper 8 bits) */
719 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB9);
720
721 /* Pixel Number of End of Left Bar (lower 8 bits) */
722 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB10);
723
724 /* Pixel Number of End of Left Bar (upper 8 bits) */
725 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB11);
726
727 /* Pixel Number of Start of Right Bar (lower 8 bits) */
728 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB12);
729
730 /* Pixel Number of Start of Right Bar (upper 8 bits) */
731 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB13);
732}
733
734/**
735 * sh_hdmi_audio_infoframe_setup() - Audio InfoFrame of CONTROL PACKET
736 */
737static void sh_hdmi_audio_infoframe_setup(struct sh_hdmi *hdmi)
738{
739 /* Audio InfoFrame */
740 hdmi_write(hdmi, 0x08, HDMI_CTRL_PKT_BUF_INDEX);
741
742 /* Packet Type = 0x84 */
743 hdmi_write(hdmi, 0x84, HDMI_CTRL_PKT_BUF_ACCESS_HB0);
744
745 /* Version Number = 0x01 */
746 hdmi_write(hdmi, 0x01, HDMI_CTRL_PKT_BUF_ACCESS_HB1);
747
748 /* 0 Length = 10 (0x0A) */
749 hdmi_write(hdmi, 0x0A, HDMI_CTRL_PKT_BUF_ACCESS_HB2);
750
751 /* n. a. Checksum */
752 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB0);
753
754 /* Audio Channel Count = Refer to Stream Header */
755 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB1);
756
757 /* Refer to Stream Header */
758 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB2);
759
760 /* Format depends on coding type (i.e. CT0...CT3) */
761 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB3);
762
763 /* Speaker Channel Allocation = Front Right + Front Left */
764 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB4);
765
766 /* Level Shift Value = 0 dB, Down - mix is permitted or no information */
767 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB5);
768
769 /* Reserved (0) */
770 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB6);
771 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB7);
772 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB8);
773 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB9);
774 hdmi_write(hdmi, 0x00, HDMI_CTRL_PKT_BUF_ACCESS_PB10);
775}
776
777/**
778 * sh_hdmi_configure() - Initialise HDMI for output
779 */
780static void sh_hdmi_configure(struct sh_hdmi *hdmi)
781{
782 /* Configure video format */
783 sh_hdmi_video_config(hdmi);
784
785 /* Configure audio format */
786 sh_hdmi_audio_config(hdmi);
787
788 /* Configure PHY */
789 sh_hdmi_phy_config(hdmi);
790
791 /* Auxiliary Video Information (AVI) InfoFrame */
792 sh_hdmi_avi_infoframe_setup(hdmi);
793
794 /* Audio InfoFrame */
795 sh_hdmi_audio_infoframe_setup(hdmi);
796
797 /*
798 * Control packet auto send with VSYNC control: auto send
799 * General control, Gamut metadata, ISRC, and ACP packets
800 */
801 hdmi_write(hdmi, 0x8E, HDMI_CTRL_PKT_AUTO_SEND);
802
803 /* FIXME */
804 msleep(10);
805
806 /* PS mode b->d, reset PLLA and PLLB */
807 hdmi_bit_set(hdmi, 0xFC, 0x4C, HDMI_SYSTEM_CTRL);
808
809 udelay(10);
810
811 hdmi_bit_set(hdmi, 0xFC, 0x40, HDMI_SYSTEM_CTRL);
812}
813
814static unsigned long sh_hdmi_rate_error(struct sh_hdmi *hdmi,
815 const struct fb_videomode *mode,
816 unsigned long *hdmi_rate, unsigned long *parent_rate)
817{
818 unsigned long target = PICOS2KHZ(mode->pixclock) * 1000, rate_error;
819 struct sh_mobile_hdmi_info *pdata = dev_get_platdata(hdmi->dev);
820
821 *hdmi_rate = clk_round_rate(hdmi->hdmi_clk, target);
822 if ((long)*hdmi_rate < 0)
823 *hdmi_rate = clk_get_rate(hdmi->hdmi_clk);
824
825 rate_error = (long)*hdmi_rate > 0 ? abs(*hdmi_rate - target) : ULONG_MAX;
826 if (rate_error && pdata->clk_optimize_parent)
827 rate_error = pdata->clk_optimize_parent(target, hdmi_rate, parent_rate);
828 else if (clk_get_parent(hdmi->hdmi_clk))
829 *parent_rate = clk_get_rate(clk_get_parent(hdmi->hdmi_clk));
830
831 dev_dbg(hdmi->dev, "%u-%u-%u-%u x %u-%u-%u-%u\n",
832 mode->left_margin, mode->xres,
833 mode->right_margin, mode->hsync_len,
834 mode->upper_margin, mode->yres,
835 mode->lower_margin, mode->vsync_len);
836
837 dev_dbg(hdmi->dev, "\t@%lu(+/-%lu)Hz, e=%lu / 1000, r=%uHz, p=%luHz\n", target,
838 rate_error, rate_error ? 10000 / (10 * target / rate_error) : 0,
839 mode->refresh, *parent_rate);
840
841 return rate_error;
842}
843
844static int sh_hdmi_read_edid(struct sh_hdmi *hdmi, unsigned long *hdmi_rate,
845 unsigned long *parent_rate)
846{
847 struct sh_mobile_lcdc_chan *ch = hdmi->entity.lcdc;
848 const struct fb_videomode *mode, *found = NULL;
849 unsigned int f_width = 0, f_height = 0, f_refresh = 0;
850 unsigned long found_rate_error = ULONG_MAX; /* silly compiler... */
851 bool scanning = false, preferred_bad = false;
852 bool use_edid_mode = false;
853 u8 edid[128];
854 char *forced;
855 int i;
856
857 /* Read EDID */
858 dev_dbg(hdmi->dev, "Read back EDID code:");
859 for (i = 0; i < 128; i++) {
860 edid[i] = (hdmi->htop1) ?
861 (u8)hdmi_htop1_read(hdmi, HDMI_HTOP1_EDID_DATA_READ + (i * 4)) :
862 hdmi_read(hdmi, HDMI_EDID_KSV_FIFO_ACCESS_WINDOW);
863#ifdef DEBUG
864 if ((i % 16) == 0) {
865 printk(KERN_CONT "\n");
866 printk(KERN_DEBUG "%02X | %02X", i, edid[i]);
867 } else {
868 printk(KERN_CONT " %02X", edid[i]);
869 }
870#endif
871 }
872#ifdef DEBUG
873 printk(KERN_CONT "\n");
874#endif
875
876 if (!hdmi->edid_blocks) {
877 fb_edid_to_monspecs(edid, &hdmi->monspec);
878 hdmi->edid_blocks = edid[126] + 1;
879
880 dev_dbg(hdmi->dev, "%d main modes, %d extension blocks\n",
881 hdmi->monspec.modedb_len, hdmi->edid_blocks - 1);
882 } else {
883 dev_dbg(hdmi->dev, "Extension %u detected, DTD start %u\n",
884 edid[0], edid[2]);
885 fb_edid_add_monspecs(edid, &hdmi->monspec);
886 }
887
888 if (hdmi->edid_blocks > hdmi->edid_segment_nr * 2 +
889 (hdmi->edid_block_addr >> 7) + 1) {
890 /* More blocks to read */
891 if (hdmi->edid_block_addr) {
892 hdmi->edid_block_addr = 0;
893 hdmi->edid_segment_nr++;
894 } else {
895 hdmi->edid_block_addr = 0x80;
896 }
897 /* Set EDID word address */
898 hdmi_write(hdmi, hdmi->edid_block_addr, HDMI_EDID_WORD_ADDRESS);
899 /* Enable EDID interrupt */
900 hdmi_write(hdmi, 0xC6, HDMI_INTERRUPT_MASK_1);
901 /* Set EDID segment pointer - starts reading EDID */
902 hdmi_write(hdmi, hdmi->edid_segment_nr, HDMI_EDID_SEGMENT_POINTER);
903 return -EAGAIN;
904 }
905
906 /* All E-EDID blocks ready */
907 dev_dbg(hdmi->dev, "%d main and extended modes\n", hdmi->monspec.modedb_len);
908
909 fb_get_options("sh_mobile_lcdc", &forced);
910 if (forced && *forced) {
911 /* Only primitive parsing so far */
912 i = sscanf(forced, "%ux%u@%u",
913 &f_width, &f_height, &f_refresh);
914 if (i < 2) {
915 f_width = 0;
916 f_height = 0;
917 } else {
918 /* The user wants us to use the EDID data */
919 scanning = true;
920 }
921 dev_dbg(hdmi->dev, "Forced mode %ux%u@%uHz\n",
922 f_width, f_height, f_refresh);
923 }
924
925 /* Walk monitor modes to find the best or the exact match */
926 for (i = 0, mode = hdmi->monspec.modedb;
927 i < hdmi->monspec.modedb_len && scanning;
928 i++, mode++) {
929 unsigned long rate_error;
930
931 if (!f_width && !f_height) {
932 /*
933 * A parameter string "video=sh_mobile_lcdc:0x0" means
934 * use the preferred EDID mode. If it is rejected by
935 * .fb_check_var(), keep looking, until an acceptable
936 * one is found.
937 */
938 if ((mode->flag & FB_MODE_IS_FIRST) || preferred_bad)
939 scanning = false;
940 else
941 continue;
942 } else if (f_width != mode->xres || f_height != mode->yres) {
943 /* No interest in unmatching modes */
944 continue;
945 }
946
947 rate_error = sh_hdmi_rate_error(hdmi, mode, hdmi_rate, parent_rate);
948
949 if (scanning) {
950 if (f_refresh == mode->refresh || (!f_refresh && !rate_error))
951 /*
952 * Exact match if either the refresh rate
953 * matches or it hasn't been specified and we've
954 * found a mode, for which we can configure the
955 * clock precisely
956 */
957 scanning = false;
958 else if (found && found_rate_error <= rate_error)
959 /*
960 * We otherwise search for the closest matching
961 * clock rate - either if no refresh rate has
962 * been specified or we cannot find an exactly
963 * matching one
964 */
965 continue;
966 }
967
968 /* Check if supported: sufficient fb memory, supported clock-rate */
969 if (ch && ch->notify &&
970 ch->notify(ch, SH_MOBILE_LCDC_EVENT_DISPLAY_MODE, mode,
971 NULL)) {
972 scanning = true;
973 preferred_bad = true;
974 continue;
975 }
976
977 found = mode;
978 found_rate_error = rate_error;
979 use_edid_mode = true;
980 }
981
982 /*
983 * TODO 1: if no default mode is present, postpone running the config
984 * until after the LCDC channel is initialized.
985 * TODO 2: consider registering the HDMI platform device from the LCDC
986 * driver.
987 */
988 if (!found && hdmi->entity.def_mode.xres != 0) {
989 found = &hdmi->entity.def_mode;
990 found_rate_error = sh_hdmi_rate_error(hdmi, found, hdmi_rate,
991 parent_rate);
992 }
993
994 /* No cookie today */
995 if (!found)
996 return -ENXIO;
997
998 if (found->xres == 640 && found->yres == 480 && found->refresh == 60)
999 hdmi->preprogrammed_vic = 1;
1000 else if (found->xres == 720 && found->yres == 480 && found->refresh == 60)
1001 hdmi->preprogrammed_vic = 2;
1002 else if (found->xres == 720 && found->yres == 576 && found->refresh == 50)
1003 hdmi->preprogrammed_vic = 17;
1004 else if (found->xres == 1280 && found->yres == 720 && found->refresh == 60)
1005 hdmi->preprogrammed_vic = 4;
1006 else if (found->xres == 1920 && found->yres == 1080 && found->refresh == 24)
1007 hdmi->preprogrammed_vic = 32;
1008 else if (found->xres == 1920 && found->yres == 1080 && found->refresh == 50)
1009 hdmi->preprogrammed_vic = 31;
1010 else if (found->xres == 1920 && found->yres == 1080 && found->refresh == 60)
1011 hdmi->preprogrammed_vic = 16;
1012 else
1013 hdmi->preprogrammed_vic = 0;
1014
1015 dev_dbg(hdmi->dev, "Using %s %s mode %ux%u@%uHz (%luHz), "
1016 "clock error %luHz\n", use_edid_mode ? "EDID" : "default",
1017 hdmi->preprogrammed_vic ? "VIC" : "external", found->xres,
1018 found->yres, found->refresh, PICOS2KHZ(found->pixclock) * 1000,
1019 found_rate_error);
1020
1021 hdmi->mode = *found;
1022 sh_hdmi_external_video_param(hdmi);
1023
1024 return 0;
1025}
1026
1027static irqreturn_t sh_hdmi_hotplug(int irq, void *dev_id)
1028{
1029 struct sh_hdmi *hdmi = dev_id;
1030 u8 status1, status2, mask1, mask2;
1031
1032 /* mode_b and PLLA and PLLB reset */
1033 hdmi_bit_set(hdmi, 0xFC, 0x2C, HDMI_SYSTEM_CTRL);
1034
1035 /* How long shall reset be held? */
1036 udelay(10);
1037
1038 /* mode_b and PLLA and PLLB reset release */
1039 hdmi_bit_set(hdmi, 0xFC, 0x20, HDMI_SYSTEM_CTRL);
1040
1041 status1 = hdmi_read(hdmi, HDMI_INTERRUPT_STATUS_1);
1042 status2 = hdmi_read(hdmi, HDMI_INTERRUPT_STATUS_2);
1043
1044 mask1 = hdmi_read(hdmi, HDMI_INTERRUPT_MASK_1);
1045 mask2 = hdmi_read(hdmi, HDMI_INTERRUPT_MASK_2);
1046
1047 /* Correct would be to ack only set bits, but the datasheet requires 0xff */
1048 hdmi_write(hdmi, 0xFF, HDMI_INTERRUPT_STATUS_1);
1049 hdmi_write(hdmi, 0xFF, HDMI_INTERRUPT_STATUS_2);
1050
1051 if (printk_ratelimit())
1052 dev_dbg(hdmi->dev, "IRQ #%d: Status #1: 0x%x & 0x%x, #2: 0x%x & 0x%x\n",
1053 irq, status1, mask1, status2, mask2);
1054
1055 if (!((status1 & mask1) | (status2 & mask2))) {
1056 return IRQ_NONE;
1057 } else if (status1 & 0xc0) {
1058 u8 msens;
1059
1060 /* Datasheet specifies 10ms... */
1061 udelay(500);
1062
1063 msens = hdmi_read(hdmi, HDMI_HOT_PLUG_MSENS_STATUS);
1064 dev_dbg(hdmi->dev, "MSENS 0x%x\n", msens);
1065 /* Check, if hot plug & MSENS pin status are both high */
1066 if ((msens & 0xC0) == 0xC0) {
1067 /* Display plug in */
1068 hdmi->edid_segment_nr = 0;
1069 hdmi->edid_block_addr = 0;
1070 hdmi->edid_blocks = 0;
1071 hdmi->hp_state = HDMI_HOTPLUG_CONNECTED;
1072
1073 /* Set EDID word address */
1074 hdmi_write(hdmi, 0x00, HDMI_EDID_WORD_ADDRESS);
1075 /* Enable EDID interrupt */
1076 hdmi_write(hdmi, 0xC6, HDMI_INTERRUPT_MASK_1);
1077 /* Set EDID segment pointer - starts reading EDID */
1078 hdmi_write(hdmi, 0x00, HDMI_EDID_SEGMENT_POINTER);
1079 } else if (!(status1 & 0x80)) {
1080 /* Display unplug, beware multiple interrupts */
1081 if (hdmi->hp_state != HDMI_HOTPLUG_DISCONNECTED) {
1082 hdmi->hp_state = HDMI_HOTPLUG_DISCONNECTED;
1083 schedule_delayed_work(&hdmi->edid_work, 0);
1084 }
1085 /* display_off will switch back to mode_a */
1086 }
1087 } else if (status1 & 2) {
1088 /* EDID error interrupt: retry */
1089 /* Set EDID word address */
1090 hdmi_write(hdmi, hdmi->edid_block_addr, HDMI_EDID_WORD_ADDRESS);
1091 /* Set EDID segment pointer */
1092 hdmi_write(hdmi, hdmi->edid_segment_nr, HDMI_EDID_SEGMENT_POINTER);
1093 } else if (status1 & 4) {
1094 /* Disable EDID interrupt */
1095 hdmi_write(hdmi, 0xC0, HDMI_INTERRUPT_MASK_1);
1096 schedule_delayed_work(&hdmi->edid_work, msecs_to_jiffies(10));
1097 }
1098
1099 return IRQ_HANDLED;
1100}
1101
1102static int sh_hdmi_display_on(struct sh_mobile_lcdc_entity *entity)
1103{
1104 struct sh_hdmi *hdmi = entity_to_sh_hdmi(entity);
1105
1106 dev_dbg(hdmi->dev, "%s(%p): state %x\n", __func__, hdmi,
1107 hdmi->hp_state);
1108
1109 /*
1110 * hp_state can be set to
1111 * HDMI_HOTPLUG_DISCONNECTED: on monitor unplug
1112 * HDMI_HOTPLUG_CONNECTED: on monitor plug-in
1113 * HDMI_HOTPLUG_EDID_DONE: on EDID read completion
1114 */
1115 if (hdmi->hp_state == HDMI_HOTPLUG_EDID_DONE) {
1116 /* PS mode d->e. All functions are active */
1117 hdmi_bit_set(hdmi, 0xFC, 0x80, HDMI_SYSTEM_CTRL);
1118 dev_dbg(hdmi->dev, "HDMI running\n");
1119 }
1120
1121 return hdmi->hp_state == HDMI_HOTPLUG_DISCONNECTED
1122 ? SH_MOBILE_LCDC_DISPLAY_DISCONNECTED
1123 : SH_MOBILE_LCDC_DISPLAY_CONNECTED;
1124}
1125
1126static void sh_hdmi_display_off(struct sh_mobile_lcdc_entity *entity)
1127{
1128 struct sh_hdmi *hdmi = entity_to_sh_hdmi(entity);
1129
1130 dev_dbg(hdmi->dev, "%s(%p)\n", __func__, hdmi);
1131 /* PS mode e->a */
1132 hdmi_bit_set(hdmi, 0xFC, 0x10, HDMI_SYSTEM_CTRL);
1133}
1134
1135static const struct sh_mobile_lcdc_entity_ops sh_hdmi_ops = {
1136 .display_on = sh_hdmi_display_on,
1137 .display_off = sh_hdmi_display_off,
1138};
1139
1140/**
1141 * sh_hdmi_clk_configure() - set HDMI clock frequency and enable the clock
1142 * @hdmi: driver context
1143 * @hdmi_rate: HDMI clock frequency in Hz
1144 * @parent_rate: if != 0 - set parent clock rate for optimal precision
1145 * return: configured positive rate if successful
1146 * 0 if couldn't set the rate, but managed to enable the
1147 * clock, negative error, if couldn't enable the clock
1148 */
1149static long sh_hdmi_clk_configure(struct sh_hdmi *hdmi, unsigned long hdmi_rate,
1150 unsigned long parent_rate)
1151{
1152 int ret;
1153
1154 if (parent_rate && clk_get_parent(hdmi->hdmi_clk)) {
1155 ret = clk_set_rate(clk_get_parent(hdmi->hdmi_clk), parent_rate);
1156 if (ret < 0) {
1157 dev_warn(hdmi->dev, "Cannot set parent rate %ld: %d\n", parent_rate, ret);
1158 hdmi_rate = clk_round_rate(hdmi->hdmi_clk, hdmi_rate);
1159 } else {
1160 dev_dbg(hdmi->dev, "HDMI set parent frequency %lu\n", parent_rate);
1161 }
1162 }
1163
1164 ret = clk_set_rate(hdmi->hdmi_clk, hdmi_rate);
1165 if (ret < 0) {
1166 dev_warn(hdmi->dev, "Cannot set rate %ld: %d\n", hdmi_rate, ret);
1167 hdmi_rate = 0;
1168 } else {
1169 dev_dbg(hdmi->dev, "HDMI set frequency %lu\n", hdmi_rate);
1170 }
1171
1172 return hdmi_rate;
1173}
1174
1175/* Hotplug interrupt occurred, read EDID */
1176static void sh_hdmi_edid_work_fn(struct work_struct *work)
1177{
1178 struct sh_hdmi *hdmi = container_of(work, struct sh_hdmi, edid_work.work);
1179 struct sh_mobile_lcdc_chan *ch = hdmi->entity.lcdc;
1180 int ret;
1181
1182 dev_dbg(hdmi->dev, "%s(%p): begin, hotplug status %d\n", __func__, hdmi,
1183 hdmi->hp_state);
1184
1185 if (hdmi->hp_state == HDMI_HOTPLUG_CONNECTED) {
1186 unsigned long parent_rate = 0, hdmi_rate;
1187
1188 ret = sh_hdmi_read_edid(hdmi, &hdmi_rate, &parent_rate);
1189 if (ret < 0)
1190 goto out;
1191
1192 hdmi->hp_state = HDMI_HOTPLUG_EDID_DONE;
1193
1194 /* Reconfigure the clock */
1195 ret = sh_hdmi_clk_configure(hdmi, hdmi_rate, parent_rate);
1196 if (ret < 0)
1197 goto out;
1198
1199 msleep(10);
1200 sh_hdmi_configure(hdmi);
1201 /* Switched to another (d) power-save mode */
1202 msleep(10);
1203
1204 if (ch && ch->notify)
1205 ch->notify(ch, SH_MOBILE_LCDC_EVENT_DISPLAY_CONNECT,
1206 &hdmi->mode, &hdmi->monspec);
1207 } else {
1208 hdmi->monspec.modedb_len = 0;
1209 fb_destroy_modedb(hdmi->monspec.modedb);
1210 hdmi->monspec.modedb = NULL;
1211
1212 if (ch && ch->notify)
1213 ch->notify(ch, SH_MOBILE_LCDC_EVENT_DISPLAY_DISCONNECT,
1214 NULL, NULL);
1215
1216 ret = 0;
1217 }
1218
1219out:
1220 if (ret < 0 && ret != -EAGAIN)
1221 hdmi->hp_state = HDMI_HOTPLUG_DISCONNECTED;
1222
1223 dev_dbg(hdmi->dev, "%s(%p): end\n", __func__, hdmi);
1224}
1225
1226static void sh_hdmi_htop1_init(struct sh_hdmi *hdmi)
1227{
1228 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_MODE);
1229 hdmi_htop1_write(hdmi, 0x0000000b, 0x0010);
1230 hdmi_htop1_write(hdmi, 0x00006710, HDMI_HTOP1_HTOP_DCL_FRC_MODE);
1231 hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y1_1);
1232 hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y1_2);
1233 hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB1_1);
1234 hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB1_2);
1235 hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR1_1);
1236 hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR1_2);
1237 hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y2_1);
1238 hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_Y2_2);
1239 hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB2_1);
1240 hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CB2_2);
1241 hdmi_htop1_write(hdmi, 0x01020406, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR2_1);
1242 hdmi_htop1_write(hdmi, 0x07080806, HDMI_HTOP1_HTOP_DCL_FIL_PARA_CR2_2);
1243 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_Y1);
1244 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_CB1);
1245 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_CR1);
1246 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_Y2);
1247 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_CB2);
1248 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_HTOP_DCL_COR_PARA_CR2);
1249 hdmi_htop1_write(hdmi, 0x00000008, HDMI_HTOP1_CURRENT);
1250 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_TISEMP0_1);
1251 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_TISEMP2_C);
1252 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_PHY_TEST_MODE);
1253 hdmi_htop1_write(hdmi, 0x00000081, HDMI_HTOP1_TISIDRV);
1254 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_PLLBW);
1255 hdmi_htop1_write(hdmi, 0x0000000f, HDMI_HTOP1_TISEN);
1256 hdmi_htop1_write(hdmi, 0x0000000f, HDMI_HTOP1_TISDREN);
1257 hdmi_htop1_write(hdmi, 0x00000003, HDMI_HTOP1_ENABLE_SELECTOR);
1258 hdmi_htop1_write(hdmi, 0x00000001, HDMI_HTOP1_MACRO_RESET);
1259 hdmi_htop1_write(hdmi, 0x00000016, HDMI_HTOP1_CISRANGE);
1260 msleep(100);
1261 hdmi_htop1_write(hdmi, 0x00000001, HDMI_HTOP1_ENABLE_SELECTOR);
1262 msleep(100);
1263 hdmi_htop1_write(hdmi, 0x00000003, HDMI_HTOP1_ENABLE_SELECTOR);
1264 hdmi_htop1_write(hdmi, 0x00000001, HDMI_HTOP1_MACRO_RESET);
1265 hdmi_htop1_write(hdmi, 0x0000000f, HDMI_HTOP1_TISEN);
1266 hdmi_htop1_write(hdmi, 0x0000000f, HDMI_HTOP1_TISDREN);
1267 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_VIDEO_INPUT);
1268 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_CLK_TO_PHY);
1269 hdmi_htop1_write(hdmi, 0x00000000, HDMI_HTOP1_VIDEO_INPUT2);
1270 hdmi_htop1_write(hdmi, 0x0000000a, HDMI_HTOP1_CLK_SET);
1271}
1272
1273static int __init sh_hdmi_probe(struct platform_device *pdev)
1274{
1275 struct sh_mobile_hdmi_info *pdata = dev_get_platdata(&pdev->dev);
1276 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1277 struct resource *htop1_res;
1278 int irq = platform_get_irq(pdev, 0), ret;
1279 struct sh_hdmi *hdmi;
1280 long rate;
1281
1282 if (!res || !pdata || irq < 0)
1283 return -ENODEV;
1284
1285 htop1_res = NULL;
1286 if (pdata->flags & HDMI_HAS_HTOP1) {
1287 htop1_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1288 if (!htop1_res) {
1289 dev_err(&pdev->dev, "htop1 needs register base\n");
1290 return -EINVAL;
1291 }
1292 }
1293
1294 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
1295 if (!hdmi) {
1296 dev_err(&pdev->dev, "Cannot allocate device data\n");
1297 return -ENOMEM;
1298 }
1299
1300 hdmi->dev = &pdev->dev;
1301 hdmi->entity.owner = THIS_MODULE;
1302 hdmi->entity.ops = &sh_hdmi_ops;
1303 hdmi->irq = irq;
1304
1305 hdmi->hdmi_clk = clk_get(&pdev->dev, "ick");
1306 if (IS_ERR(hdmi->hdmi_clk)) {
1307 ret = PTR_ERR(hdmi->hdmi_clk);
1308 dev_err(&pdev->dev, "Unable to get clock: %d\n", ret);
1309 return ret;
1310 }
1311
1312 /* select register access functions */
1313 if (pdata->flags & HDMI_32BIT_REG) {
1314 hdmi->write = __hdmi_write32;
1315 hdmi->read = __hdmi_read32;
1316 } else {
1317 hdmi->write = __hdmi_write8;
1318 hdmi->read = __hdmi_read8;
1319 }
1320
1321 /* An arbitrary relaxed pixclock just to get things started: from standard 480p */
1322 rate = clk_round_rate(hdmi->hdmi_clk, PICOS2KHZ(37037));
1323 if (rate > 0)
1324 rate = sh_hdmi_clk_configure(hdmi, rate, 0);
1325
1326 if (rate < 0) {
1327 ret = rate;
1328 goto erate;
1329 }
1330
1331 ret = clk_prepare_enable(hdmi->hdmi_clk);
1332 if (ret < 0) {
1333 dev_err(hdmi->dev, "Cannot enable clock: %d\n", ret);
1334 goto erate;
1335 }
1336
1337 dev_dbg(&pdev->dev, "Enabled HDMI clock at %luHz\n", rate);
1338
1339 if (!request_mem_region(res->start, resource_size(res), dev_name(&pdev->dev))) {
1340 dev_err(&pdev->dev, "HDMI register region already claimed\n");
1341 ret = -EBUSY;
1342 goto ereqreg;
1343 }
1344
1345 hdmi->base = ioremap(res->start, resource_size(res));
1346 if (!hdmi->base) {
1347 dev_err(&pdev->dev, "HDMI register region already claimed\n");
1348 ret = -ENOMEM;
1349 goto emap;
1350 }
1351
1352 platform_set_drvdata(pdev, &hdmi->entity);
1353
1354 INIT_DELAYED_WORK(&hdmi->edid_work, sh_hdmi_edid_work_fn);
1355
1356 pm_runtime_enable(&pdev->dev);
1357 pm_runtime_get_sync(&pdev->dev);
1358
1359 /* init interrupt polarity */
1360 if (pdata->flags & HDMI_OUTPUT_PUSH_PULL)
1361 hdmi_bit_set(hdmi, 0x02, 0x02, HDMI_SYSTEM_CTRL);
1362
1363 if (pdata->flags & HDMI_OUTPUT_POLARITY_HI)
1364 hdmi_bit_set(hdmi, 0x01, 0x01, HDMI_SYSTEM_CTRL);
1365
1366 /* enable htop1 register if needed */
1367 if (htop1_res) {
1368 hdmi->htop1 = ioremap(htop1_res->start, resource_size(htop1_res));
1369 if (!hdmi->htop1) {
1370 dev_err(&pdev->dev, "control register region already claimed\n");
1371 ret = -ENOMEM;
1372 goto emap_htop1;
1373 }
1374 sh_hdmi_htop1_init(hdmi);
1375 }
1376
1377 /* Product and revision IDs are 0 in sh-mobile version */
1378 dev_info(&pdev->dev, "Detected HDMI controller 0x%x:0x%x\n",
1379 hdmi_read(hdmi, HDMI_PRODUCT_ID), hdmi_read(hdmi, HDMI_REVISION_ID));
1380
1381 ret = request_irq(irq, sh_hdmi_hotplug, 0,
1382 dev_name(&pdev->dev), hdmi);
1383 if (ret < 0) {
1384 dev_err(&pdev->dev, "Unable to request irq: %d\n", ret);
1385 goto ereqirq;
1386 }
1387
1388 ret = snd_soc_register_codec(&pdev->dev,
1389 &soc_codec_dev_sh_hdmi, &sh_hdmi_dai, 1);
1390 if (ret < 0) {
1391 dev_err(&pdev->dev, "codec registration failed\n");
1392 goto ecodec;
1393 }
1394
1395 return 0;
1396
1397ecodec:
1398 free_irq(irq, hdmi);
1399ereqirq:
1400 if (hdmi->htop1)
1401 iounmap(hdmi->htop1);
1402emap_htop1:
1403 pm_runtime_put(&pdev->dev);
1404 pm_runtime_disable(&pdev->dev);
1405 iounmap(hdmi->base);
1406emap:
1407 release_mem_region(res->start, resource_size(res));
1408ereqreg:
1409 clk_disable_unprepare(hdmi->hdmi_clk);
1410erate:
1411 clk_put(hdmi->hdmi_clk);
1412
1413 return ret;
1414}
1415
1416static int __exit sh_hdmi_remove(struct platform_device *pdev)
1417{
1418 struct sh_hdmi *hdmi = entity_to_sh_hdmi(platform_get_drvdata(pdev));
1419 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1420
1421 snd_soc_unregister_codec(&pdev->dev);
1422
1423 /* No new work will be scheduled, wait for running ISR */
1424 free_irq(hdmi->irq, hdmi);
1425 /* Wait for already scheduled work */
1426 cancel_delayed_work_sync(&hdmi->edid_work);
1427 pm_runtime_put(&pdev->dev);
1428 pm_runtime_disable(&pdev->dev);
1429 clk_disable_unprepare(hdmi->hdmi_clk);
1430 clk_put(hdmi->hdmi_clk);
1431 if (hdmi->htop1)
1432 iounmap(hdmi->htop1);
1433 iounmap(hdmi->base);
1434 release_mem_region(res->start, resource_size(res));
1435
1436 return 0;
1437}
1438
1439static int sh_hdmi_suspend(struct device *dev)
1440{
1441 struct platform_device *pdev = to_platform_device(dev);
1442 struct sh_hdmi *hdmi = entity_to_sh_hdmi(platform_get_drvdata(pdev));
1443
1444 disable_irq(hdmi->irq);
1445 /* Wait for already scheduled work */
1446 cancel_delayed_work_sync(&hdmi->edid_work);
1447 return 0;
1448}
1449
1450static int sh_hdmi_resume(struct device *dev)
1451{
1452 struct platform_device *pdev = to_platform_device(dev);
1453 struct sh_mobile_hdmi_info *pdata = dev_get_platdata(dev);
1454 struct sh_hdmi *hdmi = entity_to_sh_hdmi(platform_get_drvdata(pdev));
1455
1456 /* Re-init interrupt polarity */
1457 if (pdata->flags & HDMI_OUTPUT_PUSH_PULL)
1458 hdmi_bit_set(hdmi, 0x02, 0x02, HDMI_SYSTEM_CTRL);
1459
1460 if (pdata->flags & HDMI_OUTPUT_POLARITY_HI)
1461 hdmi_bit_set(hdmi, 0x01, 0x01, HDMI_SYSTEM_CTRL);
1462
1463 /* Re-init htop1 */
1464 if (hdmi->htop1)
1465 sh_hdmi_htop1_init(hdmi);
1466
1467 /* Now it's safe to enable interrupts again */
1468 enable_irq(hdmi->irq);
1469 return 0;
1470}
1471
1472static const struct dev_pm_ops sh_hdmi_pm_ops = {
1473 .suspend = sh_hdmi_suspend,
1474 .resume = sh_hdmi_resume,
1475};
1476
1477static struct platform_driver sh_hdmi_driver = {
1478 .remove = __exit_p(sh_hdmi_remove),
1479 .driver = {
1480 .name = "sh-mobile-hdmi",
1481 .pm = &sh_hdmi_pm_ops,
1482 },
1483};
1484
1485module_platform_driver_probe(sh_hdmi_driver, sh_hdmi_probe);
1486
1487MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
1488MODULE_DESCRIPTION("SuperH / ARM-shmobile HDMI driver");
1489MODULE_LICENSE("GPL v2");
diff --git a/drivers/video/fbdev/simplefb.c b/drivers/video/fbdev/simplefb.c
index 52c5c7e63b52..48ccf6db62a2 100644
--- a/drivers/video/fbdev/simplefb.c
+++ b/drivers/video/fbdev/simplefb.c
@@ -28,7 +28,10 @@
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29#include <linux/clk.h> 29#include <linux/clk.h>
30#include <linux/clk-provider.h> 30#include <linux/clk-provider.h>
31#include <linux/of.h>
31#include <linux/of_platform.h> 32#include <linux/of_platform.h>
33#include <linux/parser.h>
34#include <linux/regulator/consumer.h>
32 35
33static struct fb_fix_screeninfo simplefb_fix = { 36static struct fb_fix_screeninfo simplefb_fix = {
34 .id = "simple", 37 .id = "simple",
@@ -174,6 +177,10 @@ struct simplefb_par {
174 int clk_count; 177 int clk_count;
175 struct clk **clks; 178 struct clk **clks;
176#endif 179#endif
180#if defined CONFIG_OF && defined CONFIG_REGULATOR
181 u32 regulator_count;
182 struct regulator **regulators;
183#endif
177}; 184};
178 185
179#if defined CONFIG_OF && defined CONFIG_COMMON_CLK 186#if defined CONFIG_OF && defined CONFIG_COMMON_CLK
@@ -269,6 +276,110 @@ static int simplefb_clocks_init(struct simplefb_par *par,
269static void simplefb_clocks_destroy(struct simplefb_par *par) { } 276static void simplefb_clocks_destroy(struct simplefb_par *par) { }
270#endif 277#endif
271 278
279#if defined CONFIG_OF && defined CONFIG_REGULATOR
280
281#define SUPPLY_SUFFIX "-supply"
282
283/*
284 * Regulator handling code.
285 *
286 * Here we handle the num-supplies and vin*-supply properties of our
287 * "simple-framebuffer" dt node. This is necessary so that we can make sure
288 * that any regulators needed by the display hardware that the bootloader
289 * set up for us (and for which it provided a simplefb dt node), stay up,
290 * for the life of the simplefb driver.
291 *
292 * When the driver unloads, we cleanly disable, and then release the
293 * regulators.
294 *
295 * We only complain about errors here, no action is taken as the most likely
296 * error can only happen due to a mismatch between the bootloader which set
297 * up simplefb, and the regulator definitions in the device tree. Chances are
298 * that there are no adverse effects, and if there are, a clean teardown of
299 * the fb probe will not help us much either. So just complain and carry on,
300 * and hope that the user actually gets a working fb at the end of things.
301 */
302static int simplefb_regulators_init(struct simplefb_par *par,
303 struct platform_device *pdev)
304{
305 struct device_node *np = pdev->dev.of_node;
306 struct property *prop;
307 struct regulator *regulator;
308 const char *p;
309 int count = 0, i = 0, ret;
310
311 if (dev_get_platdata(&pdev->dev) || !np)
312 return 0;
313
314 /* Count the number of regulator supplies */
315 for_each_property_of_node(np, prop) {
316 p = strstr(prop->name, SUPPLY_SUFFIX);
317 if (p && p != prop->name)
318 count++;
319 }
320
321 if (!count)
322 return 0;
323
324 par->regulators = devm_kcalloc(&pdev->dev, count,
325 sizeof(struct regulator *), GFP_KERNEL);
326 if (!par->regulators)
327 return -ENOMEM;
328
329 /* Get all the regulators */
330 for_each_property_of_node(np, prop) {
331 char name[32]; /* 32 is max size of property name */
332
333 p = strstr(prop->name, SUPPLY_SUFFIX);
334 if (!p || p == prop->name)
335 continue;
336
337 strlcpy(name, prop->name,
338 strlen(prop->name) - strlen(SUPPLY_SUFFIX) + 1);
339 regulator = devm_regulator_get_optional(&pdev->dev, name);
340 if (IS_ERR(regulator)) {
341 if (PTR_ERR(regulator) == -EPROBE_DEFER)
342 return -EPROBE_DEFER;
343 dev_err(&pdev->dev, "regulator %s not found: %ld\n",
344 name, PTR_ERR(regulator));
345 continue;
346 }
347 par->regulators[i++] = regulator;
348 }
349 par->regulator_count = i;
350
351 /* Enable all the regulators */
352 for (i = 0; i < par->regulator_count; i++) {
353 ret = regulator_enable(par->regulators[i]);
354 if (ret) {
355 dev_err(&pdev->dev,
356 "failed to enable regulator %d: %d\n",
357 i, ret);
358 devm_regulator_put(par->regulators[i]);
359 par->regulators[i] = NULL;
360 }
361 }
362
363 return 0;
364}
365
366static void simplefb_regulators_destroy(struct simplefb_par *par)
367{
368 int i;
369
370 if (!par->regulators)
371 return;
372
373 for (i = 0; i < par->regulator_count; i++)
374 if (par->regulators[i])
375 regulator_disable(par->regulators[i]);
376}
377#else
378static int simplefb_regulators_init(struct simplefb_par *par,
379 struct platform_device *pdev) { return 0; }
380static void simplefb_regulators_destroy(struct simplefb_par *par) { }
381#endif
382
272static int simplefb_probe(struct platform_device *pdev) 383static int simplefb_probe(struct platform_device *pdev)
273{ 384{
274 int ret; 385 int ret;
@@ -340,6 +451,10 @@ static int simplefb_probe(struct platform_device *pdev)
340 if (ret < 0) 451 if (ret < 0)
341 goto error_unmap; 452 goto error_unmap;
342 453
454 ret = simplefb_regulators_init(par, pdev);
455 if (ret < 0)
456 goto error_clocks;
457
343 dev_info(&pdev->dev, "framebuffer at 0x%lx, 0x%x bytes, mapped to 0x%p\n", 458 dev_info(&pdev->dev, "framebuffer at 0x%lx, 0x%x bytes, mapped to 0x%p\n",
344 info->fix.smem_start, info->fix.smem_len, 459 info->fix.smem_start, info->fix.smem_len,
345 info->screen_base); 460 info->screen_base);
@@ -351,13 +466,15 @@ static int simplefb_probe(struct platform_device *pdev)
351 ret = register_framebuffer(info); 466 ret = register_framebuffer(info);
352 if (ret < 0) { 467 if (ret < 0) {
353 dev_err(&pdev->dev, "Unable to register simplefb: %d\n", ret); 468 dev_err(&pdev->dev, "Unable to register simplefb: %d\n", ret);
354 goto error_clocks; 469 goto error_regulators;
355 } 470 }
356 471
357 dev_info(&pdev->dev, "fb%d: simplefb registered!\n", info->node); 472 dev_info(&pdev->dev, "fb%d: simplefb registered!\n", info->node);
358 473
359 return 0; 474 return 0;
360 475
476error_regulators:
477 simplefb_regulators_destroy(par);
361error_clocks: 478error_clocks:
362 simplefb_clocks_destroy(par); 479 simplefb_clocks_destroy(par);
363error_unmap: 480error_unmap:
@@ -373,6 +490,7 @@ static int simplefb_remove(struct platform_device *pdev)
373 struct simplefb_par *par = info->par; 490 struct simplefb_par *par = info->par;
374 491
375 unregister_framebuffer(info); 492 unregister_framebuffer(info);
493 simplefb_regulators_destroy(par);
376 simplefb_clocks_destroy(par); 494 simplefb_clocks_destroy(par);
377 framebuffer_release(info); 495 framebuffer_release(info);
378 496
diff --git a/drivers/video/fbdev/sm712fb.c b/drivers/video/fbdev/sm712fb.c
index 629bfa2d2f51..86ae1d4556fc 100644
--- a/drivers/video/fbdev/sm712fb.c
+++ b/drivers/video/fbdev/sm712fb.c
@@ -28,9 +28,7 @@
28#include <linux/console.h> 28#include <linux/console.h>
29#include <linux/screen_info.h> 29#include <linux/screen_info.h>
30 30
31#ifdef CONFIG_PM
32#include <linux/pm.h> 31#include <linux/pm.h>
33#endif
34 32
35#include "sm712.h" 33#include "sm712.h"
36 34
@@ -1545,8 +1543,7 @@ static void smtcfb_pci_remove(struct pci_dev *pdev)
1545 pci_disable_device(pdev); 1543 pci_disable_device(pdev);
1546} 1544}
1547 1545
1548#ifdef CONFIG_PM 1546static int __maybe_unused smtcfb_pci_suspend(struct device *device)
1549static int smtcfb_pci_suspend(struct device *device)
1550{ 1547{
1551 struct pci_dev *pdev = to_pci_dev(device); 1548 struct pci_dev *pdev = to_pci_dev(device);
1552 struct smtcfb_info *sfb; 1549 struct smtcfb_info *sfb;
@@ -1569,7 +1566,7 @@ static int smtcfb_pci_suspend(struct device *device)
1569 return 0; 1566 return 0;
1570} 1567}
1571 1568
1572static int smtcfb_pci_resume(struct device *device) 1569static int __maybe_unused smtcfb_pci_resume(struct device *device)
1573{ 1570{
1574 struct pci_dev *pdev = to_pci_dev(device); 1571 struct pci_dev *pdev = to_pci_dev(device);
1575 struct smtcfb_info *sfb; 1572 struct smtcfb_info *sfb;
@@ -1610,20 +1607,13 @@ static int smtcfb_pci_resume(struct device *device)
1610} 1607}
1611 1608
1612static SIMPLE_DEV_PM_OPS(sm7xx_pm_ops, smtcfb_pci_suspend, smtcfb_pci_resume); 1609static SIMPLE_DEV_PM_OPS(sm7xx_pm_ops, smtcfb_pci_suspend, smtcfb_pci_resume);
1613#define SM7XX_PM_OPS (&sm7xx_pm_ops)
1614
1615#else /* !CONFIG_PM */
1616
1617#define SM7XX_PM_OPS NULL
1618
1619#endif /* !CONFIG_PM */
1620 1610
1621static struct pci_driver smtcfb_driver = { 1611static struct pci_driver smtcfb_driver = {
1622 .name = "smtcfb", 1612 .name = "smtcfb",
1623 .id_table = smtcfb_pci_table, 1613 .id_table = smtcfb_pci_table,
1624 .probe = smtcfb_pci_probe, 1614 .probe = smtcfb_pci_probe,
1625 .remove = smtcfb_pci_remove, 1615 .remove = smtcfb_pci_remove,
1626 .driver.pm = SM7XX_PM_OPS, 1616 .driver.pm = &sm7xx_pm_ops,
1627}; 1617};
1628 1618
1629static int __init sm712fb_init(void) 1619static int __init sm712fb_init(void)