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authorLinus Torvalds <torvalds@linux-foundation.org>2016-03-17 17:24:26 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2016-03-17 17:24:26 -0400
commit48d10bda1f2c69980601a61194015bb0790fb7ab (patch)
treee4ea2021560b1f18b335f6e8e20761fb9514cd1b /drivers/usb
parent96b9b1c95660d4bc5510c5d798d3817ae9f0b391 (diff)
parentce53bfc4374cada8b645765e2b4ad5831e760932 (diff)
Merge tag 'usb-4.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB updates from Greg KH: "Here is the big USB patchset for 4.6-rc1. The normal mess is here, gadget and xhci fixes and updates, and lots of other driver updates and cleanups as well. Full details are in the shortlog. All have been in linux-next for a while with no reported issues" * tag 'usb-4.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (266 commits) USB: core: let USB device know device node usb: devio: Add ioctl to disallow detaching kernel USB drivers. usb: gadget: f_acm: Fix configfs attr name usb: udc: lpc32xx: remove USB PLL and USB OTG clock management usb: udc: lpc32xx: remove direct access to clock controller registers usb: udc: lpc32xx: switch to clock prepare/unprepare model usb: renesas_usbhs: gadget: fix giveback status code in usbhsg_pipe_disable() usb: gadget: renesas_usb3: Use ARCH_RENESAS usb: dwc2: Fix issues in dwc2_complete_non_isoc_xfer_ddma() usb: dwc2: Add support for Lantiq ARX and XRX SoCs usb: phy: generic: Handle late registration of gadget usb: gadget: bdc_udc: fix race condition in bdc_udc_exit() usb: musb: core: added missing const qualifier to musb_hdrc_platform_data::config usb: dwc2: Move host-specific core functions into hcd.c usb: dwc2: Move register save and restore functions usb: dwc2: Use kmem_cache_free() usb: dwc2: host: If using uframe scheduler, end splits better usb: dwc2: host: Totally redo the microframe scheduler usb: dwc2: host: Properly set even/odd frame usb: dwc2: host: Add dwc2_hcd_get_future_frame_number() call ...
Diffstat (limited to 'drivers/usb')
-rw-r--r--drivers/usb/Makefile2
-rw-r--r--drivers/usb/atm/cxacru.c2
-rw-r--r--drivers/usb/chipidea/ci_hdrc_imx.c13
-rw-r--r--drivers/usb/chipidea/core.c3
-rw-r--r--drivers/usb/chipidea/debug.c5
-rw-r--r--drivers/usb/chipidea/otg_fsm.c29
-rw-r--r--drivers/usb/chipidea/otg_fsm.h2
-rw-r--r--drivers/usb/chipidea/udc.c4
-rw-r--r--drivers/usb/class/cdc-acm.c67
-rw-r--r--drivers/usb/class/cdc-acm.h1
-rw-r--r--drivers/usb/class/usbtmc.c331
-rw-r--r--drivers/usb/common/common.c1
-rw-r--r--drivers/usb/common/usb-otg-fsm.c87
-rw-r--r--drivers/usb/core/Makefile2
-rw-r--r--drivers/usb/core/buffer.c18
-rw-r--r--drivers/usb/core/config.c37
-rw-r--r--drivers/usb/core/devices.c26
-rw-r--r--drivers/usb/core/devio.c301
-rw-r--r--drivers/usb/core/file.c9
-rw-r--r--drivers/usb/core/hcd-pci.c2
-rw-r--r--drivers/usb/core/hcd.c114
-rw-r--r--drivers/usb/core/hub.c122
-rw-r--r--drivers/usb/core/hub.h7
-rw-r--r--drivers/usb/core/of.c47
-rw-r--r--drivers/usb/core/sysfs.c68
-rw-r--r--drivers/usb/core/urb.c3
-rw-r--r--drivers/usb/core/usb.c15
-rw-r--r--drivers/usb/core/usb.h2
-rw-r--r--drivers/usb/dwc2/Kconfig1
-rw-r--r--drivers/usb/dwc2/core.c1884
-rw-r--r--drivers/usb/dwc2/core.h151
-rw-r--r--drivers/usb/dwc2/gadget.c102
-rw-r--r--drivers/usb/dwc2/hcd.c2255
-rw-r--r--drivers/usb/dwc2/hcd.h134
-rw-r--r--drivers/usb/dwc2/hcd_ddma.c49
-rw-r--r--drivers/usb/dwc2/hcd_intr.c174
-rw-r--r--drivers/usb/dwc2/hcd_queue.c1941
-rw-r--r--drivers/usb/dwc2/platform.c38
-rw-r--r--drivers/usb/dwc3/core.c31
-rw-r--r--drivers/usb/dwc3/core.h11
-rw-r--r--drivers/usb/dwc3/ep0.c9
-rw-r--r--drivers/usb/dwc3/gadget.c30
-rw-r--r--drivers/usb/gadget/composite.c150
-rw-r--r--drivers/usb/gadget/config.c9
-rw-r--r--drivers/usb/gadget/configfs.c1
-rw-r--r--drivers/usb/gadget/function/f_acm.c6
-rw-r--r--drivers/usb/gadget/function/f_ecm.c2
-rw-r--r--drivers/usb/gadget/function/f_eem.c2
-rw-r--r--drivers/usb/gadget/function/f_fs.c155
-rw-r--r--drivers/usb/gadget/function/f_hid.c2
-rw-r--r--drivers/usb/gadget/function/f_loopback.c2
-rw-r--r--drivers/usb/gadget/function/f_mass_storage.c2
-rw-r--r--drivers/usb/gadget/function/f_midi.c200
-rw-r--r--drivers/usb/gadget/function/f_ncm.c2
-rw-r--r--drivers/usb/gadget/function/f_obex.c3
-rw-r--r--drivers/usb/gadget/function/f_phonet.c2
-rw-r--r--drivers/usb/gadget/function/f_printer.c2
-rw-r--r--drivers/usb/gadget/function/f_rndis.c2
-rw-r--r--drivers/usb/gadget/function/f_serial.c2
-rw-r--r--drivers/usb/gadget/function/f_sourcesink.c2
-rw-r--r--drivers/usb/gadget/function/f_subset.c2
-rw-r--r--drivers/usb/gadget/function/f_tcm.c2
-rw-r--r--drivers/usb/gadget/function/f_uac1.c3
-rw-r--r--drivers/usb/gadget/function/f_uac2.c3
-rw-r--r--drivers/usb/gadget/function/rndis.c20
-rw-r--r--drivers/usb/gadget/legacy/inode.c28
-rw-r--r--drivers/usb/gadget/udc/Kconfig7
-rw-r--r--drivers/usb/gadget/udc/bdc/bdc_udc.c5
-rw-r--r--drivers/usb/gadget/udc/lpc32xx_udc.c103
-rw-r--r--drivers/usb/gadget/udc/pxa25x_udc.c530
-rw-r--r--drivers/usb/gadget/udc/pxa25x_udc.h11
-rw-r--r--drivers/usb/gadget/udc/udc-core.c30
-rw-r--r--drivers/usb/host/Kconfig18
-rw-r--r--drivers/usb/host/Makefile3
-rw-r--r--drivers/usb/host/bcma-hcd.c83
-rw-r--r--drivers/usb/host/ehci-atmel.c6
-rw-r--r--drivers/usb/host/ehci-dbg.c477
-rw-r--r--drivers/usb/host/ehci-fsl.c24
-rw-r--r--drivers/usb/host/ehci-hcd.c22
-rw-r--r--drivers/usb/host/ehci-hub.c6
-rw-r--r--drivers/usb/host/ehci-msm.c66
-rw-r--r--drivers/usb/host/ehci-pci.c8
-rw-r--r--drivers/usb/host/ehci-platform.c6
-rw-r--r--drivers/usb/host/ehci-q.c104
-rw-r--r--drivers/usb/host/ehci-sched.c524
-rw-r--r--drivers/usb/host/ehci-st.c6
-rw-r--r--drivers/usb/host/ehci-timer.c5
-rw-r--r--drivers/usb/host/ehci.h99
-rw-r--r--drivers/usb/host/fotg210-hcd.c15
-rw-r--r--drivers/usb/host/fsl-mph-dr-of.c7
-rw-r--r--drivers/usb/host/max3421-hcd.c16
-rw-r--r--drivers/usb/host/ohci-at91.c8
-rw-r--r--drivers/usb/host/ohci-nxp.c87
-rw-r--r--drivers/usb/host/ohci-platform.c6
-rw-r--r--drivers/usb/host/ohci-pxa27x.c2
-rw-r--r--drivers/usb/host/ohci-st.c6
-rw-r--r--drivers/usb/host/ohci.h2
-rw-r--r--drivers/usb/host/oxu210hp-hcd.c15
-rw-r--r--drivers/usb/host/pci-quirks.c3
-rw-r--r--drivers/usb/host/r8a66597-hcd.c11
-rw-r--r--drivers/usb/host/u132-hcd.c18
-rw-r--r--drivers/usb/host/xhci-hub.c27
-rw-r--r--drivers/usb/host/xhci-mem.c180
-rw-r--r--drivers/usb/host/xhci-mtk.c10
-rw-r--r--drivers/usb/host/xhci-plat.c6
-rw-r--r--drivers/usb/host/xhci-ring.c134
-rw-r--r--drivers/usb/host/xhci.c8
-rw-r--r--drivers/usb/host/xhci.h15
-rw-r--r--drivers/usb/misc/chaoskey.c122
-rw-r--r--drivers/usb/misc/idmouse.c2
-rw-r--r--drivers/usb/misc/sisusbvga/sisusb.c1543
-rw-r--r--drivers/usb/mon/mon_main.c9
-rw-r--r--drivers/usb/musb/Kconfig2
-rw-r--r--drivers/usb/musb/musb_core.c2
-rw-r--r--drivers/usb/musb/musb_core.h2
-rw-r--r--drivers/usb/musb/musbhsdma.c8
-rw-r--r--drivers/usb/musb/tusb6010_omap.c4
-rw-r--r--drivers/usb/musb/ux500_dma.c3
-rw-r--r--drivers/usb/phy/phy-am335x.c1
-rw-r--r--drivers/usb/phy/phy-generic.c11
-rw-r--r--drivers/usb/phy/phy-isp1301-omap.c2
-rw-r--r--drivers/usb/renesas_usbhs/Kconfig2
-rw-r--r--drivers/usb/renesas_usbhs/Makefile2
-rw-r--r--drivers/usb/renesas_usbhs/common.c14
-rw-r--r--drivers/usb/renesas_usbhs/fifo.c20
-rw-r--r--drivers/usb/renesas_usbhs/fifo.h20
-rw-r--r--drivers/usb/renesas_usbhs/mod_gadget.c2
-rw-r--r--drivers/usb/renesas_usbhs/pipe.c6
-rw-r--r--drivers/usb/renesas_usbhs/pipe.h2
-rw-r--r--drivers/usb/renesas_usbhs/rcar3.c54
-rw-r--r--drivers/usb/renesas_usbhs/rcar3.h3
-rw-r--r--drivers/usb/serial/ch341.c2
-rw-r--r--drivers/usb/serial/cp210x.c306
-rw-r--r--drivers/usb/serial/cyberjack.c3
-rw-r--r--drivers/usb/serial/ftdi_sio.c10
-rw-r--r--drivers/usb/serial/ftdi_sio.h8
-rw-r--r--drivers/usb/serial/garmin_gps.c51
-rw-r--r--drivers/usb/serial/iuu_phoenix.c4
-rw-r--r--drivers/usb/serial/keyspan.c2
-rw-r--r--drivers/usb/serial/kl5kusb105.c3
-rw-r--r--drivers/usb/serial/mos7840.c4
-rw-r--r--drivers/usb/serial/quatech2.c2
-rw-r--r--drivers/usb/serial/safe_serial.c11
-rw-r--r--drivers/usb/storage/debug.c12
-rw-r--r--drivers/usb/storage/debug.h3
-rw-r--r--drivers/usb/storage/ene_ub6250.c4
-rw-r--r--drivers/usb/storage/sddr09.c18
-rw-r--r--drivers/usb/storage/uas.c36
-rw-r--r--drivers/usb/usbip/usbip_event.c5
-rw-r--r--drivers/usb/usbip/usbip_protocol.txt358
-rw-r--r--drivers/usb/usbip/vhci_hcd.c88
-rw-r--r--drivers/usb/usbip/vhci_rx.c30
-rw-r--r--drivers/usb/usbip/vhci_sysfs.c19
-rw-r--r--drivers/usb/usbip/vhci_tx.c14
-rw-r--r--drivers/usb/wusbcore/wusbhc.h2
155 files changed, 8519 insertions, 5765 deletions
diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile
index d5c57f1e98fd..dca78565eb55 100644
--- a/drivers/usb/Makefile
+++ b/drivers/usb/Makefile
@@ -26,7 +26,7 @@ obj-$(CONFIG_USB_U132_HCD) += host/
26obj-$(CONFIG_USB_R8A66597_HCD) += host/ 26obj-$(CONFIG_USB_R8A66597_HCD) += host/
27obj-$(CONFIG_USB_HWA_HCD) += host/ 27obj-$(CONFIG_USB_HWA_HCD) += host/
28obj-$(CONFIG_USB_IMX21_HCD) += host/ 28obj-$(CONFIG_USB_IMX21_HCD) += host/
29obj-$(CONFIG_USB_FSL_MPH_DR_OF) += host/ 29obj-$(CONFIG_USB_FSL_USB2) += host/
30obj-$(CONFIG_USB_FOTG210_HCD) += host/ 30obj-$(CONFIG_USB_FOTG210_HCD) += host/
31obj-$(CONFIG_USB_MAX3421_HCD) += host/ 31obj-$(CONFIG_USB_MAX3421_HCD) += host/
32 32
diff --git a/drivers/usb/atm/cxacru.c b/drivers/usb/atm/cxacru.c
index 1173f9cbc137..0a866e90b49c 100644
--- a/drivers/usb/atm/cxacru.c
+++ b/drivers/usb/atm/cxacru.c
@@ -476,6 +476,8 @@ static ssize_t cxacru_sysfs_store_adsl_config(struct device *dev,
476 return -EINVAL; 476 return -EINVAL;
477 if (index < 0 || index > 0x7f) 477 if (index < 0 || index > 0x7f)
478 return -EINVAL; 478 return -EINVAL;
479 if (tmp < 0 || tmp > len - pos)
480 return -EINVAL;
479 pos += tmp; 481 pos += tmp;
480 482
481 /* skip trailing newline */ 483 /* skip trailing newline */
diff --git a/drivers/usb/chipidea/ci_hdrc_imx.c b/drivers/usb/chipidea/ci_hdrc_imx.c
index f14f4ab47ebb..9ce8c9f91674 100644
--- a/drivers/usb/chipidea/ci_hdrc_imx.c
+++ b/drivers/usb/chipidea/ci_hdrc_imx.c
@@ -28,6 +28,11 @@ struct ci_hdrc_imx_platform_flag {
28 bool runtime_pm; 28 bool runtime_pm;
29}; 29};
30 30
31static const struct ci_hdrc_imx_platform_flag imx23_usb_data = {
32 .flags = CI_HDRC_TURN_VBUS_EARLY_ON |
33 CI_HDRC_DISABLE_STREAMING,
34};
35
31static const struct ci_hdrc_imx_platform_flag imx27_usb_data = { 36static const struct ci_hdrc_imx_platform_flag imx27_usb_data = {
32 CI_HDRC_DISABLE_STREAMING, 37 CI_HDRC_DISABLE_STREAMING,
33}; 38};
@@ -66,6 +71,7 @@ static const struct ci_hdrc_imx_platform_flag imx7d_usb_data = {
66}; 71};
67 72
68static const struct of_device_id ci_hdrc_imx_dt_ids[] = { 73static const struct of_device_id ci_hdrc_imx_dt_ids[] = {
74 { .compatible = "fsl,imx23-usb", .data = &imx23_usb_data},
69 { .compatible = "fsl,imx28-usb", .data = &imx28_usb_data}, 75 { .compatible = "fsl,imx28-usb", .data = &imx28_usb_data},
70 { .compatible = "fsl,imx27-usb", .data = &imx27_usb_data}, 76 { .compatible = "fsl,imx27-usb", .data = &imx27_usb_data},
71 { .compatible = "fsl,imx6q-usb", .data = &imx6q_usb_data}, 77 { .compatible = "fsl,imx6q-usb", .data = &imx6q_usb_data},
@@ -244,7 +250,6 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev)
244 struct ci_hdrc_platform_data pdata = { 250 struct ci_hdrc_platform_data pdata = {
245 .name = dev_name(&pdev->dev), 251 .name = dev_name(&pdev->dev),
246 .capoffset = DEF_CAPOFFSET, 252 .capoffset = DEF_CAPOFFSET,
247 .flags = CI_HDRC_SET_NON_ZERO_TTHA,
248 }; 253 };
249 int ret; 254 int ret;
250 const struct of_device_id *of_id; 255 const struct of_device_id *of_id;
@@ -302,9 +307,9 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev)
302 &pdata); 307 &pdata);
303 if (IS_ERR(data->ci_pdev)) { 308 if (IS_ERR(data->ci_pdev)) {
304 ret = PTR_ERR(data->ci_pdev); 309 ret = PTR_ERR(data->ci_pdev);
305 dev_err(&pdev->dev, 310 if (ret != -EPROBE_DEFER)
306 "Can't register ci_hdrc platform device, err=%d\n", 311 dev_err(&pdev->dev,
307 ret); 312 "ci_hdrc_add_device failed, err=%d\n", ret);
308 goto err_clk; 313 goto err_clk;
309 } 314 }
310 315
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 7404064b9bbc..69426e644d17 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -721,6 +721,9 @@ static int ci_get_platdata(struct device *dev,
721 return ret; 721 return ret;
722 } 722 }
723 723
724 if (of_find_property(dev->of_node, "non-zero-ttctrl-ttha", NULL))
725 platdata->flags |= CI_HDRC_SET_NON_ZERO_TTHA;
726
724 ext_id = ERR_PTR(-ENODEV); 727 ext_id = ERR_PTR(-ENODEV);
725 ext_vbus = ERR_PTR(-ENODEV); 728 ext_vbus = ERR_PTR(-ENODEV);
726 if (of_property_read_bool(dev->of_node, "extcon")) { 729 if (of_property_read_bool(dev->of_node, "extcon")) {
diff --git a/drivers/usb/chipidea/debug.c b/drivers/usb/chipidea/debug.c
index df47110bad2d..6d23eede4d8c 100644
--- a/drivers/usb/chipidea/debug.c
+++ b/drivers/usb/chipidea/debug.c
@@ -175,7 +175,6 @@ static int ci_requests_show(struct seq_file *s, void *data)
175{ 175{
176 struct ci_hdrc *ci = s->private; 176 struct ci_hdrc *ci = s->private;
177 unsigned long flags; 177 unsigned long flags;
178 struct list_head *ptr = NULL;
179 struct ci_hw_req *req = NULL; 178 struct ci_hw_req *req = NULL;
180 struct td_node *node, *tmpnode; 179 struct td_node *node, *tmpnode;
181 unsigned i, j, qsize = sizeof(struct ci_hw_td)/sizeof(u32); 180 unsigned i, j, qsize = sizeof(struct ci_hw_td)/sizeof(u32);
@@ -187,9 +186,7 @@ static int ci_requests_show(struct seq_file *s, void *data)
187 186
188 spin_lock_irqsave(&ci->lock, flags); 187 spin_lock_irqsave(&ci->lock, flags);
189 for (i = 0; i < ci->hw_ep_max; i++) 188 for (i = 0; i < ci->hw_ep_max; i++)
190 list_for_each(ptr, &ci->ci_hw_ep[i].qh.queue) { 189 list_for_each_entry(req, &ci->ci_hw_ep[i].qh.queue, queue) {
191 req = list_entry(ptr, struct ci_hw_req, queue);
192
193 list_for_each_entry_safe(node, tmpnode, &req->tds, td) { 190 list_for_each_entry_safe(node, tmpnode, &req->tds, td) {
194 seq_printf(s, "EP=%02i: TD=%08X %s\n", 191 seq_printf(s, "EP=%02i: TD=%08X %s\n",
195 i % (ci->hw_ep_max / 2), 192 i % (ci->hw_ep_max / 2),
diff --git a/drivers/usb/chipidea/otg_fsm.c b/drivers/usb/chipidea/otg_fsm.c
index ba90dc66703d..de8e22ec3902 100644
--- a/drivers/usb/chipidea/otg_fsm.c
+++ b/drivers/usb/chipidea/otg_fsm.c
@@ -66,6 +66,11 @@ set_a_bus_req(struct device *dev, struct device_attribute *attr,
66 return count; 66 return count;
67 } 67 }
68 ci->fsm.a_bus_req = 1; 68 ci->fsm.a_bus_req = 1;
69 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
70 ci->gadget.host_request_flag = 1;
71 mutex_unlock(&ci->fsm.lock);
72 return count;
73 }
69 } 74 }
70 75
71 ci_otg_queue_work(ci); 76 ci_otg_queue_work(ci);
@@ -144,8 +149,14 @@ set_b_bus_req(struct device *dev, struct device_attribute *attr,
144 mutex_lock(&ci->fsm.lock); 149 mutex_lock(&ci->fsm.lock);
145 if (buf[0] == '0') 150 if (buf[0] == '0')
146 ci->fsm.b_bus_req = 0; 151 ci->fsm.b_bus_req = 0;
147 else if (buf[0] == '1') 152 else if (buf[0] == '1') {
148 ci->fsm.b_bus_req = 1; 153 ci->fsm.b_bus_req = 1;
154 if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
155 ci->gadget.host_request_flag = 1;
156 mutex_unlock(&ci->fsm.lock);
157 return count;
158 }
159 }
149 160
150 ci_otg_queue_work(ci); 161 ci_otg_queue_work(ci);
151 mutex_unlock(&ci->fsm.lock); 162 mutex_unlock(&ci->fsm.lock);
@@ -198,6 +209,7 @@ static unsigned otg_timer_ms[] = {
198 TA_AIDL_BDIS, 209 TA_AIDL_BDIS,
199 TB_ASE0_BRST, 210 TB_ASE0_BRST,
200 TA_BIDL_ADIS, 211 TA_BIDL_ADIS,
212 TB_AIDL_BDIS,
201 TB_SE0_SRP, 213 TB_SE0_SRP,
202 TB_SRP_FAIL, 214 TB_SRP_FAIL,
203 0, 215 0,
@@ -309,6 +321,12 @@ static int a_bidl_adis_tmout(struct ci_hdrc *ci)
309 return 0; 321 return 0;
310} 322}
311 323
324static int b_aidl_bdis_tmout(struct ci_hdrc *ci)
325{
326 ci->fsm.a_bus_suspend = 1;
327 return 0;
328}
329
312static int b_se0_srp_tmout(struct ci_hdrc *ci) 330static int b_se0_srp_tmout(struct ci_hdrc *ci)
313{ 331{
314 ci->fsm.b_se0_srp = 1; 332 ci->fsm.b_se0_srp = 1;
@@ -353,6 +371,7 @@ static int (*otg_timer_handlers[])(struct ci_hdrc *) = {
353 a_aidl_bdis_tmout, /* A_AIDL_BDIS */ 371 a_aidl_bdis_tmout, /* A_AIDL_BDIS */
354 b_ase0_brst_tmout, /* B_ASE0_BRST */ 372 b_ase0_brst_tmout, /* B_ASE0_BRST */
355 a_bidl_adis_tmout, /* A_BIDL_ADIS */ 373 a_bidl_adis_tmout, /* A_BIDL_ADIS */
374 b_aidl_bdis_tmout, /* B_AIDL_BDIS */
356 b_se0_srp_tmout, /* B_SE0_SRP */ 375 b_se0_srp_tmout, /* B_SE0_SRP */
357 b_srp_fail_tmout, /* B_SRP_FAIL */ 376 b_srp_fail_tmout, /* B_SRP_FAIL */
358 NULL, /* A_WAIT_ENUM */ 377 NULL, /* A_WAIT_ENUM */
@@ -644,9 +663,9 @@ static void ci_otg_fsm_event(struct ci_hdrc *ci)
644 break; 663 break;
645 case OTG_STATE_B_PERIPHERAL: 664 case OTG_STATE_B_PERIPHERAL:
646 if ((intr_sts & USBi_SLI) && port_conn && otg_bsess_vld) { 665 if ((intr_sts & USBi_SLI) && port_conn && otg_bsess_vld) {
647 fsm->a_bus_suspend = 1; 666 ci_otg_add_timer(ci, B_AIDL_BDIS);
648 ci_otg_queue_work(ci);
649 } else if (intr_sts & USBi_PCI) { 667 } else if (intr_sts & USBi_PCI) {
668 ci_otg_del_timer(ci, B_AIDL_BDIS);
650 if (fsm->a_bus_suspend == 1) 669 if (fsm->a_bus_suspend == 1)
651 fsm->a_bus_suspend = 0; 670 fsm->a_bus_suspend = 0;
652 } 671 }
@@ -786,6 +805,10 @@ int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci)
786 ci->fsm.id = hw_read_otgsc(ci, OTGSC_ID) ? 1 : 0; 805 ci->fsm.id = hw_read_otgsc(ci, OTGSC_ID) ? 1 : 0;
787 ci->fsm.otg->state = OTG_STATE_UNDEFINED; 806 ci->fsm.otg->state = OTG_STATE_UNDEFINED;
788 ci->fsm.ops = &ci_otg_ops; 807 ci->fsm.ops = &ci_otg_ops;
808 ci->gadget.hnp_polling_support = 1;
809 ci->fsm.host_req_flag = devm_kzalloc(ci->dev, 1, GFP_KERNEL);
810 if (!ci->fsm.host_req_flag)
811 return -ENOMEM;
789 812
790 mutex_init(&ci->fsm.lock); 813 mutex_init(&ci->fsm.lock);
791 814
diff --git a/drivers/usb/chipidea/otg_fsm.h b/drivers/usb/chipidea/otg_fsm.h
index 262d6ef8df7c..6366fe398ba6 100644
--- a/drivers/usb/chipidea/otg_fsm.h
+++ b/drivers/usb/chipidea/otg_fsm.h
@@ -62,6 +62,8 @@
62/* SSEND time before SRP */ 62/* SSEND time before SRP */
63#define TB_SSEND_SRP (1500) /* minimum 1.5 sec, section:5.1.2 */ 63#define TB_SSEND_SRP (1500) /* minimum 1.5 sec, section:5.1.2 */
64 64
65#define TB_AIDL_BDIS (20) /* 4ms ~ 150ms, section 5.2.1 */
66
65#if IS_ENABLED(CONFIG_USB_OTG_FSM) 67#if IS_ENABLED(CONFIG_USB_OTG_FSM)
66 68
67int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci); 69int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci);
diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
index 3eafa2c9a2ba..065f5d97aa67 100644
--- a/drivers/usb/chipidea/udc.c
+++ b/drivers/usb/chipidea/udc.c
@@ -819,7 +819,6 @@ static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
819 ci->ep0out : ci->ep0in; 819 ci->ep0out : ci->ep0in;
820 if (!list_empty(&hwep->qh.queue)) { 820 if (!list_empty(&hwep->qh.queue)) {
821 _ep_nuke(hwep); 821 _ep_nuke(hwep);
822 retval = -EOVERFLOW;
823 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n", 822 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
824 _usb_addr(hwep)); 823 _usb_addr(hwep));
825 } 824 }
@@ -1068,7 +1067,8 @@ __acquires(ci->lock)
1068 } 1067 }
1069 break; 1068 break;
1070 case USB_REQ_GET_STATUS: 1069 case USB_REQ_GET_STATUS:
1071 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) && 1070 if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
1071 le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
1072 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) && 1072 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1073 type != (USB_DIR_IN|USB_RECIP_INTERFACE)) 1073 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1074 goto delegate; 1074 goto delegate;
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index fa4e23930614..1d2c99af2532 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -713,9 +713,20 @@ static int acm_tty_write(struct tty_struct *tty,
713 } 713 }
714 714
715 if (acm->susp_count) { 715 if (acm->susp_count) {
716 if (acm->putbuffer) {
717 /* now to preserve order */
718 usb_anchor_urb(acm->putbuffer->urb, &acm->delayed);
719 acm->putbuffer = NULL;
720 }
716 usb_anchor_urb(wb->urb, &acm->delayed); 721 usb_anchor_urb(wb->urb, &acm->delayed);
717 spin_unlock_irqrestore(&acm->write_lock, flags); 722 spin_unlock_irqrestore(&acm->write_lock, flags);
718 return count; 723 return count;
724 } else {
725 if (acm->putbuffer) {
726 /* at this point there is no good way to handle errors */
727 acm_start_wb(acm, acm->putbuffer);
728 acm->putbuffer = NULL;
729 }
719 } 730 }
720 731
721 stat = acm_start_wb(acm, wb); 732 stat = acm_start_wb(acm, wb);
@@ -726,6 +737,60 @@ static int acm_tty_write(struct tty_struct *tty,
726 return count; 737 return count;
727} 738}
728 739
740static void acm_tty_flush_chars(struct tty_struct *tty)
741{
742 struct acm *acm = tty->driver_data;
743 struct acm_wb *cur = acm->putbuffer;
744 int err;
745 unsigned long flags;
746
747 acm->putbuffer = NULL;
748 err = usb_autopm_get_interface_async(acm->control);
749 spin_lock_irqsave(&acm->write_lock, flags);
750 if (err < 0) {
751 cur->use = 0;
752 goto out;
753 }
754
755 if (acm->susp_count)
756 usb_anchor_urb(cur->urb, &acm->delayed);
757 else
758 acm_start_wb(acm, cur);
759out:
760 spin_unlock_irqrestore(&acm->write_lock, flags);
761 return;
762}
763
764static int acm_tty_put_char(struct tty_struct *tty, unsigned char ch)
765{
766 struct acm *acm = tty->driver_data;
767 struct acm_wb *cur;
768 int wbn;
769 unsigned long flags;
770
771overflow:
772 cur = acm->putbuffer;
773 if (!cur) {
774 spin_lock_irqsave(&acm->write_lock, flags);
775 wbn = acm_wb_alloc(acm);
776 if (wbn >= 0) {
777 cur = &acm->wb[wbn];
778 acm->putbuffer = cur;
779 }
780 spin_unlock_irqrestore(&acm->write_lock, flags);
781 if (!cur)
782 return 0;
783 }
784
785 if (cur->len == acm->writesize) {
786 acm_tty_flush_chars(tty);
787 goto overflow;
788 }
789
790 cur->buf[cur->len++] = ch;
791 return 1;
792}
793
729static int acm_tty_write_room(struct tty_struct *tty) 794static int acm_tty_write_room(struct tty_struct *tty)
730{ 795{
731 struct acm *acm = tty->driver_data; 796 struct acm *acm = tty->driver_data;
@@ -1905,6 +1970,8 @@ static const struct tty_operations acm_ops = {
1905 .cleanup = acm_tty_cleanup, 1970 .cleanup = acm_tty_cleanup,
1906 .hangup = acm_tty_hangup, 1971 .hangup = acm_tty_hangup,
1907 .write = acm_tty_write, 1972 .write = acm_tty_write,
1973 .put_char = acm_tty_put_char,
1974 .flush_chars = acm_tty_flush_chars,
1908 .write_room = acm_tty_write_room, 1975 .write_room = acm_tty_write_room,
1909 .ioctl = acm_tty_ioctl, 1976 .ioctl = acm_tty_ioctl,
1910 .throttle = acm_tty_throttle, 1977 .throttle = acm_tty_throttle,
diff --git a/drivers/usb/class/cdc-acm.h b/drivers/usb/class/cdc-acm.h
index ccfaba9ab4e4..05ce308d5d2a 100644
--- a/drivers/usb/class/cdc-acm.h
+++ b/drivers/usb/class/cdc-acm.h
@@ -94,6 +94,7 @@ struct acm {
94 unsigned long read_urbs_free; 94 unsigned long read_urbs_free;
95 struct urb *read_urbs[ACM_NR]; 95 struct urb *read_urbs[ACM_NR];
96 struct acm_rb read_buffers[ACM_NR]; 96 struct acm_rb read_buffers[ACM_NR];
97 struct acm_wb *putbuffer; /* for acm_tty_put_char() */
97 int rx_buflimit; 98 int rx_buflimit;
98 int rx_endpoint; 99 int rx_endpoint;
99 spinlock_t read_lock; 100 spinlock_t read_lock;
diff --git a/drivers/usb/class/usbtmc.c b/drivers/usb/class/usbtmc.c
index 7a11a8263171..917a55c4480d 100644
--- a/drivers/usb/class/usbtmc.c
+++ b/drivers/usb/class/usbtmc.c
@@ -27,6 +27,7 @@
27#include <linux/uaccess.h> 27#include <linux/uaccess.h>
28#include <linux/kref.h> 28#include <linux/kref.h>
29#include <linux/slab.h> 29#include <linux/slab.h>
30#include <linux/poll.h>
30#include <linux/mutex.h> 31#include <linux/mutex.h>
31#include <linux/usb.h> 32#include <linux/usb.h>
32#include <linux/usb/tmc.h> 33#include <linux/usb/tmc.h>
@@ -87,6 +88,23 @@ struct usbtmc_device_data {
87 u8 bTag_last_write; /* needed for abort */ 88 u8 bTag_last_write; /* needed for abort */
88 u8 bTag_last_read; /* needed for abort */ 89 u8 bTag_last_read; /* needed for abort */
89 90
91 /* data for interrupt in endpoint handling */
92 u8 bNotify1;
93 u8 bNotify2;
94 u16 ifnum;
95 u8 iin_bTag;
96 u8 *iin_buffer;
97 atomic_t iin_data_valid;
98 unsigned int iin_ep;
99 int iin_ep_present;
100 int iin_interval;
101 struct urb *iin_urb;
102 u16 iin_wMaxPacketSize;
103 atomic_t srq_asserted;
104
105 /* coalesced usb488_caps from usbtmc_dev_capabilities */
106 __u8 usb488_caps;
107
90 u8 rigol_quirk; 108 u8 rigol_quirk;
91 109
92 /* attributes from the USB TMC spec for this device */ 110 /* attributes from the USB TMC spec for this device */
@@ -99,6 +117,8 @@ struct usbtmc_device_data {
99 struct usbtmc_dev_capabilities capabilities; 117 struct usbtmc_dev_capabilities capabilities;
100 struct kref kref; 118 struct kref kref;
101 struct mutex io_mutex; /* only one i/o function running at a time */ 119 struct mutex io_mutex; /* only one i/o function running at a time */
120 wait_queue_head_t waitq;
121 struct fasync_struct *fasync;
102}; 122};
103#define to_usbtmc_data(d) container_of(d, struct usbtmc_device_data, kref) 123#define to_usbtmc_data(d) container_of(d, struct usbtmc_device_data, kref)
104 124
@@ -373,6 +393,142 @@ exit:
373 return rv; 393 return rv;
374} 394}
375 395
396static int usbtmc488_ioctl_read_stb(struct usbtmc_device_data *data,
397 void __user *arg)
398{
399 struct device *dev = &data->intf->dev;
400 u8 *buffer;
401 u8 tag;
402 __u8 stb;
403 int rv;
404
405 dev_dbg(dev, "Enter ioctl_read_stb iin_ep_present: %d\n",
406 data->iin_ep_present);
407
408 buffer = kmalloc(8, GFP_KERNEL);
409 if (!buffer)
410 return -ENOMEM;
411
412 atomic_set(&data->iin_data_valid, 0);
413
414 /* must issue read_stb before using poll or select */
415 atomic_set(&data->srq_asserted, 0);
416
417 rv = usb_control_msg(data->usb_dev,
418 usb_rcvctrlpipe(data->usb_dev, 0),
419 USBTMC488_REQUEST_READ_STATUS_BYTE,
420 USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE,
421 data->iin_bTag,
422 data->ifnum,
423 buffer, 0x03, USBTMC_TIMEOUT);
424 if (rv < 0) {
425 dev_err(dev, "stb usb_control_msg returned %d\n", rv);
426 goto exit;
427 }
428
429 if (buffer[0] != USBTMC_STATUS_SUCCESS) {
430 dev_err(dev, "control status returned %x\n", buffer[0]);
431 rv = -EIO;
432 goto exit;
433 }
434
435 if (data->iin_ep_present) {
436 rv = wait_event_interruptible_timeout(
437 data->waitq,
438 atomic_read(&data->iin_data_valid) != 0,
439 USBTMC_TIMEOUT);
440 if (rv < 0) {
441 dev_dbg(dev, "wait interrupted %d\n", rv);
442 goto exit;
443 }
444
445 if (rv == 0) {
446 dev_dbg(dev, "wait timed out\n");
447 rv = -ETIME;
448 goto exit;
449 }
450
451 tag = data->bNotify1 & 0x7f;
452 if (tag != data->iin_bTag) {
453 dev_err(dev, "expected bTag %x got %x\n",
454 data->iin_bTag, tag);
455 }
456
457 stb = data->bNotify2;
458 } else {
459 stb = buffer[2];
460 }
461
462 rv = copy_to_user(arg, &stb, sizeof(stb));
463 if (rv)
464 rv = -EFAULT;
465
466 exit:
467 /* bump interrupt bTag */
468 data->iin_bTag += 1;
469 if (data->iin_bTag > 127)
470 /* 1 is for SRQ see USBTMC-USB488 subclass spec section 4.3.1 */
471 data->iin_bTag = 2;
472
473 kfree(buffer);
474 return rv;
475}
476
477static int usbtmc488_ioctl_simple(struct usbtmc_device_data *data,
478 void __user *arg, unsigned int cmd)
479{
480 struct device *dev = &data->intf->dev;
481 __u8 val;
482 u8 *buffer;
483 u16 wValue;
484 int rv;
485
486 if (!(data->usb488_caps & USBTMC488_CAPABILITY_SIMPLE))
487 return -EINVAL;
488
489 buffer = kmalloc(8, GFP_KERNEL);
490 if (!buffer)
491 return -ENOMEM;
492
493 if (cmd == USBTMC488_REQUEST_REN_CONTROL) {
494 rv = copy_from_user(&val, arg, sizeof(val));
495 if (rv) {
496 rv = -EFAULT;
497 goto exit;
498 }
499 wValue = val ? 1 : 0;
500 } else {
501 wValue = 0;
502 }
503
504 rv = usb_control_msg(data->usb_dev,
505 usb_rcvctrlpipe(data->usb_dev, 0),
506 cmd,
507 USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE,
508 wValue,
509 data->ifnum,
510 buffer, 0x01, USBTMC_TIMEOUT);
511 if (rv < 0) {
512 dev_err(dev, "simple usb_control_msg failed %d\n", rv);
513 goto exit;
514 } else if (rv != 1) {
515 dev_warn(dev, "simple usb_control_msg returned %d\n", rv);
516 rv = -EIO;
517 goto exit;
518 }
519
520 if (buffer[0] != USBTMC_STATUS_SUCCESS) {
521 dev_err(dev, "simple control status returned %x\n", buffer[0]);
522 rv = -EIO;
523 goto exit;
524 }
525 rv = 0;
526
527 exit:
528 kfree(buffer);
529 return rv;
530}
531
376/* 532/*
377 * Sends a REQUEST_DEV_DEP_MSG_IN message on the Bulk-IN endpoint. 533 * Sends a REQUEST_DEV_DEP_MSG_IN message on the Bulk-IN endpoint.
378 * @transfer_size: number of bytes to request from the device. 534 * @transfer_size: number of bytes to request from the device.
@@ -895,6 +1051,7 @@ static int get_capabilities(struct usbtmc_device_data *data)
895 data->capabilities.device_capabilities = buffer[5]; 1051 data->capabilities.device_capabilities = buffer[5];
896 data->capabilities.usb488_interface_capabilities = buffer[14]; 1052 data->capabilities.usb488_interface_capabilities = buffer[14];
897 data->capabilities.usb488_device_capabilities = buffer[15]; 1053 data->capabilities.usb488_device_capabilities = buffer[15];
1054 data->usb488_caps = (buffer[14] & 0x07) | ((buffer[15] & 0x0f) << 4);
898 rv = 0; 1055 rv = 0;
899 1056
900err_out: 1057err_out:
@@ -1069,6 +1226,33 @@ static long usbtmc_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1069 case USBTMC_IOCTL_ABORT_BULK_IN: 1226 case USBTMC_IOCTL_ABORT_BULK_IN:
1070 retval = usbtmc_ioctl_abort_bulk_in(data); 1227 retval = usbtmc_ioctl_abort_bulk_in(data);
1071 break; 1228 break;
1229
1230 case USBTMC488_IOCTL_GET_CAPS:
1231 retval = copy_to_user((void __user *)arg,
1232 &data->usb488_caps,
1233 sizeof(data->usb488_caps));
1234 if (retval)
1235 retval = -EFAULT;
1236 break;
1237
1238 case USBTMC488_IOCTL_READ_STB:
1239 retval = usbtmc488_ioctl_read_stb(data, (void __user *)arg);
1240 break;
1241
1242 case USBTMC488_IOCTL_REN_CONTROL:
1243 retval = usbtmc488_ioctl_simple(data, (void __user *)arg,
1244 USBTMC488_REQUEST_REN_CONTROL);
1245 break;
1246
1247 case USBTMC488_IOCTL_GOTO_LOCAL:
1248 retval = usbtmc488_ioctl_simple(data, (void __user *)arg,
1249 USBTMC488_REQUEST_GOTO_LOCAL);
1250 break;
1251
1252 case USBTMC488_IOCTL_LOCAL_LOCKOUT:
1253 retval = usbtmc488_ioctl_simple(data, (void __user *)arg,
1254 USBTMC488_REQUEST_LOCAL_LOCKOUT);
1255 break;
1072 } 1256 }
1073 1257
1074skip_io_on_zombie: 1258skip_io_on_zombie:
@@ -1076,6 +1260,34 @@ skip_io_on_zombie:
1076 return retval; 1260 return retval;
1077} 1261}
1078 1262
1263static int usbtmc_fasync(int fd, struct file *file, int on)
1264{
1265 struct usbtmc_device_data *data = file->private_data;
1266
1267 return fasync_helper(fd, file, on, &data->fasync);
1268}
1269
1270static unsigned int usbtmc_poll(struct file *file, poll_table *wait)
1271{
1272 struct usbtmc_device_data *data = file->private_data;
1273 unsigned int mask;
1274
1275 mutex_lock(&data->io_mutex);
1276
1277 if (data->zombie) {
1278 mask = POLLHUP | POLLERR;
1279 goto no_poll;
1280 }
1281
1282 poll_wait(file, &data->waitq, wait);
1283
1284 mask = (atomic_read(&data->srq_asserted)) ? POLLIN | POLLRDNORM : 0;
1285
1286no_poll:
1287 mutex_unlock(&data->io_mutex);
1288 return mask;
1289}
1290
1079static const struct file_operations fops = { 1291static const struct file_operations fops = {
1080 .owner = THIS_MODULE, 1292 .owner = THIS_MODULE,
1081 .read = usbtmc_read, 1293 .read = usbtmc_read,
@@ -1083,6 +1295,8 @@ static const struct file_operations fops = {
1083 .open = usbtmc_open, 1295 .open = usbtmc_open,
1084 .release = usbtmc_release, 1296 .release = usbtmc_release,
1085 .unlocked_ioctl = usbtmc_ioctl, 1297 .unlocked_ioctl = usbtmc_ioctl,
1298 .fasync = usbtmc_fasync,
1299 .poll = usbtmc_poll,
1086 .llseek = default_llseek, 1300 .llseek = default_llseek,
1087}; 1301};
1088 1302
@@ -1092,6 +1306,67 @@ static struct usb_class_driver usbtmc_class = {
1092 .minor_base = USBTMC_MINOR_BASE, 1306 .minor_base = USBTMC_MINOR_BASE,
1093}; 1307};
1094 1308
1309static void usbtmc_interrupt(struct urb *urb)
1310{
1311 struct usbtmc_device_data *data = urb->context;
1312 struct device *dev = &data->intf->dev;
1313 int status = urb->status;
1314 int rv;
1315
1316 dev_dbg(&data->intf->dev, "int status: %d len %d\n",
1317 status, urb->actual_length);
1318
1319 switch (status) {
1320 case 0: /* SUCCESS */
1321 /* check for valid STB notification */
1322 if (data->iin_buffer[0] > 0x81) {
1323 data->bNotify1 = data->iin_buffer[0];
1324 data->bNotify2 = data->iin_buffer[1];
1325 atomic_set(&data->iin_data_valid, 1);
1326 wake_up_interruptible(&data->waitq);
1327 goto exit;
1328 }
1329 /* check for SRQ notification */
1330 if (data->iin_buffer[0] == 0x81) {
1331 if (data->fasync)
1332 kill_fasync(&data->fasync,
1333 SIGIO, POLL_IN);
1334
1335 atomic_set(&data->srq_asserted, 1);
1336 wake_up_interruptible(&data->waitq);
1337 goto exit;
1338 }
1339 dev_warn(dev, "invalid notification: %x\n", data->iin_buffer[0]);
1340 break;
1341 case -EOVERFLOW:
1342 dev_err(dev, "overflow with length %d, actual length is %d\n",
1343 data->iin_wMaxPacketSize, urb->actual_length);
1344 case -ECONNRESET:
1345 case -ENOENT:
1346 case -ESHUTDOWN:
1347 case -EILSEQ:
1348 case -ETIME:
1349 /* urb terminated, clean up */
1350 dev_dbg(dev, "urb terminated, status: %d\n", status);
1351 return;
1352 default:
1353 dev_err(dev, "unknown status received: %d\n", status);
1354 }
1355exit:
1356 rv = usb_submit_urb(urb, GFP_ATOMIC);
1357 if (rv)
1358 dev_err(dev, "usb_submit_urb failed: %d\n", rv);
1359}
1360
1361static void usbtmc_free_int(struct usbtmc_device_data *data)
1362{
1363 if (!data->iin_ep_present || !data->iin_urb)
1364 return;
1365 usb_kill_urb(data->iin_urb);
1366 kfree(data->iin_buffer);
1367 usb_free_urb(data->iin_urb);
1368 kref_put(&data->kref, usbtmc_delete);
1369}
1095 1370
1096static int usbtmc_probe(struct usb_interface *intf, 1371static int usbtmc_probe(struct usb_interface *intf,
1097 const struct usb_device_id *id) 1372 const struct usb_device_id *id)
@@ -1114,6 +1389,9 @@ static int usbtmc_probe(struct usb_interface *intf,
1114 usb_set_intfdata(intf, data); 1389 usb_set_intfdata(intf, data);
1115 kref_init(&data->kref); 1390 kref_init(&data->kref);
1116 mutex_init(&data->io_mutex); 1391 mutex_init(&data->io_mutex);
1392 init_waitqueue_head(&data->waitq);
1393 atomic_set(&data->iin_data_valid, 0);
1394 atomic_set(&data->srq_asserted, 0);
1117 data->zombie = 0; 1395 data->zombie = 0;
1118 1396
1119 /* Determine if it is a Rigol or not */ 1397 /* Determine if it is a Rigol or not */
@@ -1134,9 +1412,12 @@ static int usbtmc_probe(struct usb_interface *intf,
1134 data->bTag = 1; 1412 data->bTag = 1;
1135 data->TermCharEnabled = 0; 1413 data->TermCharEnabled = 0;
1136 data->TermChar = '\n'; 1414 data->TermChar = '\n';
1415 /* 2 <= bTag <= 127 USBTMC-USB488 subclass specification 4.3.1 */
1416 data->iin_bTag = 2;
1137 1417
1138 /* USBTMC devices have only one setting, so use that */ 1418 /* USBTMC devices have only one setting, so use that */
1139 iface_desc = data->intf->cur_altsetting; 1419 iface_desc = data->intf->cur_altsetting;
1420 data->ifnum = iface_desc->desc.bInterfaceNumber;
1140 1421
1141 /* Find bulk in endpoint */ 1422 /* Find bulk in endpoint */
1142 for (n = 0; n < iface_desc->desc.bNumEndpoints; n++) { 1423 for (n = 0; n < iface_desc->desc.bNumEndpoints; n++) {
@@ -1161,6 +1442,20 @@ static int usbtmc_probe(struct usb_interface *intf,
1161 break; 1442 break;
1162 } 1443 }
1163 } 1444 }
1445 /* Find int endpoint */
1446 for (n = 0; n < iface_desc->desc.bNumEndpoints; n++) {
1447 endpoint = &iface_desc->endpoint[n].desc;
1448
1449 if (usb_endpoint_is_int_in(endpoint)) {
1450 data->iin_ep_present = 1;
1451 data->iin_ep = endpoint->bEndpointAddress;
1452 data->iin_wMaxPacketSize = usb_endpoint_maxp(endpoint);
1453 data->iin_interval = endpoint->bInterval;
1454 dev_dbg(&intf->dev, "Found Int in endpoint at %u\n",
1455 data->iin_ep);
1456 break;
1457 }
1458 }
1164 1459
1165 retcode = get_capabilities(data); 1460 retcode = get_capabilities(data);
1166 if (retcode) 1461 if (retcode)
@@ -1169,6 +1464,39 @@ static int usbtmc_probe(struct usb_interface *intf,
1169 retcode = sysfs_create_group(&intf->dev.kobj, 1464 retcode = sysfs_create_group(&intf->dev.kobj,
1170 &capability_attr_grp); 1465 &capability_attr_grp);
1171 1466
1467 if (data->iin_ep_present) {
1468 /* allocate int urb */
1469 data->iin_urb = usb_alloc_urb(0, GFP_KERNEL);
1470 if (!data->iin_urb) {
1471 dev_err(&intf->dev, "Failed to allocate int urb\n");
1472 goto error_register;
1473 }
1474
1475 /* will reference data in int urb */
1476 kref_get(&data->kref);
1477
1478 /* allocate buffer for interrupt in */
1479 data->iin_buffer = kmalloc(data->iin_wMaxPacketSize,
1480 GFP_KERNEL);
1481 if (!data->iin_buffer) {
1482 dev_err(&intf->dev, "Failed to allocate int buf\n");
1483 goto error_register;
1484 }
1485
1486 /* fill interrupt urb */
1487 usb_fill_int_urb(data->iin_urb, data->usb_dev,
1488 usb_rcvintpipe(data->usb_dev, data->iin_ep),
1489 data->iin_buffer, data->iin_wMaxPacketSize,
1490 usbtmc_interrupt,
1491 data, data->iin_interval);
1492
1493 retcode = usb_submit_urb(data->iin_urb, GFP_KERNEL);
1494 if (retcode) {
1495 dev_err(&intf->dev, "Failed to submit iin_urb\n");
1496 goto error_register;
1497 }
1498 }
1499
1172 retcode = sysfs_create_group(&intf->dev.kobj, &data_attr_grp); 1500 retcode = sysfs_create_group(&intf->dev.kobj, &data_attr_grp);
1173 1501
1174 retcode = usb_register_dev(intf, &usbtmc_class); 1502 retcode = usb_register_dev(intf, &usbtmc_class);
@@ -1185,6 +1513,7 @@ static int usbtmc_probe(struct usb_interface *intf,
1185error_register: 1513error_register:
1186 sysfs_remove_group(&intf->dev.kobj, &capability_attr_grp); 1514 sysfs_remove_group(&intf->dev.kobj, &capability_attr_grp);
1187 sysfs_remove_group(&intf->dev.kobj, &data_attr_grp); 1515 sysfs_remove_group(&intf->dev.kobj, &data_attr_grp);
1516 usbtmc_free_int(data);
1188 kref_put(&data->kref, usbtmc_delete); 1517 kref_put(&data->kref, usbtmc_delete);
1189 return retcode; 1518 return retcode;
1190} 1519}
@@ -1201,7 +1530,9 @@ static void usbtmc_disconnect(struct usb_interface *intf)
1201 sysfs_remove_group(&intf->dev.kobj, &data_attr_grp); 1530 sysfs_remove_group(&intf->dev.kobj, &data_attr_grp);
1202 mutex_lock(&data->io_mutex); 1531 mutex_lock(&data->io_mutex);
1203 data->zombie = 1; 1532 data->zombie = 1;
1533 wake_up_all(&data->waitq);
1204 mutex_unlock(&data->io_mutex); 1534 mutex_unlock(&data->io_mutex);
1535 usbtmc_free_int(data);
1205 kref_put(&data->kref, usbtmc_delete); 1536 kref_put(&data->kref, usbtmc_delete);
1206} 1537}
1207 1538
diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c
index e6ec125e4485..49fbfe8b0f24 100644
--- a/drivers/usb/common/common.c
+++ b/drivers/usb/common/common.c
@@ -51,6 +51,7 @@ static const char *const speed_names[] = {
51 [USB_SPEED_HIGH] = "high-speed", 51 [USB_SPEED_HIGH] = "high-speed",
52 [USB_SPEED_WIRELESS] = "wireless", 52 [USB_SPEED_WIRELESS] = "wireless",
53 [USB_SPEED_SUPER] = "super-speed", 53 [USB_SPEED_SUPER] = "super-speed",
54 [USB_SPEED_SUPER_PLUS] = "super-speed-plus",
54}; 55};
55 56
56const char *usb_speed_string(enum usb_device_speed speed) 57const char *usb_speed_string(enum usb_device_speed speed)
diff --git a/drivers/usb/common/usb-otg-fsm.c b/drivers/usb/common/usb-otg-fsm.c
index 61d538aa2346..504708f59b93 100644
--- a/drivers/usb/common/usb-otg-fsm.c
+++ b/drivers/usb/common/usb-otg-fsm.c
@@ -78,6 +78,8 @@ static void otg_leave_state(struct otg_fsm *fsm, enum usb_otg_state old_state)
78 fsm->b_srp_done = 0; 78 fsm->b_srp_done = 0;
79 break; 79 break;
80 case OTG_STATE_B_PERIPHERAL: 80 case OTG_STATE_B_PERIPHERAL:
81 if (fsm->otg->gadget)
82 fsm->otg->gadget->host_request_flag = 0;
81 break; 83 break;
82 case OTG_STATE_B_WAIT_ACON: 84 case OTG_STATE_B_WAIT_ACON:
83 otg_del_timer(fsm, B_ASE0_BRST); 85 otg_del_timer(fsm, B_ASE0_BRST);
@@ -107,6 +109,8 @@ static void otg_leave_state(struct otg_fsm *fsm, enum usb_otg_state old_state)
107 case OTG_STATE_A_PERIPHERAL: 109 case OTG_STATE_A_PERIPHERAL:
108 otg_del_timer(fsm, A_BIDL_ADIS); 110 otg_del_timer(fsm, A_BIDL_ADIS);
109 fsm->a_bidl_adis_tmout = 0; 111 fsm->a_bidl_adis_tmout = 0;
112 if (fsm->otg->gadget)
113 fsm->otg->gadget->host_request_flag = 0;
110 break; 114 break;
111 case OTG_STATE_A_WAIT_VFALL: 115 case OTG_STATE_A_WAIT_VFALL:
112 otg_del_timer(fsm, A_WAIT_VFALL); 116 otg_del_timer(fsm, A_WAIT_VFALL);
@@ -120,6 +124,87 @@ static void otg_leave_state(struct otg_fsm *fsm, enum usb_otg_state old_state)
120 } 124 }
121} 125}
122 126
127static void otg_hnp_polling_work(struct work_struct *work)
128{
129 struct otg_fsm *fsm = container_of(to_delayed_work(work),
130 struct otg_fsm, hnp_polling_work);
131 struct usb_device *udev;
132 enum usb_otg_state state = fsm->otg->state;
133 u8 flag;
134 int retval;
135
136 if (state != OTG_STATE_A_HOST && state != OTG_STATE_B_HOST)
137 return;
138
139 udev = usb_hub_find_child(fsm->otg->host->root_hub, 1);
140 if (!udev) {
141 dev_err(fsm->otg->host->controller,
142 "no usb dev connected, can't start HNP polling\n");
143 return;
144 }
145
146 *fsm->host_req_flag = 0;
147 /* Get host request flag from connected USB device */
148 retval = usb_control_msg(udev,
149 usb_rcvctrlpipe(udev, 0),
150 USB_REQ_GET_STATUS,
151 USB_DIR_IN | USB_RECIP_DEVICE,
152 0,
153 OTG_STS_SELECTOR,
154 fsm->host_req_flag,
155 1,
156 USB_CTRL_GET_TIMEOUT);
157 if (retval != 1) {
158 dev_err(&udev->dev, "Get one byte OTG status failed\n");
159 return;
160 }
161
162 flag = *fsm->host_req_flag;
163 if (flag == 0) {
164 /* Continue HNP polling */
165 schedule_delayed_work(&fsm->hnp_polling_work,
166 msecs_to_jiffies(T_HOST_REQ_POLL));
167 return;
168 } else if (flag != HOST_REQUEST_FLAG) {
169 dev_err(&udev->dev, "host request flag %d is invalid\n", flag);
170 return;
171 }
172
173 /* Host request flag is set */
174 if (state == OTG_STATE_A_HOST) {
175 /* Set b_hnp_enable */
176 if (!fsm->otg->host->b_hnp_enable) {
177 retval = usb_control_msg(udev,
178 usb_sndctrlpipe(udev, 0),
179 USB_REQ_SET_FEATURE, 0,
180 USB_DEVICE_B_HNP_ENABLE,
181 0, NULL, 0,
182 USB_CTRL_SET_TIMEOUT);
183 if (retval >= 0)
184 fsm->otg->host->b_hnp_enable = 1;
185 }
186 fsm->a_bus_req = 0;
187 } else if (state == OTG_STATE_B_HOST) {
188 fsm->b_bus_req = 0;
189 }
190
191 otg_statemachine(fsm);
192}
193
194static void otg_start_hnp_polling(struct otg_fsm *fsm)
195{
196 /*
197 * The memory of host_req_flag should be allocated by
198 * controller driver, otherwise, hnp polling is not started.
199 */
200 if (!fsm->host_req_flag)
201 return;
202
203 INIT_DELAYED_WORK(&fsm->hnp_polling_work, otg_hnp_polling_work);
204 schedule_delayed_work(&fsm->hnp_polling_work,
205 msecs_to_jiffies(T_HOST_REQ_POLL));
206}
207
123/* Called when entering a state */ 208/* Called when entering a state */
124static int otg_set_state(struct otg_fsm *fsm, enum usb_otg_state new_state) 209static int otg_set_state(struct otg_fsm *fsm, enum usb_otg_state new_state)
125{ 210{
@@ -169,6 +254,7 @@ static int otg_set_state(struct otg_fsm *fsm, enum usb_otg_state new_state)
169 otg_set_protocol(fsm, PROTO_HOST); 254 otg_set_protocol(fsm, PROTO_HOST);
170 usb_bus_start_enum(fsm->otg->host, 255 usb_bus_start_enum(fsm->otg->host,
171 fsm->otg->host->otg_port); 256 fsm->otg->host->otg_port);
257 otg_start_hnp_polling(fsm);
172 break; 258 break;
173 case OTG_STATE_A_IDLE: 259 case OTG_STATE_A_IDLE:
174 otg_drv_vbus(fsm, 0); 260 otg_drv_vbus(fsm, 0);
@@ -203,6 +289,7 @@ static int otg_set_state(struct otg_fsm *fsm, enum usb_otg_state new_state)
203 */ 289 */
204 if (!fsm->a_bus_req || fsm->a_suspend_req_inf) 290 if (!fsm->a_bus_req || fsm->a_suspend_req_inf)
205 otg_add_timer(fsm, A_WAIT_ENUM); 291 otg_add_timer(fsm, A_WAIT_ENUM);
292 otg_start_hnp_polling(fsm);
206 break; 293 break;
207 case OTG_STATE_A_SUSPEND: 294 case OTG_STATE_A_SUSPEND:
208 otg_drv_vbus(fsm, 1); 295 otg_drv_vbus(fsm, 1);
diff --git a/drivers/usb/core/Makefile b/drivers/usb/core/Makefile
index 2f6f93220046..9780877010b4 100644
--- a/drivers/usb/core/Makefile
+++ b/drivers/usb/core/Makefile
@@ -5,7 +5,7 @@
5usbcore-y := usb.o hub.o hcd.o urb.o message.o driver.o 5usbcore-y := usb.o hub.o hcd.o urb.o message.o driver.o
6usbcore-y += config.o file.o buffer.o sysfs.o endpoint.o 6usbcore-y += config.o file.o buffer.o sysfs.o endpoint.o
7usbcore-y += devio.o notify.o generic.o quirks.o devices.o 7usbcore-y += devio.o notify.o generic.o quirks.o devices.o
8usbcore-y += port.o 8usbcore-y += port.o of.o
9 9
10usbcore-$(CONFIG_PCI) += hcd-pci.o 10usbcore-$(CONFIG_PCI) += hcd-pci.o
11usbcore-$(CONFIG_ACPI) += usb-acpi.o 11usbcore-$(CONFIG_ACPI) += usb-acpi.o
diff --git a/drivers/usb/core/buffer.c b/drivers/usb/core/buffer.c
index 89f2e7765093..2741566ee4f2 100644
--- a/drivers/usb/core/buffer.c
+++ b/drivers/usb/core/buffer.c
@@ -62,8 +62,9 @@ int hcd_buffer_create(struct usb_hcd *hcd)
62 char name[16]; 62 char name[16];
63 int i, size; 63 int i, size;
64 64
65 if (!hcd->self.controller->dma_mask && 65 if (!IS_ENABLED(CONFIG_HAS_DMA) ||
66 !(hcd->driver->flags & HCD_LOCAL_MEM)) 66 (!hcd->self.controller->dma_mask &&
67 !(hcd->driver->flags & HCD_LOCAL_MEM)))
67 return 0; 68 return 0;
68 69
69 for (i = 0; i < HCD_BUFFER_POOLS; i++) { 70 for (i = 0; i < HCD_BUFFER_POOLS; i++) {
@@ -93,6 +94,9 @@ void hcd_buffer_destroy(struct usb_hcd *hcd)
93{ 94{
94 int i; 95 int i;
95 96
97 if (!IS_ENABLED(CONFIG_HAS_DMA))
98 return;
99
96 for (i = 0; i < HCD_BUFFER_POOLS; i++) { 100 for (i = 0; i < HCD_BUFFER_POOLS; i++) {
97 struct dma_pool *pool = hcd->pool[i]; 101 struct dma_pool *pool = hcd->pool[i];
98 102
@@ -119,8 +123,9 @@ void *hcd_buffer_alloc(
119 int i; 123 int i;
120 124
121 /* some USB hosts just use PIO */ 125 /* some USB hosts just use PIO */
122 if (!bus->controller->dma_mask && 126 if (!IS_ENABLED(CONFIG_HAS_DMA) ||
123 !(hcd->driver->flags & HCD_LOCAL_MEM)) { 127 (!bus->controller->dma_mask &&
128 !(hcd->driver->flags & HCD_LOCAL_MEM))) {
124 *dma = ~(dma_addr_t) 0; 129 *dma = ~(dma_addr_t) 0;
125 return kmalloc(size, mem_flags); 130 return kmalloc(size, mem_flags);
126 } 131 }
@@ -145,8 +150,9 @@ void hcd_buffer_free(
145 if (!addr) 150 if (!addr)
146 return; 151 return;
147 152
148 if (!bus->controller->dma_mask && 153 if (!IS_ENABLED(CONFIG_HAS_DMA) ||
149 !(hcd->driver->flags & HCD_LOCAL_MEM)) { 154 (!bus->controller->dma_mask &&
155 !(hcd->driver->flags & HCD_LOCAL_MEM))) {
150 kfree(addr); 156 kfree(addr);
151 return; 157 return;
152 } 158 }
diff --git a/drivers/usb/core/config.c b/drivers/usb/core/config.c
index 5050760f5e17..5eb1a87228b4 100644
--- a/drivers/usb/core/config.c
+++ b/drivers/usb/core/config.c
@@ -43,6 +43,27 @@ static int find_next_descriptor(unsigned char *buffer, int size,
43 return buffer - buffer0; 43 return buffer - buffer0;
44} 44}
45 45
46static void usb_parse_ssp_isoc_endpoint_companion(struct device *ddev,
47 int cfgno, int inum, int asnum, struct usb_host_endpoint *ep,
48 unsigned char *buffer, int size)
49{
50 struct usb_ssp_isoc_ep_comp_descriptor *desc;
51
52 /*
53 * The SuperSpeedPlus Isoc endpoint companion descriptor immediately
54 * follows the SuperSpeed Endpoint Companion descriptor
55 */
56 desc = (struct usb_ssp_isoc_ep_comp_descriptor *) buffer;
57 if (desc->bDescriptorType != USB_DT_SSP_ISOC_ENDPOINT_COMP ||
58 size < USB_DT_SSP_ISOC_EP_COMP_SIZE) {
59 dev_warn(ddev, "Invalid SuperSpeedPlus isoc endpoint companion"
60 "for config %d interface %d altsetting %d ep %d.\n",
61 cfgno, inum, asnum, ep->desc.bEndpointAddress);
62 return;
63 }
64 memcpy(&ep->ssp_isoc_ep_comp, desc, USB_DT_SSP_ISOC_EP_COMP_SIZE);
65}
66
46static void usb_parse_ss_endpoint_companion(struct device *ddev, int cfgno, 67static void usb_parse_ss_endpoint_companion(struct device *ddev, int cfgno,
47 int inum, int asnum, struct usb_host_endpoint *ep, 68 int inum, int asnum, struct usb_host_endpoint *ep,
48 unsigned char *buffer, int size) 69 unsigned char *buffer, int size)
@@ -54,6 +75,9 @@ static void usb_parse_ss_endpoint_companion(struct device *ddev, int cfgno,
54 * be the first thing immediately following the endpoint descriptor. 75 * be the first thing immediately following the endpoint descriptor.
55 */ 76 */
56 desc = (struct usb_ss_ep_comp_descriptor *) buffer; 77 desc = (struct usb_ss_ep_comp_descriptor *) buffer;
78 buffer += desc->bLength;
79 size -= desc->bLength;
80
57 if (desc->bDescriptorType != USB_DT_SS_ENDPOINT_COMP || 81 if (desc->bDescriptorType != USB_DT_SS_ENDPOINT_COMP ||
58 size < USB_DT_SS_EP_COMP_SIZE) { 82 size < USB_DT_SS_EP_COMP_SIZE) {
59 dev_warn(ddev, "No SuperSpeed endpoint companion for config %d " 83 dev_warn(ddev, "No SuperSpeed endpoint companion for config %d "
@@ -112,6 +136,7 @@ static void usb_parse_ss_endpoint_companion(struct device *ddev, int cfgno,
112 cfgno, inum, asnum, ep->desc.bEndpointAddress); 136 cfgno, inum, asnum, ep->desc.bEndpointAddress);
113 ep->ss_ep_comp.bmAttributes = 16; 137 ep->ss_ep_comp.bmAttributes = 16;
114 } else if (usb_endpoint_xfer_isoc(&ep->desc) && 138 } else if (usb_endpoint_xfer_isoc(&ep->desc) &&
139 !USB_SS_SSP_ISOC_COMP(desc->bmAttributes) &&
115 USB_SS_MULT(desc->bmAttributes) > 3) { 140 USB_SS_MULT(desc->bmAttributes) > 3) {
116 dev_warn(ddev, "Isoc endpoint has Mult of %d in " 141 dev_warn(ddev, "Isoc endpoint has Mult of %d in "
117 "config %d interface %d altsetting %d ep %d: " 142 "config %d interface %d altsetting %d ep %d: "
@@ -121,6 +146,12 @@ static void usb_parse_ss_endpoint_companion(struct device *ddev, int cfgno,
121 ep->ss_ep_comp.bmAttributes = 2; 146 ep->ss_ep_comp.bmAttributes = 2;
122 } 147 }
123 148
149 /* Parse a possible SuperSpeedPlus isoc ep companion descriptor */
150 if (usb_endpoint_xfer_isoc(&ep->desc) &&
151 USB_SS_SSP_ISOC_COMP(desc->bmAttributes))
152 usb_parse_ssp_isoc_endpoint_companion(ddev, cfgno, inum, asnum,
153 ep, buffer, size);
154
124 if (usb_endpoint_xfer_isoc(&ep->desc)) 155 if (usb_endpoint_xfer_isoc(&ep->desc))
125 max_tx = (desc->bMaxBurst + 1) * 156 max_tx = (desc->bMaxBurst + 1) *
126 (USB_SS_MULT(desc->bmAttributes)) * 157 (USB_SS_MULT(desc->bmAttributes)) *
@@ -191,6 +222,7 @@ static int usb_parse_endpoint(struct device *ddev, int cfgno, int inum,
191 if (usb_endpoint_xfer_int(d)) { 222 if (usb_endpoint_xfer_int(d)) {
192 i = 1; 223 i = 1;
193 switch (to_usb_device(ddev)->speed) { 224 switch (to_usb_device(ddev)->speed) {
225 case USB_SPEED_SUPER_PLUS:
194 case USB_SPEED_SUPER: 226 case USB_SPEED_SUPER:
195 case USB_SPEED_HIGH: 227 case USB_SPEED_HIGH:
196 /* Many device manufacturers are using full-speed 228 /* Many device manufacturers are using full-speed
@@ -274,7 +306,7 @@ static int usb_parse_endpoint(struct device *ddev, int cfgno, int inum,
274 } 306 }
275 307
276 /* Parse a possible SuperSpeed endpoint companion descriptor */ 308 /* Parse a possible SuperSpeed endpoint companion descriptor */
277 if (to_usb_device(ddev)->speed == USB_SPEED_SUPER) 309 if (to_usb_device(ddev)->speed >= USB_SPEED_SUPER)
278 usb_parse_ss_endpoint_companion(ddev, cfgno, 310 usb_parse_ss_endpoint_companion(ddev, cfgno,
279 inum, asnum, endpoint, buffer, size); 311 inum, asnum, endpoint, buffer, size);
280 312
@@ -862,6 +894,9 @@ int usb_get_bos_descriptor(struct usb_device *dev)
862 dev->bos->ss_id = 894 dev->bos->ss_id =
863 (struct usb_ss_container_id_descriptor *)buffer; 895 (struct usb_ss_container_id_descriptor *)buffer;
864 break; 896 break;
897 case USB_PTM_CAP_TYPE:
898 dev->bos->ptm_cap =
899 (struct usb_ptm_cap_descriptor *)buffer;
865 default: 900 default:
866 break; 901 break;
867 } 902 }
diff --git a/drivers/usb/core/devices.c b/drivers/usb/core/devices.c
index cffa0a0d7de2..ef04b50e6bbb 100644
--- a/drivers/usb/core/devices.c
+++ b/drivers/usb/core/devices.c
@@ -110,13 +110,6 @@ static const char format_endpt[] =
110/* E: Ad=xx(s) Atr=xx(ssss) MxPS=dddd Ivl=D?s */ 110/* E: Ad=xx(s) Atr=xx(ssss) MxPS=dddd Ivl=D?s */
111 "E: Ad=%02x(%c) Atr=%02x(%-4s) MxPS=%4d Ivl=%d%cs\n"; 111 "E: Ad=%02x(%c) Atr=%02x(%-4s) MxPS=%4d Ivl=%d%cs\n";
112 112
113
114/*
115 * Need access to the driver and USB bus lists.
116 * extern struct list_head usb_bus_list;
117 * However, these will come from functions that return ptrs to each of them.
118 */
119
120/* 113/*
121 * Wait for an connect/disconnect event to happen. We initialize 114 * Wait for an connect/disconnect event to happen. We initialize
122 * the event counter with an odd number, and each event will increment 115 * the event counter with an odd number, and each event will increment
@@ -221,7 +214,7 @@ static char *usb_dump_endpoint_descriptor(int speed, char *start, char *end,
221 break; 214 break;
222 case USB_ENDPOINT_XFER_INT: 215 case USB_ENDPOINT_XFER_INT:
223 type = "Int."; 216 type = "Int.";
224 if (speed == USB_SPEED_HIGH || speed == USB_SPEED_SUPER) 217 if (speed == USB_SPEED_HIGH || speed >= USB_SPEED_SUPER)
225 interval = 1 << (desc->bInterval - 1); 218 interval = 1 << (desc->bInterval - 1);
226 else 219 else
227 interval = desc->bInterval; 220 interval = desc->bInterval;
@@ -230,7 +223,7 @@ static char *usb_dump_endpoint_descriptor(int speed, char *start, char *end,
230 return start; 223 return start;
231 } 224 }
232 interval *= (speed == USB_SPEED_HIGH || 225 interval *= (speed == USB_SPEED_HIGH ||
233 speed == USB_SPEED_SUPER) ? 125 : 1000; 226 speed >= USB_SPEED_SUPER) ? 125 : 1000;
234 if (interval % 1000) 227 if (interval % 1000)
235 unit = 'u'; 228 unit = 'u';
236 else { 229 else {
@@ -322,7 +315,7 @@ static char *usb_dump_config_descriptor(char *start, char *end,
322 315
323 if (start > end) 316 if (start > end)
324 return start; 317 return start;
325 if (speed == USB_SPEED_SUPER) 318 if (speed >= USB_SPEED_SUPER)
326 mul = 8; 319 mul = 8;
327 else 320 else
328 mul = 2; 321 mul = 2;
@@ -534,6 +527,8 @@ static ssize_t usb_device_dump(char __user **buffer, size_t *nbytes,
534 speed = "480"; break; 527 speed = "480"; break;
535 case USB_SPEED_SUPER: 528 case USB_SPEED_SUPER:
536 speed = "5000"; break; 529 speed = "5000"; break;
530 case USB_SPEED_SUPER_PLUS:
531 speed = "10000"; break;
537 default: 532 default:
538 speed = "??"; 533 speed = "??";
539 } 534 }
@@ -553,7 +548,7 @@ static ssize_t usb_device_dump(char __user **buffer, size_t *nbytes,
553 548
554 /* super/high speed reserves 80%, full/low reserves 90% */ 549 /* super/high speed reserves 80%, full/low reserves 90% */
555 if (usbdev->speed == USB_SPEED_HIGH || 550 if (usbdev->speed == USB_SPEED_HIGH ||
556 usbdev->speed == USB_SPEED_SUPER) 551 usbdev->speed >= USB_SPEED_SUPER)
557 max = 800; 552 max = 800;
558 else 553 else
559 max = FRAME_TIME_MAX_USECS_ALLOC; 554 max = FRAME_TIME_MAX_USECS_ALLOC;
@@ -616,6 +611,7 @@ static ssize_t usb_device_read(struct file *file, char __user *buf,
616 struct usb_bus *bus; 611 struct usb_bus *bus;
617 ssize_t ret, total_written = 0; 612 ssize_t ret, total_written = 0;
618 loff_t skip_bytes = *ppos; 613 loff_t skip_bytes = *ppos;
614 int id;
619 615
620 if (*ppos < 0) 616 if (*ppos < 0)
621 return -EINVAL; 617 return -EINVAL;
@@ -624,9 +620,9 @@ static ssize_t usb_device_read(struct file *file, char __user *buf,
624 if (!access_ok(VERIFY_WRITE, buf, nbytes)) 620 if (!access_ok(VERIFY_WRITE, buf, nbytes))
625 return -EFAULT; 621 return -EFAULT;
626 622
627 mutex_lock(&usb_bus_list_lock); 623 mutex_lock(&usb_bus_idr_lock);
628 /* print devices for all busses */ 624 /* print devices for all busses */
629 list_for_each_entry(bus, &usb_bus_list, bus_list) { 625 idr_for_each_entry(&usb_bus_idr, bus, id) {
630 /* recurse through all children of the root hub */ 626 /* recurse through all children of the root hub */
631 if (!bus_to_hcd(bus)->rh_registered) 627 if (!bus_to_hcd(bus)->rh_registered)
632 continue; 628 continue;
@@ -635,12 +631,12 @@ static ssize_t usb_device_read(struct file *file, char __user *buf,
635 bus->root_hub, bus, 0, 0, 0); 631 bus->root_hub, bus, 0, 0, 0);
636 usb_unlock_device(bus->root_hub); 632 usb_unlock_device(bus->root_hub);
637 if (ret < 0) { 633 if (ret < 0) {
638 mutex_unlock(&usb_bus_list_lock); 634 mutex_unlock(&usb_bus_idr_lock);
639 return ret; 635 return ret;
640 } 636 }
641 total_written += ret; 637 total_written += ret;
642 } 638 }
643 mutex_unlock(&usb_bus_list_lock); 639 mutex_unlock(&usb_bus_idr_lock);
644 return total_written; 640 return total_written;
645} 641}
646 642
diff --git a/drivers/usb/core/devio.c b/drivers/usb/core/devio.c
index 59e7a3369084..52c4461dfccd 100644
--- a/drivers/usb/core/devio.c
+++ b/drivers/usb/core/devio.c
@@ -50,6 +50,7 @@
50#include <linux/user_namespace.h> 50#include <linux/user_namespace.h>
51#include <linux/scatterlist.h> 51#include <linux/scatterlist.h>
52#include <linux/uaccess.h> 52#include <linux/uaccess.h>
53#include <linux/dma-mapping.h>
53#include <asm/byteorder.h> 54#include <asm/byteorder.h>
54#include <linux/moduleparam.h> 55#include <linux/moduleparam.h>
55 56
@@ -69,6 +70,7 @@ struct usb_dev_state {
69 spinlock_t lock; /* protects the async urb lists */ 70 spinlock_t lock; /* protects the async urb lists */
70 struct list_head async_pending; 71 struct list_head async_pending;
71 struct list_head async_completed; 72 struct list_head async_completed;
73 struct list_head memory_list;
72 wait_queue_head_t wait; /* wake up if a request completed */ 74 wait_queue_head_t wait; /* wake up if a request completed */
73 unsigned int discsignr; 75 unsigned int discsignr;
74 struct pid *disc_pid; 76 struct pid *disc_pid;
@@ -77,6 +79,19 @@ struct usb_dev_state {
77 unsigned long ifclaimed; 79 unsigned long ifclaimed;
78 u32 secid; 80 u32 secid;
79 u32 disabled_bulk_eps; 81 u32 disabled_bulk_eps;
82 bool privileges_dropped;
83 unsigned long interface_allowed_mask;
84};
85
86struct usb_memory {
87 struct list_head memlist;
88 int vma_use_count;
89 int urb_use_count;
90 u32 size;
91 void *mem;
92 dma_addr_t dma_handle;
93 unsigned long vm_start;
94 struct usb_dev_state *ps;
80}; 95};
81 96
82struct async { 97struct async {
@@ -89,6 +104,7 @@ struct async {
89 void __user *userbuffer; 104 void __user *userbuffer;
90 void __user *userurb; 105 void __user *userurb;
91 struct urb *urb; 106 struct urb *urb;
107 struct usb_memory *usbm;
92 unsigned int mem_usage; 108 unsigned int mem_usage;
93 int status; 109 int status;
94 u32 secid; 110 u32 secid;
@@ -162,6 +178,111 @@ static int connected(struct usb_dev_state *ps)
162 ps->dev->state != USB_STATE_NOTATTACHED); 178 ps->dev->state != USB_STATE_NOTATTACHED);
163} 179}
164 180
181static void dec_usb_memory_use_count(struct usb_memory *usbm, int *count)
182{
183 struct usb_dev_state *ps = usbm->ps;
184 unsigned long flags;
185
186 spin_lock_irqsave(&ps->lock, flags);
187 --*count;
188 if (usbm->urb_use_count == 0 && usbm->vma_use_count == 0) {
189 list_del(&usbm->memlist);
190 spin_unlock_irqrestore(&ps->lock, flags);
191
192 usb_free_coherent(ps->dev, usbm->size, usbm->mem,
193 usbm->dma_handle);
194 usbfs_decrease_memory_usage(
195 usbm->size + sizeof(struct usb_memory));
196 kfree(usbm);
197 } else {
198 spin_unlock_irqrestore(&ps->lock, flags);
199 }
200}
201
202static void usbdev_vm_open(struct vm_area_struct *vma)
203{
204 struct usb_memory *usbm = vma->vm_private_data;
205 unsigned long flags;
206
207 spin_lock_irqsave(&usbm->ps->lock, flags);
208 ++usbm->vma_use_count;
209 spin_unlock_irqrestore(&usbm->ps->lock, flags);
210}
211
212static void usbdev_vm_close(struct vm_area_struct *vma)
213{
214 struct usb_memory *usbm = vma->vm_private_data;
215
216 dec_usb_memory_use_count(usbm, &usbm->vma_use_count);
217}
218
219struct vm_operations_struct usbdev_vm_ops = {
220 .open = usbdev_vm_open,
221 .close = usbdev_vm_close
222};
223
224static int usbdev_mmap(struct file *file, struct vm_area_struct *vma)
225{
226 struct usb_memory *usbm = NULL;
227 struct usb_dev_state *ps = file->private_data;
228 size_t size = vma->vm_end - vma->vm_start;
229 void *mem;
230 unsigned long flags;
231 dma_addr_t dma_handle;
232 int ret;
233
234 ret = usbfs_increase_memory_usage(size + sizeof(struct usb_memory));
235 if (ret)
236 goto error;
237
238 usbm = kzalloc(sizeof(struct usb_memory), GFP_KERNEL);
239 if (!usbm) {
240 ret = -ENOMEM;
241 goto error_decrease_mem;
242 }
243
244 mem = usb_alloc_coherent(ps->dev, size, GFP_USER, &dma_handle);
245 if (!mem) {
246 ret = -ENOMEM;
247 goto error_free_usbm;
248 }
249
250 memset(mem, 0, size);
251
252 usbm->mem = mem;
253 usbm->dma_handle = dma_handle;
254 usbm->size = size;
255 usbm->ps = ps;
256 usbm->vm_start = vma->vm_start;
257 usbm->vma_use_count = 1;
258 INIT_LIST_HEAD(&usbm->memlist);
259
260 if (remap_pfn_range(vma, vma->vm_start,
261 virt_to_phys(usbm->mem) >> PAGE_SHIFT,
262 size, vma->vm_page_prot) < 0) {
263 dec_usb_memory_use_count(usbm, &usbm->vma_use_count);
264 return -EAGAIN;
265 }
266
267 vma->vm_flags |= VM_IO;
268 vma->vm_flags |= (VM_DONTEXPAND | VM_DONTDUMP);
269 vma->vm_ops = &usbdev_vm_ops;
270 vma->vm_private_data = usbm;
271
272 spin_lock_irqsave(&ps->lock, flags);
273 list_add_tail(&usbm->memlist, &ps->memory_list);
274 spin_unlock_irqrestore(&ps->lock, flags);
275
276 return 0;
277
278error_free_usbm:
279 kfree(usbm);
280error_decrease_mem:
281 usbfs_decrease_memory_usage(size + sizeof(struct usb_memory));
282error:
283 return ret;
284}
285
165static ssize_t usbdev_read(struct file *file, char __user *buf, size_t nbytes, 286static ssize_t usbdev_read(struct file *file, char __user *buf, size_t nbytes,
166 loff_t *ppos) 287 loff_t *ppos)
167{ 288{
@@ -278,8 +399,13 @@ static void free_async(struct async *as)
278 if (sg_page(&as->urb->sg[i])) 399 if (sg_page(&as->urb->sg[i]))
279 kfree(sg_virt(&as->urb->sg[i])); 400 kfree(sg_virt(&as->urb->sg[i]));
280 } 401 }
402
281 kfree(as->urb->sg); 403 kfree(as->urb->sg);
282 kfree(as->urb->transfer_buffer); 404 if (as->usbm == NULL)
405 kfree(as->urb->transfer_buffer);
406 else
407 dec_usb_memory_use_count(as->usbm, &as->usbm->urb_use_count);
408
283 kfree(as->urb->setup_packet); 409 kfree(as->urb->setup_packet);
284 usb_free_urb(as->urb); 410 usb_free_urb(as->urb);
285 usbfs_decrease_memory_usage(as->mem_usage); 411 usbfs_decrease_memory_usage(as->mem_usage);
@@ -624,6 +750,10 @@ static int claimintf(struct usb_dev_state *ps, unsigned int ifnum)
624 if (test_bit(ifnum, &ps->ifclaimed)) 750 if (test_bit(ifnum, &ps->ifclaimed))
625 return 0; 751 return 0;
626 752
753 if (ps->privileges_dropped &&
754 !test_bit(ifnum, &ps->interface_allowed_mask))
755 return -EACCES;
756
627 intf = usb_ifnum_to_if(dev, ifnum); 757 intf = usb_ifnum_to_if(dev, ifnum);
628 if (!intf) 758 if (!intf)
629 err = -ENOENT; 759 err = -ENOENT;
@@ -848,7 +978,7 @@ static struct usb_device *usbdev_lookup_by_devt(dev_t devt)
848 (void *) (unsigned long) devt, match_devt); 978 (void *) (unsigned long) devt, match_devt);
849 if (!dev) 979 if (!dev)
850 return NULL; 980 return NULL;
851 return container_of(dev, struct usb_device, dev); 981 return to_usb_device(dev);
852} 982}
853 983
854/* 984/*
@@ -861,7 +991,7 @@ static int usbdev_open(struct inode *inode, struct file *file)
861 int ret; 991 int ret;
862 992
863 ret = -ENOMEM; 993 ret = -ENOMEM;
864 ps = kmalloc(sizeof(struct usb_dev_state), GFP_KERNEL); 994 ps = kzalloc(sizeof(struct usb_dev_state), GFP_KERNEL);
865 if (!ps) 995 if (!ps)
866 goto out_free_ps; 996 goto out_free_ps;
867 997
@@ -889,16 +1019,15 @@ static int usbdev_open(struct inode *inode, struct file *file)
889 1019
890 ps->dev = dev; 1020 ps->dev = dev;
891 ps->file = file; 1021 ps->file = file;
1022 ps->interface_allowed_mask = 0xFFFFFFFF; /* 32 bits */
892 spin_lock_init(&ps->lock); 1023 spin_lock_init(&ps->lock);
893 INIT_LIST_HEAD(&ps->list); 1024 INIT_LIST_HEAD(&ps->list);
894 INIT_LIST_HEAD(&ps->async_pending); 1025 INIT_LIST_HEAD(&ps->async_pending);
895 INIT_LIST_HEAD(&ps->async_completed); 1026 INIT_LIST_HEAD(&ps->async_completed);
1027 INIT_LIST_HEAD(&ps->memory_list);
896 init_waitqueue_head(&ps->wait); 1028 init_waitqueue_head(&ps->wait);
897 ps->discsignr = 0;
898 ps->disc_pid = get_pid(task_pid(current)); 1029 ps->disc_pid = get_pid(task_pid(current));
899 ps->cred = get_current_cred(); 1030 ps->cred = get_current_cred();
900 ps->disccontext = NULL;
901 ps->ifclaimed = 0;
902 security_task_getsecid(current, &ps->secid); 1031 security_task_getsecid(current, &ps->secid);
903 smp_wmb(); 1032 smp_wmb();
904 list_add_tail(&ps->list, &dev->filelist); 1033 list_add_tail(&ps->list, &dev->filelist);
@@ -945,6 +1074,7 @@ static int usbdev_release(struct inode *inode, struct file *file)
945 free_async(as); 1074 free_async(as);
946 as = async_getcompleted(ps); 1075 as = async_getcompleted(ps);
947 } 1076 }
1077
948 kfree(ps); 1078 kfree(ps);
949 return 0; 1079 return 0;
950} 1080}
@@ -1198,6 +1328,28 @@ static int proc_connectinfo(struct usb_dev_state *ps, void __user *arg)
1198 1328
1199static int proc_resetdevice(struct usb_dev_state *ps) 1329static int proc_resetdevice(struct usb_dev_state *ps)
1200{ 1330{
1331 struct usb_host_config *actconfig = ps->dev->actconfig;
1332 struct usb_interface *interface;
1333 int i, number;
1334
1335 /* Don't allow a device reset if the process has dropped the
1336 * privilege to do such things and any of the interfaces are
1337 * currently claimed.
1338 */
1339 if (ps->privileges_dropped && actconfig) {
1340 for (i = 0; i < actconfig->desc.bNumInterfaces; ++i) {
1341 interface = actconfig->interface[i];
1342 number = interface->cur_altsetting->desc.bInterfaceNumber;
1343 if (usb_interface_claimed(interface) &&
1344 !test_bit(number, &ps->ifclaimed)) {
1345 dev_warn(&ps->dev->dev,
1346 "usbfs: interface %d claimed by %s while '%s' resets device\n",
1347 number, interface->dev.driver->name, current->comm);
1348 return -EACCES;
1349 }
1350 }
1351 }
1352
1201 return usb_reset_device(ps->dev); 1353 return usb_reset_device(ps->dev);
1202} 1354}
1203 1355
@@ -1266,6 +1418,31 @@ static int proc_setconfig(struct usb_dev_state *ps, void __user *arg)
1266 return status; 1418 return status;
1267} 1419}
1268 1420
1421static struct usb_memory *
1422find_memory_area(struct usb_dev_state *ps, const struct usbdevfs_urb *uurb)
1423{
1424 struct usb_memory *usbm = NULL, *iter;
1425 unsigned long flags;
1426 unsigned long uurb_start = (unsigned long)uurb->buffer;
1427
1428 spin_lock_irqsave(&ps->lock, flags);
1429 list_for_each_entry(iter, &ps->memory_list, memlist) {
1430 if (uurb_start >= iter->vm_start &&
1431 uurb_start < iter->vm_start + iter->size) {
1432 if (uurb->buffer_length > iter->vm_start + iter->size -
1433 uurb_start) {
1434 usbm = ERR_PTR(-EINVAL);
1435 } else {
1436 usbm = iter;
1437 usbm->urb_use_count++;
1438 }
1439 break;
1440 }
1441 }
1442 spin_unlock_irqrestore(&ps->lock, flags);
1443 return usbm;
1444}
1445
1269static int proc_do_submiturb(struct usb_dev_state *ps, struct usbdevfs_urb *uurb, 1446static int proc_do_submiturb(struct usb_dev_state *ps, struct usbdevfs_urb *uurb,
1270 struct usbdevfs_iso_packet_desc __user *iso_frame_desc, 1447 struct usbdevfs_iso_packet_desc __user *iso_frame_desc,
1271 void __user *arg) 1448 void __user *arg)
@@ -1378,11 +1555,10 @@ static int proc_do_submiturb(struct usb_dev_state *ps, struct usbdevfs_urb *uurb
1378 number_of_packets = uurb->number_of_packets; 1555 number_of_packets = uurb->number_of_packets;
1379 isofrmlen = sizeof(struct usbdevfs_iso_packet_desc) * 1556 isofrmlen = sizeof(struct usbdevfs_iso_packet_desc) *
1380 number_of_packets; 1557 number_of_packets;
1381 isopkt = kmalloc(isofrmlen, GFP_KERNEL); 1558 isopkt = memdup_user(iso_frame_desc, isofrmlen);
1382 if (!isopkt) 1559 if (IS_ERR(isopkt)) {
1383 return -ENOMEM; 1560 ret = PTR_ERR(isopkt);
1384 if (copy_from_user(isopkt, iso_frame_desc, isofrmlen)) { 1561 isopkt = NULL;
1385 ret = -EFAULT;
1386 goto error; 1562 goto error;
1387 } 1563 }
1388 for (totlen = u = 0; u < number_of_packets; u++) { 1564 for (totlen = u = 0; u < number_of_packets; u++) {
@@ -1422,6 +1598,19 @@ static int proc_do_submiturb(struct usb_dev_state *ps, struct usbdevfs_urb *uurb
1422 goto error; 1598 goto error;
1423 } 1599 }
1424 1600
1601 as->usbm = find_memory_area(ps, uurb);
1602 if (IS_ERR(as->usbm)) {
1603 ret = PTR_ERR(as->usbm);
1604 as->usbm = NULL;
1605 goto error;
1606 }
1607
1608 /* do not use SG buffers when memory mapped segments
1609 * are in use
1610 */
1611 if (as->usbm)
1612 num_sgs = 0;
1613
1425 u += sizeof(struct async) + sizeof(struct urb) + uurb->buffer_length + 1614 u += sizeof(struct async) + sizeof(struct urb) + uurb->buffer_length +
1426 num_sgs * sizeof(struct scatterlist); 1615 num_sgs * sizeof(struct scatterlist);
1427 ret = usbfs_increase_memory_usage(u); 1616 ret = usbfs_increase_memory_usage(u);
@@ -1459,29 +1648,35 @@ static int proc_do_submiturb(struct usb_dev_state *ps, struct usbdevfs_urb *uurb
1459 totlen -= u; 1648 totlen -= u;
1460 } 1649 }
1461 } else if (uurb->buffer_length > 0) { 1650 } else if (uurb->buffer_length > 0) {
1462 as->urb->transfer_buffer = kmalloc(uurb->buffer_length, 1651 if (as->usbm) {
1463 GFP_KERNEL); 1652 unsigned long uurb_start = (unsigned long)uurb->buffer;
1464 if (!as->urb->transfer_buffer) {
1465 ret = -ENOMEM;
1466 goto error;
1467 }
1468 1653
1469 if (!is_in) { 1654 as->urb->transfer_buffer = as->usbm->mem +
1470 if (copy_from_user(as->urb->transfer_buffer, 1655 (uurb_start - as->usbm->vm_start);
1471 uurb->buffer, 1656 } else {
1472 uurb->buffer_length)) { 1657 as->urb->transfer_buffer = kmalloc(uurb->buffer_length,
1473 ret = -EFAULT; 1658 GFP_KERNEL);
1659 if (!as->urb->transfer_buffer) {
1660 ret = -ENOMEM;
1474 goto error; 1661 goto error;
1475 } 1662 }
1476 } else if (uurb->type == USBDEVFS_URB_TYPE_ISO) { 1663 if (!is_in) {
1477 /* 1664 if (copy_from_user(as->urb->transfer_buffer,
1478 * Isochronous input data may end up being 1665 uurb->buffer,
1479 * discontiguous if some of the packets are short. 1666 uurb->buffer_length)) {
1480 * Clear the buffer so that the gaps don't leak 1667 ret = -EFAULT;
1481 * kernel data to userspace. 1668 goto error;
1482 */ 1669 }
1483 memset(as->urb->transfer_buffer, 0, 1670 } else if (uurb->type == USBDEVFS_URB_TYPE_ISO) {
1484 uurb->buffer_length); 1671 /*
1672 * Isochronous input data may end up being
1673 * discontiguous if some of the packets are
1674 * short. Clear the buffer so that the gaps
1675 * don't leak kernel data to userspace.
1676 */
1677 memset(as->urb->transfer_buffer, 0,
1678 uurb->buffer_length);
1679 }
1485 } 1680 }
1486 } 1681 }
1487 as->urb->dev = ps->dev; 1682 as->urb->dev = ps->dev;
@@ -1528,10 +1723,14 @@ static int proc_do_submiturb(struct usb_dev_state *ps, struct usbdevfs_urb *uurb
1528 isopkt = NULL; 1723 isopkt = NULL;
1529 as->ps = ps; 1724 as->ps = ps;
1530 as->userurb = arg; 1725 as->userurb = arg;
1531 if (is_in && uurb->buffer_length > 0) 1726 if (as->usbm) {
1727 unsigned long uurb_start = (unsigned long)uurb->buffer;
1728
1729 as->urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
1730 as->urb->transfer_dma = as->usbm->dma_handle +
1731 (uurb_start - as->usbm->vm_start);
1732 } else if (is_in && uurb->buffer_length > 0)
1532 as->userbuffer = uurb->buffer; 1733 as->userbuffer = uurb->buffer;
1533 else
1534 as->userbuffer = NULL;
1535 as->signr = uurb->signr; 1734 as->signr = uurb->signr;
1536 as->ifnum = ifnum; 1735 as->ifnum = ifnum;
1537 as->pid = get_pid(task_pid(current)); 1736 as->pid = get_pid(task_pid(current));
@@ -1587,6 +1786,8 @@ static int proc_do_submiturb(struct usb_dev_state *ps, struct usbdevfs_urb *uurb
1587 return 0; 1786 return 0;
1588 1787
1589 error: 1788 error:
1789 if (as && as->usbm)
1790 dec_usb_memory_use_count(as->usbm, &as->usbm->urb_use_count);
1590 kfree(isopkt); 1791 kfree(isopkt);
1591 kfree(dr); 1792 kfree(dr);
1592 if (as) 1793 if (as)
@@ -1903,7 +2104,7 @@ static int proc_releaseinterface(struct usb_dev_state *ps, void __user *arg)
1903 ret = releaseintf(ps, ifnum); 2104 ret = releaseintf(ps, ifnum);
1904 if (ret < 0) 2105 if (ret < 0)
1905 return ret; 2106 return ret;
1906 destroy_async_on_interface (ps, ifnum); 2107 destroy_async_on_interface(ps, ifnum);
1907 return 0; 2108 return 0;
1908} 2109}
1909 2110
@@ -1915,6 +2116,9 @@ static int proc_ioctl(struct usb_dev_state *ps, struct usbdevfs_ioctl *ctl)
1915 struct usb_interface *intf = NULL; 2116 struct usb_interface *intf = NULL;
1916 struct usb_driver *driver = NULL; 2117 struct usb_driver *driver = NULL;
1917 2118
2119 if (ps->privileges_dropped)
2120 return -EACCES;
2121
1918 /* alloc buffer */ 2122 /* alloc buffer */
1919 size = _IOC_SIZE(ctl->ioctl_code); 2123 size = _IOC_SIZE(ctl->ioctl_code);
1920 if (size > 0) { 2124 if (size > 0) {
@@ -2040,7 +2244,8 @@ static int proc_get_capabilities(struct usb_dev_state *ps, void __user *arg)
2040 __u32 caps; 2244 __u32 caps;
2041 2245
2042 caps = USBDEVFS_CAP_ZERO_PACKET | USBDEVFS_CAP_NO_PACKET_SIZE_LIM | 2246 caps = USBDEVFS_CAP_ZERO_PACKET | USBDEVFS_CAP_NO_PACKET_SIZE_LIM |
2043 USBDEVFS_CAP_REAP_AFTER_DISCONNECT; 2247 USBDEVFS_CAP_REAP_AFTER_DISCONNECT | USBDEVFS_CAP_MMAP |
2248 USBDEVFS_CAP_DROP_PRIVILEGES;
2044 if (!ps->dev->bus->no_stop_on_short) 2249 if (!ps->dev->bus->no_stop_on_short)
2045 caps |= USBDEVFS_CAP_BULK_CONTINUATION; 2250 caps |= USBDEVFS_CAP_BULK_CONTINUATION;
2046 if (ps->dev->bus->sg_tablesize) 2251 if (ps->dev->bus->sg_tablesize)
@@ -2067,6 +2272,9 @@ static int proc_disconnect_claim(struct usb_dev_state *ps, void __user *arg)
2067 if (intf->dev.driver) { 2272 if (intf->dev.driver) {
2068 struct usb_driver *driver = to_usb_driver(intf->dev.driver); 2273 struct usb_driver *driver = to_usb_driver(intf->dev.driver);
2069 2274
2275 if (ps->privileges_dropped)
2276 return -EACCES;
2277
2070 if ((dc.flags & USBDEVFS_DISCONNECT_CLAIM_IF_DRIVER) && 2278 if ((dc.flags & USBDEVFS_DISCONNECT_CLAIM_IF_DRIVER) &&
2071 strncmp(dc.driver, intf->dev.driver->name, 2279 strncmp(dc.driver, intf->dev.driver->name,
2072 sizeof(dc.driver)) != 0) 2280 sizeof(dc.driver)) != 0)
@@ -2123,6 +2331,23 @@ static int proc_free_streams(struct usb_dev_state *ps, void __user *arg)
2123 return r; 2331 return r;
2124} 2332}
2125 2333
2334static int proc_drop_privileges(struct usb_dev_state *ps, void __user *arg)
2335{
2336 u32 data;
2337
2338 if (copy_from_user(&data, arg, sizeof(data)))
2339 return -EFAULT;
2340
2341 /* This is an one way operation. Once privileges are
2342 * dropped, you cannot regain them. You may however reissue
2343 * this ioctl to shrink the allowed interfaces mask.
2344 */
2345 ps->interface_allowed_mask &= data;
2346 ps->privileges_dropped = true;
2347
2348 return 0;
2349}
2350
2126/* 2351/*
2127 * NOTE: All requests here that have interface numbers as parameters 2352 * NOTE: All requests here that have interface numbers as parameters
2128 * are assuming that somehow the configuration has been prevented from 2353 * are assuming that somehow the configuration has been prevented from
@@ -2311,6 +2536,9 @@ static long usbdev_do_ioctl(struct file *file, unsigned int cmd,
2311 case USBDEVFS_FREE_STREAMS: 2536 case USBDEVFS_FREE_STREAMS:
2312 ret = proc_free_streams(ps, p); 2537 ret = proc_free_streams(ps, p);
2313 break; 2538 break;
2539 case USBDEVFS_DROP_PRIVILEGES:
2540 ret = proc_drop_privileges(ps, p);
2541 break;
2314 } 2542 }
2315 2543
2316 done: 2544 done:
@@ -2366,6 +2594,7 @@ const struct file_operations usbdev_file_operations = {
2366#ifdef CONFIG_COMPAT 2594#ifdef CONFIG_COMPAT
2367 .compat_ioctl = usbdev_compat_ioctl, 2595 .compat_ioctl = usbdev_compat_ioctl,
2368#endif 2596#endif
2597 .mmap = usbdev_mmap,
2369 .open = usbdev_open, 2598 .open = usbdev_open,
2370 .release = usbdev_release, 2599 .release = usbdev_release,
2371}; 2600};
diff --git a/drivers/usb/core/file.c b/drivers/usb/core/file.c
index ea337a718cc1..822ced9639aa 100644
--- a/drivers/usb/core/file.c
+++ b/drivers/usb/core/file.c
@@ -19,6 +19,7 @@
19#include <linux/errno.h> 19#include <linux/errno.h>
20#include <linux/rwsem.h> 20#include <linux/rwsem.h>
21#include <linux/slab.h> 21#include <linux/slab.h>
22#include <linux/string.h>
22#include <linux/usb.h> 23#include <linux/usb.h>
23 24
24#include "usb.h" 25#include "usb.h"
@@ -155,7 +156,6 @@ int usb_register_dev(struct usb_interface *intf,
155 int minor_base = class_driver->minor_base; 156 int minor_base = class_driver->minor_base;
156 int minor; 157 int minor;
157 char name[20]; 158 char name[20];
158 char *temp;
159 159
160#ifdef CONFIG_USB_DYNAMIC_MINORS 160#ifdef CONFIG_USB_DYNAMIC_MINORS
161 /* 161 /*
@@ -192,14 +192,9 @@ int usb_register_dev(struct usb_interface *intf,
192 192
193 /* create a usb class device for this usb interface */ 193 /* create a usb class device for this usb interface */
194 snprintf(name, sizeof(name), class_driver->name, minor - minor_base); 194 snprintf(name, sizeof(name), class_driver->name, minor - minor_base);
195 temp = strrchr(name, '/');
196 if (temp && (temp[1] != '\0'))
197 ++temp;
198 else
199 temp = name;
200 intf->usb_dev = device_create(usb_class->class, &intf->dev, 195 intf->usb_dev = device_create(usb_class->class, &intf->dev,
201 MKDEV(USB_MAJOR, minor), class_driver, 196 MKDEV(USB_MAJOR, minor), class_driver,
202 "%s", temp); 197 "%s", kbasename(name));
203 if (IS_ERR(intf->usb_dev)) { 198 if (IS_ERR(intf->usb_dev)) {
204 down_write(&minor_rwsem); 199 down_write(&minor_rwsem);
205 usb_minors[minor] = NULL; 200 usb_minors[minor] = NULL;
diff --git a/drivers/usb/core/hcd-pci.c b/drivers/usb/core/hcd-pci.c
index c3640f8a8fb3..f9d42cf23e55 100644
--- a/drivers/usb/core/hcd-pci.c
+++ b/drivers/usb/core/hcd-pci.c
@@ -196,7 +196,7 @@ int usb_hcd_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
196 * The xHCI driver has its own irq management 196 * The xHCI driver has its own irq management
197 * make sure irq setup is not touched for xhci in generic hcd code 197 * make sure irq setup is not touched for xhci in generic hcd code
198 */ 198 */
199 if ((driver->flags & HCD_MASK) != HCD_USB3) { 199 if ((driver->flags & HCD_MASK) < HCD_USB3) {
200 if (!dev->irq) { 200 if (!dev->irq) {
201 dev_err(&dev->dev, 201 dev_err(&dev->dev,
202 "Found HC with no IRQ. Check BIOS/PCI %s setup!\n", 202 "Found HC with no IRQ. Check BIOS/PCI %s setup!\n",
diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c
index df0e3b92533a..2ca2cef7f681 100644
--- a/drivers/usb/core/hcd.c
+++ b/drivers/usb/core/hcd.c
@@ -90,16 +90,15 @@ unsigned long usb_hcds_loaded;
90EXPORT_SYMBOL_GPL(usb_hcds_loaded); 90EXPORT_SYMBOL_GPL(usb_hcds_loaded);
91 91
92/* host controllers we manage */ 92/* host controllers we manage */
93LIST_HEAD (usb_bus_list); 93DEFINE_IDR (usb_bus_idr);
94EXPORT_SYMBOL_GPL (usb_bus_list); 94EXPORT_SYMBOL_GPL (usb_bus_idr);
95 95
96/* used when allocating bus numbers */ 96/* used when allocating bus numbers */
97#define USB_MAXBUS 64 97#define USB_MAXBUS 64
98static DECLARE_BITMAP(busmap, USB_MAXBUS);
99 98
100/* used when updating list of hcds */ 99/* used when updating list of hcds */
101DEFINE_MUTEX(usb_bus_list_lock); /* exported only for usbfs */ 100DEFINE_MUTEX(usb_bus_idr_lock); /* exported only for usbfs */
102EXPORT_SYMBOL_GPL (usb_bus_list_lock); 101EXPORT_SYMBOL_GPL (usb_bus_idr_lock);
103 102
104/* used for controlling access to virtual root hubs */ 103/* used for controlling access to virtual root hubs */
105static DEFINE_SPINLOCK(hcd_root_hub_lock); 104static DEFINE_SPINLOCK(hcd_root_hub_lock);
@@ -128,6 +127,27 @@ static inline int is_root_hub(struct usb_device *udev)
128#define KERNEL_REL bin2bcd(((LINUX_VERSION_CODE >> 16) & 0x0ff)) 127#define KERNEL_REL bin2bcd(((LINUX_VERSION_CODE >> 16) & 0x0ff))
129#define KERNEL_VER bin2bcd(((LINUX_VERSION_CODE >> 8) & 0x0ff)) 128#define KERNEL_VER bin2bcd(((LINUX_VERSION_CODE >> 8) & 0x0ff))
130 129
130/* usb 3.1 root hub device descriptor */
131static const u8 usb31_rh_dev_descriptor[18] = {
132 0x12, /* __u8 bLength; */
133 USB_DT_DEVICE, /* __u8 bDescriptorType; Device */
134 0x10, 0x03, /* __le16 bcdUSB; v3.1 */
135
136 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
137 0x00, /* __u8 bDeviceSubClass; */
138 0x03, /* __u8 bDeviceProtocol; USB 3 hub */
139 0x09, /* __u8 bMaxPacketSize0; 2^9 = 512 Bytes */
140
141 0x6b, 0x1d, /* __le16 idVendor; Linux Foundation 0x1d6b */
142 0x03, 0x00, /* __le16 idProduct; device 0x0003 */
143 KERNEL_VER, KERNEL_REL, /* __le16 bcdDevice */
144
145 0x03, /* __u8 iManufacturer; */
146 0x02, /* __u8 iProduct; */
147 0x01, /* __u8 iSerialNumber; */
148 0x01 /* __u8 bNumConfigurations; */
149};
150
131/* usb 3.0 root hub device descriptor */ 151/* usb 3.0 root hub device descriptor */
132static const u8 usb3_rh_dev_descriptor[18] = { 152static const u8 usb3_rh_dev_descriptor[18] = {
133 0x12, /* __u8 bLength; */ 153 0x12, /* __u8 bLength; */
@@ -557,6 +577,8 @@ static int rh_call_control (struct usb_hcd *hcd, struct urb *urb)
557 case USB_DT_DEVICE << 8: 577 case USB_DT_DEVICE << 8:
558 switch (hcd->speed) { 578 switch (hcd->speed) {
559 case HCD_USB31: 579 case HCD_USB31:
580 bufp = usb31_rh_dev_descriptor;
581 break;
560 case HCD_USB3: 582 case HCD_USB3:
561 bufp = usb3_rh_dev_descriptor; 583 bufp = usb3_rh_dev_descriptor;
562 break; 584 break;
@@ -645,9 +667,15 @@ nongeneric:
645 /* non-generic request */ 667 /* non-generic request */
646 switch (typeReq) { 668 switch (typeReq) {
647 case GetHubStatus: 669 case GetHubStatus:
648 case GetPortStatus:
649 len = 4; 670 len = 4;
650 break; 671 break;
672 case GetPortStatus:
673 if (wValue == HUB_PORT_STATUS)
674 len = 4;
675 else
676 /* other port status types return 8 bytes */
677 len = 8;
678 break;
651 case GetHubDescriptor: 679 case GetHubDescriptor:
652 len = sizeof (struct usb_hub_descriptor); 680 len = sizeof (struct usb_hub_descriptor);
653 break; 681 break;
@@ -967,8 +995,6 @@ static void usb_bus_init (struct usb_bus *bus)
967 bus->bandwidth_int_reqs = 0; 995 bus->bandwidth_int_reqs = 0;
968 bus->bandwidth_isoc_reqs = 0; 996 bus->bandwidth_isoc_reqs = 0;
969 mutex_init(&bus->usb_address0_mutex); 997 mutex_init(&bus->usb_address0_mutex);
970
971 INIT_LIST_HEAD (&bus->bus_list);
972} 998}
973 999
974/*-------------------------------------------------------------------------*/ 1000/*-------------------------------------------------------------------------*/
@@ -988,18 +1014,14 @@ static int usb_register_bus(struct usb_bus *bus)
988 int result = -E2BIG; 1014 int result = -E2BIG;
989 int busnum; 1015 int busnum;
990 1016
991 mutex_lock(&usb_bus_list_lock); 1017 mutex_lock(&usb_bus_idr_lock);
992 busnum = find_next_zero_bit(busmap, USB_MAXBUS, 1); 1018 busnum = idr_alloc(&usb_bus_idr, bus, 1, USB_MAXBUS, GFP_KERNEL);
993 if (busnum >= USB_MAXBUS) { 1019 if (busnum < 0) {
994 printk (KERN_ERR "%s: too many buses\n", usbcore_name); 1020 pr_err("%s: failed to get bus number\n", usbcore_name);
995 goto error_find_busnum; 1021 goto error_find_busnum;
996 } 1022 }
997 set_bit(busnum, busmap);
998 bus->busnum = busnum; 1023 bus->busnum = busnum;
999 1024 mutex_unlock(&usb_bus_idr_lock);
1000 /* Add it to the local list of buses */
1001 list_add (&bus->bus_list, &usb_bus_list);
1002 mutex_unlock(&usb_bus_list_lock);
1003 1025
1004 usb_notify_add_bus(bus); 1026 usb_notify_add_bus(bus);
1005 1027
@@ -1008,7 +1030,7 @@ static int usb_register_bus(struct usb_bus *bus)
1008 return 0; 1030 return 0;
1009 1031
1010error_find_busnum: 1032error_find_busnum:
1011 mutex_unlock(&usb_bus_list_lock); 1033 mutex_unlock(&usb_bus_idr_lock);
1012 return result; 1034 return result;
1013} 1035}
1014 1036
@@ -1029,13 +1051,11 @@ static void usb_deregister_bus (struct usb_bus *bus)
1029 * controller code, as well as having it call this when cleaning 1051 * controller code, as well as having it call this when cleaning
1030 * itself up 1052 * itself up
1031 */ 1053 */
1032 mutex_lock(&usb_bus_list_lock); 1054 mutex_lock(&usb_bus_idr_lock);
1033 list_del (&bus->bus_list); 1055 idr_remove(&usb_bus_idr, bus->busnum);
1034 mutex_unlock(&usb_bus_list_lock); 1056 mutex_unlock(&usb_bus_idr_lock);
1035 1057
1036 usb_notify_remove_bus(bus); 1058 usb_notify_remove_bus(bus);
1037
1038 clear_bit(bus->busnum, busmap);
1039} 1059}
1040 1060
1041/** 1061/**
@@ -1063,12 +1083,12 @@ static int register_root_hub(struct usb_hcd *hcd)
1063 set_bit (devnum, usb_dev->bus->devmap.devicemap); 1083 set_bit (devnum, usb_dev->bus->devmap.devicemap);
1064 usb_set_device_state(usb_dev, USB_STATE_ADDRESS); 1084 usb_set_device_state(usb_dev, USB_STATE_ADDRESS);
1065 1085
1066 mutex_lock(&usb_bus_list_lock); 1086 mutex_lock(&usb_bus_idr_lock);
1067 1087
1068 usb_dev->ep0.desc.wMaxPacketSize = cpu_to_le16(64); 1088 usb_dev->ep0.desc.wMaxPacketSize = cpu_to_le16(64);
1069 retval = usb_get_device_descriptor(usb_dev, USB_DT_DEVICE_SIZE); 1089 retval = usb_get_device_descriptor(usb_dev, USB_DT_DEVICE_SIZE);
1070 if (retval != sizeof usb_dev->descriptor) { 1090 if (retval != sizeof usb_dev->descriptor) {
1071 mutex_unlock(&usb_bus_list_lock); 1091 mutex_unlock(&usb_bus_idr_lock);
1072 dev_dbg (parent_dev, "can't read %s device descriptor %d\n", 1092 dev_dbg (parent_dev, "can't read %s device descriptor %d\n",
1073 dev_name(&usb_dev->dev), retval); 1093 dev_name(&usb_dev->dev), retval);
1074 return (retval < 0) ? retval : -EMSGSIZE; 1094 return (retval < 0) ? retval : -EMSGSIZE;
@@ -1078,8 +1098,8 @@ static int register_root_hub(struct usb_hcd *hcd)
1078 retval = usb_get_bos_descriptor(usb_dev); 1098 retval = usb_get_bos_descriptor(usb_dev);
1079 if (!retval) { 1099 if (!retval) {
1080 usb_dev->lpm_capable = usb_device_supports_lpm(usb_dev); 1100 usb_dev->lpm_capable = usb_device_supports_lpm(usb_dev);
1081 } else if (usb_dev->speed == USB_SPEED_SUPER) { 1101 } else if (usb_dev->speed >= USB_SPEED_SUPER) {
1082 mutex_unlock(&usb_bus_list_lock); 1102 mutex_unlock(&usb_bus_idr_lock);
1083 dev_dbg(parent_dev, "can't read %s bos descriptor %d\n", 1103 dev_dbg(parent_dev, "can't read %s bos descriptor %d\n",
1084 dev_name(&usb_dev->dev), retval); 1104 dev_name(&usb_dev->dev), retval);
1085 return retval; 1105 return retval;
@@ -1099,7 +1119,7 @@ static int register_root_hub(struct usb_hcd *hcd)
1099 if (HCD_DEAD(hcd)) 1119 if (HCD_DEAD(hcd))
1100 usb_hc_died (hcd); /* This time clean up */ 1120 usb_hc_died (hcd); /* This time clean up */
1101 } 1121 }
1102 mutex_unlock(&usb_bus_list_lock); 1122 mutex_unlock(&usb_bus_idr_lock);
1103 1123
1104 return retval; 1124 return retval;
1105} 1125}
@@ -1408,7 +1428,8 @@ static void hcd_free_coherent(struct usb_bus *bus, dma_addr_t *dma_handle,
1408 1428
1409void usb_hcd_unmap_urb_setup_for_dma(struct usb_hcd *hcd, struct urb *urb) 1429void usb_hcd_unmap_urb_setup_for_dma(struct usb_hcd *hcd, struct urb *urb)
1410{ 1430{
1411 if (urb->transfer_flags & URB_SETUP_MAP_SINGLE) 1431 if (IS_ENABLED(CONFIG_HAS_DMA) &&
1432 (urb->transfer_flags & URB_SETUP_MAP_SINGLE))
1412 dma_unmap_single(hcd->self.controller, 1433 dma_unmap_single(hcd->self.controller,
1413 urb->setup_dma, 1434 urb->setup_dma,
1414 sizeof(struct usb_ctrlrequest), 1435 sizeof(struct usb_ctrlrequest),
@@ -1440,17 +1461,20 @@ void usb_hcd_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
1440 usb_hcd_unmap_urb_setup_for_dma(hcd, urb); 1461 usb_hcd_unmap_urb_setup_for_dma(hcd, urb);
1441 1462
1442 dir = usb_urb_dir_in(urb) ? DMA_FROM_DEVICE : DMA_TO_DEVICE; 1463 dir = usb_urb_dir_in(urb) ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
1443 if (urb->transfer_flags & URB_DMA_MAP_SG) 1464 if (IS_ENABLED(CONFIG_HAS_DMA) &&
1465 (urb->transfer_flags & URB_DMA_MAP_SG))
1444 dma_unmap_sg(hcd->self.controller, 1466 dma_unmap_sg(hcd->self.controller,
1445 urb->sg, 1467 urb->sg,
1446 urb->num_sgs, 1468 urb->num_sgs,
1447 dir); 1469 dir);
1448 else if (urb->transfer_flags & URB_DMA_MAP_PAGE) 1470 else if (IS_ENABLED(CONFIG_HAS_DMA) &&
1471 (urb->transfer_flags & URB_DMA_MAP_PAGE))
1449 dma_unmap_page(hcd->self.controller, 1472 dma_unmap_page(hcd->self.controller,
1450 urb->transfer_dma, 1473 urb->transfer_dma,
1451 urb->transfer_buffer_length, 1474 urb->transfer_buffer_length,
1452 dir); 1475 dir);
1453 else if (urb->transfer_flags & URB_DMA_MAP_SINGLE) 1476 else if (IS_ENABLED(CONFIG_HAS_DMA) &&
1477 (urb->transfer_flags & URB_DMA_MAP_SINGLE))
1454 dma_unmap_single(hcd->self.controller, 1478 dma_unmap_single(hcd->self.controller,
1455 urb->transfer_dma, 1479 urb->transfer_dma,
1456 urb->transfer_buffer_length, 1480 urb->transfer_buffer_length,
@@ -1492,7 +1516,7 @@ int usb_hcd_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
1492 if (usb_endpoint_xfer_control(&urb->ep->desc)) { 1516 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1493 if (hcd->self.uses_pio_for_control) 1517 if (hcd->self.uses_pio_for_control)
1494 return ret; 1518 return ret;
1495 if (hcd->self.uses_dma) { 1519 if (IS_ENABLED(CONFIG_HAS_DMA) && hcd->self.uses_dma) {
1496 urb->setup_dma = dma_map_single( 1520 urb->setup_dma = dma_map_single(
1497 hcd->self.controller, 1521 hcd->self.controller,
1498 urb->setup_packet, 1522 urb->setup_packet,
@@ -1518,7 +1542,7 @@ int usb_hcd_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
1518 dir = usb_urb_dir_in(urb) ? DMA_FROM_DEVICE : DMA_TO_DEVICE; 1542 dir = usb_urb_dir_in(urb) ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
1519 if (urb->transfer_buffer_length != 0 1543 if (urb->transfer_buffer_length != 0
1520 && !(urb->transfer_flags & URB_NO_TRANSFER_DMA_MAP)) { 1544 && !(urb->transfer_flags & URB_NO_TRANSFER_DMA_MAP)) {
1521 if (hcd->self.uses_dma) { 1545 if (IS_ENABLED(CONFIG_HAS_DMA) && hcd->self.uses_dma) {
1522 if (urb->num_sgs) { 1546 if (urb->num_sgs) {
1523 int n; 1547 int n;
1524 1548
@@ -2112,7 +2136,7 @@ int usb_alloc_streams(struct usb_interface *interface,
2112 hcd = bus_to_hcd(dev->bus); 2136 hcd = bus_to_hcd(dev->bus);
2113 if (!hcd->driver->alloc_streams || !hcd->driver->free_streams) 2137 if (!hcd->driver->alloc_streams || !hcd->driver->free_streams)
2114 return -EINVAL; 2138 return -EINVAL;
2115 if (dev->speed != USB_SPEED_SUPER) 2139 if (dev->speed < USB_SPEED_SUPER)
2116 return -EINVAL; 2140 return -EINVAL;
2117 if (dev->state < USB_STATE_CONFIGURED) 2141 if (dev->state < USB_STATE_CONFIGURED)
2118 return -ENODEV; 2142 return -ENODEV;
@@ -2160,7 +2184,7 @@ int usb_free_streams(struct usb_interface *interface,
2160 2184
2161 dev = interface_to_usbdev(interface); 2185 dev = interface_to_usbdev(interface);
2162 hcd = bus_to_hcd(dev->bus); 2186 hcd = bus_to_hcd(dev->bus);
2163 if (dev->speed != USB_SPEED_SUPER) 2187 if (dev->speed < USB_SPEED_SUPER)
2164 return -EINVAL; 2188 return -EINVAL;
2165 2189
2166 /* Double-free is not allowed */ 2190 /* Double-free is not allowed */
@@ -2208,7 +2232,7 @@ int usb_hcd_get_frame_number (struct usb_device *udev)
2208 2232
2209int hcd_bus_suspend(struct usb_device *rhdev, pm_message_t msg) 2233int hcd_bus_suspend(struct usb_device *rhdev, pm_message_t msg)
2210{ 2234{
2211 struct usb_hcd *hcd = container_of(rhdev->bus, struct usb_hcd, self); 2235 struct usb_hcd *hcd = bus_to_hcd(rhdev->bus);
2212 int status; 2236 int status;
2213 int old_state = hcd->state; 2237 int old_state = hcd->state;
2214 2238
@@ -2257,7 +2281,7 @@ int hcd_bus_suspend(struct usb_device *rhdev, pm_message_t msg)
2257 2281
2258int hcd_bus_resume(struct usb_device *rhdev, pm_message_t msg) 2282int hcd_bus_resume(struct usb_device *rhdev, pm_message_t msg)
2259{ 2283{
2260 struct usb_hcd *hcd = container_of(rhdev->bus, struct usb_hcd, self); 2284 struct usb_hcd *hcd = bus_to_hcd(rhdev->bus);
2261 int status; 2285 int status;
2262 int old_state = hcd->state; 2286 int old_state = hcd->state;
2263 2287
@@ -2371,7 +2395,7 @@ int usb_bus_start_enum(struct usb_bus *bus, unsigned port_num)
2371 * boards with root hubs hooked up to internal devices (instead of 2395 * boards with root hubs hooked up to internal devices (instead of
2372 * just the OTG port) may need more attention to resetting... 2396 * just the OTG port) may need more attention to resetting...
2373 */ 2397 */
2374 hcd = container_of (bus, struct usb_hcd, self); 2398 hcd = bus_to_hcd(bus);
2375 if (port_num && hcd->driver->start_port_reset) 2399 if (port_num && hcd->driver->start_port_reset)
2376 status = hcd->driver->start_port_reset(hcd, port_num); 2400 status = hcd->driver->start_port_reset(hcd, port_num);
2377 2401
@@ -2778,9 +2802,11 @@ int usb_add_hcd(struct usb_hcd *hcd,
2778 rhdev->speed = USB_SPEED_WIRELESS; 2802 rhdev->speed = USB_SPEED_WIRELESS;
2779 break; 2803 break;
2780 case HCD_USB3: 2804 case HCD_USB3:
2781 case HCD_USB31:
2782 rhdev->speed = USB_SPEED_SUPER; 2805 rhdev->speed = USB_SPEED_SUPER;
2783 break; 2806 break;
2807 case HCD_USB31:
2808 rhdev->speed = USB_SPEED_SUPER_PLUS;
2809 break;
2784 default: 2810 default:
2785 retval = -EINVAL; 2811 retval = -EINVAL;
2786 goto err_set_rh_speed; 2812 goto err_set_rh_speed;
@@ -2863,9 +2889,9 @@ error_create_attr_group:
2863#ifdef CONFIG_PM 2889#ifdef CONFIG_PM
2864 cancel_work_sync(&hcd->wakeup_work); 2890 cancel_work_sync(&hcd->wakeup_work);
2865#endif 2891#endif
2866 mutex_lock(&usb_bus_list_lock); 2892 mutex_lock(&usb_bus_idr_lock);
2867 usb_disconnect(&rhdev); /* Sets rhdev to NULL */ 2893 usb_disconnect(&rhdev); /* Sets rhdev to NULL */
2868 mutex_unlock(&usb_bus_list_lock); 2894 mutex_unlock(&usb_bus_idr_lock);
2869err_register_root_hub: 2895err_register_root_hub:
2870 hcd->rh_pollable = 0; 2896 hcd->rh_pollable = 0;
2871 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); 2897 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
@@ -2932,9 +2958,9 @@ void usb_remove_hcd(struct usb_hcd *hcd)
2932 cancel_work_sync(&hcd->wakeup_work); 2958 cancel_work_sync(&hcd->wakeup_work);
2933#endif 2959#endif
2934 2960
2935 mutex_lock(&usb_bus_list_lock); 2961 mutex_lock(&usb_bus_idr_lock);
2936 usb_disconnect(&rhdev); /* Sets rhdev to NULL */ 2962 usb_disconnect(&rhdev); /* Sets rhdev to NULL */
2937 mutex_unlock(&usb_bus_list_lock); 2963 mutex_unlock(&usb_bus_idr_lock);
2938 2964
2939 /* 2965 /*
2940 * tasklet_kill() isn't needed here because: 2966 * tasklet_kill() isn't needed here because:
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index 51b436918f78..38cc4bae0a82 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -49,7 +49,7 @@ static void hub_event(struct work_struct *work);
49DEFINE_MUTEX(usb_port_peer_mutex); 49DEFINE_MUTEX(usb_port_peer_mutex);
50 50
51/* cycle leds on hubs that aren't blinking for attention */ 51/* cycle leds on hubs that aren't blinking for attention */
52static bool blinkenlights = 0; 52static bool blinkenlights;
53module_param(blinkenlights, bool, S_IRUGO); 53module_param(blinkenlights, bool, S_IRUGO);
54MODULE_PARM_DESC(blinkenlights, "true to cycle leds on hubs"); 54MODULE_PARM_DESC(blinkenlights, "true to cycle leds on hubs");
55 55
@@ -78,7 +78,7 @@ MODULE_PARM_DESC(initial_descriptor_timeout,
78 * otherwise the new scheme is used. If that fails and "use_both_schemes" 78 * otherwise the new scheme is used. If that fails and "use_both_schemes"
79 * is set, then the driver will make another attempt, using the other scheme. 79 * is set, then the driver will make another attempt, using the other scheme.
80 */ 80 */
81static bool old_scheme_first = 0; 81static bool old_scheme_first;
82module_param(old_scheme_first, bool, S_IRUGO | S_IWUSR); 82module_param(old_scheme_first, bool, S_IRUGO | S_IWUSR);
83MODULE_PARM_DESC(old_scheme_first, 83MODULE_PARM_DESC(old_scheme_first,
84 "start with the old device initialization scheme"); 84 "start with the old device initialization scheme");
@@ -298,7 +298,7 @@ static void usb_set_lpm_parameters(struct usb_device *udev)
298 unsigned int hub_u1_del; 298 unsigned int hub_u1_del;
299 unsigned int hub_u2_del; 299 unsigned int hub_u2_del;
300 300
301 if (!udev->lpm_capable || udev->speed != USB_SPEED_SUPER) 301 if (!udev->lpm_capable || udev->speed < USB_SPEED_SUPER)
302 return; 302 return;
303 303
304 hub = usb_hub_to_struct_hub(udev->parent); 304 hub = usb_hub_to_struct_hub(udev->parent);
@@ -537,29 +537,34 @@ static int get_hub_status(struct usb_device *hdev,
537 537
538/* 538/*
539 * USB 2.0 spec Section 11.24.2.7 539 * USB 2.0 spec Section 11.24.2.7
540 * USB 3.1 takes into use the wValue and wLength fields, spec Section 10.16.2.6
540 */ 541 */
541static int get_port_status(struct usb_device *hdev, int port1, 542static int get_port_status(struct usb_device *hdev, int port1,
542 struct usb_port_status *data) 543 void *data, u16 value, u16 length)
543{ 544{
544 int i, status = -ETIMEDOUT; 545 int i, status = -ETIMEDOUT;
545 546
546 for (i = 0; i < USB_STS_RETRIES && 547 for (i = 0; i < USB_STS_RETRIES &&
547 (status == -ETIMEDOUT || status == -EPIPE); i++) { 548 (status == -ETIMEDOUT || status == -EPIPE); i++) {
548 status = usb_control_msg(hdev, usb_rcvctrlpipe(hdev, 0), 549 status = usb_control_msg(hdev, usb_rcvctrlpipe(hdev, 0),
549 USB_REQ_GET_STATUS, USB_DIR_IN | USB_RT_PORT, 0, port1, 550 USB_REQ_GET_STATUS, USB_DIR_IN | USB_RT_PORT, value,
550 data, sizeof(*data), USB_STS_TIMEOUT); 551 port1, data, length, USB_STS_TIMEOUT);
551 } 552 }
552 return status; 553 return status;
553} 554}
554 555
555static int hub_port_status(struct usb_hub *hub, int port1, 556static int hub_ext_port_status(struct usb_hub *hub, int port1, int type,
556 u16 *status, u16 *change) 557 u16 *status, u16 *change, u32 *ext_status)
557{ 558{
558 int ret; 559 int ret;
560 int len = 4;
561
562 if (type != HUB_PORT_STATUS)
563 len = 8;
559 564
560 mutex_lock(&hub->status_mutex); 565 mutex_lock(&hub->status_mutex);
561 ret = get_port_status(hub->hdev, port1, &hub->status->port); 566 ret = get_port_status(hub->hdev, port1, &hub->status->port, type, len);
562 if (ret < 4) { 567 if (ret < len) {
563 if (ret != -ENODEV) 568 if (ret != -ENODEV)
564 dev_err(hub->intfdev, 569 dev_err(hub->intfdev,
565 "%s failed (err = %d)\n", __func__, ret); 570 "%s failed (err = %d)\n", __func__, ret);
@@ -568,13 +573,22 @@ static int hub_port_status(struct usb_hub *hub, int port1,
568 } else { 573 } else {
569 *status = le16_to_cpu(hub->status->port.wPortStatus); 574 *status = le16_to_cpu(hub->status->port.wPortStatus);
570 *change = le16_to_cpu(hub->status->port.wPortChange); 575 *change = le16_to_cpu(hub->status->port.wPortChange);
571 576 if (type != HUB_PORT_STATUS && ext_status)
577 *ext_status = le32_to_cpu(
578 hub->status->port.dwExtPortStatus);
572 ret = 0; 579 ret = 0;
573 } 580 }
574 mutex_unlock(&hub->status_mutex); 581 mutex_unlock(&hub->status_mutex);
575 return ret; 582 return ret;
576} 583}
577 584
585static int hub_port_status(struct usb_hub *hub, int port1,
586 u16 *status, u16 *change)
587{
588 return hub_ext_port_status(hub, port1, HUB_PORT_STATUS,
589 status, change, NULL);
590}
591
578static void kick_hub_wq(struct usb_hub *hub) 592static void kick_hub_wq(struct usb_hub *hub)
579{ 593{
580 struct usb_interface *intf; 594 struct usb_interface *intf;
@@ -2131,7 +2145,7 @@ static void hub_disconnect_children(struct usb_device *udev)
2131 * Something got disconnected. Get rid of it and all of its children. 2145 * Something got disconnected. Get rid of it and all of its children.
2132 * 2146 *
2133 * If *pdev is a normal device then the parent hub must already be locked. 2147 * If *pdev is a normal device then the parent hub must already be locked.
2134 * If *pdev is a root hub then the caller must hold the usb_bus_list_lock, 2148 * If *pdev is a root hub then the caller must hold the usb_bus_idr_lock,
2135 * which protects the set of root hubs as well as the list of buses. 2149 * which protects the set of root hubs as well as the list of buses.
2136 * 2150 *
2137 * Only hub drivers (including virtual root hub drivers for host 2151 * Only hub drivers (including virtual root hub drivers for host
@@ -2429,7 +2443,7 @@ static void set_usb_port_removable(struct usb_device *udev)
2429 * enumerated. The device descriptor is available, but not descriptors 2443 * enumerated. The device descriptor is available, but not descriptors
2430 * for any device configuration. The caller must have locked either 2444 * for any device configuration. The caller must have locked either
2431 * the parent hub (if udev is a normal device) or else the 2445 * the parent hub (if udev is a normal device) or else the
2432 * usb_bus_list_lock (if udev is a root hub). The parent's pointer to 2446 * usb_bus_idr_lock (if udev is a root hub). The parent's pointer to
2433 * udev has already been installed, but udev is not yet visible through 2447 * udev has already been installed, but udev is not yet visible through
2434 * sysfs or other filesystem code. 2448 * sysfs or other filesystem code.
2435 * 2449 *
@@ -2612,6 +2626,32 @@ out_authorized:
2612 return result; 2626 return result;
2613} 2627}
2614 2628
2629/*
2630 * Return 1 if port speed is SuperSpeedPlus, 0 otherwise
2631 * check it from the link protocol field of the current speed ID attribute.
2632 * current speed ID is got from ext port status request. Sublink speed attribute
2633 * table is returned with the hub BOS SSP device capability descriptor
2634 */
2635static int port_speed_is_ssp(struct usb_device *hdev, int speed_id)
2636{
2637 int ssa_count;
2638 u32 ss_attr;
2639 int i;
2640 struct usb_ssp_cap_descriptor *ssp_cap = hdev->bos->ssp_cap;
2641
2642 if (!ssp_cap)
2643 return 0;
2644
2645 ssa_count = le32_to_cpu(ssp_cap->bmAttributes) &
2646 USB_SSP_SUBLINK_SPEED_ATTRIBS;
2647
2648 for (i = 0; i <= ssa_count; i++) {
2649 ss_attr = le32_to_cpu(ssp_cap->bmSublinkSpeedAttr[i]);
2650 if (speed_id == (ss_attr & USB_SSP_SUBLINK_SPEED_SSID))
2651 return !!(ss_attr & USB_SSP_SUBLINK_SPEED_LP);
2652 }
2653 return 0;
2654}
2615 2655
2616/* Returns 1 if @hub is a WUSB root hub, 0 otherwise */ 2656/* Returns 1 if @hub is a WUSB root hub, 0 otherwise */
2617static unsigned hub_is_wusb(struct usb_hub *hub) 2657static unsigned hub_is_wusb(struct usb_hub *hub)
@@ -2619,7 +2659,7 @@ static unsigned hub_is_wusb(struct usb_hub *hub)
2619 struct usb_hcd *hcd; 2659 struct usb_hcd *hcd;
2620 if (hub->hdev->parent != NULL) /* not a root hub? */ 2660 if (hub->hdev->parent != NULL) /* not a root hub? */
2621 return 0; 2661 return 0;
2622 hcd = container_of(hub->hdev->bus, struct usb_hcd, self); 2662 hcd = bus_to_hcd(hub->hdev->bus);
2623 return hcd->wireless; 2663 return hcd->wireless;
2624} 2664}
2625 2665
@@ -2645,7 +2685,7 @@ static unsigned hub_is_wusb(struct usb_hub *hub)
2645 */ 2685 */
2646static bool use_new_scheme(struct usb_device *udev, int retry) 2686static bool use_new_scheme(struct usb_device *udev, int retry)
2647{ 2687{
2648 if (udev->speed == USB_SPEED_SUPER) 2688 if (udev->speed >= USB_SPEED_SUPER)
2649 return false; 2689 return false;
2650 2690
2651 return USE_NEW_SCHEME(retry); 2691 return USE_NEW_SCHEME(retry);
@@ -2676,6 +2716,7 @@ static int hub_port_wait_reset(struct usb_hub *hub, int port1,
2676 int delay_time, ret; 2716 int delay_time, ret;
2677 u16 portstatus; 2717 u16 portstatus;
2678 u16 portchange; 2718 u16 portchange;
2719 u32 ext_portstatus = 0;
2679 2720
2680 for (delay_time = 0; 2721 for (delay_time = 0;
2681 delay_time < HUB_RESET_TIMEOUT; 2722 delay_time < HUB_RESET_TIMEOUT;
@@ -2684,7 +2725,14 @@ static int hub_port_wait_reset(struct usb_hub *hub, int port1,
2684 msleep(delay); 2725 msleep(delay);
2685 2726
2686 /* read and decode port status */ 2727 /* read and decode port status */
2687 ret = hub_port_status(hub, port1, &portstatus, &portchange); 2728 if (hub_is_superspeedplus(hub->hdev))
2729 ret = hub_ext_port_status(hub, port1,
2730 HUB_EXT_PORT_STATUS,
2731 &portstatus, &portchange,
2732 &ext_portstatus);
2733 else
2734 ret = hub_port_status(hub, port1, &portstatus,
2735 &portchange);
2688 if (ret < 0) 2736 if (ret < 0)
2689 return ret; 2737 return ret;
2690 2738
@@ -2727,6 +2775,10 @@ static int hub_port_wait_reset(struct usb_hub *hub, int port1,
2727 2775
2728 if (hub_is_wusb(hub)) 2776 if (hub_is_wusb(hub))
2729 udev->speed = USB_SPEED_WIRELESS; 2777 udev->speed = USB_SPEED_WIRELESS;
2778 else if (hub_is_superspeedplus(hub->hdev) &&
2779 port_speed_is_ssp(hub->hdev, ext_portstatus &
2780 USB_EXT_PORT_STAT_RX_SPEED_ID))
2781 udev->speed = USB_SPEED_SUPER_PLUS;
2730 else if (hub_is_superspeed(hub->hdev)) 2782 else if (hub_is_superspeed(hub->hdev))
2731 udev->speed = USB_SPEED_SUPER; 2783 udev->speed = USB_SPEED_SUPER;
2732 else if (portstatus & USB_PORT_STAT_HIGH_SPEED) 2784 else if (portstatus & USB_PORT_STAT_HIGH_SPEED)
@@ -3989,7 +4041,7 @@ int usb_disable_lpm(struct usb_device *udev)
3989 struct usb_hcd *hcd; 4041 struct usb_hcd *hcd;
3990 4042
3991 if (!udev || !udev->parent || 4043 if (!udev || !udev->parent ||
3992 udev->speed != USB_SPEED_SUPER || 4044 udev->speed < USB_SPEED_SUPER ||
3993 !udev->lpm_capable || 4045 !udev->lpm_capable ||
3994 udev->state < USB_STATE_DEFAULT) 4046 udev->state < USB_STATE_DEFAULT)
3995 return 0; 4047 return 0;
@@ -4048,7 +4100,7 @@ void usb_enable_lpm(struct usb_device *udev)
4048 struct usb_port *port_dev; 4100 struct usb_port *port_dev;
4049 4101
4050 if (!udev || !udev->parent || 4102 if (!udev || !udev->parent ||
4051 udev->speed != USB_SPEED_SUPER || 4103 udev->speed < USB_SPEED_SUPER ||
4052 !udev->lpm_capable || 4104 !udev->lpm_capable ||
4053 udev->state < USB_STATE_DEFAULT) 4105 udev->state < USB_STATE_DEFAULT)
4054 return; 4106 return;
@@ -4292,7 +4344,7 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1,
4292{ 4344{
4293 struct usb_device *hdev = hub->hdev; 4345 struct usb_device *hdev = hub->hdev;
4294 struct usb_hcd *hcd = bus_to_hcd(hdev->bus); 4346 struct usb_hcd *hcd = bus_to_hcd(hdev->bus);
4295 int i, j, retval; 4347 int retries, operations, retval, i;
4296 unsigned delay = HUB_SHORT_RESET_TIME; 4348 unsigned delay = HUB_SHORT_RESET_TIME;
4297 enum usb_device_speed oldspeed = udev->speed; 4349 enum usb_device_speed oldspeed = udev->speed;
4298 const char *speed; 4350 const char *speed;
@@ -4323,7 +4375,9 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1,
4323 4375
4324 retval = -ENODEV; 4376 retval = -ENODEV;
4325 4377
4326 if (oldspeed != USB_SPEED_UNKNOWN && oldspeed != udev->speed) { 4378 /* Don't allow speed changes at reset, except usb 3.0 to faster */
4379 if (oldspeed != USB_SPEED_UNKNOWN && oldspeed != udev->speed &&
4380 !(oldspeed == USB_SPEED_SUPER && udev->speed > oldspeed)) {
4327 dev_dbg(&udev->dev, "device reset changed speed!\n"); 4381 dev_dbg(&udev->dev, "device reset changed speed!\n");
4328 goto fail; 4382 goto fail;
4329 } 4383 }
@@ -4335,6 +4389,7 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1,
4335 * reported as 0xff in the device descriptor). WUSB1.0[4.8.1]. 4389 * reported as 0xff in the device descriptor). WUSB1.0[4.8.1].
4336 */ 4390 */
4337 switch (udev->speed) { 4391 switch (udev->speed) {
4392 case USB_SPEED_SUPER_PLUS:
4338 case USB_SPEED_SUPER: 4393 case USB_SPEED_SUPER:
4339 case USB_SPEED_WIRELESS: /* fixed at 512 */ 4394 case USB_SPEED_WIRELESS: /* fixed at 512 */
4340 udev->ep0.desc.wMaxPacketSize = cpu_to_le16(512); 4395 udev->ep0.desc.wMaxPacketSize = cpu_to_le16(512);
@@ -4361,7 +4416,7 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1,
4361 else 4416 else
4362 speed = usb_speed_string(udev->speed); 4417 speed = usb_speed_string(udev->speed);
4363 4418
4364 if (udev->speed != USB_SPEED_SUPER) 4419 if (udev->speed < USB_SPEED_SUPER)
4365 dev_info(&udev->dev, 4420 dev_info(&udev->dev,
4366 "%s %s USB device number %d using %s\n", 4421 "%s %s USB device number %d using %s\n",
4367 (udev->config) ? "reset" : "new", speed, 4422 (udev->config) ? "reset" : "new", speed,
@@ -4394,7 +4449,7 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1,
4394 * first 8 bytes of the device descriptor to get the ep0 maxpacket 4449 * first 8 bytes of the device descriptor to get the ep0 maxpacket
4395 * value. 4450 * value.
4396 */ 4451 */
4397 for (i = 0; i < GET_DESCRIPTOR_TRIES; (++i, msleep(100))) { 4452 for (retries = 0; retries < GET_DESCRIPTOR_TRIES; (++retries, msleep(100))) {
4398 bool did_new_scheme = false; 4453 bool did_new_scheme = false;
4399 4454
4400 if (use_new_scheme(udev, retry_counter)) { 4455 if (use_new_scheme(udev, retry_counter)) {
@@ -4421,7 +4476,7 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1,
4421 * 255 is for WUSB devices, we actually need to use 4476 * 255 is for WUSB devices, we actually need to use
4422 * 512 (WUSB1.0[4.8.1]). 4477 * 512 (WUSB1.0[4.8.1]).
4423 */ 4478 */
4424 for (j = 0; j < 3; ++j) { 4479 for (operations = 0; operations < 3; ++operations) {
4425 buf->bMaxPacketSize0 = 0; 4480 buf->bMaxPacketSize0 = 0;
4426 r = usb_control_msg(udev, usb_rcvaddr0pipe(), 4481 r = usb_control_msg(udev, usb_rcvaddr0pipe(),
4427 USB_REQ_GET_DESCRIPTOR, USB_DIR_IN, 4482 USB_REQ_GET_DESCRIPTOR, USB_DIR_IN,
@@ -4441,7 +4496,13 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1,
4441 r = -EPROTO; 4496 r = -EPROTO;
4442 break; 4497 break;
4443 } 4498 }
4444 if (r == 0) 4499 /*
4500 * Some devices time out if they are powered on
4501 * when already connected. They need a second
4502 * reset. But only on the first attempt,
4503 * lest we get into a time out/reset loop
4504 */
4505 if (r == 0 || (r == -ETIMEDOUT && retries == 0))
4445 break; 4506 break;
4446 } 4507 }
4447 udev->descriptor.bMaxPacketSize0 = 4508 udev->descriptor.bMaxPacketSize0 =
@@ -4473,7 +4534,7 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1,
4473 * authorization will assign the final address. 4534 * authorization will assign the final address.
4474 */ 4535 */
4475 if (udev->wusb == 0) { 4536 if (udev->wusb == 0) {
4476 for (j = 0; j < SET_ADDRESS_TRIES; ++j) { 4537 for (operations = 0; operations < SET_ADDRESS_TRIES; ++operations) {
4477 retval = hub_set_address(udev, devnum); 4538 retval = hub_set_address(udev, devnum);
4478 if (retval >= 0) 4539 if (retval >= 0)
4479 break; 4540 break;
@@ -4485,11 +4546,12 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1,
4485 devnum, retval); 4546 devnum, retval);
4486 goto fail; 4547 goto fail;
4487 } 4548 }
4488 if (udev->speed == USB_SPEED_SUPER) { 4549 if (udev->speed >= USB_SPEED_SUPER) {
4489 devnum = udev->devnum; 4550 devnum = udev->devnum;
4490 dev_info(&udev->dev, 4551 dev_info(&udev->dev,
4491 "%s SuperSpeed USB device number %d using %s\n", 4552 "%s SuperSpeed%s USB device number %d using %s\n",
4492 (udev->config) ? "reset" : "new", 4553 (udev->config) ? "reset" : "new",
4554 (udev->speed == USB_SPEED_SUPER_PLUS) ? "Plus" : "",
4493 devnum, udev->bus->controller->driver->name); 4555 devnum, udev->bus->controller->driver->name);
4494 } 4556 }
4495 4557
@@ -4528,7 +4590,7 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1,
4528 * got from those devices show they aren't superspeed devices. Warm 4590 * got from those devices show they aren't superspeed devices. Warm
4529 * reset the port attached by the devices can fix them. 4591 * reset the port attached by the devices can fix them.
4530 */ 4592 */
4531 if ((udev->speed == USB_SPEED_SUPER) && 4593 if ((udev->speed >= USB_SPEED_SUPER) &&
4532 (le16_to_cpu(udev->descriptor.bcdUSB) < 0x0300)) { 4594 (le16_to_cpu(udev->descriptor.bcdUSB) < 0x0300)) {
4533 dev_err(&udev->dev, "got a wrong device descriptor, " 4595 dev_err(&udev->dev, "got a wrong device descriptor, "
4534 "warm reset device\n"); 4596 "warm reset device\n");
@@ -4539,7 +4601,7 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1,
4539 } 4601 }
4540 4602
4541 if (udev->descriptor.bMaxPacketSize0 == 0xff || 4603 if (udev->descriptor.bMaxPacketSize0 == 0xff ||
4542 udev->speed == USB_SPEED_SUPER) 4604 udev->speed >= USB_SPEED_SUPER)
4543 i = 512; 4605 i = 512;
4544 else 4606 else
4545 i = udev->descriptor.bMaxPacketSize0; 4607 i = udev->descriptor.bMaxPacketSize0;
@@ -4749,7 +4811,7 @@ static void hub_port_connect(struct usb_hub *hub, int port1, u16 portstatus,
4749 udev->level = hdev->level + 1; 4811 udev->level = hdev->level + 1;
4750 udev->wusb = hub_is_wusb(hub); 4812 udev->wusb = hub_is_wusb(hub);
4751 4813
4752 /* Only USB 3.0 devices are connected to SuperSpeed hubs. */ 4814 /* Devices connected to SuperSpeed hubs are USB 3.0 or later */
4753 if (hub_is_superspeed(hub->hdev)) 4815 if (hub_is_superspeed(hub->hdev))
4754 udev->speed = USB_SPEED_SUPER; 4816 udev->speed = USB_SPEED_SUPER;
4755 else 4817 else
diff --git a/drivers/usb/core/hub.h b/drivers/usb/core/hub.h
index 45d070dd1d03..34c1a7e22aae 100644
--- a/drivers/usb/core/hub.h
+++ b/drivers/usb/core/hub.h
@@ -140,6 +140,13 @@ static inline int hub_is_superspeed(struct usb_device *hdev)
140 return hdev->descriptor.bDeviceProtocol == USB_HUB_PR_SS; 140 return hdev->descriptor.bDeviceProtocol == USB_HUB_PR_SS;
141} 141}
142 142
143static inline int hub_is_superspeedplus(struct usb_device *hdev)
144{
145 return (hdev->descriptor.bDeviceProtocol == USB_HUB_PR_SS &&
146 le16_to_cpu(hdev->descriptor.bcdUSB) >= 0x0310 &&
147 hdev->bos->ssp_cap);
148}
149
143static inline unsigned hub_power_on_good_delay(struct usb_hub *hub) 150static inline unsigned hub_power_on_good_delay(struct usb_hub *hub)
144{ 151{
145 unsigned delay = hub->descriptor->bPwrOn2PwrGood * 2; 152 unsigned delay = hub->descriptor->bPwrOn2PwrGood * 2;
diff --git a/drivers/usb/core/of.c b/drivers/usb/core/of.c
new file mode 100644
index 000000000000..2289700c31d6
--- /dev/null
+++ b/drivers/usb/core/of.c
@@ -0,0 +1,47 @@
1/*
2 * of.c The helpers for hcd device tree support
3 *
4 * Copyright (C) 2016 Freescale Semiconductor, Inc.
5 * Author: Peter Chen <peter.chen@freescale.com>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 of
9 * the License as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/of.h>
21
22/**
23 * usb_of_get_child_node - Find the device node match port number
24 * @parent: the parent device node
25 * @portnum: the port number which device is connecting
26 *
27 * Find the node from device tree according to its port number.
28 *
29 * Return: On success, a pointer to the device node, %NULL on failure.
30 */
31struct device_node *usb_of_get_child_node(struct device_node *parent,
32 int portnum)
33{
34 struct device_node *node;
35 u32 port;
36
37 for_each_child_of_node(parent, node) {
38 if (!of_property_read_u32(node, "reg", &port)) {
39 if (port == portnum)
40 return node;
41 }
42 }
43
44 return NULL;
45}
46EXPORT_SYMBOL_GPL(usb_of_get_child_node);
47
diff --git a/drivers/usb/core/sysfs.c b/drivers/usb/core/sysfs.c
index 65b6e6b84043..c953a0f1c695 100644
--- a/drivers/usb/core/sysfs.c
+++ b/drivers/usb/core/sysfs.c
@@ -23,10 +23,12 @@ static ssize_t field##_show(struct device *dev, \
23{ \ 23{ \
24 struct usb_device *udev; \ 24 struct usb_device *udev; \
25 struct usb_host_config *actconfig; \ 25 struct usb_host_config *actconfig; \
26 ssize_t rc = 0; \ 26 ssize_t rc; \
27 \ 27 \
28 udev = to_usb_device(dev); \ 28 udev = to_usb_device(dev); \
29 usb_lock_device(udev); \ 29 rc = usb_lock_device_interruptible(udev); \
30 if (rc < 0) \
31 return -EINTR; \
30 actconfig = udev->actconfig; \ 32 actconfig = udev->actconfig; \
31 if (actconfig) \ 33 if (actconfig) \
32 rc = sprintf(buf, format_string, \ 34 rc = sprintf(buf, format_string, \
@@ -47,10 +49,12 @@ static ssize_t bMaxPower_show(struct device *dev,
47{ 49{
48 struct usb_device *udev; 50 struct usb_device *udev;
49 struct usb_host_config *actconfig; 51 struct usb_host_config *actconfig;
50 ssize_t rc = 0; 52 ssize_t rc;
51 53
52 udev = to_usb_device(dev); 54 udev = to_usb_device(dev);
53 usb_lock_device(udev); 55 rc = usb_lock_device_interruptible(udev);
56 if (rc < 0)
57 return -EINTR;
54 actconfig = udev->actconfig; 58 actconfig = udev->actconfig;
55 if (actconfig) 59 if (actconfig)
56 rc = sprintf(buf, "%dmA\n", usb_get_max_power(udev, actconfig)); 60 rc = sprintf(buf, "%dmA\n", usb_get_max_power(udev, actconfig));
@@ -64,10 +68,12 @@ static ssize_t configuration_show(struct device *dev,
64{ 68{
65 struct usb_device *udev; 69 struct usb_device *udev;
66 struct usb_host_config *actconfig; 70 struct usb_host_config *actconfig;
67 ssize_t rc = 0; 71 ssize_t rc;
68 72
69 udev = to_usb_device(dev); 73 udev = to_usb_device(dev);
70 usb_lock_device(udev); 74 rc = usb_lock_device_interruptible(udev);
75 if (rc < 0)
76 return -EINTR;
71 actconfig = udev->actconfig; 77 actconfig = udev->actconfig;
72 if (actconfig && actconfig->string) 78 if (actconfig && actconfig->string)
73 rc = sprintf(buf, "%s\n", actconfig->string); 79 rc = sprintf(buf, "%s\n", actconfig->string);
@@ -84,11 +90,13 @@ static ssize_t bConfigurationValue_store(struct device *dev,
84 const char *buf, size_t count) 90 const char *buf, size_t count)
85{ 91{
86 struct usb_device *udev = to_usb_device(dev); 92 struct usb_device *udev = to_usb_device(dev);
87 int config, value; 93 int config, value, rc;
88 94
89 if (sscanf(buf, "%d", &config) != 1 || config < -1 || config > 255) 95 if (sscanf(buf, "%d", &config) != 1 || config < -1 || config > 255)
90 return -EINVAL; 96 return -EINVAL;
91 usb_lock_device(udev); 97 rc = usb_lock_device_interruptible(udev);
98 if (rc < 0)
99 return -EINTR;
92 value = usb_set_configuration(udev, config); 100 value = usb_set_configuration(udev, config);
93 usb_unlock_device(udev); 101 usb_unlock_device(udev);
94 return (value < 0) ? value : count; 102 return (value < 0) ? value : count;
@@ -105,7 +113,9 @@ static ssize_t name##_show(struct device *dev, \
105 int retval; \ 113 int retval; \
106 \ 114 \
107 udev = to_usb_device(dev); \ 115 udev = to_usb_device(dev); \
108 usb_lock_device(udev); \ 116 retval = usb_lock_device_interruptible(udev); \
117 if (retval < 0) \
118 return -EINTR; \
109 retval = sprintf(buf, "%s\n", udev->name); \ 119 retval = sprintf(buf, "%s\n", udev->name); \
110 usb_unlock_device(udev); \ 120 usb_unlock_device(udev); \
111 return retval; \ 121 return retval; \
@@ -141,6 +151,9 @@ static ssize_t speed_show(struct device *dev, struct device_attribute *attr,
141 case USB_SPEED_SUPER: 151 case USB_SPEED_SUPER:
142 speed = "5000"; 152 speed = "5000";
143 break; 153 break;
154 case USB_SPEED_SUPER_PLUS:
155 speed = "10000";
156 break;
144 default: 157 default:
145 speed = "unknown"; 158 speed = "unknown";
146 } 159 }
@@ -224,11 +237,13 @@ static ssize_t avoid_reset_quirk_store(struct device *dev,
224 const char *buf, size_t count) 237 const char *buf, size_t count)
225{ 238{
226 struct usb_device *udev = to_usb_device(dev); 239 struct usb_device *udev = to_usb_device(dev);
227 int val; 240 int val, rc;
228 241
229 if (sscanf(buf, "%d", &val) != 1 || val < 0 || val > 1) 242 if (sscanf(buf, "%d", &val) != 1 || val < 0 || val > 1)
230 return -EINVAL; 243 return -EINVAL;
231 usb_lock_device(udev); 244 rc = usb_lock_device_interruptible(udev);
245 if (rc < 0)
246 return -EINTR;
232 if (val) 247 if (val)
233 udev->quirks |= USB_QUIRK_RESET; 248 udev->quirks |= USB_QUIRK_RESET;
234 else 249 else
@@ -294,7 +309,7 @@ static ssize_t persist_store(struct device *dev, struct device_attribute *attr,
294 const char *buf, size_t count) 309 const char *buf, size_t count)
295{ 310{
296 struct usb_device *udev = to_usb_device(dev); 311 struct usb_device *udev = to_usb_device(dev);
297 int value; 312 int value, rc;
298 313
299 /* Hubs are always enabled for USB_PERSIST */ 314 /* Hubs are always enabled for USB_PERSIST */
300 if (udev->descriptor.bDeviceClass == USB_CLASS_HUB) 315 if (udev->descriptor.bDeviceClass == USB_CLASS_HUB)
@@ -303,7 +318,9 @@ static ssize_t persist_store(struct device *dev, struct device_attribute *attr,
303 if (sscanf(buf, "%d", &value) != 1) 318 if (sscanf(buf, "%d", &value) != 1)
304 return -EINVAL; 319 return -EINVAL;
305 320
306 usb_lock_device(udev); 321 rc = usb_lock_device_interruptible(udev);
322 if (rc < 0)
323 return -EINTR;
307 udev->persist_enabled = !!value; 324 udev->persist_enabled = !!value;
308 usb_unlock_device(udev); 325 usb_unlock_device(udev);
309 return count; 326 return count;
@@ -420,13 +437,16 @@ static ssize_t level_store(struct device *dev, struct device_attribute *attr,
420 int len = count; 437 int len = count;
421 char *cp; 438 char *cp;
422 int rc = count; 439 int rc = count;
440 int rv;
423 441
424 warn_level(); 442 warn_level();
425 cp = memchr(buf, '\n', count); 443 cp = memchr(buf, '\n', count);
426 if (cp) 444 if (cp)
427 len = cp - buf; 445 len = cp - buf;
428 446
429 usb_lock_device(udev); 447 rv = usb_lock_device_interruptible(udev);
448 if (rv < 0)
449 return -EINTR;
430 450
431 if (len == sizeof on_string - 1 && 451 if (len == sizeof on_string - 1 &&
432 strncmp(buf, on_string, len) == 0) 452 strncmp(buf, on_string, len) == 0)
@@ -466,7 +486,9 @@ static ssize_t usb2_hardware_lpm_store(struct device *dev,
466 bool value; 486 bool value;
467 int ret; 487 int ret;
468 488
469 usb_lock_device(udev); 489 ret = usb_lock_device_interruptible(udev);
490 if (ret < 0)
491 return -EINTR;
470 492
471 ret = strtobool(buf, &value); 493 ret = strtobool(buf, &value);
472 494
@@ -536,8 +558,11 @@ static ssize_t usb3_hardware_lpm_u1_show(struct device *dev,
536{ 558{
537 struct usb_device *udev = to_usb_device(dev); 559 struct usb_device *udev = to_usb_device(dev);
538 const char *p; 560 const char *p;
561 int rc;
539 562
540 usb_lock_device(udev); 563 rc = usb_lock_device_interruptible(udev);
564 if (rc < 0)
565 return -EINTR;
541 566
542 if (udev->usb3_lpm_u1_enabled) 567 if (udev->usb3_lpm_u1_enabled)
543 p = "enabled"; 568 p = "enabled";
@@ -555,8 +580,11 @@ static ssize_t usb3_hardware_lpm_u2_show(struct device *dev,
555{ 580{
556 struct usb_device *udev = to_usb_device(dev); 581 struct usb_device *udev = to_usb_device(dev);
557 const char *p; 582 const char *p;
583 int rc;
558 584
559 usb_lock_device(udev); 585 rc = usb_lock_device_interruptible(udev);
586 if (rc < 0)
587 return -EINTR;
560 588
561 if (udev->usb3_lpm_u2_enabled) 589 if (udev->usb3_lpm_u2_enabled)
562 p = "enabled"; 590 p = "enabled";
@@ -822,7 +850,6 @@ read_descriptors(struct file *filp, struct kobject *kobj,
822 * Following that are the raw descriptor entries for all the 850 * Following that are the raw descriptor entries for all the
823 * configurations (config plus subsidiary descriptors). 851 * configurations (config plus subsidiary descriptors).
824 */ 852 */
825 usb_lock_device(udev);
826 for (cfgno = -1; cfgno < udev->descriptor.bNumConfigurations && 853 for (cfgno = -1; cfgno < udev->descriptor.bNumConfigurations &&
827 nleft > 0; ++cfgno) { 854 nleft > 0; ++cfgno) {
828 if (cfgno < 0) { 855 if (cfgno < 0) {
@@ -843,7 +870,6 @@ read_descriptors(struct file *filp, struct kobject *kobj,
843 off -= srclen; 870 off -= srclen;
844 } 871 }
845 } 872 }
846 usb_unlock_device(udev);
847 return count - nleft; 873 return count - nleft;
848} 874}
849 875
@@ -969,7 +995,9 @@ static ssize_t supports_autosuspend_show(struct device *dev,
969{ 995{
970 int s; 996 int s;
971 997
972 device_lock(dev); 998 s = device_lock_interruptible(dev);
999 if (s < 0)
1000 return -EINTR;
973 /* Devices will be autosuspended even when an interface isn't claimed */ 1001 /* Devices will be autosuspended even when an interface isn't claimed */
974 s = (!dev->driver || to_usb_driver(dev->driver)->supports_autosuspend); 1002 s = (!dev->driver || to_usb_driver(dev->driver)->supports_autosuspend);
975 device_unlock(dev); 1003 device_unlock(dev);
diff --git a/drivers/usb/core/urb.c b/drivers/usb/core/urb.c
index 3d274778caaf..c601e25b609f 100644
--- a/drivers/usb/core/urb.c
+++ b/drivers/usb/core/urb.c
@@ -401,7 +401,7 @@ int usb_submit_urb(struct urb *urb, gfp_t mem_flags)
401 /* SuperSpeed isoc endpoints have up to 16 bursts of up to 401 /* SuperSpeed isoc endpoints have up to 16 bursts of up to
402 * 3 packets each 402 * 3 packets each
403 */ 403 */
404 if (dev->speed == USB_SPEED_SUPER) { 404 if (dev->speed >= USB_SPEED_SUPER) {
405 int burst = 1 + ep->ss_ep_comp.bMaxBurst; 405 int burst = 1 + ep->ss_ep_comp.bMaxBurst;
406 int mult = USB_SS_MULT(ep->ss_ep_comp.bmAttributes); 406 int mult = USB_SS_MULT(ep->ss_ep_comp.bmAttributes);
407 max *= burst; 407 max *= burst;
@@ -499,6 +499,7 @@ int usb_submit_urb(struct urb *urb, gfp_t mem_flags)
499 } 499 }
500 /* too big? */ 500 /* too big? */
501 switch (dev->speed) { 501 switch (dev->speed) {
502 case USB_SPEED_SUPER_PLUS:
502 case USB_SPEED_SUPER: /* units are 125us */ 503 case USB_SPEED_SUPER: /* units are 125us */
503 /* Handle up to 2^(16-1) microframes */ 504 /* Handle up to 2^(16-1) microframes */
504 if (urb->interval > (1 << 15)) 505 if (urb->interval > (1 << 15))
diff --git a/drivers/usb/core/usb.c b/drivers/usb/core/usb.c
index ebb29caa3fe4..ffa5cf13ffe1 100644
--- a/drivers/usb/core/usb.c
+++ b/drivers/usb/core/usb.c
@@ -36,6 +36,7 @@
36#include <linux/mutex.h> 36#include <linux/mutex.h>
37#include <linux/workqueue.h> 37#include <linux/workqueue.h>
38#include <linux/debugfs.h> 38#include <linux/debugfs.h>
39#include <linux/usb/of.h>
39 40
40#include <asm/io.h> 41#include <asm/io.h>
41#include <linux/scatterlist.h> 42#include <linux/scatterlist.h>
@@ -241,7 +242,7 @@ static int __each_dev(struct device *dev, void *data)
241 if (!is_usb_device(dev)) 242 if (!is_usb_device(dev))
242 return 0; 243 return 0;
243 244
244 return arg->fn(container_of(dev, struct usb_device, dev), arg->data); 245 return arg->fn(to_usb_device(dev), arg->data);
245} 246}
246 247
247/** 248/**
@@ -397,7 +398,7 @@ struct device_type usb_device_type = {
397/* Returns 1 if @usb_bus is WUSB, 0 otherwise */ 398/* Returns 1 if @usb_bus is WUSB, 0 otherwise */
398static unsigned usb_bus_is_wusb(struct usb_bus *bus) 399static unsigned usb_bus_is_wusb(struct usb_bus *bus)
399{ 400{
400 struct usb_hcd *hcd = container_of(bus, struct usb_hcd, self); 401 struct usb_hcd *hcd = bus_to_hcd(bus);
401 return hcd->wireless; 402 return hcd->wireless;
402} 403}
403 404
@@ -470,6 +471,7 @@ struct usb_device *usb_alloc_dev(struct usb_device *parent,
470 dev->route = 0; 471 dev->route = 0;
471 472
472 dev->dev.parent = bus->controller; 473 dev->dev.parent = bus->controller;
474 dev->dev.of_node = bus->controller->of_node;
473 dev_set_name(&dev->dev, "usb%d", bus->busnum); 475 dev_set_name(&dev->dev, "usb%d", bus->busnum);
474 root_hub = 1; 476 root_hub = 1;
475 } else { 477 } else {
@@ -494,6 +496,14 @@ struct usb_device *usb_alloc_dev(struct usb_device *parent,
494 dev->dev.parent = &parent->dev; 496 dev->dev.parent = &parent->dev;
495 dev_set_name(&dev->dev, "%d-%s", bus->busnum, dev->devpath); 497 dev_set_name(&dev->dev, "%d-%s", bus->busnum, dev->devpath);
496 498
499 if (!parent->parent) {
500 /* device under root hub's port */
501 port1 = usb_hcd_find_raw_port_number(usb_hcd,
502 port1);
503 }
504 dev->dev.of_node = usb_of_get_child_node(parent->dev.of_node,
505 port1);
506
497 /* hub driver sets up TT records */ 507 /* hub driver sets up TT records */
498 } 508 }
499 509
@@ -1115,6 +1125,7 @@ static void __exit usb_exit(void)
1115 bus_unregister(&usb_bus_type); 1125 bus_unregister(&usb_bus_type);
1116 usb_acpi_unregister(); 1126 usb_acpi_unregister();
1117 usb_debugfs_cleanup(); 1127 usb_debugfs_cleanup();
1128 idr_destroy(&usb_bus_idr);
1118} 1129}
1119 1130
1120subsys_initcall(usb_init); 1131subsys_initcall(usb_init);
diff --git a/drivers/usb/core/usb.h b/drivers/usb/core/usb.h
index 05b5e17abf92..53318126ed91 100644
--- a/drivers/usb/core/usb.h
+++ b/drivers/usb/core/usb.h
@@ -45,7 +45,7 @@ static inline unsigned usb_get_max_power(struct usb_device *udev,
45 struct usb_host_config *c) 45 struct usb_host_config *c)
46{ 46{
47 /* SuperSpeed power is in 8 mA units; others are in 2 mA units */ 47 /* SuperSpeed power is in 8 mA units; others are in 2 mA units */
48 unsigned mul = (udev->speed == USB_SPEED_SUPER ? 8 : 2); 48 unsigned mul = (udev->speed >= USB_SPEED_SUPER ? 8 : 2);
49 49
50 return c->desc.bMaxPower * mul; 50 return c->desc.bMaxPower * mul;
51} 51}
diff --git a/drivers/usb/dwc2/Kconfig b/drivers/usb/dwc2/Kconfig
index f0decc0d69b5..c1f29caa8990 100644
--- a/drivers/usb/dwc2/Kconfig
+++ b/drivers/usb/dwc2/Kconfig
@@ -2,6 +2,7 @@ config USB_DWC2
2 tristate "DesignWare USB2 DRD Core Support" 2 tristate "DesignWare USB2 DRD Core Support"
3 depends on HAS_DMA 3 depends on HAS_DMA
4 depends on USB || USB_GADGET 4 depends on USB || USB_GADGET
5 depends on HAS_IOMEM
5 help 6 help
6 Say Y here if your system has a Dual Role Hi-Speed USB 7 Say Y here if your system has a Dual Role Hi-Speed USB
7 controller based on the DesignWare HSOTG IP Core. 8 controller based on the DesignWare HSOTG IP Core.
diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index 46c4ba75dc2a..4135a5ff67ca 100644
--- a/drivers/usb/dwc2/core.c
+++ b/drivers/usb/dwc2/core.c
@@ -56,189 +56,6 @@
56#include "core.h" 56#include "core.h"
57#include "hcd.h" 57#include "hcd.h"
58 58
59#if IS_ENABLED(CONFIG_USB_DWC2_HOST) || IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
60/**
61 * dwc2_backup_host_registers() - Backup controller host registers.
62 * When suspending usb bus, registers needs to be backuped
63 * if controller power is disabled once suspended.
64 *
65 * @hsotg: Programming view of the DWC_otg controller
66 */
67static int dwc2_backup_host_registers(struct dwc2_hsotg *hsotg)
68{
69 struct dwc2_hregs_backup *hr;
70 int i;
71
72 dev_dbg(hsotg->dev, "%s\n", __func__);
73
74 /* Backup Host regs */
75 hr = &hsotg->hr_backup;
76 hr->hcfg = dwc2_readl(hsotg->regs + HCFG);
77 hr->haintmsk = dwc2_readl(hsotg->regs + HAINTMSK);
78 for (i = 0; i < hsotg->core_params->host_channels; ++i)
79 hr->hcintmsk[i] = dwc2_readl(hsotg->regs + HCINTMSK(i));
80
81 hr->hprt0 = dwc2_read_hprt0(hsotg);
82 hr->hfir = dwc2_readl(hsotg->regs + HFIR);
83 hr->valid = true;
84
85 return 0;
86}
87
88/**
89 * dwc2_restore_host_registers() - Restore controller host registers.
90 * When resuming usb bus, device registers needs to be restored
91 * if controller power were disabled.
92 *
93 * @hsotg: Programming view of the DWC_otg controller
94 */
95static int dwc2_restore_host_registers(struct dwc2_hsotg *hsotg)
96{
97 struct dwc2_hregs_backup *hr;
98 int i;
99
100 dev_dbg(hsotg->dev, "%s\n", __func__);
101
102 /* Restore host regs */
103 hr = &hsotg->hr_backup;
104 if (!hr->valid) {
105 dev_err(hsotg->dev, "%s: no host registers to restore\n",
106 __func__);
107 return -EINVAL;
108 }
109 hr->valid = false;
110
111 dwc2_writel(hr->hcfg, hsotg->regs + HCFG);
112 dwc2_writel(hr->haintmsk, hsotg->regs + HAINTMSK);
113
114 for (i = 0; i < hsotg->core_params->host_channels; ++i)
115 dwc2_writel(hr->hcintmsk[i], hsotg->regs + HCINTMSK(i));
116
117 dwc2_writel(hr->hprt0, hsotg->regs + HPRT0);
118 dwc2_writel(hr->hfir, hsotg->regs + HFIR);
119 hsotg->frame_number = 0;
120
121 return 0;
122}
123#else
124static inline int dwc2_backup_host_registers(struct dwc2_hsotg *hsotg)
125{ return 0; }
126
127static inline int dwc2_restore_host_registers(struct dwc2_hsotg *hsotg)
128{ return 0; }
129#endif
130
131#if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \
132 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
133/**
134 * dwc2_backup_device_registers() - Backup controller device registers.
135 * When suspending usb bus, registers needs to be backuped
136 * if controller power is disabled once suspended.
137 *
138 * @hsotg: Programming view of the DWC_otg controller
139 */
140static int dwc2_backup_device_registers(struct dwc2_hsotg *hsotg)
141{
142 struct dwc2_dregs_backup *dr;
143 int i;
144
145 dev_dbg(hsotg->dev, "%s\n", __func__);
146
147 /* Backup dev regs */
148 dr = &hsotg->dr_backup;
149
150 dr->dcfg = dwc2_readl(hsotg->regs + DCFG);
151 dr->dctl = dwc2_readl(hsotg->regs + DCTL);
152 dr->daintmsk = dwc2_readl(hsotg->regs + DAINTMSK);
153 dr->diepmsk = dwc2_readl(hsotg->regs + DIEPMSK);
154 dr->doepmsk = dwc2_readl(hsotg->regs + DOEPMSK);
155
156 for (i = 0; i < hsotg->num_of_eps; i++) {
157 /* Backup IN EPs */
158 dr->diepctl[i] = dwc2_readl(hsotg->regs + DIEPCTL(i));
159
160 /* Ensure DATA PID is correctly configured */
161 if (dr->diepctl[i] & DXEPCTL_DPID)
162 dr->diepctl[i] |= DXEPCTL_SETD1PID;
163 else
164 dr->diepctl[i] |= DXEPCTL_SETD0PID;
165
166 dr->dieptsiz[i] = dwc2_readl(hsotg->regs + DIEPTSIZ(i));
167 dr->diepdma[i] = dwc2_readl(hsotg->regs + DIEPDMA(i));
168
169 /* Backup OUT EPs */
170 dr->doepctl[i] = dwc2_readl(hsotg->regs + DOEPCTL(i));
171
172 /* Ensure DATA PID is correctly configured */
173 if (dr->doepctl[i] & DXEPCTL_DPID)
174 dr->doepctl[i] |= DXEPCTL_SETD1PID;
175 else
176 dr->doepctl[i] |= DXEPCTL_SETD0PID;
177
178 dr->doeptsiz[i] = dwc2_readl(hsotg->regs + DOEPTSIZ(i));
179 dr->doepdma[i] = dwc2_readl(hsotg->regs + DOEPDMA(i));
180 }
181 dr->valid = true;
182 return 0;
183}
184
185/**
186 * dwc2_restore_device_registers() - Restore controller device registers.
187 * When resuming usb bus, device registers needs to be restored
188 * if controller power were disabled.
189 *
190 * @hsotg: Programming view of the DWC_otg controller
191 */
192static int dwc2_restore_device_registers(struct dwc2_hsotg *hsotg)
193{
194 struct dwc2_dregs_backup *dr;
195 u32 dctl;
196 int i;
197
198 dev_dbg(hsotg->dev, "%s\n", __func__);
199
200 /* Restore dev regs */
201 dr = &hsotg->dr_backup;
202 if (!dr->valid) {
203 dev_err(hsotg->dev, "%s: no device registers to restore\n",
204 __func__);
205 return -EINVAL;
206 }
207 dr->valid = false;
208
209 dwc2_writel(dr->dcfg, hsotg->regs + DCFG);
210 dwc2_writel(dr->dctl, hsotg->regs + DCTL);
211 dwc2_writel(dr->daintmsk, hsotg->regs + DAINTMSK);
212 dwc2_writel(dr->diepmsk, hsotg->regs + DIEPMSK);
213 dwc2_writel(dr->doepmsk, hsotg->regs + DOEPMSK);
214
215 for (i = 0; i < hsotg->num_of_eps; i++) {
216 /* Restore IN EPs */
217 dwc2_writel(dr->diepctl[i], hsotg->regs + DIEPCTL(i));
218 dwc2_writel(dr->dieptsiz[i], hsotg->regs + DIEPTSIZ(i));
219 dwc2_writel(dr->diepdma[i], hsotg->regs + DIEPDMA(i));
220
221 /* Restore OUT EPs */
222 dwc2_writel(dr->doepctl[i], hsotg->regs + DOEPCTL(i));
223 dwc2_writel(dr->doeptsiz[i], hsotg->regs + DOEPTSIZ(i));
224 dwc2_writel(dr->doepdma[i], hsotg->regs + DOEPDMA(i));
225 }
226
227 /* Set the Power-On Programming done bit */
228 dctl = dwc2_readl(hsotg->regs + DCTL);
229 dctl |= DCTL_PWRONPRGDONE;
230 dwc2_writel(dctl, hsotg->regs + DCTL);
231
232 return 0;
233}
234#else
235static inline int dwc2_backup_device_registers(struct dwc2_hsotg *hsotg)
236{ return 0; }
237
238static inline int dwc2_restore_device_registers(struct dwc2_hsotg *hsotg)
239{ return 0; }
240#endif
241
242/** 59/**
243 * dwc2_backup_global_registers() - Backup global controller registers. 60 * dwc2_backup_global_registers() - Backup global controller registers.
244 * When suspending usb bus, registers needs to be backuped 61 * When suspending usb bus, registers needs to be backuped
@@ -421,62 +238,6 @@ int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg)
421 return ret; 238 return ret;
422} 239}
423 240
424/**
425 * dwc2_enable_common_interrupts() - Initializes the commmon interrupts,
426 * used in both device and host modes
427 *
428 * @hsotg: Programming view of the DWC_otg controller
429 */
430static void dwc2_enable_common_interrupts(struct dwc2_hsotg *hsotg)
431{
432 u32 intmsk;
433
434 /* Clear any pending OTG Interrupts */
435 dwc2_writel(0xffffffff, hsotg->regs + GOTGINT);
436
437 /* Clear any pending interrupts */
438 dwc2_writel(0xffffffff, hsotg->regs + GINTSTS);
439
440 /* Enable the interrupts in the GINTMSK */
441 intmsk = GINTSTS_MODEMIS | GINTSTS_OTGINT;
442
443 if (hsotg->core_params->dma_enable <= 0)
444 intmsk |= GINTSTS_RXFLVL;
445 if (hsotg->core_params->external_id_pin_ctl <= 0)
446 intmsk |= GINTSTS_CONIDSTSCHNG;
447
448 intmsk |= GINTSTS_WKUPINT | GINTSTS_USBSUSP |
449 GINTSTS_SESSREQINT;
450
451 dwc2_writel(intmsk, hsotg->regs + GINTMSK);
452}
453
454/*
455 * Initializes the FSLSPClkSel field of the HCFG register depending on the
456 * PHY type
457 */
458static void dwc2_init_fs_ls_pclk_sel(struct dwc2_hsotg *hsotg)
459{
460 u32 hcfg, val;
461
462 if ((hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI &&
463 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED &&
464 hsotg->core_params->ulpi_fs_ls > 0) ||
465 hsotg->core_params->phy_type == DWC2_PHY_TYPE_PARAM_FS) {
466 /* Full speed PHY */
467 val = HCFG_FSLSPCLKSEL_48_MHZ;
468 } else {
469 /* High speed PHY running at full speed or high speed */
470 val = HCFG_FSLSPCLKSEL_30_60_MHZ;
471 }
472
473 dev_dbg(hsotg->dev, "Initializing HCFG.FSLSPClkSel to %08x\n", val);
474 hcfg = dwc2_readl(hsotg->regs + HCFG);
475 hcfg &= ~HCFG_FSLSPCLKSEL_MASK;
476 hcfg |= val << HCFG_FSLSPCLKSEL_SHIFT;
477 dwc2_writel(hcfg, hsotg->regs + HCFG);
478}
479
480/* 241/*
481 * Do core a soft reset of the core. Be careful with this because it 242 * Do core a soft reset of the core. Be careful with this because it
482 * resets all the internal state machines of the core. 243 * resets all the internal state machines of the core.
@@ -646,1644 +407,6 @@ int dwc2_core_reset_and_force_dr_mode(struct dwc2_hsotg *hsotg)
646 return 0; 407 return 0;
647} 408}
648 409
649static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
650{
651 u32 usbcfg, i2cctl;
652 int retval = 0;
653
654 /*
655 * core_init() is now called on every switch so only call the
656 * following for the first time through
657 */
658 if (select_phy) {
659 dev_dbg(hsotg->dev, "FS PHY selected\n");
660
661 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
662 if (!(usbcfg & GUSBCFG_PHYSEL)) {
663 usbcfg |= GUSBCFG_PHYSEL;
664 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
665
666 /* Reset after a PHY select */
667 retval = dwc2_core_reset_and_force_dr_mode(hsotg);
668
669 if (retval) {
670 dev_err(hsotg->dev,
671 "%s: Reset failed, aborting", __func__);
672 return retval;
673 }
674 }
675 }
676
677 /*
678 * Program DCFG.DevSpd or HCFG.FSLSPclkSel to 48Mhz in FS. Also
679 * do this on HNP Dev/Host mode switches (done in dev_init and
680 * host_init).
681 */
682 if (dwc2_is_host_mode(hsotg))
683 dwc2_init_fs_ls_pclk_sel(hsotg);
684
685 if (hsotg->core_params->i2c_enable > 0) {
686 dev_dbg(hsotg->dev, "FS PHY enabling I2C\n");
687
688 /* Program GUSBCFG.OtgUtmiFsSel to I2C */
689 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
690 usbcfg |= GUSBCFG_OTG_UTMI_FS_SEL;
691 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
692
693 /* Program GI2CCTL.I2CEn */
694 i2cctl = dwc2_readl(hsotg->regs + GI2CCTL);
695 i2cctl &= ~GI2CCTL_I2CDEVADDR_MASK;
696 i2cctl |= 1 << GI2CCTL_I2CDEVADDR_SHIFT;
697 i2cctl &= ~GI2CCTL_I2CEN;
698 dwc2_writel(i2cctl, hsotg->regs + GI2CCTL);
699 i2cctl |= GI2CCTL_I2CEN;
700 dwc2_writel(i2cctl, hsotg->regs + GI2CCTL);
701 }
702
703 return retval;
704}
705
706static int dwc2_hs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
707{
708 u32 usbcfg, usbcfg_old;
709 int retval = 0;
710
711 if (!select_phy)
712 return 0;
713
714 usbcfg = usbcfg_old = dwc2_readl(hsotg->regs + GUSBCFG);
715
716 /*
717 * HS PHY parameters. These parameters are preserved during soft reset
718 * so only program the first time. Do a soft reset immediately after
719 * setting phyif.
720 */
721 switch (hsotg->core_params->phy_type) {
722 case DWC2_PHY_TYPE_PARAM_ULPI:
723 /* ULPI interface */
724 dev_dbg(hsotg->dev, "HS ULPI PHY selected\n");
725 usbcfg |= GUSBCFG_ULPI_UTMI_SEL;
726 usbcfg &= ~(GUSBCFG_PHYIF16 | GUSBCFG_DDRSEL);
727 if (hsotg->core_params->phy_ulpi_ddr > 0)
728 usbcfg |= GUSBCFG_DDRSEL;
729 break;
730 case DWC2_PHY_TYPE_PARAM_UTMI:
731 /* UTMI+ interface */
732 dev_dbg(hsotg->dev, "HS UTMI+ PHY selected\n");
733 usbcfg &= ~(GUSBCFG_ULPI_UTMI_SEL | GUSBCFG_PHYIF16);
734 if (hsotg->core_params->phy_utmi_width == 16)
735 usbcfg |= GUSBCFG_PHYIF16;
736 break;
737 default:
738 dev_err(hsotg->dev, "FS PHY selected at HS!\n");
739 break;
740 }
741
742 if (usbcfg != usbcfg_old) {
743 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
744
745 /* Reset after setting the PHY parameters */
746 retval = dwc2_core_reset_and_force_dr_mode(hsotg);
747 if (retval) {
748 dev_err(hsotg->dev,
749 "%s: Reset failed, aborting", __func__);
750 return retval;
751 }
752 }
753
754 return retval;
755}
756
757static int dwc2_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
758{
759 u32 usbcfg;
760 int retval = 0;
761
762 if (hsotg->core_params->speed == DWC2_SPEED_PARAM_FULL &&
763 hsotg->core_params->phy_type == DWC2_PHY_TYPE_PARAM_FS) {
764 /* If FS mode with FS PHY */
765 retval = dwc2_fs_phy_init(hsotg, select_phy);
766 if (retval)
767 return retval;
768 } else {
769 /* High speed PHY */
770 retval = dwc2_hs_phy_init(hsotg, select_phy);
771 if (retval)
772 return retval;
773 }
774
775 if (hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI &&
776 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED &&
777 hsotg->core_params->ulpi_fs_ls > 0) {
778 dev_dbg(hsotg->dev, "Setting ULPI FSLS\n");
779 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
780 usbcfg |= GUSBCFG_ULPI_FS_LS;
781 usbcfg |= GUSBCFG_ULPI_CLK_SUSP_M;
782 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
783 } else {
784 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
785 usbcfg &= ~GUSBCFG_ULPI_FS_LS;
786 usbcfg &= ~GUSBCFG_ULPI_CLK_SUSP_M;
787 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
788 }
789
790 return retval;
791}
792
793static int dwc2_gahbcfg_init(struct dwc2_hsotg *hsotg)
794{
795 u32 ahbcfg = dwc2_readl(hsotg->regs + GAHBCFG);
796
797 switch (hsotg->hw_params.arch) {
798 case GHWCFG2_EXT_DMA_ARCH:
799 dev_err(hsotg->dev, "External DMA Mode not supported\n");
800 return -EINVAL;
801
802 case GHWCFG2_INT_DMA_ARCH:
803 dev_dbg(hsotg->dev, "Internal DMA Mode\n");
804 if (hsotg->core_params->ahbcfg != -1) {
805 ahbcfg &= GAHBCFG_CTRL_MASK;
806 ahbcfg |= hsotg->core_params->ahbcfg &
807 ~GAHBCFG_CTRL_MASK;
808 }
809 break;
810
811 case GHWCFG2_SLAVE_ONLY_ARCH:
812 default:
813 dev_dbg(hsotg->dev, "Slave Only Mode\n");
814 break;
815 }
816
817 dev_dbg(hsotg->dev, "dma_enable:%d dma_desc_enable:%d\n",
818 hsotg->core_params->dma_enable,
819 hsotg->core_params->dma_desc_enable);
820
821 if (hsotg->core_params->dma_enable > 0) {
822 if (hsotg->core_params->dma_desc_enable > 0)
823 dev_dbg(hsotg->dev, "Using Descriptor DMA mode\n");
824 else
825 dev_dbg(hsotg->dev, "Using Buffer DMA mode\n");
826 } else {
827 dev_dbg(hsotg->dev, "Using Slave mode\n");
828 hsotg->core_params->dma_desc_enable = 0;
829 }
830
831 if (hsotg->core_params->dma_enable > 0)
832 ahbcfg |= GAHBCFG_DMA_EN;
833
834 dwc2_writel(ahbcfg, hsotg->regs + GAHBCFG);
835
836 return 0;
837}
838
839static void dwc2_gusbcfg_init(struct dwc2_hsotg *hsotg)
840{
841 u32 usbcfg;
842
843 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
844 usbcfg &= ~(GUSBCFG_HNPCAP | GUSBCFG_SRPCAP);
845
846 switch (hsotg->hw_params.op_mode) {
847 case GHWCFG2_OP_MODE_HNP_SRP_CAPABLE:
848 if (hsotg->core_params->otg_cap ==
849 DWC2_CAP_PARAM_HNP_SRP_CAPABLE)
850 usbcfg |= GUSBCFG_HNPCAP;
851 if (hsotg->core_params->otg_cap !=
852 DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE)
853 usbcfg |= GUSBCFG_SRPCAP;
854 break;
855
856 case GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE:
857 case GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE:
858 case GHWCFG2_OP_MODE_SRP_CAPABLE_HOST:
859 if (hsotg->core_params->otg_cap !=
860 DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE)
861 usbcfg |= GUSBCFG_SRPCAP;
862 break;
863
864 case GHWCFG2_OP_MODE_NO_HNP_SRP_CAPABLE:
865 case GHWCFG2_OP_MODE_NO_SRP_CAPABLE_DEVICE:
866 case GHWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST:
867 default:
868 break;
869 }
870
871 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
872}
873
874/**
875 * dwc2_core_init() - Initializes the DWC_otg controller registers and
876 * prepares the core for device mode or host mode operation
877 *
878 * @hsotg: Programming view of the DWC_otg controller
879 * @initial_setup: If true then this is the first init for this instance.
880 */
881int dwc2_core_init(struct dwc2_hsotg *hsotg, bool initial_setup)
882{
883 u32 usbcfg, otgctl;
884 int retval;
885
886 dev_dbg(hsotg->dev, "%s(%p)\n", __func__, hsotg);
887
888 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
889
890 /* Set ULPI External VBUS bit if needed */
891 usbcfg &= ~GUSBCFG_ULPI_EXT_VBUS_DRV;
892 if (hsotg->core_params->phy_ulpi_ext_vbus ==
893 DWC2_PHY_ULPI_EXTERNAL_VBUS)
894 usbcfg |= GUSBCFG_ULPI_EXT_VBUS_DRV;
895
896 /* Set external TS Dline pulsing bit if needed */
897 usbcfg &= ~GUSBCFG_TERMSELDLPULSE;
898 if (hsotg->core_params->ts_dline > 0)
899 usbcfg |= GUSBCFG_TERMSELDLPULSE;
900
901 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
902
903 /*
904 * Reset the Controller
905 *
906 * We only need to reset the controller if this is a re-init.
907 * For the first init we know for sure that earlier code reset us (it
908 * needed to in order to properly detect various parameters).
909 */
910 if (!initial_setup) {
911 retval = dwc2_core_reset_and_force_dr_mode(hsotg);
912 if (retval) {
913 dev_err(hsotg->dev, "%s(): Reset failed, aborting\n",
914 __func__);
915 return retval;
916 }
917 }
918
919 /*
920 * This needs to happen in FS mode before any other programming occurs
921 */
922 retval = dwc2_phy_init(hsotg, initial_setup);
923 if (retval)
924 return retval;
925
926 /* Program the GAHBCFG Register */
927 retval = dwc2_gahbcfg_init(hsotg);
928 if (retval)
929 return retval;
930
931 /* Program the GUSBCFG register */
932 dwc2_gusbcfg_init(hsotg);
933
934 /* Program the GOTGCTL register */
935 otgctl = dwc2_readl(hsotg->regs + GOTGCTL);
936 otgctl &= ~GOTGCTL_OTGVER;
937 if (hsotg->core_params->otg_ver > 0)
938 otgctl |= GOTGCTL_OTGVER;
939 dwc2_writel(otgctl, hsotg->regs + GOTGCTL);
940 dev_dbg(hsotg->dev, "OTG VER PARAM: %d\n", hsotg->core_params->otg_ver);
941
942 /* Clear the SRP success bit for FS-I2c */
943 hsotg->srp_success = 0;
944
945 /* Enable common interrupts */
946 dwc2_enable_common_interrupts(hsotg);
947
948 /*
949 * Do device or host initialization based on mode during PCD and
950 * HCD initialization
951 */
952 if (dwc2_is_host_mode(hsotg)) {
953 dev_dbg(hsotg->dev, "Host Mode\n");
954 hsotg->op_state = OTG_STATE_A_HOST;
955 } else {
956 dev_dbg(hsotg->dev, "Device Mode\n");
957 hsotg->op_state = OTG_STATE_B_PERIPHERAL;
958 }
959
960 return 0;
961}
962
963/**
964 * dwc2_enable_host_interrupts() - Enables the Host mode interrupts
965 *
966 * @hsotg: Programming view of DWC_otg controller
967 */
968void dwc2_enable_host_interrupts(struct dwc2_hsotg *hsotg)
969{
970 u32 intmsk;
971
972 dev_dbg(hsotg->dev, "%s()\n", __func__);
973
974 /* Disable all interrupts */
975 dwc2_writel(0, hsotg->regs + GINTMSK);
976 dwc2_writel(0, hsotg->regs + HAINTMSK);
977
978 /* Enable the common interrupts */
979 dwc2_enable_common_interrupts(hsotg);
980
981 /* Enable host mode interrupts without disturbing common interrupts */
982 intmsk = dwc2_readl(hsotg->regs + GINTMSK);
983 intmsk |= GINTSTS_DISCONNINT | GINTSTS_PRTINT | GINTSTS_HCHINT;
984 dwc2_writel(intmsk, hsotg->regs + GINTMSK);
985}
986
987/**
988 * dwc2_disable_host_interrupts() - Disables the Host Mode interrupts
989 *
990 * @hsotg: Programming view of DWC_otg controller
991 */
992void dwc2_disable_host_interrupts(struct dwc2_hsotg *hsotg)
993{
994 u32 intmsk = dwc2_readl(hsotg->regs + GINTMSK);
995
996 /* Disable host mode interrupts without disturbing common interrupts */
997 intmsk &= ~(GINTSTS_SOF | GINTSTS_PRTINT | GINTSTS_HCHINT |
998 GINTSTS_PTXFEMP | GINTSTS_NPTXFEMP | GINTSTS_DISCONNINT);
999 dwc2_writel(intmsk, hsotg->regs + GINTMSK);
1000}
1001
1002/*
1003 * dwc2_calculate_dynamic_fifo() - Calculates the default fifo size
1004 * For system that have a total fifo depth that is smaller than the default
1005 * RX + TX fifo size.
1006 *
1007 * @hsotg: Programming view of DWC_otg controller
1008 */
1009static void dwc2_calculate_dynamic_fifo(struct dwc2_hsotg *hsotg)
1010{
1011 struct dwc2_core_params *params = hsotg->core_params;
1012 struct dwc2_hw_params *hw = &hsotg->hw_params;
1013 u32 rxfsiz, nptxfsiz, ptxfsiz, total_fifo_size;
1014
1015 total_fifo_size = hw->total_fifo_size;
1016 rxfsiz = params->host_rx_fifo_size;
1017 nptxfsiz = params->host_nperio_tx_fifo_size;
1018 ptxfsiz = params->host_perio_tx_fifo_size;
1019
1020 /*
1021 * Will use Method 2 defined in the DWC2 spec: minimum FIFO depth
1022 * allocation with support for high bandwidth endpoints. Synopsys
1023 * defines MPS(Max Packet size) for a periodic EP=1024, and for
1024 * non-periodic as 512.
1025 */
1026 if (total_fifo_size < (rxfsiz + nptxfsiz + ptxfsiz)) {
1027 /*
1028 * For Buffer DMA mode/Scatter Gather DMA mode
1029 * 2 * ((Largest Packet size / 4) + 1 + 1) + n
1030 * with n = number of host channel.
1031 * 2 * ((1024/4) + 2) = 516
1032 */
1033 rxfsiz = 516 + hw->host_channels;
1034
1035 /*
1036 * min non-periodic tx fifo depth
1037 * 2 * (largest non-periodic USB packet used / 4)
1038 * 2 * (512/4) = 256
1039 */
1040 nptxfsiz = 256;
1041
1042 /*
1043 * min periodic tx fifo depth
1044 * (largest packet size*MC)/4
1045 * (1024 * 3)/4 = 768
1046 */
1047 ptxfsiz = 768;
1048
1049 params->host_rx_fifo_size = rxfsiz;
1050 params->host_nperio_tx_fifo_size = nptxfsiz;
1051 params->host_perio_tx_fifo_size = ptxfsiz;
1052 }
1053
1054 /*
1055 * If the summation of RX, NPTX and PTX fifo sizes is still
1056 * bigger than the total_fifo_size, then we have a problem.
1057 *
1058 * We won't be able to allocate as many endpoints. Right now,
1059 * we're just printing an error message, but ideally this FIFO
1060 * allocation algorithm would be improved in the future.
1061 *
1062 * FIXME improve this FIFO allocation algorithm.
1063 */
1064 if (unlikely(total_fifo_size < (rxfsiz + nptxfsiz + ptxfsiz)))
1065 dev_err(hsotg->dev, "invalid fifo sizes\n");
1066}
1067
1068static void dwc2_config_fifos(struct dwc2_hsotg *hsotg)
1069{
1070 struct dwc2_core_params *params = hsotg->core_params;
1071 u32 nptxfsiz, hptxfsiz, dfifocfg, grxfsiz;
1072
1073 if (!params->enable_dynamic_fifo)
1074 return;
1075
1076 dwc2_calculate_dynamic_fifo(hsotg);
1077
1078 /* Rx FIFO */
1079 grxfsiz = dwc2_readl(hsotg->regs + GRXFSIZ);
1080 dev_dbg(hsotg->dev, "initial grxfsiz=%08x\n", grxfsiz);
1081 grxfsiz &= ~GRXFSIZ_DEPTH_MASK;
1082 grxfsiz |= params->host_rx_fifo_size <<
1083 GRXFSIZ_DEPTH_SHIFT & GRXFSIZ_DEPTH_MASK;
1084 dwc2_writel(grxfsiz, hsotg->regs + GRXFSIZ);
1085 dev_dbg(hsotg->dev, "new grxfsiz=%08x\n",
1086 dwc2_readl(hsotg->regs + GRXFSIZ));
1087
1088 /* Non-periodic Tx FIFO */
1089 dev_dbg(hsotg->dev, "initial gnptxfsiz=%08x\n",
1090 dwc2_readl(hsotg->regs + GNPTXFSIZ));
1091 nptxfsiz = params->host_nperio_tx_fifo_size <<
1092 FIFOSIZE_DEPTH_SHIFT & FIFOSIZE_DEPTH_MASK;
1093 nptxfsiz |= params->host_rx_fifo_size <<
1094 FIFOSIZE_STARTADDR_SHIFT & FIFOSIZE_STARTADDR_MASK;
1095 dwc2_writel(nptxfsiz, hsotg->regs + GNPTXFSIZ);
1096 dev_dbg(hsotg->dev, "new gnptxfsiz=%08x\n",
1097 dwc2_readl(hsotg->regs + GNPTXFSIZ));
1098
1099 /* Periodic Tx FIFO */
1100 dev_dbg(hsotg->dev, "initial hptxfsiz=%08x\n",
1101 dwc2_readl(hsotg->regs + HPTXFSIZ));
1102 hptxfsiz = params->host_perio_tx_fifo_size <<
1103 FIFOSIZE_DEPTH_SHIFT & FIFOSIZE_DEPTH_MASK;
1104 hptxfsiz |= (params->host_rx_fifo_size +
1105 params->host_nperio_tx_fifo_size) <<
1106 FIFOSIZE_STARTADDR_SHIFT & FIFOSIZE_STARTADDR_MASK;
1107 dwc2_writel(hptxfsiz, hsotg->regs + HPTXFSIZ);
1108 dev_dbg(hsotg->dev, "new hptxfsiz=%08x\n",
1109 dwc2_readl(hsotg->regs + HPTXFSIZ));
1110
1111 if (hsotg->core_params->en_multiple_tx_fifo > 0 &&
1112 hsotg->hw_params.snpsid <= DWC2_CORE_REV_2_94a) {
1113 /*
1114 * Global DFIFOCFG calculation for Host mode -
1115 * include RxFIFO, NPTXFIFO and HPTXFIFO
1116 */
1117 dfifocfg = dwc2_readl(hsotg->regs + GDFIFOCFG);
1118 dfifocfg &= ~GDFIFOCFG_EPINFOBASE_MASK;
1119 dfifocfg |= (params->host_rx_fifo_size +
1120 params->host_nperio_tx_fifo_size +
1121 params->host_perio_tx_fifo_size) <<
1122 GDFIFOCFG_EPINFOBASE_SHIFT &
1123 GDFIFOCFG_EPINFOBASE_MASK;
1124 dwc2_writel(dfifocfg, hsotg->regs + GDFIFOCFG);
1125 }
1126}
1127
1128/**
1129 * dwc2_core_host_init() - Initializes the DWC_otg controller registers for
1130 * Host mode
1131 *
1132 * @hsotg: Programming view of DWC_otg controller
1133 *
1134 * This function flushes the Tx and Rx FIFOs and flushes any entries in the
1135 * request queues. Host channels are reset to ensure that they are ready for
1136 * performing transfers.
1137 */
1138void dwc2_core_host_init(struct dwc2_hsotg *hsotg)
1139{
1140 u32 hcfg, hfir, otgctl;
1141
1142 dev_dbg(hsotg->dev, "%s(%p)\n", __func__, hsotg);
1143
1144 /* Restart the Phy Clock */
1145 dwc2_writel(0, hsotg->regs + PCGCTL);
1146
1147 /* Initialize Host Configuration Register */
1148 dwc2_init_fs_ls_pclk_sel(hsotg);
1149 if (hsotg->core_params->speed == DWC2_SPEED_PARAM_FULL) {
1150 hcfg = dwc2_readl(hsotg->regs + HCFG);
1151 hcfg |= HCFG_FSLSSUPP;
1152 dwc2_writel(hcfg, hsotg->regs + HCFG);
1153 }
1154
1155 /*
1156 * This bit allows dynamic reloading of the HFIR register during
1157 * runtime. This bit needs to be programmed during initial configuration
1158 * and its value must not be changed during runtime.
1159 */
1160 if (hsotg->core_params->reload_ctl > 0) {
1161 hfir = dwc2_readl(hsotg->regs + HFIR);
1162 hfir |= HFIR_RLDCTRL;
1163 dwc2_writel(hfir, hsotg->regs + HFIR);
1164 }
1165
1166 if (hsotg->core_params->dma_desc_enable > 0) {
1167 u32 op_mode = hsotg->hw_params.op_mode;
1168 if (hsotg->hw_params.snpsid < DWC2_CORE_REV_2_90a ||
1169 !hsotg->hw_params.dma_desc_enable ||
1170 op_mode == GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE ||
1171 op_mode == GHWCFG2_OP_MODE_NO_SRP_CAPABLE_DEVICE ||
1172 op_mode == GHWCFG2_OP_MODE_UNDEFINED) {
1173 dev_err(hsotg->dev,
1174 "Hardware does not support descriptor DMA mode -\n");
1175 dev_err(hsotg->dev,
1176 "falling back to buffer DMA mode.\n");
1177 hsotg->core_params->dma_desc_enable = 0;
1178 } else {
1179 hcfg = dwc2_readl(hsotg->regs + HCFG);
1180 hcfg |= HCFG_DESCDMA;
1181 dwc2_writel(hcfg, hsotg->regs + HCFG);
1182 }
1183 }
1184
1185 /* Configure data FIFO sizes */
1186 dwc2_config_fifos(hsotg);
1187
1188 /* TODO - check this */
1189 /* Clear Host Set HNP Enable in the OTG Control Register */
1190 otgctl = dwc2_readl(hsotg->regs + GOTGCTL);
1191 otgctl &= ~GOTGCTL_HSTSETHNPEN;
1192 dwc2_writel(otgctl, hsotg->regs + GOTGCTL);
1193
1194 /* Make sure the FIFOs are flushed */
1195 dwc2_flush_tx_fifo(hsotg, 0x10 /* all TX FIFOs */);
1196 dwc2_flush_rx_fifo(hsotg);
1197
1198 /* Clear Host Set HNP Enable in the OTG Control Register */
1199 otgctl = dwc2_readl(hsotg->regs + GOTGCTL);
1200 otgctl &= ~GOTGCTL_HSTSETHNPEN;
1201 dwc2_writel(otgctl, hsotg->regs + GOTGCTL);
1202
1203 if (hsotg->core_params->dma_desc_enable <= 0) {
1204 int num_channels, i;
1205 u32 hcchar;
1206
1207 /* Flush out any leftover queued requests */
1208 num_channels = hsotg->core_params->host_channels;
1209 for (i = 0; i < num_channels; i++) {
1210 hcchar = dwc2_readl(hsotg->regs + HCCHAR(i));
1211 hcchar &= ~HCCHAR_CHENA;
1212 hcchar |= HCCHAR_CHDIS;
1213 hcchar &= ~HCCHAR_EPDIR;
1214 dwc2_writel(hcchar, hsotg->regs + HCCHAR(i));
1215 }
1216
1217 /* Halt all channels to put them into a known state */
1218 for (i = 0; i < num_channels; i++) {
1219 int count = 0;
1220
1221 hcchar = dwc2_readl(hsotg->regs + HCCHAR(i));
1222 hcchar |= HCCHAR_CHENA | HCCHAR_CHDIS;
1223 hcchar &= ~HCCHAR_EPDIR;
1224 dwc2_writel(hcchar, hsotg->regs + HCCHAR(i));
1225 dev_dbg(hsotg->dev, "%s: Halt channel %d\n",
1226 __func__, i);
1227 do {
1228 hcchar = dwc2_readl(hsotg->regs + HCCHAR(i));
1229 if (++count > 1000) {
1230 dev_err(hsotg->dev,
1231 "Unable to clear enable on channel %d\n",
1232 i);
1233 break;
1234 }
1235 udelay(1);
1236 } while (hcchar & HCCHAR_CHENA);
1237 }
1238 }
1239
1240 /* Turn on the vbus power */
1241 dev_dbg(hsotg->dev, "Init: Port Power? op_state=%d\n", hsotg->op_state);
1242 if (hsotg->op_state == OTG_STATE_A_HOST) {
1243 u32 hprt0 = dwc2_read_hprt0(hsotg);
1244
1245 dev_dbg(hsotg->dev, "Init: Power Port (%d)\n",
1246 !!(hprt0 & HPRT0_PWR));
1247 if (!(hprt0 & HPRT0_PWR)) {
1248 hprt0 |= HPRT0_PWR;
1249 dwc2_writel(hprt0, hsotg->regs + HPRT0);
1250 }
1251 }
1252
1253 dwc2_enable_host_interrupts(hsotg);
1254}
1255
1256static void dwc2_hc_enable_slave_ints(struct dwc2_hsotg *hsotg,
1257 struct dwc2_host_chan *chan)
1258{
1259 u32 hcintmsk = HCINTMSK_CHHLTD;
1260
1261 switch (chan->ep_type) {
1262 case USB_ENDPOINT_XFER_CONTROL:
1263 case USB_ENDPOINT_XFER_BULK:
1264 dev_vdbg(hsotg->dev, "control/bulk\n");
1265 hcintmsk |= HCINTMSK_XFERCOMPL;
1266 hcintmsk |= HCINTMSK_STALL;
1267 hcintmsk |= HCINTMSK_XACTERR;
1268 hcintmsk |= HCINTMSK_DATATGLERR;
1269 if (chan->ep_is_in) {
1270 hcintmsk |= HCINTMSK_BBLERR;
1271 } else {
1272 hcintmsk |= HCINTMSK_NAK;
1273 hcintmsk |= HCINTMSK_NYET;
1274 if (chan->do_ping)
1275 hcintmsk |= HCINTMSK_ACK;
1276 }
1277
1278 if (chan->do_split) {
1279 hcintmsk |= HCINTMSK_NAK;
1280 if (chan->complete_split)
1281 hcintmsk |= HCINTMSK_NYET;
1282 else
1283 hcintmsk |= HCINTMSK_ACK;
1284 }
1285
1286 if (chan->error_state)
1287 hcintmsk |= HCINTMSK_ACK;
1288 break;
1289
1290 case USB_ENDPOINT_XFER_INT:
1291 if (dbg_perio())
1292 dev_vdbg(hsotg->dev, "intr\n");
1293 hcintmsk |= HCINTMSK_XFERCOMPL;
1294 hcintmsk |= HCINTMSK_NAK;
1295 hcintmsk |= HCINTMSK_STALL;
1296 hcintmsk |= HCINTMSK_XACTERR;
1297 hcintmsk |= HCINTMSK_DATATGLERR;
1298 hcintmsk |= HCINTMSK_FRMOVRUN;
1299
1300 if (chan->ep_is_in)
1301 hcintmsk |= HCINTMSK_BBLERR;
1302 if (chan->error_state)
1303 hcintmsk |= HCINTMSK_ACK;
1304 if (chan->do_split) {
1305 if (chan->complete_split)
1306 hcintmsk |= HCINTMSK_NYET;
1307 else
1308 hcintmsk |= HCINTMSK_ACK;
1309 }
1310 break;
1311
1312 case USB_ENDPOINT_XFER_ISOC:
1313 if (dbg_perio())
1314 dev_vdbg(hsotg->dev, "isoc\n");
1315 hcintmsk |= HCINTMSK_XFERCOMPL;
1316 hcintmsk |= HCINTMSK_FRMOVRUN;
1317 hcintmsk |= HCINTMSK_ACK;
1318
1319 if (chan->ep_is_in) {
1320 hcintmsk |= HCINTMSK_XACTERR;
1321 hcintmsk |= HCINTMSK_BBLERR;
1322 }
1323 break;
1324 default:
1325 dev_err(hsotg->dev, "## Unknown EP type ##\n");
1326 break;
1327 }
1328
1329 dwc2_writel(hcintmsk, hsotg->regs + HCINTMSK(chan->hc_num));
1330 if (dbg_hc(chan))
1331 dev_vdbg(hsotg->dev, "set HCINTMSK to %08x\n", hcintmsk);
1332}
1333
1334static void dwc2_hc_enable_dma_ints(struct dwc2_hsotg *hsotg,
1335 struct dwc2_host_chan *chan)
1336{
1337 u32 hcintmsk = HCINTMSK_CHHLTD;
1338
1339 /*
1340 * For Descriptor DMA mode core halts the channel on AHB error.
1341 * Interrupt is not required.
1342 */
1343 if (hsotg->core_params->dma_desc_enable <= 0) {
1344 if (dbg_hc(chan))
1345 dev_vdbg(hsotg->dev, "desc DMA disabled\n");
1346 hcintmsk |= HCINTMSK_AHBERR;
1347 } else {
1348 if (dbg_hc(chan))
1349 dev_vdbg(hsotg->dev, "desc DMA enabled\n");
1350 if (chan->ep_type == USB_ENDPOINT_XFER_ISOC)
1351 hcintmsk |= HCINTMSK_XFERCOMPL;
1352 }
1353
1354 if (chan->error_state && !chan->do_split &&
1355 chan->ep_type != USB_ENDPOINT_XFER_ISOC) {
1356 if (dbg_hc(chan))
1357 dev_vdbg(hsotg->dev, "setting ACK\n");
1358 hcintmsk |= HCINTMSK_ACK;
1359 if (chan->ep_is_in) {
1360 hcintmsk |= HCINTMSK_DATATGLERR;
1361 if (chan->ep_type != USB_ENDPOINT_XFER_INT)
1362 hcintmsk |= HCINTMSK_NAK;
1363 }
1364 }
1365
1366 dwc2_writel(hcintmsk, hsotg->regs + HCINTMSK(chan->hc_num));
1367 if (dbg_hc(chan))
1368 dev_vdbg(hsotg->dev, "set HCINTMSK to %08x\n", hcintmsk);
1369}
1370
1371static void dwc2_hc_enable_ints(struct dwc2_hsotg *hsotg,
1372 struct dwc2_host_chan *chan)
1373{
1374 u32 intmsk;
1375
1376 if (hsotg->core_params->dma_enable > 0) {
1377 if (dbg_hc(chan))
1378 dev_vdbg(hsotg->dev, "DMA enabled\n");
1379 dwc2_hc_enable_dma_ints(hsotg, chan);
1380 } else {
1381 if (dbg_hc(chan))
1382 dev_vdbg(hsotg->dev, "DMA disabled\n");
1383 dwc2_hc_enable_slave_ints(hsotg, chan);
1384 }
1385
1386 /* Enable the top level host channel interrupt */
1387 intmsk = dwc2_readl(hsotg->regs + HAINTMSK);
1388 intmsk |= 1 << chan->hc_num;
1389 dwc2_writel(intmsk, hsotg->regs + HAINTMSK);
1390 if (dbg_hc(chan))
1391 dev_vdbg(hsotg->dev, "set HAINTMSK to %08x\n", intmsk);
1392
1393 /* Make sure host channel interrupts are enabled */
1394 intmsk = dwc2_readl(hsotg->regs + GINTMSK);
1395 intmsk |= GINTSTS_HCHINT;
1396 dwc2_writel(intmsk, hsotg->regs + GINTMSK);
1397 if (dbg_hc(chan))
1398 dev_vdbg(hsotg->dev, "set GINTMSK to %08x\n", intmsk);
1399}
1400
1401/**
1402 * dwc2_hc_init() - Prepares a host channel for transferring packets to/from
1403 * a specific endpoint
1404 *
1405 * @hsotg: Programming view of DWC_otg controller
1406 * @chan: Information needed to initialize the host channel
1407 *
1408 * The HCCHARn register is set up with the characteristics specified in chan.
1409 * Host channel interrupts that may need to be serviced while this transfer is
1410 * in progress are enabled.
1411 */
1412void dwc2_hc_init(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan)
1413{
1414 u8 hc_num = chan->hc_num;
1415 u32 hcintmsk;
1416 u32 hcchar;
1417 u32 hcsplt = 0;
1418
1419 if (dbg_hc(chan))
1420 dev_vdbg(hsotg->dev, "%s()\n", __func__);
1421
1422 /* Clear old interrupt conditions for this host channel */
1423 hcintmsk = 0xffffffff;
1424 hcintmsk &= ~HCINTMSK_RESERVED14_31;
1425 dwc2_writel(hcintmsk, hsotg->regs + HCINT(hc_num));
1426
1427 /* Enable channel interrupts required for this transfer */
1428 dwc2_hc_enable_ints(hsotg, chan);
1429
1430 /*
1431 * Program the HCCHARn register with the endpoint characteristics for
1432 * the current transfer
1433 */
1434 hcchar = chan->dev_addr << HCCHAR_DEVADDR_SHIFT & HCCHAR_DEVADDR_MASK;
1435 hcchar |= chan->ep_num << HCCHAR_EPNUM_SHIFT & HCCHAR_EPNUM_MASK;
1436 if (chan->ep_is_in)
1437 hcchar |= HCCHAR_EPDIR;
1438 if (chan->speed == USB_SPEED_LOW)
1439 hcchar |= HCCHAR_LSPDDEV;
1440 hcchar |= chan->ep_type << HCCHAR_EPTYPE_SHIFT & HCCHAR_EPTYPE_MASK;
1441 hcchar |= chan->max_packet << HCCHAR_MPS_SHIFT & HCCHAR_MPS_MASK;
1442 dwc2_writel(hcchar, hsotg->regs + HCCHAR(hc_num));
1443 if (dbg_hc(chan)) {
1444 dev_vdbg(hsotg->dev, "set HCCHAR(%d) to %08x\n",
1445 hc_num, hcchar);
1446
1447 dev_vdbg(hsotg->dev, "%s: Channel %d\n",
1448 __func__, hc_num);
1449 dev_vdbg(hsotg->dev, " Dev Addr: %d\n",
1450 chan->dev_addr);
1451 dev_vdbg(hsotg->dev, " Ep Num: %d\n",
1452 chan->ep_num);
1453 dev_vdbg(hsotg->dev, " Is In: %d\n",
1454 chan->ep_is_in);
1455 dev_vdbg(hsotg->dev, " Is Low Speed: %d\n",
1456 chan->speed == USB_SPEED_LOW);
1457 dev_vdbg(hsotg->dev, " Ep Type: %d\n",
1458 chan->ep_type);
1459 dev_vdbg(hsotg->dev, " Max Pkt: %d\n",
1460 chan->max_packet);
1461 }
1462
1463 /* Program the HCSPLT register for SPLITs */
1464 if (chan->do_split) {
1465 if (dbg_hc(chan))
1466 dev_vdbg(hsotg->dev,
1467 "Programming HC %d with split --> %s\n",
1468 hc_num,
1469 chan->complete_split ? "CSPLIT" : "SSPLIT");
1470 if (chan->complete_split)
1471 hcsplt |= HCSPLT_COMPSPLT;
1472 hcsplt |= chan->xact_pos << HCSPLT_XACTPOS_SHIFT &
1473 HCSPLT_XACTPOS_MASK;
1474 hcsplt |= chan->hub_addr << HCSPLT_HUBADDR_SHIFT &
1475 HCSPLT_HUBADDR_MASK;
1476 hcsplt |= chan->hub_port << HCSPLT_PRTADDR_SHIFT &
1477 HCSPLT_PRTADDR_MASK;
1478 if (dbg_hc(chan)) {
1479 dev_vdbg(hsotg->dev, " comp split %d\n",
1480 chan->complete_split);
1481 dev_vdbg(hsotg->dev, " xact pos %d\n",
1482 chan->xact_pos);
1483 dev_vdbg(hsotg->dev, " hub addr %d\n",
1484 chan->hub_addr);
1485 dev_vdbg(hsotg->dev, " hub port %d\n",
1486 chan->hub_port);
1487 dev_vdbg(hsotg->dev, " is_in %d\n",
1488 chan->ep_is_in);
1489 dev_vdbg(hsotg->dev, " Max Pkt %d\n",
1490 chan->max_packet);
1491 dev_vdbg(hsotg->dev, " xferlen %d\n",
1492 chan->xfer_len);
1493 }
1494 }
1495
1496 dwc2_writel(hcsplt, hsotg->regs + HCSPLT(hc_num));
1497}
1498
1499/**
1500 * dwc2_hc_halt() - Attempts to halt a host channel
1501 *
1502 * @hsotg: Controller register interface
1503 * @chan: Host channel to halt
1504 * @halt_status: Reason for halting the channel
1505 *
1506 * This function should only be called in Slave mode or to abort a transfer in
1507 * either Slave mode or DMA mode. Under normal circumstances in DMA mode, the
1508 * controller halts the channel when the transfer is complete or a condition
1509 * occurs that requires application intervention.
1510 *
1511 * In slave mode, checks for a free request queue entry, then sets the Channel
1512 * Enable and Channel Disable bits of the Host Channel Characteristics
1513 * register of the specified channel to intiate the halt. If there is no free
1514 * request queue entry, sets only the Channel Disable bit of the HCCHARn
1515 * register to flush requests for this channel. In the latter case, sets a
1516 * flag to indicate that the host channel needs to be halted when a request
1517 * queue slot is open.
1518 *
1519 * In DMA mode, always sets the Channel Enable and Channel Disable bits of the
1520 * HCCHARn register. The controller ensures there is space in the request
1521 * queue before submitting the halt request.
1522 *
1523 * Some time may elapse before the core flushes any posted requests for this
1524 * host channel and halts. The Channel Halted interrupt handler completes the
1525 * deactivation of the host channel.
1526 */
1527void dwc2_hc_halt(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan,
1528 enum dwc2_halt_status halt_status)
1529{
1530 u32 nptxsts, hptxsts, hcchar;
1531
1532 if (dbg_hc(chan))
1533 dev_vdbg(hsotg->dev, "%s()\n", __func__);
1534 if (halt_status == DWC2_HC_XFER_NO_HALT_STATUS)
1535 dev_err(hsotg->dev, "!!! halt_status = %d !!!\n", halt_status);
1536
1537 if (halt_status == DWC2_HC_XFER_URB_DEQUEUE ||
1538 halt_status == DWC2_HC_XFER_AHB_ERR) {
1539 /*
1540 * Disable all channel interrupts except Ch Halted. The QTD
1541 * and QH state associated with this transfer has been cleared
1542 * (in the case of URB_DEQUEUE), so the channel needs to be
1543 * shut down carefully to prevent crashes.
1544 */
1545 u32 hcintmsk = HCINTMSK_CHHLTD;
1546
1547 dev_vdbg(hsotg->dev, "dequeue/error\n");
1548 dwc2_writel(hcintmsk, hsotg->regs + HCINTMSK(chan->hc_num));
1549
1550 /*
1551 * Make sure no other interrupts besides halt are currently
1552 * pending. Handling another interrupt could cause a crash due
1553 * to the QTD and QH state.
1554 */
1555 dwc2_writel(~hcintmsk, hsotg->regs + HCINT(chan->hc_num));
1556
1557 /*
1558 * Make sure the halt status is set to URB_DEQUEUE or AHB_ERR
1559 * even if the channel was already halted for some other
1560 * reason
1561 */
1562 chan->halt_status = halt_status;
1563
1564 hcchar = dwc2_readl(hsotg->regs + HCCHAR(chan->hc_num));
1565 if (!(hcchar & HCCHAR_CHENA)) {
1566 /*
1567 * The channel is either already halted or it hasn't
1568 * started yet. In DMA mode, the transfer may halt if
1569 * it finishes normally or a condition occurs that
1570 * requires driver intervention. Don't want to halt
1571 * the channel again. In either Slave or DMA mode,
1572 * it's possible that the transfer has been assigned
1573 * to a channel, but not started yet when an URB is
1574 * dequeued. Don't want to halt a channel that hasn't
1575 * started yet.
1576 */
1577 return;
1578 }
1579 }
1580 if (chan->halt_pending) {
1581 /*
1582 * A halt has already been issued for this channel. This might
1583 * happen when a transfer is aborted by a higher level in
1584 * the stack.
1585 */
1586 dev_vdbg(hsotg->dev,
1587 "*** %s: Channel %d, chan->halt_pending already set ***\n",
1588 __func__, chan->hc_num);
1589 return;
1590 }
1591
1592 hcchar = dwc2_readl(hsotg->regs + HCCHAR(chan->hc_num));
1593
1594 /* No need to set the bit in DDMA for disabling the channel */
1595 /* TODO check it everywhere channel is disabled */
1596 if (hsotg->core_params->dma_desc_enable <= 0) {
1597 if (dbg_hc(chan))
1598 dev_vdbg(hsotg->dev, "desc DMA disabled\n");
1599 hcchar |= HCCHAR_CHENA;
1600 } else {
1601 if (dbg_hc(chan))
1602 dev_dbg(hsotg->dev, "desc DMA enabled\n");
1603 }
1604 hcchar |= HCCHAR_CHDIS;
1605
1606 if (hsotg->core_params->dma_enable <= 0) {
1607 if (dbg_hc(chan))
1608 dev_vdbg(hsotg->dev, "DMA not enabled\n");
1609 hcchar |= HCCHAR_CHENA;
1610
1611 /* Check for space in the request queue to issue the halt */
1612 if (chan->ep_type == USB_ENDPOINT_XFER_CONTROL ||
1613 chan->ep_type == USB_ENDPOINT_XFER_BULK) {
1614 dev_vdbg(hsotg->dev, "control/bulk\n");
1615 nptxsts = dwc2_readl(hsotg->regs + GNPTXSTS);
1616 if ((nptxsts & TXSTS_QSPCAVAIL_MASK) == 0) {
1617 dev_vdbg(hsotg->dev, "Disabling channel\n");
1618 hcchar &= ~HCCHAR_CHENA;
1619 }
1620 } else {
1621 if (dbg_perio())
1622 dev_vdbg(hsotg->dev, "isoc/intr\n");
1623 hptxsts = dwc2_readl(hsotg->regs + HPTXSTS);
1624 if ((hptxsts & TXSTS_QSPCAVAIL_MASK) == 0 ||
1625 hsotg->queuing_high_bandwidth) {
1626 if (dbg_perio())
1627 dev_vdbg(hsotg->dev, "Disabling channel\n");
1628 hcchar &= ~HCCHAR_CHENA;
1629 }
1630 }
1631 } else {
1632 if (dbg_hc(chan))
1633 dev_vdbg(hsotg->dev, "DMA enabled\n");
1634 }
1635
1636 dwc2_writel(hcchar, hsotg->regs + HCCHAR(chan->hc_num));
1637 chan->halt_status = halt_status;
1638
1639 if (hcchar & HCCHAR_CHENA) {
1640 if (dbg_hc(chan))
1641 dev_vdbg(hsotg->dev, "Channel enabled\n");
1642 chan->halt_pending = 1;
1643 chan->halt_on_queue = 0;
1644 } else {
1645 if (dbg_hc(chan))
1646 dev_vdbg(hsotg->dev, "Channel disabled\n");
1647 chan->halt_on_queue = 1;
1648 }
1649
1650 if (dbg_hc(chan)) {
1651 dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,
1652 chan->hc_num);
1653 dev_vdbg(hsotg->dev, " hcchar: 0x%08x\n",
1654 hcchar);
1655 dev_vdbg(hsotg->dev, " halt_pending: %d\n",
1656 chan->halt_pending);
1657 dev_vdbg(hsotg->dev, " halt_on_queue: %d\n",
1658 chan->halt_on_queue);
1659 dev_vdbg(hsotg->dev, " halt_status: %d\n",
1660 chan->halt_status);
1661 }
1662}
1663
1664/**
1665 * dwc2_hc_cleanup() - Clears the transfer state for a host channel
1666 *
1667 * @hsotg: Programming view of DWC_otg controller
1668 * @chan: Identifies the host channel to clean up
1669 *
1670 * This function is normally called after a transfer is done and the host
1671 * channel is being released
1672 */
1673void dwc2_hc_cleanup(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan)
1674{
1675 u32 hcintmsk;
1676
1677 chan->xfer_started = 0;
1678
1679 /*
1680 * Clear channel interrupt enables and any unhandled channel interrupt
1681 * conditions
1682 */
1683 dwc2_writel(0, hsotg->regs + HCINTMSK(chan->hc_num));
1684 hcintmsk = 0xffffffff;
1685 hcintmsk &= ~HCINTMSK_RESERVED14_31;
1686 dwc2_writel(hcintmsk, hsotg->regs + HCINT(chan->hc_num));
1687}
1688
1689/**
1690 * dwc2_hc_set_even_odd_frame() - Sets the channel property that indicates in
1691 * which frame a periodic transfer should occur
1692 *
1693 * @hsotg: Programming view of DWC_otg controller
1694 * @chan: Identifies the host channel to set up and its properties
1695 * @hcchar: Current value of the HCCHAR register for the specified host channel
1696 *
1697 * This function has no effect on non-periodic transfers
1698 */
1699static void dwc2_hc_set_even_odd_frame(struct dwc2_hsotg *hsotg,
1700 struct dwc2_host_chan *chan, u32 *hcchar)
1701{
1702 if (chan->ep_type == USB_ENDPOINT_XFER_INT ||
1703 chan->ep_type == USB_ENDPOINT_XFER_ISOC) {
1704 /* 1 if _next_ frame is odd, 0 if it's even */
1705 if (!(dwc2_hcd_get_frame_number(hsotg) & 0x1))
1706 *hcchar |= HCCHAR_ODDFRM;
1707 }
1708}
1709
1710static void dwc2_set_pid_isoc(struct dwc2_host_chan *chan)
1711{
1712 /* Set up the initial PID for the transfer */
1713 if (chan->speed == USB_SPEED_HIGH) {
1714 if (chan->ep_is_in) {
1715 if (chan->multi_count == 1)
1716 chan->data_pid_start = DWC2_HC_PID_DATA0;
1717 else if (chan->multi_count == 2)
1718 chan->data_pid_start = DWC2_HC_PID_DATA1;
1719 else
1720 chan->data_pid_start = DWC2_HC_PID_DATA2;
1721 } else {
1722 if (chan->multi_count == 1)
1723 chan->data_pid_start = DWC2_HC_PID_DATA0;
1724 else
1725 chan->data_pid_start = DWC2_HC_PID_MDATA;
1726 }
1727 } else {
1728 chan->data_pid_start = DWC2_HC_PID_DATA0;
1729 }
1730}
1731
1732/**
1733 * dwc2_hc_write_packet() - Writes a packet into the Tx FIFO associated with
1734 * the Host Channel
1735 *
1736 * @hsotg: Programming view of DWC_otg controller
1737 * @chan: Information needed to initialize the host channel
1738 *
1739 * This function should only be called in Slave mode. For a channel associated
1740 * with a non-periodic EP, the non-periodic Tx FIFO is written. For a channel
1741 * associated with a periodic EP, the periodic Tx FIFO is written.
1742 *
1743 * Upon return the xfer_buf and xfer_count fields in chan are incremented by
1744 * the number of bytes written to the Tx FIFO.
1745 */
1746static void dwc2_hc_write_packet(struct dwc2_hsotg *hsotg,
1747 struct dwc2_host_chan *chan)
1748{
1749 u32 i;
1750 u32 remaining_count;
1751 u32 byte_count;
1752 u32 dword_count;
1753 u32 __iomem *data_fifo;
1754 u32 *data_buf = (u32 *)chan->xfer_buf;
1755
1756 if (dbg_hc(chan))
1757 dev_vdbg(hsotg->dev, "%s()\n", __func__);
1758
1759 data_fifo = (u32 __iomem *)(hsotg->regs + HCFIFO(chan->hc_num));
1760
1761 remaining_count = chan->xfer_len - chan->xfer_count;
1762 if (remaining_count > chan->max_packet)
1763 byte_count = chan->max_packet;
1764 else
1765 byte_count = remaining_count;
1766
1767 dword_count = (byte_count + 3) / 4;
1768
1769 if (((unsigned long)data_buf & 0x3) == 0) {
1770 /* xfer_buf is DWORD aligned */
1771 for (i = 0; i < dword_count; i++, data_buf++)
1772 dwc2_writel(*data_buf, data_fifo);
1773 } else {
1774 /* xfer_buf is not DWORD aligned */
1775 for (i = 0; i < dword_count; i++, data_buf++) {
1776 u32 data = data_buf[0] | data_buf[1] << 8 |
1777 data_buf[2] << 16 | data_buf[3] << 24;
1778 dwc2_writel(data, data_fifo);
1779 }
1780 }
1781
1782 chan->xfer_count += byte_count;
1783 chan->xfer_buf += byte_count;
1784}
1785
1786/**
1787 * dwc2_hc_start_transfer() - Does the setup for a data transfer for a host
1788 * channel and starts the transfer
1789 *
1790 * @hsotg: Programming view of DWC_otg controller
1791 * @chan: Information needed to initialize the host channel. The xfer_len value
1792 * may be reduced to accommodate the max widths of the XferSize and
1793 * PktCnt fields in the HCTSIZn register. The multi_count value may be
1794 * changed to reflect the final xfer_len value.
1795 *
1796 * This function may be called in either Slave mode or DMA mode. In Slave mode,
1797 * the caller must ensure that there is sufficient space in the request queue
1798 * and Tx Data FIFO.
1799 *
1800 * For an OUT transfer in Slave mode, it loads a data packet into the
1801 * appropriate FIFO. If necessary, additional data packets are loaded in the
1802 * Host ISR.
1803 *
1804 * For an IN transfer in Slave mode, a data packet is requested. The data
1805 * packets are unloaded from the Rx FIFO in the Host ISR. If necessary,
1806 * additional data packets are requested in the Host ISR.
1807 *
1808 * For a PING transfer in Slave mode, the Do Ping bit is set in the HCTSIZ
1809 * register along with a packet count of 1 and the channel is enabled. This
1810 * causes a single PING transaction to occur. Other fields in HCTSIZ are
1811 * simply set to 0 since no data transfer occurs in this case.
1812 *
1813 * For a PING transfer in DMA mode, the HCTSIZ register is initialized with
1814 * all the information required to perform the subsequent data transfer. In
1815 * addition, the Do Ping bit is set in the HCTSIZ register. In this case, the
1816 * controller performs the entire PING protocol, then starts the data
1817 * transfer.
1818 */
1819void dwc2_hc_start_transfer(struct dwc2_hsotg *hsotg,
1820 struct dwc2_host_chan *chan)
1821{
1822 u32 max_hc_xfer_size = hsotg->core_params->max_transfer_size;
1823 u16 max_hc_pkt_count = hsotg->core_params->max_packet_count;
1824 u32 hcchar;
1825 u32 hctsiz = 0;
1826 u16 num_packets;
1827 u32 ec_mc;
1828
1829 if (dbg_hc(chan))
1830 dev_vdbg(hsotg->dev, "%s()\n", __func__);
1831
1832 if (chan->do_ping) {
1833 if (hsotg->core_params->dma_enable <= 0) {
1834 if (dbg_hc(chan))
1835 dev_vdbg(hsotg->dev, "ping, no DMA\n");
1836 dwc2_hc_do_ping(hsotg, chan);
1837 chan->xfer_started = 1;
1838 return;
1839 } else {
1840 if (dbg_hc(chan))
1841 dev_vdbg(hsotg->dev, "ping, DMA\n");
1842 hctsiz |= TSIZ_DOPNG;
1843 }
1844 }
1845
1846 if (chan->do_split) {
1847 if (dbg_hc(chan))
1848 dev_vdbg(hsotg->dev, "split\n");
1849 num_packets = 1;
1850
1851 if (chan->complete_split && !chan->ep_is_in)
1852 /*
1853 * For CSPLIT OUT Transfer, set the size to 0 so the
1854 * core doesn't expect any data written to the FIFO
1855 */
1856 chan->xfer_len = 0;
1857 else if (chan->ep_is_in || chan->xfer_len > chan->max_packet)
1858 chan->xfer_len = chan->max_packet;
1859 else if (!chan->ep_is_in && chan->xfer_len > 188)
1860 chan->xfer_len = 188;
1861
1862 hctsiz |= chan->xfer_len << TSIZ_XFERSIZE_SHIFT &
1863 TSIZ_XFERSIZE_MASK;
1864
1865 /* For split set ec_mc for immediate retries */
1866 if (chan->ep_type == USB_ENDPOINT_XFER_INT ||
1867 chan->ep_type == USB_ENDPOINT_XFER_ISOC)
1868 ec_mc = 3;
1869 else
1870 ec_mc = 1;
1871 } else {
1872 if (dbg_hc(chan))
1873 dev_vdbg(hsotg->dev, "no split\n");
1874 /*
1875 * Ensure that the transfer length and packet count will fit
1876 * in the widths allocated for them in the HCTSIZn register
1877 */
1878 if (chan->ep_type == USB_ENDPOINT_XFER_INT ||
1879 chan->ep_type == USB_ENDPOINT_XFER_ISOC) {
1880 /*
1881 * Make sure the transfer size is no larger than one
1882 * (micro)frame's worth of data. (A check was done
1883 * when the periodic transfer was accepted to ensure
1884 * that a (micro)frame's worth of data can be
1885 * programmed into a channel.)
1886 */
1887 u32 max_periodic_len =
1888 chan->multi_count * chan->max_packet;
1889
1890 if (chan->xfer_len > max_periodic_len)
1891 chan->xfer_len = max_periodic_len;
1892 } else if (chan->xfer_len > max_hc_xfer_size) {
1893 /*
1894 * Make sure that xfer_len is a multiple of max packet
1895 * size
1896 */
1897 chan->xfer_len =
1898 max_hc_xfer_size - chan->max_packet + 1;
1899 }
1900
1901 if (chan->xfer_len > 0) {
1902 num_packets = (chan->xfer_len + chan->max_packet - 1) /
1903 chan->max_packet;
1904 if (num_packets > max_hc_pkt_count) {
1905 num_packets = max_hc_pkt_count;
1906 chan->xfer_len = num_packets * chan->max_packet;
1907 }
1908 } else {
1909 /* Need 1 packet for transfer length of 0 */
1910 num_packets = 1;
1911 }
1912
1913 if (chan->ep_is_in)
1914 /*
1915 * Always program an integral # of max packets for IN
1916 * transfers
1917 */
1918 chan->xfer_len = num_packets * chan->max_packet;
1919
1920 if (chan->ep_type == USB_ENDPOINT_XFER_INT ||
1921 chan->ep_type == USB_ENDPOINT_XFER_ISOC)
1922 /*
1923 * Make sure that the multi_count field matches the
1924 * actual transfer length
1925 */
1926 chan->multi_count = num_packets;
1927
1928 if (chan->ep_type == USB_ENDPOINT_XFER_ISOC)
1929 dwc2_set_pid_isoc(chan);
1930
1931 hctsiz |= chan->xfer_len << TSIZ_XFERSIZE_SHIFT &
1932 TSIZ_XFERSIZE_MASK;
1933
1934 /* The ec_mc gets the multi_count for non-split */
1935 ec_mc = chan->multi_count;
1936 }
1937
1938 chan->start_pkt_count = num_packets;
1939 hctsiz |= num_packets << TSIZ_PKTCNT_SHIFT & TSIZ_PKTCNT_MASK;
1940 hctsiz |= chan->data_pid_start << TSIZ_SC_MC_PID_SHIFT &
1941 TSIZ_SC_MC_PID_MASK;
1942 dwc2_writel(hctsiz, hsotg->regs + HCTSIZ(chan->hc_num));
1943 if (dbg_hc(chan)) {
1944 dev_vdbg(hsotg->dev, "Wrote %08x to HCTSIZ(%d)\n",
1945 hctsiz, chan->hc_num);
1946
1947 dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,
1948 chan->hc_num);
1949 dev_vdbg(hsotg->dev, " Xfer Size: %d\n",
1950 (hctsiz & TSIZ_XFERSIZE_MASK) >>
1951 TSIZ_XFERSIZE_SHIFT);
1952 dev_vdbg(hsotg->dev, " Num Pkts: %d\n",
1953 (hctsiz & TSIZ_PKTCNT_MASK) >>
1954 TSIZ_PKTCNT_SHIFT);
1955 dev_vdbg(hsotg->dev, " Start PID: %d\n",
1956 (hctsiz & TSIZ_SC_MC_PID_MASK) >>
1957 TSIZ_SC_MC_PID_SHIFT);
1958 }
1959
1960 if (hsotg->core_params->dma_enable > 0) {
1961 dma_addr_t dma_addr;
1962
1963 if (chan->align_buf) {
1964 if (dbg_hc(chan))
1965 dev_vdbg(hsotg->dev, "align_buf\n");
1966 dma_addr = chan->align_buf;
1967 } else {
1968 dma_addr = chan->xfer_dma;
1969 }
1970 dwc2_writel((u32)dma_addr, hsotg->regs + HCDMA(chan->hc_num));
1971 if (dbg_hc(chan))
1972 dev_vdbg(hsotg->dev, "Wrote %08lx to HCDMA(%d)\n",
1973 (unsigned long)dma_addr, chan->hc_num);
1974 }
1975
1976 /* Start the split */
1977 if (chan->do_split) {
1978 u32 hcsplt = dwc2_readl(hsotg->regs + HCSPLT(chan->hc_num));
1979
1980 hcsplt |= HCSPLT_SPLTENA;
1981 dwc2_writel(hcsplt, hsotg->regs + HCSPLT(chan->hc_num));
1982 }
1983
1984 hcchar = dwc2_readl(hsotg->regs + HCCHAR(chan->hc_num));
1985 hcchar &= ~HCCHAR_MULTICNT_MASK;
1986 hcchar |= (ec_mc << HCCHAR_MULTICNT_SHIFT) & HCCHAR_MULTICNT_MASK;
1987 dwc2_hc_set_even_odd_frame(hsotg, chan, &hcchar);
1988
1989 if (hcchar & HCCHAR_CHDIS)
1990 dev_warn(hsotg->dev,
1991 "%s: chdis set, channel %d, hcchar 0x%08x\n",
1992 __func__, chan->hc_num, hcchar);
1993
1994 /* Set host channel enable after all other setup is complete */
1995 hcchar |= HCCHAR_CHENA;
1996 hcchar &= ~HCCHAR_CHDIS;
1997
1998 if (dbg_hc(chan))
1999 dev_vdbg(hsotg->dev, " Multi Cnt: %d\n",
2000 (hcchar & HCCHAR_MULTICNT_MASK) >>
2001 HCCHAR_MULTICNT_SHIFT);
2002
2003 dwc2_writel(hcchar, hsotg->regs + HCCHAR(chan->hc_num));
2004 if (dbg_hc(chan))
2005 dev_vdbg(hsotg->dev, "Wrote %08x to HCCHAR(%d)\n", hcchar,
2006 chan->hc_num);
2007
2008 chan->xfer_started = 1;
2009 chan->requests++;
2010
2011 if (hsotg->core_params->dma_enable <= 0 &&
2012 !chan->ep_is_in && chan->xfer_len > 0)
2013 /* Load OUT packet into the appropriate Tx FIFO */
2014 dwc2_hc_write_packet(hsotg, chan);
2015}
2016
2017/**
2018 * dwc2_hc_start_transfer_ddma() - Does the setup for a data transfer for a
2019 * host channel and starts the transfer in Descriptor DMA mode
2020 *
2021 * @hsotg: Programming view of DWC_otg controller
2022 * @chan: Information needed to initialize the host channel
2023 *
2024 * Initializes HCTSIZ register. For a PING transfer the Do Ping bit is set.
2025 * Sets PID and NTD values. For periodic transfers initializes SCHED_INFO field
2026 * with micro-frame bitmap.
2027 *
2028 * Initializes HCDMA register with descriptor list address and CTD value then
2029 * starts the transfer via enabling the channel.
2030 */
2031void dwc2_hc_start_transfer_ddma(struct dwc2_hsotg *hsotg,
2032 struct dwc2_host_chan *chan)
2033{
2034 u32 hcchar;
2035 u32 hctsiz = 0;
2036
2037 if (chan->do_ping)
2038 hctsiz |= TSIZ_DOPNG;
2039
2040 if (chan->ep_type == USB_ENDPOINT_XFER_ISOC)
2041 dwc2_set_pid_isoc(chan);
2042
2043 /* Packet Count and Xfer Size are not used in Descriptor DMA mode */
2044 hctsiz |= chan->data_pid_start << TSIZ_SC_MC_PID_SHIFT &
2045 TSIZ_SC_MC_PID_MASK;
2046
2047 /* 0 - 1 descriptor, 1 - 2 descriptors, etc */
2048 hctsiz |= (chan->ntd - 1) << TSIZ_NTD_SHIFT & TSIZ_NTD_MASK;
2049
2050 /* Non-zero only for high-speed interrupt endpoints */
2051 hctsiz |= chan->schinfo << TSIZ_SCHINFO_SHIFT & TSIZ_SCHINFO_MASK;
2052
2053 if (dbg_hc(chan)) {
2054 dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,
2055 chan->hc_num);
2056 dev_vdbg(hsotg->dev, " Start PID: %d\n",
2057 chan->data_pid_start);
2058 dev_vdbg(hsotg->dev, " NTD: %d\n", chan->ntd - 1);
2059 }
2060
2061 dwc2_writel(hctsiz, hsotg->regs + HCTSIZ(chan->hc_num));
2062
2063 dma_sync_single_for_device(hsotg->dev, chan->desc_list_addr,
2064 chan->desc_list_sz, DMA_TO_DEVICE);
2065
2066 dwc2_writel(chan->desc_list_addr, hsotg->regs + HCDMA(chan->hc_num));
2067
2068 if (dbg_hc(chan))
2069 dev_vdbg(hsotg->dev, "Wrote %pad to HCDMA(%d)\n",
2070 &chan->desc_list_addr, chan->hc_num);
2071
2072 hcchar = dwc2_readl(hsotg->regs + HCCHAR(chan->hc_num));
2073 hcchar &= ~HCCHAR_MULTICNT_MASK;
2074 hcchar |= chan->multi_count << HCCHAR_MULTICNT_SHIFT &
2075 HCCHAR_MULTICNT_MASK;
2076
2077 if (hcchar & HCCHAR_CHDIS)
2078 dev_warn(hsotg->dev,
2079 "%s: chdis set, channel %d, hcchar 0x%08x\n",
2080 __func__, chan->hc_num, hcchar);
2081
2082 /* Set host channel enable after all other setup is complete */
2083 hcchar |= HCCHAR_CHENA;
2084 hcchar &= ~HCCHAR_CHDIS;
2085
2086 if (dbg_hc(chan))
2087 dev_vdbg(hsotg->dev, " Multi Cnt: %d\n",
2088 (hcchar & HCCHAR_MULTICNT_MASK) >>
2089 HCCHAR_MULTICNT_SHIFT);
2090
2091 dwc2_writel(hcchar, hsotg->regs + HCCHAR(chan->hc_num));
2092 if (dbg_hc(chan))
2093 dev_vdbg(hsotg->dev, "Wrote %08x to HCCHAR(%d)\n", hcchar,
2094 chan->hc_num);
2095
2096 chan->xfer_started = 1;
2097 chan->requests++;
2098}
2099
2100/**
2101 * dwc2_hc_continue_transfer() - Continues a data transfer that was started by
2102 * a previous call to dwc2_hc_start_transfer()
2103 *
2104 * @hsotg: Programming view of DWC_otg controller
2105 * @chan: Information needed to initialize the host channel
2106 *
2107 * The caller must ensure there is sufficient space in the request queue and Tx
2108 * Data FIFO. This function should only be called in Slave mode. In DMA mode,
2109 * the controller acts autonomously to complete transfers programmed to a host
2110 * channel.
2111 *
2112 * For an OUT transfer, a new data packet is loaded into the appropriate FIFO
2113 * if there is any data remaining to be queued. For an IN transfer, another
2114 * data packet is always requested. For the SETUP phase of a control transfer,
2115 * this function does nothing.
2116 *
2117 * Return: 1 if a new request is queued, 0 if no more requests are required
2118 * for this transfer
2119 */
2120int dwc2_hc_continue_transfer(struct dwc2_hsotg *hsotg,
2121 struct dwc2_host_chan *chan)
2122{
2123 if (dbg_hc(chan))
2124 dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,
2125 chan->hc_num);
2126
2127 if (chan->do_split)
2128 /* SPLITs always queue just once per channel */
2129 return 0;
2130
2131 if (chan->data_pid_start == DWC2_HC_PID_SETUP)
2132 /* SETUPs are queued only once since they can't be NAK'd */
2133 return 0;
2134
2135 if (chan->ep_is_in) {
2136 /*
2137 * Always queue another request for other IN transfers. If
2138 * back-to-back INs are issued and NAKs are received for both,
2139 * the driver may still be processing the first NAK when the
2140 * second NAK is received. When the interrupt handler clears
2141 * the NAK interrupt for the first NAK, the second NAK will
2142 * not be seen. So we can't depend on the NAK interrupt
2143 * handler to requeue a NAK'd request. Instead, IN requests
2144 * are issued each time this function is called. When the
2145 * transfer completes, the extra requests for the channel will
2146 * be flushed.
2147 */
2148 u32 hcchar = dwc2_readl(hsotg->regs + HCCHAR(chan->hc_num));
2149
2150 dwc2_hc_set_even_odd_frame(hsotg, chan, &hcchar);
2151 hcchar |= HCCHAR_CHENA;
2152 hcchar &= ~HCCHAR_CHDIS;
2153 if (dbg_hc(chan))
2154 dev_vdbg(hsotg->dev, " IN xfer: hcchar = 0x%08x\n",
2155 hcchar);
2156 dwc2_writel(hcchar, hsotg->regs + HCCHAR(chan->hc_num));
2157 chan->requests++;
2158 return 1;
2159 }
2160
2161 /* OUT transfers */
2162
2163 if (chan->xfer_count < chan->xfer_len) {
2164 if (chan->ep_type == USB_ENDPOINT_XFER_INT ||
2165 chan->ep_type == USB_ENDPOINT_XFER_ISOC) {
2166 u32 hcchar = dwc2_readl(hsotg->regs +
2167 HCCHAR(chan->hc_num));
2168
2169 dwc2_hc_set_even_odd_frame(hsotg, chan,
2170 &hcchar);
2171 }
2172
2173 /* Load OUT packet into the appropriate Tx FIFO */
2174 dwc2_hc_write_packet(hsotg, chan);
2175 chan->requests++;
2176 return 1;
2177 }
2178
2179 return 0;
2180}
2181
2182/**
2183 * dwc2_hc_do_ping() - Starts a PING transfer
2184 *
2185 * @hsotg: Programming view of DWC_otg controller
2186 * @chan: Information needed to initialize the host channel
2187 *
2188 * This function should only be called in Slave mode. The Do Ping bit is set in
2189 * the HCTSIZ register, then the channel is enabled.
2190 */
2191void dwc2_hc_do_ping(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan)
2192{
2193 u32 hcchar;
2194 u32 hctsiz;
2195
2196 if (dbg_hc(chan))
2197 dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,
2198 chan->hc_num);
2199
2200
2201 hctsiz = TSIZ_DOPNG;
2202 hctsiz |= 1 << TSIZ_PKTCNT_SHIFT;
2203 dwc2_writel(hctsiz, hsotg->regs + HCTSIZ(chan->hc_num));
2204
2205 hcchar = dwc2_readl(hsotg->regs + HCCHAR(chan->hc_num));
2206 hcchar |= HCCHAR_CHENA;
2207 hcchar &= ~HCCHAR_CHDIS;
2208 dwc2_writel(hcchar, hsotg->regs + HCCHAR(chan->hc_num));
2209}
2210
2211/**
2212 * dwc2_calc_frame_interval() - Calculates the correct frame Interval value for
2213 * the HFIR register according to PHY type and speed
2214 *
2215 * @hsotg: Programming view of DWC_otg controller
2216 *
2217 * NOTE: The caller can modify the value of the HFIR register only after the
2218 * Port Enable bit of the Host Port Control and Status register (HPRT.EnaPort)
2219 * has been set
2220 */
2221u32 dwc2_calc_frame_interval(struct dwc2_hsotg *hsotg)
2222{
2223 u32 usbcfg;
2224 u32 hprt0;
2225 int clock = 60; /* default value */
2226
2227 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
2228 hprt0 = dwc2_readl(hsotg->regs + HPRT0);
2229
2230 if (!(usbcfg & GUSBCFG_PHYSEL) && (usbcfg & GUSBCFG_ULPI_UTMI_SEL) &&
2231 !(usbcfg & GUSBCFG_PHYIF16))
2232 clock = 60;
2233 if ((usbcfg & GUSBCFG_PHYSEL) && hsotg->hw_params.fs_phy_type ==
2234 GHWCFG2_FS_PHY_TYPE_SHARED_ULPI)
2235 clock = 48;
2236 if (!(usbcfg & GUSBCFG_PHY_LP_CLK_SEL) && !(usbcfg & GUSBCFG_PHYSEL) &&
2237 !(usbcfg & GUSBCFG_ULPI_UTMI_SEL) && (usbcfg & GUSBCFG_PHYIF16))
2238 clock = 30;
2239 if (!(usbcfg & GUSBCFG_PHY_LP_CLK_SEL) && !(usbcfg & GUSBCFG_PHYSEL) &&
2240 !(usbcfg & GUSBCFG_ULPI_UTMI_SEL) && !(usbcfg & GUSBCFG_PHYIF16))
2241 clock = 60;
2242 if ((usbcfg & GUSBCFG_PHY_LP_CLK_SEL) && !(usbcfg & GUSBCFG_PHYSEL) &&
2243 !(usbcfg & GUSBCFG_ULPI_UTMI_SEL) && (usbcfg & GUSBCFG_PHYIF16))
2244 clock = 48;
2245 if ((usbcfg & GUSBCFG_PHYSEL) && !(usbcfg & GUSBCFG_PHYIF16) &&
2246 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_SHARED_UTMI)
2247 clock = 48;
2248 if ((usbcfg & GUSBCFG_PHYSEL) &&
2249 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED)
2250 clock = 48;
2251
2252 if ((hprt0 & HPRT0_SPD_MASK) >> HPRT0_SPD_SHIFT == HPRT0_SPD_HIGH_SPEED)
2253 /* High speed case */
2254 return 125 * clock;
2255 else
2256 /* FS/LS case */
2257 return 1000 * clock;
2258}
2259
2260/**
2261 * dwc2_read_packet() - Reads a packet from the Rx FIFO into the destination
2262 * buffer
2263 *
2264 * @core_if: Programming view of DWC_otg controller
2265 * @dest: Destination buffer for the packet
2266 * @bytes: Number of bytes to copy to the destination
2267 */
2268void dwc2_read_packet(struct dwc2_hsotg *hsotg, u8 *dest, u16 bytes)
2269{
2270 u32 __iomem *fifo = hsotg->regs + HCFIFO(0);
2271 u32 *data_buf = (u32 *)dest;
2272 int word_count = (bytes + 3) / 4;
2273 int i;
2274
2275 /*
2276 * Todo: Account for the case where dest is not dword aligned. This
2277 * requires reading data from the FIFO into a u32 temp buffer, then
2278 * moving it into the data buffer.
2279 */
2280
2281 dev_vdbg(hsotg->dev, "%s(%p,%p,%d)\n", __func__, hsotg, dest, bytes);
2282
2283 for (i = 0; i < word_count; i++, data_buf++)
2284 *data_buf = dwc2_readl(fifo);
2285}
2286
2287/** 410/**
2288 * dwc2_dump_host_registers() - Prints the host registers 411 * dwc2_dump_host_registers() - Prints the host registers
2289 * 412 *
@@ -3355,13 +1478,6 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
3355 width = (hwcfg3 & GHWCFG3_XFER_SIZE_CNTR_WIDTH_MASK) >> 1478 width = (hwcfg3 & GHWCFG3_XFER_SIZE_CNTR_WIDTH_MASK) >>
3356 GHWCFG3_XFER_SIZE_CNTR_WIDTH_SHIFT; 1479 GHWCFG3_XFER_SIZE_CNTR_WIDTH_SHIFT;
3357 hw->max_transfer_size = (1 << (width + 11)) - 1; 1480 hw->max_transfer_size = (1 << (width + 11)) - 1;
3358 /*
3359 * Clip max_transfer_size to 65535. dwc2_hc_setup_align_buf() allocates
3360 * coherent buffers with this size, and if it's too large we can
3361 * exhaust the coherent DMA pool.
3362 */
3363 if (hw->max_transfer_size > 65535)
3364 hw->max_transfer_size = 65535;
3365 width = (hwcfg3 & GHWCFG3_PACKET_SIZE_CNTR_WIDTH_MASK) >> 1481 width = (hwcfg3 & GHWCFG3_PACKET_SIZE_CNTR_WIDTH_MASK) >>
3366 GHWCFG3_PACKET_SIZE_CNTR_WIDTH_SHIFT; 1482 GHWCFG3_PACKET_SIZE_CNTR_WIDTH_SHIFT;
3367 hw->max_packet_count = (1 << (width + 4)) - 1; 1483 hw->max_packet_count = (1 << (width + 4)) - 1;
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 7fb6434f4639..3c58d633ce80 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -44,6 +44,26 @@
44#include <linux/usb/phy.h> 44#include <linux/usb/phy.h>
45#include "hw.h" 45#include "hw.h"
46 46
47/*
48 * Suggested defines for tracers:
49 * - no_printk: Disable tracing
50 * - pr_info: Print this info to the console
51 * - trace_printk: Print this info to trace buffer (good for verbose logging)
52 */
53
54#define DWC2_TRACE_SCHEDULER no_printk
55#define DWC2_TRACE_SCHEDULER_VB no_printk
56
57/* Detailed scheduler tracing, but won't overwhelm console */
58#define dwc2_sch_dbg(hsotg, fmt, ...) \
59 DWC2_TRACE_SCHEDULER(pr_fmt("%s: SCH: " fmt), \
60 dev_name(hsotg->dev), ##__VA_ARGS__)
61
62/* Verbose scheduler tracing */
63#define dwc2_sch_vdbg(hsotg, fmt, ...) \
64 DWC2_TRACE_SCHEDULER_VB(pr_fmt("%s: SCH: " fmt), \
65 dev_name(hsotg->dev), ##__VA_ARGS__)
66
47static inline u32 dwc2_readl(const void __iomem *addr) 67static inline u32 dwc2_readl(const void __iomem *addr)
48{ 68{
49 u32 value = __raw_readl(addr); 69 u32 value = __raw_readl(addr);
@@ -572,6 +592,84 @@ struct dwc2_hregs_backup {
572 bool valid; 592 bool valid;
573}; 593};
574 594
595/*
596 * Constants related to high speed periodic scheduling
597 *
598 * We have a periodic schedule that is DWC2_HS_SCHEDULE_UFRAMES long. From a
599 * reservation point of view it's assumed that the schedule goes right back to
600 * the beginning after the end of the schedule.
601 *
602 * What does that mean for scheduling things with a long interval? It means
603 * we'll reserve time for them in every possible microframe that they could
604 * ever be scheduled in. ...but we'll still only actually schedule them as
605 * often as they were requested.
606 *
607 * We keep our schedule in a "bitmap" structure. This simplifies having
608 * to keep track of and merge intervals: we just let the bitmap code do most
609 * of the heavy lifting. In a way scheduling is much like memory allocation.
610 *
611 * We schedule 100us per uframe or 80% of 125us (the maximum amount you're
612 * supposed to schedule for periodic transfers). That's according to spec.
613 *
614 * Note that though we only schedule 80% of each microframe, the bitmap that we
615 * keep the schedule in is tightly packed (AKA it doesn't have 100us worth of
616 * space for each uFrame).
617 *
618 * Requirements:
619 * - DWC2_HS_SCHEDULE_UFRAMES must even divide 0x4000 (HFNUM_MAX_FRNUM + 1)
620 * - DWC2_HS_SCHEDULE_UFRAMES must be 8 times DWC2_LS_SCHEDULE_FRAMES (probably
621 * could be any multiple of 8 times DWC2_LS_SCHEDULE_FRAMES, but there might
622 * be bugs). The 8 comes from the USB spec: number of microframes per frame.
623 */
624#define DWC2_US_PER_UFRAME 125
625#define DWC2_HS_PERIODIC_US_PER_UFRAME 100
626
627#define DWC2_HS_SCHEDULE_UFRAMES 8
628#define DWC2_HS_SCHEDULE_US (DWC2_HS_SCHEDULE_UFRAMES * \
629 DWC2_HS_PERIODIC_US_PER_UFRAME)
630
631/*
632 * Constants related to low speed scheduling
633 *
634 * For high speed we schedule every 1us. For low speed that's a bit overkill,
635 * so we make up a unit called a "slice" that's worth 25us. There are 40
636 * slices in a full frame and we can schedule 36 of those (90%) for periodic
637 * transfers.
638 *
639 * Our low speed schedule can be as short as 1 frame or could be longer. When
640 * we only schedule 1 frame it means that we'll need to reserve a time every
641 * frame even for things that only transfer very rarely, so something that runs
642 * every 2048 frames will get time reserved in every frame. Our low speed
643 * schedule can be longer and we'll be able to handle more overlap, but that
644 * will come at increased memory cost and increased time to schedule.
645 *
646 * Note: one other advantage of a short low speed schedule is that if we mess
647 * up and miss scheduling we can jump in and use any of the slots that we
648 * happened to reserve.
649 *
650 * With 25 us per slice and 1 frame in the schedule, we only need 4 bytes for
651 * the schedule. There will be one schedule per TT.
652 *
653 * Requirements:
654 * - DWC2_US_PER_SLICE must evenly divide DWC2_LS_PERIODIC_US_PER_FRAME.
655 */
656#define DWC2_US_PER_SLICE 25
657#define DWC2_SLICES_PER_UFRAME (DWC2_US_PER_UFRAME / DWC2_US_PER_SLICE)
658
659#define DWC2_ROUND_US_TO_SLICE(us) \
660 (DIV_ROUND_UP((us), DWC2_US_PER_SLICE) * \
661 DWC2_US_PER_SLICE)
662
663#define DWC2_LS_PERIODIC_US_PER_FRAME \
664 900
665#define DWC2_LS_PERIODIC_SLICES_PER_FRAME \
666 (DWC2_LS_PERIODIC_US_PER_FRAME / \
667 DWC2_US_PER_SLICE)
668
669#define DWC2_LS_SCHEDULE_FRAMES 1
670#define DWC2_LS_SCHEDULE_SLICES (DWC2_LS_SCHEDULE_FRAMES * \
671 DWC2_LS_PERIODIC_SLICES_PER_FRAME)
672
575/** 673/**
576 * struct dwc2_hsotg - Holds the state of the driver, including the non-periodic 674 * struct dwc2_hsotg - Holds the state of the driver, including the non-periodic
577 * and periodic schedules 675 * and periodic schedules
@@ -657,11 +755,14 @@ struct dwc2_hregs_backup {
657 * periodic_sched_ready because it must be rescheduled for 755 * periodic_sched_ready because it must be rescheduled for
658 * the next frame. Otherwise, the item moves to 756 * the next frame. Otherwise, the item moves to
659 * periodic_sched_inactive. 757 * periodic_sched_inactive.
758 * @split_order: List keeping track of channels doing splits, in order.
660 * @periodic_usecs: Total bandwidth claimed so far for periodic transfers. 759 * @periodic_usecs: Total bandwidth claimed so far for periodic transfers.
661 * This value is in microseconds per (micro)frame. The 760 * This value is in microseconds per (micro)frame. The
662 * assumption is that all periodic transfers may occur in 761 * assumption is that all periodic transfers may occur in
663 * the same (micro)frame. 762 * the same (micro)frame.
664 * @frame_usecs: Internal variable used by the microframe scheduler 763 * @hs_periodic_bitmap: Bitmap used by the microframe scheduler any time the
764 * host is in high speed mode; low speed schedules are
765 * stored elsewhere since we need one per TT.
665 * @frame_number: Frame number read from the core at SOF. The value ranges 766 * @frame_number: Frame number read from the core at SOF. The value ranges
666 * from 0 to HFNUM_MAX_FRNUM. 767 * from 0 to HFNUM_MAX_FRNUM.
667 * @periodic_qh_count: Count of periodic QHs, if using several eps. Used for 768 * @periodic_qh_count: Count of periodic QHs, if using several eps. Used for
@@ -780,16 +881,19 @@ struct dwc2_hsotg {
780 struct list_head periodic_sched_ready; 881 struct list_head periodic_sched_ready;
781 struct list_head periodic_sched_assigned; 882 struct list_head periodic_sched_assigned;
782 struct list_head periodic_sched_queued; 883 struct list_head periodic_sched_queued;
884 struct list_head split_order;
783 u16 periodic_usecs; 885 u16 periodic_usecs;
784 u16 frame_usecs[8]; 886 unsigned long hs_periodic_bitmap[
887 DIV_ROUND_UP(DWC2_HS_SCHEDULE_US, BITS_PER_LONG)];
785 u16 frame_number; 888 u16 frame_number;
786 u16 periodic_qh_count; 889 u16 periodic_qh_count;
787 bool bus_suspended; 890 bool bus_suspended;
788 bool new_connection; 891 bool new_connection;
789 892
893 u16 last_frame_num;
894
790#ifdef CONFIG_USB_DWC2_TRACK_MISSED_SOFS 895#ifdef CONFIG_USB_DWC2_TRACK_MISSED_SOFS
791#define FRAME_NUM_ARRAY_SIZE 1000 896#define FRAME_NUM_ARRAY_SIZE 1000
792 u16 last_frame_num;
793 u16 *frame_num_array; 897 u16 *frame_num_array;
794 u16 *last_frame_num_array; 898 u16 *last_frame_num_array;
795 int frame_num_idx; 899 int frame_num_idx;
@@ -885,34 +989,11 @@ enum dwc2_halt_status {
885 */ 989 */
886extern int dwc2_core_reset(struct dwc2_hsotg *hsotg); 990extern int dwc2_core_reset(struct dwc2_hsotg *hsotg);
887extern int dwc2_core_reset_and_force_dr_mode(struct dwc2_hsotg *hsotg); 991extern int dwc2_core_reset_and_force_dr_mode(struct dwc2_hsotg *hsotg);
888extern void dwc2_core_host_init(struct dwc2_hsotg *hsotg);
889extern int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg); 992extern int dwc2_enter_hibernation(struct dwc2_hsotg *hsotg);
890extern int dwc2_exit_hibernation(struct dwc2_hsotg *hsotg, bool restore); 993extern int dwc2_exit_hibernation(struct dwc2_hsotg *hsotg, bool restore);
891 994
892void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg); 995void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg);
893 996
894/*
895 * Host core Functions.
896 * The following functions support managing the DWC_otg controller in host
897 * mode.
898 */
899extern void dwc2_hc_init(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan);
900extern void dwc2_hc_halt(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan,
901 enum dwc2_halt_status halt_status);
902extern void dwc2_hc_cleanup(struct dwc2_hsotg *hsotg,
903 struct dwc2_host_chan *chan);
904extern void dwc2_hc_start_transfer(struct dwc2_hsotg *hsotg,
905 struct dwc2_host_chan *chan);
906extern void dwc2_hc_start_transfer_ddma(struct dwc2_hsotg *hsotg,
907 struct dwc2_host_chan *chan);
908extern int dwc2_hc_continue_transfer(struct dwc2_hsotg *hsotg,
909 struct dwc2_host_chan *chan);
910extern void dwc2_hc_do_ping(struct dwc2_hsotg *hsotg,
911 struct dwc2_host_chan *chan);
912extern void dwc2_enable_host_interrupts(struct dwc2_hsotg *hsotg);
913extern void dwc2_disable_host_interrupts(struct dwc2_hsotg *hsotg);
914
915extern u32 dwc2_calc_frame_interval(struct dwc2_hsotg *hsotg);
916extern bool dwc2_is_controller_alive(struct dwc2_hsotg *hsotg); 997extern bool dwc2_is_controller_alive(struct dwc2_hsotg *hsotg);
917 998
918/* 999/*
@@ -924,7 +1005,6 @@ extern void dwc2_read_packet(struct dwc2_hsotg *hsotg, u8 *dest, u16 bytes);
924extern void dwc2_flush_tx_fifo(struct dwc2_hsotg *hsotg, const int num); 1005extern void dwc2_flush_tx_fifo(struct dwc2_hsotg *hsotg, const int num);
925extern void dwc2_flush_rx_fifo(struct dwc2_hsotg *hsotg); 1006extern void dwc2_flush_rx_fifo(struct dwc2_hsotg *hsotg);
926 1007
927extern int dwc2_core_init(struct dwc2_hsotg *hsotg, bool initial_setup);
928extern void dwc2_enable_global_interrupts(struct dwc2_hsotg *hcd); 1008extern void dwc2_enable_global_interrupts(struct dwc2_hsotg *hcd);
929extern void dwc2_disable_global_interrupts(struct dwc2_hsotg *hcd); 1009extern void dwc2_disable_global_interrupts(struct dwc2_hsotg *hcd);
930 1010
@@ -1191,6 +1271,8 @@ extern void dwc2_hsotg_core_connect(struct dwc2_hsotg *hsotg);
1191extern void dwc2_hsotg_disconnect(struct dwc2_hsotg *dwc2); 1271extern void dwc2_hsotg_disconnect(struct dwc2_hsotg *dwc2);
1192extern int dwc2_hsotg_set_test_mode(struct dwc2_hsotg *hsotg, int testmode); 1272extern int dwc2_hsotg_set_test_mode(struct dwc2_hsotg *hsotg, int testmode);
1193#define dwc2_is_device_connected(hsotg) (hsotg->connected) 1273#define dwc2_is_device_connected(hsotg) (hsotg->connected)
1274int dwc2_backup_device_registers(struct dwc2_hsotg *hsotg);
1275int dwc2_restore_device_registers(struct dwc2_hsotg *hsotg);
1194#else 1276#else
1195static inline int dwc2_hsotg_remove(struct dwc2_hsotg *dwc2) 1277static inline int dwc2_hsotg_remove(struct dwc2_hsotg *dwc2)
1196{ return 0; } 1278{ return 0; }
@@ -1208,22 +1290,37 @@ static inline int dwc2_hsotg_set_test_mode(struct dwc2_hsotg *hsotg,
1208 int testmode) 1290 int testmode)
1209{ return 0; } 1291{ return 0; }
1210#define dwc2_is_device_connected(hsotg) (0) 1292#define dwc2_is_device_connected(hsotg) (0)
1293static inline int dwc2_backup_device_registers(struct dwc2_hsotg *hsotg)
1294{ return 0; }
1295static inline int dwc2_restore_device_registers(struct dwc2_hsotg *hsotg)
1296{ return 0; }
1211#endif 1297#endif
1212 1298
1213#if IS_ENABLED(CONFIG_USB_DWC2_HOST) || IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE) 1299#if IS_ENABLED(CONFIG_USB_DWC2_HOST) || IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
1214extern int dwc2_hcd_get_frame_number(struct dwc2_hsotg *hsotg); 1300extern int dwc2_hcd_get_frame_number(struct dwc2_hsotg *hsotg);
1301extern int dwc2_hcd_get_future_frame_number(struct dwc2_hsotg *hsotg, int us);
1215extern void dwc2_hcd_connect(struct dwc2_hsotg *hsotg); 1302extern void dwc2_hcd_connect(struct dwc2_hsotg *hsotg);
1216extern void dwc2_hcd_disconnect(struct dwc2_hsotg *hsotg, bool force); 1303extern void dwc2_hcd_disconnect(struct dwc2_hsotg *hsotg, bool force);
1217extern void dwc2_hcd_start(struct dwc2_hsotg *hsotg); 1304extern void dwc2_hcd_start(struct dwc2_hsotg *hsotg);
1305int dwc2_backup_host_registers(struct dwc2_hsotg *hsotg);
1306int dwc2_restore_host_registers(struct dwc2_hsotg *hsotg);
1218#else 1307#else
1219static inline int dwc2_hcd_get_frame_number(struct dwc2_hsotg *hsotg) 1308static inline int dwc2_hcd_get_frame_number(struct dwc2_hsotg *hsotg)
1220{ return 0; } 1309{ return 0; }
1310static inline int dwc2_hcd_get_future_frame_number(struct dwc2_hsotg *hsotg,
1311 int us)
1312{ return 0; }
1221static inline void dwc2_hcd_connect(struct dwc2_hsotg *hsotg) {} 1313static inline void dwc2_hcd_connect(struct dwc2_hsotg *hsotg) {}
1222static inline void dwc2_hcd_disconnect(struct dwc2_hsotg *hsotg, bool force) {} 1314static inline void dwc2_hcd_disconnect(struct dwc2_hsotg *hsotg, bool force) {}
1223static inline void dwc2_hcd_start(struct dwc2_hsotg *hsotg) {} 1315static inline void dwc2_hcd_start(struct dwc2_hsotg *hsotg) {}
1224static inline void dwc2_hcd_remove(struct dwc2_hsotg *hsotg) {} 1316static inline void dwc2_hcd_remove(struct dwc2_hsotg *hsotg) {}
1225static inline int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq) 1317static inline int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
1226{ return 0; } 1318{ return 0; }
1319static inline int dwc2_backup_host_registers(struct dwc2_hsotg *hsotg)
1320{ return 0; }
1321static inline int dwc2_restore_host_registers(struct dwc2_hsotg *hsotg)
1322{ return 0; }
1323
1227#endif 1324#endif
1228 1325
1229#endif /* __DWC2_CORE_H__ */ 1326#endif /* __DWC2_CORE_H__ */
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 422ab7da4eb5..e9940dd004e4 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -3668,3 +3668,105 @@ int dwc2_hsotg_resume(struct dwc2_hsotg *hsotg)
3668 3668
3669 return 0; 3669 return 0;
3670} 3670}
3671
3672/**
3673 * dwc2_backup_device_registers() - Backup controller device registers.
3674 * When suspending usb bus, registers needs to be backuped
3675 * if controller power is disabled once suspended.
3676 *
3677 * @hsotg: Programming view of the DWC_otg controller
3678 */
3679int dwc2_backup_device_registers(struct dwc2_hsotg *hsotg)
3680{
3681 struct dwc2_dregs_backup *dr;
3682 int i;
3683
3684 dev_dbg(hsotg->dev, "%s\n", __func__);
3685
3686 /* Backup dev regs */
3687 dr = &hsotg->dr_backup;
3688
3689 dr->dcfg = dwc2_readl(hsotg->regs + DCFG);
3690 dr->dctl = dwc2_readl(hsotg->regs + DCTL);
3691 dr->daintmsk = dwc2_readl(hsotg->regs + DAINTMSK);
3692 dr->diepmsk = dwc2_readl(hsotg->regs + DIEPMSK);
3693 dr->doepmsk = dwc2_readl(hsotg->regs + DOEPMSK);
3694
3695 for (i = 0; i < hsotg->num_of_eps; i++) {
3696 /* Backup IN EPs */
3697 dr->diepctl[i] = dwc2_readl(hsotg->regs + DIEPCTL(i));
3698
3699 /* Ensure DATA PID is correctly configured */
3700 if (dr->diepctl[i] & DXEPCTL_DPID)
3701 dr->diepctl[i] |= DXEPCTL_SETD1PID;
3702 else
3703 dr->diepctl[i] |= DXEPCTL_SETD0PID;
3704
3705 dr->dieptsiz[i] = dwc2_readl(hsotg->regs + DIEPTSIZ(i));
3706 dr->diepdma[i] = dwc2_readl(hsotg->regs + DIEPDMA(i));
3707
3708 /* Backup OUT EPs */
3709 dr->doepctl[i] = dwc2_readl(hsotg->regs + DOEPCTL(i));
3710
3711 /* Ensure DATA PID is correctly configured */
3712 if (dr->doepctl[i] & DXEPCTL_DPID)
3713 dr->doepctl[i] |= DXEPCTL_SETD1PID;
3714 else
3715 dr->doepctl[i] |= DXEPCTL_SETD0PID;
3716
3717 dr->doeptsiz[i] = dwc2_readl(hsotg->regs + DOEPTSIZ(i));
3718 dr->doepdma[i] = dwc2_readl(hsotg->regs + DOEPDMA(i));
3719 }
3720 dr->valid = true;
3721 return 0;
3722}
3723
3724/**
3725 * dwc2_restore_device_registers() - Restore controller device registers.
3726 * When resuming usb bus, device registers needs to be restored
3727 * if controller power were disabled.
3728 *
3729 * @hsotg: Programming view of the DWC_otg controller
3730 */
3731int dwc2_restore_device_registers(struct dwc2_hsotg *hsotg)
3732{
3733 struct dwc2_dregs_backup *dr;
3734 u32 dctl;
3735 int i;
3736
3737 dev_dbg(hsotg->dev, "%s\n", __func__);
3738
3739 /* Restore dev regs */
3740 dr = &hsotg->dr_backup;
3741 if (!dr->valid) {
3742 dev_err(hsotg->dev, "%s: no device registers to restore\n",
3743 __func__);
3744 return -EINVAL;
3745 }
3746 dr->valid = false;
3747
3748 dwc2_writel(dr->dcfg, hsotg->regs + DCFG);
3749 dwc2_writel(dr->dctl, hsotg->regs + DCTL);
3750 dwc2_writel(dr->daintmsk, hsotg->regs + DAINTMSK);
3751 dwc2_writel(dr->diepmsk, hsotg->regs + DIEPMSK);
3752 dwc2_writel(dr->doepmsk, hsotg->regs + DOEPMSK);
3753
3754 for (i = 0; i < hsotg->num_of_eps; i++) {
3755 /* Restore IN EPs */
3756 dwc2_writel(dr->diepctl[i], hsotg->regs + DIEPCTL(i));
3757 dwc2_writel(dr->dieptsiz[i], hsotg->regs + DIEPTSIZ(i));
3758 dwc2_writel(dr->diepdma[i], hsotg->regs + DIEPDMA(i));
3759
3760 /* Restore OUT EPs */
3761 dwc2_writel(dr->doepctl[i], hsotg->regs + DOEPCTL(i));
3762 dwc2_writel(dr->doeptsiz[i], hsotg->regs + DOEPTSIZ(i));
3763 dwc2_writel(dr->doepdma[i], hsotg->regs + DOEPDMA(i));
3764 }
3765
3766 /* Set the Power-On Programming done bit */
3767 dctl = dwc2_readl(hsotg->regs + DCTL);
3768 dctl |= DCTL_PWRONPRGDONE;
3769 dwc2_writel(dctl, hsotg->regs + DCTL);
3770
3771 return 0;
3772}
diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
index 8847c72e55f6..1f6255131857 100644
--- a/drivers/usb/dwc2/hcd.c
+++ b/drivers/usb/dwc2/hcd.c
@@ -54,6 +54,535 @@
54#include "core.h" 54#include "core.h"
55#include "hcd.h" 55#include "hcd.h"
56 56
57/*
58 * =========================================================================
59 * Host Core Layer Functions
60 * =========================================================================
61 */
62
63/**
64 * dwc2_enable_common_interrupts() - Initializes the commmon interrupts,
65 * used in both device and host modes
66 *
67 * @hsotg: Programming view of the DWC_otg controller
68 */
69static void dwc2_enable_common_interrupts(struct dwc2_hsotg *hsotg)
70{
71 u32 intmsk;
72
73 /* Clear any pending OTG Interrupts */
74 dwc2_writel(0xffffffff, hsotg->regs + GOTGINT);
75
76 /* Clear any pending interrupts */
77 dwc2_writel(0xffffffff, hsotg->regs + GINTSTS);
78
79 /* Enable the interrupts in the GINTMSK */
80 intmsk = GINTSTS_MODEMIS | GINTSTS_OTGINT;
81
82 if (hsotg->core_params->dma_enable <= 0)
83 intmsk |= GINTSTS_RXFLVL;
84 if (hsotg->core_params->external_id_pin_ctl <= 0)
85 intmsk |= GINTSTS_CONIDSTSCHNG;
86
87 intmsk |= GINTSTS_WKUPINT | GINTSTS_USBSUSP |
88 GINTSTS_SESSREQINT;
89
90 dwc2_writel(intmsk, hsotg->regs + GINTMSK);
91}
92
93/*
94 * Initializes the FSLSPClkSel field of the HCFG register depending on the
95 * PHY type
96 */
97static void dwc2_init_fs_ls_pclk_sel(struct dwc2_hsotg *hsotg)
98{
99 u32 hcfg, val;
100
101 if ((hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI &&
102 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED &&
103 hsotg->core_params->ulpi_fs_ls > 0) ||
104 hsotg->core_params->phy_type == DWC2_PHY_TYPE_PARAM_FS) {
105 /* Full speed PHY */
106 val = HCFG_FSLSPCLKSEL_48_MHZ;
107 } else {
108 /* High speed PHY running at full speed or high speed */
109 val = HCFG_FSLSPCLKSEL_30_60_MHZ;
110 }
111
112 dev_dbg(hsotg->dev, "Initializing HCFG.FSLSPClkSel to %08x\n", val);
113 hcfg = dwc2_readl(hsotg->regs + HCFG);
114 hcfg &= ~HCFG_FSLSPCLKSEL_MASK;
115 hcfg |= val << HCFG_FSLSPCLKSEL_SHIFT;
116 dwc2_writel(hcfg, hsotg->regs + HCFG);
117}
118
119static int dwc2_fs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
120{
121 u32 usbcfg, i2cctl;
122 int retval = 0;
123
124 /*
125 * core_init() is now called on every switch so only call the
126 * following for the first time through
127 */
128 if (select_phy) {
129 dev_dbg(hsotg->dev, "FS PHY selected\n");
130
131 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
132 if (!(usbcfg & GUSBCFG_PHYSEL)) {
133 usbcfg |= GUSBCFG_PHYSEL;
134 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
135
136 /* Reset after a PHY select */
137 retval = dwc2_core_reset_and_force_dr_mode(hsotg);
138
139 if (retval) {
140 dev_err(hsotg->dev,
141 "%s: Reset failed, aborting", __func__);
142 return retval;
143 }
144 }
145 }
146
147 /*
148 * Program DCFG.DevSpd or HCFG.FSLSPclkSel to 48Mhz in FS. Also
149 * do this on HNP Dev/Host mode switches (done in dev_init and
150 * host_init).
151 */
152 if (dwc2_is_host_mode(hsotg))
153 dwc2_init_fs_ls_pclk_sel(hsotg);
154
155 if (hsotg->core_params->i2c_enable > 0) {
156 dev_dbg(hsotg->dev, "FS PHY enabling I2C\n");
157
158 /* Program GUSBCFG.OtgUtmiFsSel to I2C */
159 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
160 usbcfg |= GUSBCFG_OTG_UTMI_FS_SEL;
161 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
162
163 /* Program GI2CCTL.I2CEn */
164 i2cctl = dwc2_readl(hsotg->regs + GI2CCTL);
165 i2cctl &= ~GI2CCTL_I2CDEVADDR_MASK;
166 i2cctl |= 1 << GI2CCTL_I2CDEVADDR_SHIFT;
167 i2cctl &= ~GI2CCTL_I2CEN;
168 dwc2_writel(i2cctl, hsotg->regs + GI2CCTL);
169 i2cctl |= GI2CCTL_I2CEN;
170 dwc2_writel(i2cctl, hsotg->regs + GI2CCTL);
171 }
172
173 return retval;
174}
175
176static int dwc2_hs_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
177{
178 u32 usbcfg, usbcfg_old;
179 int retval = 0;
180
181 if (!select_phy)
182 return 0;
183
184 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
185 usbcfg_old = usbcfg;
186
187 /*
188 * HS PHY parameters. These parameters are preserved during soft reset
189 * so only program the first time. Do a soft reset immediately after
190 * setting phyif.
191 */
192 switch (hsotg->core_params->phy_type) {
193 case DWC2_PHY_TYPE_PARAM_ULPI:
194 /* ULPI interface */
195 dev_dbg(hsotg->dev, "HS ULPI PHY selected\n");
196 usbcfg |= GUSBCFG_ULPI_UTMI_SEL;
197 usbcfg &= ~(GUSBCFG_PHYIF16 | GUSBCFG_DDRSEL);
198 if (hsotg->core_params->phy_ulpi_ddr > 0)
199 usbcfg |= GUSBCFG_DDRSEL;
200 break;
201 case DWC2_PHY_TYPE_PARAM_UTMI:
202 /* UTMI+ interface */
203 dev_dbg(hsotg->dev, "HS UTMI+ PHY selected\n");
204 usbcfg &= ~(GUSBCFG_ULPI_UTMI_SEL | GUSBCFG_PHYIF16);
205 if (hsotg->core_params->phy_utmi_width == 16)
206 usbcfg |= GUSBCFG_PHYIF16;
207 break;
208 default:
209 dev_err(hsotg->dev, "FS PHY selected at HS!\n");
210 break;
211 }
212
213 if (usbcfg != usbcfg_old) {
214 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
215
216 /* Reset after setting the PHY parameters */
217 retval = dwc2_core_reset_and_force_dr_mode(hsotg);
218 if (retval) {
219 dev_err(hsotg->dev,
220 "%s: Reset failed, aborting", __func__);
221 return retval;
222 }
223 }
224
225 return retval;
226}
227
228static int dwc2_phy_init(struct dwc2_hsotg *hsotg, bool select_phy)
229{
230 u32 usbcfg;
231 int retval = 0;
232
233 if (hsotg->core_params->speed == DWC2_SPEED_PARAM_FULL &&
234 hsotg->core_params->phy_type == DWC2_PHY_TYPE_PARAM_FS) {
235 /* If FS mode with FS PHY */
236 retval = dwc2_fs_phy_init(hsotg, select_phy);
237 if (retval)
238 return retval;
239 } else {
240 /* High speed PHY */
241 retval = dwc2_hs_phy_init(hsotg, select_phy);
242 if (retval)
243 return retval;
244 }
245
246 if (hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI &&
247 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED &&
248 hsotg->core_params->ulpi_fs_ls > 0) {
249 dev_dbg(hsotg->dev, "Setting ULPI FSLS\n");
250 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
251 usbcfg |= GUSBCFG_ULPI_FS_LS;
252 usbcfg |= GUSBCFG_ULPI_CLK_SUSP_M;
253 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
254 } else {
255 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
256 usbcfg &= ~GUSBCFG_ULPI_FS_LS;
257 usbcfg &= ~GUSBCFG_ULPI_CLK_SUSP_M;
258 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
259 }
260
261 return retval;
262}
263
264static int dwc2_gahbcfg_init(struct dwc2_hsotg *hsotg)
265{
266 u32 ahbcfg = dwc2_readl(hsotg->regs + GAHBCFG);
267
268 switch (hsotg->hw_params.arch) {
269 case GHWCFG2_EXT_DMA_ARCH:
270 dev_err(hsotg->dev, "External DMA Mode not supported\n");
271 return -EINVAL;
272
273 case GHWCFG2_INT_DMA_ARCH:
274 dev_dbg(hsotg->dev, "Internal DMA Mode\n");
275 if (hsotg->core_params->ahbcfg != -1) {
276 ahbcfg &= GAHBCFG_CTRL_MASK;
277 ahbcfg |= hsotg->core_params->ahbcfg &
278 ~GAHBCFG_CTRL_MASK;
279 }
280 break;
281
282 case GHWCFG2_SLAVE_ONLY_ARCH:
283 default:
284 dev_dbg(hsotg->dev, "Slave Only Mode\n");
285 break;
286 }
287
288 dev_dbg(hsotg->dev, "dma_enable:%d dma_desc_enable:%d\n",
289 hsotg->core_params->dma_enable,
290 hsotg->core_params->dma_desc_enable);
291
292 if (hsotg->core_params->dma_enable > 0) {
293 if (hsotg->core_params->dma_desc_enable > 0)
294 dev_dbg(hsotg->dev, "Using Descriptor DMA mode\n");
295 else
296 dev_dbg(hsotg->dev, "Using Buffer DMA mode\n");
297 } else {
298 dev_dbg(hsotg->dev, "Using Slave mode\n");
299 hsotg->core_params->dma_desc_enable = 0;
300 }
301
302 if (hsotg->core_params->dma_enable > 0)
303 ahbcfg |= GAHBCFG_DMA_EN;
304
305 dwc2_writel(ahbcfg, hsotg->regs + GAHBCFG);
306
307 return 0;
308}
309
310static void dwc2_gusbcfg_init(struct dwc2_hsotg *hsotg)
311{
312 u32 usbcfg;
313
314 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
315 usbcfg &= ~(GUSBCFG_HNPCAP | GUSBCFG_SRPCAP);
316
317 switch (hsotg->hw_params.op_mode) {
318 case GHWCFG2_OP_MODE_HNP_SRP_CAPABLE:
319 if (hsotg->core_params->otg_cap ==
320 DWC2_CAP_PARAM_HNP_SRP_CAPABLE)
321 usbcfg |= GUSBCFG_HNPCAP;
322 if (hsotg->core_params->otg_cap !=
323 DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE)
324 usbcfg |= GUSBCFG_SRPCAP;
325 break;
326
327 case GHWCFG2_OP_MODE_SRP_ONLY_CAPABLE:
328 case GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE:
329 case GHWCFG2_OP_MODE_SRP_CAPABLE_HOST:
330 if (hsotg->core_params->otg_cap !=
331 DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE)
332 usbcfg |= GUSBCFG_SRPCAP;
333 break;
334
335 case GHWCFG2_OP_MODE_NO_HNP_SRP_CAPABLE:
336 case GHWCFG2_OP_MODE_NO_SRP_CAPABLE_DEVICE:
337 case GHWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST:
338 default:
339 break;
340 }
341
342 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
343}
344
345/**
346 * dwc2_enable_host_interrupts() - Enables the Host mode interrupts
347 *
348 * @hsotg: Programming view of DWC_otg controller
349 */
350static void dwc2_enable_host_interrupts(struct dwc2_hsotg *hsotg)
351{
352 u32 intmsk;
353
354 dev_dbg(hsotg->dev, "%s()\n", __func__);
355
356 /* Disable all interrupts */
357 dwc2_writel(0, hsotg->regs + GINTMSK);
358 dwc2_writel(0, hsotg->regs + HAINTMSK);
359
360 /* Enable the common interrupts */
361 dwc2_enable_common_interrupts(hsotg);
362
363 /* Enable host mode interrupts without disturbing common interrupts */
364 intmsk = dwc2_readl(hsotg->regs + GINTMSK);
365 intmsk |= GINTSTS_DISCONNINT | GINTSTS_PRTINT | GINTSTS_HCHINT;
366 dwc2_writel(intmsk, hsotg->regs + GINTMSK);
367}
368
369/**
370 * dwc2_disable_host_interrupts() - Disables the Host Mode interrupts
371 *
372 * @hsotg: Programming view of DWC_otg controller
373 */
374static void dwc2_disable_host_interrupts(struct dwc2_hsotg *hsotg)
375{
376 u32 intmsk = dwc2_readl(hsotg->regs + GINTMSK);
377
378 /* Disable host mode interrupts without disturbing common interrupts */
379 intmsk &= ~(GINTSTS_SOF | GINTSTS_PRTINT | GINTSTS_HCHINT |
380 GINTSTS_PTXFEMP | GINTSTS_NPTXFEMP | GINTSTS_DISCONNINT);
381 dwc2_writel(intmsk, hsotg->regs + GINTMSK);
382}
383
384/*
385 * dwc2_calculate_dynamic_fifo() - Calculates the default fifo size
386 * For system that have a total fifo depth that is smaller than the default
387 * RX + TX fifo size.
388 *
389 * @hsotg: Programming view of DWC_otg controller
390 */
391static void dwc2_calculate_dynamic_fifo(struct dwc2_hsotg *hsotg)
392{
393 struct dwc2_core_params *params = hsotg->core_params;
394 struct dwc2_hw_params *hw = &hsotg->hw_params;
395 u32 rxfsiz, nptxfsiz, ptxfsiz, total_fifo_size;
396
397 total_fifo_size = hw->total_fifo_size;
398 rxfsiz = params->host_rx_fifo_size;
399 nptxfsiz = params->host_nperio_tx_fifo_size;
400 ptxfsiz = params->host_perio_tx_fifo_size;
401
402 /*
403 * Will use Method 2 defined in the DWC2 spec: minimum FIFO depth
404 * allocation with support for high bandwidth endpoints. Synopsys
405 * defines MPS(Max Packet size) for a periodic EP=1024, and for
406 * non-periodic as 512.
407 */
408 if (total_fifo_size < (rxfsiz + nptxfsiz + ptxfsiz)) {
409 /*
410 * For Buffer DMA mode/Scatter Gather DMA mode
411 * 2 * ((Largest Packet size / 4) + 1 + 1) + n
412 * with n = number of host channel.
413 * 2 * ((1024/4) + 2) = 516
414 */
415 rxfsiz = 516 + hw->host_channels;
416
417 /*
418 * min non-periodic tx fifo depth
419 * 2 * (largest non-periodic USB packet used / 4)
420 * 2 * (512/4) = 256
421 */
422 nptxfsiz = 256;
423
424 /*
425 * min periodic tx fifo depth
426 * (largest packet size*MC)/4
427 * (1024 * 3)/4 = 768
428 */
429 ptxfsiz = 768;
430
431 params->host_rx_fifo_size = rxfsiz;
432 params->host_nperio_tx_fifo_size = nptxfsiz;
433 params->host_perio_tx_fifo_size = ptxfsiz;
434 }
435
436 /*
437 * If the summation of RX, NPTX and PTX fifo sizes is still
438 * bigger than the total_fifo_size, then we have a problem.
439 *
440 * We won't be able to allocate as many endpoints. Right now,
441 * we're just printing an error message, but ideally this FIFO
442 * allocation algorithm would be improved in the future.
443 *
444 * FIXME improve this FIFO allocation algorithm.
445 */
446 if (unlikely(total_fifo_size < (rxfsiz + nptxfsiz + ptxfsiz)))
447 dev_err(hsotg->dev, "invalid fifo sizes\n");
448}
449
450static void dwc2_config_fifos(struct dwc2_hsotg *hsotg)
451{
452 struct dwc2_core_params *params = hsotg->core_params;
453 u32 nptxfsiz, hptxfsiz, dfifocfg, grxfsiz;
454
455 if (!params->enable_dynamic_fifo)
456 return;
457
458 dwc2_calculate_dynamic_fifo(hsotg);
459
460 /* Rx FIFO */
461 grxfsiz = dwc2_readl(hsotg->regs + GRXFSIZ);
462 dev_dbg(hsotg->dev, "initial grxfsiz=%08x\n", grxfsiz);
463 grxfsiz &= ~GRXFSIZ_DEPTH_MASK;
464 grxfsiz |= params->host_rx_fifo_size <<
465 GRXFSIZ_DEPTH_SHIFT & GRXFSIZ_DEPTH_MASK;
466 dwc2_writel(grxfsiz, hsotg->regs + GRXFSIZ);
467 dev_dbg(hsotg->dev, "new grxfsiz=%08x\n",
468 dwc2_readl(hsotg->regs + GRXFSIZ));
469
470 /* Non-periodic Tx FIFO */
471 dev_dbg(hsotg->dev, "initial gnptxfsiz=%08x\n",
472 dwc2_readl(hsotg->regs + GNPTXFSIZ));
473 nptxfsiz = params->host_nperio_tx_fifo_size <<
474 FIFOSIZE_DEPTH_SHIFT & FIFOSIZE_DEPTH_MASK;
475 nptxfsiz |= params->host_rx_fifo_size <<
476 FIFOSIZE_STARTADDR_SHIFT & FIFOSIZE_STARTADDR_MASK;
477 dwc2_writel(nptxfsiz, hsotg->regs + GNPTXFSIZ);
478 dev_dbg(hsotg->dev, "new gnptxfsiz=%08x\n",
479 dwc2_readl(hsotg->regs + GNPTXFSIZ));
480
481 /* Periodic Tx FIFO */
482 dev_dbg(hsotg->dev, "initial hptxfsiz=%08x\n",
483 dwc2_readl(hsotg->regs + HPTXFSIZ));
484 hptxfsiz = params->host_perio_tx_fifo_size <<
485 FIFOSIZE_DEPTH_SHIFT & FIFOSIZE_DEPTH_MASK;
486 hptxfsiz |= (params->host_rx_fifo_size +
487 params->host_nperio_tx_fifo_size) <<
488 FIFOSIZE_STARTADDR_SHIFT & FIFOSIZE_STARTADDR_MASK;
489 dwc2_writel(hptxfsiz, hsotg->regs + HPTXFSIZ);
490 dev_dbg(hsotg->dev, "new hptxfsiz=%08x\n",
491 dwc2_readl(hsotg->regs + HPTXFSIZ));
492
493 if (hsotg->core_params->en_multiple_tx_fifo > 0 &&
494 hsotg->hw_params.snpsid <= DWC2_CORE_REV_2_94a) {
495 /*
496 * Global DFIFOCFG calculation for Host mode -
497 * include RxFIFO, NPTXFIFO and HPTXFIFO
498 */
499 dfifocfg = dwc2_readl(hsotg->regs + GDFIFOCFG);
500 dfifocfg &= ~GDFIFOCFG_EPINFOBASE_MASK;
501 dfifocfg |= (params->host_rx_fifo_size +
502 params->host_nperio_tx_fifo_size +
503 params->host_perio_tx_fifo_size) <<
504 GDFIFOCFG_EPINFOBASE_SHIFT &
505 GDFIFOCFG_EPINFOBASE_MASK;
506 dwc2_writel(dfifocfg, hsotg->regs + GDFIFOCFG);
507 }
508}
509
510/**
511 * dwc2_calc_frame_interval() - Calculates the correct frame Interval value for
512 * the HFIR register according to PHY type and speed
513 *
514 * @hsotg: Programming view of DWC_otg controller
515 *
516 * NOTE: The caller can modify the value of the HFIR register only after the
517 * Port Enable bit of the Host Port Control and Status register (HPRT.EnaPort)
518 * has been set
519 */
520u32 dwc2_calc_frame_interval(struct dwc2_hsotg *hsotg)
521{
522 u32 usbcfg;
523 u32 hprt0;
524 int clock = 60; /* default value */
525
526 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
527 hprt0 = dwc2_readl(hsotg->regs + HPRT0);
528
529 if (!(usbcfg & GUSBCFG_PHYSEL) && (usbcfg & GUSBCFG_ULPI_UTMI_SEL) &&
530 !(usbcfg & GUSBCFG_PHYIF16))
531 clock = 60;
532 if ((usbcfg & GUSBCFG_PHYSEL) && hsotg->hw_params.fs_phy_type ==
533 GHWCFG2_FS_PHY_TYPE_SHARED_ULPI)
534 clock = 48;
535 if (!(usbcfg & GUSBCFG_PHY_LP_CLK_SEL) && !(usbcfg & GUSBCFG_PHYSEL) &&
536 !(usbcfg & GUSBCFG_ULPI_UTMI_SEL) && (usbcfg & GUSBCFG_PHYIF16))
537 clock = 30;
538 if (!(usbcfg & GUSBCFG_PHY_LP_CLK_SEL) && !(usbcfg & GUSBCFG_PHYSEL) &&
539 !(usbcfg & GUSBCFG_ULPI_UTMI_SEL) && !(usbcfg & GUSBCFG_PHYIF16))
540 clock = 60;
541 if ((usbcfg & GUSBCFG_PHY_LP_CLK_SEL) && !(usbcfg & GUSBCFG_PHYSEL) &&
542 !(usbcfg & GUSBCFG_ULPI_UTMI_SEL) && (usbcfg & GUSBCFG_PHYIF16))
543 clock = 48;
544 if ((usbcfg & GUSBCFG_PHYSEL) && !(usbcfg & GUSBCFG_PHYIF16) &&
545 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_SHARED_UTMI)
546 clock = 48;
547 if ((usbcfg & GUSBCFG_PHYSEL) &&
548 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED)
549 clock = 48;
550
551 if ((hprt0 & HPRT0_SPD_MASK) >> HPRT0_SPD_SHIFT == HPRT0_SPD_HIGH_SPEED)
552 /* High speed case */
553 return 125 * clock - 1;
554
555 /* FS/LS case */
556 return 1000 * clock - 1;
557}
558
559/**
560 * dwc2_read_packet() - Reads a packet from the Rx FIFO into the destination
561 * buffer
562 *
563 * @core_if: Programming view of DWC_otg controller
564 * @dest: Destination buffer for the packet
565 * @bytes: Number of bytes to copy to the destination
566 */
567void dwc2_read_packet(struct dwc2_hsotg *hsotg, u8 *dest, u16 bytes)
568{
569 u32 __iomem *fifo = hsotg->regs + HCFIFO(0);
570 u32 *data_buf = (u32 *)dest;
571 int word_count = (bytes + 3) / 4;
572 int i;
573
574 /*
575 * Todo: Account for the case where dest is not dword aligned. This
576 * requires reading data from the FIFO into a u32 temp buffer, then
577 * moving it into the data buffer.
578 */
579
580 dev_vdbg(hsotg->dev, "%s(%p,%p,%d)\n", __func__, hsotg, dest, bytes);
581
582 for (i = 0; i < word_count; i++, data_buf++)
583 *data_buf = dwc2_readl(fifo);
584}
585
57/** 586/**
58 * dwc2_dump_channel_info() - Prints the state of a host channel 587 * dwc2_dump_channel_info() - Prints the state of a host channel
59 * 588 *
@@ -77,7 +606,7 @@ static void dwc2_dump_channel_info(struct dwc2_hsotg *hsotg,
77 u32 hc_dma; 606 u32 hc_dma;
78 int i; 607 int i;
79 608
80 if (chan == NULL) 609 if (!chan)
81 return; 610 return;
82 611
83 hcchar = dwc2_readl(hsotg->regs + HCCHAR(chan->hc_num)); 612 hcchar = dwc2_readl(hsotg->regs + HCCHAR(chan->hc_num));
@@ -120,6 +649,1056 @@ static void dwc2_dump_channel_info(struct dwc2_hsotg *hsotg,
120} 649}
121 650
122/* 651/*
652 * =========================================================================
653 * Low Level Host Channel Access Functions
654 * =========================================================================
655 */
656
657static void dwc2_hc_enable_slave_ints(struct dwc2_hsotg *hsotg,
658 struct dwc2_host_chan *chan)
659{
660 u32 hcintmsk = HCINTMSK_CHHLTD;
661
662 switch (chan->ep_type) {
663 case USB_ENDPOINT_XFER_CONTROL:
664 case USB_ENDPOINT_XFER_BULK:
665 dev_vdbg(hsotg->dev, "control/bulk\n");
666 hcintmsk |= HCINTMSK_XFERCOMPL;
667 hcintmsk |= HCINTMSK_STALL;
668 hcintmsk |= HCINTMSK_XACTERR;
669 hcintmsk |= HCINTMSK_DATATGLERR;
670 if (chan->ep_is_in) {
671 hcintmsk |= HCINTMSK_BBLERR;
672 } else {
673 hcintmsk |= HCINTMSK_NAK;
674 hcintmsk |= HCINTMSK_NYET;
675 if (chan->do_ping)
676 hcintmsk |= HCINTMSK_ACK;
677 }
678
679 if (chan->do_split) {
680 hcintmsk |= HCINTMSK_NAK;
681 if (chan->complete_split)
682 hcintmsk |= HCINTMSK_NYET;
683 else
684 hcintmsk |= HCINTMSK_ACK;
685 }
686
687 if (chan->error_state)
688 hcintmsk |= HCINTMSK_ACK;
689 break;
690
691 case USB_ENDPOINT_XFER_INT:
692 if (dbg_perio())
693 dev_vdbg(hsotg->dev, "intr\n");
694 hcintmsk |= HCINTMSK_XFERCOMPL;
695 hcintmsk |= HCINTMSK_NAK;
696 hcintmsk |= HCINTMSK_STALL;
697 hcintmsk |= HCINTMSK_XACTERR;
698 hcintmsk |= HCINTMSK_DATATGLERR;
699 hcintmsk |= HCINTMSK_FRMOVRUN;
700
701 if (chan->ep_is_in)
702 hcintmsk |= HCINTMSK_BBLERR;
703 if (chan->error_state)
704 hcintmsk |= HCINTMSK_ACK;
705 if (chan->do_split) {
706 if (chan->complete_split)
707 hcintmsk |= HCINTMSK_NYET;
708 else
709 hcintmsk |= HCINTMSK_ACK;
710 }
711 break;
712
713 case USB_ENDPOINT_XFER_ISOC:
714 if (dbg_perio())
715 dev_vdbg(hsotg->dev, "isoc\n");
716 hcintmsk |= HCINTMSK_XFERCOMPL;
717 hcintmsk |= HCINTMSK_FRMOVRUN;
718 hcintmsk |= HCINTMSK_ACK;
719
720 if (chan->ep_is_in) {
721 hcintmsk |= HCINTMSK_XACTERR;
722 hcintmsk |= HCINTMSK_BBLERR;
723 }
724 break;
725 default:
726 dev_err(hsotg->dev, "## Unknown EP type ##\n");
727 break;
728 }
729
730 dwc2_writel(hcintmsk, hsotg->regs + HCINTMSK(chan->hc_num));
731 if (dbg_hc(chan))
732 dev_vdbg(hsotg->dev, "set HCINTMSK to %08x\n", hcintmsk);
733}
734
735static void dwc2_hc_enable_dma_ints(struct dwc2_hsotg *hsotg,
736 struct dwc2_host_chan *chan)
737{
738 u32 hcintmsk = HCINTMSK_CHHLTD;
739
740 /*
741 * For Descriptor DMA mode core halts the channel on AHB error.
742 * Interrupt is not required.
743 */
744 if (hsotg->core_params->dma_desc_enable <= 0) {
745 if (dbg_hc(chan))
746 dev_vdbg(hsotg->dev, "desc DMA disabled\n");
747 hcintmsk |= HCINTMSK_AHBERR;
748 } else {
749 if (dbg_hc(chan))
750 dev_vdbg(hsotg->dev, "desc DMA enabled\n");
751 if (chan->ep_type == USB_ENDPOINT_XFER_ISOC)
752 hcintmsk |= HCINTMSK_XFERCOMPL;
753 }
754
755 if (chan->error_state && !chan->do_split &&
756 chan->ep_type != USB_ENDPOINT_XFER_ISOC) {
757 if (dbg_hc(chan))
758 dev_vdbg(hsotg->dev, "setting ACK\n");
759 hcintmsk |= HCINTMSK_ACK;
760 if (chan->ep_is_in) {
761 hcintmsk |= HCINTMSK_DATATGLERR;
762 if (chan->ep_type != USB_ENDPOINT_XFER_INT)
763 hcintmsk |= HCINTMSK_NAK;
764 }
765 }
766
767 dwc2_writel(hcintmsk, hsotg->regs + HCINTMSK(chan->hc_num));
768 if (dbg_hc(chan))
769 dev_vdbg(hsotg->dev, "set HCINTMSK to %08x\n", hcintmsk);
770}
771
772static void dwc2_hc_enable_ints(struct dwc2_hsotg *hsotg,
773 struct dwc2_host_chan *chan)
774{
775 u32 intmsk;
776
777 if (hsotg->core_params->dma_enable > 0) {
778 if (dbg_hc(chan))
779 dev_vdbg(hsotg->dev, "DMA enabled\n");
780 dwc2_hc_enable_dma_ints(hsotg, chan);
781 } else {
782 if (dbg_hc(chan))
783 dev_vdbg(hsotg->dev, "DMA disabled\n");
784 dwc2_hc_enable_slave_ints(hsotg, chan);
785 }
786
787 /* Enable the top level host channel interrupt */
788 intmsk = dwc2_readl(hsotg->regs + HAINTMSK);
789 intmsk |= 1 << chan->hc_num;
790 dwc2_writel(intmsk, hsotg->regs + HAINTMSK);
791 if (dbg_hc(chan))
792 dev_vdbg(hsotg->dev, "set HAINTMSK to %08x\n", intmsk);
793
794 /* Make sure host channel interrupts are enabled */
795 intmsk = dwc2_readl(hsotg->regs + GINTMSK);
796 intmsk |= GINTSTS_HCHINT;
797 dwc2_writel(intmsk, hsotg->regs + GINTMSK);
798 if (dbg_hc(chan))
799 dev_vdbg(hsotg->dev, "set GINTMSK to %08x\n", intmsk);
800}
801
802/**
803 * dwc2_hc_init() - Prepares a host channel for transferring packets to/from
804 * a specific endpoint
805 *
806 * @hsotg: Programming view of DWC_otg controller
807 * @chan: Information needed to initialize the host channel
808 *
809 * The HCCHARn register is set up with the characteristics specified in chan.
810 * Host channel interrupts that may need to be serviced while this transfer is
811 * in progress are enabled.
812 */
813static void dwc2_hc_init(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan)
814{
815 u8 hc_num = chan->hc_num;
816 u32 hcintmsk;
817 u32 hcchar;
818 u32 hcsplt = 0;
819
820 if (dbg_hc(chan))
821 dev_vdbg(hsotg->dev, "%s()\n", __func__);
822
823 /* Clear old interrupt conditions for this host channel */
824 hcintmsk = 0xffffffff;
825 hcintmsk &= ~HCINTMSK_RESERVED14_31;
826 dwc2_writel(hcintmsk, hsotg->regs + HCINT(hc_num));
827
828 /* Enable channel interrupts required for this transfer */
829 dwc2_hc_enable_ints(hsotg, chan);
830
831 /*
832 * Program the HCCHARn register with the endpoint characteristics for
833 * the current transfer
834 */
835 hcchar = chan->dev_addr << HCCHAR_DEVADDR_SHIFT & HCCHAR_DEVADDR_MASK;
836 hcchar |= chan->ep_num << HCCHAR_EPNUM_SHIFT & HCCHAR_EPNUM_MASK;
837 if (chan->ep_is_in)
838 hcchar |= HCCHAR_EPDIR;
839 if (chan->speed == USB_SPEED_LOW)
840 hcchar |= HCCHAR_LSPDDEV;
841 hcchar |= chan->ep_type << HCCHAR_EPTYPE_SHIFT & HCCHAR_EPTYPE_MASK;
842 hcchar |= chan->max_packet << HCCHAR_MPS_SHIFT & HCCHAR_MPS_MASK;
843 dwc2_writel(hcchar, hsotg->regs + HCCHAR(hc_num));
844 if (dbg_hc(chan)) {
845 dev_vdbg(hsotg->dev, "set HCCHAR(%d) to %08x\n",
846 hc_num, hcchar);
847
848 dev_vdbg(hsotg->dev, "%s: Channel %d\n",
849 __func__, hc_num);
850 dev_vdbg(hsotg->dev, " Dev Addr: %d\n",
851 chan->dev_addr);
852 dev_vdbg(hsotg->dev, " Ep Num: %d\n",
853 chan->ep_num);
854 dev_vdbg(hsotg->dev, " Is In: %d\n",
855 chan->ep_is_in);
856 dev_vdbg(hsotg->dev, " Is Low Speed: %d\n",
857 chan->speed == USB_SPEED_LOW);
858 dev_vdbg(hsotg->dev, " Ep Type: %d\n",
859 chan->ep_type);
860 dev_vdbg(hsotg->dev, " Max Pkt: %d\n",
861 chan->max_packet);
862 }
863
864 /* Program the HCSPLT register for SPLITs */
865 if (chan->do_split) {
866 if (dbg_hc(chan))
867 dev_vdbg(hsotg->dev,
868 "Programming HC %d with split --> %s\n",
869 hc_num,
870 chan->complete_split ? "CSPLIT" : "SSPLIT");
871 if (chan->complete_split)
872 hcsplt |= HCSPLT_COMPSPLT;
873 hcsplt |= chan->xact_pos << HCSPLT_XACTPOS_SHIFT &
874 HCSPLT_XACTPOS_MASK;
875 hcsplt |= chan->hub_addr << HCSPLT_HUBADDR_SHIFT &
876 HCSPLT_HUBADDR_MASK;
877 hcsplt |= chan->hub_port << HCSPLT_PRTADDR_SHIFT &
878 HCSPLT_PRTADDR_MASK;
879 if (dbg_hc(chan)) {
880 dev_vdbg(hsotg->dev, " comp split %d\n",
881 chan->complete_split);
882 dev_vdbg(hsotg->dev, " xact pos %d\n",
883 chan->xact_pos);
884 dev_vdbg(hsotg->dev, " hub addr %d\n",
885 chan->hub_addr);
886 dev_vdbg(hsotg->dev, " hub port %d\n",
887 chan->hub_port);
888 dev_vdbg(hsotg->dev, " is_in %d\n",
889 chan->ep_is_in);
890 dev_vdbg(hsotg->dev, " Max Pkt %d\n",
891 chan->max_packet);
892 dev_vdbg(hsotg->dev, " xferlen %d\n",
893 chan->xfer_len);
894 }
895 }
896
897 dwc2_writel(hcsplt, hsotg->regs + HCSPLT(hc_num));
898}
899
900/**
901 * dwc2_hc_halt() - Attempts to halt a host channel
902 *
903 * @hsotg: Controller register interface
904 * @chan: Host channel to halt
905 * @halt_status: Reason for halting the channel
906 *
907 * This function should only be called in Slave mode or to abort a transfer in
908 * either Slave mode or DMA mode. Under normal circumstances in DMA mode, the
909 * controller halts the channel when the transfer is complete or a condition
910 * occurs that requires application intervention.
911 *
912 * In slave mode, checks for a free request queue entry, then sets the Channel
913 * Enable and Channel Disable bits of the Host Channel Characteristics
914 * register of the specified channel to intiate the halt. If there is no free
915 * request queue entry, sets only the Channel Disable bit of the HCCHARn
916 * register to flush requests for this channel. In the latter case, sets a
917 * flag to indicate that the host channel needs to be halted when a request
918 * queue slot is open.
919 *
920 * In DMA mode, always sets the Channel Enable and Channel Disable bits of the
921 * HCCHARn register. The controller ensures there is space in the request
922 * queue before submitting the halt request.
923 *
924 * Some time may elapse before the core flushes any posted requests for this
925 * host channel and halts. The Channel Halted interrupt handler completes the
926 * deactivation of the host channel.
927 */
928void dwc2_hc_halt(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan,
929 enum dwc2_halt_status halt_status)
930{
931 u32 nptxsts, hptxsts, hcchar;
932
933 if (dbg_hc(chan))
934 dev_vdbg(hsotg->dev, "%s()\n", __func__);
935 if (halt_status == DWC2_HC_XFER_NO_HALT_STATUS)
936 dev_err(hsotg->dev, "!!! halt_status = %d !!!\n", halt_status);
937
938 if (halt_status == DWC2_HC_XFER_URB_DEQUEUE ||
939 halt_status == DWC2_HC_XFER_AHB_ERR) {
940 /*
941 * Disable all channel interrupts except Ch Halted. The QTD
942 * and QH state associated with this transfer has been cleared
943 * (in the case of URB_DEQUEUE), so the channel needs to be
944 * shut down carefully to prevent crashes.
945 */
946 u32 hcintmsk = HCINTMSK_CHHLTD;
947
948 dev_vdbg(hsotg->dev, "dequeue/error\n");
949 dwc2_writel(hcintmsk, hsotg->regs + HCINTMSK(chan->hc_num));
950
951 /*
952 * Make sure no other interrupts besides halt are currently
953 * pending. Handling another interrupt could cause a crash due
954 * to the QTD and QH state.
955 */
956 dwc2_writel(~hcintmsk, hsotg->regs + HCINT(chan->hc_num));
957
958 /*
959 * Make sure the halt status is set to URB_DEQUEUE or AHB_ERR
960 * even if the channel was already halted for some other
961 * reason
962 */
963 chan->halt_status = halt_status;
964
965 hcchar = dwc2_readl(hsotg->regs + HCCHAR(chan->hc_num));
966 if (!(hcchar & HCCHAR_CHENA)) {
967 /*
968 * The channel is either already halted or it hasn't
969 * started yet. In DMA mode, the transfer may halt if
970 * it finishes normally or a condition occurs that
971 * requires driver intervention. Don't want to halt
972 * the channel again. In either Slave or DMA mode,
973 * it's possible that the transfer has been assigned
974 * to a channel, but not started yet when an URB is
975 * dequeued. Don't want to halt a channel that hasn't
976 * started yet.
977 */
978 return;
979 }
980 }
981 if (chan->halt_pending) {
982 /*
983 * A halt has already been issued for this channel. This might
984 * happen when a transfer is aborted by a higher level in
985 * the stack.
986 */
987 dev_vdbg(hsotg->dev,
988 "*** %s: Channel %d, chan->halt_pending already set ***\n",
989 __func__, chan->hc_num);
990 return;
991 }
992
993 hcchar = dwc2_readl(hsotg->regs + HCCHAR(chan->hc_num));
994
995 /* No need to set the bit in DDMA for disabling the channel */
996 /* TODO check it everywhere channel is disabled */
997 if (hsotg->core_params->dma_desc_enable <= 0) {
998 if (dbg_hc(chan))
999 dev_vdbg(hsotg->dev, "desc DMA disabled\n");
1000 hcchar |= HCCHAR_CHENA;
1001 } else {
1002 if (dbg_hc(chan))
1003 dev_dbg(hsotg->dev, "desc DMA enabled\n");
1004 }
1005 hcchar |= HCCHAR_CHDIS;
1006
1007 if (hsotg->core_params->dma_enable <= 0) {
1008 if (dbg_hc(chan))
1009 dev_vdbg(hsotg->dev, "DMA not enabled\n");
1010 hcchar |= HCCHAR_CHENA;
1011
1012 /* Check for space in the request queue to issue the halt */
1013 if (chan->ep_type == USB_ENDPOINT_XFER_CONTROL ||
1014 chan->ep_type == USB_ENDPOINT_XFER_BULK) {
1015 dev_vdbg(hsotg->dev, "control/bulk\n");
1016 nptxsts = dwc2_readl(hsotg->regs + GNPTXSTS);
1017 if ((nptxsts & TXSTS_QSPCAVAIL_MASK) == 0) {
1018 dev_vdbg(hsotg->dev, "Disabling channel\n");
1019 hcchar &= ~HCCHAR_CHENA;
1020 }
1021 } else {
1022 if (dbg_perio())
1023 dev_vdbg(hsotg->dev, "isoc/intr\n");
1024 hptxsts = dwc2_readl(hsotg->regs + HPTXSTS);
1025 if ((hptxsts & TXSTS_QSPCAVAIL_MASK) == 0 ||
1026 hsotg->queuing_high_bandwidth) {
1027 if (dbg_perio())
1028 dev_vdbg(hsotg->dev, "Disabling channel\n");
1029 hcchar &= ~HCCHAR_CHENA;
1030 }
1031 }
1032 } else {
1033 if (dbg_hc(chan))
1034 dev_vdbg(hsotg->dev, "DMA enabled\n");
1035 }
1036
1037 dwc2_writel(hcchar, hsotg->regs + HCCHAR(chan->hc_num));
1038 chan->halt_status = halt_status;
1039
1040 if (hcchar & HCCHAR_CHENA) {
1041 if (dbg_hc(chan))
1042 dev_vdbg(hsotg->dev, "Channel enabled\n");
1043 chan->halt_pending = 1;
1044 chan->halt_on_queue = 0;
1045 } else {
1046 if (dbg_hc(chan))
1047 dev_vdbg(hsotg->dev, "Channel disabled\n");
1048 chan->halt_on_queue = 1;
1049 }
1050
1051 if (dbg_hc(chan)) {
1052 dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,
1053 chan->hc_num);
1054 dev_vdbg(hsotg->dev, " hcchar: 0x%08x\n",
1055 hcchar);
1056 dev_vdbg(hsotg->dev, " halt_pending: %d\n",
1057 chan->halt_pending);
1058 dev_vdbg(hsotg->dev, " halt_on_queue: %d\n",
1059 chan->halt_on_queue);
1060 dev_vdbg(hsotg->dev, " halt_status: %d\n",
1061 chan->halt_status);
1062 }
1063}
1064
1065/**
1066 * dwc2_hc_cleanup() - Clears the transfer state for a host channel
1067 *
1068 * @hsotg: Programming view of DWC_otg controller
1069 * @chan: Identifies the host channel to clean up
1070 *
1071 * This function is normally called after a transfer is done and the host
1072 * channel is being released
1073 */
1074void dwc2_hc_cleanup(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan)
1075{
1076 u32 hcintmsk;
1077
1078 chan->xfer_started = 0;
1079
1080 list_del_init(&chan->split_order_list_entry);
1081
1082 /*
1083 * Clear channel interrupt enables and any unhandled channel interrupt
1084 * conditions
1085 */
1086 dwc2_writel(0, hsotg->regs + HCINTMSK(chan->hc_num));
1087 hcintmsk = 0xffffffff;
1088 hcintmsk &= ~HCINTMSK_RESERVED14_31;
1089 dwc2_writel(hcintmsk, hsotg->regs + HCINT(chan->hc_num));
1090}
1091
1092/**
1093 * dwc2_hc_set_even_odd_frame() - Sets the channel property that indicates in
1094 * which frame a periodic transfer should occur
1095 *
1096 * @hsotg: Programming view of DWC_otg controller
1097 * @chan: Identifies the host channel to set up and its properties
1098 * @hcchar: Current value of the HCCHAR register for the specified host channel
1099 *
1100 * This function has no effect on non-periodic transfers
1101 */
1102static void dwc2_hc_set_even_odd_frame(struct dwc2_hsotg *hsotg,
1103 struct dwc2_host_chan *chan, u32 *hcchar)
1104{
1105 if (chan->ep_type == USB_ENDPOINT_XFER_INT ||
1106 chan->ep_type == USB_ENDPOINT_XFER_ISOC) {
1107 int host_speed;
1108 int xfer_ns;
1109 int xfer_us;
1110 int bytes_in_fifo;
1111 u16 fifo_space;
1112 u16 frame_number;
1113 u16 wire_frame;
1114
1115 /*
1116 * Try to figure out if we're an even or odd frame. If we set
1117 * even and the current frame number is even the the transfer
1118 * will happen immediately. Similar if both are odd. If one is
1119 * even and the other is odd then the transfer will happen when
1120 * the frame number ticks.
1121 *
1122 * There's a bit of a balancing act to get this right.
1123 * Sometimes we may want to send data in the current frame (AK
1124 * right away). We might want to do this if the frame number
1125 * _just_ ticked, but we might also want to do this in order
1126 * to continue a split transaction that happened late in a
1127 * microframe (so we didn't know to queue the next transfer
1128 * until the frame number had ticked). The problem is that we
1129 * need a lot of knowledge to know if there's actually still
1130 * time to send things or if it would be better to wait until
1131 * the next frame.
1132 *
1133 * We can look at how much time is left in the current frame
1134 * and make a guess about whether we'll have time to transfer.
1135 * We'll do that.
1136 */
1137
1138 /* Get speed host is running at */
1139 host_speed = (chan->speed != USB_SPEED_HIGH &&
1140 !chan->do_split) ? chan->speed : USB_SPEED_HIGH;
1141
1142 /* See how many bytes are in the periodic FIFO right now */
1143 fifo_space = (dwc2_readl(hsotg->regs + HPTXSTS) &
1144 TXSTS_FSPCAVAIL_MASK) >> TXSTS_FSPCAVAIL_SHIFT;
1145 bytes_in_fifo = sizeof(u32) *
1146 (hsotg->core_params->host_perio_tx_fifo_size -
1147 fifo_space);
1148
1149 /*
1150 * Roughly estimate bus time for everything in the periodic
1151 * queue + our new transfer. This is "rough" because we're
1152 * using a function that makes takes into account IN/OUT
1153 * and INT/ISO and we're just slamming in one value for all
1154 * transfers. This should be an over-estimate and that should
1155 * be OK, but we can probably tighten it.
1156 */
1157 xfer_ns = usb_calc_bus_time(host_speed, false, false,
1158 chan->xfer_len + bytes_in_fifo);
1159 xfer_us = NS_TO_US(xfer_ns);
1160
1161 /* See what frame number we'll be at by the time we finish */
1162 frame_number = dwc2_hcd_get_future_frame_number(hsotg, xfer_us);
1163
1164 /* This is when we were scheduled to be on the wire */
1165 wire_frame = dwc2_frame_num_inc(chan->qh->next_active_frame, 1);
1166
1167 /*
1168 * If we'd finish _after_ the frame we're scheduled in then
1169 * it's hopeless. Just schedule right away and hope for the
1170 * best. Note that it _might_ be wise to call back into the
1171 * scheduler to pick a better frame, but this is better than
1172 * nothing.
1173 */
1174 if (dwc2_frame_num_gt(frame_number, wire_frame)) {
1175 dwc2_sch_vdbg(hsotg,
1176 "QH=%p EO MISS fr=%04x=>%04x (%+d)\n",
1177 chan->qh, wire_frame, frame_number,
1178 dwc2_frame_num_dec(frame_number,
1179 wire_frame));
1180 wire_frame = frame_number;
1181
1182 /*
1183 * We picked a different frame number; communicate this
1184 * back to the scheduler so it doesn't try to schedule
1185 * another in the same frame.
1186 *
1187 * Remember that next_active_frame is 1 before the wire
1188 * frame.
1189 */
1190 chan->qh->next_active_frame =
1191 dwc2_frame_num_dec(frame_number, 1);
1192 }
1193
1194 if (wire_frame & 1)
1195 *hcchar |= HCCHAR_ODDFRM;
1196 else
1197 *hcchar &= ~HCCHAR_ODDFRM;
1198 }
1199}
1200
1201static void dwc2_set_pid_isoc(struct dwc2_host_chan *chan)
1202{
1203 /* Set up the initial PID for the transfer */
1204 if (chan->speed == USB_SPEED_HIGH) {
1205 if (chan->ep_is_in) {
1206 if (chan->multi_count == 1)
1207 chan->data_pid_start = DWC2_HC_PID_DATA0;
1208 else if (chan->multi_count == 2)
1209 chan->data_pid_start = DWC2_HC_PID_DATA1;
1210 else
1211 chan->data_pid_start = DWC2_HC_PID_DATA2;
1212 } else {
1213 if (chan->multi_count == 1)
1214 chan->data_pid_start = DWC2_HC_PID_DATA0;
1215 else
1216 chan->data_pid_start = DWC2_HC_PID_MDATA;
1217 }
1218 } else {
1219 chan->data_pid_start = DWC2_HC_PID_DATA0;
1220 }
1221}
1222
1223/**
1224 * dwc2_hc_write_packet() - Writes a packet into the Tx FIFO associated with
1225 * the Host Channel
1226 *
1227 * @hsotg: Programming view of DWC_otg controller
1228 * @chan: Information needed to initialize the host channel
1229 *
1230 * This function should only be called in Slave mode. For a channel associated
1231 * with a non-periodic EP, the non-periodic Tx FIFO is written. For a channel
1232 * associated with a periodic EP, the periodic Tx FIFO is written.
1233 *
1234 * Upon return the xfer_buf and xfer_count fields in chan are incremented by
1235 * the number of bytes written to the Tx FIFO.
1236 */
1237static void dwc2_hc_write_packet(struct dwc2_hsotg *hsotg,
1238 struct dwc2_host_chan *chan)
1239{
1240 u32 i;
1241 u32 remaining_count;
1242 u32 byte_count;
1243 u32 dword_count;
1244 u32 __iomem *data_fifo;
1245 u32 *data_buf = (u32 *)chan->xfer_buf;
1246
1247 if (dbg_hc(chan))
1248 dev_vdbg(hsotg->dev, "%s()\n", __func__);
1249
1250 data_fifo = (u32 __iomem *)(hsotg->regs + HCFIFO(chan->hc_num));
1251
1252 remaining_count = chan->xfer_len - chan->xfer_count;
1253 if (remaining_count > chan->max_packet)
1254 byte_count = chan->max_packet;
1255 else
1256 byte_count = remaining_count;
1257
1258 dword_count = (byte_count + 3) / 4;
1259
1260 if (((unsigned long)data_buf & 0x3) == 0) {
1261 /* xfer_buf is DWORD aligned */
1262 for (i = 0; i < dword_count; i++, data_buf++)
1263 dwc2_writel(*data_buf, data_fifo);
1264 } else {
1265 /* xfer_buf is not DWORD aligned */
1266 for (i = 0; i < dword_count; i++, data_buf++) {
1267 u32 data = data_buf[0] | data_buf[1] << 8 |
1268 data_buf[2] << 16 | data_buf[3] << 24;
1269 dwc2_writel(data, data_fifo);
1270 }
1271 }
1272
1273 chan->xfer_count += byte_count;
1274 chan->xfer_buf += byte_count;
1275}
1276
1277/**
1278 * dwc2_hc_do_ping() - Starts a PING transfer
1279 *
1280 * @hsotg: Programming view of DWC_otg controller
1281 * @chan: Information needed to initialize the host channel
1282 *
1283 * This function should only be called in Slave mode. The Do Ping bit is set in
1284 * the HCTSIZ register, then the channel is enabled.
1285 */
1286static void dwc2_hc_do_ping(struct dwc2_hsotg *hsotg,
1287 struct dwc2_host_chan *chan)
1288{
1289 u32 hcchar;
1290 u32 hctsiz;
1291
1292 if (dbg_hc(chan))
1293 dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,
1294 chan->hc_num);
1295
1296 hctsiz = TSIZ_DOPNG;
1297 hctsiz |= 1 << TSIZ_PKTCNT_SHIFT;
1298 dwc2_writel(hctsiz, hsotg->regs + HCTSIZ(chan->hc_num));
1299
1300 hcchar = dwc2_readl(hsotg->regs + HCCHAR(chan->hc_num));
1301 hcchar |= HCCHAR_CHENA;
1302 hcchar &= ~HCCHAR_CHDIS;
1303 dwc2_writel(hcchar, hsotg->regs + HCCHAR(chan->hc_num));
1304}
1305
1306/**
1307 * dwc2_hc_start_transfer() - Does the setup for a data transfer for a host
1308 * channel and starts the transfer
1309 *
1310 * @hsotg: Programming view of DWC_otg controller
1311 * @chan: Information needed to initialize the host channel. The xfer_len value
1312 * may be reduced to accommodate the max widths of the XferSize and
1313 * PktCnt fields in the HCTSIZn register. The multi_count value may be
1314 * changed to reflect the final xfer_len value.
1315 *
1316 * This function may be called in either Slave mode or DMA mode. In Slave mode,
1317 * the caller must ensure that there is sufficient space in the request queue
1318 * and Tx Data FIFO.
1319 *
1320 * For an OUT transfer in Slave mode, it loads a data packet into the
1321 * appropriate FIFO. If necessary, additional data packets are loaded in the
1322 * Host ISR.
1323 *
1324 * For an IN transfer in Slave mode, a data packet is requested. The data
1325 * packets are unloaded from the Rx FIFO in the Host ISR. If necessary,
1326 * additional data packets are requested in the Host ISR.
1327 *
1328 * For a PING transfer in Slave mode, the Do Ping bit is set in the HCTSIZ
1329 * register along with a packet count of 1 and the channel is enabled. This
1330 * causes a single PING transaction to occur. Other fields in HCTSIZ are
1331 * simply set to 0 since no data transfer occurs in this case.
1332 *
1333 * For a PING transfer in DMA mode, the HCTSIZ register is initialized with
1334 * all the information required to perform the subsequent data transfer. In
1335 * addition, the Do Ping bit is set in the HCTSIZ register. In this case, the
1336 * controller performs the entire PING protocol, then starts the data
1337 * transfer.
1338 */
1339static void dwc2_hc_start_transfer(struct dwc2_hsotg *hsotg,
1340 struct dwc2_host_chan *chan)
1341{
1342 u32 max_hc_xfer_size = hsotg->core_params->max_transfer_size;
1343 u16 max_hc_pkt_count = hsotg->core_params->max_packet_count;
1344 u32 hcchar;
1345 u32 hctsiz = 0;
1346 u16 num_packets;
1347 u32 ec_mc;
1348
1349 if (dbg_hc(chan))
1350 dev_vdbg(hsotg->dev, "%s()\n", __func__);
1351
1352 if (chan->do_ping) {
1353 if (hsotg->core_params->dma_enable <= 0) {
1354 if (dbg_hc(chan))
1355 dev_vdbg(hsotg->dev, "ping, no DMA\n");
1356 dwc2_hc_do_ping(hsotg, chan);
1357 chan->xfer_started = 1;
1358 return;
1359 }
1360
1361 if (dbg_hc(chan))
1362 dev_vdbg(hsotg->dev, "ping, DMA\n");
1363
1364 hctsiz |= TSIZ_DOPNG;
1365 }
1366
1367 if (chan->do_split) {
1368 if (dbg_hc(chan))
1369 dev_vdbg(hsotg->dev, "split\n");
1370 num_packets = 1;
1371
1372 if (chan->complete_split && !chan->ep_is_in)
1373 /*
1374 * For CSPLIT OUT Transfer, set the size to 0 so the
1375 * core doesn't expect any data written to the FIFO
1376 */
1377 chan->xfer_len = 0;
1378 else if (chan->ep_is_in || chan->xfer_len > chan->max_packet)
1379 chan->xfer_len = chan->max_packet;
1380 else if (!chan->ep_is_in && chan->xfer_len > 188)
1381 chan->xfer_len = 188;
1382
1383 hctsiz |= chan->xfer_len << TSIZ_XFERSIZE_SHIFT &
1384 TSIZ_XFERSIZE_MASK;
1385
1386 /* For split set ec_mc for immediate retries */
1387 if (chan->ep_type == USB_ENDPOINT_XFER_INT ||
1388 chan->ep_type == USB_ENDPOINT_XFER_ISOC)
1389 ec_mc = 3;
1390 else
1391 ec_mc = 1;
1392 } else {
1393 if (dbg_hc(chan))
1394 dev_vdbg(hsotg->dev, "no split\n");
1395 /*
1396 * Ensure that the transfer length and packet count will fit
1397 * in the widths allocated for them in the HCTSIZn register
1398 */
1399 if (chan->ep_type == USB_ENDPOINT_XFER_INT ||
1400 chan->ep_type == USB_ENDPOINT_XFER_ISOC) {
1401 /*
1402 * Make sure the transfer size is no larger than one
1403 * (micro)frame's worth of data. (A check was done
1404 * when the periodic transfer was accepted to ensure
1405 * that a (micro)frame's worth of data can be
1406 * programmed into a channel.)
1407 */
1408 u32 max_periodic_len =
1409 chan->multi_count * chan->max_packet;
1410
1411 if (chan->xfer_len > max_periodic_len)
1412 chan->xfer_len = max_periodic_len;
1413 } else if (chan->xfer_len > max_hc_xfer_size) {
1414 /*
1415 * Make sure that xfer_len is a multiple of max packet
1416 * size
1417 */
1418 chan->xfer_len =
1419 max_hc_xfer_size - chan->max_packet + 1;
1420 }
1421
1422 if (chan->xfer_len > 0) {
1423 num_packets = (chan->xfer_len + chan->max_packet - 1) /
1424 chan->max_packet;
1425 if (num_packets > max_hc_pkt_count) {
1426 num_packets = max_hc_pkt_count;
1427 chan->xfer_len = num_packets * chan->max_packet;
1428 }
1429 } else {
1430 /* Need 1 packet for transfer length of 0 */
1431 num_packets = 1;
1432 }
1433
1434 if (chan->ep_is_in)
1435 /*
1436 * Always program an integral # of max packets for IN
1437 * transfers
1438 */
1439 chan->xfer_len = num_packets * chan->max_packet;
1440
1441 if (chan->ep_type == USB_ENDPOINT_XFER_INT ||
1442 chan->ep_type == USB_ENDPOINT_XFER_ISOC)
1443 /*
1444 * Make sure that the multi_count field matches the
1445 * actual transfer length
1446 */
1447 chan->multi_count = num_packets;
1448
1449 if (chan->ep_type == USB_ENDPOINT_XFER_ISOC)
1450 dwc2_set_pid_isoc(chan);
1451
1452 hctsiz |= chan->xfer_len << TSIZ_XFERSIZE_SHIFT &
1453 TSIZ_XFERSIZE_MASK;
1454
1455 /* The ec_mc gets the multi_count for non-split */
1456 ec_mc = chan->multi_count;
1457 }
1458
1459 chan->start_pkt_count = num_packets;
1460 hctsiz |= num_packets << TSIZ_PKTCNT_SHIFT & TSIZ_PKTCNT_MASK;
1461 hctsiz |= chan->data_pid_start << TSIZ_SC_MC_PID_SHIFT &
1462 TSIZ_SC_MC_PID_MASK;
1463 dwc2_writel(hctsiz, hsotg->regs + HCTSIZ(chan->hc_num));
1464 if (dbg_hc(chan)) {
1465 dev_vdbg(hsotg->dev, "Wrote %08x to HCTSIZ(%d)\n",
1466 hctsiz, chan->hc_num);
1467
1468 dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,
1469 chan->hc_num);
1470 dev_vdbg(hsotg->dev, " Xfer Size: %d\n",
1471 (hctsiz & TSIZ_XFERSIZE_MASK) >>
1472 TSIZ_XFERSIZE_SHIFT);
1473 dev_vdbg(hsotg->dev, " Num Pkts: %d\n",
1474 (hctsiz & TSIZ_PKTCNT_MASK) >>
1475 TSIZ_PKTCNT_SHIFT);
1476 dev_vdbg(hsotg->dev, " Start PID: %d\n",
1477 (hctsiz & TSIZ_SC_MC_PID_MASK) >>
1478 TSIZ_SC_MC_PID_SHIFT);
1479 }
1480
1481 if (hsotg->core_params->dma_enable > 0) {
1482 dwc2_writel((u32)chan->xfer_dma,
1483 hsotg->regs + HCDMA(chan->hc_num));
1484 if (dbg_hc(chan))
1485 dev_vdbg(hsotg->dev, "Wrote %08lx to HCDMA(%d)\n",
1486 (unsigned long)chan->xfer_dma, chan->hc_num);
1487 }
1488
1489 /* Start the split */
1490 if (chan->do_split) {
1491 u32 hcsplt = dwc2_readl(hsotg->regs + HCSPLT(chan->hc_num));
1492
1493 hcsplt |= HCSPLT_SPLTENA;
1494 dwc2_writel(hcsplt, hsotg->regs + HCSPLT(chan->hc_num));
1495 }
1496
1497 hcchar = dwc2_readl(hsotg->regs + HCCHAR(chan->hc_num));
1498 hcchar &= ~HCCHAR_MULTICNT_MASK;
1499 hcchar |= (ec_mc << HCCHAR_MULTICNT_SHIFT) & HCCHAR_MULTICNT_MASK;
1500 dwc2_hc_set_even_odd_frame(hsotg, chan, &hcchar);
1501
1502 if (hcchar & HCCHAR_CHDIS)
1503 dev_warn(hsotg->dev,
1504 "%s: chdis set, channel %d, hcchar 0x%08x\n",
1505 __func__, chan->hc_num, hcchar);
1506
1507 /* Set host channel enable after all other setup is complete */
1508 hcchar |= HCCHAR_CHENA;
1509 hcchar &= ~HCCHAR_CHDIS;
1510
1511 if (dbg_hc(chan))
1512 dev_vdbg(hsotg->dev, " Multi Cnt: %d\n",
1513 (hcchar & HCCHAR_MULTICNT_MASK) >>
1514 HCCHAR_MULTICNT_SHIFT);
1515
1516 dwc2_writel(hcchar, hsotg->regs + HCCHAR(chan->hc_num));
1517 if (dbg_hc(chan))
1518 dev_vdbg(hsotg->dev, "Wrote %08x to HCCHAR(%d)\n", hcchar,
1519 chan->hc_num);
1520
1521 chan->xfer_started = 1;
1522 chan->requests++;
1523
1524 if (hsotg->core_params->dma_enable <= 0 &&
1525 !chan->ep_is_in && chan->xfer_len > 0)
1526 /* Load OUT packet into the appropriate Tx FIFO */
1527 dwc2_hc_write_packet(hsotg, chan);
1528}
1529
1530/**
1531 * dwc2_hc_start_transfer_ddma() - Does the setup for a data transfer for a
1532 * host channel and starts the transfer in Descriptor DMA mode
1533 *
1534 * @hsotg: Programming view of DWC_otg controller
1535 * @chan: Information needed to initialize the host channel
1536 *
1537 * Initializes HCTSIZ register. For a PING transfer the Do Ping bit is set.
1538 * Sets PID and NTD values. For periodic transfers initializes SCHED_INFO field
1539 * with micro-frame bitmap.
1540 *
1541 * Initializes HCDMA register with descriptor list address and CTD value then
1542 * starts the transfer via enabling the channel.
1543 */
1544void dwc2_hc_start_transfer_ddma(struct dwc2_hsotg *hsotg,
1545 struct dwc2_host_chan *chan)
1546{
1547 u32 hcchar;
1548 u32 hctsiz = 0;
1549
1550 if (chan->do_ping)
1551 hctsiz |= TSIZ_DOPNG;
1552
1553 if (chan->ep_type == USB_ENDPOINT_XFER_ISOC)
1554 dwc2_set_pid_isoc(chan);
1555
1556 /* Packet Count and Xfer Size are not used in Descriptor DMA mode */
1557 hctsiz |= chan->data_pid_start << TSIZ_SC_MC_PID_SHIFT &
1558 TSIZ_SC_MC_PID_MASK;
1559
1560 /* 0 - 1 descriptor, 1 - 2 descriptors, etc */
1561 hctsiz |= (chan->ntd - 1) << TSIZ_NTD_SHIFT & TSIZ_NTD_MASK;
1562
1563 /* Non-zero only for high-speed interrupt endpoints */
1564 hctsiz |= chan->schinfo << TSIZ_SCHINFO_SHIFT & TSIZ_SCHINFO_MASK;
1565
1566 if (dbg_hc(chan)) {
1567 dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,
1568 chan->hc_num);
1569 dev_vdbg(hsotg->dev, " Start PID: %d\n",
1570 chan->data_pid_start);
1571 dev_vdbg(hsotg->dev, " NTD: %d\n", chan->ntd - 1);
1572 }
1573
1574 dwc2_writel(hctsiz, hsotg->regs + HCTSIZ(chan->hc_num));
1575
1576 dma_sync_single_for_device(hsotg->dev, chan->desc_list_addr,
1577 chan->desc_list_sz, DMA_TO_DEVICE);
1578
1579 dwc2_writel(chan->desc_list_addr, hsotg->regs + HCDMA(chan->hc_num));
1580
1581 if (dbg_hc(chan))
1582 dev_vdbg(hsotg->dev, "Wrote %pad to HCDMA(%d)\n",
1583 &chan->desc_list_addr, chan->hc_num);
1584
1585 hcchar = dwc2_readl(hsotg->regs + HCCHAR(chan->hc_num));
1586 hcchar &= ~HCCHAR_MULTICNT_MASK;
1587 hcchar |= chan->multi_count << HCCHAR_MULTICNT_SHIFT &
1588 HCCHAR_MULTICNT_MASK;
1589
1590 if (hcchar & HCCHAR_CHDIS)
1591 dev_warn(hsotg->dev,
1592 "%s: chdis set, channel %d, hcchar 0x%08x\n",
1593 __func__, chan->hc_num, hcchar);
1594
1595 /* Set host channel enable after all other setup is complete */
1596 hcchar |= HCCHAR_CHENA;
1597 hcchar &= ~HCCHAR_CHDIS;
1598
1599 if (dbg_hc(chan))
1600 dev_vdbg(hsotg->dev, " Multi Cnt: %d\n",
1601 (hcchar & HCCHAR_MULTICNT_MASK) >>
1602 HCCHAR_MULTICNT_SHIFT);
1603
1604 dwc2_writel(hcchar, hsotg->regs + HCCHAR(chan->hc_num));
1605 if (dbg_hc(chan))
1606 dev_vdbg(hsotg->dev, "Wrote %08x to HCCHAR(%d)\n", hcchar,
1607 chan->hc_num);
1608
1609 chan->xfer_started = 1;
1610 chan->requests++;
1611}
1612
1613/**
1614 * dwc2_hc_continue_transfer() - Continues a data transfer that was started by
1615 * a previous call to dwc2_hc_start_transfer()
1616 *
1617 * @hsotg: Programming view of DWC_otg controller
1618 * @chan: Information needed to initialize the host channel
1619 *
1620 * The caller must ensure there is sufficient space in the request queue and Tx
1621 * Data FIFO. This function should only be called in Slave mode. In DMA mode,
1622 * the controller acts autonomously to complete transfers programmed to a host
1623 * channel.
1624 *
1625 * For an OUT transfer, a new data packet is loaded into the appropriate FIFO
1626 * if there is any data remaining to be queued. For an IN transfer, another
1627 * data packet is always requested. For the SETUP phase of a control transfer,
1628 * this function does nothing.
1629 *
1630 * Return: 1 if a new request is queued, 0 if no more requests are required
1631 * for this transfer
1632 */
1633static int dwc2_hc_continue_transfer(struct dwc2_hsotg *hsotg,
1634 struct dwc2_host_chan *chan)
1635{
1636 if (dbg_hc(chan))
1637 dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,
1638 chan->hc_num);
1639
1640 if (chan->do_split)
1641 /* SPLITs always queue just once per channel */
1642 return 0;
1643
1644 if (chan->data_pid_start == DWC2_HC_PID_SETUP)
1645 /* SETUPs are queued only once since they can't be NAK'd */
1646 return 0;
1647
1648 if (chan->ep_is_in) {
1649 /*
1650 * Always queue another request for other IN transfers. If
1651 * back-to-back INs are issued and NAKs are received for both,
1652 * the driver may still be processing the first NAK when the
1653 * second NAK is received. When the interrupt handler clears
1654 * the NAK interrupt for the first NAK, the second NAK will
1655 * not be seen. So we can't depend on the NAK interrupt
1656 * handler to requeue a NAK'd request. Instead, IN requests
1657 * are issued each time this function is called. When the
1658 * transfer completes, the extra requests for the channel will
1659 * be flushed.
1660 */
1661 u32 hcchar = dwc2_readl(hsotg->regs + HCCHAR(chan->hc_num));
1662
1663 dwc2_hc_set_even_odd_frame(hsotg, chan, &hcchar);
1664 hcchar |= HCCHAR_CHENA;
1665 hcchar &= ~HCCHAR_CHDIS;
1666 if (dbg_hc(chan))
1667 dev_vdbg(hsotg->dev, " IN xfer: hcchar = 0x%08x\n",
1668 hcchar);
1669 dwc2_writel(hcchar, hsotg->regs + HCCHAR(chan->hc_num));
1670 chan->requests++;
1671 return 1;
1672 }
1673
1674 /* OUT transfers */
1675
1676 if (chan->xfer_count < chan->xfer_len) {
1677 if (chan->ep_type == USB_ENDPOINT_XFER_INT ||
1678 chan->ep_type == USB_ENDPOINT_XFER_ISOC) {
1679 u32 hcchar = dwc2_readl(hsotg->regs +
1680 HCCHAR(chan->hc_num));
1681
1682 dwc2_hc_set_even_odd_frame(hsotg, chan,
1683 &hcchar);
1684 }
1685
1686 /* Load OUT packet into the appropriate Tx FIFO */
1687 dwc2_hc_write_packet(hsotg, chan);
1688 chan->requests++;
1689 return 1;
1690 }
1691
1692 return 0;
1693}
1694
1695/*
1696 * =========================================================================
1697 * HCD
1698 * =========================================================================
1699 */
1700
1701/*
123 * Processes all the URBs in a single list of QHs. Completes them with 1702 * Processes all the URBs in a single list of QHs. Completes them with
124 * -ETIMEDOUT and frees the QTD. 1703 * -ETIMEDOUT and frees the QTD.
125 * 1704 *
@@ -164,6 +1743,9 @@ static void dwc2_qh_list_free(struct dwc2_hsotg *hsotg,
164 qtd_list_entry) 1743 qtd_list_entry)
165 dwc2_hcd_qtd_unlink_and_free(hsotg, qtd, qh); 1744 dwc2_hcd_qtd_unlink_and_free(hsotg, qtd, qh);
166 1745
1746 if (qh->channel && qh->channel->qh == qh)
1747 qh->channel->qh = NULL;
1748
167 spin_unlock_irqrestore(&hsotg->lock, flags); 1749 spin_unlock_irqrestore(&hsotg->lock, flags);
168 dwc2_hcd_qh_free(hsotg, qh); 1750 dwc2_hcd_qh_free(hsotg, qh);
169 spin_lock_irqsave(&hsotg->lock, flags); 1751 spin_lock_irqsave(&hsotg->lock, flags);
@@ -554,7 +2136,12 @@ static int dwc2_hcd_endpoint_disable(struct dwc2_hsotg *hsotg,
554 dwc2_hcd_qtd_unlink_and_free(hsotg, qtd, qh); 2136 dwc2_hcd_qtd_unlink_and_free(hsotg, qtd, qh);
555 2137
556 ep->hcpriv = NULL; 2138 ep->hcpriv = NULL;
2139
2140 if (qh->channel && qh->channel->qh == qh)
2141 qh->channel->qh = NULL;
2142
557 spin_unlock_irqrestore(&hsotg->lock, flags); 2143 spin_unlock_irqrestore(&hsotg->lock, flags);
2144
558 dwc2_hcd_qh_free(hsotg, qh); 2145 dwc2_hcd_qh_free(hsotg, qh);
559 2146
560 return 0; 2147 return 0;
@@ -580,6 +2167,224 @@ static int dwc2_hcd_endpoint_reset(struct dwc2_hsotg *hsotg,
580 return 0; 2167 return 0;
581} 2168}
582 2169
2170/**
2171 * dwc2_core_init() - Initializes the DWC_otg controller registers and
2172 * prepares the core for device mode or host mode operation
2173 *
2174 * @hsotg: Programming view of the DWC_otg controller
2175 * @initial_setup: If true then this is the first init for this instance.
2176 */
2177static int dwc2_core_init(struct dwc2_hsotg *hsotg, bool initial_setup)
2178{
2179 u32 usbcfg, otgctl;
2180 int retval;
2181
2182 dev_dbg(hsotg->dev, "%s(%p)\n", __func__, hsotg);
2183
2184 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
2185
2186 /* Set ULPI External VBUS bit if needed */
2187 usbcfg &= ~GUSBCFG_ULPI_EXT_VBUS_DRV;
2188 if (hsotg->core_params->phy_ulpi_ext_vbus ==
2189 DWC2_PHY_ULPI_EXTERNAL_VBUS)
2190 usbcfg |= GUSBCFG_ULPI_EXT_VBUS_DRV;
2191
2192 /* Set external TS Dline pulsing bit if needed */
2193 usbcfg &= ~GUSBCFG_TERMSELDLPULSE;
2194 if (hsotg->core_params->ts_dline > 0)
2195 usbcfg |= GUSBCFG_TERMSELDLPULSE;
2196
2197 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
2198
2199 /*
2200 * Reset the Controller
2201 *
2202 * We only need to reset the controller if this is a re-init.
2203 * For the first init we know for sure that earlier code reset us (it
2204 * needed to in order to properly detect various parameters).
2205 */
2206 if (!initial_setup) {
2207 retval = dwc2_core_reset_and_force_dr_mode(hsotg);
2208 if (retval) {
2209 dev_err(hsotg->dev, "%s(): Reset failed, aborting\n",
2210 __func__);
2211 return retval;
2212 }
2213 }
2214
2215 /*
2216 * This needs to happen in FS mode before any other programming occurs
2217 */
2218 retval = dwc2_phy_init(hsotg, initial_setup);
2219 if (retval)
2220 return retval;
2221
2222 /* Program the GAHBCFG Register */
2223 retval = dwc2_gahbcfg_init(hsotg);
2224 if (retval)
2225 return retval;
2226
2227 /* Program the GUSBCFG register */
2228 dwc2_gusbcfg_init(hsotg);
2229
2230 /* Program the GOTGCTL register */
2231 otgctl = dwc2_readl(hsotg->regs + GOTGCTL);
2232 otgctl &= ~GOTGCTL_OTGVER;
2233 if (hsotg->core_params->otg_ver > 0)
2234 otgctl |= GOTGCTL_OTGVER;
2235 dwc2_writel(otgctl, hsotg->regs + GOTGCTL);
2236 dev_dbg(hsotg->dev, "OTG VER PARAM: %d\n", hsotg->core_params->otg_ver);
2237
2238 /* Clear the SRP success bit for FS-I2c */
2239 hsotg->srp_success = 0;
2240
2241 /* Enable common interrupts */
2242 dwc2_enable_common_interrupts(hsotg);
2243
2244 /*
2245 * Do device or host initialization based on mode during PCD and
2246 * HCD initialization
2247 */
2248 if (dwc2_is_host_mode(hsotg)) {
2249 dev_dbg(hsotg->dev, "Host Mode\n");
2250 hsotg->op_state = OTG_STATE_A_HOST;
2251 } else {
2252 dev_dbg(hsotg->dev, "Device Mode\n");
2253 hsotg->op_state = OTG_STATE_B_PERIPHERAL;
2254 }
2255
2256 return 0;
2257}
2258
2259/**
2260 * dwc2_core_host_init() - Initializes the DWC_otg controller registers for
2261 * Host mode
2262 *
2263 * @hsotg: Programming view of DWC_otg controller
2264 *
2265 * This function flushes the Tx and Rx FIFOs and flushes any entries in the
2266 * request queues. Host channels are reset to ensure that they are ready for
2267 * performing transfers.
2268 */
2269static void dwc2_core_host_init(struct dwc2_hsotg *hsotg)
2270{
2271 u32 hcfg, hfir, otgctl;
2272
2273 dev_dbg(hsotg->dev, "%s(%p)\n", __func__, hsotg);
2274
2275 /* Restart the Phy Clock */
2276 dwc2_writel(0, hsotg->regs + PCGCTL);
2277
2278 /* Initialize Host Configuration Register */
2279 dwc2_init_fs_ls_pclk_sel(hsotg);
2280 if (hsotg->core_params->speed == DWC2_SPEED_PARAM_FULL) {
2281 hcfg = dwc2_readl(hsotg->regs + HCFG);
2282 hcfg |= HCFG_FSLSSUPP;
2283 dwc2_writel(hcfg, hsotg->regs + HCFG);
2284 }
2285
2286 /*
2287 * This bit allows dynamic reloading of the HFIR register during
2288 * runtime. This bit needs to be programmed during initial configuration
2289 * and its value must not be changed during runtime.
2290 */
2291 if (hsotg->core_params->reload_ctl > 0) {
2292 hfir = dwc2_readl(hsotg->regs + HFIR);
2293 hfir |= HFIR_RLDCTRL;
2294 dwc2_writel(hfir, hsotg->regs + HFIR);
2295 }
2296
2297 if (hsotg->core_params->dma_desc_enable > 0) {
2298 u32 op_mode = hsotg->hw_params.op_mode;
2299
2300 if (hsotg->hw_params.snpsid < DWC2_CORE_REV_2_90a ||
2301 !hsotg->hw_params.dma_desc_enable ||
2302 op_mode == GHWCFG2_OP_MODE_SRP_CAPABLE_DEVICE ||
2303 op_mode == GHWCFG2_OP_MODE_NO_SRP_CAPABLE_DEVICE ||
2304 op_mode == GHWCFG2_OP_MODE_UNDEFINED) {
2305 dev_err(hsotg->dev,
2306 "Hardware does not support descriptor DMA mode -\n");
2307 dev_err(hsotg->dev,
2308 "falling back to buffer DMA mode.\n");
2309 hsotg->core_params->dma_desc_enable = 0;
2310 } else {
2311 hcfg = dwc2_readl(hsotg->regs + HCFG);
2312 hcfg |= HCFG_DESCDMA;
2313 dwc2_writel(hcfg, hsotg->regs + HCFG);
2314 }
2315 }
2316
2317 /* Configure data FIFO sizes */
2318 dwc2_config_fifos(hsotg);
2319
2320 /* TODO - check this */
2321 /* Clear Host Set HNP Enable in the OTG Control Register */
2322 otgctl = dwc2_readl(hsotg->regs + GOTGCTL);
2323 otgctl &= ~GOTGCTL_HSTSETHNPEN;
2324 dwc2_writel(otgctl, hsotg->regs + GOTGCTL);
2325
2326 /* Make sure the FIFOs are flushed */
2327 dwc2_flush_tx_fifo(hsotg, 0x10 /* all TX FIFOs */);
2328 dwc2_flush_rx_fifo(hsotg);
2329
2330 /* Clear Host Set HNP Enable in the OTG Control Register */
2331 otgctl = dwc2_readl(hsotg->regs + GOTGCTL);
2332 otgctl &= ~GOTGCTL_HSTSETHNPEN;
2333 dwc2_writel(otgctl, hsotg->regs + GOTGCTL);
2334
2335 if (hsotg->core_params->dma_desc_enable <= 0) {
2336 int num_channels, i;
2337 u32 hcchar;
2338
2339 /* Flush out any leftover queued requests */
2340 num_channels = hsotg->core_params->host_channels;
2341 for (i = 0; i < num_channels; i++) {
2342 hcchar = dwc2_readl(hsotg->regs + HCCHAR(i));
2343 hcchar &= ~HCCHAR_CHENA;
2344 hcchar |= HCCHAR_CHDIS;
2345 hcchar &= ~HCCHAR_EPDIR;
2346 dwc2_writel(hcchar, hsotg->regs + HCCHAR(i));
2347 }
2348
2349 /* Halt all channels to put them into a known state */
2350 for (i = 0; i < num_channels; i++) {
2351 int count = 0;
2352
2353 hcchar = dwc2_readl(hsotg->regs + HCCHAR(i));
2354 hcchar |= HCCHAR_CHENA | HCCHAR_CHDIS;
2355 hcchar &= ~HCCHAR_EPDIR;
2356 dwc2_writel(hcchar, hsotg->regs + HCCHAR(i));
2357 dev_dbg(hsotg->dev, "%s: Halt channel %d\n",
2358 __func__, i);
2359 do {
2360 hcchar = dwc2_readl(hsotg->regs + HCCHAR(i));
2361 if (++count > 1000) {
2362 dev_err(hsotg->dev,
2363 "Unable to clear enable on channel %d\n",
2364 i);
2365 break;
2366 }
2367 udelay(1);
2368 } while (hcchar & HCCHAR_CHENA);
2369 }
2370 }
2371
2372 /* Turn on the vbus power */
2373 dev_dbg(hsotg->dev, "Init: Port Power? op_state=%d\n", hsotg->op_state);
2374 if (hsotg->op_state == OTG_STATE_A_HOST) {
2375 u32 hprt0 = dwc2_read_hprt0(hsotg);
2376
2377 dev_dbg(hsotg->dev, "Init: Power Port (%d)\n",
2378 !!(hprt0 & HPRT0_PWR));
2379 if (!(hprt0 & HPRT0_PWR)) {
2380 hprt0 |= HPRT0_PWR;
2381 dwc2_writel(hprt0, hsotg->regs + HPRT0);
2382 }
2383 }
2384
2385 dwc2_enable_host_interrupts(hsotg);
2386}
2387
583/* 2388/*
584 * Initializes dynamic portions of the DWC_otg HCD state 2389 * Initializes dynamic portions of the DWC_otg HCD state
585 * 2390 *
@@ -635,9 +2440,9 @@ static void dwc2_hc_init_split(struct dwc2_hsotg *hsotg,
635 chan->hub_port = (u8)hub_port; 2440 chan->hub_port = (u8)hub_port;
636} 2441}
637 2442
638static void *dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg, 2443static void dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg,
639 struct dwc2_host_chan *chan, 2444 struct dwc2_host_chan *chan,
640 struct dwc2_qtd *qtd, void *bufptr) 2445 struct dwc2_qtd *qtd)
641{ 2446{
642 struct dwc2_hcd_urb *urb = qtd->urb; 2447 struct dwc2_hcd_urb *urb = qtd->urb;
643 struct dwc2_hcd_iso_packet_desc *frame_desc; 2448 struct dwc2_hcd_iso_packet_desc *frame_desc;
@@ -657,7 +2462,6 @@ static void *dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg,
657 else 2462 else
658 chan->xfer_buf = urb->setup_packet; 2463 chan->xfer_buf = urb->setup_packet;
659 chan->xfer_len = 8; 2464 chan->xfer_len = 8;
660 bufptr = NULL;
661 break; 2465 break;
662 2466
663 case DWC2_CONTROL_DATA: 2467 case DWC2_CONTROL_DATA:
@@ -684,7 +2488,6 @@ static void *dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg,
684 chan->xfer_dma = hsotg->status_buf_dma; 2488 chan->xfer_dma = hsotg->status_buf_dma;
685 else 2489 else
686 chan->xfer_buf = hsotg->status_buf; 2490 chan->xfer_buf = hsotg->status_buf;
687 bufptr = NULL;
688 break; 2491 break;
689 } 2492 }
690 break; 2493 break;
@@ -717,14 +2520,6 @@ static void *dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg,
717 2520
718 chan->xfer_len = frame_desc->length - qtd->isoc_split_offset; 2521 chan->xfer_len = frame_desc->length - qtd->isoc_split_offset;
719 2522
720 /* For non-dword aligned buffers */
721 if (hsotg->core_params->dma_enable > 0 &&
722 (chan->xfer_dma & 0x3))
723 bufptr = (u8 *)urb->buf + frame_desc->offset +
724 qtd->isoc_split_offset;
725 else
726 bufptr = NULL;
727
728 if (chan->xact_pos == DWC2_HCSPLT_XACTPOS_ALL) { 2523 if (chan->xact_pos == DWC2_HCSPLT_XACTPOS_ALL) {
729 if (chan->xfer_len <= 188) 2524 if (chan->xfer_len <= 188)
730 chan->xact_pos = DWC2_HCSPLT_XACTPOS_ALL; 2525 chan->xact_pos = DWC2_HCSPLT_XACTPOS_ALL;
@@ -733,63 +2528,93 @@ static void *dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg,
733 } 2528 }
734 break; 2529 break;
735 } 2530 }
2531}
2532
2533#define DWC2_USB_DMA_ALIGN 4
2534
2535struct dma_aligned_buffer {
2536 void *kmalloc_ptr;
2537 void *old_xfer_buffer;
2538 u8 data[0];
2539};
2540
2541static void dwc2_free_dma_aligned_buffer(struct urb *urb)
2542{
2543 struct dma_aligned_buffer *temp;
2544
2545 if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
2546 return;
736 2547
737 return bufptr; 2548 temp = container_of(urb->transfer_buffer,
2549 struct dma_aligned_buffer, data);
2550
2551 if (usb_urb_dir_in(urb))
2552 memcpy(temp->old_xfer_buffer, temp->data,
2553 urb->transfer_buffer_length);
2554 urb->transfer_buffer = temp->old_xfer_buffer;
2555 kfree(temp->kmalloc_ptr);
2556
2557 urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
738} 2558}
739 2559
740static int dwc2_hc_setup_align_buf(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh, 2560static int dwc2_alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
741 struct dwc2_host_chan *chan,
742 struct dwc2_hcd_urb *urb, void *bufptr)
743{ 2561{
744 u32 buf_size; 2562 struct dma_aligned_buffer *temp, *kmalloc_ptr;
745 struct urb *usb_urb; 2563 size_t kmalloc_size;
746 struct usb_hcd *hcd;
747 2564
748 if (!qh->dw_align_buf) { 2565 if (urb->num_sgs || urb->sg ||
749 if (chan->ep_type != USB_ENDPOINT_XFER_ISOC) 2566 urb->transfer_buffer_length == 0 ||
750 buf_size = hsotg->core_params->max_transfer_size; 2567 !((uintptr_t)urb->transfer_buffer & (DWC2_USB_DMA_ALIGN - 1)))
751 else 2568 return 0;
752 /* 3072 = 3 max-size Isoc packets */
753 buf_size = 3072;
754 2569
755 qh->dw_align_buf = kmalloc(buf_size, GFP_ATOMIC | GFP_DMA); 2570 /* Allocate a buffer with enough padding for alignment */
756 if (!qh->dw_align_buf) 2571 kmalloc_size = urb->transfer_buffer_length +
757 return -ENOMEM; 2572 sizeof(struct dma_aligned_buffer) + DWC2_USB_DMA_ALIGN - 1;
758 qh->dw_align_buf_size = buf_size;
759 }
760 2573
761 if (chan->xfer_len) { 2574 kmalloc_ptr = kmalloc(kmalloc_size, mem_flags);
762 dev_vdbg(hsotg->dev, "%s(): non-aligned buffer\n", __func__); 2575 if (!kmalloc_ptr)
763 usb_urb = urb->priv; 2576 return -ENOMEM;
764 2577
765 if (usb_urb) { 2578 /* Position our struct dma_aligned_buffer such that data is aligned */
766 if (usb_urb->transfer_flags & 2579 temp = PTR_ALIGN(kmalloc_ptr + 1, DWC2_USB_DMA_ALIGN) - 1;
767 (URB_SETUP_MAP_SINGLE | URB_DMA_MAP_SG | 2580 temp->kmalloc_ptr = kmalloc_ptr;
768 URB_DMA_MAP_PAGE | URB_DMA_MAP_SINGLE)) { 2581 temp->old_xfer_buffer = urb->transfer_buffer;
769 hcd = dwc2_hsotg_to_hcd(hsotg); 2582 if (usb_urb_dir_out(urb))
770 usb_hcd_unmap_urb_for_dma(hcd, usb_urb); 2583 memcpy(temp->data, urb->transfer_buffer,
771 } 2584 urb->transfer_buffer_length);
772 if (!chan->ep_is_in) 2585 urb->transfer_buffer = temp->data;
773 memcpy(qh->dw_align_buf, bufptr,
774 chan->xfer_len);
775 } else {
776 dev_warn(hsotg->dev, "no URB in dwc2_urb\n");
777 }
778 }
779 2586
780 qh->dw_align_buf_dma = dma_map_single(hsotg->dev, 2587 urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;
781 qh->dw_align_buf, qh->dw_align_buf_size,
782 chan->ep_is_in ? DMA_FROM_DEVICE : DMA_TO_DEVICE);
783 if (dma_mapping_error(hsotg->dev, qh->dw_align_buf_dma)) {
784 dev_err(hsotg->dev, "can't map align_buf\n");
785 chan->align_buf = 0;
786 return -EINVAL;
787 }
788 2588
789 chan->align_buf = qh->dw_align_buf_dma;
790 return 0; 2589 return 0;
791} 2590}
792 2591
2592static int dwc2_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
2593 gfp_t mem_flags)
2594{
2595 int ret;
2596
2597 /* We assume setup_dma is always aligned; warn if not */
2598 WARN_ON_ONCE(urb->setup_dma &&
2599 (urb->setup_dma & (DWC2_USB_DMA_ALIGN - 1)));
2600
2601 ret = dwc2_alloc_dma_aligned_buffer(urb, mem_flags);
2602 if (ret)
2603 return ret;
2604
2605 ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
2606 if (ret)
2607 dwc2_free_dma_aligned_buffer(urb);
2608
2609 return ret;
2610}
2611
2612static void dwc2_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
2613{
2614 usb_hcd_unmap_urb_for_dma(hcd, urb);
2615 dwc2_free_dma_aligned_buffer(urb);
2616}
2617
793/** 2618/**
794 * dwc2_assign_and_init_hc() - Assigns transactions from a QTD to a free host 2619 * dwc2_assign_and_init_hc() - Assigns transactions from a QTD to a free host
795 * channel and initializes the host channel to perform the transactions. The 2620 * channel and initializes the host channel to perform the transactions. The
@@ -804,7 +2629,6 @@ static int dwc2_assign_and_init_hc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
804 struct dwc2_host_chan *chan; 2629 struct dwc2_host_chan *chan;
805 struct dwc2_hcd_urb *urb; 2630 struct dwc2_hcd_urb *urb;
806 struct dwc2_qtd *qtd; 2631 struct dwc2_qtd *qtd;
807 void *bufptr = NULL;
808 2632
809 if (dbg_qh(qh)) 2633 if (dbg_qh(qh))
810 dev_vdbg(hsotg->dev, "%s(%p,%p)\n", __func__, hsotg, qh); 2634 dev_vdbg(hsotg->dev, "%s(%p,%p)\n", __func__, hsotg, qh);
@@ -866,16 +2690,10 @@ static int dwc2_assign_and_init_hc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
866 !dwc2_hcd_is_pipe_in(&urb->pipe_info)) 2690 !dwc2_hcd_is_pipe_in(&urb->pipe_info))
867 urb->actual_length = urb->length; 2691 urb->actual_length = urb->length;
868 2692
869 if (hsotg->core_params->dma_enable > 0) { 2693 if (hsotg->core_params->dma_enable > 0)
870 chan->xfer_dma = urb->dma + urb->actual_length; 2694 chan->xfer_dma = urb->dma + urb->actual_length;
871 2695 else
872 /* For non-dword aligned case */
873 if (hsotg->core_params->dma_desc_enable <= 0 &&
874 (chan->xfer_dma & 0x3))
875 bufptr = (u8 *)urb->buf + urb->actual_length;
876 } else {
877 chan->xfer_buf = (u8 *)urb->buf + urb->actual_length; 2696 chan->xfer_buf = (u8 *)urb->buf + urb->actual_length;
878 }
879 2697
880 chan->xfer_len = urb->length - urb->actual_length; 2698 chan->xfer_len = urb->length - urb->actual_length;
881 chan->xfer_count = 0; 2699 chan->xfer_count = 0;
@@ -887,27 +2705,7 @@ static int dwc2_assign_and_init_hc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
887 chan->do_split = 0; 2705 chan->do_split = 0;
888 2706
889 /* Set the transfer attributes */ 2707 /* Set the transfer attributes */
890 bufptr = dwc2_hc_init_xfer(hsotg, chan, qtd, bufptr); 2708 dwc2_hc_init_xfer(hsotg, chan, qtd);
891
892 /* Non DWORD-aligned buffer case */
893 if (bufptr) {
894 dev_vdbg(hsotg->dev, "Non-aligned buffer\n");
895 if (dwc2_hc_setup_align_buf(hsotg, qh, chan, urb, bufptr)) {
896 dev_err(hsotg->dev,
897 "%s: Failed to allocate memory to handle non-dword aligned buffer\n",
898 __func__);
899 /* Add channel back to free list */
900 chan->align_buf = 0;
901 chan->multi_count = 0;
902 list_add_tail(&chan->hc_list_entry,
903 &hsotg->free_hc_list);
904 qtd->in_process = 0;
905 qh->channel = NULL;
906 return -ENOMEM;
907 }
908 } else {
909 chan->align_buf = 0;
910 }
911 2709
912 if (chan->ep_type == USB_ENDPOINT_XFER_INT || 2710 if (chan->ep_type == USB_ENDPOINT_XFER_INT ||
913 chan->ep_type == USB_ENDPOINT_XFER_ISOC) 2711 chan->ep_type == USB_ENDPOINT_XFER_ISOC)
@@ -968,7 +2766,8 @@ enum dwc2_transaction_type dwc2_hcd_select_transactions(
968 * periodic assigned schedule 2766 * periodic assigned schedule
969 */ 2767 */
970 qh_ptr = qh_ptr->next; 2768 qh_ptr = qh_ptr->next;
971 list_move(&qh->qh_list_entry, &hsotg->periodic_sched_assigned); 2769 list_move_tail(&qh->qh_list_entry,
2770 &hsotg->periodic_sched_assigned);
972 ret_val = DWC2_TRANSACTION_PERIODIC; 2771 ret_val = DWC2_TRANSACTION_PERIODIC;
973 } 2772 }
974 2773
@@ -1001,8 +2800,8 @@ enum dwc2_transaction_type dwc2_hcd_select_transactions(
1001 * non-periodic active schedule 2800 * non-periodic active schedule
1002 */ 2801 */
1003 qh_ptr = qh_ptr->next; 2802 qh_ptr = qh_ptr->next;
1004 list_move(&qh->qh_list_entry, 2803 list_move_tail(&qh->qh_list_entry,
1005 &hsotg->non_periodic_sched_active); 2804 &hsotg->non_periodic_sched_active);
1006 2805
1007 if (ret_val == DWC2_TRANSACTION_NONE) 2806 if (ret_val == DWC2_TRANSACTION_NONE)
1008 ret_val = DWC2_TRANSACTION_NON_PERIODIC; 2807 ret_val = DWC2_TRANSACTION_NON_PERIODIC;
@@ -1043,6 +2842,11 @@ static int dwc2_queue_transaction(struct dwc2_hsotg *hsotg,
1043{ 2842{
1044 int retval = 0; 2843 int retval = 0;
1045 2844
2845 if (chan->do_split)
2846 /* Put ourselves on the list to keep order straight */
2847 list_move_tail(&chan->split_order_list_entry,
2848 &hsotg->split_order);
2849
1046 if (hsotg->core_params->dma_enable > 0) { 2850 if (hsotg->core_params->dma_enable > 0) {
1047 if (hsotg->core_params->dma_desc_enable > 0) { 2851 if (hsotg->core_params->dma_desc_enable > 0) {
1048 if (!chan->xfer_started || 2852 if (!chan->xfer_started ||
@@ -1102,10 +2906,14 @@ static void dwc2_process_periodic_channels(struct dwc2_hsotg *hsotg)
1102 u32 fspcavail; 2906 u32 fspcavail;
1103 u32 gintmsk; 2907 u32 gintmsk;
1104 int status; 2908 int status;
1105 int no_queue_space = 0; 2909 bool no_queue_space = false;
1106 int no_fifo_space = 0; 2910 bool no_fifo_space = false;
1107 u32 qspcavail; 2911 u32 qspcavail;
1108 2912
2913 /* If empty list then just adjust interrupt enables */
2914 if (list_empty(&hsotg->periodic_sched_assigned))
2915 goto exit;
2916
1109 if (dbg_perio()) 2917 if (dbg_perio())
1110 dev_vdbg(hsotg->dev, "Queue periodic transactions\n"); 2918 dev_vdbg(hsotg->dev, "Queue periodic transactions\n");
1111 2919
@@ -1175,50 +2983,40 @@ static void dwc2_process_periodic_channels(struct dwc2_hsotg *hsotg)
1175 * Move the QH from the periodic assigned schedule to 2983 * Move the QH from the periodic assigned schedule to
1176 * the periodic queued schedule 2984 * the periodic queued schedule
1177 */ 2985 */
1178 list_move(&qh->qh_list_entry, 2986 list_move_tail(&qh->qh_list_entry,
1179 &hsotg->periodic_sched_queued); 2987 &hsotg->periodic_sched_queued);
1180 2988
1181 /* done queuing high bandwidth */ 2989 /* done queuing high bandwidth */
1182 hsotg->queuing_high_bandwidth = 0; 2990 hsotg->queuing_high_bandwidth = 0;
1183 } 2991 }
1184 } 2992 }
1185 2993
1186 if (hsotg->core_params->dma_enable <= 0) { 2994exit:
1187 tx_status = dwc2_readl(hsotg->regs + HPTXSTS); 2995 if (no_queue_space || no_fifo_space ||
1188 qspcavail = (tx_status & TXSTS_QSPCAVAIL_MASK) >> 2996 (hsotg->core_params->dma_enable <= 0 &&
1189 TXSTS_QSPCAVAIL_SHIFT; 2997 !list_empty(&hsotg->periodic_sched_assigned))) {
1190 fspcavail = (tx_status & TXSTS_FSPCAVAIL_MASK) >> 2998 /*
1191 TXSTS_FSPCAVAIL_SHIFT; 2999 * May need to queue more transactions as the request
1192 if (dbg_perio()) { 3000 * queue or Tx FIFO empties. Enable the periodic Tx
1193 dev_vdbg(hsotg->dev, 3001 * FIFO empty interrupt. (Always use the half-empty
1194 " P Tx Req Queue Space Avail (after queue): %d\n", 3002 * level to ensure that new requests are loaded as
1195 qspcavail); 3003 * soon as possible.)
1196 dev_vdbg(hsotg->dev, 3004 */
1197 " P Tx FIFO Space Avail (after queue): %d\n", 3005 gintmsk = dwc2_readl(hsotg->regs + GINTMSK);
1198 fspcavail); 3006 if (!(gintmsk & GINTSTS_PTXFEMP)) {
1199 }
1200
1201 if (!list_empty(&hsotg->periodic_sched_assigned) ||
1202 no_queue_space || no_fifo_space) {
1203 /*
1204 * May need to queue more transactions as the request
1205 * queue or Tx FIFO empties. Enable the periodic Tx
1206 * FIFO empty interrupt. (Always use the half-empty
1207 * level to ensure that new requests are loaded as
1208 * soon as possible.)
1209 */
1210 gintmsk = dwc2_readl(hsotg->regs + GINTMSK);
1211 gintmsk |= GINTSTS_PTXFEMP; 3007 gintmsk |= GINTSTS_PTXFEMP;
1212 dwc2_writel(gintmsk, hsotg->regs + GINTMSK); 3008 dwc2_writel(gintmsk, hsotg->regs + GINTMSK);
1213 } else { 3009 }
1214 /* 3010 } else {
1215 * Disable the Tx FIFO empty interrupt since there are 3011 /*
1216 * no more transactions that need to be queued right 3012 * Disable the Tx FIFO empty interrupt since there are
1217 * now. This function is called from interrupt 3013 * no more transactions that need to be queued right
1218 * handlers to queue more transactions as transfer 3014 * now. This function is called from interrupt
1219 * states change. 3015 * handlers to queue more transactions as transfer
1220 */ 3016 * states change.
1221 gintmsk = dwc2_readl(hsotg->regs + GINTMSK); 3017 */
3018 gintmsk = dwc2_readl(hsotg->regs + GINTMSK);
3019 if (gintmsk & GINTSTS_PTXFEMP) {
1222 gintmsk &= ~GINTSTS_PTXFEMP; 3020 gintmsk &= ~GINTSTS_PTXFEMP;
1223 dwc2_writel(gintmsk, hsotg->regs + GINTMSK); 3021 dwc2_writel(gintmsk, hsotg->regs + GINTMSK);
1224 } 3022 }
@@ -1365,9 +3163,8 @@ void dwc2_hcd_queue_transactions(struct dwc2_hsotg *hsotg,
1365 dev_vdbg(hsotg->dev, "Queue Transactions\n"); 3163 dev_vdbg(hsotg->dev, "Queue Transactions\n");
1366#endif 3164#endif
1367 /* Process host channels associated with periodic transfers */ 3165 /* Process host channels associated with periodic transfers */
1368 if ((tr_type == DWC2_TRANSACTION_PERIODIC || 3166 if (tr_type == DWC2_TRANSACTION_PERIODIC ||
1369 tr_type == DWC2_TRANSACTION_ALL) && 3167 tr_type == DWC2_TRANSACTION_ALL)
1370 !list_empty(&hsotg->periodic_sched_assigned))
1371 dwc2_process_periodic_channels(hsotg); 3168 dwc2_process_periodic_channels(hsotg);
1372 3169
1373 /* Process host channels associated with non-periodic transfers */ 3170 /* Process host channels associated with non-periodic transfers */
@@ -1947,6 +3744,35 @@ int dwc2_hcd_get_frame_number(struct dwc2_hsotg *hsotg)
1947 return (hfnum & HFNUM_FRNUM_MASK) >> HFNUM_FRNUM_SHIFT; 3744 return (hfnum & HFNUM_FRNUM_MASK) >> HFNUM_FRNUM_SHIFT;
1948} 3745}
1949 3746
3747int dwc2_hcd_get_future_frame_number(struct dwc2_hsotg *hsotg, int us)
3748{
3749 u32 hprt = dwc2_readl(hsotg->regs + HPRT0);
3750 u32 hfir = dwc2_readl(hsotg->regs + HFIR);
3751 u32 hfnum = dwc2_readl(hsotg->regs + HFNUM);
3752 unsigned int us_per_frame;
3753 unsigned int frame_number;
3754 unsigned int remaining;
3755 unsigned int interval;
3756 unsigned int phy_clks;
3757
3758 /* High speed has 125 us per (micro) frame; others are 1 ms per */
3759 us_per_frame = (hprt & HPRT0_SPD_MASK) ? 1000 : 125;
3760
3761 /* Extract fields */
3762 frame_number = (hfnum & HFNUM_FRNUM_MASK) >> HFNUM_FRNUM_SHIFT;
3763 remaining = (hfnum & HFNUM_FRREM_MASK) >> HFNUM_FRREM_SHIFT;
3764 interval = (hfir & HFIR_FRINT_MASK) >> HFIR_FRINT_SHIFT;
3765
3766 /*
3767 * Number of phy clocks since the last tick of the frame number after
3768 * "us" has passed.
3769 */
3770 phy_clks = (interval - remaining) +
3771 DIV_ROUND_UP(interval * us, us_per_frame);
3772
3773 return dwc2_frame_num_inc(frame_number, phy_clks / interval);
3774}
3775
1950int dwc2_hcd_is_b_host(struct dwc2_hsotg *hsotg) 3776int dwc2_hcd_is_b_host(struct dwc2_hsotg *hsotg)
1951{ 3777{
1952 return hsotg->op_state == OTG_STATE_B_HOST; 3778 return hsotg->op_state == OTG_STATE_B_HOST;
@@ -2223,6 +4049,90 @@ void dwc2_host_hub_info(struct dwc2_hsotg *hsotg, void *context, int *hub_addr,
2223 *hub_port = urb->dev->ttport; 4049 *hub_port = urb->dev->ttport;
2224} 4050}
2225 4051
4052/**
4053 * dwc2_host_get_tt_info() - Get the dwc2_tt associated with context
4054 *
4055 * This will get the dwc2_tt structure (and ttport) associated with the given
4056 * context (which is really just a struct urb pointer).
4057 *
4058 * The first time this is called for a given TT we allocate memory for our
4059 * structure. When everyone is done and has called dwc2_host_put_tt_info()
4060 * then the refcount for the structure will go to 0 and we'll free it.
4061 *
4062 * @hsotg: The HCD state structure for the DWC OTG controller.
4063 * @qh: The QH structure.
4064 * @context: The priv pointer from a struct dwc2_hcd_urb.
4065 * @mem_flags: Flags for allocating memory.
4066 * @ttport: We'll return this device's port number here. That's used to
4067 * reference into the bitmap if we're on a multi_tt hub.
4068 *
4069 * Return: a pointer to a struct dwc2_tt. Don't forget to call
4070 * dwc2_host_put_tt_info()! Returns NULL upon memory alloc failure.
4071 */
4072
4073struct dwc2_tt *dwc2_host_get_tt_info(struct dwc2_hsotg *hsotg, void *context,
4074 gfp_t mem_flags, int *ttport)
4075{
4076 struct urb *urb = context;
4077 struct dwc2_tt *dwc_tt = NULL;
4078
4079 if (urb->dev->tt) {
4080 *ttport = urb->dev->ttport;
4081
4082 dwc_tt = urb->dev->tt->hcpriv;
4083 if (dwc_tt == NULL) {
4084 size_t bitmap_size;
4085
4086 /*
4087 * For single_tt we need one schedule. For multi_tt
4088 * we need one per port.
4089 */
4090 bitmap_size = DWC2_ELEMENTS_PER_LS_BITMAP *
4091 sizeof(dwc_tt->periodic_bitmaps[0]);
4092 if (urb->dev->tt->multi)
4093 bitmap_size *= urb->dev->tt->hub->maxchild;
4094
4095 dwc_tt = kzalloc(sizeof(*dwc_tt) + bitmap_size,
4096 mem_flags);
4097 if (dwc_tt == NULL)
4098 return NULL;
4099
4100 dwc_tt->usb_tt = urb->dev->tt;
4101 dwc_tt->usb_tt->hcpriv = dwc_tt;
4102 }
4103
4104 dwc_tt->refcount++;
4105 }
4106
4107 return dwc_tt;
4108}
4109
4110/**
4111 * dwc2_host_put_tt_info() - Put the dwc2_tt from dwc2_host_get_tt_info()
4112 *
4113 * Frees resources allocated by dwc2_host_get_tt_info() if all current holders
4114 * of the structure are done.
4115 *
4116 * It's OK to call this with NULL.
4117 *
4118 * @hsotg: The HCD state structure for the DWC OTG controller.
4119 * @dwc_tt: The pointer returned by dwc2_host_get_tt_info.
4120 */
4121void dwc2_host_put_tt_info(struct dwc2_hsotg *hsotg, struct dwc2_tt *dwc_tt)
4122{
4123 /* Model kfree and make put of NULL a no-op */
4124 if (dwc_tt == NULL)
4125 return;
4126
4127 WARN_ON(dwc_tt->refcount < 1);
4128
4129 dwc_tt->refcount--;
4130 if (!dwc_tt->refcount) {
4131 dwc_tt->usb_tt->hcpriv = NULL;
4132 kfree(dwc_tt);
4133 }
4134}
4135
2226int dwc2_host_get_speed(struct dwc2_hsotg *hsotg, void *context) 4136int dwc2_host_get_speed(struct dwc2_hsotg *hsotg, void *context)
2227{ 4137{
2228 struct urb *urb = context; 4138 struct urb *urb = context;
@@ -2334,9 +4244,7 @@ void dwc2_host_complete(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd,
2334 kfree(qtd->urb); 4244 kfree(qtd->urb);
2335 qtd->urb = NULL; 4245 qtd->urb = NULL;
2336 4246
2337 spin_unlock(&hsotg->lock);
2338 usb_hcd_giveback_urb(dwc2_hsotg_to_hcd(hsotg), urb, status); 4247 usb_hcd_giveback_urb(dwc2_hsotg_to_hcd(hsotg), urb, status);
2339 spin_lock(&hsotg->lock);
2340} 4248}
2341 4249
2342/* 4250/*
@@ -2789,6 +4697,8 @@ static int _dwc2_hcd_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
2789fail3: 4697fail3:
2790 dwc2_urb->priv = NULL; 4698 dwc2_urb->priv = NULL;
2791 usb_hcd_unlink_urb_from_ep(hcd, urb); 4699 usb_hcd_unlink_urb_from_ep(hcd, urb);
4700 if (qh_allocated && qh->channel && qh->channel->qh == qh)
4701 qh->channel->qh = NULL;
2792fail2: 4702fail2:
2793 spin_unlock_irqrestore(&hsotg->lock, flags); 4703 spin_unlock_irqrestore(&hsotg->lock, flags);
2794 urb->hcpriv = NULL; 4704 urb->hcpriv = NULL;
@@ -2955,7 +4865,7 @@ static struct hc_driver dwc2_hc_driver = {
2955 .hcd_priv_size = sizeof(struct wrapper_priv_data), 4865 .hcd_priv_size = sizeof(struct wrapper_priv_data),
2956 4866
2957 .irq = _dwc2_hcd_irq, 4867 .irq = _dwc2_hcd_irq,
2958 .flags = HCD_MEMORY | HCD_USB2, 4868 .flags = HCD_MEMORY | HCD_USB2 | HCD_BH,
2959 4869
2960 .start = _dwc2_hcd_start, 4870 .start = _dwc2_hcd_start,
2961 .stop = _dwc2_hcd_stop, 4871 .stop = _dwc2_hcd_stop,
@@ -2971,6 +4881,9 @@ static struct hc_driver dwc2_hc_driver = {
2971 4881
2972 .bus_suspend = _dwc2_hcd_suspend, 4882 .bus_suspend = _dwc2_hcd_suspend,
2973 .bus_resume = _dwc2_hcd_resume, 4883 .bus_resume = _dwc2_hcd_resume,
4884
4885 .map_urb_for_dma = dwc2_map_urb_for_dma,
4886 .unmap_urb_for_dma = dwc2_unmap_urb_for_dma,
2974}; 4887};
2975 4888
2976/* 4889/*
@@ -3081,8 +4994,8 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
3081 FRAME_NUM_ARRAY_SIZE, GFP_KERNEL); 4994 FRAME_NUM_ARRAY_SIZE, GFP_KERNEL);
3082 if (!hsotg->last_frame_num_array) 4995 if (!hsotg->last_frame_num_array)
3083 goto error1; 4996 goto error1;
3084 hsotg->last_frame_num = HFNUM_MAX_FRNUM;
3085#endif 4997#endif
4998 hsotg->last_frame_num = HFNUM_MAX_FRNUM;
3086 4999
3087 /* Check if the bus driver or platform code has setup a dma_mask */ 5000 /* Check if the bus driver or platform code has setup a dma_mask */
3088 if (hsotg->core_params->dma_enable > 0 && 5001 if (hsotg->core_params->dma_enable > 0 &&
@@ -3146,6 +5059,8 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
3146 INIT_LIST_HEAD(&hsotg->periodic_sched_assigned); 5059 INIT_LIST_HEAD(&hsotg->periodic_sched_assigned);
3147 INIT_LIST_HEAD(&hsotg->periodic_sched_queued); 5060 INIT_LIST_HEAD(&hsotg->periodic_sched_queued);
3148 5061
5062 INIT_LIST_HEAD(&hsotg->split_order);
5063
3149 /* 5064 /*
3150 * Create a host channel descriptor for each host channel implemented 5065 * Create a host channel descriptor for each host channel implemented
3151 * in the controller. Initialize the channel descriptor array. 5066 * in the controller. Initialize the channel descriptor array.
@@ -3159,12 +5074,10 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq)
3159 if (channel == NULL) 5074 if (channel == NULL)
3160 goto error3; 5075 goto error3;
3161 channel->hc_num = i; 5076 channel->hc_num = i;
5077 INIT_LIST_HEAD(&channel->split_order_list_entry);
3162 hsotg->hc_ptr_array[i] = channel; 5078 hsotg->hc_ptr_array[i] = channel;
3163 } 5079 }
3164 5080
3165 if (hsotg->core_params->uframe_sched > 0)
3166 dwc2_hcd_init_usecs(hsotg);
3167
3168 /* Initialize hsotg start work */ 5081 /* Initialize hsotg start work */
3169 INIT_DELAYED_WORK(&hsotg->start_work, dwc2_hcd_start_func); 5082 INIT_DELAYED_WORK(&hsotg->start_work, dwc2_hcd_start_func);
3170 5083
@@ -3317,3 +5230,67 @@ void dwc2_hcd_remove(struct dwc2_hsotg *hsotg)
3317 kfree(hsotg->frame_num_array); 5230 kfree(hsotg->frame_num_array);
3318#endif 5231#endif
3319} 5232}
5233
5234/**
5235 * dwc2_backup_host_registers() - Backup controller host registers.
5236 * When suspending usb bus, registers needs to be backuped
5237 * if controller power is disabled once suspended.
5238 *
5239 * @hsotg: Programming view of the DWC_otg controller
5240 */
5241int dwc2_backup_host_registers(struct dwc2_hsotg *hsotg)
5242{
5243 struct dwc2_hregs_backup *hr;
5244 int i;
5245
5246 dev_dbg(hsotg->dev, "%s\n", __func__);
5247
5248 /* Backup Host regs */
5249 hr = &hsotg->hr_backup;
5250 hr->hcfg = dwc2_readl(hsotg->regs + HCFG);
5251 hr->haintmsk = dwc2_readl(hsotg->regs + HAINTMSK);
5252 for (i = 0; i < hsotg->core_params->host_channels; ++i)
5253 hr->hcintmsk[i] = dwc2_readl(hsotg->regs + HCINTMSK(i));
5254
5255 hr->hprt0 = dwc2_read_hprt0(hsotg);
5256 hr->hfir = dwc2_readl(hsotg->regs + HFIR);
5257 hr->valid = true;
5258
5259 return 0;
5260}
5261
5262/**
5263 * dwc2_restore_host_registers() - Restore controller host registers.
5264 * When resuming usb bus, device registers needs to be restored
5265 * if controller power were disabled.
5266 *
5267 * @hsotg: Programming view of the DWC_otg controller
5268 */
5269int dwc2_restore_host_registers(struct dwc2_hsotg *hsotg)
5270{
5271 struct dwc2_hregs_backup *hr;
5272 int i;
5273
5274 dev_dbg(hsotg->dev, "%s\n", __func__);
5275
5276 /* Restore host regs */
5277 hr = &hsotg->hr_backup;
5278 if (!hr->valid) {
5279 dev_err(hsotg->dev, "%s: no host registers to restore\n",
5280 __func__);
5281 return -EINVAL;
5282 }
5283 hr->valid = false;
5284
5285 dwc2_writel(hr->hcfg, hsotg->regs + HCFG);
5286 dwc2_writel(hr->haintmsk, hsotg->regs + HAINTMSK);
5287
5288 for (i = 0; i < hsotg->core_params->host_channels; ++i)
5289 dwc2_writel(hr->hcintmsk[i], hsotg->regs + HCINTMSK(i));
5290
5291 dwc2_writel(hr->hprt0, hsotg->regs + HPRT0);
5292 dwc2_writel(hr->hfir, hsotg->regs + HFIR);
5293 hsotg->frame_number = 0;
5294
5295 return 0;
5296}
diff --git a/drivers/usb/dwc2/hcd.h b/drivers/usb/dwc2/hcd.h
index 8f0a29cefdf7..89fa26cb25f4 100644
--- a/drivers/usb/dwc2/hcd.h
+++ b/drivers/usb/dwc2/hcd.h
@@ -75,8 +75,6 @@ struct dwc2_qh;
75 * (micro)frame 75 * (micro)frame
76 * @xfer_buf: Pointer to current transfer buffer position 76 * @xfer_buf: Pointer to current transfer buffer position
77 * @xfer_dma: DMA address of xfer_buf 77 * @xfer_dma: DMA address of xfer_buf
78 * @align_buf: In Buffer DMA mode this will be used if xfer_buf is not
79 * DWORD aligned
80 * @xfer_len: Total number of bytes to transfer 78 * @xfer_len: Total number of bytes to transfer
81 * @xfer_count: Number of bytes transferred so far 79 * @xfer_count: Number of bytes transferred so far
82 * @start_pkt_count: Packet count at start of transfer 80 * @start_pkt_count: Packet count at start of transfer
@@ -108,6 +106,7 @@ struct dwc2_qh;
108 * @hc_list_entry: For linking to list of host channels 106 * @hc_list_entry: For linking to list of host channels
109 * @desc_list_addr: Current QH's descriptor list DMA address 107 * @desc_list_addr: Current QH's descriptor list DMA address
110 * @desc_list_sz: Current QH's descriptor list size 108 * @desc_list_sz: Current QH's descriptor list size
109 * @split_order_list_entry: List entry for keeping track of the order of splits
111 * 110 *
112 * This structure represents the state of a single host channel when acting in 111 * This structure represents the state of a single host channel when acting in
113 * host mode. It contains the data items needed to transfer packets to an 112 * host mode. It contains the data items needed to transfer packets to an
@@ -133,7 +132,6 @@ struct dwc2_host_chan {
133 132
134 u8 *xfer_buf; 133 u8 *xfer_buf;
135 dma_addr_t xfer_dma; 134 dma_addr_t xfer_dma;
136 dma_addr_t align_buf;
137 u32 xfer_len; 135 u32 xfer_len;
138 u32 xfer_count; 136 u32 xfer_count;
139 u16 start_pkt_count; 137 u16 start_pkt_count;
@@ -161,6 +159,7 @@ struct dwc2_host_chan {
161 struct list_head hc_list_entry; 159 struct list_head hc_list_entry;
162 dma_addr_t desc_list_addr; 160 dma_addr_t desc_list_addr;
163 u32 desc_list_sz; 161 u32 desc_list_sz;
162 struct list_head split_order_list_entry;
164}; 163};
165 164
166struct dwc2_hcd_pipe_info { 165struct dwc2_hcd_pipe_info {
@@ -213,9 +212,47 @@ enum dwc2_transaction_type {
213 DWC2_TRANSACTION_ALL, 212 DWC2_TRANSACTION_ALL,
214}; 213};
215 214
215/* The number of elements per LS bitmap (per port on multi_tt) */
216#define DWC2_ELEMENTS_PER_LS_BITMAP DIV_ROUND_UP(DWC2_LS_SCHEDULE_SLICES, \
217 BITS_PER_LONG)
218
219/**
220 * struct dwc2_tt - dwc2 data associated with a usb_tt
221 *
222 * @refcount: Number of Queue Heads (QHs) holding a reference.
223 * @usb_tt: Pointer back to the official usb_tt.
224 * @periodic_bitmaps: Bitmap for which parts of the 1ms frame are accounted
225 * for already. Each is DWC2_ELEMENTS_PER_LS_BITMAP
226 * elements (so sizeof(long) times that in bytes).
227 *
228 * This structure is stored in the hcpriv of the official usb_tt.
229 */
230struct dwc2_tt {
231 int refcount;
232 struct usb_tt *usb_tt;
233 unsigned long periodic_bitmaps[];
234};
235
236/**
237 * struct dwc2_hs_transfer_time - Info about a transfer on the high speed bus.
238 *
239 * @start_schedule_usecs: The start time on the main bus schedule. Note that
240 * the main bus schedule is tightly packed and this
241 * time should be interpreted as tightly packed (so
242 * uFrame 0 starts at 0 us, uFrame 1 starts at 100 us
243 * instead of 125 us).
244 * @duration_us: How long this transfer goes.
245 */
246
247struct dwc2_hs_transfer_time {
248 u32 start_schedule_us;
249 u16 duration_us;
250};
251
216/** 252/**
217 * struct dwc2_qh - Software queue head structure 253 * struct dwc2_qh - Software queue head structure
218 * 254 *
255 * @hsotg: The HCD state structure for the DWC OTG controller
219 * @ep_type: Endpoint type. One of the following values: 256 * @ep_type: Endpoint type. One of the following values:
220 * - USB_ENDPOINT_XFER_CONTROL 257 * - USB_ENDPOINT_XFER_CONTROL
221 * - USB_ENDPOINT_XFER_BULK 258 * - USB_ENDPOINT_XFER_BULK
@@ -236,17 +273,35 @@ enum dwc2_transaction_type {
236 * @do_split: Full/low speed endpoint on high-speed hub requires split 273 * @do_split: Full/low speed endpoint on high-speed hub requires split
237 * @td_first: Index of first activated isochronous transfer descriptor 274 * @td_first: Index of first activated isochronous transfer descriptor
238 * @td_last: Index of last activated isochronous transfer descriptor 275 * @td_last: Index of last activated isochronous transfer descriptor
239 * @usecs: Bandwidth in microseconds per (micro)frame 276 * @host_us: Bandwidth in microseconds per transfer as seen by host
240 * @interval: Interval between transfers in (micro)frames 277 * @device_us: Bandwidth in microseconds per transfer as seen by device
241 * @sched_frame: (Micro)frame to initialize a periodic transfer. 278 * @host_interval: Interval between transfers as seen by the host. If
242 * The transfer executes in the following (micro)frame. 279 * the host is high speed and the device is low speed this
243 * @frame_usecs: Internal variable used by the microframe scheduler 280 * will be 8 times device interval.
244 * @start_split_frame: (Micro)frame at which last start split was initialized 281 * @device_interval: Interval between transfers as seen by the device.
282 * interval.
283 * @next_active_frame: (Micro)frame _before_ we next need to put something on
284 * the bus. We'll move the qh to active here. If the
285 * host is in high speed mode this will be a uframe. If
286 * the host is in low speed mode this will be a full frame.
287 * @start_active_frame: If we are partway through a split transfer, this will be
288 * what next_active_frame was when we started. Otherwise
289 * it should always be the same as next_active_frame.
290 * @num_hs_transfers: Number of transfers in hs_transfers.
291 * Normally this is 1 but can be more than one for splits.
292 * Always >= 1 unless the host is in low/full speed mode.
293 * @hs_transfers: Transfers that are scheduled as seen by the high speed
294 * bus. Not used if host is in low or full speed mode (but
295 * note that it IS USED if the device is low or full speed
296 * as long as the HOST is in high speed mode).
297 * @ls_start_schedule_slice: Start time (in slices) on the low speed bus
298 * schedule that's being used by this device. This
299 * will be on the periodic_bitmap in a
300 * "struct dwc2_tt". Not used if this device is high
301 * speed. Note that this is in "schedule slice" which
302 * is tightly packed.
303 * @ls_duration_us: Duration on the low speed bus schedule.
245 * @ntd: Actual number of transfer descriptors in a list 304 * @ntd: Actual number of transfer descriptors in a list
246 * @dw_align_buf: Used instead of original buffer if its physical address
247 * is not dword-aligned
248 * @dw_align_buf_size: Size of dw_align_buf
249 * @dw_align_buf_dma: DMA address for dw_align_buf
250 * @qtd_list: List of QTDs for this QH 305 * @qtd_list: List of QTDs for this QH
251 * @channel: Host channel currently processing transfers for this QH 306 * @channel: Host channel currently processing transfers for this QH
252 * @qh_list_entry: Entry for QH in either the periodic or non-periodic 307 * @qh_list_entry: Entry for QH in either the periodic or non-periodic
@@ -257,13 +312,20 @@ enum dwc2_transaction_type {
257 * @n_bytes: Xfer Bytes array. Each element corresponds to a transfer 312 * @n_bytes: Xfer Bytes array. Each element corresponds to a transfer
258 * descriptor and indicates original XferSize value for the 313 * descriptor and indicates original XferSize value for the
259 * descriptor 314 * descriptor
315 * @unreserve_timer: Timer for releasing periodic reservation.
316 * @dwc2_tt: Pointer to our tt info (or NULL if no tt).
317 * @ttport: Port number within our tt.
260 * @tt_buffer_dirty True if clear_tt_buffer_complete is pending 318 * @tt_buffer_dirty True if clear_tt_buffer_complete is pending
319 * @unreserve_pending: True if we planned to unreserve but haven't yet.
320 * @schedule_low_speed: True if we have a low/full speed component (either the
321 * host is in low/full speed mode or do_split).
261 * 322 *
262 * A Queue Head (QH) holds the static characteristics of an endpoint and 323 * A Queue Head (QH) holds the static characteristics of an endpoint and
263 * maintains a list of transfers (QTDs) for that endpoint. A QH structure may 324 * maintains a list of transfers (QTDs) for that endpoint. A QH structure may
264 * be entered in either the non-periodic or periodic schedule. 325 * be entered in either the non-periodic or periodic schedule.
265 */ 326 */
266struct dwc2_qh { 327struct dwc2_qh {
328 struct dwc2_hsotg *hsotg;
267 u8 ep_type; 329 u8 ep_type;
268 u8 ep_is_in; 330 u8 ep_is_in;
269 u16 maxp; 331 u16 maxp;
@@ -273,15 +335,16 @@ struct dwc2_qh {
273 u8 do_split; 335 u8 do_split;
274 u8 td_first; 336 u8 td_first;
275 u8 td_last; 337 u8 td_last;
276 u16 usecs; 338 u16 host_us;
277 u16 interval; 339 u16 device_us;
278 u16 sched_frame; 340 u16 host_interval;
279 u16 frame_usecs[8]; 341 u16 device_interval;
280 u16 start_split_frame; 342 u16 next_active_frame;
343 u16 start_active_frame;
344 s16 num_hs_transfers;
345 struct dwc2_hs_transfer_time hs_transfers[DWC2_HS_SCHEDULE_UFRAMES];
346 u32 ls_start_schedule_slice;
281 u16 ntd; 347 u16 ntd;
282 u8 *dw_align_buf;
283 int dw_align_buf_size;
284 dma_addr_t dw_align_buf_dma;
285 struct list_head qtd_list; 348 struct list_head qtd_list;
286 struct dwc2_host_chan *channel; 349 struct dwc2_host_chan *channel;
287 struct list_head qh_list_entry; 350 struct list_head qh_list_entry;
@@ -289,7 +352,12 @@ struct dwc2_qh {
289 dma_addr_t desc_list_dma; 352 dma_addr_t desc_list_dma;
290 u32 desc_list_sz; 353 u32 desc_list_sz;
291 u32 *n_bytes; 354 u32 *n_bytes;
355 struct timer_list unreserve_timer;
356 struct dwc2_tt *dwc_tt;
357 int ttport;
292 unsigned tt_buffer_dirty:1; 358 unsigned tt_buffer_dirty:1;
359 unsigned unreserve_pending:1;
360 unsigned schedule_low_speed:1;
293}; 361};
294 362
295/** 363/**
@@ -362,6 +430,8 @@ struct hc_xfer_info {
362}; 430};
363#endif 431#endif
364 432
433u32 dwc2_calc_frame_interval(struct dwc2_hsotg *hsotg);
434
365/* Gets the struct usb_hcd that contains a struct dwc2_hsotg */ 435/* Gets the struct usb_hcd that contains a struct dwc2_hsotg */
366static inline struct usb_hcd *dwc2_hsotg_to_hcd(struct dwc2_hsotg *hsotg) 436static inline struct usb_hcd *dwc2_hsotg_to_hcd(struct dwc2_hsotg *hsotg)
367{ 437{
@@ -383,6 +453,12 @@ static inline void disable_hc_int(struct dwc2_hsotg *hsotg, int chnum, u32 intr)
383 dwc2_writel(mask, hsotg->regs + HCINTMSK(chnum)); 453 dwc2_writel(mask, hsotg->regs + HCINTMSK(chnum));
384} 454}
385 455
456void dwc2_hc_cleanup(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan);
457void dwc2_hc_halt(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan,
458 enum dwc2_halt_status halt_status);
459void dwc2_hc_start_transfer_ddma(struct dwc2_hsotg *hsotg,
460 struct dwc2_host_chan *chan);
461
386/* 462/*
387 * Reads HPRT0 in preparation to modify. It keeps the WC bits 0 so that if they 463 * Reads HPRT0 in preparation to modify. It keeps the WC bits 0 so that if they
388 * are read as 1, they won't clear when written back. 464 * are read as 1, they won't clear when written back.
@@ -456,7 +532,6 @@ extern void dwc2_hcd_queue_transactions(struct dwc2_hsotg *hsotg,
456 532
457/* Schedule Queue Functions */ 533/* Schedule Queue Functions */
458/* Implemented in hcd_queue.c */ 534/* Implemented in hcd_queue.c */
459extern void dwc2_hcd_init_usecs(struct dwc2_hsotg *hsotg);
460extern struct dwc2_qh *dwc2_hcd_qh_create(struct dwc2_hsotg *hsotg, 535extern struct dwc2_qh *dwc2_hcd_qh_create(struct dwc2_hsotg *hsotg,
461 struct dwc2_hcd_urb *urb, 536 struct dwc2_hcd_urb *urb,
462 gfp_t mem_flags); 537 gfp_t mem_flags);
@@ -571,6 +646,11 @@ static inline u16 dwc2_frame_num_inc(u16 frame, u16 inc)
571 return (frame + inc) & HFNUM_MAX_FRNUM; 646 return (frame + inc) & HFNUM_MAX_FRNUM;
572} 647}
573 648
649static inline u16 dwc2_frame_num_dec(u16 frame, u16 dec)
650{
651 return (frame + HFNUM_MAX_FRNUM + 1 - dec) & HFNUM_MAX_FRNUM;
652}
653
574static inline u16 dwc2_full_frame_num(u16 frame) 654static inline u16 dwc2_full_frame_num(u16 frame)
575{ 655{
576 return (frame & HFNUM_MAX_FRNUM) >> 3; 656 return (frame & HFNUM_MAX_FRNUM) >> 3;
@@ -648,7 +728,7 @@ static inline u16 dwc2_hcd_get_ep_bandwidth(struct dwc2_hsotg *hsotg,
648 return 0; 728 return 0;
649 } 729 }
650 730
651 return qh->usecs; 731 return qh->host_us;
652} 732}
653 733
654extern void dwc2_hcd_save_data_toggle(struct dwc2_hsotg *hsotg, 734extern void dwc2_hcd_save_data_toggle(struct dwc2_hsotg *hsotg,
@@ -717,6 +797,12 @@ extern void dwc2_host_start(struct dwc2_hsotg *hsotg);
717extern void dwc2_host_disconnect(struct dwc2_hsotg *hsotg); 797extern void dwc2_host_disconnect(struct dwc2_hsotg *hsotg);
718extern void dwc2_host_hub_info(struct dwc2_hsotg *hsotg, void *context, 798extern void dwc2_host_hub_info(struct dwc2_hsotg *hsotg, void *context,
719 int *hub_addr, int *hub_port); 799 int *hub_addr, int *hub_port);
800extern struct dwc2_tt *dwc2_host_get_tt_info(struct dwc2_hsotg *hsotg,
801 void *context, gfp_t mem_flags,
802 int *ttport);
803
804extern void dwc2_host_put_tt_info(struct dwc2_hsotg *hsotg,
805 struct dwc2_tt *dwc_tt);
720extern int dwc2_host_get_speed(struct dwc2_hsotg *hsotg, void *context); 806extern int dwc2_host_get_speed(struct dwc2_hsotg *hsotg, void *context);
721extern void dwc2_host_complete(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd, 807extern void dwc2_host_complete(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd,
722 int status); 808 int status);
@@ -739,7 +825,7 @@ do { \
739 _qtd_ = list_entry((_qh_)->qtd_list.next, struct dwc2_qtd, \ 825 _qtd_ = list_entry((_qh_)->qtd_list.next, struct dwc2_qtd, \
740 qtd_list_entry); \ 826 qtd_list_entry); \
741 if (usb_pipeint(_qtd_->urb->pipe) && \ 827 if (usb_pipeint(_qtd_->urb->pipe) && \
742 (_qh_)->start_split_frame != 0 && !_qtd_->complete_split) { \ 828 (_qh_)->start_active_frame != 0 && !_qtd_->complete_split) { \
743 _hfnum_.d32 = dwc2_readl((_hcd_)->regs + HFNUM); \ 829 _hfnum_.d32 = dwc2_readl((_hcd_)->regs + HFNUM); \
744 switch (_hfnum_.b.frnum & 0x7) { \ 830 switch (_hfnum_.b.frnum & 0x7) { \
745 case 7: \ 831 case 7: \
diff --git a/drivers/usb/dwc2/hcd_ddma.c b/drivers/usb/dwc2/hcd_ddma.c
index a41274aa52ad..0e1d42b5dec5 100644
--- a/drivers/usb/dwc2/hcd_ddma.c
+++ b/drivers/usb/dwc2/hcd_ddma.c
@@ -81,7 +81,7 @@ static u16 dwc2_max_desc_num(struct dwc2_qh *qh)
81static u16 dwc2_frame_incr_val(struct dwc2_qh *qh) 81static u16 dwc2_frame_incr_val(struct dwc2_qh *qh)
82{ 82{
83 return qh->dev_speed == USB_SPEED_HIGH ? 83 return qh->dev_speed == USB_SPEED_HIGH ?
84 (qh->interval + 8 - 1) / 8 : qh->interval; 84 (qh->host_interval + 8 - 1) / 8 : qh->host_interval;
85} 85}
86 86
87static int dwc2_desc_list_alloc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh, 87static int dwc2_desc_list_alloc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
@@ -111,7 +111,7 @@ static int dwc2_desc_list_alloc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
111 dma_unmap_single(hsotg->dev, qh->desc_list_dma, 111 dma_unmap_single(hsotg->dev, qh->desc_list_dma,
112 qh->desc_list_sz, 112 qh->desc_list_sz,
113 DMA_FROM_DEVICE); 113 DMA_FROM_DEVICE);
114 kfree(qh->desc_list); 114 kmem_cache_free(desc_cache, qh->desc_list);
115 qh->desc_list = NULL; 115 qh->desc_list = NULL;
116 return -ENOMEM; 116 return -ENOMEM;
117 } 117 }
@@ -252,7 +252,7 @@ static void dwc2_update_frame_list(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
252 chan = qh->channel; 252 chan = qh->channel;
253 inc = dwc2_frame_incr_val(qh); 253 inc = dwc2_frame_incr_val(qh);
254 if (qh->ep_type == USB_ENDPOINT_XFER_ISOC) 254 if (qh->ep_type == USB_ENDPOINT_XFER_ISOC)
255 i = dwc2_frame_list_idx(qh->sched_frame); 255 i = dwc2_frame_list_idx(qh->next_active_frame);
256 else 256 else
257 i = 0; 257 i = 0;
258 258
@@ -278,13 +278,13 @@ static void dwc2_update_frame_list(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
278 return; 278 return;
279 279
280 chan->schinfo = 0; 280 chan->schinfo = 0;
281 if (chan->speed == USB_SPEED_HIGH && qh->interval) { 281 if (chan->speed == USB_SPEED_HIGH && qh->host_interval) {
282 j = 1; 282 j = 1;
283 /* TODO - check this */ 283 /* TODO - check this */
284 inc = (8 + qh->interval - 1) / qh->interval; 284 inc = (8 + qh->host_interval - 1) / qh->host_interval;
285 for (i = 0; i < inc; i++) { 285 for (i = 0; i < inc; i++) {
286 chan->schinfo |= j; 286 chan->schinfo |= j;
287 j = j << qh->interval; 287 j = j << qh->host_interval;
288 } 288 }
289 } else { 289 } else {
290 chan->schinfo = 0xff; 290 chan->schinfo = 0xff;
@@ -431,7 +431,10 @@ static u16 dwc2_calc_starting_frame(struct dwc2_hsotg *hsotg,
431 431
432 hsotg->frame_number = dwc2_hcd_get_frame_number(hsotg); 432 hsotg->frame_number = dwc2_hcd_get_frame_number(hsotg);
433 433
434 /* sched_frame is always frame number (not uFrame) both in FS and HS! */ 434 /*
435 * next_active_frame is always frame number (not uFrame) both in FS
436 * and HS!
437 */
435 438
436 /* 439 /*
437 * skip_frames is used to limit activated descriptors number 440 * skip_frames is used to limit activated descriptors number
@@ -514,13 +517,13 @@ static u16 dwc2_recalc_initial_desc_idx(struct dwc2_hsotg *hsotg,
514 */ 517 */
515 fr_idx_tmp = dwc2_frame_list_idx(frame); 518 fr_idx_tmp = dwc2_frame_list_idx(frame);
516 fr_idx = (FRLISTEN_64_SIZE + 519 fr_idx = (FRLISTEN_64_SIZE +
517 dwc2_frame_list_idx(qh->sched_frame) - fr_idx_tmp) 520 dwc2_frame_list_idx(qh->next_active_frame) -
518 % dwc2_frame_incr_val(qh); 521 fr_idx_tmp) % dwc2_frame_incr_val(qh);
519 fr_idx = (fr_idx + fr_idx_tmp) % FRLISTEN_64_SIZE; 522 fr_idx = (fr_idx + fr_idx_tmp) % FRLISTEN_64_SIZE;
520 } else { 523 } else {
521 qh->sched_frame = dwc2_calc_starting_frame(hsotg, qh, 524 qh->next_active_frame = dwc2_calc_starting_frame(hsotg, qh,
522 &skip_frames); 525 &skip_frames);
523 fr_idx = dwc2_frame_list_idx(qh->sched_frame); 526 fr_idx = dwc2_frame_list_idx(qh->next_active_frame);
524 } 527 }
525 528
526 qh->td_first = qh->td_last = dwc2_frame_to_desc_idx(qh, fr_idx); 529 qh->td_first = qh->td_last = dwc2_frame_to_desc_idx(qh, fr_idx);
@@ -583,7 +586,7 @@ static void dwc2_init_isoc_dma_desc(struct dwc2_hsotg *hsotg,
583 u16 next_idx; 586 u16 next_idx;
584 587
585 idx = qh->td_last; 588 idx = qh->td_last;
586 inc = qh->interval; 589 inc = qh->host_interval;
587 hsotg->frame_number = dwc2_hcd_get_frame_number(hsotg); 590 hsotg->frame_number = dwc2_hcd_get_frame_number(hsotg);
588 cur_idx = dwc2_frame_list_idx(hsotg->frame_number); 591 cur_idx = dwc2_frame_list_idx(hsotg->frame_number);
589 next_idx = dwc2_desclist_idx_inc(qh->td_last, inc, qh->dev_speed); 592 next_idx = dwc2_desclist_idx_inc(qh->td_last, inc, qh->dev_speed);
@@ -605,11 +608,11 @@ static void dwc2_init_isoc_dma_desc(struct dwc2_hsotg *hsotg,
605 } 608 }
606 } 609 }
607 610
608 if (qh->interval) { 611 if (qh->host_interval) {
609 ntd_max = (dwc2_max_desc_num(qh) + qh->interval - 1) / 612 ntd_max = (dwc2_max_desc_num(qh) + qh->host_interval - 1) /
610 qh->interval; 613 qh->host_interval;
611 if (skip_frames && !qh->channel) 614 if (skip_frames && !qh->channel)
612 ntd_max -= skip_frames / qh->interval; 615 ntd_max -= skip_frames / qh->host_interval;
613 } 616 }
614 617
615 max_xfer_size = qh->dev_speed == USB_SPEED_HIGH ? 618 max_xfer_size = qh->dev_speed == USB_SPEED_HIGH ?
@@ -1029,7 +1032,7 @@ static void dwc2_complete_isoc_xfer_ddma(struct dwc2_hsotg *hsotg,
1029 idx); 1032 idx);
1030 if (rc < 0) 1033 if (rc < 0)
1031 return; 1034 return;
1032 idx = dwc2_desclist_idx_inc(idx, qh->interval, 1035 idx = dwc2_desclist_idx_inc(idx, qh->host_interval,
1033 chan->speed); 1036 chan->speed);
1034 if (!rc) 1037 if (!rc)
1035 continue; 1038 continue;
@@ -1039,7 +1042,7 @@ static void dwc2_complete_isoc_xfer_ddma(struct dwc2_hsotg *hsotg,
1039 1042
1040 /* rc == DWC2_CMPL_STOP */ 1043 /* rc == DWC2_CMPL_STOP */
1041 1044
1042 if (qh->interval >= 32) 1045 if (qh->host_interval >= 32)
1043 goto stop_scan; 1046 goto stop_scan;
1044 1047
1045 qh->td_first = idx; 1048 qh->td_first = idx;
@@ -1242,8 +1245,10 @@ static void dwc2_complete_non_isoc_xfer_ddma(struct dwc2_hsotg *hsotg,
1242 for (i = 0; i < qtd_desc_count; i++) { 1245 for (i = 0; i < qtd_desc_count; i++) {
1243 if (dwc2_process_non_isoc_desc(hsotg, chan, chnum, qtd, 1246 if (dwc2_process_non_isoc_desc(hsotg, chan, chnum, qtd,
1244 desc_num, halt_status, 1247 desc_num, halt_status,
1245 &xfer_done)) 1248 &xfer_done)) {
1249 qtd = NULL;
1246 goto stop_scan; 1250 goto stop_scan;
1251 }
1247 1252
1248 desc_num++; 1253 desc_num++;
1249 } 1254 }
@@ -1258,7 +1263,7 @@ stop_scan:
1258 if (halt_status == DWC2_HC_XFER_STALL) 1263 if (halt_status == DWC2_HC_XFER_STALL)
1259 qh->data_toggle = DWC2_HC_PID_DATA0; 1264 qh->data_toggle = DWC2_HC_PID_DATA0;
1260 else 1265 else
1261 dwc2_hcd_save_data_toggle(hsotg, chan, chnum, qtd); 1266 dwc2_hcd_save_data_toggle(hsotg, chan, chnum, NULL);
1262 } 1267 }
1263 1268
1264 if (halt_status == DWC2_HC_XFER_COMPLETE) { 1269 if (halt_status == DWC2_HC_XFER_COMPLETE) {
@@ -1326,8 +1331,8 @@ void dwc2_hcd_complete_xfer_ddma(struct dwc2_hsotg *hsotg,
1326 dwc2_hcd_qh_unlink(hsotg, qh); 1331 dwc2_hcd_qh_unlink(hsotg, qh);
1327 } else { 1332 } else {
1328 /* Keep in assigned schedule to continue transfer */ 1333 /* Keep in assigned schedule to continue transfer */
1329 list_move(&qh->qh_list_entry, 1334 list_move_tail(&qh->qh_list_entry,
1330 &hsotg->periodic_sched_assigned); 1335 &hsotg->periodic_sched_assigned);
1331 /* 1336 /*
1332 * If channel has been halted during giveback of urb 1337 * If channel has been halted during giveback of urb
1333 * then prevent any new scheduling. 1338 * then prevent any new scheduling.
diff --git a/drivers/usb/dwc2/hcd_intr.c b/drivers/usb/dwc2/hcd_intr.c
index cadba8b13c48..906f223542ee 100644
--- a/drivers/usb/dwc2/hcd_intr.c
+++ b/drivers/usb/dwc2/hcd_intr.c
@@ -55,12 +55,16 @@
55/* This function is for debug only */ 55/* This function is for debug only */
56static void dwc2_track_missed_sofs(struct dwc2_hsotg *hsotg) 56static void dwc2_track_missed_sofs(struct dwc2_hsotg *hsotg)
57{ 57{
58#ifdef CONFIG_USB_DWC2_TRACK_MISSED_SOFS
59 u16 curr_frame_number = hsotg->frame_number; 58 u16 curr_frame_number = hsotg->frame_number;
59 u16 expected = dwc2_frame_num_inc(hsotg->last_frame_num, 1);
60
61 if (expected != curr_frame_number)
62 dwc2_sch_vdbg(hsotg, "MISSED SOF %04x != %04x\n",
63 expected, curr_frame_number);
60 64
65#ifdef CONFIG_USB_DWC2_TRACK_MISSED_SOFS
61 if (hsotg->frame_num_idx < FRAME_NUM_ARRAY_SIZE) { 66 if (hsotg->frame_num_idx < FRAME_NUM_ARRAY_SIZE) {
62 if (((hsotg->last_frame_num + 1) & HFNUM_MAX_FRNUM) != 67 if (expected != curr_frame_number) {
63 curr_frame_number) {
64 hsotg->frame_num_array[hsotg->frame_num_idx] = 68 hsotg->frame_num_array[hsotg->frame_num_idx] =
65 curr_frame_number; 69 curr_frame_number;
66 hsotg->last_frame_num_array[hsotg->frame_num_idx] = 70 hsotg->last_frame_num_array[hsotg->frame_num_idx] =
@@ -79,14 +83,15 @@ static void dwc2_track_missed_sofs(struct dwc2_hsotg *hsotg)
79 } 83 }
80 hsotg->dumped_frame_num_array = 1; 84 hsotg->dumped_frame_num_array = 1;
81 } 85 }
82 hsotg->last_frame_num = curr_frame_number;
83#endif 86#endif
87 hsotg->last_frame_num = curr_frame_number;
84} 88}
85 89
86static void dwc2_hc_handle_tt_clear(struct dwc2_hsotg *hsotg, 90static void dwc2_hc_handle_tt_clear(struct dwc2_hsotg *hsotg,
87 struct dwc2_host_chan *chan, 91 struct dwc2_host_chan *chan,
88 struct dwc2_qtd *qtd) 92 struct dwc2_qtd *qtd)
89{ 93{
94 struct usb_device *root_hub = dwc2_hsotg_to_hcd(hsotg)->self.root_hub;
90 struct urb *usb_urb; 95 struct urb *usb_urb;
91 96
92 if (!chan->qh) 97 if (!chan->qh)
@@ -102,6 +107,15 @@ static void dwc2_hc_handle_tt_clear(struct dwc2_hsotg *hsotg,
102 if (!usb_urb || !usb_urb->dev || !usb_urb->dev->tt) 107 if (!usb_urb || !usb_urb->dev || !usb_urb->dev->tt)
103 return; 108 return;
104 109
110 /*
111 * The root hub doesn't really have a TT, but Linux thinks it
112 * does because how could you have a "high speed hub" that
113 * directly talks directly to low speed devices without a TT?
114 * It's all lies. Lies, I tell you.
115 */
116 if (usb_urb->dev->tt->hub == root_hub)
117 return;
118
105 if (qtd->urb->status != -EPIPE && qtd->urb->status != -EREMOTEIO) { 119 if (qtd->urb->status != -EPIPE && qtd->urb->status != -EREMOTEIO) {
106 chan->qh->tt_buffer_dirty = 1; 120 chan->qh->tt_buffer_dirty = 1;
107 if (usb_hub_clear_tt_buffer(usb_urb)) 121 if (usb_hub_clear_tt_buffer(usb_urb))
@@ -138,13 +152,19 @@ static void dwc2_sof_intr(struct dwc2_hsotg *hsotg)
138 while (qh_entry != &hsotg->periodic_sched_inactive) { 152 while (qh_entry != &hsotg->periodic_sched_inactive) {
139 qh = list_entry(qh_entry, struct dwc2_qh, qh_list_entry); 153 qh = list_entry(qh_entry, struct dwc2_qh, qh_list_entry);
140 qh_entry = qh_entry->next; 154 qh_entry = qh_entry->next;
141 if (dwc2_frame_num_le(qh->sched_frame, hsotg->frame_number)) 155 if (dwc2_frame_num_le(qh->next_active_frame,
156 hsotg->frame_number)) {
157 dwc2_sch_vdbg(hsotg, "QH=%p ready fn=%04x, nxt=%04x\n",
158 qh, hsotg->frame_number,
159 qh->next_active_frame);
160
142 /* 161 /*
143 * Move QH to the ready list to be executed next 162 * Move QH to the ready list to be executed next
144 * (micro)frame 163 * (micro)frame
145 */ 164 */
146 list_move(&qh->qh_list_entry, 165 list_move_tail(&qh->qh_list_entry,
147 &hsotg->periodic_sched_ready); 166 &hsotg->periodic_sched_ready);
167 }
148 } 168 }
149 tr_type = dwc2_hcd_select_transactions(hsotg); 169 tr_type = dwc2_hcd_select_transactions(hsotg);
150 if (tr_type != DWC2_TRANSACTION_NONE) 170 if (tr_type != DWC2_TRANSACTION_NONE)
@@ -472,18 +492,6 @@ static int dwc2_update_urb_state(struct dwc2_hsotg *hsotg,
472 xfer_length = urb->length - urb->actual_length; 492 xfer_length = urb->length - urb->actual_length;
473 } 493 }
474 494
475 /* Non DWORD-aligned buffer case handling */
476 if (chan->align_buf && xfer_length) {
477 dev_vdbg(hsotg->dev, "%s(): non-aligned buffer\n", __func__);
478 dma_unmap_single(hsotg->dev, chan->qh->dw_align_buf_dma,
479 chan->qh->dw_align_buf_size,
480 chan->ep_is_in ?
481 DMA_FROM_DEVICE : DMA_TO_DEVICE);
482 if (chan->ep_is_in)
483 memcpy(urb->buf + urb->actual_length,
484 chan->qh->dw_align_buf, xfer_length);
485 }
486
487 dev_vdbg(hsotg->dev, "urb->actual_length=%d xfer_length=%d\n", 495 dev_vdbg(hsotg->dev, "urb->actual_length=%d xfer_length=%d\n",
488 urb->actual_length, xfer_length); 496 urb->actual_length, xfer_length);
489 urb->actual_length += xfer_length; 497 urb->actual_length += xfer_length;
@@ -573,21 +581,6 @@ static enum dwc2_halt_status dwc2_update_isoc_urb_state(
573 frame_desc->status = 0; 581 frame_desc->status = 0;
574 frame_desc->actual_length = dwc2_get_actual_xfer_length(hsotg, 582 frame_desc->actual_length = dwc2_get_actual_xfer_length(hsotg,
575 chan, chnum, qtd, halt_status, NULL); 583 chan, chnum, qtd, halt_status, NULL);
576
577 /* Non DWORD-aligned buffer case handling */
578 if (chan->align_buf && frame_desc->actual_length) {
579 dev_vdbg(hsotg->dev, "%s(): non-aligned buffer\n",
580 __func__);
581 dma_unmap_single(hsotg->dev, chan->qh->dw_align_buf_dma,
582 chan->qh->dw_align_buf_size,
583 chan->ep_is_in ?
584 DMA_FROM_DEVICE : DMA_TO_DEVICE);
585 if (chan->ep_is_in)
586 memcpy(urb->buf + frame_desc->offset +
587 qtd->isoc_split_offset,
588 chan->qh->dw_align_buf,
589 frame_desc->actual_length);
590 }
591 break; 584 break;
592 case DWC2_HC_XFER_FRAME_OVERRUN: 585 case DWC2_HC_XFER_FRAME_OVERRUN:
593 urb->error_count++; 586 urb->error_count++;
@@ -608,21 +601,6 @@ static enum dwc2_halt_status dwc2_update_isoc_urb_state(
608 frame_desc->actual_length = dwc2_get_actual_xfer_length(hsotg, 601 frame_desc->actual_length = dwc2_get_actual_xfer_length(hsotg,
609 chan, chnum, qtd, halt_status, NULL); 602 chan, chnum, qtd, halt_status, NULL);
610 603
611 /* Non DWORD-aligned buffer case handling */
612 if (chan->align_buf && frame_desc->actual_length) {
613 dev_vdbg(hsotg->dev, "%s(): non-aligned buffer\n",
614 __func__);
615 dma_unmap_single(hsotg->dev, chan->qh->dw_align_buf_dma,
616 chan->qh->dw_align_buf_size,
617 chan->ep_is_in ?
618 DMA_FROM_DEVICE : DMA_TO_DEVICE);
619 if (chan->ep_is_in)
620 memcpy(urb->buf + frame_desc->offset +
621 qtd->isoc_split_offset,
622 chan->qh->dw_align_buf,
623 frame_desc->actual_length);
624 }
625
626 /* Skip whole frame */ 604 /* Skip whole frame */
627 if (chan->qh->do_split && 605 if (chan->qh->do_split &&
628 chan->ep_type == USB_ENDPOINT_XFER_ISOC && chan->ep_is_in && 606 chan->ep_type == USB_ENDPOINT_XFER_ISOC && chan->ep_is_in &&
@@ -688,8 +666,6 @@ static void dwc2_deactivate_qh(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
688 } 666 }
689 667
690no_qtd: 668no_qtd:
691 if (qh->channel)
692 qh->channel->align_buf = 0;
693 qh->channel = NULL; 669 qh->channel = NULL;
694 dwc2_hcd_qh_deactivate(hsotg, qh, continue_split); 670 dwc2_hcd_qh_deactivate(hsotg, qh, continue_split);
695} 671}
@@ -846,7 +822,7 @@ static void dwc2_halt_channel(struct dwc2_hsotg *hsotg,
846 * halt to be queued when the periodic schedule is 822 * halt to be queued when the periodic schedule is
847 * processed. 823 * processed.
848 */ 824 */
849 list_move(&chan->qh->qh_list_entry, 825 list_move_tail(&chan->qh->qh_list_entry,
850 &hsotg->periodic_sched_assigned); 826 &hsotg->periodic_sched_assigned);
851 827
852 /* 828 /*
@@ -954,14 +930,6 @@ static int dwc2_xfercomp_isoc_split_in(struct dwc2_hsotg *hsotg,
954 930
955 frame_desc->actual_length += len; 931 frame_desc->actual_length += len;
956 932
957 if (chan->align_buf) {
958 dev_vdbg(hsotg->dev, "%s(): non-aligned buffer\n", __func__);
959 dma_unmap_single(hsotg->dev, chan->qh->dw_align_buf_dma,
960 chan->qh->dw_align_buf_size, DMA_FROM_DEVICE);
961 memcpy(qtd->urb->buf + frame_desc->offset +
962 qtd->isoc_split_offset, chan->qh->dw_align_buf, len);
963 }
964
965 qtd->isoc_split_offset += len; 933 qtd->isoc_split_offset += len;
966 934
967 if (frame_desc->actual_length >= frame_desc->length) { 935 if (frame_desc->actual_length >= frame_desc->length) {
@@ -1184,19 +1152,6 @@ static void dwc2_update_urb_state_abn(struct dwc2_hsotg *hsotg,
1184 xfer_length = urb->length - urb->actual_length; 1152 xfer_length = urb->length - urb->actual_length;
1185 } 1153 }
1186 1154
1187 /* Non DWORD-aligned buffer case handling */
1188 if (chan->align_buf && xfer_length && chan->ep_is_in) {
1189 dev_vdbg(hsotg->dev, "%s(): non-aligned buffer\n", __func__);
1190 dma_unmap_single(hsotg->dev, chan->qh->dw_align_buf_dma,
1191 chan->qh->dw_align_buf_size,
1192 chan->ep_is_in ?
1193 DMA_FROM_DEVICE : DMA_TO_DEVICE);
1194 if (chan->ep_is_in)
1195 memcpy(urb->buf + urb->actual_length,
1196 chan->qh->dw_align_buf,
1197 xfer_length);
1198 }
1199
1200 urb->actual_length += xfer_length; 1155 urb->actual_length += xfer_length;
1201 1156
1202 hctsiz = dwc2_readl(hsotg->regs + HCTSIZ(chnum)); 1157 hctsiz = dwc2_readl(hsotg->regs + HCTSIZ(chnum));
@@ -1416,14 +1371,50 @@ static void dwc2_hc_nyet_intr(struct dwc2_hsotg *hsotg,
1416 1371
1417 if (chan->ep_type == USB_ENDPOINT_XFER_INT || 1372 if (chan->ep_type == USB_ENDPOINT_XFER_INT ||
1418 chan->ep_type == USB_ENDPOINT_XFER_ISOC) { 1373 chan->ep_type == USB_ENDPOINT_XFER_ISOC) {
1419 int frnum = dwc2_hcd_get_frame_number(hsotg); 1374 struct dwc2_qh *qh = chan->qh;
1375 bool past_end;
1376
1377 if (hsotg->core_params->uframe_sched <= 0) {
1378 int frnum = dwc2_hcd_get_frame_number(hsotg);
1379
1380 /* Don't have num_hs_transfers; simple logic */
1381 past_end = dwc2_full_frame_num(frnum) !=
1382 dwc2_full_frame_num(qh->next_active_frame);
1383 } else {
1384 int end_frnum;
1420 1385
1421 if (dwc2_full_frame_num(frnum) !=
1422 dwc2_full_frame_num(chan->qh->sched_frame)) {
1423 /* 1386 /*
1424 * No longer in the same full speed frame. 1387 * Figure out the end frame based on schedule.
1425 * Treat this as a transaction error. 1388 *
1426 */ 1389 * We don't want to go on trying again and again
1390 * forever. Let's stop when we've done all the
1391 * transfers that were scheduled.
1392 *
1393 * We're going to be comparing start_active_frame
1394 * and next_active_frame, both of which are 1
1395 * before the time the packet goes on the wire,
1396 * so that cancels out. Basically if had 1
1397 * transfer and we saw 1 NYET then we're done.
1398 * We're getting a NYET here so if next >=
1399 * (start + num_transfers) we're done. The
1400 * complexity is that for all but ISOC_OUT we
1401 * skip one slot.
1402 */
1403 end_frnum = dwc2_frame_num_inc(
1404 qh->start_active_frame,
1405 qh->num_hs_transfers);
1406
1407 if (qh->ep_type != USB_ENDPOINT_XFER_ISOC ||
1408 qh->ep_is_in)
1409 end_frnum =
1410 dwc2_frame_num_inc(end_frnum, 1);
1411
1412 past_end = dwc2_frame_num_le(
1413 end_frnum, qh->next_active_frame);
1414 }
1415
1416 if (past_end) {
1417 /* Treat this as a transaction error. */
1427#if 0 1418#if 0
1428 /* 1419 /*
1429 * Todo: Fix system performance so this can 1420 * Todo: Fix system performance so this can
@@ -2008,6 +1999,16 @@ static void dwc2_hc_n_intr(struct dwc2_hsotg *hsotg, int chnum)
2008 } 1999 }
2009 2000
2010 dwc2_writel(hcint, hsotg->regs + HCINT(chnum)); 2001 dwc2_writel(hcint, hsotg->regs + HCINT(chnum));
2002
2003 /*
2004 * If we got an interrupt after someone called
2005 * dwc2_hcd_endpoint_disable() we don't want to crash below
2006 */
2007 if (!chan->qh) {
2008 dev_warn(hsotg->dev, "Interrupt on disabled channel\n");
2009 return;
2010 }
2011
2011 chan->hcint = hcint; 2012 chan->hcint = hcint;
2012 hcint &= hcintmsk; 2013 hcint &= hcintmsk;
2013 2014
@@ -2130,6 +2131,7 @@ static void dwc2_hc_intr(struct dwc2_hsotg *hsotg)
2130{ 2131{
2131 u32 haint; 2132 u32 haint;
2132 int i; 2133 int i;
2134 struct dwc2_host_chan *chan, *chan_tmp;
2133 2135
2134 haint = dwc2_readl(hsotg->regs + HAINT); 2136 haint = dwc2_readl(hsotg->regs + HAINT);
2135 if (dbg_perio()) { 2137 if (dbg_perio()) {
@@ -2138,6 +2140,22 @@ static void dwc2_hc_intr(struct dwc2_hsotg *hsotg)
2138 dev_vdbg(hsotg->dev, "HAINT=%08x\n", haint); 2140 dev_vdbg(hsotg->dev, "HAINT=%08x\n", haint);
2139 } 2141 }
2140 2142
2143 /*
2144 * According to USB 2.0 spec section 11.18.8, a host must
2145 * issue complete-split transactions in a microframe for a
2146 * set of full-/low-speed endpoints in the same relative
2147 * order as the start-splits were issued in a microframe for.
2148 */
2149 list_for_each_entry_safe(chan, chan_tmp, &hsotg->split_order,
2150 split_order_list_entry) {
2151 int hc_num = chan->hc_num;
2152
2153 if (haint & (1 << hc_num)) {
2154 dwc2_hc_n_intr(hsotg, hc_num);
2155 haint &= ~(1 << hc_num);
2156 }
2157 }
2158
2141 for (i = 0; i < hsotg->core_params->host_channels; i++) { 2159 for (i = 0; i < hsotg->core_params->host_channels; i++) {
2142 if (haint & (1 << i)) 2160 if (haint & (1 << i))
2143 dwc2_hc_n_intr(hsotg, i); 2161 dwc2_hc_n_intr(hsotg, i);
diff --git a/drivers/usb/dwc2/hcd_queue.c b/drivers/usb/dwc2/hcd_queue.c
index 27d402f680a3..7f634fd771c7 100644
--- a/drivers/usb/dwc2/hcd_queue.c
+++ b/drivers/usb/dwc2/hcd_queue.c
@@ -38,6 +38,7 @@
38 * This file contains the functions to manage Queue Heads and Queue 38 * This file contains the functions to manage Queue Heads and Queue
39 * Transfer Descriptors for Host mode 39 * Transfer Descriptors for Host mode
40 */ 40 */
41#include <linux/gcd.h>
41#include <linux/kernel.h> 42#include <linux/kernel.h>
42#include <linux/module.h> 43#include <linux/module.h>
43#include <linux/spinlock.h> 44#include <linux/spinlock.h>
@@ -53,194 +54,8 @@
53#include "core.h" 54#include "core.h"
54#include "hcd.h" 55#include "hcd.h"
55 56
56/** 57/* Wait this long before releasing periodic reservation */
57 * dwc2_qh_init() - Initializes a QH structure 58#define DWC2_UNRESERVE_DELAY (msecs_to_jiffies(5))
58 *
59 * @hsotg: The HCD state structure for the DWC OTG controller
60 * @qh: The QH to init
61 * @urb: Holds the information about the device/endpoint needed to initialize
62 * the QH
63 */
64#define SCHEDULE_SLOP 10
65static void dwc2_qh_init(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
66 struct dwc2_hcd_urb *urb)
67{
68 int dev_speed, hub_addr, hub_port;
69 char *speed, *type;
70
71 dev_vdbg(hsotg->dev, "%s()\n", __func__);
72
73 /* Initialize QH */
74 qh->ep_type = dwc2_hcd_get_pipe_type(&urb->pipe_info);
75 qh->ep_is_in = dwc2_hcd_is_pipe_in(&urb->pipe_info) ? 1 : 0;
76
77 qh->data_toggle = DWC2_HC_PID_DATA0;
78 qh->maxp = dwc2_hcd_get_mps(&urb->pipe_info);
79 INIT_LIST_HEAD(&qh->qtd_list);
80 INIT_LIST_HEAD(&qh->qh_list_entry);
81
82 /* FS/LS Endpoint on HS Hub, NOT virtual root hub */
83 dev_speed = dwc2_host_get_speed(hsotg, urb->priv);
84
85 dwc2_host_hub_info(hsotg, urb->priv, &hub_addr, &hub_port);
86
87 if ((dev_speed == USB_SPEED_LOW || dev_speed == USB_SPEED_FULL) &&
88 hub_addr != 0 && hub_addr != 1) {
89 dev_vdbg(hsotg->dev,
90 "QH init: EP %d: TT found at hub addr %d, for port %d\n",
91 dwc2_hcd_get_ep_num(&urb->pipe_info), hub_addr,
92 hub_port);
93 qh->do_split = 1;
94 }
95
96 if (qh->ep_type == USB_ENDPOINT_XFER_INT ||
97 qh->ep_type == USB_ENDPOINT_XFER_ISOC) {
98 /* Compute scheduling parameters once and save them */
99 u32 hprt, prtspd;
100
101 /* Todo: Account for split transfers in the bus time */
102 int bytecount =
103 dwc2_hb_mult(qh->maxp) * dwc2_max_packet(qh->maxp);
104
105 qh->usecs = NS_TO_US(usb_calc_bus_time(qh->do_split ?
106 USB_SPEED_HIGH : dev_speed, qh->ep_is_in,
107 qh->ep_type == USB_ENDPOINT_XFER_ISOC,
108 bytecount));
109
110 /* Ensure frame_number corresponds to the reality */
111 hsotg->frame_number = dwc2_hcd_get_frame_number(hsotg);
112 /* Start in a slightly future (micro)frame */
113 qh->sched_frame = dwc2_frame_num_inc(hsotg->frame_number,
114 SCHEDULE_SLOP);
115 qh->interval = urb->interval;
116#if 0
117 /* Increase interrupt polling rate for debugging */
118 if (qh->ep_type == USB_ENDPOINT_XFER_INT)
119 qh->interval = 8;
120#endif
121 hprt = dwc2_readl(hsotg->regs + HPRT0);
122 prtspd = (hprt & HPRT0_SPD_MASK) >> HPRT0_SPD_SHIFT;
123 if (prtspd == HPRT0_SPD_HIGH_SPEED &&
124 (dev_speed == USB_SPEED_LOW ||
125 dev_speed == USB_SPEED_FULL)) {
126 qh->interval *= 8;
127 qh->sched_frame |= 0x7;
128 qh->start_split_frame = qh->sched_frame;
129 }
130 dev_dbg(hsotg->dev, "interval=%d\n", qh->interval);
131 }
132
133 dev_vdbg(hsotg->dev, "DWC OTG HCD QH Initialized\n");
134 dev_vdbg(hsotg->dev, "DWC OTG HCD QH - qh = %p\n", qh);
135 dev_vdbg(hsotg->dev, "DWC OTG HCD QH - Device Address = %d\n",
136 dwc2_hcd_get_dev_addr(&urb->pipe_info));
137 dev_vdbg(hsotg->dev, "DWC OTG HCD QH - Endpoint %d, %s\n",
138 dwc2_hcd_get_ep_num(&urb->pipe_info),
139 dwc2_hcd_is_pipe_in(&urb->pipe_info) ? "IN" : "OUT");
140
141 qh->dev_speed = dev_speed;
142
143 switch (dev_speed) {
144 case USB_SPEED_LOW:
145 speed = "low";
146 break;
147 case USB_SPEED_FULL:
148 speed = "full";
149 break;
150 case USB_SPEED_HIGH:
151 speed = "high";
152 break;
153 default:
154 speed = "?";
155 break;
156 }
157 dev_vdbg(hsotg->dev, "DWC OTG HCD QH - Speed = %s\n", speed);
158
159 switch (qh->ep_type) {
160 case USB_ENDPOINT_XFER_ISOC:
161 type = "isochronous";
162 break;
163 case USB_ENDPOINT_XFER_INT:
164 type = "interrupt";
165 break;
166 case USB_ENDPOINT_XFER_CONTROL:
167 type = "control";
168 break;
169 case USB_ENDPOINT_XFER_BULK:
170 type = "bulk";
171 break;
172 default:
173 type = "?";
174 break;
175 }
176
177 dev_vdbg(hsotg->dev, "DWC OTG HCD QH - Type = %s\n", type);
178
179 if (qh->ep_type == USB_ENDPOINT_XFER_INT) {
180 dev_vdbg(hsotg->dev, "DWC OTG HCD QH - usecs = %d\n",
181 qh->usecs);
182 dev_vdbg(hsotg->dev, "DWC OTG HCD QH - interval = %d\n",
183 qh->interval);
184 }
185}
186
187/**
188 * dwc2_hcd_qh_create() - Allocates and initializes a QH
189 *
190 * @hsotg: The HCD state structure for the DWC OTG controller
191 * @urb: Holds the information about the device/endpoint needed
192 * to initialize the QH
193 * @atomic_alloc: Flag to do atomic allocation if needed
194 *
195 * Return: Pointer to the newly allocated QH, or NULL on error
196 */
197struct dwc2_qh *dwc2_hcd_qh_create(struct dwc2_hsotg *hsotg,
198 struct dwc2_hcd_urb *urb,
199 gfp_t mem_flags)
200{
201 struct dwc2_qh *qh;
202
203 if (!urb->priv)
204 return NULL;
205
206 /* Allocate memory */
207 qh = kzalloc(sizeof(*qh), mem_flags);
208 if (!qh)
209 return NULL;
210
211 dwc2_qh_init(hsotg, qh, urb);
212
213 if (hsotg->core_params->dma_desc_enable > 0 &&
214 dwc2_hcd_qh_init_ddma(hsotg, qh, mem_flags) < 0) {
215 dwc2_hcd_qh_free(hsotg, qh);
216 return NULL;
217 }
218
219 return qh;
220}
221
222/**
223 * dwc2_hcd_qh_free() - Frees the QH
224 *
225 * @hsotg: HCD instance
226 * @qh: The QH to free
227 *
228 * QH should already be removed from the list. QTD list should already be empty
229 * if called from URB Dequeue.
230 *
231 * Must NOT be called with interrupt disabled or spinlock held
232 */
233void dwc2_hcd_qh_free(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
234{
235 if (qh->desc_list) {
236 dwc2_hcd_qh_free_ddma(hsotg, qh);
237 } else {
238 /* kfree(NULL) is safe */
239 kfree(qh->dw_align_buf);
240 qh->dw_align_buf_dma = (dma_addr_t)0;
241 }
242 kfree(qh);
243}
244 59
245/** 60/**
246 * dwc2_periodic_channel_available() - Checks that a channel is available for a 61 * dwc2_periodic_channel_available() - Checks that a channel is available for a
@@ -301,19 +116,19 @@ static int dwc2_check_periodic_bandwidth(struct dwc2_hsotg *hsotg,
301 * High speed mode 116 * High speed mode
302 * Max periodic usecs is 80% x 125 usec = 100 usec 117 * Max periodic usecs is 80% x 125 usec = 100 usec
303 */ 118 */
304 max_claimed_usecs = 100 - qh->usecs; 119 max_claimed_usecs = 100 - qh->host_us;
305 } else { 120 } else {
306 /* 121 /*
307 * Full speed mode 122 * Full speed mode
308 * Max periodic usecs is 90% x 1000 usec = 900 usec 123 * Max periodic usecs is 90% x 1000 usec = 900 usec
309 */ 124 */
310 max_claimed_usecs = 900 - qh->usecs; 125 max_claimed_usecs = 900 - qh->host_us;
311 } 126 }
312 127
313 if (hsotg->periodic_usecs > max_claimed_usecs) { 128 if (hsotg->periodic_usecs > max_claimed_usecs) {
314 dev_err(hsotg->dev, 129 dev_err(hsotg->dev,
315 "%s: already claimed usecs %d, required usecs %d\n", 130 "%s: already claimed usecs %d, required usecs %d\n",
316 __func__, hsotg->periodic_usecs, qh->usecs); 131 __func__, hsotg->periodic_usecs, qh->host_us);
317 status = -ENOSPC; 132 status = -ENOSPC;
318 } 133 }
319 134
@@ -321,113 +136,1177 @@ static int dwc2_check_periodic_bandwidth(struct dwc2_hsotg *hsotg,
321} 136}
322 137
323/** 138/**
324 * Microframe scheduler 139 * pmap_schedule() - Schedule time in a periodic bitmap (pmap).
325 * track the total use in hsotg->frame_usecs 140 *
326 * keep each qh use in qh->frame_usecs 141 * @map: The bitmap representing the schedule; will be updated
327 * when surrendering the qh then donate the time back 142 * upon success.
143 * @bits_per_period: The schedule represents several periods. This is how many
144 * bits are in each period. It's assumed that the beginning
145 * of the schedule will repeat after its end.
146 * @periods_in_map: The number of periods in the schedule.
147 * @num_bits: The number of bits we need per period we want to reserve
148 * in this function call.
149 * @interval: How often we need to be scheduled for the reservation this
150 * time. 1 means every period. 2 means every other period.
151 * ...you get the picture?
152 * @start: The bit number to start at. Normally 0. Must be within
153 * the interval or we return failure right away.
154 * @only_one_period: Normally we'll allow picking a start anywhere within the
155 * first interval, since we can still make all repetition
156 * requirements by doing that. However, if you pass true
157 * here then we'll return failure if we can't fit within
158 * the period that "start" is in.
159 *
160 * The idea here is that we want to schedule time for repeating events that all
161 * want the same resource. The resource is divided into fixed-sized periods
162 * and the events want to repeat every "interval" periods. The schedule
163 * granularity is one bit.
164 *
165 * To keep things "simple", we'll represent our schedule with a bitmap that
166 * contains a fixed number of periods. This gets rid of a lot of complexity
167 * but does mean that we need to handle things specially (and non-ideally) if
168 * the number of the periods in the schedule doesn't match well with the
169 * intervals that we're trying to schedule.
170 *
171 * Here's an explanation of the scheme we'll implement, assuming 8 periods.
172 * - If interval is 1, we need to take up space in each of the 8
173 * periods we're scheduling. Easy.
174 * - If interval is 2, we need to take up space in half of the
175 * periods. Again, easy.
176 * - If interval is 3, we actually need to fall back to interval 1.
177 * Why? Because we might need time in any period. AKA for the
178 * first 8 periods, we'll be in slot 0, 3, 6. Then we'll be
179 * in slot 1, 4, 7. Then we'll be in 2, 5. Then we'll be back to
180 * 0, 3, and 6. Since we could be in any frame we need to reserve
181 * for all of them. Sucks, but that's what you gotta do. Note that
182 * if we were instead scheduling 8 * 3 = 24 we'd do much better, but
183 * then we need more memory and time to do scheduling.
184 * - If interval is 4, easy.
185 * - If interval is 5, we again need interval 1. The schedule will be
186 * 0, 5, 2, 7, 4, 1, 6, 3, 0
187 * - If interval is 6, we need interval 2. 0, 6, 4, 2.
188 * - If interval is 7, we need interval 1.
189 * - If interval is 8, we need interval 8.
190 *
191 * If you do the math, you'll see that we need to pretend that interval is
192 * equal to the greatest_common_divisor(interval, periods_in_map).
193 *
194 * Note that at the moment this function tends to front-pack the schedule.
195 * In some cases that's really non-ideal (it's hard to schedule things that
196 * need to repeat every period). In other cases it's perfect (you can easily
197 * schedule bigger, less often repeating things).
198 *
199 * Here's the algorithm in action (8 periods, 5 bits per period):
200 * |** | |** | |** | |** | | OK 2 bits, intv 2 at 0
201 * |*****| ***|*****| ***|*****| ***|*****| ***| OK 3 bits, intv 3 at 2
202 * |*****|* ***|*****| ***|*****|* ***|*****| ***| OK 1 bits, intv 4 at 5
203 * |** |* |** | |** |* |** | | Remv 3 bits, intv 3 at 2
204 * |*** |* |*** | |*** |* |*** | | OK 1 bits, intv 6 at 2
205 * |**** |* * |**** | * |**** |* * |**** | * | OK 1 bits, intv 1 at 3
206 * |**** |**** |**** | *** |**** |**** |**** | *** | OK 2 bits, intv 2 at 6
207 * |*****|*****|*****| ****|*****|*****|*****| ****| OK 1 bits, intv 1 at 4
208 * |*****|*****|*****| ****|*****|*****|*****| ****| FAIL 1 bits, intv 1
209 * | ***|*****| ***| ****| ***|*****| ***| ****| Remv 2 bits, intv 2 at 0
210 * | ***| ****| ***| ****| ***| ****| ***| ****| Remv 1 bits, intv 4 at 5
211 * | **| ****| **| ****| **| ****| **| ****| Remv 1 bits, intv 6 at 2
212 * | *| ** *| *| ** *| *| ** *| *| ** *| Remv 1 bits, intv 1 at 3
213 * | *| *| *| *| *| *| *| *| Remv 2 bits, intv 2 at 6
214 * | | | | | | | | | Remv 1 bits, intv 1 at 4
215 * |** | |** | |** | |** | | OK 2 bits, intv 2 at 0
216 * |*** | |** | |*** | |** | | OK 1 bits, intv 4 at 2
217 * |*****| |** **| |*****| |** **| | OK 2 bits, intv 2 at 3
218 * |*****|* |** **| |*****|* |** **| | OK 1 bits, intv 4 at 5
219 * |*****|*** |** **| ** |*****|*** |** **| ** | OK 2 bits, intv 2 at 6
220 * |*****|*****|** **| ****|*****|*****|** **| ****| OK 2 bits, intv 2 at 8
221 * |*****|*****|*****| ****|*****|*****|*****| ****| OK 1 bits, intv 4 at 12
222 *
223 * This function is pretty generic and could be easily abstracted if anything
224 * needed similar scheduling.
225 *
226 * Returns either -ENOSPC or a >= 0 start bit which should be passed to the
227 * unschedule routine. The map bitmap will be updated on a non-error result.
328 */ 228 */
329static const unsigned short max_uframe_usecs[] = { 229static int pmap_schedule(unsigned long *map, int bits_per_period,
330 100, 100, 100, 100, 100, 100, 30, 0 230 int periods_in_map, int num_bits,
331}; 231 int interval, int start, bool only_one_period)
232{
233 int interval_bits;
234 int to_reserve;
235 int first_end;
236 int i;
237
238 if (num_bits > bits_per_period)
239 return -ENOSPC;
240
241 /* Adjust interval as per description */
242 interval = gcd(interval, periods_in_map);
243
244 interval_bits = bits_per_period * interval;
245 to_reserve = periods_in_map / interval;
246
247 /* If start has gotten us past interval then we can't schedule */
248 if (start >= interval_bits)
249 return -ENOSPC;
250
251 if (only_one_period)
252 /* Must fit within same period as start; end at begin of next */
253 first_end = (start / bits_per_period + 1) * bits_per_period;
254 else
255 /* Can fit anywhere in the first interval */
256 first_end = interval_bits;
257
258 /*
259 * We'll try to pick the first repetition, then see if that time
260 * is free for each of the subsequent repetitions. If it's not
261 * we'll adjust the start time for the next search of the first
262 * repetition.
263 */
264 while (start + num_bits <= first_end) {
265 int end;
266
267 /* Need to stay within this period */
268 end = (start / bits_per_period + 1) * bits_per_period;
269
270 /* Look for num_bits us in this microframe starting at start */
271 start = bitmap_find_next_zero_area(map, end, start, num_bits,
272 0);
273
274 /*
275 * We should get start >= end if we fail. We might be
276 * able to check the next microframe depending on the
277 * interval, so continue on (start already updated).
278 */
279 if (start >= end) {
280 start = end;
281 continue;
282 }
283
284 /* At this point we have a valid point for first one */
285 for (i = 1; i < to_reserve; i++) {
286 int ith_start = start + interval_bits * i;
287 int ith_end = end + interval_bits * i;
288 int ret;
289
290 /* Use this as a dumb "check if bits are 0" */
291 ret = bitmap_find_next_zero_area(
292 map, ith_start + num_bits, ith_start, num_bits,
293 0);
294
295 /* We got the right place, continue checking */
296 if (ret == ith_start)
297 continue;
298
299 /* Move start up for next time and exit for loop */
300 ith_start = bitmap_find_next_zero_area(
301 map, ith_end, ith_start, num_bits, 0);
302 if (ith_start >= ith_end)
303 /* Need a while new period next time */
304 start = end;
305 else
306 start = ith_start - interval_bits * i;
307 break;
308 }
309
310 /* If didn't exit the for loop with a break, we have success */
311 if (i == to_reserve)
312 break;
313 }
332 314
333void dwc2_hcd_init_usecs(struct dwc2_hsotg *hsotg) 315 if (start + num_bits > first_end)
316 return -ENOSPC;
317
318 for (i = 0; i < to_reserve; i++) {
319 int ith_start = start + interval_bits * i;
320
321 bitmap_set(map, ith_start, num_bits);
322 }
323
324 return start;
325}
326
327/**
328 * pmap_unschedule() - Undo work done by pmap_schedule()
329 *
330 * @map: See pmap_schedule().
331 * @bits_per_period: See pmap_schedule().
332 * @periods_in_map: See pmap_schedule().
333 * @num_bits: The number of bits that was passed to schedule.
334 * @interval: The interval that was passed to schedule.
335 * @start: The return value from pmap_schedule().
336 */
337static void pmap_unschedule(unsigned long *map, int bits_per_period,
338 int periods_in_map, int num_bits,
339 int interval, int start)
334{ 340{
341 int interval_bits;
342 int to_release;
335 int i; 343 int i;
336 344
337 for (i = 0; i < 8; i++) 345 /* Adjust interval as per description in pmap_schedule() */
338 hsotg->frame_usecs[i] = max_uframe_usecs[i]; 346 interval = gcd(interval, periods_in_map);
347
348 interval_bits = bits_per_period * interval;
349 to_release = periods_in_map / interval;
350
351 for (i = 0; i < to_release; i++) {
352 int ith_start = start + interval_bits * i;
353
354 bitmap_clear(map, ith_start, num_bits);
355 }
339} 356}
340 357
341static int dwc2_find_single_uframe(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) 358/*
359 * cat_printf() - A printf() + strcat() helper
360 *
361 * This is useful for concatenating a bunch of strings where each string is
362 * constructed using printf.
363 *
364 * @buf: The destination buffer; will be updated to point after the printed
365 * data.
366 * @size: The number of bytes in the buffer (includes space for '\0').
367 * @fmt: The format for printf.
368 * @...: The args for printf.
369 */
370static void cat_printf(char **buf, size_t *size, const char *fmt, ...)
342{ 371{
343 unsigned short utime = qh->usecs; 372 va_list args;
344 int i; 373 int i;
345 374
346 for (i = 0; i < 8; i++) { 375 if (*size == 0)
347 /* At the start hsotg->frame_usecs[i] = max_uframe_usecs[i] */ 376 return;
348 if (utime <= hsotg->frame_usecs[i]) { 377
349 hsotg->frame_usecs[i] -= utime; 378 va_start(args, fmt);
350 qh->frame_usecs[i] += utime; 379 i = vsnprintf(*buf, *size, fmt, args);
351 return i; 380 va_end(args);
352 } 381
382 if (i >= *size) {
383 (*buf)[*size - 1] = '\0';
384 *buf += *size;
385 *size = 0;
386 } else {
387 *buf += i;
388 *size -= i;
353 } 389 }
354 return -ENOSPC;
355} 390}
356 391
357/* 392/*
358 * use this for FS apps that can span multiple uframes 393 * pmap_print() - Print the given periodic map
394 *
395 * Will attempt to print out the periodic schedule.
396 *
397 * @map: See pmap_schedule().
398 * @bits_per_period: See pmap_schedule().
399 * @periods_in_map: See pmap_schedule().
400 * @period_name: The name of 1 period, like "uFrame"
401 * @units: The name of the units, like "us".
402 * @print_fn: The function to call for printing.
403 * @print_data: Opaque data to pass to the print function.
404 */
405static void pmap_print(unsigned long *map, int bits_per_period,
406 int periods_in_map, const char *period_name,
407 const char *units,
408 void (*print_fn)(const char *str, void *data),
409 void *print_data)
410{
411 int period;
412
413 for (period = 0; period < periods_in_map; period++) {
414 char tmp[64];
415 char *buf = tmp;
416 size_t buf_size = sizeof(tmp);
417 int period_start = period * bits_per_period;
418 int period_end = period_start + bits_per_period;
419 int start = 0;
420 int count = 0;
421 bool printed = false;
422 int i;
423
424 for (i = period_start; i < period_end + 1; i++) {
425 /* Handle case when ith bit is set */
426 if (i < period_end &&
427 bitmap_find_next_zero_area(map, i + 1,
428 i, 1, 0) != i) {
429 if (count == 0)
430 start = i - period_start;
431 count++;
432 continue;
433 }
434
435 /* ith bit isn't set; don't care if count == 0 */
436 if (count == 0)
437 continue;
438
439 if (!printed)
440 cat_printf(&buf, &buf_size, "%s %d: ",
441 period_name, period);
442 else
443 cat_printf(&buf, &buf_size, ", ");
444 printed = true;
445
446 cat_printf(&buf, &buf_size, "%d %s -%3d %s", start,
447 units, start + count - 1, units);
448 count = 0;
449 }
450
451 if (printed)
452 print_fn(tmp, print_data);
453 }
454}
455
456/**
457 * dwc2_get_ls_map() - Get the map used for the given qh
458 *
459 * @hsotg: The HCD state structure for the DWC OTG controller.
460 * @qh: QH for the periodic transfer.
461 *
462 * We'll always get the periodic map out of our TT. Note that even if we're
463 * running the host straight in low speed / full speed mode it appears as if
464 * a TT is allocated for us, so we'll use it. If that ever changes we can
465 * add logic here to get a map out of "hsotg" if !qh->do_split.
466 *
467 * Returns: the map or NULL if a map couldn't be found.
359 */ 468 */
360static int dwc2_find_multi_uframe(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) 469static unsigned long *dwc2_get_ls_map(struct dwc2_hsotg *hsotg,
470 struct dwc2_qh *qh)
361{ 471{
362 unsigned short utime = qh->usecs; 472 unsigned long *map;
363 unsigned short xtime; 473
364 int t_left; 474 /* Don't expect to be missing a TT and be doing low speed scheduling */
475 if (WARN_ON(!qh->dwc_tt))
476 return NULL;
477
478 /* Get the map and adjust if this is a multi_tt hub */
479 map = qh->dwc_tt->periodic_bitmaps;
480 if (qh->dwc_tt->usb_tt->multi)
481 map += DWC2_ELEMENTS_PER_LS_BITMAP * qh->ttport;
482
483 return map;
484}
485
486struct dwc2_qh_print_data {
487 struct dwc2_hsotg *hsotg;
488 struct dwc2_qh *qh;
489};
490
491/**
492 * dwc2_qh_print() - Helper function for dwc2_qh_schedule_print()
493 *
494 * @str: The string to print
495 * @data: A pointer to a struct dwc2_qh_print_data
496 */
497static void dwc2_qh_print(const char *str, void *data)
498{
499 struct dwc2_qh_print_data *print_data = data;
500
501 dwc2_sch_dbg(print_data->hsotg, "QH=%p ...%s\n", print_data->qh, str);
502}
503
504/**
505 * dwc2_qh_schedule_print() - Print the periodic schedule
506 *
507 * @hsotg: The HCD state structure for the DWC OTG controller.
508 * @qh: QH to print.
509 */
510static void dwc2_qh_schedule_print(struct dwc2_hsotg *hsotg,
511 struct dwc2_qh *qh)
512{
513 struct dwc2_qh_print_data print_data = { hsotg, qh };
365 int i; 514 int i;
366 int j;
367 int k;
368 515
369 for (i = 0; i < 8; i++) { 516 /*
370 if (hsotg->frame_usecs[i] <= 0) 517 * The printing functions are quite slow and inefficient.
518 * If we don't have tracing turned on, don't run unless the special
519 * define is turned on.
520 */
521#ifndef DWC2_PRINT_SCHEDULE
522 return;
523#endif
524
525 if (qh->schedule_low_speed) {
526 unsigned long *map = dwc2_get_ls_map(hsotg, qh);
527
528 dwc2_sch_dbg(hsotg, "QH=%p LS/FS trans: %d=>%d us @ %d us",
529 qh, qh->device_us,
530 DWC2_ROUND_US_TO_SLICE(qh->device_us),
531 DWC2_US_PER_SLICE * qh->ls_start_schedule_slice);
532
533 if (map) {
534 dwc2_sch_dbg(hsotg,
535 "QH=%p Whole low/full speed map %p now:\n",
536 qh, map);
537 pmap_print(map, DWC2_LS_PERIODIC_SLICES_PER_FRAME,
538 DWC2_LS_SCHEDULE_FRAMES, "Frame ", "slices",
539 dwc2_qh_print, &print_data);
540 }
541 }
542
543 for (i = 0; i < qh->num_hs_transfers; i++) {
544 struct dwc2_hs_transfer_time *trans_time = qh->hs_transfers + i;
545 int uframe = trans_time->start_schedule_us /
546 DWC2_HS_PERIODIC_US_PER_UFRAME;
547 int rel_us = trans_time->start_schedule_us %
548 DWC2_HS_PERIODIC_US_PER_UFRAME;
549
550 dwc2_sch_dbg(hsotg,
551 "QH=%p HS trans #%d: %d us @ uFrame %d + %d us\n",
552 qh, i, trans_time->duration_us, uframe, rel_us);
553 }
554 if (qh->num_hs_transfers) {
555 dwc2_sch_dbg(hsotg, "QH=%p Whole high speed map now:\n", qh);
556 pmap_print(hsotg->hs_periodic_bitmap,
557 DWC2_HS_PERIODIC_US_PER_UFRAME,
558 DWC2_HS_SCHEDULE_UFRAMES, "uFrame", "us",
559 dwc2_qh_print, &print_data);
560 }
561
562}
563
564/**
565 * dwc2_ls_pmap_schedule() - Schedule a low speed QH
566 *
567 * @hsotg: The HCD state structure for the DWC OTG controller.
568 * @qh: QH for the periodic transfer.
569 * @search_slice: We'll start trying to schedule at the passed slice.
570 * Remember that slices are the units of the low speed
571 * schedule (think 25us or so).
572 *
573 * Wraps pmap_schedule() with the right parameters for low speed scheduling.
574 *
575 * Normally we schedule low speed devices on the map associated with the TT.
576 *
577 * Returns: 0 for success or an error code.
578 */
579static int dwc2_ls_pmap_schedule(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
580 int search_slice)
581{
582 int slices = DIV_ROUND_UP(qh->device_us, DWC2_US_PER_SLICE);
583 unsigned long *map = dwc2_get_ls_map(hsotg, qh);
584 int slice;
585
586 if (map == NULL)
587 return -EINVAL;
588
589 /*
590 * Schedule on the proper low speed map with our low speed scheduling
591 * parameters. Note that we use the "device_interval" here since
592 * we want the low speed interval and the only way we'd be in this
593 * function is if the device is low speed.
594 *
595 * If we happen to be doing low speed and high speed scheduling for the
596 * same transaction (AKA we have a split) we always do low speed first.
597 * That means we can always pass "false" for only_one_period (that
598 * parameters is only useful when we're trying to get one schedule to
599 * match what we already planned in the other schedule).
600 */
601 slice = pmap_schedule(map, DWC2_LS_PERIODIC_SLICES_PER_FRAME,
602 DWC2_LS_SCHEDULE_FRAMES, slices,
603 qh->device_interval, search_slice, false);
604
605 if (slice < 0)
606 return slice;
607
608 qh->ls_start_schedule_slice = slice;
609 return 0;
610}
611
612/**
613 * dwc2_ls_pmap_unschedule() - Undo work done by dwc2_ls_pmap_schedule()
614 *
615 * @hsotg: The HCD state structure for the DWC OTG controller.
616 * @qh: QH for the periodic transfer.
617 */
618static void dwc2_ls_pmap_unschedule(struct dwc2_hsotg *hsotg,
619 struct dwc2_qh *qh)
620{
621 int slices = DIV_ROUND_UP(qh->device_us, DWC2_US_PER_SLICE);
622 unsigned long *map = dwc2_get_ls_map(hsotg, qh);
623
624 /* Schedule should have failed, so no worries about no error code */
625 if (map == NULL)
626 return;
627
628 pmap_unschedule(map, DWC2_LS_PERIODIC_SLICES_PER_FRAME,
629 DWC2_LS_SCHEDULE_FRAMES, slices, qh->device_interval,
630 qh->ls_start_schedule_slice);
631}
632
633/**
634 * dwc2_hs_pmap_schedule - Schedule in the main high speed schedule
635 *
636 * This will schedule something on the main dwc2 schedule.
637 *
638 * We'll start looking in qh->hs_transfers[index].start_schedule_us. We'll
639 * update this with the result upon success. We also use the duration from
640 * the same structure.
641 *
642 * @hsotg: The HCD state structure for the DWC OTG controller.
643 * @qh: QH for the periodic transfer.
644 * @only_one_period: If true we will limit ourselves to just looking at
645 * one period (aka one 100us chunk). This is used if we have
646 * already scheduled something on the low speed schedule and
647 * need to find something that matches on the high speed one.
648 * @index: The index into qh->hs_transfers that we're working with.
649 *
650 * Returns: 0 for success or an error code. Upon success the
651 * dwc2_hs_transfer_time specified by "index" will be updated.
652 */
653static int dwc2_hs_pmap_schedule(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
654 bool only_one_period, int index)
655{
656 struct dwc2_hs_transfer_time *trans_time = qh->hs_transfers + index;
657 int us;
658
659 us = pmap_schedule(hsotg->hs_periodic_bitmap,
660 DWC2_HS_PERIODIC_US_PER_UFRAME,
661 DWC2_HS_SCHEDULE_UFRAMES, trans_time->duration_us,
662 qh->host_interval, trans_time->start_schedule_us,
663 only_one_period);
664
665 if (us < 0)
666 return us;
667
668 trans_time->start_schedule_us = us;
669 return 0;
670}
671
672/**
673 * dwc2_ls_pmap_unschedule() - Undo work done by dwc2_hs_pmap_schedule()
674 *
675 * @hsotg: The HCD state structure for the DWC OTG controller.
676 * @qh: QH for the periodic transfer.
677 */
678static void dwc2_hs_pmap_unschedule(struct dwc2_hsotg *hsotg,
679 struct dwc2_qh *qh, int index)
680{
681 struct dwc2_hs_transfer_time *trans_time = qh->hs_transfers + index;
682
683 pmap_unschedule(hsotg->hs_periodic_bitmap,
684 DWC2_HS_PERIODIC_US_PER_UFRAME,
685 DWC2_HS_SCHEDULE_UFRAMES, trans_time->duration_us,
686 qh->host_interval, trans_time->start_schedule_us);
687}
688
689/**
690 * dwc2_uframe_schedule_split - Schedule a QH for a periodic split xfer.
691 *
692 * This is the most complicated thing in USB. We have to find matching time
693 * in both the global high speed schedule for the port and the low speed
694 * schedule for the TT associated with the given device.
695 *
696 * Being here means that the host must be running in high speed mode and the
697 * device is in low or full speed mode (and behind a hub).
698 *
699 * @hsotg: The HCD state structure for the DWC OTG controller.
700 * @qh: QH for the periodic transfer.
701 */
702static int dwc2_uframe_schedule_split(struct dwc2_hsotg *hsotg,
703 struct dwc2_qh *qh)
704{
705 int bytecount = dwc2_hb_mult(qh->maxp) * dwc2_max_packet(qh->maxp);
706 int ls_search_slice;
707 int err = 0;
708 int host_interval_in_sched;
709
710 /*
711 * The interval (how often to repeat) in the actual host schedule.
712 * See pmap_schedule() for gcd() explanation.
713 */
714 host_interval_in_sched = gcd(qh->host_interval,
715 DWC2_HS_SCHEDULE_UFRAMES);
716
717 /*
718 * We always try to find space in the low speed schedule first, then
719 * try to find high speed time that matches. If we don't, we'll bump
720 * up the place we start searching in the low speed schedule and try
721 * again. To start we'll look right at the beginning of the low speed
722 * schedule.
723 *
724 * Note that this will tend to front-load the high speed schedule.
725 * We may eventually want to try to avoid this by either considering
726 * both schedules together or doing some sort of round robin.
727 */
728 ls_search_slice = 0;
729
730 while (ls_search_slice < DWC2_LS_SCHEDULE_SLICES) {
731 int start_s_uframe;
732 int ssplit_s_uframe;
733 int second_s_uframe;
734 int rel_uframe;
735 int first_count;
736 int middle_count;
737 int end_count;
738 int first_data_bytes;
739 int other_data_bytes;
740 int i;
741
742 if (qh->schedule_low_speed) {
743 err = dwc2_ls_pmap_schedule(hsotg, qh, ls_search_slice);
744
745 /*
746 * If we got an error here there's no other magic we
747 * can do, so bail. All the looping above is only
748 * helpful to redo things if we got a low speed slot
749 * and then couldn't find a matching high speed slot.
750 */
751 if (err)
752 return err;
753 } else {
754 /* Must be missing the tt structure? Why? */
755 WARN_ON_ONCE(1);
756 }
757
758 /*
759 * This will give us a number 0 - 7 if
760 * DWC2_LS_SCHEDULE_FRAMES == 1, or 0 - 15 if == 2, or ...
761 */
762 start_s_uframe = qh->ls_start_schedule_slice /
763 DWC2_SLICES_PER_UFRAME;
764
765 /* Get a number that's always 0 - 7 */
766 rel_uframe = (start_s_uframe % 8);
767
768 /*
769 * If we were going to start in uframe 7 then we would need to
770 * issue a start split in uframe 6, which spec says is not OK.
771 * Move on to the next full frame (assuming there is one).
772 *
773 * See 11.18.4 Host Split Transaction Scheduling Requirements
774 * bullet 1.
775 */
776 if (rel_uframe == 7) {
777 if (qh->schedule_low_speed)
778 dwc2_ls_pmap_unschedule(hsotg, qh);
779 ls_search_slice =
780 (qh->ls_start_schedule_slice /
781 DWC2_LS_PERIODIC_SLICES_PER_FRAME + 1) *
782 DWC2_LS_PERIODIC_SLICES_PER_FRAME;
371 continue; 783 continue;
784 }
372 785
373 /* 786 /*
374 * we need n consecutive slots so use j as a start slot 787 * For ISOC in:
375 * j plus j+1 must be enough time (for now) 788 * - start split (frame -1)
789 * - complete split w/ data (frame +1)
790 * - complete split w/ data (frame +2)
791 * - ...
792 * - complete split w/ data (frame +num_data_packets)
793 * - complete split w/ data (frame +num_data_packets+1)
794 * - complete split w/ data (frame +num_data_packets+2, max 8)
795 * ...though if frame was "0" then max is 7...
796 *
797 * For ISOC out we might need to do:
798 * - start split w/ data (frame -1)
799 * - start split w/ data (frame +0)
800 * - ...
801 * - start split w/ data (frame +num_data_packets-2)
802 *
803 * For INTERRUPT in we might need to do:
804 * - start split (frame -1)
805 * - complete split w/ data (frame +1)
806 * - complete split w/ data (frame +2)
807 * - complete split w/ data (frame +3, max 8)
808 *
809 * For INTERRUPT out we might need to do:
810 * - start split w/ data (frame -1)
811 * - complete split (frame +1)
812 * - complete split (frame +2)
813 * - complete split (frame +3, max 8)
814 *
815 * Start adjusting!
376 */ 816 */
377 xtime = hsotg->frame_usecs[i]; 817 ssplit_s_uframe = (start_s_uframe +
378 for (j = i + 1; j < 8; j++) { 818 host_interval_in_sched - 1) %
379 /* 819 host_interval_in_sched;
380 * if we add this frame remaining time to xtime we may 820 if (qh->ep_type == USB_ENDPOINT_XFER_ISOC && !qh->ep_is_in)
381 * be OK, if not we need to test j for a complete frame 821 second_s_uframe = start_s_uframe;
382 */ 822 else
383 if (xtime + hsotg->frame_usecs[j] < utime) { 823 second_s_uframe = start_s_uframe + 1;
384 if (hsotg->frame_usecs[j] < 824
385 max_uframe_usecs[j]) 825 /* First data transfer might not be all 188 bytes. */
386 continue; 826 first_data_bytes = 188 -
827 DIV_ROUND_UP(188 * (qh->ls_start_schedule_slice %
828 DWC2_SLICES_PER_UFRAME),
829 DWC2_SLICES_PER_UFRAME);
830 if (first_data_bytes > bytecount)
831 first_data_bytes = bytecount;
832 other_data_bytes = bytecount - first_data_bytes;
833
834 /*
835 * For now, skip OUT xfers where first xfer is partial
836 *
837 * Main dwc2 code assumes:
838 * - INT transfers never get split in two.
839 * - ISOC transfers can always transfer 188 bytes the first
840 * time.
841 *
842 * Until that code is fixed, try again if the first transfer
843 * couldn't transfer everything.
844 *
845 * This code can be removed if/when the rest of dwc2 handles
846 * the above cases. Until it's fixed we just won't be able
847 * to schedule quite as tightly.
848 */
849 if (!qh->ep_is_in &&
850 (first_data_bytes != min_t(int, 188, bytecount))) {
851 dwc2_sch_dbg(hsotg,
852 "QH=%p avoiding broken 1st xfer (%d, %d)\n",
853 qh, first_data_bytes, bytecount);
854 if (qh->schedule_low_speed)
855 dwc2_ls_pmap_unschedule(hsotg, qh);
856 ls_search_slice = (start_s_uframe + 1) *
857 DWC2_SLICES_PER_UFRAME;
858 continue;
859 }
860
861 /* Start by assuming transfers for the bytes */
862 qh->num_hs_transfers = 1 + DIV_ROUND_UP(other_data_bytes, 188);
863
864 /*
865 * Everything except ISOC OUT has extra transfers. Rules are
866 * complicated. See 11.18.4 Host Split Transaction Scheduling
867 * Requirements bullet 3.
868 */
869 if (qh->ep_type == USB_ENDPOINT_XFER_INT) {
870 if (rel_uframe == 6)
871 qh->num_hs_transfers += 2;
872 else
873 qh->num_hs_transfers += 3;
874
875 if (qh->ep_is_in) {
876 /*
877 * First is start split, middle/end is data.
878 * Allocate full data bytes for all data.
879 */
880 first_count = 4;
881 middle_count = bytecount;
882 end_count = bytecount;
883 } else {
884 /*
885 * First is data, middle/end is complete.
886 * First transfer and second can have data.
887 * Rest should just have complete split.
888 */
889 first_count = first_data_bytes;
890 middle_count = max_t(int, 4, other_data_bytes);
891 end_count = 4;
387 } 892 }
388 if (xtime >= utime) { 893 } else {
389 t_left = utime; 894 if (qh->ep_is_in) {
390 for (k = i; k < 8; k++) { 895 int last;
391 t_left -= hsotg->frame_usecs[k]; 896
392 if (t_left <= 0) { 897 /* Account for the start split */
393 qh->frame_usecs[k] += 898 qh->num_hs_transfers++;
394 hsotg->frame_usecs[k] 899
395 + t_left; 900 /* Calculate "L" value from spec */
396 hsotg->frame_usecs[k] = -t_left; 901 last = rel_uframe + qh->num_hs_transfers + 1;
397 return i; 902
398 } else { 903 /* Start with basic case */
399 qh->frame_usecs[k] += 904 if (last <= 6)
400 hsotg->frame_usecs[k]; 905 qh->num_hs_transfers += 2;
401 hsotg->frame_usecs[k] = 0; 906 else
402 } 907 qh->num_hs_transfers += 1;
403 } 908
909 /* Adjust downwards */
910 if (last >= 6 && rel_uframe == 0)
911 qh->num_hs_transfers--;
912
913 /* 1st = start; rest can contain data */
914 first_count = 4;
915 middle_count = min_t(int, 188, bytecount);
916 end_count = middle_count;
917 } else {
918 /* All contain data, last might be smaller */
919 first_count = first_data_bytes;
920 middle_count = min_t(int, 188,
921 other_data_bytes);
922 end_count = other_data_bytes % 188;
404 } 923 }
405 /* add the frame time to x time */
406 xtime += hsotg->frame_usecs[j];
407 /* we must have a fully available next frame or break */
408 if (xtime < utime &&
409 hsotg->frame_usecs[j] == max_uframe_usecs[j])
410 continue;
411 } 924 }
925
926 /* Assign durations per uFrame */
927 qh->hs_transfers[0].duration_us = HS_USECS_ISO(first_count);
928 for (i = 1; i < qh->num_hs_transfers - 1; i++)
929 qh->hs_transfers[i].duration_us =
930 HS_USECS_ISO(middle_count);
931 if (qh->num_hs_transfers > 1)
932 qh->hs_transfers[qh->num_hs_transfers - 1].duration_us =
933 HS_USECS_ISO(end_count);
934
935 /*
936 * Assign start us. The call below to dwc2_hs_pmap_schedule()
937 * will start with these numbers but may adjust within the same
938 * microframe.
939 */
940 qh->hs_transfers[0].start_schedule_us =
941 ssplit_s_uframe * DWC2_HS_PERIODIC_US_PER_UFRAME;
942 for (i = 1; i < qh->num_hs_transfers; i++)
943 qh->hs_transfers[i].start_schedule_us =
944 ((second_s_uframe + i - 1) %
945 DWC2_HS_SCHEDULE_UFRAMES) *
946 DWC2_HS_PERIODIC_US_PER_UFRAME;
947
948 /* Try to schedule with filled in hs_transfers above */
949 for (i = 0; i < qh->num_hs_transfers; i++) {
950 err = dwc2_hs_pmap_schedule(hsotg, qh, true, i);
951 if (err)
952 break;
953 }
954
955 /* If we scheduled all w/out breaking out then we're all good */
956 if (i == qh->num_hs_transfers)
957 break;
958
959 for (; i >= 0; i--)
960 dwc2_hs_pmap_unschedule(hsotg, qh, i);
961
962 if (qh->schedule_low_speed)
963 dwc2_ls_pmap_unschedule(hsotg, qh);
964
965 /* Try again starting in the next microframe */
966 ls_search_slice = (start_s_uframe + 1) * DWC2_SLICES_PER_UFRAME;
412 } 967 }
413 return -ENOSPC; 968
969 if (ls_search_slice >= DWC2_LS_SCHEDULE_SLICES)
970 return -ENOSPC;
971
972 return 0;
973}
974
975/**
976 * dwc2_uframe_schedule_hs - Schedule a QH for a periodic high speed xfer.
977 *
978 * Basically this just wraps dwc2_hs_pmap_schedule() to provide a clean
979 * interface.
980 *
981 * @hsotg: The HCD state structure for the DWC OTG controller.
982 * @qh: QH for the periodic transfer.
983 */
984static int dwc2_uframe_schedule_hs(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
985{
986 /* In non-split host and device time are the same */
987 WARN_ON(qh->host_us != qh->device_us);
988 WARN_ON(qh->host_interval != qh->device_interval);
989 WARN_ON(qh->num_hs_transfers != 1);
990
991 /* We'll have one transfer; init start to 0 before calling scheduler */
992 qh->hs_transfers[0].start_schedule_us = 0;
993 qh->hs_transfers[0].duration_us = qh->host_us;
994
995 return dwc2_hs_pmap_schedule(hsotg, qh, false, 0);
996}
997
998/**
999 * dwc2_uframe_schedule_ls - Schedule a QH for a periodic low/full speed xfer.
1000 *
1001 * Basically this just wraps dwc2_ls_pmap_schedule() to provide a clean
1002 * interface.
1003 *
1004 * @hsotg: The HCD state structure for the DWC OTG controller.
1005 * @qh: QH for the periodic transfer.
1006 */
1007static int dwc2_uframe_schedule_ls(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1008{
1009 /* In non-split host and device time are the same */
1010 WARN_ON(qh->host_us != qh->device_us);
1011 WARN_ON(qh->host_interval != qh->device_interval);
1012 WARN_ON(!qh->schedule_low_speed);
1013
1014 /* Run on the main low speed schedule (no split = no hub = no TT) */
1015 return dwc2_ls_pmap_schedule(hsotg, qh, 0);
414} 1016}
415 1017
416static int dwc2_find_uframe(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) 1018/**
1019 * dwc2_uframe_schedule - Schedule a QH for a periodic xfer.
1020 *
1021 * Calls one of the 3 sub-function depending on what type of transfer this QH
1022 * is for. Also adds some printing.
1023 *
1024 * @hsotg: The HCD state structure for the DWC OTG controller.
1025 * @qh: QH for the periodic transfer.
1026 */
1027static int dwc2_uframe_schedule(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
417{ 1028{
418 int ret; 1029 int ret;
419 1030
420 if (qh->dev_speed == USB_SPEED_HIGH) { 1031 if (qh->dev_speed == USB_SPEED_HIGH)
421 /* if this is a hs transaction we need a full frame */ 1032 ret = dwc2_uframe_schedule_hs(hsotg, qh);
422 ret = dwc2_find_single_uframe(hsotg, qh); 1033 else if (!qh->do_split)
1034 ret = dwc2_uframe_schedule_ls(hsotg, qh);
1035 else
1036 ret = dwc2_uframe_schedule_split(hsotg, qh);
1037
1038 if (ret)
1039 dwc2_sch_dbg(hsotg, "QH=%p Failed to schedule %d\n", qh, ret);
1040 else
1041 dwc2_qh_schedule_print(hsotg, qh);
1042
1043 return ret;
1044}
1045
1046/**
1047 * dwc2_uframe_unschedule - Undoes dwc2_uframe_schedule().
1048 *
1049 * @hsotg: The HCD state structure for the DWC OTG controller.
1050 * @qh: QH for the periodic transfer.
1051 */
1052static void dwc2_uframe_unschedule(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1053{
1054 int i;
1055
1056 for (i = 0; i < qh->num_hs_transfers; i++)
1057 dwc2_hs_pmap_unschedule(hsotg, qh, i);
1058
1059 if (qh->schedule_low_speed)
1060 dwc2_ls_pmap_unschedule(hsotg, qh);
1061
1062 dwc2_sch_dbg(hsotg, "QH=%p Unscheduled\n", qh);
1063}
1064
1065/**
1066 * dwc2_pick_first_frame() - Choose 1st frame for qh that's already scheduled
1067 *
1068 * Takes a qh that has already been scheduled (which means we know we have the
1069 * bandwdith reserved for us) and set the next_active_frame and the
1070 * start_active_frame.
1071 *
1072 * This is expected to be called on qh's that weren't previously actively
1073 * running. It just picks the next frame that we can fit into without any
1074 * thought about the past.
1075 *
1076 * @hsotg: The HCD state structure for the DWC OTG controller
1077 * @qh: QH for a periodic endpoint
1078 *
1079 */
1080static void dwc2_pick_first_frame(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1081{
1082 u16 frame_number;
1083 u16 earliest_frame;
1084 u16 next_active_frame;
1085 u16 relative_frame;
1086 u16 interval;
1087
1088 /*
1089 * Use the real frame number rather than the cached value as of the
1090 * last SOF to give us a little extra slop.
1091 */
1092 frame_number = dwc2_hcd_get_frame_number(hsotg);
1093
1094 /*
1095 * We wouldn't want to start any earlier than the next frame just in
1096 * case the frame number ticks as we're doing this calculation.
1097 *
1098 * NOTE: if we could quantify how long till we actually get scheduled
1099 * we might be able to avoid the "+ 1" by looking at the upper part of
1100 * HFNUM (the FRREM field). For now we'll just use the + 1 though.
1101 */
1102 earliest_frame = dwc2_frame_num_inc(frame_number, 1);
1103 next_active_frame = earliest_frame;
1104
1105 /* Get the "no microframe schduler" out of the way... */
1106 if (hsotg->core_params->uframe_sched <= 0) {
1107 if (qh->do_split)
1108 /* Splits are active at microframe 0 minus 1 */
1109 next_active_frame |= 0x7;
1110 goto exit;
1111 }
1112
1113 if (qh->dev_speed == USB_SPEED_HIGH || qh->do_split) {
1114 /*
1115 * We're either at high speed or we're doing a split (which
1116 * means we're talking high speed to a hub). In any case
1117 * the first frame should be based on when the first scheduled
1118 * event is.
1119 */
1120 WARN_ON(qh->num_hs_transfers < 1);
1121
1122 relative_frame = qh->hs_transfers[0].start_schedule_us /
1123 DWC2_HS_PERIODIC_US_PER_UFRAME;
1124
1125 /* Adjust interval as per high speed schedule */
1126 interval = gcd(qh->host_interval, DWC2_HS_SCHEDULE_UFRAMES);
1127
423 } else { 1128 } else {
424 /* 1129 /*
425 * if this is a fs transaction we may need a sequence 1130 * Low or full speed directly on dwc2. Just about the same
426 * of frames 1131 * as high speed but on a different schedule and with slightly
1132 * different adjustments. Note that this works because when
1133 * the host and device are both low speed then frames in the
1134 * controller tick at low speed.
427 */ 1135 */
428 ret = dwc2_find_multi_uframe(hsotg, qh); 1136 relative_frame = qh->ls_start_schedule_slice /
1137 DWC2_LS_PERIODIC_SLICES_PER_FRAME;
1138 interval = gcd(qh->host_interval, DWC2_LS_SCHEDULE_FRAMES);
429 } 1139 }
430 return ret; 1140
1141 /* Scheduler messed up if frame is past interval */
1142 WARN_ON(relative_frame >= interval);
1143
1144 /*
1145 * We know interval must divide (HFNUM_MAX_FRNUM + 1) now that we've
1146 * done the gcd(), so it's safe to move to the beginning of the current
1147 * interval like this.
1148 *
1149 * After this we might be before earliest_frame, but don't worry,
1150 * we'll fix it...
1151 */
1152 next_active_frame = (next_active_frame / interval) * interval;
1153
1154 /*
1155 * Actually choose to start at the frame number we've been
1156 * scheduled for.
1157 */
1158 next_active_frame = dwc2_frame_num_inc(next_active_frame,
1159 relative_frame);
1160
1161 /*
1162 * We actually need 1 frame before since the next_active_frame is
1163 * the frame number we'll be put on the ready list and we won't be on
1164 * the bus until 1 frame later.
1165 */
1166 next_active_frame = dwc2_frame_num_dec(next_active_frame, 1);
1167
1168 /*
1169 * By now we might actually be before the earliest_frame. Let's move
1170 * up intervals until we're not.
1171 */
1172 while (dwc2_frame_num_gt(earliest_frame, next_active_frame))
1173 next_active_frame = dwc2_frame_num_inc(next_active_frame,
1174 interval);
1175
1176exit:
1177 qh->next_active_frame = next_active_frame;
1178 qh->start_active_frame = next_active_frame;
1179
1180 dwc2_sch_vdbg(hsotg, "QH=%p First fn=%04x nxt=%04x\n",
1181 qh, frame_number, qh->next_active_frame);
1182}
1183
1184/**
1185 * dwc2_do_reserve() - Make a periodic reservation
1186 *
1187 * Try to allocate space in the periodic schedule. Depending on parameters
1188 * this might use the microframe scheduler or the dumb scheduler.
1189 *
1190 * @hsotg: The HCD state structure for the DWC OTG controller
1191 * @qh: QH for the periodic transfer.
1192 *
1193 * Returns: 0 upon success; error upon failure.
1194 */
1195static int dwc2_do_reserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1196{
1197 int status;
1198
1199 if (hsotg->core_params->uframe_sched > 0) {
1200 status = dwc2_uframe_schedule(hsotg, qh);
1201 } else {
1202 status = dwc2_periodic_channel_available(hsotg);
1203 if (status) {
1204 dev_info(hsotg->dev,
1205 "%s: No host channel available for periodic transfer\n",
1206 __func__);
1207 return status;
1208 }
1209
1210 status = dwc2_check_periodic_bandwidth(hsotg, qh);
1211 }
1212
1213 if (status) {
1214 dev_dbg(hsotg->dev,
1215 "%s: Insufficient periodic bandwidth for periodic transfer\n",
1216 __func__);
1217 return status;
1218 }
1219
1220 if (hsotg->core_params->uframe_sched <= 0)
1221 /* Reserve periodic channel */
1222 hsotg->periodic_channels++;
1223
1224 /* Update claimed usecs per (micro)frame */
1225 hsotg->periodic_usecs += qh->host_us;
1226
1227 dwc2_pick_first_frame(hsotg, qh);
1228
1229 return 0;
1230}
1231
1232/**
1233 * dwc2_do_unreserve() - Actually release the periodic reservation
1234 *
1235 * This function actually releases the periodic bandwidth that was reserved
1236 * by the given qh.
1237 *
1238 * @hsotg: The HCD state structure for the DWC OTG controller
1239 * @qh: QH for the periodic transfer.
1240 */
1241static void dwc2_do_unreserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1242{
1243 assert_spin_locked(&hsotg->lock);
1244
1245 WARN_ON(!qh->unreserve_pending);
1246
1247 /* No more unreserve pending--we're doing it */
1248 qh->unreserve_pending = false;
1249
1250 if (WARN_ON(!list_empty(&qh->qh_list_entry)))
1251 list_del_init(&qh->qh_list_entry);
1252
1253 /* Update claimed usecs per (micro)frame */
1254 hsotg->periodic_usecs -= qh->host_us;
1255
1256 if (hsotg->core_params->uframe_sched > 0) {
1257 dwc2_uframe_unschedule(hsotg, qh);
1258 } else {
1259 /* Release periodic channel reservation */
1260 hsotg->periodic_channels--;
1261 }
1262}
1263
1264/**
1265 * dwc2_unreserve_timer_fn() - Timer function to release periodic reservation
1266 *
1267 * According to the kernel doc for usb_submit_urb() (specifically the part about
1268 * "Reserved Bandwidth Transfers"), we need to keep a reservation active as
1269 * long as a device driver keeps submitting. Since we're using HCD_BH to give
1270 * back the URB we need to give the driver a little bit of time before we
1271 * release the reservation. This worker is called after the appropriate
1272 * delay.
1273 *
1274 * @work: Pointer to a qh unreserve_work.
1275 */
1276static void dwc2_unreserve_timer_fn(unsigned long data)
1277{
1278 struct dwc2_qh *qh = (struct dwc2_qh *)data;
1279 struct dwc2_hsotg *hsotg = qh->hsotg;
1280 unsigned long flags;
1281
1282 /*
1283 * Wait for the lock, or for us to be scheduled again. We
1284 * could be scheduled again if:
1285 * - We started executing but didn't get the lock yet.
1286 * - A new reservation came in, but cancel didn't take effect
1287 * because we already started executing.
1288 * - The timer has been kicked again.
1289 * In that case cancel and wait for the next call.
1290 */
1291 while (!spin_trylock_irqsave(&hsotg->lock, flags)) {
1292 if (timer_pending(&qh->unreserve_timer))
1293 return;
1294 }
1295
1296 /*
1297 * Might be no more unreserve pending if:
1298 * - We started executing but didn't get the lock yet.
1299 * - A new reservation came in, but cancel didn't take effect
1300 * because we already started executing.
1301 *
1302 * We can't put this in the loop above because unreserve_pending needs
1303 * to be accessed under lock, so we can only check it once we got the
1304 * lock.
1305 */
1306 if (qh->unreserve_pending)
1307 dwc2_do_unreserve(hsotg, qh);
1308
1309 spin_unlock_irqrestore(&hsotg->lock, flags);
431} 1310}
432 1311
433/** 1312/**
@@ -474,42 +1353,6 @@ static int dwc2_schedule_periodic(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
474{ 1353{
475 int status; 1354 int status;
476 1355
477 if (hsotg->core_params->uframe_sched > 0) {
478 int frame = -1;
479
480 status = dwc2_find_uframe(hsotg, qh);
481 if (status == 0)
482 frame = 7;
483 else if (status > 0)
484 frame = status - 1;
485
486 /* Set the new frame up */
487 if (frame >= 0) {
488 qh->sched_frame &= ~0x7;
489 qh->sched_frame |= (frame & 7);
490 }
491
492 if (status > 0)
493 status = 0;
494 } else {
495 status = dwc2_periodic_channel_available(hsotg);
496 if (status) {
497 dev_info(hsotg->dev,
498 "%s: No host channel available for periodic transfer\n",
499 __func__);
500 return status;
501 }
502
503 status = dwc2_check_periodic_bandwidth(hsotg, qh);
504 }
505
506 if (status) {
507 dev_dbg(hsotg->dev,
508 "%s: Insufficient periodic bandwidth for periodic transfer\n",
509 __func__);
510 return status;
511 }
512
513 status = dwc2_check_max_xfer_size(hsotg, qh); 1356 status = dwc2_check_max_xfer_size(hsotg, qh);
514 if (status) { 1357 if (status) {
515 dev_dbg(hsotg->dev, 1358 dev_dbg(hsotg->dev,
@@ -518,6 +1361,35 @@ static int dwc2_schedule_periodic(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
518 return status; 1361 return status;
519 } 1362 }
520 1363
1364 /* Cancel pending unreserve; if canceled OK, unreserve was pending */
1365 if (del_timer(&qh->unreserve_timer))
1366 WARN_ON(!qh->unreserve_pending);
1367
1368 /*
1369 * Only need to reserve if there's not an unreserve pending, since if an
1370 * unreserve is pending then by definition our old reservation is still
1371 * valid. Unreserve might still be pending even if we didn't cancel if
1372 * dwc2_unreserve_timer_fn() already started. Code in the timer handles
1373 * that case.
1374 */
1375 if (!qh->unreserve_pending) {
1376 status = dwc2_do_reserve(hsotg, qh);
1377 if (status)
1378 return status;
1379 } else {
1380 /*
1381 * It might have been a while, so make sure that frame_number
1382 * is still good. Note: we could also try to use the similar
1383 * dwc2_next_periodic_start() but that schedules much more
1384 * tightly and we might need to hurry and queue things up.
1385 */
1386 if (dwc2_frame_num_le(qh->next_active_frame,
1387 hsotg->frame_number))
1388 dwc2_pick_first_frame(hsotg, qh);
1389 }
1390
1391 qh->unreserve_pending = 0;
1392
521 if (hsotg->core_params->dma_desc_enable > 0) 1393 if (hsotg->core_params->dma_desc_enable > 0)
522 /* Don't rely on SOF and start in ready schedule */ 1394 /* Don't rely on SOF and start in ready schedule */
523 list_add_tail(&qh->qh_list_entry, &hsotg->periodic_sched_ready); 1395 list_add_tail(&qh->qh_list_entry, &hsotg->periodic_sched_ready);
@@ -526,14 +1398,7 @@ static int dwc2_schedule_periodic(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
526 list_add_tail(&qh->qh_list_entry, 1398 list_add_tail(&qh->qh_list_entry,
527 &hsotg->periodic_sched_inactive); 1399 &hsotg->periodic_sched_inactive);
528 1400
529 if (hsotg->core_params->uframe_sched <= 0) 1401 return 0;
530 /* Reserve periodic channel */
531 hsotg->periodic_channels++;
532
533 /* Update claimed usecs per (micro)frame */
534 hsotg->periodic_usecs += qh->usecs;
535
536 return status;
537} 1402}
538 1403
539/** 1404/**
@@ -546,25 +1411,231 @@ static int dwc2_schedule_periodic(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
546static void dwc2_deschedule_periodic(struct dwc2_hsotg *hsotg, 1411static void dwc2_deschedule_periodic(struct dwc2_hsotg *hsotg,
547 struct dwc2_qh *qh) 1412 struct dwc2_qh *qh)
548{ 1413{
549 int i; 1414 bool did_modify;
1415
1416 assert_spin_locked(&hsotg->lock);
1417
1418 /*
1419 * Schedule the unreserve to happen in a little bit. Cases here:
1420 * - Unreserve worker might be sitting there waiting to grab the lock.
1421 * In this case it will notice it's been schedule again and will
1422 * quit.
1423 * - Unreserve worker might not be scheduled.
1424 *
1425 * We should never already be scheduled since dwc2_schedule_periodic()
1426 * should have canceled the scheduled unreserve timer (hence the
1427 * warning on did_modify).
1428 *
1429 * We add + 1 to the timer to guarantee that at least 1 jiffy has
1430 * passed (otherwise if the jiffy counter might tick right after we
1431 * read it and we'll get no delay).
1432 */
1433 did_modify = mod_timer(&qh->unreserve_timer,
1434 jiffies + DWC2_UNRESERVE_DELAY + 1);
1435 WARN_ON(did_modify);
1436 qh->unreserve_pending = 1;
550 1437
551 list_del_init(&qh->qh_list_entry); 1438 list_del_init(&qh->qh_list_entry);
1439}
552 1440
553 /* Update claimed usecs per (micro)frame */ 1441/**
554 hsotg->periodic_usecs -= qh->usecs; 1442 * dwc2_qh_init() - Initializes a QH structure
1443 *
1444 * @hsotg: The HCD state structure for the DWC OTG controller
1445 * @qh: The QH to init
1446 * @urb: Holds the information about the device/endpoint needed to initialize
1447 * the QH
1448 * @mem_flags: Flags for allocating memory.
1449 */
1450static void dwc2_qh_init(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
1451 struct dwc2_hcd_urb *urb, gfp_t mem_flags)
1452{
1453 int dev_speed = dwc2_host_get_speed(hsotg, urb->priv);
1454 u8 ep_type = dwc2_hcd_get_pipe_type(&urb->pipe_info);
1455 bool ep_is_in = !!dwc2_hcd_is_pipe_in(&urb->pipe_info);
1456 bool ep_is_isoc = (ep_type == USB_ENDPOINT_XFER_ISOC);
1457 bool ep_is_int = (ep_type == USB_ENDPOINT_XFER_INT);
1458 u32 hprt = dwc2_readl(hsotg->regs + HPRT0);
1459 u32 prtspd = (hprt & HPRT0_SPD_MASK) >> HPRT0_SPD_SHIFT;
1460 bool do_split = (prtspd == HPRT0_SPD_HIGH_SPEED &&
1461 dev_speed != USB_SPEED_HIGH);
1462 int maxp = dwc2_hcd_get_mps(&urb->pipe_info);
1463 int bytecount = dwc2_hb_mult(maxp) * dwc2_max_packet(maxp);
1464 char *speed, *type;
555 1465
556 if (hsotg->core_params->uframe_sched > 0) { 1466 /* Initialize QH */
557 for (i = 0; i < 8; i++) { 1467 qh->hsotg = hsotg;
558 hsotg->frame_usecs[i] += qh->frame_usecs[i]; 1468 setup_timer(&qh->unreserve_timer, dwc2_unreserve_timer_fn,
559 qh->frame_usecs[i] = 0; 1469 (unsigned long)qh);
1470 qh->ep_type = ep_type;
1471 qh->ep_is_in = ep_is_in;
1472
1473 qh->data_toggle = DWC2_HC_PID_DATA0;
1474 qh->maxp = maxp;
1475 INIT_LIST_HEAD(&qh->qtd_list);
1476 INIT_LIST_HEAD(&qh->qh_list_entry);
1477
1478 qh->do_split = do_split;
1479 qh->dev_speed = dev_speed;
1480
1481 if (ep_is_int || ep_is_isoc) {
1482 /* Compute scheduling parameters once and save them */
1483 int host_speed = do_split ? USB_SPEED_HIGH : dev_speed;
1484 struct dwc2_tt *dwc_tt = dwc2_host_get_tt_info(hsotg, urb->priv,
1485 mem_flags,
1486 &qh->ttport);
1487 int device_ns;
1488
1489 qh->dwc_tt = dwc_tt;
1490
1491 qh->host_us = NS_TO_US(usb_calc_bus_time(host_speed, ep_is_in,
1492 ep_is_isoc, bytecount));
1493 device_ns = usb_calc_bus_time(dev_speed, ep_is_in,
1494 ep_is_isoc, bytecount);
1495
1496 if (do_split && dwc_tt)
1497 device_ns += dwc_tt->usb_tt->think_time;
1498 qh->device_us = NS_TO_US(device_ns);
1499
1500
1501 qh->device_interval = urb->interval;
1502 qh->host_interval = urb->interval * (do_split ? 8 : 1);
1503
1504 /*
1505 * Schedule low speed if we're running the host in low or
1506 * full speed OR if we've got a "TT" to deal with to access this
1507 * device.
1508 */
1509 qh->schedule_low_speed = prtspd != HPRT0_SPD_HIGH_SPEED ||
1510 dwc_tt;
1511
1512 if (do_split) {
1513 /* We won't know num transfers until we schedule */
1514 qh->num_hs_transfers = -1;
1515 } else if (dev_speed == USB_SPEED_HIGH) {
1516 qh->num_hs_transfers = 1;
1517 } else {
1518 qh->num_hs_transfers = 0;
560 } 1519 }
561 } else { 1520
562 /* Release periodic channel reservation */ 1521 /* We'll schedule later when we have something to do */
563 hsotg->periodic_channels--; 1522 }
1523
1524 switch (dev_speed) {
1525 case USB_SPEED_LOW:
1526 speed = "low";
1527 break;
1528 case USB_SPEED_FULL:
1529 speed = "full";
1530 break;
1531 case USB_SPEED_HIGH:
1532 speed = "high";
1533 break;
1534 default:
1535 speed = "?";
1536 break;
1537 }
1538
1539 switch (qh->ep_type) {
1540 case USB_ENDPOINT_XFER_ISOC:
1541 type = "isochronous";
1542 break;
1543 case USB_ENDPOINT_XFER_INT:
1544 type = "interrupt";
1545 break;
1546 case USB_ENDPOINT_XFER_CONTROL:
1547 type = "control";
1548 break;
1549 case USB_ENDPOINT_XFER_BULK:
1550 type = "bulk";
1551 break;
1552 default:
1553 type = "?";
1554 break;
1555 }
1556
1557 dwc2_sch_dbg(hsotg, "QH=%p Init %s, %s speed, %d bytes:\n", qh, type,
1558 speed, bytecount);
1559 dwc2_sch_dbg(hsotg, "QH=%p ...addr=%d, ep=%d, %s\n", qh,
1560 dwc2_hcd_get_dev_addr(&urb->pipe_info),
1561 dwc2_hcd_get_ep_num(&urb->pipe_info),
1562 ep_is_in ? "IN" : "OUT");
1563 if (ep_is_int || ep_is_isoc) {
1564 dwc2_sch_dbg(hsotg,
1565 "QH=%p ...duration: host=%d us, device=%d us\n",
1566 qh, qh->host_us, qh->device_us);
1567 dwc2_sch_dbg(hsotg, "QH=%p ...interval: host=%d, device=%d\n",
1568 qh, qh->host_interval, qh->device_interval);
1569 if (qh->schedule_low_speed)
1570 dwc2_sch_dbg(hsotg, "QH=%p ...low speed schedule=%p\n",
1571 qh, dwc2_get_ls_map(hsotg, qh));
564 } 1572 }
565} 1573}
566 1574
567/** 1575/**
1576 * dwc2_hcd_qh_create() - Allocates and initializes a QH
1577 *
1578 * @hsotg: The HCD state structure for the DWC OTG controller
1579 * @urb: Holds the information about the device/endpoint needed
1580 * to initialize the QH
1581 * @atomic_alloc: Flag to do atomic allocation if needed
1582 *
1583 * Return: Pointer to the newly allocated QH, or NULL on error
1584 */
1585struct dwc2_qh *dwc2_hcd_qh_create(struct dwc2_hsotg *hsotg,
1586 struct dwc2_hcd_urb *urb,
1587 gfp_t mem_flags)
1588{
1589 struct dwc2_qh *qh;
1590
1591 if (!urb->priv)
1592 return NULL;
1593
1594 /* Allocate memory */
1595 qh = kzalloc(sizeof(*qh), mem_flags);
1596 if (!qh)
1597 return NULL;
1598
1599 dwc2_qh_init(hsotg, qh, urb, mem_flags);
1600
1601 if (hsotg->core_params->dma_desc_enable > 0 &&
1602 dwc2_hcd_qh_init_ddma(hsotg, qh, mem_flags) < 0) {
1603 dwc2_hcd_qh_free(hsotg, qh);
1604 return NULL;
1605 }
1606
1607 return qh;
1608}
1609
1610/**
1611 * dwc2_hcd_qh_free() - Frees the QH
1612 *
1613 * @hsotg: HCD instance
1614 * @qh: The QH to free
1615 *
1616 * QH should already be removed from the list. QTD list should already be empty
1617 * if called from URB Dequeue.
1618 *
1619 * Must NOT be called with interrupt disabled or spinlock held
1620 */
1621void dwc2_hcd_qh_free(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
1622{
1623 /* Make sure any unreserve work is finished. */
1624 if (del_timer_sync(&qh->unreserve_timer)) {
1625 unsigned long flags;
1626
1627 spin_lock_irqsave(&hsotg->lock, flags);
1628 dwc2_do_unreserve(hsotg, qh);
1629 spin_unlock_irqrestore(&hsotg->lock, flags);
1630 }
1631 dwc2_host_put_tt_info(hsotg, qh->dwc_tt);
1632
1633 if (qh->desc_list)
1634 dwc2_hcd_qh_free_ddma(hsotg, qh);
1635 kfree(qh);
1636}
1637
1638/**
568 * dwc2_hcd_qh_add() - Adds a QH to either the non periodic or periodic 1639 * dwc2_hcd_qh_add() - Adds a QH to either the non periodic or periodic
569 * schedule if it is not already in the schedule. If the QH is already in 1640 * schedule if it is not already in the schedule. If the QH is already in
570 * the schedule, no action is taken. 1641 * the schedule, no action is taken.
@@ -586,16 +1657,12 @@ int dwc2_hcd_qh_add(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
586 /* QH already in a schedule */ 1657 /* QH already in a schedule */
587 return 0; 1658 return 0;
588 1659
589 if (!dwc2_frame_num_le(qh->sched_frame, hsotg->frame_number) &&
590 !hsotg->frame_number) {
591 dev_dbg(hsotg->dev,
592 "reset frame number counter\n");
593 qh->sched_frame = dwc2_frame_num_inc(hsotg->frame_number,
594 SCHEDULE_SLOP);
595 }
596
597 /* Add the new QH to the appropriate schedule */ 1660 /* Add the new QH to the appropriate schedule */
598 if (dwc2_qh_is_non_per(qh)) { 1661 if (dwc2_qh_is_non_per(qh)) {
1662 /* Schedule right away */
1663 qh->start_active_frame = hsotg->frame_number;
1664 qh->next_active_frame = qh->start_active_frame;
1665
599 /* Always start in inactive schedule */ 1666 /* Always start in inactive schedule */
600 list_add_tail(&qh->qh_list_entry, 1667 list_add_tail(&qh->qh_list_entry,
601 &hsotg->non_periodic_sched_inactive); 1668 &hsotg->non_periodic_sched_inactive);
@@ -649,39 +1716,164 @@ void dwc2_hcd_qh_unlink(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
649 } 1716 }
650} 1717}
651 1718
652/* 1719/**
653 * Schedule the next continuing periodic split transfer 1720 * dwc2_next_for_periodic_split() - Set next_active_frame midway thru a split.
1721 *
1722 * This is called for setting next_active_frame for periodic splits for all but
1723 * the first packet of the split. Confusing? I thought so...
1724 *
1725 * Periodic splits are single low/full speed transfers that we end up splitting
1726 * up into several high speed transfers. They always fit into one full (1 ms)
1727 * frame but might be split over several microframes (125 us each). We to put
1728 * each of the parts on a very specific high speed frame.
1729 *
1730 * This function figures out where the next active uFrame needs to be.
1731 *
1732 * @hsotg: The HCD state structure
1733 * @qh: QH for the periodic transfer.
1734 * @frame_number: The current frame number.
1735 *
1736 * Return: number missed by (or 0 if we didn't miss).
654 */ 1737 */
655static void dwc2_sched_periodic_split(struct dwc2_hsotg *hsotg, 1738static int dwc2_next_for_periodic_split(struct dwc2_hsotg *hsotg,
656 struct dwc2_qh *qh, u16 frame_number, 1739 struct dwc2_qh *qh, u16 frame_number)
657 int sched_next_periodic_split)
658{ 1740{
1741 u16 old_frame = qh->next_active_frame;
1742 u16 prev_frame_number = dwc2_frame_num_dec(frame_number, 1);
1743 int missed = 0;
659 u16 incr; 1744 u16 incr;
660 1745
661 if (sched_next_periodic_split) { 1746 /*
662 qh->sched_frame = frame_number; 1747 * See dwc2_uframe_schedule_split() for split scheduling.
663 incr = dwc2_frame_num_inc(qh->start_split_frame, 1); 1748 *
664 if (dwc2_frame_num_le(frame_number, incr)) { 1749 * Basically: increment 1 normally, but 2 right after the start split
665 /* 1750 * (except for ISOC out).
666 * Allow one frame to elapse after start split 1751 */
667 * microframe before scheduling complete split, but 1752 if (old_frame == qh->start_active_frame &&
668 * DON'T if we are doing the next start split in the 1753 !(qh->ep_type == USB_ENDPOINT_XFER_ISOC && !qh->ep_is_in))
669 * same frame for an ISOC out 1754 incr = 2;
670 */ 1755 else
671 if (qh->ep_type != USB_ENDPOINT_XFER_ISOC || 1756 incr = 1;
672 qh->ep_is_in != 0) { 1757
673 qh->sched_frame = 1758 qh->next_active_frame = dwc2_frame_num_inc(old_frame, incr);
674 dwc2_frame_num_inc(qh->sched_frame, 1); 1759
675 } 1760 /*
676 } 1761 * Note that it's OK for frame_number to be 1 frame past
677 } else { 1762 * next_active_frame. Remember that next_active_frame is supposed to
678 qh->sched_frame = dwc2_frame_num_inc(qh->start_split_frame, 1763 * be 1 frame _before_ when we want to be scheduled. If we're 1 frame
679 qh->interval); 1764 * past it just means schedule ASAP.
680 if (dwc2_frame_num_le(qh->sched_frame, frame_number)) 1765 *
681 qh->sched_frame = frame_number; 1766 * It's _not_ OK, however, if we're more than one frame past.
682 qh->sched_frame |= 0x7; 1767 */
683 qh->start_split_frame = qh->sched_frame; 1768 if (dwc2_frame_num_gt(prev_frame_number, qh->next_active_frame)) {
1769 /*
1770 * OOPS, we missed. That's actually pretty bad since
1771 * the hub will be unhappy; try ASAP I guess.
1772 */
1773 missed = dwc2_frame_num_dec(prev_frame_number,
1774 qh->next_active_frame);
1775 qh->next_active_frame = frame_number;
684 } 1776 }
1777
1778 return missed;
1779}
1780
1781/**
1782 * dwc2_next_periodic_start() - Set next_active_frame for next transfer start
1783 *
1784 * This is called for setting next_active_frame for a periodic transfer for
1785 * all cases other than midway through a periodic split. This will also update
1786 * start_active_frame.
1787 *
1788 * Since we _always_ keep start_active_frame as the start of the previous
1789 * transfer this is normally pretty easy: we just add our interval to
1790 * start_active_frame and we've got our answer.
1791 *
1792 * The tricks come into play if we miss. In that case we'll look for the next
1793 * slot we can fit into.
1794 *
1795 * @hsotg: The HCD state structure
1796 * @qh: QH for the periodic transfer.
1797 * @frame_number: The current frame number.
1798 *
1799 * Return: number missed by (or 0 if we didn't miss).
1800 */
1801static int dwc2_next_periodic_start(struct dwc2_hsotg *hsotg,
1802 struct dwc2_qh *qh, u16 frame_number)
1803{
1804 int missed = 0;
1805 u16 interval = qh->host_interval;
1806 u16 prev_frame_number = dwc2_frame_num_dec(frame_number, 1);
1807
1808 qh->start_active_frame = dwc2_frame_num_inc(qh->start_active_frame,
1809 interval);
1810
1811 /*
1812 * The dwc2_frame_num_gt() function used below won't work terribly well
1813 * with if we just incremented by a really large intervals since the
1814 * frame counter only goes to 0x3fff. It's terribly unlikely that we
1815 * will have missed in this case anyway. Just go to exit. If we want
1816 * to try to do better we'll need to keep track of a bigger counter
1817 * somewhere in the driver and handle overflows.
1818 */
1819 if (interval >= 0x1000)
1820 goto exit;
1821
1822 /*
1823 * Test for misses, which is when it's too late to schedule.
1824 *
1825 * A few things to note:
1826 * - We compare against prev_frame_number since start_active_frame
1827 * and next_active_frame are always 1 frame before we want things
1828 * to be active and we assume we can still get scheduled in the
1829 * current frame number.
1830 * - It's possible for start_active_frame (now incremented) to be
1831 * next_active_frame if we got an EO MISS (even_odd miss) which
1832 * basically means that we detected there wasn't enough time for
1833 * the last packet and dwc2_hc_set_even_odd_frame() rescheduled us
1834 * at the last second. We want to make sure we don't schedule
1835 * another transfer for the same frame. My test webcam doesn't seem
1836 * terribly upset by missing a transfer but really doesn't like when
1837 * we do two transfers in the same frame.
1838 * - Some misses are expected. Specifically, in order to work
1839 * perfectly dwc2 really needs quite spectacular interrupt latency
1840 * requirements. It needs to be able to handle its interrupts
1841 * completely within 125 us of them being asserted. That not only
1842 * means that the dwc2 interrupt handler needs to be fast but it
1843 * means that nothing else in the system has to block dwc2 for a long
1844 * time. We can help with the dwc2 parts of this, but it's hard to
1845 * guarantee that a system will have interrupt latency < 125 us, so
1846 * we have to be robust to some misses.
1847 */
1848 if (qh->start_active_frame == qh->next_active_frame ||
1849 dwc2_frame_num_gt(prev_frame_number, qh->start_active_frame)) {
1850 u16 ideal_start = qh->start_active_frame;
1851 int periods_in_map;
1852
1853 /*
1854 * Adjust interval as per gcd with map size.
1855 * See pmap_schedule() for more details here.
1856 */
1857 if (qh->do_split || qh->dev_speed == USB_SPEED_HIGH)
1858 periods_in_map = DWC2_HS_SCHEDULE_UFRAMES;
1859 else
1860 periods_in_map = DWC2_LS_SCHEDULE_FRAMES;
1861 interval = gcd(interval, periods_in_map);
1862
1863 do {
1864 qh->start_active_frame = dwc2_frame_num_inc(
1865 qh->start_active_frame, interval);
1866 } while (dwc2_frame_num_gt(prev_frame_number,
1867 qh->start_active_frame));
1868
1869 missed = dwc2_frame_num_dec(qh->start_active_frame,
1870 ideal_start);
1871 }
1872
1873exit:
1874 qh->next_active_frame = qh->start_active_frame;
1875
1876 return missed;
685} 1877}
686 1878
687/* 1879/*
@@ -700,7 +1892,9 @@ static void dwc2_sched_periodic_split(struct dwc2_hsotg *hsotg,
700void dwc2_hcd_qh_deactivate(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh, 1892void dwc2_hcd_qh_deactivate(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
701 int sched_next_periodic_split) 1893 int sched_next_periodic_split)
702{ 1894{
1895 u16 old_frame = qh->next_active_frame;
703 u16 frame_number; 1896 u16 frame_number;
1897 int missed;
704 1898
705 if (dbg_qh(qh)) 1899 if (dbg_qh(qh))
706 dev_vdbg(hsotg->dev, "%s()\n", __func__); 1900 dev_vdbg(hsotg->dev, "%s()\n", __func__);
@@ -713,33 +1907,44 @@ void dwc2_hcd_qh_deactivate(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
713 return; 1907 return;
714 } 1908 }
715 1909
1910 /*
1911 * Use the real frame number rather than the cached value as of the
1912 * last SOF just to get us a little closer to reality. Note that
1913 * means we don't actually know if we've already handled the SOF
1914 * interrupt for this frame.
1915 */
716 frame_number = dwc2_hcd_get_frame_number(hsotg); 1916 frame_number = dwc2_hcd_get_frame_number(hsotg);
717 1917
718 if (qh->do_split) { 1918 if (sched_next_periodic_split)
719 dwc2_sched_periodic_split(hsotg, qh, frame_number, 1919 missed = dwc2_next_for_periodic_split(hsotg, qh, frame_number);
720 sched_next_periodic_split); 1920 else
721 } else { 1921 missed = dwc2_next_periodic_start(hsotg, qh, frame_number);
722 qh->sched_frame = dwc2_frame_num_inc(qh->sched_frame, 1922
723 qh->interval); 1923 dwc2_sch_vdbg(hsotg,
724 if (dwc2_frame_num_le(qh->sched_frame, frame_number)) 1924 "QH=%p next(%d) fn=%04x, sch=%04x=>%04x (%+d) miss=%d %s\n",
725 qh->sched_frame = frame_number; 1925 qh, sched_next_periodic_split, frame_number, old_frame,
726 } 1926 qh->next_active_frame,
1927 dwc2_frame_num_dec(qh->next_active_frame, old_frame),
1928 missed, missed ? "MISS" : "");
727 1929
728 if (list_empty(&qh->qtd_list)) { 1930 if (list_empty(&qh->qtd_list)) {
729 dwc2_hcd_qh_unlink(hsotg, qh); 1931 dwc2_hcd_qh_unlink(hsotg, qh);
730 return; 1932 return;
731 } 1933 }
1934
732 /* 1935 /*
733 * Remove from periodic_sched_queued and move to 1936 * Remove from periodic_sched_queued and move to
734 * appropriate queue 1937 * appropriate queue
1938 *
1939 * Note: we purposely use the frame_number from the "hsotg" structure
1940 * since we know SOF interrupt will handle future frames.
735 */ 1941 */
736 if ((hsotg->core_params->uframe_sched > 0 && 1942 if (dwc2_frame_num_le(qh->next_active_frame, hsotg->frame_number))
737 dwc2_frame_num_le(qh->sched_frame, frame_number)) || 1943 list_move_tail(&qh->qh_list_entry,
738 (hsotg->core_params->uframe_sched <= 0 && 1944 &hsotg->periodic_sched_ready);
739 qh->sched_frame == frame_number))
740 list_move(&qh->qh_list_entry, &hsotg->periodic_sched_ready);
741 else 1945 else
742 list_move(&qh->qh_list_entry, &hsotg->periodic_sched_inactive); 1946 list_move_tail(&qh->qh_list_entry,
1947 &hsotg->periodic_sched_inactive);
743} 1948}
744 1949
745/** 1950/**
diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
index 690b9fd98b55..88629bed6614 100644
--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
@@ -126,10 +126,10 @@ static const struct dwc2_core_params params_rk3066 = {
126 .speed = -1, 126 .speed = -1,
127 .enable_dynamic_fifo = 1, 127 .enable_dynamic_fifo = 1,
128 .en_multiple_tx_fifo = -1, 128 .en_multiple_tx_fifo = -1,
129 .host_rx_fifo_size = 520, /* 520 DWORDs */ 129 .host_rx_fifo_size = 525, /* 525 DWORDs */
130 .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */ 130 .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
131 .host_perio_tx_fifo_size = 256, /* 256 DWORDs */ 131 .host_perio_tx_fifo_size = 256, /* 256 DWORDs */
132 .max_transfer_size = 65535, 132 .max_transfer_size = -1,
133 .max_packet_count = -1, 133 .max_packet_count = -1,
134 .host_channels = -1, 134 .host_channels = -1,
135 .phy_type = -1, 135 .phy_type = -1,
@@ -149,6 +149,38 @@ static const struct dwc2_core_params params_rk3066 = {
149 .hibernation = -1, 149 .hibernation = -1,
150}; 150};
151 151
152static const struct dwc2_core_params params_ltq = {
153 .otg_cap = 2, /* non-HNP/non-SRP */
154 .otg_ver = -1,
155 .dma_enable = -1,
156 .dma_desc_enable = -1,
157 .dma_desc_fs_enable = -1,
158 .speed = -1,
159 .enable_dynamic_fifo = -1,
160 .en_multiple_tx_fifo = -1,
161 .host_rx_fifo_size = 288, /* 288 DWORDs */
162 .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
163 .host_perio_tx_fifo_size = 96, /* 96 DWORDs */
164 .max_transfer_size = 65535,
165 .max_packet_count = 511,
166 .host_channels = -1,
167 .phy_type = -1,
168 .phy_utmi_width = -1,
169 .phy_ulpi_ddr = -1,
170 .phy_ulpi_ext_vbus = -1,
171 .i2c_enable = -1,
172 .ulpi_fs_ls = -1,
173 .host_support_fs_ls_low_power = -1,
174 .host_ls_low_power_phy_clk = -1,
175 .ts_dline = -1,
176 .reload_ctl = -1,
177 .ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
178 GAHBCFG_HBSTLEN_SHIFT,
179 .uframe_sched = -1,
180 .external_id_pin_ctl = -1,
181 .hibernation = -1,
182};
183
152/* 184/*
153 * Check the dr_mode against the module configuration and hardware 185 * Check the dr_mode against the module configuration and hardware
154 * capabilities. 186 * capabilities.
@@ -428,6 +460,8 @@ static const struct of_device_id dwc2_of_match_table[] = {
428 { .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 }, 460 { .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 },
429 { .compatible = "hisilicon,hi6220-usb", .data = &params_hi6220 }, 461 { .compatible = "hisilicon,hi6220-usb", .data = &params_hi6220 },
430 { .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 }, 462 { .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 },
463 { .compatible = "lantiq,arx100-usb", .data = &params_ltq },
464 { .compatible = "lantiq,xrx200-usb", .data = &params_ltq },
431 { .compatible = "snps,dwc2", .data = NULL }, 465 { .compatible = "snps,dwc2", .data = NULL },
432 { .compatible = "samsung,s3c6400-hsotg", .data = NULL}, 466 { .compatible = "samsung,s3c6400-hsotg", .data = NULL},
433 {}, 467 {},
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index de5e01f41bc2..17fd81447c9f 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -962,10 +962,6 @@ static int dwc3_probe(struct platform_device *pdev)
962 fladj = pdata->fladj_value; 962 fladj = pdata->fladj_value;
963 } 963 }
964 964
965 /* default to superspeed if no maximum_speed passed */
966 if (dwc->maximum_speed == USB_SPEED_UNKNOWN)
967 dwc->maximum_speed = USB_SPEED_SUPER;
968
969 dwc->lpm_nyet_threshold = lpm_nyet_threshold; 965 dwc->lpm_nyet_threshold = lpm_nyet_threshold;
970 dwc->tx_de_emphasis = tx_de_emphasis; 966 dwc->tx_de_emphasis = tx_de_emphasis;
971 967
@@ -1016,6 +1012,33 @@ static int dwc3_probe(struct platform_device *pdev)
1016 goto err1; 1012 goto err1;
1017 } 1013 }
1018 1014
1015 /* Check the maximum_speed parameter */
1016 switch (dwc->maximum_speed) {
1017 case USB_SPEED_LOW:
1018 case USB_SPEED_FULL:
1019 case USB_SPEED_HIGH:
1020 case USB_SPEED_SUPER:
1021 case USB_SPEED_SUPER_PLUS:
1022 break;
1023 default:
1024 dev_err(dev, "invalid maximum_speed parameter %d\n",
1025 dwc->maximum_speed);
1026 /* fall through */
1027 case USB_SPEED_UNKNOWN:
1028 /* default to superspeed */
1029 dwc->maximum_speed = USB_SPEED_SUPER;
1030
1031 /*
1032 * default to superspeed plus if we are capable.
1033 */
1034 if (dwc3_is_usb31(dwc) &&
1035 (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) ==
1036 DWC3_GHWPARAMS3_SSPHY_IFC_GEN2))
1037 dwc->maximum_speed = USB_SPEED_SUPER_PLUS;
1038
1039 break;
1040 }
1041
1019 /* Adjust Frame Length */ 1042 /* Adjust Frame Length */
1020 dwc3_frame_length_adjustment(dwc, fladj); 1043 dwc3_frame_length_adjustment(dwc, fladj);
1021 1044
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index e4f8b90d9627..6254b2ff9080 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -223,7 +223,8 @@
223/* Global HWPARAMS3 Register */ 223/* Global HWPARAMS3 Register */
224#define DWC3_GHWPARAMS3_SSPHY_IFC(n) ((n) & 3) 224#define DWC3_GHWPARAMS3_SSPHY_IFC(n) ((n) & 3)
225#define DWC3_GHWPARAMS3_SSPHY_IFC_DIS 0 225#define DWC3_GHWPARAMS3_SSPHY_IFC_DIS 0
226#define DWC3_GHWPARAMS3_SSPHY_IFC_ENA 1 226#define DWC3_GHWPARAMS3_SSPHY_IFC_GEN1 1
227#define DWC3_GHWPARAMS3_SSPHY_IFC_GEN2 2 /* DWC_usb31 only */
227#define DWC3_GHWPARAMS3_HSPHY_IFC(n) (((n) & (3 << 2)) >> 2) 228#define DWC3_GHWPARAMS3_HSPHY_IFC(n) (((n) & (3 << 2)) >> 2)
228#define DWC3_GHWPARAMS3_HSPHY_IFC_DIS 0 229#define DWC3_GHWPARAMS3_HSPHY_IFC_DIS 0
229#define DWC3_GHWPARAMS3_HSPHY_IFC_UTMI 1 230#define DWC3_GHWPARAMS3_HSPHY_IFC_UTMI 1
@@ -249,6 +250,7 @@
249#define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f) 250#define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f)
250 251
251#define DWC3_DCFG_SPEED_MASK (7 << 0) 252#define DWC3_DCFG_SPEED_MASK (7 << 0)
253#define DWC3_DCFG_SUPERSPEED_PLUS (5 << 0) /* DWC_usb31 only */
252#define DWC3_DCFG_SUPERSPEED (4 << 0) 254#define DWC3_DCFG_SUPERSPEED (4 << 0)
253#define DWC3_DCFG_HIGHSPEED (0 << 0) 255#define DWC3_DCFG_HIGHSPEED (0 << 0)
254#define DWC3_DCFG_FULLSPEED2 (1 << 0) 256#define DWC3_DCFG_FULLSPEED2 (1 << 0)
@@ -339,6 +341,7 @@
339 341
340#define DWC3_DSTS_CONNECTSPD (7 << 0) 342#define DWC3_DSTS_CONNECTSPD (7 << 0)
341 343
344#define DWC3_DSTS_SUPERSPEED_PLUS (5 << 0) /* DWC_usb31 only */
342#define DWC3_DSTS_SUPERSPEED (4 << 0) 345#define DWC3_DSTS_SUPERSPEED (4 << 0)
343#define DWC3_DSTS_HIGHSPEED (0 << 0) 346#define DWC3_DSTS_HIGHSPEED (0 << 0)
344#define DWC3_DSTS_FULLSPEED2 (1 << 0) 347#define DWC3_DSTS_FULLSPEED2 (1 << 0)
@@ -1024,6 +1027,12 @@ struct dwc3_gadget_ep_cmd_params {
1024void dwc3_set_mode(struct dwc3 *dwc, u32 mode); 1027void dwc3_set_mode(struct dwc3 *dwc, u32 mode);
1025int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc); 1028int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc);
1026 1029
1030/* check whether we are on the DWC_usb31 core */
1031static inline bool dwc3_is_usb31(struct dwc3 *dwc)
1032{
1033 return !!(dwc->revision & DWC3_REVISION_IS_DWC31);
1034}
1035
1027#if IS_ENABLED(CONFIG_USB_DWC3_HOST) || IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE) 1036#if IS_ENABLED(CONFIG_USB_DWC3_HOST) || IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE)
1028int dwc3_host_init(struct dwc3 *dwc); 1037int dwc3_host_init(struct dwc3 *dwc);
1029void dwc3_host_exit(struct dwc3 *dwc); 1038void dwc3_host_exit(struct dwc3 *dwc);
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 8d6b75c2f53b..eca2e6d8e041 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -356,7 +356,8 @@ static int dwc3_ep0_handle_status(struct dwc3 *dwc,
356 */ 356 */
357 usb_status |= dwc->gadget.is_selfpowered; 357 usb_status |= dwc->gadget.is_selfpowered;
358 358
359 if (dwc->speed == DWC3_DSTS_SUPERSPEED) { 359 if ((dwc->speed == DWC3_DSTS_SUPERSPEED) ||
360 (dwc->speed == DWC3_DSTS_SUPERSPEED_PLUS)) {
360 reg = dwc3_readl(dwc->regs, DWC3_DCTL); 361 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
361 if (reg & DWC3_DCTL_INITU1ENA) 362 if (reg & DWC3_DCTL_INITU1ENA)
362 usb_status |= 1 << USB_DEV_STAT_U1_ENABLED; 363 usb_status |= 1 << USB_DEV_STAT_U1_ENABLED;
@@ -426,7 +427,8 @@ static int dwc3_ep0_handle_feature(struct dwc3 *dwc,
426 case USB_DEVICE_U1_ENABLE: 427 case USB_DEVICE_U1_ENABLE:
427 if (state != USB_STATE_CONFIGURED) 428 if (state != USB_STATE_CONFIGURED)
428 return -EINVAL; 429 return -EINVAL;
429 if (dwc->speed != DWC3_DSTS_SUPERSPEED) 430 if ((dwc->speed != DWC3_DSTS_SUPERSPEED) &&
431 (dwc->speed != DWC3_DSTS_SUPERSPEED_PLUS))
430 return -EINVAL; 432 return -EINVAL;
431 433
432 reg = dwc3_readl(dwc->regs, DWC3_DCTL); 434 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
@@ -440,7 +442,8 @@ static int dwc3_ep0_handle_feature(struct dwc3 *dwc,
440 case USB_DEVICE_U2_ENABLE: 442 case USB_DEVICE_U2_ENABLE:
441 if (state != USB_STATE_CONFIGURED) 443 if (state != USB_STATE_CONFIGURED)
442 return -EINVAL; 444 return -EINVAL;
443 if (dwc->speed != DWC3_DSTS_SUPERSPEED) 445 if ((dwc->speed != DWC3_DSTS_SUPERSPEED) &&
446 (dwc->speed != DWC3_DSTS_SUPERSPEED_PLUS))
444 return -EINVAL; 447 return -EINVAL;
445 448
446 reg = dwc3_readl(dwc->regs, DWC3_DCTL); 449 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 2363bad45af8..3ac170f9d94d 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -463,7 +463,7 @@ static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep,
463 | DWC3_DEPCFG_MAX_PACKET_SIZE(usb_endpoint_maxp(desc)); 463 | DWC3_DEPCFG_MAX_PACKET_SIZE(usb_endpoint_maxp(desc));
464 464
465 /* Burst size is only needed in SuperSpeed mode */ 465 /* Burst size is only needed in SuperSpeed mode */
466 if (dwc->gadget.speed == USB_SPEED_SUPER) { 466 if (dwc->gadget.speed >= USB_SPEED_SUPER) {
467 u32 burst = dep->endpoint.maxburst - 1; 467 u32 burst = dep->endpoint.maxburst - 1;
468 468
469 params.param0 |= DWC3_DEPCFG_BURST_SIZE(burst); 469 params.param0 |= DWC3_DEPCFG_BURST_SIZE(burst);
@@ -1441,7 +1441,8 @@ static int dwc3_gadget_wakeup(struct usb_gadget *g)
1441 reg = dwc3_readl(dwc->regs, DWC3_DSTS); 1441 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1442 1442
1443 speed = reg & DWC3_DSTS_CONNECTSPD; 1443 speed = reg & DWC3_DSTS_CONNECTSPD;
1444 if (speed == DWC3_DSTS_SUPERSPEED) { 1444 if ((speed == DWC3_DSTS_SUPERSPEED) ||
1445 (speed == DWC3_DSTS_SUPERSPEED_PLUS)) {
1445 dwc3_trace(trace_dwc3_gadget, "no wakeup on SuperSpeed\n"); 1446 dwc3_trace(trace_dwc3_gadget, "no wakeup on SuperSpeed\n");
1446 ret = -EINVAL; 1447 ret = -EINVAL;
1447 goto out; 1448 goto out;
@@ -1666,10 +1667,16 @@ static int dwc3_gadget_start(struct usb_gadget *g,
1666 case USB_SPEED_HIGH: 1667 case USB_SPEED_HIGH:
1667 reg |= DWC3_DSTS_HIGHSPEED; 1668 reg |= DWC3_DSTS_HIGHSPEED;
1668 break; 1669 break;
1669 case USB_SPEED_SUPER: /* FALLTHROUGH */ 1670 case USB_SPEED_SUPER_PLUS:
1670 case USB_SPEED_UNKNOWN: /* FALTHROUGH */ 1671 reg |= DWC3_DSTS_SUPERSPEED_PLUS;
1672 break;
1671 default: 1673 default:
1672 reg |= DWC3_DSTS_SUPERSPEED; 1674 dev_err(dwc->dev, "invalid dwc->maximum_speed (%d)\n",
1675 dwc->maximum_speed);
1676 /* fall through */
1677 case USB_SPEED_SUPER:
1678 reg |= DWC3_DCFG_SUPERSPEED;
1679 break;
1673 } 1680 }
1674 } 1681 }
1675 dwc3_writel(dwc->regs, DWC3_DCFG, reg); 1682 dwc3_writel(dwc->regs, DWC3_DCFG, reg);
@@ -2340,7 +2347,8 @@ static void dwc3_update_ram_clk_sel(struct dwc3 *dwc, u32 speed)
2340 * this. Maybe it becomes part of the power saving plan. 2347 * this. Maybe it becomes part of the power saving plan.
2341 */ 2348 */
2342 2349
2343 if (speed != DWC3_DSTS_SUPERSPEED) 2350 if ((speed != DWC3_DSTS_SUPERSPEED) &&
2351 (speed != DWC3_DSTS_SUPERSPEED_PLUS))
2344 return; 2352 return;
2345 2353
2346 /* 2354 /*
@@ -2369,6 +2377,11 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
2369 dwc3_update_ram_clk_sel(dwc, speed); 2377 dwc3_update_ram_clk_sel(dwc, speed);
2370 2378
2371 switch (speed) { 2379 switch (speed) {
2380 case DWC3_DCFG_SUPERSPEED_PLUS:
2381 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
2382 dwc->gadget.ep0->maxpacket = 512;
2383 dwc->gadget.speed = USB_SPEED_SUPER_PLUS;
2384 break;
2372 case DWC3_DCFG_SUPERSPEED: 2385 case DWC3_DCFG_SUPERSPEED:
2373 /* 2386 /*
2374 * WORKAROUND: DWC3 revisions <1.90a have an issue which 2387 * WORKAROUND: DWC3 revisions <1.90a have an issue which
@@ -2410,8 +2423,9 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
2410 2423
2411 /* Enable USB2 LPM Capability */ 2424 /* Enable USB2 LPM Capability */
2412 2425
2413 if ((dwc->revision > DWC3_REVISION_194A) 2426 if ((dwc->revision > DWC3_REVISION_194A) &&
2414 && (speed != DWC3_DCFG_SUPERSPEED)) { 2427 (speed != DWC3_DCFG_SUPERSPEED) &&
2428 (speed != DWC3_DCFG_SUPERSPEED_PLUS)) {
2415 reg = dwc3_readl(dwc->regs, DWC3_DCFG); 2429 reg = dwc3_readl(dwc->regs, DWC3_DCFG);
2416 reg |= DWC3_DCFG_LPM_CAP; 2430 reg |= DWC3_DCFG_LPM_CAP;
2417 dwc3_writel(dwc->regs, DWC3_DCFG, reg); 2431 dwc3_writel(dwc->regs, DWC3_DCFG, reg);
diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index 8b14c2a13ac5..a5c62093c26c 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -54,6 +54,36 @@ static struct usb_gadget_strings **get_containers_gs(
54} 54}
55 55
56/** 56/**
57 * function_descriptors() - get function descriptors for speed
58 * @f: the function
59 * @speed: the speed
60 *
61 * Returns the descriptors or NULL if not set.
62 */
63static struct usb_descriptor_header **
64function_descriptors(struct usb_function *f,
65 enum usb_device_speed speed)
66{
67 struct usb_descriptor_header **descriptors;
68
69 switch (speed) {
70 case USB_SPEED_SUPER_PLUS:
71 descriptors = f->ssp_descriptors;
72 break;
73 case USB_SPEED_SUPER:
74 descriptors = f->ss_descriptors;
75 break;
76 case USB_SPEED_HIGH:
77 descriptors = f->hs_descriptors;
78 break;
79 default:
80 descriptors = f->fs_descriptors;
81 }
82
83 return descriptors;
84}
85
86/**
57 * next_ep_desc() - advance to the next EP descriptor 87 * next_ep_desc() - advance to the next EP descriptor
58 * @t: currect pointer within descriptor array 88 * @t: currect pointer within descriptor array
59 * 89 *
@@ -118,6 +148,13 @@ int config_ep_by_speed(struct usb_gadget *g,
118 148
119 /* select desired speed */ 149 /* select desired speed */
120 switch (g->speed) { 150 switch (g->speed) {
151 case USB_SPEED_SUPER_PLUS:
152 if (gadget_is_superspeed_plus(g)) {
153 speed_desc = f->ssp_descriptors;
154 want_comp_desc = 1;
155 break;
156 }
157 /* else: Fall trough */
121 case USB_SPEED_SUPER: 158 case USB_SPEED_SUPER:
122 if (gadget_is_superspeed(g)) { 159 if (gadget_is_superspeed(g)) {
123 speed_desc = f->ss_descriptors; 160 speed_desc = f->ss_descriptors;
@@ -161,7 +198,7 @@ ep_found:
161 (comp_desc->bDescriptorType != USB_DT_SS_ENDPOINT_COMP)) 198 (comp_desc->bDescriptorType != USB_DT_SS_ENDPOINT_COMP))
162 return -EIO; 199 return -EIO;
163 _ep->comp_desc = comp_desc; 200 _ep->comp_desc = comp_desc;
164 if (g->speed == USB_SPEED_SUPER) { 201 if (g->speed >= USB_SPEED_SUPER) {
165 switch (usb_endpoint_type(_ep->desc)) { 202 switch (usb_endpoint_type(_ep->desc)) {
166 case USB_ENDPOINT_XFER_ISOC: 203 case USB_ENDPOINT_XFER_ISOC:
167 /* mult: bits 1:0 of bmAttributes */ 204 /* mult: bits 1:0 of bmAttributes */
@@ -237,6 +274,8 @@ int usb_add_function(struct usb_configuration *config,
237 config->highspeed = true; 274 config->highspeed = true;
238 if (!config->superspeed && function->ss_descriptors) 275 if (!config->superspeed && function->ss_descriptors)
239 config->superspeed = true; 276 config->superspeed = true;
277 if (!config->superspeed_plus && function->ssp_descriptors)
278 config->superspeed_plus = true;
240 279
241done: 280done:
242 if (value) 281 if (value)
@@ -417,17 +456,7 @@ static int config_buf(struct usb_configuration *config,
417 list_for_each_entry(f, &config->functions, list) { 456 list_for_each_entry(f, &config->functions, list) {
418 struct usb_descriptor_header **descriptors; 457 struct usb_descriptor_header **descriptors;
419 458
420 switch (speed) { 459 descriptors = function_descriptors(f, speed);
421 case USB_SPEED_SUPER:
422 descriptors = f->ss_descriptors;
423 break;
424 case USB_SPEED_HIGH:
425 descriptors = f->hs_descriptors;
426 break;
427 default:
428 descriptors = f->fs_descriptors;
429 }
430
431 if (!descriptors) 460 if (!descriptors)
432 continue; 461 continue;
433 status = usb_descriptor_fillbuf(next, len, 462 status = usb_descriptor_fillbuf(next, len,
@@ -451,7 +480,7 @@ static int config_desc(struct usb_composite_dev *cdev, unsigned w_value)
451 u8 type = w_value >> 8; 480 u8 type = w_value >> 8;
452 enum usb_device_speed speed = USB_SPEED_UNKNOWN; 481 enum usb_device_speed speed = USB_SPEED_UNKNOWN;
453 482
454 if (gadget->speed == USB_SPEED_SUPER) 483 if (gadget->speed >= USB_SPEED_SUPER)
455 speed = gadget->speed; 484 speed = gadget->speed;
456 else if (gadget_is_dualspeed(gadget)) { 485 else if (gadget_is_dualspeed(gadget)) {
457 int hs = 0; 486 int hs = 0;
@@ -482,6 +511,10 @@ static int config_desc(struct usb_composite_dev *cdev, unsigned w_value)
482check_config: 511check_config:
483 /* ignore configs that won't work at this speed */ 512 /* ignore configs that won't work at this speed */
484 switch (speed) { 513 switch (speed) {
514 case USB_SPEED_SUPER_PLUS:
515 if (!c->superspeed_plus)
516 continue;
517 break;
485 case USB_SPEED_SUPER: 518 case USB_SPEED_SUPER:
486 if (!c->superspeed) 519 if (!c->superspeed)
487 continue; 520 continue;
@@ -509,18 +542,24 @@ static int count_configs(struct usb_composite_dev *cdev, unsigned type)
509 unsigned count = 0; 542 unsigned count = 0;
510 int hs = 0; 543 int hs = 0;
511 int ss = 0; 544 int ss = 0;
545 int ssp = 0;
512 546
513 if (gadget_is_dualspeed(gadget)) { 547 if (gadget_is_dualspeed(gadget)) {
514 if (gadget->speed == USB_SPEED_HIGH) 548 if (gadget->speed == USB_SPEED_HIGH)
515 hs = 1; 549 hs = 1;
516 if (gadget->speed == USB_SPEED_SUPER) 550 if (gadget->speed == USB_SPEED_SUPER)
517 ss = 1; 551 ss = 1;
552 if (gadget->speed == USB_SPEED_SUPER_PLUS)
553 ssp = 1;
518 if (type == USB_DT_DEVICE_QUALIFIER) 554 if (type == USB_DT_DEVICE_QUALIFIER)
519 hs = !hs; 555 hs = !hs;
520 } 556 }
521 list_for_each_entry(c, &cdev->configs, list) { 557 list_for_each_entry(c, &cdev->configs, list) {
522 /* ignore configs that won't work at this speed */ 558 /* ignore configs that won't work at this speed */
523 if (ss) { 559 if (ssp) {
560 if (!c->superspeed_plus)
561 continue;
562 } else if (ss) {
524 if (!c->superspeed) 563 if (!c->superspeed)
525 continue; 564 continue;
526 } else if (hs) { 565 } else if (hs) {
@@ -597,6 +636,48 @@ static int bos_desc(struct usb_composite_dev *cdev)
597 ss_cap->bU1devExitLat = dcd_config_params.bU1devExitLat; 636 ss_cap->bU1devExitLat = dcd_config_params.bU1devExitLat;
598 ss_cap->bU2DevExitLat = dcd_config_params.bU2DevExitLat; 637 ss_cap->bU2DevExitLat = dcd_config_params.bU2DevExitLat;
599 638
639 /* The SuperSpeedPlus USB Device Capability descriptor */
640 if (gadget_is_superspeed_plus(cdev->gadget)) {
641 struct usb_ssp_cap_descriptor *ssp_cap;
642
643 ssp_cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
644 bos->bNumDeviceCaps++;
645
646 /*
647 * Report typical values.
648 */
649
650 le16_add_cpu(&bos->wTotalLength, USB_DT_USB_SSP_CAP_SIZE(1));
651 ssp_cap->bLength = USB_DT_USB_SSP_CAP_SIZE(1);
652 ssp_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
653 ssp_cap->bDevCapabilityType = USB_SSP_CAP_TYPE;
654
655 /* SSAC = 1 (2 attributes) */
656 ssp_cap->bmAttributes = cpu_to_le32(1);
657
658 /* Min RX/TX Lane Count = 1 */
659 ssp_cap->wFunctionalitySupport = (1 << 8) | (1 << 12);
660
661 /*
662 * bmSublinkSpeedAttr[0]:
663 * ST = Symmetric, RX
664 * LSE = 3 (Gbps)
665 * LP = 1 (SuperSpeedPlus)
666 * LSM = 10 (10 Gbps)
667 */
668 ssp_cap->bmSublinkSpeedAttr[0] =
669 (3 << 4) | (1 << 14) | (0xa << 16);
670 /*
671 * bmSublinkSpeedAttr[1] =
672 * ST = Symmetric, TX
673 * LSE = 3 (Gbps)
674 * LP = 1 (SuperSpeedPlus)
675 * LSM = 10 (10 Gbps)
676 */
677 ssp_cap->bmSublinkSpeedAttr[1] =
678 (3 << 4) | (1 << 14) | (0xa << 16) | (1 << 7);
679 }
680
600 return le16_to_cpu(bos->wTotalLength); 681 return le16_to_cpu(bos->wTotalLength);
601} 682}
602 683
@@ -690,16 +771,7 @@ static int set_config(struct usb_composite_dev *cdev,
690 * function's setup callback instead of the current 771 * function's setup callback instead of the current
691 * configuration's setup callback. 772 * configuration's setup callback.
692 */ 773 */
693 switch (gadget->speed) { 774 descriptors = function_descriptors(f, gadget->speed);
694 case USB_SPEED_SUPER:
695 descriptors = f->ss_descriptors;
696 break;
697 case USB_SPEED_HIGH:
698 descriptors = f->hs_descriptors;
699 break;
700 default:
701 descriptors = f->fs_descriptors;
702 }
703 775
704 for (; *descriptors; ++descriptors) { 776 for (; *descriptors; ++descriptors) {
705 struct usb_endpoint_descriptor *ep; 777 struct usb_endpoint_descriptor *ep;
@@ -819,8 +891,9 @@ int usb_add_config(struct usb_composite_dev *cdev,
819 } else { 891 } else {
820 unsigned i; 892 unsigned i;
821 893
822 DBG(cdev, "cfg %d/%p speeds:%s%s%s\n", 894 DBG(cdev, "cfg %d/%p speeds:%s%s%s%s\n",
823 config->bConfigurationValue, config, 895 config->bConfigurationValue, config,
896 config->superspeed_plus ? " superplus" : "",
824 config->superspeed ? " super" : "", 897 config->superspeed ? " super" : "",
825 config->highspeed ? " high" : "", 898 config->highspeed ? " high" : "",
826 config->fullspeed 899 config->fullspeed
@@ -1499,7 +1572,7 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
1499 cdev->gadget->ep0->maxpacket; 1572 cdev->gadget->ep0->maxpacket;
1500 if (gadget_is_superspeed(gadget)) { 1573 if (gadget_is_superspeed(gadget)) {
1501 if (gadget->speed >= USB_SPEED_SUPER) { 1574 if (gadget->speed >= USB_SPEED_SUPER) {
1502 cdev->desc.bcdUSB = cpu_to_le16(0x0300); 1575 cdev->desc.bcdUSB = cpu_to_le16(0x0310);
1503 cdev->desc.bMaxPacketSize0 = 9; 1576 cdev->desc.bMaxPacketSize0 = 9;
1504 } else { 1577 } else {
1505 cdev->desc.bcdUSB = cpu_to_le16(0x0210); 1578 cdev->desc.bcdUSB = cpu_to_le16(0x0210);
@@ -1634,15 +1707,24 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
1634 *((u8 *)req->buf) = value; 1707 *((u8 *)req->buf) = value;
1635 value = min(w_length, (u16) 1); 1708 value = min(w_length, (u16) 1);
1636 break; 1709 break;
1637
1638 /*
1639 * USB 3.0 additions:
1640 * Function driver should handle get_status request. If such cb
1641 * wasn't supplied we respond with default value = 0
1642 * Note: function driver should supply such cb only for the first
1643 * interface of the function
1644 */
1645 case USB_REQ_GET_STATUS: 1710 case USB_REQ_GET_STATUS:
1711 if (gadget_is_otg(gadget) && gadget->hnp_polling_support &&
1712 (w_index == OTG_STS_SELECTOR)) {
1713 if (ctrl->bRequestType != (USB_DIR_IN |
1714 USB_RECIP_DEVICE))
1715 goto unknown;
1716 *((u8 *)req->buf) = gadget->host_request_flag;
1717 value = 1;
1718 break;
1719 }
1720
1721 /*
1722 * USB 3.0 additions:
1723 * Function driver should handle get_status request. If such cb
1724 * wasn't supplied we respond with default value = 0
1725 * Note: function driver should supply such cb only for the
1726 * first interface of the function
1727 */
1646 if (!gadget_is_superspeed(gadget)) 1728 if (!gadget_is_superspeed(gadget))
1647 goto unknown; 1729 goto unknown;
1648 if (ctrl->bRequestType != (USB_DIR_IN | USB_RECIP_INTERFACE)) 1730 if (ctrl->bRequestType != (USB_DIR_IN | USB_RECIP_INTERFACE))
diff --git a/drivers/usb/gadget/config.c b/drivers/usb/gadget/config.c
index 0fafa7a1b6f6..e6c0542a063b 100644
--- a/drivers/usb/gadget/config.c
+++ b/drivers/usb/gadget/config.c
@@ -163,7 +163,8 @@ EXPORT_SYMBOL_GPL(usb_copy_descriptors);
163int usb_assign_descriptors(struct usb_function *f, 163int usb_assign_descriptors(struct usb_function *f,
164 struct usb_descriptor_header **fs, 164 struct usb_descriptor_header **fs,
165 struct usb_descriptor_header **hs, 165 struct usb_descriptor_header **hs,
166 struct usb_descriptor_header **ss) 166 struct usb_descriptor_header **ss,
167 struct usb_descriptor_header **ssp)
167{ 168{
168 struct usb_gadget *g = f->config->cdev->gadget; 169 struct usb_gadget *g = f->config->cdev->gadget;
169 170
@@ -182,6 +183,11 @@ int usb_assign_descriptors(struct usb_function *f,
182 if (!f->ss_descriptors) 183 if (!f->ss_descriptors)
183 goto err; 184 goto err;
184 } 185 }
186 if (ssp && gadget_is_superspeed_plus(g)) {
187 f->ssp_descriptors = usb_copy_descriptors(ssp);
188 if (!f->ssp_descriptors)
189 goto err;
190 }
185 return 0; 191 return 0;
186err: 192err:
187 usb_free_all_descriptors(f); 193 usb_free_all_descriptors(f);
@@ -194,6 +200,7 @@ void usb_free_all_descriptors(struct usb_function *f)
194 usb_free_descriptors(f->fs_descriptors); 200 usb_free_descriptors(f->fs_descriptors);
195 usb_free_descriptors(f->hs_descriptors); 201 usb_free_descriptors(f->hs_descriptors);
196 usb_free_descriptors(f->ss_descriptors); 202 usb_free_descriptors(f->ss_descriptors);
203 usb_free_descriptors(f->ssp_descriptors);
197} 204}
198EXPORT_SYMBOL_GPL(usb_free_all_descriptors); 205EXPORT_SYMBOL_GPL(usb_free_all_descriptors);
199 206
diff --git a/drivers/usb/gadget/configfs.c b/drivers/usb/gadget/configfs.c
index 590c44989e5e..c6cc15ebeed6 100644
--- a/drivers/usb/gadget/configfs.c
+++ b/drivers/usb/gadget/configfs.c
@@ -1229,6 +1229,7 @@ static void purge_configs_funcs(struct gadget_info *gi)
1229 } 1229 }
1230 c->next_interface_id = 0; 1230 c->next_interface_id = 0;
1231 memset(c->interface, 0, sizeof(c->interface)); 1231 memset(c->interface, 0, sizeof(c->interface));
1232 c->superspeed_plus = 0;
1232 c->superspeed = 0; 1233 c->superspeed = 0;
1233 c->highspeed = 0; 1234 c->highspeed = 0;
1234 c->fullspeed = 0; 1235 c->fullspeed = 0;
diff --git a/drivers/usb/gadget/function/f_acm.c b/drivers/usb/gadget/function/f_acm.c
index 2fa1e80a3ce7..a30766ca4226 100644
--- a/drivers/usb/gadget/function/f_acm.c
+++ b/drivers/usb/gadget/function/f_acm.c
@@ -685,7 +685,7 @@ acm_bind(struct usb_configuration *c, struct usb_function *f)
685 acm_ss_out_desc.bEndpointAddress = acm_fs_out_desc.bEndpointAddress; 685 acm_ss_out_desc.bEndpointAddress = acm_fs_out_desc.bEndpointAddress;
686 686
687 status = usb_assign_descriptors(f, acm_fs_function, acm_hs_function, 687 status = usb_assign_descriptors(f, acm_fs_function, acm_hs_function,
688 acm_ss_function); 688 acm_ss_function, NULL);
689 if (status) 689 if (status)
690 goto fail; 690 goto fail;
691 691
@@ -777,10 +777,10 @@ static ssize_t f_acm_port_num_show(struct config_item *item, char *page)
777 return sprintf(page, "%u\n", to_f_serial_opts(item)->port_num); 777 return sprintf(page, "%u\n", to_f_serial_opts(item)->port_num);
778} 778}
779 779
780CONFIGFS_ATTR_RO(f_acm_port_, num); 780CONFIGFS_ATTR_RO(f_acm_, port_num);
781 781
782static struct configfs_attribute *acm_attrs[] = { 782static struct configfs_attribute *acm_attrs[] = {
783 &f_acm_port_attr_num, 783 &f_acm_attr_port_num,
784 NULL, 784 NULL,
785}; 785};
786 786
diff --git a/drivers/usb/gadget/function/f_ecm.c b/drivers/usb/gadget/function/f_ecm.c
index 7ad60ee41914..4c488d15b6f6 100644
--- a/drivers/usb/gadget/function/f_ecm.c
+++ b/drivers/usb/gadget/function/f_ecm.c
@@ -786,7 +786,7 @@ ecm_bind(struct usb_configuration *c, struct usb_function *f)
786 fs_ecm_notify_desc.bEndpointAddress; 786 fs_ecm_notify_desc.bEndpointAddress;
787 787
788 status = usb_assign_descriptors(f, ecm_fs_function, ecm_hs_function, 788 status = usb_assign_descriptors(f, ecm_fs_function, ecm_hs_function,
789 ecm_ss_function); 789 ecm_ss_function, NULL);
790 if (status) 790 if (status)
791 goto fail; 791 goto fail;
792 792
diff --git a/drivers/usb/gadget/function/f_eem.c b/drivers/usb/gadget/function/f_eem.c
index cad35a502d3f..d58bfc32be9e 100644
--- a/drivers/usb/gadget/function/f_eem.c
+++ b/drivers/usb/gadget/function/f_eem.c
@@ -309,7 +309,7 @@ static int eem_bind(struct usb_configuration *c, struct usb_function *f)
309 eem_ss_out_desc.bEndpointAddress = eem_fs_out_desc.bEndpointAddress; 309 eem_ss_out_desc.bEndpointAddress = eem_fs_out_desc.bEndpointAddress;
310 310
311 status = usb_assign_descriptors(f, eem_fs_function, eem_hs_function, 311 status = usb_assign_descriptors(f, eem_fs_function, eem_hs_function,
312 eem_ss_function); 312 eem_ss_function, NULL);
313 if (status) 313 if (status)
314 goto fail; 314 goto fail;
315 315
diff --git a/drivers/usb/gadget/function/f_fs.c b/drivers/usb/gadget/function/f_fs.c
index cf43e9e18368..8cfce105c7ee 100644
--- a/drivers/usb/gadget/function/f_fs.c
+++ b/drivers/usb/gadget/function/f_fs.c
@@ -684,44 +684,38 @@ static void ffs_epfile_async_io_complete(struct usb_ep *_ep,
684static ssize_t ffs_epfile_io(struct file *file, struct ffs_io_data *io_data) 684static ssize_t ffs_epfile_io(struct file *file, struct ffs_io_data *io_data)
685{ 685{
686 struct ffs_epfile *epfile = file->private_data; 686 struct ffs_epfile *epfile = file->private_data;
687 struct usb_request *req;
687 struct ffs_ep *ep; 688 struct ffs_ep *ep;
688 char *data = NULL; 689 char *data = NULL;
689 ssize_t ret, data_len = -EINVAL; 690 ssize_t ret, data_len = -EINVAL;
690 int halt; 691 int halt;
691 692
692 /* Are we still active? */ 693 /* Are we still active? */
693 if (WARN_ON(epfile->ffs->state != FFS_ACTIVE)) { 694 if (WARN_ON(epfile->ffs->state != FFS_ACTIVE))
694 ret = -ENODEV; 695 return -ENODEV;
695 goto error;
696 }
697 696
698 /* Wait for endpoint to be enabled */ 697 /* Wait for endpoint to be enabled */
699 ep = epfile->ep; 698 ep = epfile->ep;
700 if (!ep) { 699 if (!ep) {
701 if (file->f_flags & O_NONBLOCK) { 700 if (file->f_flags & O_NONBLOCK)
702 ret = -EAGAIN; 701 return -EAGAIN;
703 goto error;
704 }
705 702
706 ret = wait_event_interruptible(epfile->wait, (ep = epfile->ep)); 703 ret = wait_event_interruptible(epfile->wait, (ep = epfile->ep));
707 if (ret) { 704 if (ret)
708 ret = -EINTR; 705 return -EINTR;
709 goto error;
710 }
711 } 706 }
712 707
713 /* Do we halt? */ 708 /* Do we halt? */
714 halt = (!io_data->read == !epfile->in); 709 halt = (!io_data->read == !epfile->in);
715 if (halt && epfile->isoc) { 710 if (halt && epfile->isoc)
716 ret = -EINVAL; 711 return -EINVAL;
717 goto error;
718 }
719 712
720 /* Allocate & copy */ 713 /* Allocate & copy */
721 if (!halt) { 714 if (!halt) {
722 /* 715 /*
723 * if we _do_ wait above, the epfile->ffs->gadget might be NULL 716 * if we _do_ wait above, the epfile->ffs->gadget might be NULL
724 * before the waiting completes, so do not assign to 'gadget' earlier 717 * before the waiting completes, so do not assign to 'gadget'
718 * earlier
725 */ 719 */
726 struct usb_gadget *gadget = epfile->ffs->gadget; 720 struct usb_gadget *gadget = epfile->ffs->gadget;
727 size_t copied; 721 size_t copied;
@@ -763,17 +757,12 @@ static ssize_t ffs_epfile_io(struct file *file, struct ffs_io_data *io_data)
763 if (epfile->ep != ep) { 757 if (epfile->ep != ep) {
764 /* In the meantime, endpoint got disabled or changed. */ 758 /* In the meantime, endpoint got disabled or changed. */
765 ret = -ESHUTDOWN; 759 ret = -ESHUTDOWN;
766 spin_unlock_irq(&epfile->ffs->eps_lock);
767 } else if (halt) { 760 } else if (halt) {
768 /* Halt */ 761 /* Halt */
769 if (likely(epfile->ep == ep) && !WARN_ON(!ep->ep)) 762 if (likely(epfile->ep == ep) && !WARN_ON(!ep->ep))
770 usb_ep_set_halt(ep->ep); 763 usb_ep_set_halt(ep->ep);
771 spin_unlock_irq(&epfile->ffs->eps_lock);
772 ret = -EBADMSG; 764 ret = -EBADMSG;
773 } else { 765 } else if (unlikely(data_len == -EINVAL)) {
774 /* Fire the request */
775 struct usb_request *req;
776
777 /* 766 /*
778 * Sanity Check: even though data_len can't be used 767 * Sanity Check: even though data_len can't be used
779 * uninitialized at the time I write this comment, some 768 * uninitialized at the time I write this comment, some
@@ -785,80 +774,80 @@ static ssize_t ffs_epfile_io(struct file *file, struct ffs_io_data *io_data)
785 * For such reason, we're adding this redundant sanity check 774 * For such reason, we're adding this redundant sanity check
786 * here. 775 * here.
787 */ 776 */
788 if (unlikely(data_len == -EINVAL)) { 777 WARN(1, "%s: data_len == -EINVAL\n", __func__);
789 WARN(1, "%s: data_len == -EINVAL\n", __func__); 778 ret = -EINVAL;
790 ret = -EINVAL; 779 } else if (!io_data->aio) {
791 goto error_lock; 780 DECLARE_COMPLETION_ONSTACK(done);
792 } 781 bool interrupted = false;
793
794 if (io_data->aio) {
795 req = usb_ep_alloc_request(ep->ep, GFP_KERNEL);
796 if (unlikely(!req))
797 goto error_lock;
798
799 req->buf = data;
800 req->length = data_len;
801 782
802 io_data->buf = data; 783 req = ep->req;
803 io_data->ep = ep->ep; 784 req->buf = data;
804 io_data->req = req; 785 req->length = data_len;
805 io_data->ffs = epfile->ffs;
806 786
807 req->context = io_data; 787 req->context = &done;
808 req->complete = ffs_epfile_async_io_complete; 788 req->complete = ffs_epfile_io_complete;
809 789
810 ret = usb_ep_queue(ep->ep, req, GFP_ATOMIC); 790 ret = usb_ep_queue(ep->ep, req, GFP_ATOMIC);
811 if (unlikely(ret)) { 791 if (unlikely(ret < 0))
812 usb_ep_free_request(ep->ep, req); 792 goto error_lock;
813 goto error_lock;
814 }
815 ret = -EIOCBQUEUED;
816 793
817 spin_unlock_irq(&epfile->ffs->eps_lock); 794 spin_unlock_irq(&epfile->ffs->eps_lock);
818 } else {
819 DECLARE_COMPLETION_ONSTACK(done);
820 795
821 req = ep->req; 796 if (unlikely(wait_for_completion_interruptible(&done))) {
822 req->buf = data; 797 /*
823 req->length = data_len; 798 * To avoid race condition with ffs_epfile_io_complete,
799 * dequeue the request first then check
800 * status. usb_ep_dequeue API should guarantee no race
801 * condition with req->complete callback.
802 */
803 usb_ep_dequeue(ep->ep, req);
804 interrupted = ep->status < 0;
805 }
824 806
825 req->context = &done; 807 /*
826 req->complete = ffs_epfile_io_complete; 808 * XXX We may end up silently droping data here. Since data_len
809 * (i.e. req->length) may be bigger than len (after being
810 * rounded up to maxpacketsize), we may end up with more data
811 * then user space has space for.
812 */
813 ret = interrupted ? -EINTR : ep->status;
814 if (io_data->read && ret > 0) {
815 ret = copy_to_iter(data, ret, &io_data->data);
816 if (!ret)
817 ret = -EFAULT;
818 }
819 goto error_mutex;
820 } else if (!(req = usb_ep_alloc_request(ep->ep, GFP_KERNEL))) {
821 ret = -ENOMEM;
822 } else {
823 req->buf = data;
824 req->length = data_len;
827 825
828 ret = usb_ep_queue(ep->ep, req, GFP_ATOMIC); 826 io_data->buf = data;
827 io_data->ep = ep->ep;
828 io_data->req = req;
829 io_data->ffs = epfile->ffs;
829 830
830 spin_unlock_irq(&epfile->ffs->eps_lock); 831 req->context = io_data;
832 req->complete = ffs_epfile_async_io_complete;
831 833
832 if (unlikely(ret < 0)) { 834 ret = usb_ep_queue(ep->ep, req, GFP_ATOMIC);
833 /* nop */ 835 if (unlikely(ret)) {
834 } else if (unlikely( 836 usb_ep_free_request(ep->ep, req);
835 wait_for_completion_interruptible(&done))) { 837 goto error_lock;
836 ret = -EINTR;
837 usb_ep_dequeue(ep->ep, req);
838 } else {
839 /*
840 * XXX We may end up silently droping data
841 * here. Since data_len (i.e. req->length) may
842 * be bigger than len (after being rounded up
843 * to maxpacketsize), we may end up with more
844 * data then user space has space for.
845 */
846 ret = ep->status;
847 if (io_data->read && ret > 0) {
848 ret = copy_to_iter(data, ret, &io_data->data);
849 if (!ret)
850 ret = -EFAULT;
851 }
852 }
853 kfree(data);
854 } 838 }
855 }
856 839
857 mutex_unlock(&epfile->mutex); 840 ret = -EIOCBQUEUED;
858 return ret; 841 /*
842 * Do not kfree the buffer in this function. It will be freed
843 * by ffs_user_copy_worker.
844 */
845 data = NULL;
846 }
859 847
860error_lock: 848error_lock:
861 spin_unlock_irq(&epfile->ffs->eps_lock); 849 spin_unlock_irq(&epfile->ffs->eps_lock);
850error_mutex:
862 mutex_unlock(&epfile->mutex); 851 mutex_unlock(&epfile->mutex);
863error: 852error:
864 kfree(data); 853 kfree(data);
diff --git a/drivers/usb/gadget/function/f_hid.c b/drivers/usb/gadget/function/f_hid.c
index 99285b416308..51980c50546d 100644
--- a/drivers/usb/gadget/function/f_hid.c
+++ b/drivers/usb/gadget/function/f_hid.c
@@ -646,7 +646,7 @@ static int hidg_bind(struct usb_configuration *c, struct usb_function *f)
646 hidg_fs_out_ep_desc.bEndpointAddress; 646 hidg_fs_out_ep_desc.bEndpointAddress;
647 647
648 status = usb_assign_descriptors(f, hidg_fs_descriptors, 648 status = usb_assign_descriptors(f, hidg_fs_descriptors,
649 hidg_hs_descriptors, NULL); 649 hidg_hs_descriptors, NULL, NULL);
650 if (status) 650 if (status)
651 goto fail; 651 goto fail;
652 652
diff --git a/drivers/usb/gadget/function/f_loopback.c b/drivers/usb/gadget/function/f_loopback.c
index ddc3aad886b7..3a9f8f9c77bd 100644
--- a/drivers/usb/gadget/function/f_loopback.c
+++ b/drivers/usb/gadget/function/f_loopback.c
@@ -211,7 +211,7 @@ autoconf_fail:
211 ss_loop_sink_desc.bEndpointAddress = fs_loop_sink_desc.bEndpointAddress; 211 ss_loop_sink_desc.bEndpointAddress = fs_loop_sink_desc.bEndpointAddress;
212 212
213 ret = usb_assign_descriptors(f, fs_loopback_descs, hs_loopback_descs, 213 ret = usb_assign_descriptors(f, fs_loopback_descs, hs_loopback_descs,
214 ss_loopback_descs); 214 ss_loopback_descs, NULL);
215 if (ret) 215 if (ret)
216 return ret; 216 return ret;
217 217
diff --git a/drivers/usb/gadget/function/f_mass_storage.c b/drivers/usb/gadget/function/f_mass_storage.c
index 223ccf89d226..ee9390b07c17 100644
--- a/drivers/usb/gadget/function/f_mass_storage.c
+++ b/drivers/usb/gadget/function/f_mass_storage.c
@@ -3093,7 +3093,7 @@ static int fsg_bind(struct usb_configuration *c, struct usb_function *f)
3093 fsg_ss_bulk_out_comp_desc.bMaxBurst = max_burst; 3093 fsg_ss_bulk_out_comp_desc.bMaxBurst = max_burst;
3094 3094
3095 ret = usb_assign_descriptors(f, fsg_fs_function, fsg_hs_function, 3095 ret = usb_assign_descriptors(f, fsg_fs_function, fsg_hs_function,
3096 fsg_ss_function); 3096 fsg_ss_function, fsg_ss_function);
3097 if (ret) 3097 if (ret)
3098 goto autoconf_fail; 3098 goto autoconf_fail;
3099 3099
diff --git a/drivers/usb/gadget/function/f_midi.c b/drivers/usb/gadget/function/f_midi.c
index fb1fe96d3215..84c0ee5ebd1e 100644
--- a/drivers/usb/gadget/function/f_midi.c
+++ b/drivers/usb/gadget/function/f_midi.c
@@ -56,7 +56,7 @@ static const char f_midi_longname[] = "MIDI Gadget";
56 * USB <- IN endpoint <- rawmidi 56 * USB <- IN endpoint <- rawmidi
57 */ 57 */
58struct gmidi_in_port { 58struct gmidi_in_port {
59 struct f_midi *midi; 59 struct snd_rawmidi_substream *substream;
60 int active; 60 int active;
61 uint8_t cable; 61 uint8_t cable;
62 uint8_t state; 62 uint8_t state;
@@ -78,9 +78,7 @@ struct f_midi {
78 struct snd_rawmidi *rmidi; 78 struct snd_rawmidi *rmidi;
79 u8 ms_id; 79 u8 ms_id;
80 80
81 struct snd_rawmidi_substream *in_substream[MAX_PORTS];
82 struct snd_rawmidi_substream *out_substream[MAX_PORTS]; 81 struct snd_rawmidi_substream *out_substream[MAX_PORTS];
83 struct gmidi_in_port *in_port[MAX_PORTS];
84 82
85 unsigned long out_triggered; 83 unsigned long out_triggered;
86 struct tasklet_struct tasklet; 84 struct tasklet_struct tasklet;
@@ -92,6 +90,8 @@ struct f_midi {
92 /* This fifo is used as a buffer ring for pre-allocated IN usb_requests */ 90 /* This fifo is used as a buffer ring for pre-allocated IN usb_requests */
93 DECLARE_KFIFO_PTR(in_req_fifo, struct usb_request *); 91 DECLARE_KFIFO_PTR(in_req_fifo, struct usb_request *);
94 unsigned int in_last_port; 92 unsigned int in_last_port;
93
94 struct gmidi_in_port in_ports_array[/* in_ports */];
95}; 95};
96 96
97static inline struct f_midi *func_to_midi(struct usb_function *f) 97static inline struct f_midi *func_to_midi(struct usb_function *f)
@@ -518,98 +518,95 @@ static void f_midi_drop_out_substreams(struct f_midi *midi)
518{ 518{
519 unsigned int i; 519 unsigned int i;
520 520
521 for (i = 0; i < MAX_PORTS; i++) { 521 for (i = 0; i < midi->in_ports; i++) {
522 struct gmidi_in_port *port = midi->in_port[i]; 522 struct gmidi_in_port *port = midi->in_ports_array + i;
523 struct snd_rawmidi_substream *substream = midi->in_substream[i]; 523 struct snd_rawmidi_substream *substream = port->substream;
524 524 if (port->active && substream)
525 if (!port) 525 snd_rawmidi_drop_output(substream);
526 break;
527
528 if (!port->active || !substream)
529 continue;
530
531 snd_rawmidi_drop_output(substream);
532 } 526 }
533} 527}
534 528
535static void f_midi_transmit(struct f_midi *midi) 529static int f_midi_do_transmit(struct f_midi *midi, struct usb_ep *ep)
536{ 530{
537 struct usb_ep *ep = midi->in_ep; 531 struct usb_request *req = NULL;
538 bool active; 532 unsigned int len, i;
539 533 bool active = false;
540 /* We only care about USB requests if IN endpoint is enabled */ 534 int err;
541 if (!ep || !ep->enabled)
542 goto drop_out;
543 535
544 do { 536 /*
545 struct usb_request *req = NULL; 537 * We peek the request in order to reuse it if it fails to enqueue on
546 unsigned int len, i; 538 * its endpoint
539 */
540 len = kfifo_peek(&midi->in_req_fifo, &req);
541 if (len != 1) {
542 ERROR(midi, "%s: Couldn't get usb request\n", __func__);
543 return -1;
544 }
547 545
548 active = false; 546 /*
547 * If buffer overrun, then we ignore this transmission.
548 * IMPORTANT: This will cause the user-space rawmidi device to block
549 * until a) usb requests have been completed or b) snd_rawmidi_write()
550 * times out.
551 */
552 if (req->length > 0)
553 return 0;
549 554
550 /* We peek the request in order to reuse it if it fails 555 for (i = midi->in_last_port; i < midi->in_ports; ++i) {
551 * to enqueue on its endpoint */ 556 struct gmidi_in_port *port = midi->in_ports_array + i;
552 len = kfifo_peek(&midi->in_req_fifo, &req); 557 struct snd_rawmidi_substream *substream = port->substream;
553 if (len != 1) {
554 ERROR(midi, "%s: Couldn't get usb request\n", __func__);
555 goto drop_out;
556 }
557 558
558 /* If buffer overrun, then we ignore this transmission. 559 if (!port->active || !substream)
559 * IMPORTANT: This will cause the user-space rawmidi device to block until a) usb 560 continue;
560 * requests have been completed or b) snd_rawmidi_write() times out. */
561 if (req->length > 0)
562 return;
563 561
564 for (i = midi->in_last_port; i < MAX_PORTS; i++) { 562 while (req->length + 3 < midi->buflen) {
565 struct gmidi_in_port *port = midi->in_port[i]; 563 uint8_t b;
566 struct snd_rawmidi_substream *substream = midi->in_substream[i];
567 564
568 if (!port) { 565 if (snd_rawmidi_transmit(substream, &b, 1) != 1) {
569 /* Reset counter when we reach the last available port */ 566 port->active = 0;
570 midi->in_last_port = 0;
571 break; 567 break;
572 } 568 }
569 f_midi_transmit_byte(req, port, b);
570 }
573 571
574 if (!port->active || !substream) 572 active = !!port->active;
575 continue; 573 if (active)
574 break;
575 }
576 midi->in_last_port = active ? i : 0;
576 577
577 while (req->length + 3 < midi->buflen) { 578 if (req->length <= 0)
578 uint8_t b; 579 goto done;
579 580
580 if (snd_rawmidi_transmit(substream, &b, 1) != 1) { 581 err = usb_ep_queue(ep, req, GFP_ATOMIC);
581 port->active = 0; 582 if (err < 0) {
582 break; 583 ERROR(midi, "%s failed to queue req: %d\n",
583 } 584 midi->in_ep->name, err);
584 f_midi_transmit_byte(req, port, b); 585 req->length = 0; /* Re-use request next time. */
585 } 586 } else {
587 /* Upon success, put request at the back of the queue. */
588 kfifo_skip(&midi->in_req_fifo);
589 kfifo_put(&midi->in_req_fifo, req);
590 }
586 591
587 active = !!port->active; 592done:
588 /* Check if last port is still active, which means that 593 return active;
589 * there is still data on that substream but this current 594}
590 * request run out of space. */
591 if (active) {
592 midi->in_last_port = i;
593 /* There is no need to re-iterate though midi ports. */
594 break;
595 }
596 }
597 595
598 if (req->length > 0) { 596static void f_midi_transmit(struct f_midi *midi)
599 int err; 597{
598 struct usb_ep *ep = midi->in_ep;
599 int ret;
600 600
601 err = usb_ep_queue(ep, req, GFP_ATOMIC); 601 /* We only care about USB requests if IN endpoint is enabled */
602 if (err < 0) { 602 if (!ep || !ep->enabled)
603 ERROR(midi, "%s failed to queue req: %d\n", 603 goto drop_out;
604 midi->in_ep->name, err); 604
605 req->length = 0; /* Re-use request next time. */ 605 do {
606 } else { 606 ret = f_midi_do_transmit(midi, ep);
607 /* Upon success, put request at the back of the queue. */ 607 if (ret < 0)
608 kfifo_skip(&midi->in_req_fifo); 608 goto drop_out;
609 kfifo_put(&midi->in_req_fifo, req); 609 } while (ret);
610 }
611 }
612 } while (active);
613 610
614 return; 611 return;
615 612
@@ -626,13 +623,15 @@ static void f_midi_in_tasklet(unsigned long data)
626static int f_midi_in_open(struct snd_rawmidi_substream *substream) 623static int f_midi_in_open(struct snd_rawmidi_substream *substream)
627{ 624{
628 struct f_midi *midi = substream->rmidi->private_data; 625 struct f_midi *midi = substream->rmidi->private_data;
626 struct gmidi_in_port *port;
629 627
630 if (!midi->in_port[substream->number]) 628 if (substream->number >= midi->in_ports)
631 return -EINVAL; 629 return -EINVAL;
632 630
633 VDBG(midi, "%s()\n", __func__); 631 VDBG(midi, "%s()\n", __func__);
634 midi->in_substream[substream->number] = substream; 632 port = midi->in_ports_array + substream->number;
635 midi->in_port[substream->number]->state = STATE_UNKNOWN; 633 port->substream = substream;
634 port->state = STATE_UNKNOWN;
636 return 0; 635 return 0;
637} 636}
638 637
@@ -648,11 +647,11 @@ static void f_midi_in_trigger(struct snd_rawmidi_substream *substream, int up)
648{ 647{
649 struct f_midi *midi = substream->rmidi->private_data; 648 struct f_midi *midi = substream->rmidi->private_data;
650 649
651 if (!midi->in_port[substream->number]) 650 if (substream->number >= midi->in_ports)
652 return; 651 return;
653 652
654 VDBG(midi, "%s() %d\n", __func__, up); 653 VDBG(midi, "%s() %d\n", __func__, up);
655 midi->in_port[substream->number]->active = up; 654 midi->in_ports_array[substream->number].active = up;
656 if (up) 655 if (up)
657 tasklet_hi_schedule(&midi->tasklet); 656 tasklet_hi_schedule(&midi->tasklet);
658} 657}
@@ -1128,14 +1127,11 @@ static void f_midi_free(struct usb_function *f)
1128{ 1127{
1129 struct f_midi *midi; 1128 struct f_midi *midi;
1130 struct f_midi_opts *opts; 1129 struct f_midi_opts *opts;
1131 int i;
1132 1130
1133 midi = func_to_midi(f); 1131 midi = func_to_midi(f);
1134 opts = container_of(f->fi, struct f_midi_opts, func_inst); 1132 opts = container_of(f->fi, struct f_midi_opts, func_inst);
1135 kfree(midi->id); 1133 kfree(midi->id);
1136 mutex_lock(&opts->lock); 1134 mutex_lock(&opts->lock);
1137 for (i = opts->in_ports - 1; i >= 0; --i)
1138 kfree(midi->in_port[i]);
1139 kfifo_free(&midi->in_req_fifo); 1135 kfifo_free(&midi->in_req_fifo);
1140 kfree(midi); 1136 kfree(midi);
1141 --opts->refcnt; 1137 --opts->refcnt;
@@ -1163,7 +1159,7 @@ static void f_midi_unbind(struct usb_configuration *c, struct usb_function *f)
1163 1159
1164static struct usb_function *f_midi_alloc(struct usb_function_instance *fi) 1160static struct usb_function *f_midi_alloc(struct usb_function_instance *fi)
1165{ 1161{
1166 struct f_midi *midi; 1162 struct f_midi *midi = NULL;
1167 struct f_midi_opts *opts; 1163 struct f_midi_opts *opts;
1168 int status, i; 1164 int status, i;
1169 1165
@@ -1172,37 +1168,26 @@ static struct usb_function *f_midi_alloc(struct usb_function_instance *fi)
1172 mutex_lock(&opts->lock); 1168 mutex_lock(&opts->lock);
1173 /* sanity check */ 1169 /* sanity check */
1174 if (opts->in_ports > MAX_PORTS || opts->out_ports > MAX_PORTS) { 1170 if (opts->in_ports > MAX_PORTS || opts->out_ports > MAX_PORTS) {
1175 mutex_unlock(&opts->lock); 1171 status = -EINVAL;
1176 return ERR_PTR(-EINVAL); 1172 goto setup_fail;
1177 } 1173 }
1178 1174
1179 /* allocate and initialize one new instance */ 1175 /* allocate and initialize one new instance */
1180 midi = kzalloc(sizeof(*midi), GFP_KERNEL); 1176 midi = kzalloc(
1177 sizeof(*midi) + opts->in_ports * sizeof(*midi->in_ports_array),
1178 GFP_KERNEL);
1181 if (!midi) { 1179 if (!midi) {
1182 mutex_unlock(&opts->lock); 1180 status = -ENOMEM;
1183 return ERR_PTR(-ENOMEM); 1181 goto setup_fail;
1184 } 1182 }
1185 1183
1186 for (i = 0; i < opts->in_ports; i++) { 1184 for (i = 0; i < opts->in_ports; i++)
1187 struct gmidi_in_port *port = kzalloc(sizeof(*port), GFP_KERNEL); 1185 midi->in_ports_array[i].cable = i;
1188
1189 if (!port) {
1190 status = -ENOMEM;
1191 mutex_unlock(&opts->lock);
1192 goto setup_fail;
1193 }
1194
1195 port->midi = midi;
1196 port->active = 0;
1197 port->cable = i;
1198 midi->in_port[i] = port;
1199 }
1200 1186
1201 /* set up ALSA midi devices */ 1187 /* set up ALSA midi devices */
1202 midi->id = kstrdup(opts->id, GFP_KERNEL); 1188 midi->id = kstrdup(opts->id, GFP_KERNEL);
1203 if (opts->id && !midi->id) { 1189 if (opts->id && !midi->id) {
1204 status = -ENOMEM; 1190 status = -ENOMEM;
1205 mutex_unlock(&opts->lock);
1206 goto setup_fail; 1191 goto setup_fail;
1207 } 1192 }
1208 midi->in_ports = opts->in_ports; 1193 midi->in_ports = opts->in_ports;
@@ -1229,8 +1214,7 @@ static struct usb_function *f_midi_alloc(struct usb_function_instance *fi)
1229 return &midi->func; 1214 return &midi->func;
1230 1215
1231setup_fail: 1216setup_fail:
1232 for (--i; i >= 0; i--) 1217 mutex_unlock(&opts->lock);
1233 kfree(midi->in_port[i]);
1234 kfree(midi); 1218 kfree(midi);
1235 return ERR_PTR(status); 1219 return ERR_PTR(status);
1236} 1220}
diff --git a/drivers/usb/gadget/function/f_ncm.c b/drivers/usb/gadget/function/f_ncm.c
index 7ad798ace1e5..97f0a9bc84df 100644
--- a/drivers/usb/gadget/function/f_ncm.c
+++ b/drivers/usb/gadget/function/f_ncm.c
@@ -1432,7 +1432,7 @@ static int ncm_bind(struct usb_configuration *c, struct usb_function *f)
1432 fs_ncm_notify_desc.bEndpointAddress; 1432 fs_ncm_notify_desc.bEndpointAddress;
1433 1433
1434 status = usb_assign_descriptors(f, ncm_fs_function, ncm_hs_function, 1434 status = usb_assign_descriptors(f, ncm_fs_function, ncm_hs_function,
1435 NULL); 1435 NULL, NULL);
1436 if (status) 1436 if (status)
1437 goto fail; 1437 goto fail;
1438 1438
diff --git a/drivers/usb/gadget/function/f_obex.c b/drivers/usb/gadget/function/f_obex.c
index d6396e0909ee..d43e86cea74f 100644
--- a/drivers/usb/gadget/function/f_obex.c
+++ b/drivers/usb/gadget/function/f_obex.c
@@ -364,7 +364,8 @@ static int obex_bind(struct usb_configuration *c, struct usb_function *f)
364 obex_hs_ep_out_desc.bEndpointAddress = 364 obex_hs_ep_out_desc.bEndpointAddress =
365 obex_fs_ep_out_desc.bEndpointAddress; 365 obex_fs_ep_out_desc.bEndpointAddress;
366 366
367 status = usb_assign_descriptors(f, fs_function, hs_function, NULL); 367 status = usb_assign_descriptors(f, fs_function, hs_function, NULL,
368 NULL);
368 if (status) 369 if (status)
369 goto fail; 370 goto fail;
370 371
diff --git a/drivers/usb/gadget/function/f_phonet.c b/drivers/usb/gadget/function/f_phonet.c
index 157441dbfeba..0473d619d5bf 100644
--- a/drivers/usb/gadget/function/f_phonet.c
+++ b/drivers/usb/gadget/function/f_phonet.c
@@ -541,7 +541,7 @@ static int pn_bind(struct usb_configuration *c, struct usb_function *f)
541 541
542 /* Do not try to bind Phonet twice... */ 542 /* Do not try to bind Phonet twice... */
543 status = usb_assign_descriptors(f, fs_pn_function, hs_pn_function, 543 status = usb_assign_descriptors(f, fs_pn_function, hs_pn_function,
544 NULL); 544 NULL, NULL);
545 if (status) 545 if (status)
546 goto err; 546 goto err;
547 547
diff --git a/drivers/usb/gadget/function/f_printer.c b/drivers/usb/gadget/function/f_printer.c
index 26ccad5d8680..c45104e3a64b 100644
--- a/drivers/usb/gadget/function/f_printer.c
+++ b/drivers/usb/gadget/function/f_printer.c
@@ -1051,7 +1051,7 @@ autoconf_fail:
1051 ss_ep_out_desc.bEndpointAddress = fs_ep_out_desc.bEndpointAddress; 1051 ss_ep_out_desc.bEndpointAddress = fs_ep_out_desc.bEndpointAddress;
1052 1052
1053 ret = usb_assign_descriptors(f, fs_printer_function, 1053 ret = usb_assign_descriptors(f, fs_printer_function,
1054 hs_printer_function, ss_printer_function); 1054 hs_printer_function, ss_printer_function, NULL);
1055 if (ret) 1055 if (ret)
1056 return ret; 1056 return ret;
1057 1057
diff --git a/drivers/usb/gadget/function/f_rndis.c b/drivers/usb/gadget/function/f_rndis.c
index e587767e374c..d99dd9542048 100644
--- a/drivers/usb/gadget/function/f_rndis.c
+++ b/drivers/usb/gadget/function/f_rndis.c
@@ -783,7 +783,7 @@ rndis_bind(struct usb_configuration *c, struct usb_function *f)
783 ss_notify_desc.bEndpointAddress = fs_notify_desc.bEndpointAddress; 783 ss_notify_desc.bEndpointAddress = fs_notify_desc.bEndpointAddress;
784 784
785 status = usb_assign_descriptors(f, eth_fs_function, eth_hs_function, 785 status = usb_assign_descriptors(f, eth_fs_function, eth_hs_function,
786 eth_ss_function); 786 eth_ss_function, NULL);
787 if (status) 787 if (status)
788 goto fail; 788 goto fail;
789 789
diff --git a/drivers/usb/gadget/function/f_serial.c b/drivers/usb/gadget/function/f_serial.c
index 6bb44d613bab..cb00ada21d9c 100644
--- a/drivers/usb/gadget/function/f_serial.c
+++ b/drivers/usb/gadget/function/f_serial.c
@@ -236,7 +236,7 @@ static int gser_bind(struct usb_configuration *c, struct usb_function *f)
236 gser_ss_out_desc.bEndpointAddress = gser_fs_out_desc.bEndpointAddress; 236 gser_ss_out_desc.bEndpointAddress = gser_fs_out_desc.bEndpointAddress;
237 237
238 status = usb_assign_descriptors(f, gser_fs_function, gser_hs_function, 238 status = usb_assign_descriptors(f, gser_fs_function, gser_hs_function,
239 gser_ss_function); 239 gser_ss_function, NULL);
240 if (status) 240 if (status)
241 goto fail; 241 goto fail;
242 dev_dbg(&cdev->gadget->dev, "generic ttyGS%d: %s speed IN/%s OUT/%s\n", 242 dev_dbg(&cdev->gadget->dev, "generic ttyGS%d: %s speed IN/%s OUT/%s\n",
diff --git a/drivers/usb/gadget/function/f_sourcesink.c b/drivers/usb/gadget/function/f_sourcesink.c
index 242ba5caffe5..df0189ddfdd5 100644
--- a/drivers/usb/gadget/function/f_sourcesink.c
+++ b/drivers/usb/gadget/function/f_sourcesink.c
@@ -437,7 +437,7 @@ no_iso:
437 ss_iso_sink_desc.bEndpointAddress = fs_iso_sink_desc.bEndpointAddress; 437 ss_iso_sink_desc.bEndpointAddress = fs_iso_sink_desc.bEndpointAddress;
438 438
439 ret = usb_assign_descriptors(f, fs_source_sink_descs, 439 ret = usb_assign_descriptors(f, fs_source_sink_descs,
440 hs_source_sink_descs, ss_source_sink_descs); 440 hs_source_sink_descs, ss_source_sink_descs, NULL);
441 if (ret) 441 if (ret)
442 return ret; 442 return ret;
443 443
diff --git a/drivers/usb/gadget/function/f_subset.c b/drivers/usb/gadget/function/f_subset.c
index 829c78de9eba..434b983f3b4c 100644
--- a/drivers/usb/gadget/function/f_subset.c
+++ b/drivers/usb/gadget/function/f_subset.c
@@ -362,7 +362,7 @@ geth_bind(struct usb_configuration *c, struct usb_function *f)
362 fs_subset_out_desc.bEndpointAddress; 362 fs_subset_out_desc.bEndpointAddress;
363 363
364 status = usb_assign_descriptors(f, fs_eth_function, hs_eth_function, 364 status = usb_assign_descriptors(f, fs_eth_function, hs_eth_function,
365 ss_eth_function); 365 ss_eth_function, NULL);
366 if (status) 366 if (status)
367 goto fail; 367 goto fail;
368 368
diff --git a/drivers/usb/gadget/function/f_tcm.c b/drivers/usb/gadget/function/f_tcm.c
index bad007b5a190..dfb733047a4c 100644
--- a/drivers/usb/gadget/function/f_tcm.c
+++ b/drivers/usb/gadget/function/f_tcm.c
@@ -2098,7 +2098,7 @@ static int tcm_bind(struct usb_configuration *c, struct usb_function *f)
2098 uasp_fs_cmd_desc.bEndpointAddress = uasp_ss_cmd_desc.bEndpointAddress; 2098 uasp_fs_cmd_desc.bEndpointAddress = uasp_ss_cmd_desc.bEndpointAddress;
2099 2099
2100 ret = usb_assign_descriptors(f, uasp_fs_function_desc, 2100 ret = usb_assign_descriptors(f, uasp_fs_function_desc,
2101 uasp_hs_function_desc, uasp_ss_function_desc); 2101 uasp_hs_function_desc, uasp_ss_function_desc, NULL);
2102 if (ret) 2102 if (ret)
2103 goto ep_fail; 2103 goto ep_fail;
2104 2104
diff --git a/drivers/usb/gadget/function/f_uac1.c b/drivers/usb/gadget/function/f_uac1.c
index 6a2346b99f55..f2ac0cbc29a4 100644
--- a/drivers/usb/gadget/function/f_uac1.c
+++ b/drivers/usb/gadget/function/f_uac1.c
@@ -721,7 +721,8 @@ f_audio_bind(struct usb_configuration *c, struct usb_function *f)
721 status = -ENOMEM; 721 status = -ENOMEM;
722 722
723 /* copy descriptors, and track endpoint copies */ 723 /* copy descriptors, and track endpoint copies */
724 status = usb_assign_descriptors(f, f_audio_desc, f_audio_desc, NULL); 724 status = usb_assign_descriptors(f, f_audio_desc, f_audio_desc, NULL,
725 NULL);
725 if (status) 726 if (status)
726 goto fail; 727 goto fail;
727 return 0; 728 return 0;
diff --git a/drivers/usb/gadget/function/f_uac2.c b/drivers/usb/gadget/function/f_uac2.c
index 044ca79d3cb5..186d4b162524 100644
--- a/drivers/usb/gadget/function/f_uac2.c
+++ b/drivers/usb/gadget/function/f_uac2.c
@@ -1100,7 +1100,8 @@ afunc_bind(struct usb_configuration *cfg, struct usb_function *fn)
1100 hs_epout_desc.bEndpointAddress = fs_epout_desc.bEndpointAddress; 1100 hs_epout_desc.bEndpointAddress = fs_epout_desc.bEndpointAddress;
1101 hs_epin_desc.bEndpointAddress = fs_epin_desc.bEndpointAddress; 1101 hs_epin_desc.bEndpointAddress = fs_epin_desc.bEndpointAddress;
1102 1102
1103 ret = usb_assign_descriptors(fn, fs_audio_desc, hs_audio_desc, NULL); 1103 ret = usb_assign_descriptors(fn, fs_audio_desc, hs_audio_desc, NULL,
1104 NULL);
1104 if (ret) 1105 if (ret)
1105 goto err; 1106 goto err;
1106 1107
diff --git a/drivers/usb/gadget/function/rndis.c b/drivers/usb/gadget/function/rndis.c
index 70d3917cc003..943c21aafd3b 100644
--- a/drivers/usb/gadget/function/rndis.c
+++ b/drivers/usb/gadget/function/rndis.c
@@ -914,7 +914,7 @@ struct rndis_params *rndis_register(void (*resp_avail)(void *v), void *v)
914 params->media_state = RNDIS_MEDIA_STATE_DISCONNECTED; 914 params->media_state = RNDIS_MEDIA_STATE_DISCONNECTED;
915 params->resp_avail = resp_avail; 915 params->resp_avail = resp_avail;
916 params->v = v; 916 params->v = v;
917 INIT_LIST_HEAD(&(params->resp_queue)); 917 INIT_LIST_HEAD(&params->resp_queue);
918 pr_debug("%s: configNr = %d\n", __func__, i); 918 pr_debug("%s: configNr = %d\n", __func__, i);
919 919
920 return params; 920 return params;
@@ -1006,13 +1006,10 @@ EXPORT_SYMBOL_GPL(rndis_add_hdr);
1006 1006
1007void rndis_free_response(struct rndis_params *params, u8 *buf) 1007void rndis_free_response(struct rndis_params *params, u8 *buf)
1008{ 1008{
1009 rndis_resp_t *r; 1009 rndis_resp_t *r, *n;
1010 struct list_head *act, *tmp;
1011 1010
1012 list_for_each_safe(act, tmp, &(params->resp_queue)) 1011 list_for_each_entry_safe(r, n, &params->resp_queue, list) {
1013 { 1012 if (r->buf == buf) {
1014 r = list_entry(act, rndis_resp_t, list);
1015 if (r && r->buf == buf) {
1016 list_del(&r->list); 1013 list_del(&r->list);
1017 kfree(r); 1014 kfree(r);
1018 } 1015 }
@@ -1022,14 +1019,11 @@ EXPORT_SYMBOL_GPL(rndis_free_response);
1022 1019
1023u8 *rndis_get_next_response(struct rndis_params *params, u32 *length) 1020u8 *rndis_get_next_response(struct rndis_params *params, u32 *length)
1024{ 1021{
1025 rndis_resp_t *r; 1022 rndis_resp_t *r, *n;
1026 struct list_head *act, *tmp;
1027 1023
1028 if (!length) return NULL; 1024 if (!length) return NULL;
1029 1025
1030 list_for_each_safe(act, tmp, &(params->resp_queue)) 1026 list_for_each_entry_safe(r, n, &params->resp_queue, list) {
1031 {
1032 r = list_entry(act, rndis_resp_t, list);
1033 if (!r->send) { 1027 if (!r->send) {
1034 r->send = 1; 1028 r->send = 1;
1035 *length = r->length; 1029 *length = r->length;
@@ -1053,7 +1047,7 @@ static rndis_resp_t *rndis_add_response(struct rndis_params *params, u32 length)
1053 r->length = length; 1047 r->length = length;
1054 r->send = 0; 1048 r->send = 0;
1055 1049
1056 list_add_tail(&r->list, &(params->resp_queue)); 1050 list_add_tail(&r->list, &params->resp_queue);
1057 return r; 1051 return r;
1058} 1052}
1059 1053
diff --git a/drivers/usb/gadget/legacy/inode.c b/drivers/usb/gadget/legacy/inode.c
index 87fb0fd6aaab..5cdaf0150a4e 100644
--- a/drivers/usb/gadget/legacy/inode.c
+++ b/drivers/usb/gadget/legacy/inode.c
@@ -1699,28 +1699,6 @@ static struct usb_gadget_driver gadgetfs_driver = {
1699}; 1699};
1700 1700
1701/*----------------------------------------------------------------------*/ 1701/*----------------------------------------------------------------------*/
1702
1703static void gadgetfs_nop(struct usb_gadget *arg) { }
1704
1705static int gadgetfs_probe(struct usb_gadget *gadget,
1706 struct usb_gadget_driver *driver)
1707{
1708 CHIP = gadget->name;
1709 return -EISNAM;
1710}
1711
1712static struct usb_gadget_driver probe_driver = {
1713 .max_speed = USB_SPEED_HIGH,
1714 .bind = gadgetfs_probe,
1715 .unbind = gadgetfs_nop,
1716 .setup = (void *)gadgetfs_nop,
1717 .disconnect = gadgetfs_nop,
1718 .driver = {
1719 .name = "nop",
1720 },
1721};
1722
1723
1724/* DEVICE INITIALIZATION 1702/* DEVICE INITIALIZATION
1725 * 1703 *
1726 * fd = open ("/dev/gadget/$CHIP", O_RDWR) 1704 * fd = open ("/dev/gadget/$CHIP", O_RDWR)
@@ -1971,9 +1949,7 @@ gadgetfs_fill_super (struct super_block *sb, void *opts, int silent)
1971 if (the_device) 1949 if (the_device)
1972 return -ESRCH; 1950 return -ESRCH;
1973 1951
1974 /* fake probe to determine $CHIP */ 1952 CHIP = usb_get_gadget_udc_name();
1975 CHIP = NULL;
1976 usb_gadget_probe_driver(&probe_driver);
1977 if (!CHIP) 1953 if (!CHIP)
1978 return -ENODEV; 1954 return -ENODEV;
1979 1955
@@ -2034,6 +2010,8 @@ gadgetfs_kill_sb (struct super_block *sb)
2034 put_dev (the_device); 2010 put_dev (the_device);
2035 the_device = NULL; 2011 the_device = NULL;
2036 } 2012 }
2013 kfree(CHIP);
2014 CHIP = NULL;
2037} 2015}
2038 2016
2039/*----------------------------------------------------------------------*/ 2017/*----------------------------------------------------------------------*/
diff --git a/drivers/usb/gadget/udc/Kconfig b/drivers/usb/gadget/udc/Kconfig
index 753c29bd11ad..7c289416f87d 100644
--- a/drivers/usb/gadget/udc/Kconfig
+++ b/drivers/usb/gadget/udc/Kconfig
@@ -74,7 +74,6 @@ config USB_BCM63XX_UDC
74config USB_FSL_USB2 74config USB_FSL_USB2
75 tristate "Freescale Highspeed USB DR Peripheral Controller" 75 tristate "Freescale Highspeed USB DR Peripheral Controller"
76 depends on FSL_SOC || ARCH_MXC 76 depends on FSL_SOC || ARCH_MXC
77 select USB_FSL_MPH_DR_OF if OF
78 help 77 help
79 Some of Freescale PowerPC and i.MX processors have a High Speed 78 Some of Freescale PowerPC and i.MX processors have a High Speed
80 Dual-Role(DR) USB controller, which supports device mode. 79 Dual-Role(DR) USB controller, which supports device mode.
@@ -128,6 +127,7 @@ config USB_OMAP
128config USB_PXA25X 127config USB_PXA25X
129 tristate "PXA 25x or IXP 4xx" 128 tristate "PXA 25x or IXP 4xx"
130 depends on (ARCH_PXA && PXA25x) || ARCH_IXP4XX 129 depends on (ARCH_PXA && PXA25x) || ARCH_IXP4XX
130 depends on HAS_IOMEM
131 help 131 help
132 Intel's PXA 25x series XScale ARM-5TE processors include 132 Intel's PXA 25x series XScale ARM-5TE processors include
133 an integrated full speed USB 1.1 device controller. The 133 an integrated full speed USB 1.1 device controller. The
@@ -176,7 +176,7 @@ config USB_RENESAS_USBHS_UDC
176 176
177config USB_RENESAS_USB3 177config USB_RENESAS_USB3
178 tristate 'Renesas USB3.0 Peripheral controller' 178 tristate 'Renesas USB3.0 Peripheral controller'
179 depends on ARCH_SHMOBILE || COMPILE_TEST 179 depends on ARCH_RENESAS || COMPILE_TEST
180 help 180 help
181 Renesas USB3.0 Peripheral controller is a USB peripheral controller 181 Renesas USB3.0 Peripheral controller is a USB peripheral controller
182 that supports super, high, and full speed USB 3.0 data transfers. 182 that supports super, high, and full speed USB 3.0 data transfers.
@@ -187,6 +187,7 @@ config USB_RENESAS_USB3
187 187
188config USB_PXA27X 188config USB_PXA27X
189 tristate "PXA 27x" 189 tristate "PXA 27x"
190 depends on HAS_IOMEM
190 help 191 help
191 Intel's PXA 27x series XScale ARM v5TE processors include 192 Intel's PXA 27x series XScale ARM v5TE processors include
192 an integrated full speed USB 1.1 device controller. 193 an integrated full speed USB 1.1 device controller.
@@ -244,6 +245,7 @@ config USB_MV_U3D
244 245
245config USB_M66592 246config USB_M66592
246 tristate "Renesas M66592 USB Peripheral Controller" 247 tristate "Renesas M66592 USB Peripheral Controller"
248 depends on HAS_IOMEM
247 help 249 help
248 M66592 is a discrete USB peripheral controller chip that 250 M66592 is a discrete USB peripheral controller chip that
249 supports both full and high speed USB 2.0 data transfers. 251 supports both full and high speed USB 2.0 data transfers.
@@ -287,6 +289,7 @@ config USB_FSL_QE
287 dynamically linked module called "fsl_qe_udc". 289 dynamically linked module called "fsl_qe_udc".
288 290
289config USB_NET2272 291config USB_NET2272
292 depends on HAS_IOMEM
290 tristate "PLX NET2272" 293 tristate "PLX NET2272"
291 help 294 help
292 PLX NET2272 is a USB peripheral controller which supports 295 PLX NET2272 is a USB peripheral controller which supports
diff --git a/drivers/usb/gadget/udc/bdc/bdc_udc.c b/drivers/usb/gadget/udc/bdc/bdc_udc.c
index 7f77db5d1278..aae7458d8986 100644
--- a/drivers/usb/gadget/udc/bdc/bdc_udc.c
+++ b/drivers/usb/gadget/udc/bdc/bdc_udc.c
@@ -581,8 +581,13 @@ err0:
581 581
582void bdc_udc_exit(struct bdc *bdc) 582void bdc_udc_exit(struct bdc *bdc)
583{ 583{
584 unsigned long flags;
585
584 dev_dbg(bdc->dev, "%s()\n", __func__); 586 dev_dbg(bdc->dev, "%s()\n", __func__);
587 spin_lock_irqsave(&bdc->lock, flags);
585 bdc_ep_disable(bdc->bdc_ep_array[1]); 588 bdc_ep_disable(bdc->bdc_ep_array[1]);
589 spin_unlock_irqrestore(&bdc->lock, flags);
590
586 usb_del_gadget_udc(&bdc->gadget); 591 usb_del_gadget_udc(&bdc->gadget);
587 bdc_free_ep(bdc); 592 bdc_free_ep(bdc);
588} 593}
diff --git a/drivers/usb/gadget/udc/lpc32xx_udc.c b/drivers/usb/gadget/udc/lpc32xx_udc.c
index 79fe6b77ee44..8f32b5ee7734 100644
--- a/drivers/usb/gadget/udc/lpc32xx_udc.c
+++ b/drivers/usb/gadget/udc/lpc32xx_udc.c
@@ -49,7 +49,6 @@
49#endif 49#endif
50 50
51#include <mach/hardware.h> 51#include <mach/hardware.h>
52#include <mach/platform.h>
53 52
54/* 53/*
55 * USB device configuration structure 54 * USB device configuration structure
@@ -147,9 +146,7 @@ struct lpc32xx_udc {
147 u32 io_p_size; 146 u32 io_p_size;
148 void __iomem *udp_baseaddr; 147 void __iomem *udp_baseaddr;
149 int udp_irq[4]; 148 int udp_irq[4];
150 struct clk *usb_pll_clk;
151 struct clk *usb_slv_clk; 149 struct clk *usb_slv_clk;
152 struct clk *usb_otg_clk;
153 150
154 /* DMA support */ 151 /* DMA support */
155 u32 *udca_v_base; 152 u32 *udca_v_base;
@@ -210,16 +207,6 @@ static inline struct lpc32xx_udc *to_udc(struct usb_gadget *g)
210 207
211#define UDCA_BUFF_SIZE (128) 208#define UDCA_BUFF_SIZE (128)
212 209
213/* TODO: When the clock framework is introduced in LPC32xx, IO_ADDRESS will
214 * be replaced with an inremap()ed pointer
215 * */
216#define USB_CTRL IO_ADDRESS(LPC32XX_CLK_PM_BASE + 0x64)
217
218/* USB_CTRL bit defines */
219#define USB_SLAVE_HCLK_EN (1 << 24)
220#define USB_HOST_NEED_CLK_EN (1 << 21)
221#define USB_DEV_NEED_CLK_EN (1 << 22)
222
223/********************************************************************** 210/**********************************************************************
224 * USB device controller register offsets 211 * USB device controller register offsets
225 **********************************************************************/ 212 **********************************************************************/
@@ -639,9 +626,6 @@ static void isp1301_udc_configure(struct lpc32xx_udc *udc)
639 i2c_smbus_write_byte_data(udc->isp1301_i2c_client, 626 i2c_smbus_write_byte_data(udc->isp1301_i2c_client,
640 ISP1301_I2C_INTERRUPT_RISING, INT_VBUS_VLD); 627 ISP1301_I2C_INTERRUPT_RISING, INT_VBUS_VLD);
641 628
642 /* Enable usb_need_clk clock after transceiver is initialized */
643 writel((readl(USB_CTRL) | USB_DEV_NEED_CLK_EN), USB_CTRL);
644
645 dev_info(udc->dev, "ISP1301 Vendor ID : 0x%04x\n", 629 dev_info(udc->dev, "ISP1301 Vendor ID : 0x%04x\n",
646 i2c_smbus_read_word_data(udc->isp1301_i2c_client, 0x00)); 630 i2c_smbus_read_word_data(udc->isp1301_i2c_client, 0x00));
647 dev_info(udc->dev, "ISP1301 Product ID : 0x%04x\n", 631 dev_info(udc->dev, "ISP1301 Product ID : 0x%04x\n",
@@ -980,31 +964,13 @@ static void udc_clk_set(struct lpc32xx_udc *udc, int enable)
980 return; 964 return;
981 965
982 udc->clocked = 1; 966 udc->clocked = 1;
983 967 clk_prepare_enable(udc->usb_slv_clk);
984 /* 48MHz PLL up */
985 clk_enable(udc->usb_pll_clk);
986
987 /* Enable the USB device clock */
988 writel(readl(USB_CTRL) | USB_DEV_NEED_CLK_EN,
989 USB_CTRL);
990
991 clk_enable(udc->usb_otg_clk);
992 } else { 968 } else {
993 if (!udc->clocked) 969 if (!udc->clocked)
994 return; 970 return;
995 971
996 udc->clocked = 0; 972 udc->clocked = 0;
997 973 clk_disable_unprepare(udc->usb_slv_clk);
998 /* Never disable the USB_HCLK during normal operation */
999
1000 /* 48MHz PLL dpwn */
1001 clk_disable(udc->usb_pll_clk);
1002
1003 /* Disable the USB device clock */
1004 writel(readl(USB_CTRL) & ~USB_DEV_NEED_CLK_EN,
1005 USB_CTRL);
1006
1007 clk_disable(udc->usb_otg_clk);
1008 } 974 }
1009} 975}
1010 976
@@ -3125,58 +3091,21 @@ static int lpc32xx_udc_probe(struct platform_device *pdev)
3125 goto io_map_fail; 3091 goto io_map_fail;
3126 } 3092 }
3127 3093
3128 /* Enable AHB slave USB clock, needed for further USB clock control */ 3094 /* Get USB device clock */
3129 writel(USB_SLAVE_HCLK_EN | (1 << 19), USB_CTRL); 3095 udc->usb_slv_clk = clk_get(&pdev->dev, NULL);
3130
3131 /* Get required clocks */
3132 udc->usb_pll_clk = clk_get(&pdev->dev, "ck_pll5");
3133 if (IS_ERR(udc->usb_pll_clk)) {
3134 dev_err(udc->dev, "failed to acquire USB PLL\n");
3135 retval = PTR_ERR(udc->usb_pll_clk);
3136 goto pll_get_fail;
3137 }
3138 udc->usb_slv_clk = clk_get(&pdev->dev, "ck_usbd");
3139 if (IS_ERR(udc->usb_slv_clk)) { 3096 if (IS_ERR(udc->usb_slv_clk)) {
3140 dev_err(udc->dev, "failed to acquire USB device clock\n"); 3097 dev_err(udc->dev, "failed to acquire USB device clock\n");
3141 retval = PTR_ERR(udc->usb_slv_clk); 3098 retval = PTR_ERR(udc->usb_slv_clk);
3142 goto usb_clk_get_fail; 3099 goto usb_clk_get_fail;
3143 } 3100 }
3144 udc->usb_otg_clk = clk_get(&pdev->dev, "ck_usb_otg");
3145 if (IS_ERR(udc->usb_otg_clk)) {
3146 dev_err(udc->dev, "failed to acquire USB otg clock\n");
3147 retval = PTR_ERR(udc->usb_otg_clk);
3148 goto usb_otg_clk_get_fail;
3149 }
3150
3151 /* Setup PLL clock to 48MHz */
3152 retval = clk_enable(udc->usb_pll_clk);
3153 if (retval < 0) {
3154 dev_err(udc->dev, "failed to start USB PLL\n");
3155 goto pll_enable_fail;
3156 }
3157
3158 retval = clk_set_rate(udc->usb_pll_clk, 48000);
3159 if (retval < 0) {
3160 dev_err(udc->dev, "failed to set USB clock rate\n");
3161 goto pll_set_fail;
3162 }
3163
3164 writel(readl(USB_CTRL) | USB_DEV_NEED_CLK_EN, USB_CTRL);
3165 3101
3166 /* Enable USB device clock */ 3102 /* Enable USB device clock */
3167 retval = clk_enable(udc->usb_slv_clk); 3103 retval = clk_prepare_enable(udc->usb_slv_clk);
3168 if (retval < 0) { 3104 if (retval < 0) {
3169 dev_err(udc->dev, "failed to start USB device clock\n"); 3105 dev_err(udc->dev, "failed to start USB device clock\n");
3170 goto usb_clk_enable_fail; 3106 goto usb_clk_enable_fail;
3171 } 3107 }
3172 3108
3173 /* Enable USB OTG clock */
3174 retval = clk_enable(udc->usb_otg_clk);
3175 if (retval < 0) {
3176 dev_err(udc->dev, "failed to start USB otg clock\n");
3177 goto usb_otg_clk_enable_fail;
3178 }
3179
3180 /* Setup deferred workqueue data */ 3109 /* Setup deferred workqueue data */
3181 udc->poweron = udc->pullup = 0; 3110 udc->poweron = udc->pullup = 0;
3182 INIT_WORK(&udc->pullup_job, pullup_work); 3111 INIT_WORK(&udc->pullup_job, pullup_work);
@@ -3287,19 +3216,10 @@ dma_alloc_fail:
3287 dma_free_coherent(&pdev->dev, UDCA_BUFF_SIZE, 3216 dma_free_coherent(&pdev->dev, UDCA_BUFF_SIZE,
3288 udc->udca_v_base, udc->udca_p_base); 3217 udc->udca_v_base, udc->udca_p_base);
3289i2c_fail: 3218i2c_fail:
3290 clk_disable(udc->usb_otg_clk); 3219 clk_disable_unprepare(udc->usb_slv_clk);
3291usb_otg_clk_enable_fail:
3292 clk_disable(udc->usb_slv_clk);
3293usb_clk_enable_fail: 3220usb_clk_enable_fail:
3294pll_set_fail:
3295 clk_disable(udc->usb_pll_clk);
3296pll_enable_fail:
3297 clk_put(udc->usb_otg_clk);
3298usb_otg_clk_get_fail:
3299 clk_put(udc->usb_slv_clk); 3221 clk_put(udc->usb_slv_clk);
3300usb_clk_get_fail: 3222usb_clk_get_fail:
3301 clk_put(udc->usb_pll_clk);
3302pll_get_fail:
3303 iounmap(udc->udp_baseaddr); 3223 iounmap(udc->udp_baseaddr);
3304io_map_fail: 3224io_map_fail:
3305 release_mem_region(udc->io_p_start, udc->io_p_size); 3225 release_mem_region(udc->io_p_start, udc->io_p_size);
@@ -3336,12 +3256,9 @@ static int lpc32xx_udc_remove(struct platform_device *pdev)
3336 free_irq(udc->udp_irq[IRQ_USB_HP], udc); 3256 free_irq(udc->udp_irq[IRQ_USB_HP], udc);
3337 free_irq(udc->udp_irq[IRQ_USB_LP], udc); 3257 free_irq(udc->udp_irq[IRQ_USB_LP], udc);
3338 3258
3339 clk_disable(udc->usb_otg_clk); 3259 clk_disable_unprepare(udc->usb_slv_clk);
3340 clk_put(udc->usb_otg_clk);
3341 clk_disable(udc->usb_slv_clk);
3342 clk_put(udc->usb_slv_clk); 3260 clk_put(udc->usb_slv_clk);
3343 clk_disable(udc->usb_pll_clk); 3261
3344 clk_put(udc->usb_pll_clk);
3345 iounmap(udc->udp_baseaddr); 3262 iounmap(udc->udp_baseaddr);
3346 release_mem_region(udc->io_p_start, udc->io_p_size); 3263 release_mem_region(udc->io_p_start, udc->io_p_size);
3347 kfree(udc); 3264 kfree(udc);
@@ -3367,7 +3284,7 @@ static int lpc32xx_udc_suspend(struct platform_device *pdev, pm_message_t mesg)
3367 udc->clocked = 1; 3284 udc->clocked = 1;
3368 3285
3369 /* Kill global USB clock */ 3286 /* Kill global USB clock */
3370 clk_disable(udc->usb_slv_clk); 3287 clk_disable_unprepare(udc->usb_slv_clk);
3371 } 3288 }
3372 3289
3373 return 0; 3290 return 0;
@@ -3379,7 +3296,7 @@ static int lpc32xx_udc_resume(struct platform_device *pdev)
3379 3296
3380 if (udc->clocked) { 3297 if (udc->clocked) {
3381 /* Enable global USB clock */ 3298 /* Enable global USB clock */
3382 clk_enable(udc->usb_slv_clk); 3299 clk_prepare_enable(udc->usb_slv_clk);
3383 3300
3384 /* Enable clocking */ 3301 /* Enable clocking */
3385 udc_clk_set(udc, 1); 3302 udc_clk_set(udc, 1);
diff --git a/drivers/usb/gadget/udc/pxa25x_udc.c b/drivers/usb/gadget/udc/pxa25x_udc.c
index b82cb14850b6..a238da906115 100644
--- a/drivers/usb/gadget/udc/pxa25x_udc.c
+++ b/drivers/usb/gadget/udc/pxa25x_udc.c
@@ -48,18 +48,157 @@
48#include <linux/usb/gadget.h> 48#include <linux/usb/gadget.h>
49#include <linux/usb/otg.h> 49#include <linux/usb/otg.h>
50 50
51/*
52 * This driver is PXA25x only. Grab the right register definitions.
53 */
54#ifdef CONFIG_ARCH_PXA
55#include <mach/pxa25x-udc.h>
56#include <mach/hardware.h>
57#endif
58
59#ifdef CONFIG_ARCH_LUBBOCK 51#ifdef CONFIG_ARCH_LUBBOCK
60#include <mach/lubbock.h> 52#include <mach/lubbock.h>
61#endif 53#endif
62 54
55#define UDCCR 0x0000 /* UDC Control Register */
56#define UDC_RES1 0x0004 /* UDC Undocumented - Reserved1 */
57#define UDC_RES2 0x0008 /* UDC Undocumented - Reserved2 */
58#define UDC_RES3 0x000C /* UDC Undocumented - Reserved3 */
59#define UDCCS0 0x0010 /* UDC Endpoint 0 Control/Status Register */
60#define UDCCS1 0x0014 /* UDC Endpoint 1 (IN) Control/Status Register */
61#define UDCCS2 0x0018 /* UDC Endpoint 2 (OUT) Control/Status Register */
62#define UDCCS3 0x001C /* UDC Endpoint 3 (IN) Control/Status Register */
63#define UDCCS4 0x0020 /* UDC Endpoint 4 (OUT) Control/Status Register */
64#define UDCCS5 0x0024 /* UDC Endpoint 5 (Interrupt) Control/Status Register */
65#define UDCCS6 0x0028 /* UDC Endpoint 6 (IN) Control/Status Register */
66#define UDCCS7 0x002C /* UDC Endpoint 7 (OUT) Control/Status Register */
67#define UDCCS8 0x0030 /* UDC Endpoint 8 (IN) Control/Status Register */
68#define UDCCS9 0x0034 /* UDC Endpoint 9 (OUT) Control/Status Register */
69#define UDCCS10 0x0038 /* UDC Endpoint 10 (Interrupt) Control/Status Register */
70#define UDCCS11 0x003C /* UDC Endpoint 11 (IN) Control/Status Register */
71#define UDCCS12 0x0040 /* UDC Endpoint 12 (OUT) Control/Status Register */
72#define UDCCS13 0x0044 /* UDC Endpoint 13 (IN) Control/Status Register */
73#define UDCCS14 0x0048 /* UDC Endpoint 14 (OUT) Control/Status Register */
74#define UDCCS15 0x004C /* UDC Endpoint 15 (Interrupt) Control/Status Register */
75#define UFNRH 0x0060 /* UDC Frame Number Register High */
76#define UFNRL 0x0064 /* UDC Frame Number Register Low */
77#define UBCR2 0x0068 /* UDC Byte Count Reg 2 */
78#define UBCR4 0x006c /* UDC Byte Count Reg 4 */
79#define UBCR7 0x0070 /* UDC Byte Count Reg 7 */
80#define UBCR9 0x0074 /* UDC Byte Count Reg 9 */
81#define UBCR12 0x0078 /* UDC Byte Count Reg 12 */
82#define UBCR14 0x007c /* UDC Byte Count Reg 14 */
83#define UDDR0 0x0080 /* UDC Endpoint 0 Data Register */
84#define UDDR1 0x0100 /* UDC Endpoint 1 Data Register */
85#define UDDR2 0x0180 /* UDC Endpoint 2 Data Register */
86#define UDDR3 0x0200 /* UDC Endpoint 3 Data Register */
87#define UDDR4 0x0400 /* UDC Endpoint 4 Data Register */
88#define UDDR5 0x00A0 /* UDC Endpoint 5 Data Register */
89#define UDDR6 0x0600 /* UDC Endpoint 6 Data Register */
90#define UDDR7 0x0680 /* UDC Endpoint 7 Data Register */
91#define UDDR8 0x0700 /* UDC Endpoint 8 Data Register */
92#define UDDR9 0x0900 /* UDC Endpoint 9 Data Register */
93#define UDDR10 0x00C0 /* UDC Endpoint 10 Data Register */
94#define UDDR11 0x0B00 /* UDC Endpoint 11 Data Register */
95#define UDDR12 0x0B80 /* UDC Endpoint 12 Data Register */
96#define UDDR13 0x0C00 /* UDC Endpoint 13 Data Register */
97#define UDDR14 0x0E00 /* UDC Endpoint 14 Data Register */
98#define UDDR15 0x00E0 /* UDC Endpoint 15 Data Register */
99
100#define UICR0 0x0050 /* UDC Interrupt Control Register 0 */
101#define UICR1 0x0054 /* UDC Interrupt Control Register 1 */
102
103#define USIR0 0x0058 /* UDC Status Interrupt Register 0 */
104#define USIR1 0x005C /* UDC Status Interrupt Register 1 */
105
106#define UDCCR_UDE (1 << 0) /* UDC enable */
107#define UDCCR_UDA (1 << 1) /* UDC active */
108#define UDCCR_RSM (1 << 2) /* Device resume */
109#define UDCCR_RESIR (1 << 3) /* Resume interrupt request */
110#define UDCCR_SUSIR (1 << 4) /* Suspend interrupt request */
111#define UDCCR_SRM (1 << 5) /* Suspend/resume interrupt mask */
112#define UDCCR_RSTIR (1 << 6) /* Reset interrupt request */
113#define UDCCR_REM (1 << 7) /* Reset interrupt mask */
114
115#define UDCCS0_OPR (1 << 0) /* OUT packet ready */
116#define UDCCS0_IPR (1 << 1) /* IN packet ready */
117#define UDCCS0_FTF (1 << 2) /* Flush Tx FIFO */
118#define UDCCS0_DRWF (1 << 3) /* Device remote wakeup feature */
119#define UDCCS0_SST (1 << 4) /* Sent stall */
120#define UDCCS0_FST (1 << 5) /* Force stall */
121#define UDCCS0_RNE (1 << 6) /* Receive FIFO no empty */
122#define UDCCS0_SA (1 << 7) /* Setup active */
123
124#define UDCCS_BI_TFS (1 << 0) /* Transmit FIFO service */
125#define UDCCS_BI_TPC (1 << 1) /* Transmit packet complete */
126#define UDCCS_BI_FTF (1 << 2) /* Flush Tx FIFO */
127#define UDCCS_BI_TUR (1 << 3) /* Transmit FIFO underrun */
128#define UDCCS_BI_SST (1 << 4) /* Sent stall */
129#define UDCCS_BI_FST (1 << 5) /* Force stall */
130#define UDCCS_BI_TSP (1 << 7) /* Transmit short packet */
131
132#define UDCCS_BO_RFS (1 << 0) /* Receive FIFO service */
133#define UDCCS_BO_RPC (1 << 1) /* Receive packet complete */
134#define UDCCS_BO_DME (1 << 3) /* DMA enable */
135#define UDCCS_BO_SST (1 << 4) /* Sent stall */
136#define UDCCS_BO_FST (1 << 5) /* Force stall */
137#define UDCCS_BO_RNE (1 << 6) /* Receive FIFO not empty */
138#define UDCCS_BO_RSP (1 << 7) /* Receive short packet */
139
140#define UDCCS_II_TFS (1 << 0) /* Transmit FIFO service */
141#define UDCCS_II_TPC (1 << 1) /* Transmit packet complete */
142#define UDCCS_II_FTF (1 << 2) /* Flush Tx FIFO */
143#define UDCCS_II_TUR (1 << 3) /* Transmit FIFO underrun */
144#define UDCCS_II_TSP (1 << 7) /* Transmit short packet */
145
146#define UDCCS_IO_RFS (1 << 0) /* Receive FIFO service */
147#define UDCCS_IO_RPC (1 << 1) /* Receive packet complete */
148#ifdef CONFIG_ARCH_IXP4XX /* FIXME: is this right?, datasheed says '2' */
149#define UDCCS_IO_ROF (1 << 3) /* Receive overflow */
150#endif
151#ifdef CONFIG_ARCH_PXA
152#define UDCCS_IO_ROF (1 << 2) /* Receive overflow */
153#endif
154#define UDCCS_IO_DME (1 << 3) /* DMA enable */
155#define UDCCS_IO_RNE (1 << 6) /* Receive FIFO not empty */
156#define UDCCS_IO_RSP (1 << 7) /* Receive short packet */
157
158#define UDCCS_INT_TFS (1 << 0) /* Transmit FIFO service */
159#define UDCCS_INT_TPC (1 << 1) /* Transmit packet complete */
160#define UDCCS_INT_FTF (1 << 2) /* Flush Tx FIFO */
161#define UDCCS_INT_TUR (1 << 3) /* Transmit FIFO underrun */
162#define UDCCS_INT_SST (1 << 4) /* Sent stall */
163#define UDCCS_INT_FST (1 << 5) /* Force stall */
164#define UDCCS_INT_TSP (1 << 7) /* Transmit short packet */
165
166#define UICR0_IM0 (1 << 0) /* Interrupt mask ep 0 */
167#define UICR0_IM1 (1 << 1) /* Interrupt mask ep 1 */
168#define UICR0_IM2 (1 << 2) /* Interrupt mask ep 2 */
169#define UICR0_IM3 (1 << 3) /* Interrupt mask ep 3 */
170#define UICR0_IM4 (1 << 4) /* Interrupt mask ep 4 */
171#define UICR0_IM5 (1 << 5) /* Interrupt mask ep 5 */
172#define UICR0_IM6 (1 << 6) /* Interrupt mask ep 6 */
173#define UICR0_IM7 (1 << 7) /* Interrupt mask ep 7 */
174
175#define UICR1_IM8 (1 << 0) /* Interrupt mask ep 8 */
176#define UICR1_IM9 (1 << 1) /* Interrupt mask ep 9 */
177#define UICR1_IM10 (1 << 2) /* Interrupt mask ep 10 */
178#define UICR1_IM11 (1 << 3) /* Interrupt mask ep 11 */
179#define UICR1_IM12 (1 << 4) /* Interrupt mask ep 12 */
180#define UICR1_IM13 (1 << 5) /* Interrupt mask ep 13 */
181#define UICR1_IM14 (1 << 6) /* Interrupt mask ep 14 */
182#define UICR1_IM15 (1 << 7) /* Interrupt mask ep 15 */
183
184#define USIR0_IR0 (1 << 0) /* Interrupt request ep 0 */
185#define USIR0_IR1 (1 << 1) /* Interrupt request ep 1 */
186#define USIR0_IR2 (1 << 2) /* Interrupt request ep 2 */
187#define USIR0_IR3 (1 << 3) /* Interrupt request ep 3 */
188#define USIR0_IR4 (1 << 4) /* Interrupt request ep 4 */
189#define USIR0_IR5 (1 << 5) /* Interrupt request ep 5 */
190#define USIR0_IR6 (1 << 6) /* Interrupt request ep 6 */
191#define USIR0_IR7 (1 << 7) /* Interrupt request ep 7 */
192
193#define USIR1_IR8 (1 << 0) /* Interrupt request ep 8 */
194#define USIR1_IR9 (1 << 1) /* Interrupt request ep 9 */
195#define USIR1_IR10 (1 << 2) /* Interrupt request ep 10 */
196#define USIR1_IR11 (1 << 3) /* Interrupt request ep 11 */
197#define USIR1_IR12 (1 << 4) /* Interrupt request ep 12 */
198#define USIR1_IR13 (1 << 5) /* Interrupt request ep 13 */
199#define USIR1_IR14 (1 << 6) /* Interrupt request ep 14 */
200#define USIR1_IR15 (1 << 7) /* Interrupt request ep 15 */
201
63/* 202/*
64 * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x 203 * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
65 * series processors. The UDC for the IXP 4xx series is very similar. 204 * series processors. The UDC for the IXP 4xx series is very similar.
@@ -150,25 +289,61 @@ static void pullup_on(void)
150 mach->udc_command(PXA2XX_UDC_CMD_CONNECT); 289 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
151} 290}
152 291
153static void pio_irq_enable(int bEndpointAddress) 292#if defined(CONFIG_CPU_BIG_ENDIAN)
293/*
294 * IXP4xx has its buses wired up in a way that relies on never doing any
295 * byte swaps, independent of whether it runs in big-endian or little-endian
296 * mode, as explained by Krzysztof Hałasa.
297 *
298 * We only support pxa25x in little-endian mode, but it is very likely
299 * that it works the same way.
300 */
301static inline void udc_set_reg(struct pxa25x_udc *dev, u32 reg, u32 val)
302{
303 iowrite32be(val, dev->regs + reg);
304}
305
306static inline u32 udc_get_reg(struct pxa25x_udc *dev, u32 reg)
154{ 307{
155 bEndpointAddress &= 0xf; 308 return ioread32be(dev->regs + reg);
309}
310#else
311static inline void udc_set_reg(struct pxa25x_udc *dev, u32 reg, u32 val)
312{
313 writel(val, dev->regs + reg);
314}
315
316static inline u32 udc_get_reg(struct pxa25x_udc *dev, u32 reg)
317{
318 return readl(dev->regs + reg);
319}
320#endif
321
322static void pio_irq_enable(struct pxa25x_ep *ep)
323{
324 u32 bEndpointAddress = ep->bEndpointAddress & 0xf;
325
156 if (bEndpointAddress < 8) 326 if (bEndpointAddress < 8)
157 UICR0 &= ~(1 << bEndpointAddress); 327 udc_set_reg(ep->dev, UICR0, udc_get_reg(ep->dev, UICR0) &
328 ~(1 << bEndpointAddress));
158 else { 329 else {
159 bEndpointAddress -= 8; 330 bEndpointAddress -= 8;
160 UICR1 &= ~(1 << bEndpointAddress); 331 udc_set_reg(ep->dev, UICR1, udc_get_reg(ep->dev, UICR1) &
332 ~(1 << bEndpointAddress));
161 } 333 }
162} 334}
163 335
164static void pio_irq_disable(int bEndpointAddress) 336static void pio_irq_disable(struct pxa25x_ep *ep)
165{ 337{
166 bEndpointAddress &= 0xf; 338 u32 bEndpointAddress = ep->bEndpointAddress & 0xf;
339
167 if (bEndpointAddress < 8) 340 if (bEndpointAddress < 8)
168 UICR0 |= 1 << bEndpointAddress; 341 udc_set_reg(ep->dev, UICR0, udc_get_reg(ep->dev, UICR0) |
342 (1 << bEndpointAddress));
169 else { 343 else {
170 bEndpointAddress -= 8; 344 bEndpointAddress -= 8;
171 UICR1 |= 1 << bEndpointAddress; 345 udc_set_reg(ep->dev, UICR1, udc_get_reg(ep->dev, UICR1) |
346 (1 << bEndpointAddress));
172 } 347 }
173} 348}
174 349
@@ -177,22 +352,61 @@ static void pio_irq_disable(int bEndpointAddress)
177 */ 352 */
178#define UDCCR_MASK_BITS (UDCCR_REM | UDCCR_SRM | UDCCR_UDE) 353#define UDCCR_MASK_BITS (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
179 354
180static inline void udc_set_mask_UDCCR(int mask) 355static inline void udc_set_mask_UDCCR(struct pxa25x_udc *dev, int mask)
181{ 356{
182 UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS); 357 u32 udccr = udc_get_reg(dev, UDCCR);
358
359 udc_set_reg(dev, (udccr & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS), UDCCR);
183} 360}
184 361
185static inline void udc_clear_mask_UDCCR(int mask) 362static inline void udc_clear_mask_UDCCR(struct pxa25x_udc *dev, int mask)
186{ 363{
187 UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS); 364 u32 udccr = udc_get_reg(dev, UDCCR);
365
366 udc_set_reg(dev, (udccr & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS), UDCCR);
188} 367}
189 368
190static inline void udc_ack_int_UDCCR(int mask) 369static inline void udc_ack_int_UDCCR(struct pxa25x_udc *dev, int mask)
191{ 370{
192 /* udccr contains the bits we dont want to change */ 371 /* udccr contains the bits we dont want to change */
193 __u32 udccr = UDCCR & UDCCR_MASK_BITS; 372 u32 udccr = udc_get_reg(dev, UDCCR) & UDCCR_MASK_BITS;
194 373
195 UDCCR = udccr | (mask & ~UDCCR_MASK_BITS); 374 udc_set_reg(dev, udccr | (mask & ~UDCCR_MASK_BITS), UDCCR);
375}
376
377static inline u32 udc_ep_get_UDCCS(struct pxa25x_ep *ep)
378{
379 return udc_get_reg(ep->dev, ep->regoff_udccs);
380}
381
382static inline void udc_ep_set_UDCCS(struct pxa25x_ep *ep, u32 data)
383{
384 udc_set_reg(ep->dev, data, ep->regoff_udccs);
385}
386
387static inline u32 udc_ep0_get_UDCCS(struct pxa25x_udc *dev)
388{
389 return udc_get_reg(dev, UDCCS0);
390}
391
392static inline void udc_ep0_set_UDCCS(struct pxa25x_udc *dev, u32 data)
393{
394 udc_set_reg(dev, data, UDCCS0);
395}
396
397static inline u32 udc_ep_get_UDDR(struct pxa25x_ep *ep)
398{
399 return udc_get_reg(ep->dev, ep->regoff_uddr);
400}
401
402static inline void udc_ep_set_UDDR(struct pxa25x_ep *ep, u32 data)
403{
404 udc_set_reg(ep->dev, data, ep->regoff_uddr);
405}
406
407static inline u32 udc_ep_get_UBCR(struct pxa25x_ep *ep)
408{
409 return udc_get_reg(ep->dev, ep->regoff_ubcr);
196} 410}
197 411
198/* 412/*
@@ -358,7 +572,7 @@ static inline void ep0_idle (struct pxa25x_udc *dev)
358} 572}
359 573
360static int 574static int
361write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max) 575write_packet(struct pxa25x_ep *ep, struct pxa25x_request *req, unsigned max)
362{ 576{
363 u8 *buf; 577 u8 *buf;
364 unsigned length, count; 578 unsigned length, count;
@@ -372,7 +586,7 @@ write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)
372 586
373 count = length; 587 count = length;
374 while (likely(count--)) 588 while (likely(count--))
375 *uddr = *buf++; 589 udc_ep_set_UDDR(ep, *buf++);
376 590
377 return length; 591 return length;
378} 592}
@@ -392,7 +606,7 @@ write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
392 unsigned count; 606 unsigned count;
393 int is_last, is_short; 607 int is_last, is_short;
394 608
395 count = write_packet(ep->reg_uddr, req, max); 609 count = write_packet(ep, req, max);
396 610
397 /* last packet is usually short (or a zlp) */ 611 /* last packet is usually short (or a zlp) */
398 if (unlikely (count != max)) 612 if (unlikely (count != max))
@@ -416,15 +630,15 @@ write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
416 * double buffering might work. TSP, TPC, and TFS 630 * double buffering might work. TSP, TPC, and TFS
417 * bit values are the same for all normal IN endpoints. 631 * bit values are the same for all normal IN endpoints.
418 */ 632 */
419 *ep->reg_udccs = UDCCS_BI_TPC; 633 udc_ep_set_UDCCS(ep, UDCCS_BI_TPC);
420 if (is_short) 634 if (is_short)
421 *ep->reg_udccs = UDCCS_BI_TSP; 635 udc_ep_set_UDCCS(ep, UDCCS_BI_TSP);
422 636
423 /* requests complete when all IN data is in the FIFO */ 637 /* requests complete when all IN data is in the FIFO */
424 if (is_last) { 638 if (is_last) {
425 done (ep, req, 0); 639 done (ep, req, 0);
426 if (list_empty(&ep->queue)) 640 if (list_empty(&ep->queue))
427 pio_irq_disable (ep->bEndpointAddress); 641 pio_irq_disable(ep);
428 return 1; 642 return 1;
429 } 643 }
430 644
@@ -432,7 +646,7 @@ write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
432 // double buffering is off in the default fifo mode, which 646 // double buffering is off in the default fifo mode, which
433 // prevents TFS from being set here. 647 // prevents TFS from being set here.
434 648
435 } while (*ep->reg_udccs & UDCCS_BI_TFS); 649 } while (udc_ep_get_UDCCS(ep) & UDCCS_BI_TFS);
436 return 0; 650 return 0;
437} 651}
438 652
@@ -442,20 +656,21 @@ write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
442static inline 656static inline
443void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag) 657void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)
444{ 658{
445 UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR; 659 udc_ep0_set_UDCCS(dev, flags|UDCCS0_SA|UDCCS0_OPR);
446 USIR0 = USIR0_IR0; 660 udc_set_reg(dev, USIR0, USIR0_IR0);
447 dev->req_pending = 0; 661 dev->req_pending = 0;
448 DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n", 662 DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
449 __func__, tag, UDCCS0, flags); 663 __func__, tag, udc_ep0_get_UDCCS(dev), flags);
450} 664}
451 665
452static int 666static int
453write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req) 667write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
454{ 668{
669 struct pxa25x_udc *dev = ep->dev;
455 unsigned count; 670 unsigned count;
456 int is_short; 671 int is_short;
457 672
458 count = write_packet(&UDDR0, req, EP0_FIFO_SIZE); 673 count = write_packet(&dev->ep[0], req, EP0_FIFO_SIZE);
459 ep->dev->stats.write.bytes += count; 674 ep->dev->stats.write.bytes += count;
460 675
461 /* last packet "must be" short (or a zlp) */ 676 /* last packet "must be" short (or a zlp) */
@@ -468,7 +683,7 @@ write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
468 if (ep->dev->req_pending) 683 if (ep->dev->req_pending)
469 ep0start(ep->dev, UDCCS0_IPR, "short IN"); 684 ep0start(ep->dev, UDCCS0_IPR, "short IN");
470 else 685 else
471 UDCCS0 = UDCCS0_IPR; 686 udc_ep0_set_UDCCS(dev, UDCCS0_IPR);
472 687
473 count = req->req.length; 688 count = req->req.length;
474 done (ep, req, 0); 689 done (ep, req, 0);
@@ -484,9 +699,9 @@ write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
484 if (count >= EP0_FIFO_SIZE) { 699 if (count >= EP0_FIFO_SIZE) {
485 count = 100; 700 count = 100;
486 do { 701 do {
487 if ((UDCCS0 & UDCCS0_OPR) != 0) { 702 if ((udc_ep0_get_UDCCS(dev) & UDCCS0_OPR) != 0) {
488 /* clear OPR, generate ack */ 703 /* clear OPR, generate ack */
489 UDCCS0 = UDCCS0_OPR; 704 udc_ep0_set_UDCCS(dev, UDCCS0_OPR);
490 break; 705 break;
491 } 706 }
492 count--; 707 count--;
@@ -521,7 +736,7 @@ read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
521 * UDCCS_{BO,IO}_RPC are all the same bit value. 736 * UDCCS_{BO,IO}_RPC are all the same bit value.
522 * UDCCS_{BO,IO}_RNE are all the same bit value. 737 * UDCCS_{BO,IO}_RNE are all the same bit value.
523 */ 738 */
524 udccs = *ep->reg_udccs; 739 udccs = udc_ep_get_UDCCS(ep);
525 if (unlikely ((udccs & UDCCS_BO_RPC) == 0)) 740 if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
526 break; 741 break;
527 buf = req->req.buf + req->req.actual; 742 buf = req->req.buf + req->req.actual;
@@ -530,7 +745,7 @@ read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
530 745
531 /* read all bytes from this packet */ 746 /* read all bytes from this packet */
532 if (likely (udccs & UDCCS_BO_RNE)) { 747 if (likely (udccs & UDCCS_BO_RNE)) {
533 count = 1 + (0x0ff & *ep->reg_ubcr); 748 count = 1 + (0x0ff & udc_ep_get_UBCR(ep));
534 req->req.actual += min (count, bufferspace); 749 req->req.actual += min (count, bufferspace);
535 } else /* zlp */ 750 } else /* zlp */
536 count = 0; 751 count = 0;
@@ -540,7 +755,7 @@ read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
540 is_short ? "/S" : "", 755 is_short ? "/S" : "",
541 req, req->req.actual, req->req.length); 756 req, req->req.actual, req->req.length);
542 while (likely (count-- != 0)) { 757 while (likely (count-- != 0)) {
543 u8 byte = (u8) *ep->reg_uddr; 758 u8 byte = (u8) udc_ep_get_UDDR(ep);
544 759
545 if (unlikely (bufferspace == 0)) { 760 if (unlikely (bufferspace == 0)) {
546 /* this happens when the driver's buffer 761 /* this happens when the driver's buffer
@@ -556,7 +771,7 @@ read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
556 bufferspace--; 771 bufferspace--;
557 } 772 }
558 } 773 }
559 *ep->reg_udccs = UDCCS_BO_RPC; 774 udc_ep_set_UDCCS(ep, UDCCS_BO_RPC);
560 /* RPC/RSP/RNE could now reflect the other packet buffer */ 775 /* RPC/RSP/RNE could now reflect the other packet buffer */
561 776
562 /* iso is one request per packet */ 777 /* iso is one request per packet */
@@ -571,7 +786,7 @@ read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
571 if (is_short || req->req.actual == req->req.length) { 786 if (is_short || req->req.actual == req->req.length) {
572 done (ep, req, 0); 787 done (ep, req, 0);
573 if (list_empty(&ep->queue)) 788 if (list_empty(&ep->queue))
574 pio_irq_disable (ep->bEndpointAddress); 789 pio_irq_disable(ep);
575 return 1; 790 return 1;
576 } 791 }
577 792
@@ -595,7 +810,7 @@ read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
595 buf = req->req.buf + req->req.actual; 810 buf = req->req.buf + req->req.actual;
596 bufferspace = req->req.length - req->req.actual; 811 bufferspace = req->req.length - req->req.actual;
597 812
598 while (UDCCS0 & UDCCS0_RNE) { 813 while (udc_ep_get_UDCCS(ep) & UDCCS0_RNE) {
599 byte = (u8) UDDR0; 814 byte = (u8) UDDR0;
600 815
601 if (unlikely (bufferspace == 0)) { 816 if (unlikely (bufferspace == 0)) {
@@ -613,7 +828,7 @@ read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
613 } 828 }
614 } 829 }
615 830
616 UDCCS0 = UDCCS0_OPR | UDCCS0_IPR; 831 udc_ep_set_UDCCS(ep, UDCCS0_OPR | UDCCS0_IPR);
617 832
618 /* completion */ 833 /* completion */
619 if (req->req.actual >= req->req.length) 834 if (req->req.actual >= req->req.length)
@@ -687,8 +902,8 @@ pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
687 DBG(DBG_VERBOSE, "ep0 config ack%s\n", 902 DBG(DBG_VERBOSE, "ep0 config ack%s\n",
688 dev->has_cfr ? "" : " raced"); 903 dev->has_cfr ? "" : " raced");
689 if (dev->has_cfr) 904 if (dev->has_cfr)
690 UDCCFR = UDCCFR_AREN|UDCCFR_ACM 905 udc_set_reg(dev, UDCCFR, UDCCFR_AREN |
691 |UDCCFR_MB1; 906 UDCCFR_ACM | UDCCFR_MB1);
692 done(ep, req, 0); 907 done(ep, req, 0);
693 dev->ep0state = EP0_END_XFER; 908 dev->ep0state = EP0_END_XFER;
694 local_irq_restore (flags); 909 local_irq_restore (flags);
@@ -696,7 +911,7 @@ pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
696 } 911 }
697 if (dev->req_pending) 912 if (dev->req_pending)
698 ep0start(dev, UDCCS0_IPR, "OUT"); 913 ep0start(dev, UDCCS0_IPR, "OUT");
699 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0 914 if (length == 0 || ((udc_ep0_get_UDCCS(dev) & UDCCS0_RNE) != 0
700 && read_ep0_fifo(ep, req))) { 915 && read_ep0_fifo(ep, req))) {
701 ep0_idle(dev); 916 ep0_idle(dev);
702 done(ep, req, 0); 917 done(ep, req, 0);
@@ -711,16 +926,16 @@ pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
711 } 926 }
712 /* can the FIFO can satisfy the request immediately? */ 927 /* can the FIFO can satisfy the request immediately? */
713 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) { 928 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
714 if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0 929 if ((udc_ep_get_UDCCS(ep) & UDCCS_BI_TFS) != 0
715 && write_fifo(ep, req)) 930 && write_fifo(ep, req))
716 req = NULL; 931 req = NULL;
717 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0 932 } else if ((udc_ep_get_UDCCS(ep) & UDCCS_BO_RFS) != 0
718 && read_fifo(ep, req)) { 933 && read_fifo(ep, req)) {
719 req = NULL; 934 req = NULL;
720 } 935 }
721 936
722 if (likely(req && ep->ep.desc)) 937 if (likely(req && ep->ep.desc))
723 pio_irq_enable(ep->bEndpointAddress); 938 pio_irq_enable(ep);
724 } 939 }
725 940
726 /* pio or dma irq handler advances the queue. */ 941 /* pio or dma irq handler advances the queue. */
@@ -747,7 +962,7 @@ static void nuke(struct pxa25x_ep *ep, int status)
747 done(ep, req, status); 962 done(ep, req, status);
748 } 963 }
749 if (ep->ep.desc) 964 if (ep->ep.desc)
750 pio_irq_disable (ep->bEndpointAddress); 965 pio_irq_disable(ep);
751} 966}
752 967
753 968
@@ -807,14 +1022,14 @@ static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
807 local_irq_save(flags); 1022 local_irq_save(flags);
808 1023
809 if ((ep->bEndpointAddress & USB_DIR_IN) != 0 1024 if ((ep->bEndpointAddress & USB_DIR_IN) != 0
810 && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0 1025 && ((udc_ep_get_UDCCS(ep) & UDCCS_BI_TFS) == 0
811 || !list_empty(&ep->queue))) { 1026 || !list_empty(&ep->queue))) {
812 local_irq_restore(flags); 1027 local_irq_restore(flags);
813 return -EAGAIN; 1028 return -EAGAIN;
814 } 1029 }
815 1030
816 /* FST bit is the same for control, bulk in, bulk out, interrupt in */ 1031 /* FST bit is the same for control, bulk in, bulk out, interrupt in */
817 *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF; 1032 udc_ep_set_UDCCS(ep, UDCCS_BI_FST|UDCCS_BI_FTF);
818 1033
819 /* ep0 needs special care */ 1034 /* ep0 needs special care */
820 if (!ep->ep.desc) { 1035 if (!ep->ep.desc) {
@@ -826,7 +1041,7 @@ static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
826 } else { 1041 } else {
827 unsigned i; 1042 unsigned i;
828 for (i = 0; i < 1000; i += 20) { 1043 for (i = 0; i < 1000; i += 20) {
829 if (*ep->reg_udccs & UDCCS_BI_SST) 1044 if (udc_ep_get_UDCCS(ep) & UDCCS_BI_SST)
830 break; 1045 break;
831 udelay(20); 1046 udelay(20);
832 } 1047 }
@@ -850,10 +1065,10 @@ static int pxa25x_ep_fifo_status(struct usb_ep *_ep)
850 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) 1065 if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
851 return -EOPNOTSUPP; 1066 return -EOPNOTSUPP;
852 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN 1067 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
853 || (*ep->reg_udccs & UDCCS_BO_RFS) == 0) 1068 || (udc_ep_get_UDCCS(ep) & UDCCS_BO_RFS) == 0)
854 return 0; 1069 return 0;
855 else 1070 else
856 return (*ep->reg_ubcr & 0xfff) + 1; 1071 return (udc_ep_get_UBCR(ep) & 0xfff) + 1;
857} 1072}
858 1073
859static void pxa25x_ep_fifo_flush(struct usb_ep *_ep) 1074static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
@@ -870,15 +1085,15 @@ static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
870 1085
871 /* for OUT, just read and discard the FIFO contents. */ 1086 /* for OUT, just read and discard the FIFO contents. */
872 if ((ep->bEndpointAddress & USB_DIR_IN) == 0) { 1087 if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
873 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0) 1088 while (((udc_ep_get_UDCCS(ep)) & UDCCS_BO_RNE) != 0)
874 (void) *ep->reg_uddr; 1089 (void)udc_ep_get_UDDR(ep);
875 return; 1090 return;
876 } 1091 }
877 1092
878 /* most IN status is the same, but ISO can't stall */ 1093 /* most IN status is the same, but ISO can't stall */
879 *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR 1094 udc_ep_set_UDCCS(ep, UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
880 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC 1095 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
881 ? 0 : UDCCS_BI_SST); 1096 ? 0 : UDCCS_BI_SST));
882} 1097}
883 1098
884 1099
@@ -905,15 +1120,23 @@ static struct usb_ep_ops pxa25x_ep_ops = {
905 1120
906static int pxa25x_udc_get_frame(struct usb_gadget *_gadget) 1121static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)
907{ 1122{
908 return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff); 1123 struct pxa25x_udc *dev;
1124
1125 dev = container_of(_gadget, struct pxa25x_udc, gadget);
1126 return ((udc_get_reg(dev, UFNRH) & 0x07) << 8) |
1127 (udc_get_reg(dev, UFNRL) & 0xff);
909} 1128}
910 1129
911static int pxa25x_udc_wakeup(struct usb_gadget *_gadget) 1130static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)
912{ 1131{
1132 struct pxa25x_udc *udc;
1133
1134 udc = container_of(_gadget, struct pxa25x_udc, gadget);
1135
913 /* host may not have enabled remote wakeup */ 1136 /* host may not have enabled remote wakeup */
914 if ((UDCCS0 & UDCCS0_DRWF) == 0) 1137 if ((udc_ep0_get_UDCCS(udc) & UDCCS0_DRWF) == 0)
915 return -EHOSTUNREACH; 1138 return -EHOSTUNREACH;
916 udc_set_mask_UDCCR(UDCCR_RSM); 1139 udc_set_mask_UDCCR(udc, UDCCR_RSM);
917 return 0; 1140 return 0;
918} 1141}
919 1142
@@ -1034,9 +1257,11 @@ udc_seq_show(struct seq_file *m, void *_d)
1034 /* registers for device and ep0 */ 1257 /* registers for device and ep0 */
1035 seq_printf(m, 1258 seq_printf(m,
1036 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n", 1259 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1037 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL); 1260 udc_get_reg(dev, UICR1), udc_get_reg(dev, UICR0),
1261 udc_get_reg(dev, USIR1), udc_get_reg(dev, USIR0),
1262 udc_get_reg(dev, UFNRH), udc_get_reg(dev, UFNRL));
1038 1263
1039 tmp = UDCCR; 1264 tmp = udc_get_reg(dev, UDCCR);
1040 seq_printf(m, 1265 seq_printf(m,
1041 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp, 1266 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1042 (tmp & UDCCR_REM) ? " rem" : "", 1267 (tmp & UDCCR_REM) ? " rem" : "",
@@ -1048,7 +1273,7 @@ udc_seq_show(struct seq_file *m, void *_d)
1048 (tmp & UDCCR_UDA) ? " uda" : "", 1273 (tmp & UDCCR_UDA) ? " uda" : "",
1049 (tmp & UDCCR_UDE) ? " ude" : ""); 1274 (tmp & UDCCR_UDE) ? " ude" : "");
1050 1275
1051 tmp = UDCCS0; 1276 tmp = udc_ep0_get_UDCCS(dev);
1052 seq_printf(m, 1277 seq_printf(m,
1053 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp, 1278 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1054 (tmp & UDCCS0_SA) ? " sa" : "", 1279 (tmp & UDCCS0_SA) ? " sa" : "",
@@ -1061,7 +1286,7 @@ udc_seq_show(struct seq_file *m, void *_d)
1061 (tmp & UDCCS0_OPR) ? " opr" : ""); 1286 (tmp & UDCCS0_OPR) ? " opr" : "");
1062 1287
1063 if (dev->has_cfr) { 1288 if (dev->has_cfr) {
1064 tmp = UDCCFR; 1289 tmp = udc_get_reg(dev, UDCCFR);
1065 seq_printf(m, 1290 seq_printf(m,
1066 "udccfr %02X =%s%s\n", tmp, 1291 "udccfr %02X =%s%s\n", tmp,
1067 (tmp & UDCCFR_AREN) ? " aren" : "", 1292 (tmp & UDCCFR_AREN) ? " aren" : "",
@@ -1087,7 +1312,7 @@ udc_seq_show(struct seq_file *m, void *_d)
1087 desc = ep->ep.desc; 1312 desc = ep->ep.desc;
1088 if (!desc) 1313 if (!desc)
1089 continue; 1314 continue;
1090 tmp = *dev->ep [i].reg_udccs; 1315 tmp = udc_ep_get_UDCCS(&dev->ep[i]);
1091 seq_printf(m, 1316 seq_printf(m,
1092 "%s max %d %s udccs %02x irqs %lu\n", 1317 "%s max %d %s udccs %02x irqs %lu\n",
1093 ep->ep.name, usb_endpoint_maxp(desc), 1318 ep->ep.name, usb_endpoint_maxp(desc),
@@ -1151,14 +1376,15 @@ static const struct file_operations debug_fops = {
1151static void udc_disable(struct pxa25x_udc *dev) 1376static void udc_disable(struct pxa25x_udc *dev)
1152{ 1377{
1153 /* block all irqs */ 1378 /* block all irqs */
1154 udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM); 1379 udc_set_mask_UDCCR(dev, UDCCR_SRM|UDCCR_REM);
1155 UICR0 = UICR1 = 0xff; 1380 udc_set_reg(dev, UICR0, 0xff);
1156 UFNRH = UFNRH_SIM; 1381 udc_set_reg(dev, UICR1, 0xff);
1382 udc_set_reg(dev, UFNRH, UFNRH_SIM);
1157 1383
1158 /* if hardware supports it, disconnect from usb */ 1384 /* if hardware supports it, disconnect from usb */
1159 pullup_off(); 1385 pullup_off();
1160 1386
1161 udc_clear_mask_UDCCR(UDCCR_UDE); 1387 udc_clear_mask_UDCCR(dev, UDCCR_UDE);
1162 1388
1163 ep0_idle (dev); 1389 ep0_idle (dev);
1164 dev->gadget.speed = USB_SPEED_UNKNOWN; 1390 dev->gadget.speed = USB_SPEED_UNKNOWN;
@@ -1200,10 +1426,10 @@ static void udc_reinit(struct pxa25x_udc *dev)
1200 */ 1426 */
1201static void udc_enable (struct pxa25x_udc *dev) 1427static void udc_enable (struct pxa25x_udc *dev)
1202{ 1428{
1203 udc_clear_mask_UDCCR(UDCCR_UDE); 1429 udc_clear_mask_UDCCR(dev, UDCCR_UDE);
1204 1430
1205 /* try to clear these bits before we enable the udc */ 1431 /* try to clear these bits before we enable the udc */
1206 udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR); 1432 udc_ack_int_UDCCR(dev, UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1207 1433
1208 ep0_idle(dev); 1434 ep0_idle(dev);
1209 dev->gadget.speed = USB_SPEED_UNKNOWN; 1435 dev->gadget.speed = USB_SPEED_UNKNOWN;
@@ -1215,15 +1441,15 @@ static void udc_enable (struct pxa25x_udc *dev)
1215 * - if RESET is already in progress, ack interrupt 1441 * - if RESET is already in progress, ack interrupt
1216 * - unmask reset interrupt 1442 * - unmask reset interrupt
1217 */ 1443 */
1218 udc_set_mask_UDCCR(UDCCR_UDE); 1444 udc_set_mask_UDCCR(dev, UDCCR_UDE);
1219 if (!(UDCCR & UDCCR_UDA)) 1445 if (!(udc_get_reg(dev, UDCCR) & UDCCR_UDA))
1220 udc_ack_int_UDCCR(UDCCR_RSTIR); 1446 udc_ack_int_UDCCR(dev, UDCCR_RSTIR);
1221 1447
1222 if (dev->has_cfr /* UDC_RES2 is defined */) { 1448 if (dev->has_cfr /* UDC_RES2 is defined */) {
1223 /* pxa255 (a0+) can avoid a set_config race that could 1449 /* pxa255 (a0+) can avoid a set_config race that could
1224 * prevent gadget drivers from configuring correctly 1450 * prevent gadget drivers from configuring correctly
1225 */ 1451 */
1226 UDCCFR = UDCCFR_ACM | UDCCFR_MB1; 1452 udc_set_reg(dev, UDCCFR, UDCCFR_ACM | UDCCFR_MB1);
1227 } else { 1453 } else {
1228 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1) 1454 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1229 * which could result in missing packets and interrupts. 1455 * which could result in missing packets and interrupts.
@@ -1231,15 +1457,15 @@ static void udc_enable (struct pxa25x_udc *dev)
1231 * double buffers or not; ACM/AREN bits fit into the holes. 1457 * double buffers or not; ACM/AREN bits fit into the holes.
1232 * zero bits (like USIR0_IRx) disable double buffering. 1458 * zero bits (like USIR0_IRx) disable double buffering.
1233 */ 1459 */
1234 UDC_RES1 = 0x00; 1460 udc_set_reg(dev, UDC_RES1, 0x00);
1235 UDC_RES2 = 0x00; 1461 udc_set_reg(dev, UDC_RES2, 0x00);
1236 } 1462 }
1237 1463
1238 /* enable suspend/resume and reset irqs */ 1464 /* enable suspend/resume and reset irqs */
1239 udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM); 1465 udc_clear_mask_UDCCR(dev, UDCCR_SRM | UDCCR_REM);
1240 1466
1241 /* enable ep0 irqs */ 1467 /* enable ep0 irqs */
1242 UICR0 &= ~UICR0_IM0; 1468 udc_set_reg(dev, UICR0, udc_get_reg(dev, UICR0) & ~UICR0_IM0);
1243 1469
1244 /* if hardware supports it, pullup D+ and wait for reset */ 1470 /* if hardware supports it, pullup D+ and wait for reset */
1245 pullup_on(); 1471 pullup_on();
@@ -1408,9 +1634,9 @@ static void udc_watchdog(unsigned long _dev)
1408 1634
1409 local_irq_disable(); 1635 local_irq_disable();
1410 if (dev->ep0state == EP0_STALL 1636 if (dev->ep0state == EP0_STALL
1411 && (UDCCS0 & UDCCS0_FST) == 0 1637 && (udc_ep0_get_UDCCS(dev) & UDCCS0_FST) == 0
1412 && (UDCCS0 & UDCCS0_SST) == 0) { 1638 && (udc_ep0_get_UDCCS(dev) & UDCCS0_SST) == 0) {
1413 UDCCS0 = UDCCS0_FST|UDCCS0_FTF; 1639 udc_ep0_set_UDCCS(dev, UDCCS0_FST|UDCCS0_FTF);
1414 DBG(DBG_VERBOSE, "ep0 re-stall\n"); 1640 DBG(DBG_VERBOSE, "ep0 re-stall\n");
1415 start_watchdog(dev); 1641 start_watchdog(dev);
1416 } 1642 }
@@ -1419,7 +1645,7 @@ static void udc_watchdog(unsigned long _dev)
1419 1645
1420static void handle_ep0 (struct pxa25x_udc *dev) 1646static void handle_ep0 (struct pxa25x_udc *dev)
1421{ 1647{
1422 u32 udccs0 = UDCCS0; 1648 u32 udccs0 = udc_ep0_get_UDCCS(dev);
1423 struct pxa25x_ep *ep = &dev->ep [0]; 1649 struct pxa25x_ep *ep = &dev->ep [0];
1424 struct pxa25x_request *req; 1650 struct pxa25x_request *req;
1425 union { 1651 union {
@@ -1436,7 +1662,7 @@ static void handle_ep0 (struct pxa25x_udc *dev)
1436 /* clear stall status */ 1662 /* clear stall status */
1437 if (udccs0 & UDCCS0_SST) { 1663 if (udccs0 & UDCCS0_SST) {
1438 nuke(ep, -EPIPE); 1664 nuke(ep, -EPIPE);
1439 UDCCS0 = UDCCS0_SST; 1665 udc_ep0_set_UDCCS(dev, UDCCS0_SST);
1440 del_timer(&dev->timer); 1666 del_timer(&dev->timer);
1441 ep0_idle(dev); 1667 ep0_idle(dev);
1442 } 1668 }
@@ -1451,7 +1677,7 @@ static void handle_ep0 (struct pxa25x_udc *dev)
1451 switch (dev->ep0state) { 1677 switch (dev->ep0state) {
1452 case EP0_IDLE: 1678 case EP0_IDLE:
1453 /* late-breaking status? */ 1679 /* late-breaking status? */
1454 udccs0 = UDCCS0; 1680 udccs0 = udc_ep0_get_UDCCS(dev);
1455 1681
1456 /* start control request? */ 1682 /* start control request? */
1457 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE)) 1683 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
@@ -1462,14 +1688,14 @@ static void handle_ep0 (struct pxa25x_udc *dev)
1462 1688
1463 /* read SETUP packet */ 1689 /* read SETUP packet */
1464 for (i = 0; i < 8; i++) { 1690 for (i = 0; i < 8; i++) {
1465 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) { 1691 if (unlikely(!(udc_ep0_get_UDCCS(dev) & UDCCS0_RNE))) {
1466bad_setup: 1692bad_setup:
1467 DMSG("SETUP %d!\n", i); 1693 DMSG("SETUP %d!\n", i);
1468 goto stall; 1694 goto stall;
1469 } 1695 }
1470 u.raw [i] = (u8) UDDR0; 1696 u.raw [i] = (u8) UDDR0;
1471 } 1697 }
1472 if (unlikely((UDCCS0 & UDCCS0_RNE) != 0)) 1698 if (unlikely((udc_ep0_get_UDCCS(dev) & UDCCS0_RNE) != 0))
1473 goto bad_setup; 1699 goto bad_setup;
1474 1700
1475got_setup: 1701got_setup:
@@ -1545,7 +1771,7 @@ config_change:
1545 */ 1771 */
1546 } 1772 }
1547 DBG(DBG_VERBOSE, "protocol STALL, " 1773 DBG(DBG_VERBOSE, "protocol STALL, "
1548 "%02x err %d\n", UDCCS0, i); 1774 "%02x err %d\n", udc_ep0_get_UDCCS(dev), i);
1549stall: 1775stall:
1550 /* the watchdog timer helps deal with cases 1776 /* the watchdog timer helps deal with cases
1551 * where udc seems to clear FST wrongly, and 1777 * where udc seems to clear FST wrongly, and
@@ -1592,12 +1818,12 @@ stall:
1592 * - IPR cleared 1818 * - IPR cleared
1593 * - OPR got set, without SA (likely status stage) 1819 * - OPR got set, without SA (likely status stage)
1594 */ 1820 */
1595 UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR); 1821 udc_ep0_set_UDCCS(dev, udccs0 & (UDCCS0_SA|UDCCS0_OPR));
1596 } 1822 }
1597 break; 1823 break;
1598 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */ 1824 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
1599 if (udccs0 & UDCCS0_OPR) { 1825 if (udccs0 & UDCCS0_OPR) {
1600 UDCCS0 = UDCCS0_OPR|UDCCS0_FTF; 1826 udc_ep0_set_UDCCS(dev, UDCCS0_OPR|UDCCS0_FTF);
1601 DBG(DBG_VERBOSE, "ep0in premature status\n"); 1827 DBG(DBG_VERBOSE, "ep0in premature status\n");
1602 if (req) 1828 if (req)
1603 done(ep, req, 0); 1829 done(ep, req, 0);
@@ -1631,14 +1857,14 @@ stall:
1631 * also appears after some config change events. 1857 * also appears after some config change events.
1632 */ 1858 */
1633 if (udccs0 & UDCCS0_OPR) 1859 if (udccs0 & UDCCS0_OPR)
1634 UDCCS0 = UDCCS0_OPR; 1860 udc_ep0_set_UDCCS(dev, UDCCS0_OPR);
1635 ep0_idle(dev); 1861 ep0_idle(dev);
1636 break; 1862 break;
1637 case EP0_STALL: 1863 case EP0_STALL:
1638 UDCCS0 = UDCCS0_FST; 1864 udc_ep0_set_UDCCS(dev, UDCCS0_FST);
1639 break; 1865 break;
1640 } 1866 }
1641 USIR0 = USIR0_IR0; 1867 udc_set_reg(dev, USIR0, USIR0_IR0);
1642} 1868}
1643 1869
1644static void handle_ep(struct pxa25x_ep *ep) 1870static void handle_ep(struct pxa25x_ep *ep)
@@ -1658,14 +1884,14 @@ static void handle_ep(struct pxa25x_ep *ep)
1658 1884
1659 // TODO check FST handling 1885 // TODO check FST handling
1660 1886
1661 udccs = *ep->reg_udccs; 1887 udccs = udc_ep_get_UDCCS(ep);
1662 if (unlikely(is_in)) { /* irq from TPC, SST, or (ISO) TUR */ 1888 if (unlikely(is_in)) { /* irq from TPC, SST, or (ISO) TUR */
1663 tmp = UDCCS_BI_TUR; 1889 tmp = UDCCS_BI_TUR;
1664 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK)) 1890 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1665 tmp |= UDCCS_BI_SST; 1891 tmp |= UDCCS_BI_SST;
1666 tmp &= udccs; 1892 tmp &= udccs;
1667 if (likely (tmp)) 1893 if (likely (tmp))
1668 *ep->reg_udccs = tmp; 1894 udc_ep_set_UDCCS(ep, tmp);
1669 if (req && likely ((udccs & UDCCS_BI_TFS) != 0)) 1895 if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1670 completed = write_fifo(ep, req); 1896 completed = write_fifo(ep, req);
1671 1897
@@ -1676,13 +1902,13 @@ static void handle_ep(struct pxa25x_ep *ep)
1676 tmp = UDCCS_IO_ROF | UDCCS_IO_DME; 1902 tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1677 tmp &= udccs; 1903 tmp &= udccs;
1678 if (likely(tmp)) 1904 if (likely(tmp))
1679 *ep->reg_udccs = tmp; 1905 udc_ep_set_UDCCS(ep, tmp);
1680 1906
1681 /* fifos can hold packets, ready for reading... */ 1907 /* fifos can hold packets, ready for reading... */
1682 if (likely(req)) { 1908 if (likely(req)) {
1683 completed = read_fifo(ep, req); 1909 completed = read_fifo(ep, req);
1684 } else 1910 } else
1685 pio_irq_disable (ep->bEndpointAddress); 1911 pio_irq_disable(ep);
1686 } 1912 }
1687 ep->pio_irqs++; 1913 ep->pio_irqs++;
1688 } while (completed); 1914 } while (completed);
@@ -1703,13 +1929,13 @@ pxa25x_udc_irq(int irq, void *_dev)
1703 1929
1704 dev->stats.irqs++; 1930 dev->stats.irqs++;
1705 do { 1931 do {
1706 u32 udccr = UDCCR; 1932 u32 udccr = udc_get_reg(dev, UDCCR);
1707 1933
1708 handled = 0; 1934 handled = 0;
1709 1935
1710 /* SUSpend Interrupt Request */ 1936 /* SUSpend Interrupt Request */
1711 if (unlikely(udccr & UDCCR_SUSIR)) { 1937 if (unlikely(udccr & UDCCR_SUSIR)) {
1712 udc_ack_int_UDCCR(UDCCR_SUSIR); 1938 udc_ack_int_UDCCR(dev, UDCCR_SUSIR);
1713 handled = 1; 1939 handled = 1;
1714 DBG(DBG_VERBOSE, "USB suspend\n"); 1940 DBG(DBG_VERBOSE, "USB suspend\n");
1715 1941
@@ -1722,7 +1948,7 @@ pxa25x_udc_irq(int irq, void *_dev)
1722 1948
1723 /* RESume Interrupt Request */ 1949 /* RESume Interrupt Request */
1724 if (unlikely(udccr & UDCCR_RESIR)) { 1950 if (unlikely(udccr & UDCCR_RESIR)) {
1725 udc_ack_int_UDCCR(UDCCR_RESIR); 1951 udc_ack_int_UDCCR(dev, UDCCR_RESIR);
1726 handled = 1; 1952 handled = 1;
1727 DBG(DBG_VERBOSE, "USB resume\n"); 1953 DBG(DBG_VERBOSE, "USB resume\n");
1728 1954
@@ -1734,10 +1960,10 @@ pxa25x_udc_irq(int irq, void *_dev)
1734 1960
1735 /* ReSeT Interrupt Request - USB reset */ 1961 /* ReSeT Interrupt Request - USB reset */
1736 if (unlikely(udccr & UDCCR_RSTIR)) { 1962 if (unlikely(udccr & UDCCR_RSTIR)) {
1737 udc_ack_int_UDCCR(UDCCR_RSTIR); 1963 udc_ack_int_UDCCR(dev, UDCCR_RSTIR);
1738 handled = 1; 1964 handled = 1;
1739 1965
1740 if ((UDCCR & UDCCR_UDA) == 0) { 1966 if ((udc_get_reg(dev, UDCCR) & UDCCR_UDA) == 0) {
1741 DBG(DBG_VERBOSE, "USB reset start\n"); 1967 DBG(DBG_VERBOSE, "USB reset start\n");
1742 1968
1743 /* reset driver and endpoints, 1969 /* reset driver and endpoints,
@@ -1753,8 +1979,10 @@ pxa25x_udc_irq(int irq, void *_dev)
1753 } 1979 }
1754 1980
1755 } else { 1981 } else {
1756 u32 usir0 = USIR0 & ~UICR0; 1982 u32 usir0 = udc_get_reg(dev, USIR0) &
1757 u32 usir1 = USIR1 & ~UICR1; 1983 ~udc_get_reg(dev, UICR0);
1984 u32 usir1 = udc_get_reg(dev, USIR1) &
1985 ~udc_get_reg(dev, UICR1);
1758 int i; 1986 int i;
1759 1987
1760 if (unlikely (!usir0 && !usir1)) 1988 if (unlikely (!usir0 && !usir1))
@@ -1775,13 +2003,15 @@ pxa25x_udc_irq(int irq, void *_dev)
1775 2003
1776 if (i && (usir0 & tmp)) { 2004 if (i && (usir0 & tmp)) {
1777 handle_ep(&dev->ep[i]); 2005 handle_ep(&dev->ep[i]);
1778 USIR0 |= tmp; 2006 udc_set_reg(dev, USIR0,
2007 udc_get_reg(dev, USIR0) | tmp);
1779 handled = 1; 2008 handled = 1;
1780 } 2009 }
1781#ifndef CONFIG_USB_PXA25X_SMALL 2010#ifndef CONFIG_USB_PXA25X_SMALL
1782 if (usir1 & tmp) { 2011 if (usir1 & tmp) {
1783 handle_ep(&dev->ep[i+8]); 2012 handle_ep(&dev->ep[i+8]);
1784 USIR1 |= tmp; 2013 udc_set_reg(dev, USIR1,
2014 udc_get_reg(dev, USIR1) | tmp);
1785 handled = 1; 2015 handled = 1;
1786 } 2016 }
1787#endif 2017#endif
@@ -1826,8 +2056,8 @@ static struct pxa25x_udc memory = {
1826 USB_EP_CAPS_DIR_ALL), 2056 USB_EP_CAPS_DIR_ALL),
1827 }, 2057 },
1828 .dev = &memory, 2058 .dev = &memory,
1829 .reg_udccs = &UDCCS0, 2059 .regoff_udccs = UDCCS0,
1830 .reg_uddr = &UDDR0, 2060 .regoff_uddr = UDDR0,
1831 }, 2061 },
1832 2062
1833 /* first group of endpoints */ 2063 /* first group of endpoints */
@@ -1843,8 +2073,8 @@ static struct pxa25x_udc memory = {
1843 .fifo_size = BULK_FIFO_SIZE, 2073 .fifo_size = BULK_FIFO_SIZE,
1844 .bEndpointAddress = USB_DIR_IN | 1, 2074 .bEndpointAddress = USB_DIR_IN | 1,
1845 .bmAttributes = USB_ENDPOINT_XFER_BULK, 2075 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1846 .reg_udccs = &UDCCS1, 2076 .regoff_udccs = UDCCS1,
1847 .reg_uddr = &UDDR1, 2077 .regoff_uddr = UDDR1,
1848 }, 2078 },
1849 .ep[2] = { 2079 .ep[2] = {
1850 .ep = { 2080 .ep = {
@@ -1858,9 +2088,9 @@ static struct pxa25x_udc memory = {
1858 .fifo_size = BULK_FIFO_SIZE, 2088 .fifo_size = BULK_FIFO_SIZE,
1859 .bEndpointAddress = 2, 2089 .bEndpointAddress = 2,
1860 .bmAttributes = USB_ENDPOINT_XFER_BULK, 2090 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1861 .reg_udccs = &UDCCS2, 2091 .regoff_udccs = UDCCS2,
1862 .reg_ubcr = &UBCR2, 2092 .regoff_ubcr = UBCR2,
1863 .reg_uddr = &UDDR2, 2093 .regoff_uddr = UDDR2,
1864 }, 2094 },
1865#ifndef CONFIG_USB_PXA25X_SMALL 2095#ifndef CONFIG_USB_PXA25X_SMALL
1866 .ep[3] = { 2096 .ep[3] = {
@@ -1875,8 +2105,8 @@ static struct pxa25x_udc memory = {
1875 .fifo_size = ISO_FIFO_SIZE, 2105 .fifo_size = ISO_FIFO_SIZE,
1876 .bEndpointAddress = USB_DIR_IN | 3, 2106 .bEndpointAddress = USB_DIR_IN | 3,
1877 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 2107 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1878 .reg_udccs = &UDCCS3, 2108 .regoff_udccs = UDCCS3,
1879 .reg_uddr = &UDDR3, 2109 .regoff_uddr = UDDR3,
1880 }, 2110 },
1881 .ep[4] = { 2111 .ep[4] = {
1882 .ep = { 2112 .ep = {
@@ -1890,9 +2120,9 @@ static struct pxa25x_udc memory = {
1890 .fifo_size = ISO_FIFO_SIZE, 2120 .fifo_size = ISO_FIFO_SIZE,
1891 .bEndpointAddress = 4, 2121 .bEndpointAddress = 4,
1892 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 2122 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1893 .reg_udccs = &UDCCS4, 2123 .regoff_udccs = UDCCS4,
1894 .reg_ubcr = &UBCR4, 2124 .regoff_ubcr = UBCR4,
1895 .reg_uddr = &UDDR4, 2125 .regoff_uddr = UDDR4,
1896 }, 2126 },
1897 .ep[5] = { 2127 .ep[5] = {
1898 .ep = { 2128 .ep = {
@@ -1905,8 +2135,8 @@ static struct pxa25x_udc memory = {
1905 .fifo_size = INT_FIFO_SIZE, 2135 .fifo_size = INT_FIFO_SIZE,
1906 .bEndpointAddress = USB_DIR_IN | 5, 2136 .bEndpointAddress = USB_DIR_IN | 5,
1907 .bmAttributes = USB_ENDPOINT_XFER_INT, 2137 .bmAttributes = USB_ENDPOINT_XFER_INT,
1908 .reg_udccs = &UDCCS5, 2138 .regoff_udccs = UDCCS5,
1909 .reg_uddr = &UDDR5, 2139 .regoff_uddr = UDDR5,
1910 }, 2140 },
1911 2141
1912 /* second group of endpoints */ 2142 /* second group of endpoints */
@@ -1922,8 +2152,8 @@ static struct pxa25x_udc memory = {
1922 .fifo_size = BULK_FIFO_SIZE, 2152 .fifo_size = BULK_FIFO_SIZE,
1923 .bEndpointAddress = USB_DIR_IN | 6, 2153 .bEndpointAddress = USB_DIR_IN | 6,
1924 .bmAttributes = USB_ENDPOINT_XFER_BULK, 2154 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1925 .reg_udccs = &UDCCS6, 2155 .regoff_udccs = UDCCS6,
1926 .reg_uddr = &UDDR6, 2156 .regoff_uddr = UDDR6,
1927 }, 2157 },
1928 .ep[7] = { 2158 .ep[7] = {
1929 .ep = { 2159 .ep = {
@@ -1937,9 +2167,9 @@ static struct pxa25x_udc memory = {
1937 .fifo_size = BULK_FIFO_SIZE, 2167 .fifo_size = BULK_FIFO_SIZE,
1938 .bEndpointAddress = 7, 2168 .bEndpointAddress = 7,
1939 .bmAttributes = USB_ENDPOINT_XFER_BULK, 2169 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1940 .reg_udccs = &UDCCS7, 2170 .regoff_udccs = UDCCS7,
1941 .reg_ubcr = &UBCR7, 2171 .regoff_ubcr = UBCR7,
1942 .reg_uddr = &UDDR7, 2172 .regoff_uddr = UDDR7,
1943 }, 2173 },
1944 .ep[8] = { 2174 .ep[8] = {
1945 .ep = { 2175 .ep = {
@@ -1953,8 +2183,8 @@ static struct pxa25x_udc memory = {
1953 .fifo_size = ISO_FIFO_SIZE, 2183 .fifo_size = ISO_FIFO_SIZE,
1954 .bEndpointAddress = USB_DIR_IN | 8, 2184 .bEndpointAddress = USB_DIR_IN | 8,
1955 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 2185 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1956 .reg_udccs = &UDCCS8, 2186 .regoff_udccs = UDCCS8,
1957 .reg_uddr = &UDDR8, 2187 .regoff_uddr = UDDR8,
1958 }, 2188 },
1959 .ep[9] = { 2189 .ep[9] = {
1960 .ep = { 2190 .ep = {
@@ -1968,9 +2198,9 @@ static struct pxa25x_udc memory = {
1968 .fifo_size = ISO_FIFO_SIZE, 2198 .fifo_size = ISO_FIFO_SIZE,
1969 .bEndpointAddress = 9, 2199 .bEndpointAddress = 9,
1970 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 2200 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1971 .reg_udccs = &UDCCS9, 2201 .regoff_udccs = UDCCS9,
1972 .reg_ubcr = &UBCR9, 2202 .regoff_ubcr = UBCR9,
1973 .reg_uddr = &UDDR9, 2203 .regoff_uddr = UDDR9,
1974 }, 2204 },
1975 .ep[10] = { 2205 .ep[10] = {
1976 .ep = { 2206 .ep = {
@@ -1983,8 +2213,8 @@ static struct pxa25x_udc memory = {
1983 .fifo_size = INT_FIFO_SIZE, 2213 .fifo_size = INT_FIFO_SIZE,
1984 .bEndpointAddress = USB_DIR_IN | 10, 2214 .bEndpointAddress = USB_DIR_IN | 10,
1985 .bmAttributes = USB_ENDPOINT_XFER_INT, 2215 .bmAttributes = USB_ENDPOINT_XFER_INT,
1986 .reg_udccs = &UDCCS10, 2216 .regoff_udccs = UDCCS10,
1987 .reg_uddr = &UDDR10, 2217 .regoff_uddr = UDDR10,
1988 }, 2218 },
1989 2219
1990 /* third group of endpoints */ 2220 /* third group of endpoints */
@@ -2000,8 +2230,8 @@ static struct pxa25x_udc memory = {
2000 .fifo_size = BULK_FIFO_SIZE, 2230 .fifo_size = BULK_FIFO_SIZE,
2001 .bEndpointAddress = USB_DIR_IN | 11, 2231 .bEndpointAddress = USB_DIR_IN | 11,
2002 .bmAttributes = USB_ENDPOINT_XFER_BULK, 2232 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2003 .reg_udccs = &UDCCS11, 2233 .regoff_udccs = UDCCS11,
2004 .reg_uddr = &UDDR11, 2234 .regoff_uddr = UDDR11,
2005 }, 2235 },
2006 .ep[12] = { 2236 .ep[12] = {
2007 .ep = { 2237 .ep = {
@@ -2015,9 +2245,9 @@ static struct pxa25x_udc memory = {
2015 .fifo_size = BULK_FIFO_SIZE, 2245 .fifo_size = BULK_FIFO_SIZE,
2016 .bEndpointAddress = 12, 2246 .bEndpointAddress = 12,
2017 .bmAttributes = USB_ENDPOINT_XFER_BULK, 2247 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2018 .reg_udccs = &UDCCS12, 2248 .regoff_udccs = UDCCS12,
2019 .reg_ubcr = &UBCR12, 2249 .regoff_ubcr = UBCR12,
2020 .reg_uddr = &UDDR12, 2250 .regoff_uddr = UDDR12,
2021 }, 2251 },
2022 .ep[13] = { 2252 .ep[13] = {
2023 .ep = { 2253 .ep = {
@@ -2031,8 +2261,8 @@ static struct pxa25x_udc memory = {
2031 .fifo_size = ISO_FIFO_SIZE, 2261 .fifo_size = ISO_FIFO_SIZE,
2032 .bEndpointAddress = USB_DIR_IN | 13, 2262 .bEndpointAddress = USB_DIR_IN | 13,
2033 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 2263 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2034 .reg_udccs = &UDCCS13, 2264 .regoff_udccs = UDCCS13,
2035 .reg_uddr = &UDDR13, 2265 .regoff_uddr = UDDR13,
2036 }, 2266 },
2037 .ep[14] = { 2267 .ep[14] = {
2038 .ep = { 2268 .ep = {
@@ -2046,9 +2276,9 @@ static struct pxa25x_udc memory = {
2046 .fifo_size = ISO_FIFO_SIZE, 2276 .fifo_size = ISO_FIFO_SIZE,
2047 .bEndpointAddress = 14, 2277 .bEndpointAddress = 14,
2048 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 2278 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2049 .reg_udccs = &UDCCS14, 2279 .regoff_udccs = UDCCS14,
2050 .reg_ubcr = &UBCR14, 2280 .regoff_ubcr = UBCR14,
2051 .reg_uddr = &UDDR14, 2281 .regoff_uddr = UDDR14,
2052 }, 2282 },
2053 .ep[15] = { 2283 .ep[15] = {
2054 .ep = { 2284 .ep = {
@@ -2061,8 +2291,8 @@ static struct pxa25x_udc memory = {
2061 .fifo_size = INT_FIFO_SIZE, 2291 .fifo_size = INT_FIFO_SIZE,
2062 .bEndpointAddress = USB_DIR_IN | 15, 2292 .bEndpointAddress = USB_DIR_IN | 15,
2063 .bmAttributes = USB_ENDPOINT_XFER_INT, 2293 .bmAttributes = USB_ENDPOINT_XFER_INT,
2064 .reg_udccs = &UDCCS15, 2294 .regoff_udccs = UDCCS15,
2065 .reg_uddr = &UDDR15, 2295 .regoff_uddr = UDDR15,
2066 }, 2296 },
2067#endif /* !CONFIG_USB_PXA25X_SMALL */ 2297#endif /* !CONFIG_USB_PXA25X_SMALL */
2068}; 2298};
@@ -2109,6 +2339,7 @@ static int pxa25x_udc_probe(struct platform_device *pdev)
2109 struct pxa25x_udc *dev = &memory; 2339 struct pxa25x_udc *dev = &memory;
2110 int retval, irq; 2340 int retval, irq;
2111 u32 chiprev; 2341 u32 chiprev;
2342 struct resource *res;
2112 2343
2113 pr_info("%s: version %s\n", driver_name, DRIVER_VERSION); 2344 pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
2114 2345
@@ -2154,6 +2385,11 @@ static int pxa25x_udc_probe(struct platform_device *pdev)
2154 if (irq < 0) 2385 if (irq < 0)
2155 return -ENODEV; 2386 return -ENODEV;
2156 2387
2388 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2389 dev->regs = devm_ioremap_resource(&pdev->dev, res);
2390 if (IS_ERR(dev->regs))
2391 return PTR_ERR(dev->regs);
2392
2157 dev->clk = devm_clk_get(&pdev->dev, NULL); 2393 dev->clk = devm_clk_get(&pdev->dev, NULL);
2158 if (IS_ERR(dev->clk)) 2394 if (IS_ERR(dev->clk))
2159 return PTR_ERR(dev->clk); 2395 return PTR_ERR(dev->clk);
diff --git a/drivers/usb/gadget/udc/pxa25x_udc.h b/drivers/usb/gadget/udc/pxa25x_udc.h
index 3fe5931dc21a..4b8b72d7ab37 100644
--- a/drivers/usb/gadget/udc/pxa25x_udc.h
+++ b/drivers/usb/gadget/udc/pxa25x_udc.h
@@ -56,9 +56,9 @@ struct pxa25x_ep {
56 * UDDR = UDC Endpoint Data Register (the fifo) 56 * UDDR = UDC Endpoint Data Register (the fifo)
57 * DRCM = DMA Request Channel Map 57 * DRCM = DMA Request Channel Map
58 */ 58 */
59 volatile u32 *reg_udccs; 59 u32 regoff_udccs;
60 volatile u32 *reg_ubcr; 60 u32 regoff_ubcr;
61 volatile u32 *reg_uddr; 61 u32 regoff_uddr;
62}; 62};
63 63
64struct pxa25x_request { 64struct pxa25x_request {
@@ -125,6 +125,7 @@ struct pxa25x_udc {
125#ifdef CONFIG_USB_GADGET_DEBUG_FS 125#ifdef CONFIG_USB_GADGET_DEBUG_FS
126 struct dentry *debugfs_udc; 126 struct dentry *debugfs_udc;
127#endif 127#endif
128 void __iomem *regs;
128}; 129};
129#define to_pxa25x(g) (container_of((g), struct pxa25x_udc, gadget)) 130#define to_pxa25x(g) (container_of((g), struct pxa25x_udc, gadget))
130 131
@@ -197,6 +198,8 @@ dump_udccs0(const char *label)
197 (udccs0 & UDCCS0_OPR) ? " opr" : ""); 198 (udccs0 & UDCCS0_OPR) ? " opr" : "");
198} 199}
199 200
201static inline u32 udc_ep_get_UDCCS(struct pxa25x_ep *);
202
200static void __maybe_unused 203static void __maybe_unused
201dump_state(struct pxa25x_udc *dev) 204dump_state(struct pxa25x_udc *dev)
202{ 205{
@@ -228,7 +231,7 @@ dump_state(struct pxa25x_udc *dev)
228 for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++) { 231 for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++) {
229 if (dev->ep[i].ep.desc == NULL) 232 if (dev->ep[i].ep.desc == NULL)
230 continue; 233 continue;
231 DMSG ("udccs%d = %02x\n", i, *dev->ep->reg_udccs); 234 DMSG ("udccs%d = %02x\n", i, udc_ep_get_UDCCS(&dev->ep[i]));
232 } 235 }
233} 236}
234 237
diff --git a/drivers/usb/gadget/udc/udc-core.c b/drivers/usb/gadget/udc/udc-core.c
index b86a6f03592e..4151597e9d28 100644
--- a/drivers/usb/gadget/udc/udc-core.c
+++ b/drivers/usb/gadget/udc/udc-core.c
@@ -443,6 +443,36 @@ err1:
443EXPORT_SYMBOL_GPL(usb_add_gadget_udc_release); 443EXPORT_SYMBOL_GPL(usb_add_gadget_udc_release);
444 444
445/** 445/**
446 * usb_get_gadget_udc_name - get the name of the first UDC controller
447 * This functions returns the name of the first UDC controller in the system.
448 * Please note that this interface is usefull only for legacy drivers which
449 * assume that there is only one UDC controller in the system and they need to
450 * get its name before initialization. There is no guarantee that the UDC
451 * of the returned name will be still available, when gadget driver registers
452 * itself.
453 *
454 * Returns pointer to string with UDC controller name on success, NULL
455 * otherwise. Caller should kfree() returned string.
456 */
457char *usb_get_gadget_udc_name(void)
458{
459 struct usb_udc *udc;
460 char *name = NULL;
461
462 /* For now we take the first available UDC */
463 mutex_lock(&udc_lock);
464 list_for_each_entry(udc, &udc_list, list) {
465 if (!udc->driver) {
466 name = kstrdup(udc->gadget->name, GFP_KERNEL);
467 break;
468 }
469 }
470 mutex_unlock(&udc_lock);
471 return name;
472}
473EXPORT_SYMBOL_GPL(usb_get_gadget_udc_name);
474
475/**
446 * usb_add_gadget_udc - adds a new gadget to the udc class driver list 476 * usb_add_gadget_udc - adds a new gadget to the udc class driver list
447 * @parent: the parent device to this udc. Usually the controller 477 * @parent: the parent device to this udc. Usually the controller
448 * driver's device. 478 * driver's device.
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 1f117c360ebb..3050b18b2447 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -5,6 +5,7 @@ comment "USB Host Controller Drivers"
5 5
6config USB_C67X00_HCD 6config USB_C67X00_HCD
7 tristate "Cypress C67x00 HCD support" 7 tristate "Cypress C67x00 HCD support"
8 depends on HAS_IOMEM
8 help 9 help
9 The Cypress C67x00 (EZ-Host/EZ-OTG) chips are dual-role 10 The Cypress C67x00 (EZ-Host/EZ-OTG) chips are dual-role
10 host/peripheral/OTG USB controllers. 11 host/peripheral/OTG USB controllers.
@@ -17,6 +18,7 @@ config USB_C67X00_HCD
17 18
18config USB_XHCI_HCD 19config USB_XHCI_HCD
19 tristate "xHCI HCD (USB 3.0) support" 20 tristate "xHCI HCD (USB 3.0) support"
21 depends on HAS_DMA && HAS_IOMEM
20 ---help--- 22 ---help---
21 The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0 23 The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0
22 "SuperSpeed" host controller hardware. 24 "SuperSpeed" host controller hardware.
@@ -53,6 +55,7 @@ config USB_XHCI_MTK
53config USB_XHCI_MVEBU 55config USB_XHCI_MVEBU
54 tristate "xHCI support for Marvell Armada 375/38x" 56 tristate "xHCI support for Marvell Armada 375/38x"
55 select USB_XHCI_PLATFORM 57 select USB_XHCI_PLATFORM
58 depends on HAS_IOMEM
56 depends on ARCH_MVEBU || COMPILE_TEST 59 depends on ARCH_MVEBU || COMPILE_TEST
57 ---help--- 60 ---help---
58 Say 'Y' to enable the support for the xHCI host controller 61 Say 'Y' to enable the support for the xHCI host controller
@@ -61,7 +64,7 @@ config USB_XHCI_MVEBU
61config USB_XHCI_RCAR 64config USB_XHCI_RCAR
62 tristate "xHCI support for Renesas R-Car SoCs" 65 tristate "xHCI support for Renesas R-Car SoCs"
63 select USB_XHCI_PLATFORM 66 select USB_XHCI_PLATFORM
64 depends on ARCH_SHMOBILE || COMPILE_TEST 67 depends on ARCH_RENESAS || COMPILE_TEST
65 ---help--- 68 ---help---
66 Say 'Y' to enable the support for the xHCI host controller 69 Say 'Y' to enable the support for the xHCI host controller
67 found in Renesas R-Car ARM SoCs. 70 found in Renesas R-Car ARM SoCs.
@@ -70,6 +73,7 @@ endif # USB_XHCI_HCD
70 73
71config USB_EHCI_HCD 74config USB_EHCI_HCD
72 tristate "EHCI HCD (USB 2.0) support" 75 tristate "EHCI HCD (USB 2.0) support"
76 depends on HAS_DMA && HAS_IOMEM
73 ---help--- 77 ---help---
74 The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0 78 The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0
75 "high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware. 79 "high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware.
@@ -121,9 +125,6 @@ config USB_EHCI_TT_NEWSCHED
121 125
122 If unsure, say Y. 126 If unsure, say Y.
123 127
124config USB_FSL_MPH_DR_OF
125 tristate
126
127if USB_EHCI_HCD 128if USB_EHCI_HCD
128 129
129config USB_EHCI_PCI 130config USB_EHCI_PCI
@@ -156,7 +157,6 @@ config USB_EHCI_FSL
156 tristate "Support for Freescale PPC on-chip EHCI USB controller" 157 tristate "Support for Freescale PPC on-chip EHCI USB controller"
157 depends on FSL_SOC 158 depends on FSL_SOC
158 select USB_EHCI_ROOT_HUB_TT 159 select USB_EHCI_ROOT_HUB_TT
159 select USB_FSL_MPH_DR_OF if OF
160 ---help--- 160 ---help---
161 Variation of ARC USB block used in some Freescale chips. 161 Variation of ARC USB block used in some Freescale chips.
162 162
@@ -328,6 +328,7 @@ endif # USB_EHCI_HCD
328 328
329config USB_OXU210HP_HCD 329config USB_OXU210HP_HCD
330 tristate "OXU210HP HCD support" 330 tristate "OXU210HP HCD support"
331 depends on HAS_IOMEM
331 ---help--- 332 ---help---
332 The OXU210HP is an USB host/OTG/device controller. Enable this 333 The OXU210HP is an USB host/OTG/device controller. Enable this
333 option if your board has this chip. If unsure, say N. 334 option if your board has this chip. If unsure, say N.
@@ -340,6 +341,7 @@ config USB_OXU210HP_HCD
340 341
341config USB_ISP116X_HCD 342config USB_ISP116X_HCD
342 tristate "ISP116X HCD support" 343 tristate "ISP116X HCD support"
344 depends on HAS_IOMEM
343 ---help--- 345 ---help---
344 The ISP1160 and ISP1161 chips are USB host controllers. Enable this 346 The ISP1160 and ISP1161 chips are USB host controllers. Enable this
345 option if your board has this chip. If unsure, say N. 347 option if your board has this chip. If unsure, say N.
@@ -351,6 +353,7 @@ config USB_ISP116X_HCD
351 353
352config USB_ISP1362_HCD 354config USB_ISP1362_HCD
353 tristate "ISP1362 HCD support" 355 tristate "ISP1362 HCD support"
356 depends on HAS_IOMEM
354 ---help--- 357 ---help---
355 Supports the Philips ISP1362 chip as a host controller 358 Supports the Philips ISP1362 chip as a host controller
356 359
@@ -361,7 +364,7 @@ config USB_ISP1362_HCD
361 364
362config USB_FOTG210_HCD 365config USB_FOTG210_HCD
363 tristate "FOTG210 HCD support" 366 tristate "FOTG210 HCD support"
364 depends on USB 367 depends on USB && HAS_DMA && HAS_IOMEM
365 ---help--- 368 ---help---
366 Faraday FOTG210 is an OTG controller which can be configured as 369 Faraday FOTG210 is an OTG controller which can be configured as
367 an USB2.0 host. It is designed to meet USB2.0 EHCI specification 370 an USB2.0 host. It is designed to meet USB2.0 EHCI specification
@@ -383,6 +386,7 @@ config USB_MAX3421_HCD
383 386
384config USB_OHCI_HCD 387config USB_OHCI_HCD
385 tristate "OHCI HCD (USB 1.1) support" 388 tristate "OHCI HCD (USB 1.1) support"
389 depends on HAS_DMA && HAS_IOMEM
386 ---help--- 390 ---help---
387 The Open Host Controller Interface (OHCI) is a standard for accessing 391 The Open Host Controller Interface (OHCI) is a standard for accessing
388 USB 1.1 host controller hardware. It does more in hardware than Intel's 392 USB 1.1 host controller hardware. It does more in hardware than Intel's
@@ -668,6 +672,7 @@ config USB_U132_HCD
668 672
669config USB_SL811_HCD 673config USB_SL811_HCD
670 tristate "SL811HS HCD support" 674 tristate "SL811HS HCD support"
675 depends on HAS_IOMEM
671 help 676 help
672 The SL811HS is a single-port USB controller that supports either 677 The SL811HS is a single-port USB controller that supports either
673 host side or peripheral side roles. Enable this option if your 678 host side or peripheral side roles. Enable this option if your
@@ -699,6 +704,7 @@ config USB_SL811_CS
699 704
700config USB_R8A66597_HCD 705config USB_R8A66597_HCD
701 tristate "R8A66597 HCD support" 706 tristate "R8A66597 HCD support"
707 depends on HAS_IOMEM
702 help 708 help
703 The R8A66597 is a USB 2.0 host and peripheral controller. 709 The R8A66597 is a USB 2.0 host and peripheral controller.
704 710
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 65a06b4382bf..a9ddd3c9ec94 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -74,7 +74,8 @@ obj-$(CONFIG_USB_U132_HCD) += u132-hcd.o
74obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o 74obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
75obj-$(CONFIG_USB_HWA_HCD) += hwa-hc.o 75obj-$(CONFIG_USB_HWA_HCD) += hwa-hc.o
76obj-$(CONFIG_USB_IMX21_HCD) += imx21-hcd.o 76obj-$(CONFIG_USB_IMX21_HCD) += imx21-hcd.o
77obj-$(CONFIG_USB_FSL_MPH_DR_OF) += fsl-mph-dr-of.o 77obj-$(CONFIG_USB_FSL_USB2) += fsl-mph-dr-of.o
78obj-$(CONFIG_USB_EHCI_FSL) += fsl-mph-dr-of.o
78obj-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o 79obj-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o
79obj-$(CONFIG_USB_HCD_BCMA) += bcma-hcd.o 80obj-$(CONFIG_USB_HCD_BCMA) += bcma-hcd.o
80obj-$(CONFIG_USB_HCD_SSB) += ssb-hcd.o 81obj-$(CONFIG_USB_HCD_SSB) += ssb-hcd.o
diff --git a/drivers/usb/host/bcma-hcd.c b/drivers/usb/host/bcma-hcd.c
index 291aaa2baed8..963e2d0e8f92 100644
--- a/drivers/usb/host/bcma-hcd.c
+++ b/drivers/usb/host/bcma-hcd.c
@@ -35,6 +35,7 @@ MODULE_DESCRIPTION("Common USB driver for BCMA Bus");
35MODULE_LICENSE("GPL"); 35MODULE_LICENSE("GPL");
36 36
37struct bcma_hcd_device { 37struct bcma_hcd_device {
38 struct bcma_device *core;
38 struct platform_device *ehci_dev; 39 struct platform_device *ehci_dev;
39 struct platform_device *ohci_dev; 40 struct platform_device *ohci_dev;
40 struct gpio_desc *gpio_desc; 41 struct gpio_desc *gpio_desc;
@@ -244,7 +245,10 @@ static const struct usb_ehci_pdata ehci_pdata = {
244static const struct usb_ohci_pdata ohci_pdata = { 245static const struct usb_ohci_pdata ohci_pdata = {
245}; 246};
246 247
247static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev, bool ohci, u32 addr) 248static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev,
249 const char *name, u32 addr,
250 const void *data,
251 size_t size)
248{ 252{
249 struct platform_device *hci_dev; 253 struct platform_device *hci_dev;
250 struct resource hci_res[2]; 254 struct resource hci_res[2];
@@ -259,8 +263,7 @@ static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev, boo
259 hci_res[1].start = dev->irq; 263 hci_res[1].start = dev->irq;
260 hci_res[1].flags = IORESOURCE_IRQ; 264 hci_res[1].flags = IORESOURCE_IRQ;
261 265
262 hci_dev = platform_device_alloc(ohci ? "ohci-platform" : 266 hci_dev = platform_device_alloc(name, 0);
263 "ehci-platform" , 0);
264 if (!hci_dev) 267 if (!hci_dev)
265 return ERR_PTR(-ENOMEM); 268 return ERR_PTR(-ENOMEM);
266 269
@@ -271,12 +274,8 @@ static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev, boo
271 ARRAY_SIZE(hci_res)); 274 ARRAY_SIZE(hci_res));
272 if (ret) 275 if (ret)
273 goto err_alloc; 276 goto err_alloc;
274 if (ohci) 277 if (data)
275 ret = platform_device_add_data(hci_dev, &ohci_pdata, 278 ret = platform_device_add_data(hci_dev, data, size);
276 sizeof(ohci_pdata));
277 else
278 ret = platform_device_add_data(hci_dev, &ehci_pdata,
279 sizeof(ehci_pdata));
280 if (ret) 279 if (ret)
281 goto err_alloc; 280 goto err_alloc;
282 ret = platform_device_add(hci_dev); 281 ret = platform_device_add(hci_dev);
@@ -290,31 +289,16 @@ err_alloc:
290 return ERR_PTR(ret); 289 return ERR_PTR(ret);
291} 290}
292 291
293static int bcma_hcd_probe(struct bcma_device *dev) 292static int bcma_hcd_usb20_init(struct bcma_hcd_device *usb_dev)
294{ 293{
295 int err; 294 struct bcma_device *dev = usb_dev->core;
295 struct bcma_chipinfo *chipinfo = &dev->bus->chipinfo;
296 u32 ohci_addr; 296 u32 ohci_addr;
297 struct bcma_hcd_device *usb_dev; 297 int err;
298 struct bcma_chipinfo *chipinfo;
299
300 chipinfo = &dev->bus->chipinfo;
301
302 /* TODO: Probably need checks here; is the core connected? */
303 298
304 if (dma_set_mask_and_coherent(dev->dma_dev, DMA_BIT_MASK(32))) 299 if (dma_set_mask_and_coherent(dev->dma_dev, DMA_BIT_MASK(32)))
305 return -EOPNOTSUPP; 300 return -EOPNOTSUPP;
306 301
307 usb_dev = devm_kzalloc(&dev->dev, sizeof(struct bcma_hcd_device),
308 GFP_KERNEL);
309 if (!usb_dev)
310 return -ENOMEM;
311
312 if (dev->dev.of_node)
313 usb_dev->gpio_desc = devm_get_gpiod_from_child(&dev->dev, "vcc",
314 &dev->dev.of_node->fwnode);
315 if (!IS_ERR_OR_NULL(usb_dev->gpio_desc))
316 gpiod_direction_output(usb_dev->gpio_desc, 1);
317
318 switch (dev->id.id) { 302 switch (dev->id.id) {
319 case BCMA_CORE_NS_USB20: 303 case BCMA_CORE_NS_USB20:
320 bcma_hcd_init_chip_arm(dev); 304 bcma_hcd_init_chip_arm(dev);
@@ -333,17 +317,20 @@ static int bcma_hcd_probe(struct bcma_device *dev)
333 && chipinfo->rev == 0) 317 && chipinfo->rev == 0)
334 ohci_addr = 0x18009000; 318 ohci_addr = 0x18009000;
335 319
336 usb_dev->ohci_dev = bcma_hcd_create_pdev(dev, true, ohci_addr); 320 usb_dev->ohci_dev = bcma_hcd_create_pdev(dev, "ohci-platform",
321 ohci_addr, &ohci_pdata,
322 sizeof(ohci_pdata));
337 if (IS_ERR(usb_dev->ohci_dev)) 323 if (IS_ERR(usb_dev->ohci_dev))
338 return PTR_ERR(usb_dev->ohci_dev); 324 return PTR_ERR(usb_dev->ohci_dev);
339 325
340 usb_dev->ehci_dev = bcma_hcd_create_pdev(dev, false, dev->addr); 326 usb_dev->ehci_dev = bcma_hcd_create_pdev(dev, "ehci-platform",
327 dev->addr, &ehci_pdata,
328 sizeof(ehci_pdata));
341 if (IS_ERR(usb_dev->ehci_dev)) { 329 if (IS_ERR(usb_dev->ehci_dev)) {
342 err = PTR_ERR(usb_dev->ehci_dev); 330 err = PTR_ERR(usb_dev->ehci_dev);
343 goto err_unregister_ohci_dev; 331 goto err_unregister_ohci_dev;
344 } 332 }
345 333
346 bcma_set_drvdata(dev, usb_dev);
347 return 0; 334 return 0;
348 335
349err_unregister_ohci_dev: 336err_unregister_ohci_dev:
@@ -351,6 +338,40 @@ err_unregister_ohci_dev:
351 return err; 338 return err;
352} 339}
353 340
341static int bcma_hcd_probe(struct bcma_device *core)
342{
343 int err;
344 struct bcma_hcd_device *usb_dev;
345
346 /* TODO: Probably need checks here; is the core connected? */
347
348 usb_dev = devm_kzalloc(&core->dev, sizeof(struct bcma_hcd_device),
349 GFP_KERNEL);
350 if (!usb_dev)
351 return -ENOMEM;
352 usb_dev->core = core;
353
354 if (core->dev.of_node)
355 usb_dev->gpio_desc = devm_get_gpiod_from_child(&core->dev, "vcc",
356 &core->dev.of_node->fwnode);
357 if (!IS_ERR_OR_NULL(usb_dev->gpio_desc))
358 gpiod_direction_output(usb_dev->gpio_desc, 1);
359
360 switch (core->id.id) {
361 case BCMA_CORE_USB20_HOST:
362 case BCMA_CORE_NS_USB20:
363 err = bcma_hcd_usb20_init(usb_dev);
364 if (err)
365 return err;
366 break;
367 default:
368 return -ENODEV;
369 }
370
371 bcma_set_drvdata(core, usb_dev);
372 return 0;
373}
374
354static void bcma_hcd_remove(struct bcma_device *dev) 375static void bcma_hcd_remove(struct bcma_device *dev)
355{ 376{
356 struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev); 377 struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c
index be0964a801e8..7440722bfbf0 100644
--- a/drivers/usb/host/ehci-atmel.c
+++ b/drivers/usb/host/ehci-atmel.c
@@ -185,8 +185,7 @@ static int ehci_atmel_drv_remove(struct platform_device *pdev)
185 return 0; 185 return 0;
186} 186}
187 187
188#ifdef CONFIG_PM 188static int __maybe_unused ehci_atmel_drv_suspend(struct device *dev)
189static int ehci_atmel_drv_suspend(struct device *dev)
190{ 189{
191 struct usb_hcd *hcd = dev_get_drvdata(dev); 190 struct usb_hcd *hcd = dev_get_drvdata(dev);
192 struct atmel_ehci_priv *atmel_ehci = hcd_to_atmel_ehci_priv(hcd); 191 struct atmel_ehci_priv *atmel_ehci = hcd_to_atmel_ehci_priv(hcd);
@@ -200,7 +199,7 @@ static int ehci_atmel_drv_suspend(struct device *dev)
200 return 0; 199 return 0;
201} 200}
202 201
203static int ehci_atmel_drv_resume(struct device *dev) 202static int __maybe_unused ehci_atmel_drv_resume(struct device *dev)
204{ 203{
205 struct usb_hcd *hcd = dev_get_drvdata(dev); 204 struct usb_hcd *hcd = dev_get_drvdata(dev);
206 struct atmel_ehci_priv *atmel_ehci = hcd_to_atmel_ehci_priv(hcd); 205 struct atmel_ehci_priv *atmel_ehci = hcd_to_atmel_ehci_priv(hcd);
@@ -208,7 +207,6 @@ static int ehci_atmel_drv_resume(struct device *dev)
208 atmel_start_clock(atmel_ehci); 207 atmel_start_clock(atmel_ehci);
209 return ehci_resume(hcd, false); 208 return ehci_resume(hcd, false);
210} 209}
211#endif
212 210
213#ifdef CONFIG_OF 211#ifdef CONFIG_OF
214static const struct of_device_id atmel_ehci_dt_ids[] = { 212static const struct of_device_id atmel_ehci_dt_ids[] = {
diff --git a/drivers/usb/host/ehci-dbg.c b/drivers/usb/host/ehci-dbg.c
index b7d623f1523c..79d12b2ba3c4 100644
--- a/drivers/usb/host/ehci-dbg.c
+++ b/drivers/usb/host/ehci-dbg.c
@@ -11,76 +11,73 @@
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details. 12 * for more details.
13 * 13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */ 14 */
18 15
19/* this file is part of ehci-hcd.c */ 16/* this file is part of ehci-hcd.c */
20 17
21#ifdef CONFIG_DYNAMIC_DEBUG 18#ifdef CONFIG_DYNAMIC_DEBUG
22 19
23/* check the values in the HCSPARAMS register 20/*
21 * check the values in the HCSPARAMS register
24 * (host controller _Structural_ parameters) 22 * (host controller _Structural_ parameters)
25 * see EHCI spec, Table 2-4 for each value 23 * see EHCI spec, Table 2-4 for each value
26 */ 24 */
27static void dbg_hcs_params (struct ehci_hcd *ehci, char *label) 25static void dbg_hcs_params(struct ehci_hcd *ehci, char *label)
28{ 26{
29 u32 params = ehci_readl(ehci, &ehci->caps->hcs_params); 27 u32 params = ehci_readl(ehci, &ehci->caps->hcs_params);
30 28
31 ehci_dbg (ehci, 29 ehci_dbg(ehci,
32 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n", 30 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
33 label, params, 31 label, params,
34 HCS_DEBUG_PORT (params), 32 HCS_DEBUG_PORT(params),
35 HCS_INDICATOR (params) ? " ind" : "", 33 HCS_INDICATOR(params) ? " ind" : "",
36 HCS_N_CC (params), 34 HCS_N_CC(params),
37 HCS_N_PCC (params), 35 HCS_N_PCC(params),
38 HCS_PORTROUTED (params) ? "" : " ordered", 36 HCS_PORTROUTED(params) ? "" : " ordered",
39 HCS_PPC (params) ? "" : " !ppc", 37 HCS_PPC(params) ? "" : " !ppc",
40 HCS_N_PORTS (params) 38 HCS_N_PORTS(params));
41 );
42 /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */ 39 /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
43 if (HCS_PORTROUTED (params)) { 40 if (HCS_PORTROUTED(params)) {
44 int i; 41 int i;
45 char buf [46], tmp [7], byte; 42 char buf[46], tmp[7], byte;
46 43
47 buf[0] = 0; 44 buf[0] = 0;
48 for (i = 0; i < HCS_N_PORTS (params); i++) { 45 for (i = 0; i < HCS_N_PORTS(params); i++) {
49 // FIXME MIPS won't readb() ... 46 /* FIXME MIPS won't readb() ... */
50 byte = readb (&ehci->caps->portroute[(i>>1)]); 47 byte = readb(&ehci->caps->portroute[(i >> 1)]);
51 sprintf(tmp, "%d ", 48 sprintf(tmp, "%d ",
52 ((i & 0x1) ? ((byte)&0xf) : ((byte>>4)&0xf))); 49 (i & 0x1) ? byte & 0xf : (byte >> 4) & 0xf);
53 strcat(buf, tmp); 50 strcat(buf, tmp);
54 } 51 }
55 ehci_dbg (ehci, "%s portroute %s\n", 52 ehci_dbg(ehci, "%s portroute %s\n", label, buf);
56 label, buf);
57 } 53 }
58} 54}
59#else 55#else
60 56
61static inline void dbg_hcs_params (struct ehci_hcd *ehci, char *label) {} 57static inline void dbg_hcs_params(struct ehci_hcd *ehci, char *label) {}
62 58
63#endif 59#endif
64 60
65#ifdef CONFIG_DYNAMIC_DEBUG 61#ifdef CONFIG_DYNAMIC_DEBUG
66 62
67/* check the values in the HCCPARAMS register 63/*
64 * check the values in the HCCPARAMS register
68 * (host controller _Capability_ parameters) 65 * (host controller _Capability_ parameters)
69 * see EHCI Spec, Table 2-5 for each value 66 * see EHCI Spec, Table 2-5 for each value
70 * */ 67 */
71static void dbg_hcc_params (struct ehci_hcd *ehci, char *label) 68static void dbg_hcc_params(struct ehci_hcd *ehci, char *label)
72{ 69{
73 u32 params = ehci_readl(ehci, &ehci->caps->hcc_params); 70 u32 params = ehci_readl(ehci, &ehci->caps->hcc_params);
74 71
75 if (HCC_ISOC_CACHE (params)) { 72 if (HCC_ISOC_CACHE(params)) {
76 ehci_dbg (ehci, 73 ehci_dbg(ehci,
77 "%s hcc_params %04x caching frame %s%s%s\n", 74 "%s hcc_params %04x caching frame %s%s%s\n",
78 label, params, 75 label, params,
79 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024", 76 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
80 HCC_CANPARK(params) ? " park" : "", 77 HCC_CANPARK(params) ? " park" : "",
81 HCC_64BIT_ADDR(params) ? " 64 bit addr" : ""); 78 HCC_64BIT_ADDR(params) ? " 64 bit addr" : "");
82 } else { 79 } else {
83 ehci_dbg (ehci, 80 ehci_dbg(ehci,
84 "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n", 81 "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n",
85 label, 82 label,
86 params, 83 params,
@@ -97,21 +94,21 @@ static void dbg_hcc_params (struct ehci_hcd *ehci, char *label)
97} 94}
98#else 95#else
99 96
100static inline void dbg_hcc_params (struct ehci_hcd *ehci, char *label) {} 97static inline void dbg_hcc_params(struct ehci_hcd *ehci, char *label) {}
101 98
102#endif 99#endif
103 100
104#ifdef CONFIG_DYNAMIC_DEBUG 101#ifdef CONFIG_DYNAMIC_DEBUG
105 102
106static void __maybe_unused 103static void __maybe_unused
107dbg_qtd (const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd) 104dbg_qtd(const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
108{ 105{
109 ehci_dbg(ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd, 106 ehci_dbg(ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
110 hc32_to_cpup(ehci, &qtd->hw_next), 107 hc32_to_cpup(ehci, &qtd->hw_next),
111 hc32_to_cpup(ehci, &qtd->hw_alt_next), 108 hc32_to_cpup(ehci, &qtd->hw_alt_next),
112 hc32_to_cpup(ehci, &qtd->hw_token), 109 hc32_to_cpup(ehci, &qtd->hw_token),
113 hc32_to_cpup(ehci, &qtd->hw_buf [0])); 110 hc32_to_cpup(ehci, &qtd->hw_buf[0]));
114 if (qtd->hw_buf [1]) 111 if (qtd->hw_buf[1])
115 ehci_dbg(ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n", 112 ehci_dbg(ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
116 hc32_to_cpup(ehci, &qtd->hw_buf[1]), 113 hc32_to_cpup(ehci, &qtd->hw_buf[1]),
117 hc32_to_cpup(ehci, &qtd->hw_buf[2]), 114 hc32_to_cpup(ehci, &qtd->hw_buf[2]),
@@ -120,22 +117,22 @@ dbg_qtd (const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
120} 117}
121 118
122static void __maybe_unused 119static void __maybe_unused
123dbg_qh (const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh) 120dbg_qh(const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
124{ 121{
125 struct ehci_qh_hw *hw = qh->hw; 122 struct ehci_qh_hw *hw = qh->hw;
126 123
127 ehci_dbg (ehci, "%s qh %p n%08x info %x %x qtd %x\n", label, 124 ehci_dbg(ehci, "%s qh %p n%08x info %x %x qtd %x\n", label,
128 qh, hw->hw_next, hw->hw_info1, hw->hw_info2, hw->hw_current); 125 qh, hw->hw_next, hw->hw_info1, hw->hw_info2, hw->hw_current);
129 dbg_qtd("overlay", ehci, (struct ehci_qtd *) &hw->hw_qtd_next); 126 dbg_qtd("overlay", ehci, (struct ehci_qtd *) &hw->hw_qtd_next);
130} 127}
131 128
132static void __maybe_unused 129static void __maybe_unused
133dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd) 130dbg_itd(const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
134{ 131{
135 ehci_dbg (ehci, "%s [%d] itd %p, next %08x, urb %p\n", 132 ehci_dbg(ehci, "%s [%d] itd %p, next %08x, urb %p\n",
136 label, itd->frame, itd, hc32_to_cpu(ehci, itd->hw_next), 133 label, itd->frame, itd, hc32_to_cpu(ehci, itd->hw_next),
137 itd->urb); 134 itd->urb);
138 ehci_dbg (ehci, 135 ehci_dbg(ehci,
139 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n", 136 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
140 hc32_to_cpu(ehci, itd->hw_transaction[0]), 137 hc32_to_cpu(ehci, itd->hw_transaction[0]),
141 hc32_to_cpu(ehci, itd->hw_transaction[1]), 138 hc32_to_cpu(ehci, itd->hw_transaction[1]),
@@ -145,7 +142,7 @@ dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
145 hc32_to_cpu(ehci, itd->hw_transaction[5]), 142 hc32_to_cpu(ehci, itd->hw_transaction[5]),
146 hc32_to_cpu(ehci, itd->hw_transaction[6]), 143 hc32_to_cpu(ehci, itd->hw_transaction[6]),
147 hc32_to_cpu(ehci, itd->hw_transaction[7])); 144 hc32_to_cpu(ehci, itd->hw_transaction[7]));
148 ehci_dbg (ehci, 145 ehci_dbg(ehci,
149 " buf: %08x %08x %08x %08x %08x %08x %08x\n", 146 " buf: %08x %08x %08x %08x %08x %08x %08x\n",
150 hc32_to_cpu(ehci, itd->hw_bufp[0]), 147 hc32_to_cpu(ehci, itd->hw_bufp[0]),
151 hc32_to_cpu(ehci, itd->hw_bufp[1]), 148 hc32_to_cpu(ehci, itd->hw_bufp[1]),
@@ -154,19 +151,19 @@ dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
154 hc32_to_cpu(ehci, itd->hw_bufp[4]), 151 hc32_to_cpu(ehci, itd->hw_bufp[4]),
155 hc32_to_cpu(ehci, itd->hw_bufp[5]), 152 hc32_to_cpu(ehci, itd->hw_bufp[5]),
156 hc32_to_cpu(ehci, itd->hw_bufp[6])); 153 hc32_to_cpu(ehci, itd->hw_bufp[6]));
157 ehci_dbg (ehci, " index: %d %d %d %d %d %d %d %d\n", 154 ehci_dbg(ehci, " index: %d %d %d %d %d %d %d %d\n",
158 itd->index[0], itd->index[1], itd->index[2], 155 itd->index[0], itd->index[1], itd->index[2],
159 itd->index[3], itd->index[4], itd->index[5], 156 itd->index[3], itd->index[4], itd->index[5],
160 itd->index[6], itd->index[7]); 157 itd->index[6], itd->index[7]);
161} 158}
162 159
163static void __maybe_unused 160static void __maybe_unused
164dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd) 161dbg_sitd(const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
165{ 162{
166 ehci_dbg (ehci, "%s [%d] sitd %p, next %08x, urb %p\n", 163 ehci_dbg(ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
167 label, sitd->frame, sitd, hc32_to_cpu(ehci, sitd->hw_next), 164 label, sitd->frame, sitd, hc32_to_cpu(ehci, sitd->hw_next),
168 sitd->urb); 165 sitd->urb);
169 ehci_dbg (ehci, 166 ehci_dbg(ehci,
170 " addr %08x sched %04x result %08x buf %08x %08x\n", 167 " addr %08x sched %04x result %08x buf %08x %08x\n",
171 hc32_to_cpu(ehci, sitd->hw_fullspeed_ep), 168 hc32_to_cpu(ehci, sitd->hw_fullspeed_ep),
172 hc32_to_cpu(ehci, sitd->hw_uframe), 169 hc32_to_cpu(ehci, sitd->hw_uframe),
@@ -176,11 +173,11 @@ dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
176} 173}
177 174
178static int __maybe_unused 175static int __maybe_unused
179dbg_status_buf (char *buf, unsigned len, const char *label, u32 status) 176dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
180{ 177{
181 return scnprintf (buf, len, 178 return scnprintf(buf, len,
182 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s", 179 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s",
183 label, label [0] ? " " : "", status, 180 label, label[0] ? " " : "", status,
184 (status & STS_PPCE_MASK) ? " PPCE" : "", 181 (status & STS_PPCE_MASK) ? " PPCE" : "",
185 (status & STS_ASS) ? " Async" : "", 182 (status & STS_ASS) ? " Async" : "",
186 (status & STS_PSS) ? " Periodic" : "", 183 (status & STS_PSS) ? " Periodic" : "",
@@ -191,79 +188,83 @@ dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
191 (status & STS_FLR) ? " FLR" : "", 188 (status & STS_FLR) ? " FLR" : "",
192 (status & STS_PCD) ? " PCD" : "", 189 (status & STS_PCD) ? " PCD" : "",
193 (status & STS_ERR) ? " ERR" : "", 190 (status & STS_ERR) ? " ERR" : "",
194 (status & STS_INT) ? " INT" : "" 191 (status & STS_INT) ? " INT" : "");
195 );
196} 192}
197 193
198static int __maybe_unused 194static int __maybe_unused
199dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable) 195dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
200{ 196{
201 return scnprintf (buf, len, 197 return scnprintf(buf, len,
202 "%s%sintrenable %02x%s%s%s%s%s%s%s", 198 "%s%sintrenable %02x%s%s%s%s%s%s%s",
203 label, label [0] ? " " : "", enable, 199 label, label[0] ? " " : "", enable,
204 (enable & STS_PPCE_MASK) ? " PPCE" : "", 200 (enable & STS_PPCE_MASK) ? " PPCE" : "",
205 (enable & STS_IAA) ? " IAA" : "", 201 (enable & STS_IAA) ? " IAA" : "",
206 (enable & STS_FATAL) ? " FATAL" : "", 202 (enable & STS_FATAL) ? " FATAL" : "",
207 (enable & STS_FLR) ? " FLR" : "", 203 (enable & STS_FLR) ? " FLR" : "",
208 (enable & STS_PCD) ? " PCD" : "", 204 (enable & STS_PCD) ? " PCD" : "",
209 (enable & STS_ERR) ? " ERR" : "", 205 (enable & STS_ERR) ? " ERR" : "",
210 (enable & STS_INT) ? " INT" : "" 206 (enable & STS_INT) ? " INT" : "");
211 );
212} 207}
213 208
214static const char *const fls_strings [] = 209static const char *const fls_strings[] = { "1024", "512", "256", "??" };
215 { "1024", "512", "256", "??" };
216 210
217static int 211static int
218dbg_command_buf (char *buf, unsigned len, const char *label, u32 command) 212dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
219{ 213{
220 return scnprintf (buf, len, 214 return scnprintf(buf, len,
221 "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s " 215 "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s "
222 "period=%s%s %s", 216 "period=%s%s %s",
223 label, label [0] ? " " : "", command, 217 label, label[0] ? " " : "", command,
224 (command & CMD_HIRD) ? " HIRD" : "", 218 (command & CMD_HIRD) ? " HIRD" : "",
225 (command & CMD_PPCEE) ? " PPCEE" : "", 219 (command & CMD_PPCEE) ? " PPCEE" : "",
226 (command & CMD_FSP) ? " FSP" : "", 220 (command & CMD_FSP) ? " FSP" : "",
227 (command & CMD_ASPE) ? " ASPE" : "", 221 (command & CMD_ASPE) ? " ASPE" : "",
228 (command & CMD_PSPE) ? " PSPE" : "", 222 (command & CMD_PSPE) ? " PSPE" : "",
229 (command & CMD_PARK) ? " park" : "(park)", 223 (command & CMD_PARK) ? " park" : "(park)",
230 CMD_PARK_CNT (command), 224 CMD_PARK_CNT(command),
231 (command >> 16) & 0x3f, 225 (command >> 16) & 0x3f,
232 (command & CMD_LRESET) ? " LReset" : "", 226 (command & CMD_LRESET) ? " LReset" : "",
233 (command & CMD_IAAD) ? " IAAD" : "", 227 (command & CMD_IAAD) ? " IAAD" : "",
234 (command & CMD_ASE) ? " Async" : "", 228 (command & CMD_ASE) ? " Async" : "",
235 (command & CMD_PSE) ? " Periodic" : "", 229 (command & CMD_PSE) ? " Periodic" : "",
236 fls_strings [(command >> 2) & 0x3], 230 fls_strings[(command >> 2) & 0x3],
237 (command & CMD_RESET) ? " Reset" : "", 231 (command & CMD_RESET) ? " Reset" : "",
238 (command & CMD_RUN) ? "RUN" : "HALT" 232 (command & CMD_RUN) ? "RUN" : "HALT");
239 );
240} 233}
241 234
242static int 235static int
243dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status) 236dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
244{ 237{
245 char *sig; 238 char *sig;
246 239
247 /* signaling state */ 240 /* signaling state */
248 switch (status & (3 << 10)) { 241 switch (status & (3 << 10)) {
249 case 0 << 10: sig = "se0"; break; 242 case 0 << 10:
250 case 1 << 10: sig = "k"; break; /* low speed */ 243 sig = "se0";
251 case 2 << 10: sig = "j"; break; 244 break;
252 default: sig = "?"; break; 245 case 1 << 10: /* low speed */
246 sig = "k";
247 break;
248 case 2 << 10:
249 sig = "j";
250 break;
251 default:
252 sig = "?";
253 break;
253 } 254 }
254 255
255 return scnprintf (buf, len, 256 return scnprintf(buf, len,
256 "%s%sport:%d status %06x %d %s%s%s%s%s%s " 257 "%s%sport:%d status %06x %d %s%s%s%s%s%s "
257 "sig=%s%s%s%s%s%s%s%s%s%s%s", 258 "sig=%s%s%s%s%s%s%s%s%s%s%s",
258 label, label [0] ? " " : "", port, status, 259 label, label[0] ? " " : "", port, status,
259 status>>25,/*device address */ 260 status >> 25, /*device address */
260 (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_ACK ? 261 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_ACK ?
261 " ACK" : "", 262 " ACK" : "",
262 (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_NYET ? 263 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_NYET ?
263 " NYET" : "", 264 " NYET" : "",
264 (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_STALL ? 265 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_STALL ?
265 " STALL" : "", 266 " STALL" : "",
266 (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_ERR ? 267 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_ERR ?
267 " ERR" : "", 268 " ERR" : "",
268 (status & PORT_POWER) ? " POWER" : "", 269 (status & PORT_POWER) ? " POWER" : "",
269 (status & PORT_OWNER) ? " OWNER" : "", 270 (status & PORT_OWNER) ? " OWNER" : "",
@@ -282,52 +283,68 @@ dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
282 283
283#else 284#else
284static inline void __maybe_unused 285static inline void __maybe_unused
285dbg_qh (char *label, struct ehci_hcd *ehci, struct ehci_qh *qh) 286dbg_qh(char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
286{} 287{}
287 288
288static inline int __maybe_unused 289static inline int __maybe_unused
289dbg_status_buf (char *buf, unsigned len, const char *label, u32 status) 290dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
290{ return 0; } 291{
292 return 0;
293}
291 294
292static inline int __maybe_unused 295static inline int __maybe_unused
293dbg_command_buf (char *buf, unsigned len, const char *label, u32 command) 296dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
294{ return 0; } 297{
298 return 0;
299}
295 300
296static inline int __maybe_unused 301static inline int __maybe_unused
297dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable) 302dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
298{ return 0; } 303{
304 return 0;
305}
299 306
300static inline int __maybe_unused 307static inline int __maybe_unused
301dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status) 308dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
302{ return 0; } 309{
310 return 0;
311}
303 312
304#endif /* CONFIG_DYNAMIC_DEBUG */ 313#endif /* CONFIG_DYNAMIC_DEBUG */
305 314
306/* functions have the "wrong" filename when they're output... */ 315static inline void
307#define dbg_status(ehci, label, status) { \ 316dbg_status(struct ehci_hcd *ehci, const char *label, u32 status)
308 char _buf [80]; \ 317{
309 dbg_status_buf (_buf, sizeof _buf, label, status); \ 318 char buf[80];
310 ehci_dbg (ehci, "%s\n", _buf); \ 319
320 dbg_status_buf(buf, sizeof(buf), label, status);
321 ehci_dbg(ehci, "%s\n", buf);
311} 322}
312 323
313#define dbg_cmd(ehci, label, command) { \ 324static inline void
314 char _buf [80]; \ 325dbg_cmd(struct ehci_hcd *ehci, const char *label, u32 command)
315 dbg_command_buf (_buf, sizeof _buf, label, command); \ 326{
316 ehci_dbg (ehci, "%s\n", _buf); \ 327 char buf[80];
328
329 dbg_command_buf(buf, sizeof(buf), label, command);
330 ehci_dbg(ehci, "%s\n", buf);
317} 331}
318 332
319#define dbg_port(ehci, label, port, status) { \ 333static inline void
320 char _buf [80]; \ 334dbg_port(struct ehci_hcd *ehci, const char *label, int port, u32 status)
321 dbg_port_buf (_buf, sizeof _buf, label, port, status); \ 335{
322 ehci_dbg (ehci, "%s\n", _buf); \ 336 char buf[80];
337
338 dbg_port_buf(buf, sizeof(buf), label, port, status);
339 ehci_dbg(ehci, "%s\n", buf);
323} 340}
324 341
325/*-------------------------------------------------------------------------*/ 342/*-------------------------------------------------------------------------*/
326 343
327#ifdef STUB_DEBUG_FILES 344#ifndef CONFIG_DYNAMIC_DEBUG
328 345
329static inline void create_debug_files (struct ehci_hcd *bus) { } 346static inline void create_debug_files(struct ehci_hcd *bus) { }
330static inline void remove_debug_files (struct ehci_hcd *bus) { } 347static inline void remove_debug_files(struct ehci_hcd *bus) { }
331 348
332#else 349#else
333 350
@@ -348,6 +365,7 @@ static const struct file_operations debug_async_fops = {
348 .release = debug_close, 365 .release = debug_close,
349 .llseek = default_llseek, 366 .llseek = default_llseek,
350}; 367};
368
351static const struct file_operations debug_bandwidth_fops = { 369static const struct file_operations debug_bandwidth_fops = {
352 .owner = THIS_MODULE, 370 .owner = THIS_MODULE,
353 .open = debug_bandwidth_open, 371 .open = debug_bandwidth_open,
@@ -355,6 +373,7 @@ static const struct file_operations debug_bandwidth_fops = {
355 .release = debug_close, 373 .release = debug_close,
356 .llseek = default_llseek, 374 .llseek = default_llseek,
357}; 375};
376
358static const struct file_operations debug_periodic_fops = { 377static const struct file_operations debug_periodic_fops = {
359 .owner = THIS_MODULE, 378 .owner = THIS_MODULE,
360 .open = debug_periodic_open, 379 .open = debug_periodic_open,
@@ -362,6 +381,7 @@ static const struct file_operations debug_periodic_fops = {
362 .release = debug_close, 381 .release = debug_close,
363 .llseek = default_llseek, 382 .llseek = default_llseek,
364}; 383};
384
365static const struct file_operations debug_registers_fops = { 385static const struct file_operations debug_registers_fops = {
366 .owner = THIS_MODULE, 386 .owner = THIS_MODULE,
367 .open = debug_registers_open, 387 .open = debug_registers_open,
@@ -381,13 +401,19 @@ struct debug_buffer {
381 size_t alloc_size; 401 size_t alloc_size;
382}; 402};
383 403
384#define speed_char(info1) ({ char tmp; \ 404static inline char speed_char(u32 info1)
385 switch (info1 & (3 << 12)) { \ 405{
386 case QH_FULL_SPEED: tmp = 'f'; break; \ 406 switch (info1 & (3 << 12)) {
387 case QH_LOW_SPEED: tmp = 'l'; break; \ 407 case QH_FULL_SPEED:
388 case QH_HIGH_SPEED: tmp = 'h'; break; \ 408 return 'f';
389 default: tmp = '?'; break; \ 409 case QH_LOW_SPEED:
390 } tmp; }) 410 return 'l';
411 case QH_HIGH_SPEED:
412 return 'h';
413 default:
414 return '?';
415 }
416}
391 417
392static inline char token_mark(struct ehci_hcd *ehci, __hc32 token) 418static inline char token_mark(struct ehci_hcd *ehci, __hc32 token)
393{ 419{
@@ -397,18 +423,14 @@ static inline char token_mark(struct ehci_hcd *ehci, __hc32 token)
397 return '*'; 423 return '*';
398 if (v & QTD_STS_HALT) 424 if (v & QTD_STS_HALT)
399 return '-'; 425 return '-';
400 if (!IS_SHORT_READ (v)) 426 if (!IS_SHORT_READ(v))
401 return ' '; 427 return ' ';
402 /* tries to advance through hw_alt_next */ 428 /* tries to advance through hw_alt_next */
403 return '/'; 429 return '/';
404} 430}
405 431
406static void qh_lines ( 432static void qh_lines(struct ehci_hcd *ehci, struct ehci_qh *qh,
407 struct ehci_hcd *ehci, 433 char **nextp, unsigned *sizep)
408 struct ehci_qh *qh,
409 char **nextp,
410 unsigned *sizep
411)
412{ 434{
413 u32 scratch; 435 u32 scratch;
414 u32 hw_curr; 436 u32 hw_curr;
@@ -435,7 +457,7 @@ static void qh_lines (
435 } 457 }
436 scratch = hc32_to_cpup(ehci, &hw->hw_info1); 458 scratch = hc32_to_cpup(ehci, &hw->hw_info1);
437 hw_curr = (mark == '*') ? hc32_to_cpup(ehci, &hw->hw_current) : 0; 459 hw_curr = (mark == '*') ? hc32_to_cpup(ehci, &hw->hw_current) : 0;
438 temp = scnprintf (next, size, 460 temp = scnprintf(next, size,
439 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)" 461 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)"
440 " [cur %08x next %08x buf[0] %08x]", 462 " [cur %08x next %08x buf[0] %08x]",
441 qh, scratch & 0x007f, 463 qh, scratch & 0x007f,
@@ -453,46 +475,52 @@ static void qh_lines (
453 next += temp; 475 next += temp;
454 476
455 /* hc may be modifying the list as we read it ... */ 477 /* hc may be modifying the list as we read it ... */
456 list_for_each (entry, &qh->qtd_list) { 478 list_for_each(entry, &qh->qtd_list) {
457 td = list_entry (entry, struct ehci_qtd, qtd_list); 479 char *type;
480
481 td = list_entry(entry, struct ehci_qtd, qtd_list);
458 scratch = hc32_to_cpup(ehci, &td->hw_token); 482 scratch = hc32_to_cpup(ehci, &td->hw_token);
459 mark = ' '; 483 mark = ' ';
460 if (hw_curr == td->qtd_dma) 484 if (hw_curr == td->qtd_dma) {
461 mark = '*'; 485 mark = '*';
462 else if (hw->hw_qtd_next == cpu_to_hc32(ehci, td->qtd_dma)) 486 } else if (hw->hw_qtd_next == cpu_to_hc32(ehci, td->qtd_dma)) {
463 mark = '+'; 487 mark = '+';
464 else if (QTD_LENGTH (scratch)) { 488 } else if (QTD_LENGTH(scratch)) {
465 if (td->hw_alt_next == ehci->async->hw->hw_alt_next) 489 if (td->hw_alt_next == ehci->async->hw->hw_alt_next)
466 mark = '#'; 490 mark = '#';
467 else if (td->hw_alt_next != list_end) 491 else if (td->hw_alt_next != list_end)
468 mark = '/'; 492 mark = '/';
469 } 493 }
470 temp = snprintf (next, size, 494 switch ((scratch >> 8) & 0x03) {
495 case 0:
496 type = "out";
497 break;
498 case 1:
499 type = "in";
500 break;
501 case 2:
502 type = "setup";
503 break;
504 default:
505 type = "?";
506 break;
507 }
508 temp = scnprintf(next, size,
471 "\n\t%p%c%s len=%d %08x urb %p" 509 "\n\t%p%c%s len=%d %08x urb %p"
472 " [td %08x buf[0] %08x]", 510 " [td %08x buf[0] %08x]",
473 td, mark, ({ char *tmp; 511 td, mark, type,
474 switch ((scratch>>8)&0x03) {
475 case 0: tmp = "out"; break;
476 case 1: tmp = "in"; break;
477 case 2: tmp = "setup"; break;
478 default: tmp = "?"; break;
479 } tmp;}),
480 (scratch >> 16) & 0x7fff, 512 (scratch >> 16) & 0x7fff,
481 scratch, 513 scratch,
482 td->urb, 514 td->urb,
483 (u32) td->qtd_dma, 515 (u32) td->qtd_dma,
484 hc32_to_cpup(ehci, &td->hw_buf[0])); 516 hc32_to_cpup(ehci, &td->hw_buf[0]));
485 if (size < temp)
486 temp = size;
487 size -= temp; 517 size -= temp;
488 next += temp; 518 next += temp;
489 if (temp == size) 519 if (temp == size)
490 goto done; 520 goto done;
491 } 521 }
492 522
493 temp = snprintf (next, size, "\n"); 523 temp = scnprintf(next, size, "\n");
494 if (size < temp)
495 temp = size;
496 size -= temp; 524 size -= temp;
497 next += temp; 525 next += temp;
498 526
@@ -511,19 +539,20 @@ static ssize_t fill_async_buffer(struct debug_buffer *buf)
511 struct ehci_qh *qh; 539 struct ehci_qh *qh;
512 540
513 hcd = bus_to_hcd(buf->bus); 541 hcd = bus_to_hcd(buf->bus);
514 ehci = hcd_to_ehci (hcd); 542 ehci = hcd_to_ehci(hcd);
515 next = buf->output_buf; 543 next = buf->output_buf;
516 size = buf->alloc_size; 544 size = buf->alloc_size;
517 545
518 *next = 0; 546 *next = 0;
519 547
520 /* dumps a snapshot of the async schedule. 548 /*
549 * dumps a snapshot of the async schedule.
521 * usually empty except for long-term bulk reads, or head. 550 * usually empty except for long-term bulk reads, or head.
522 * one QH per line, and TDs we know about 551 * one QH per line, and TDs we know about
523 */ 552 */
524 spin_lock_irqsave (&ehci->lock, flags); 553 spin_lock_irqsave(&ehci->lock, flags);
525 for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh) 554 for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
526 qh_lines (ehci, qh, &next, &size); 555 qh_lines(ehci, qh, &next, &size);
527 if (!list_empty(&ehci->async_unlink) && size > 0) { 556 if (!list_empty(&ehci->async_unlink) && size > 0) {
528 temp = scnprintf(next, size, "\nunlink =\n"); 557 temp = scnprintf(next, size, "\nunlink =\n");
529 size -= temp; 558 size -= temp;
@@ -535,7 +564,7 @@ static ssize_t fill_async_buffer(struct debug_buffer *buf)
535 qh_lines(ehci, qh, &next, &size); 564 qh_lines(ehci, qh, &next, &size);
536 } 565 }
537 } 566 }
538 spin_unlock_irqrestore (&ehci->lock, flags); 567 spin_unlock_irqrestore(&ehci->lock, flags);
539 568
540 return strlen(buf->output_buf); 569 return strlen(buf->output_buf);
541} 570}
@@ -623,6 +652,33 @@ static ssize_t fill_bandwidth_buffer(struct debug_buffer *buf)
623 return next - buf->output_buf; 652 return next - buf->output_buf;
624} 653}
625 654
655static unsigned output_buf_tds_dir(char *buf, struct ehci_hcd *ehci,
656 struct ehci_qh_hw *hw, struct ehci_qh *qh, unsigned size)
657{
658 u32 scratch = hc32_to_cpup(ehci, &hw->hw_info1);
659 struct ehci_qtd *qtd;
660 char *type = "";
661 unsigned temp = 0;
662
663 /* count tds, get ep direction */
664 list_for_each_entry(qtd, &qh->qtd_list, qtd_list) {
665 temp++;
666 switch ((hc32_to_cpu(ehci, qtd->hw_token) >> 8) & 0x03) {
667 case 0:
668 type = "out";
669 continue;
670 case 1:
671 type = "in";
672 continue;
673 }
674 }
675
676 return scnprintf(buf, size, " (%c%d ep%d%s [%d/%d] q%d p%d)",
677 speed_char(scratch), scratch & 0x007f,
678 (scratch >> 8) & 0x000f, type, qh->ps.usecs,
679 qh->ps.c_usecs, temp, 0x7ff & (scratch >> 16));
680}
681
626#define DBG_SCHED_LIMIT 64 682#define DBG_SCHED_LIMIT 64
627static ssize_t fill_periodic_buffer(struct debug_buffer *buf) 683static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
628{ 684{
@@ -635,31 +691,32 @@ static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
635 unsigned i; 691 unsigned i;
636 __hc32 tag; 692 __hc32 tag;
637 693
638 seen = kmalloc(DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC); 694 seen = kmalloc_array(DBG_SCHED_LIMIT, sizeof(*seen), GFP_ATOMIC);
639 if (!seen) 695 if (!seen)
640 return 0; 696 return 0;
641 seen_count = 0; 697 seen_count = 0;
642 698
643 hcd = bus_to_hcd(buf->bus); 699 hcd = bus_to_hcd(buf->bus);
644 ehci = hcd_to_ehci (hcd); 700 ehci = hcd_to_ehci(hcd);
645 next = buf->output_buf; 701 next = buf->output_buf;
646 size = buf->alloc_size; 702 size = buf->alloc_size;
647 703
648 temp = scnprintf (next, size, "size = %d\n", ehci->periodic_size); 704 temp = scnprintf(next, size, "size = %d\n", ehci->periodic_size);
649 size -= temp; 705 size -= temp;
650 next += temp; 706 next += temp;
651 707
652 /* dump a snapshot of the periodic schedule. 708 /*
709 * dump a snapshot of the periodic schedule.
653 * iso changes, interrupt usually doesn't. 710 * iso changes, interrupt usually doesn't.
654 */ 711 */
655 spin_lock_irqsave (&ehci->lock, flags); 712 spin_lock_irqsave(&ehci->lock, flags);
656 for (i = 0; i < ehci->periodic_size; i++) { 713 for (i = 0; i < ehci->periodic_size; i++) {
657 p = ehci->pshadow [i]; 714 p = ehci->pshadow[i];
658 if (likely (!p.ptr)) 715 if (likely(!p.ptr))
659 continue; 716 continue;
660 tag = Q_NEXT_TYPE(ehci, ehci->periodic [i]); 717 tag = Q_NEXT_TYPE(ehci, ehci->periodic[i]);
661 718
662 temp = scnprintf (next, size, "%4d: ", i); 719 temp = scnprintf(next, size, "%4d: ", i);
663 size -= temp; 720 size -= temp;
664 next += temp; 721 next += temp;
665 722
@@ -669,7 +726,7 @@ static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
669 switch (hc32_to_cpu(ehci, tag)) { 726 switch (hc32_to_cpu(ehci, tag)) {
670 case Q_TYPE_QH: 727 case Q_TYPE_QH:
671 hw = p.qh->hw; 728 hw = p.qh->hw;
672 temp = scnprintf (next, size, " qh%d-%04x/%p", 729 temp = scnprintf(next, size, " qh%d-%04x/%p",
673 p.qh->ps.period, 730 p.qh->ps.period,
674 hc32_to_cpup(ehci, 731 hc32_to_cpup(ehci,
675 &hw->hw_info2) 732 &hw->hw_info2)
@@ -680,10 +737,10 @@ static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
680 next += temp; 737 next += temp;
681 /* don't repeat what follows this qh */ 738 /* don't repeat what follows this qh */
682 for (temp = 0; temp < seen_count; temp++) { 739 for (temp = 0; temp < seen_count; temp++) {
683 if (seen [temp].ptr != p.ptr) 740 if (seen[temp].ptr != p.ptr)
684 continue; 741 continue;
685 if (p.qh->qh_next.ptr) { 742 if (p.qh->qh_next.ptr) {
686 temp = scnprintf (next, size, 743 temp = scnprintf(next, size,
687 " ..."); 744 " ...");
688 size -= temp; 745 size -= temp;
689 next += temp; 746 next += temp;
@@ -692,58 +749,32 @@ static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
692 } 749 }
693 /* show more info the first time around */ 750 /* show more info the first time around */
694 if (temp == seen_count) { 751 if (temp == seen_count) {
695 u32 scratch = hc32_to_cpup(ehci, 752 temp = output_buf_tds_dir(next, ehci,
696 &hw->hw_info1); 753 hw, p.qh, size);
697 struct ehci_qtd *qtd;
698 char *type = "";
699
700 /* count tds, get ep direction */
701 temp = 0;
702 list_for_each_entry (qtd,
703 &p.qh->qtd_list,
704 qtd_list) {
705 temp++;
706 switch (0x03 & (hc32_to_cpu(
707 ehci,
708 qtd->hw_token) >> 8)) {
709 case 0: type = "out"; continue;
710 case 1: type = "in"; continue;
711 }
712 }
713
714 temp = scnprintf (next, size,
715 " (%c%d ep%d%s "
716 "[%d/%d] q%d p%d)",
717 speed_char (scratch),
718 scratch & 0x007f,
719 (scratch >> 8) & 0x000f, type,
720 p.qh->ps.usecs,
721 p.qh->ps.c_usecs,
722 temp,
723 0x7ff & (scratch >> 16));
724 754
725 if (seen_count < DBG_SCHED_LIMIT) 755 if (seen_count < DBG_SCHED_LIMIT)
726 seen [seen_count++].qh = p.qh; 756 seen[seen_count++].qh = p.qh;
727 } else 757 } else {
728 temp = 0; 758 temp = 0;
759 }
729 tag = Q_NEXT_TYPE(ehci, hw->hw_next); 760 tag = Q_NEXT_TYPE(ehci, hw->hw_next);
730 p = p.qh->qh_next; 761 p = p.qh->qh_next;
731 break; 762 break;
732 case Q_TYPE_FSTN: 763 case Q_TYPE_FSTN:
733 temp = scnprintf (next, size, 764 temp = scnprintf(next, size,
734 " fstn-%8x/%p", p.fstn->hw_prev, 765 " fstn-%8x/%p", p.fstn->hw_prev,
735 p.fstn); 766 p.fstn);
736 tag = Q_NEXT_TYPE(ehci, p.fstn->hw_next); 767 tag = Q_NEXT_TYPE(ehci, p.fstn->hw_next);
737 p = p.fstn->fstn_next; 768 p = p.fstn->fstn_next;
738 break; 769 break;
739 case Q_TYPE_ITD: 770 case Q_TYPE_ITD:
740 temp = scnprintf (next, size, 771 temp = scnprintf(next, size,
741 " itd/%p", p.itd); 772 " itd/%p", p.itd);
742 tag = Q_NEXT_TYPE(ehci, p.itd->hw_next); 773 tag = Q_NEXT_TYPE(ehci, p.itd->hw_next);
743 p = p.itd->itd_next; 774 p = p.itd->itd_next;
744 break; 775 break;
745 case Q_TYPE_SITD: 776 case Q_TYPE_SITD:
746 temp = scnprintf (next, size, 777 temp = scnprintf(next, size,
747 " sitd%d-%04x/%p", 778 " sitd%d-%04x/%p",
748 p.sitd->stream->ps.period, 779 p.sitd->stream->ps.period,
749 hc32_to_cpup(ehci, &p.sitd->hw_uframe) 780 hc32_to_cpup(ehci, &p.sitd->hw_uframe)
@@ -757,12 +788,12 @@ static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
757 next += temp; 788 next += temp;
758 } while (p.ptr); 789 } while (p.ptr);
759 790
760 temp = scnprintf (next, size, "\n"); 791 temp = scnprintf(next, size, "\n");
761 size -= temp; 792 size -= temp;
762 next += temp; 793 next += temp;
763 } 794 }
764 spin_unlock_irqrestore (&ehci->lock, flags); 795 spin_unlock_irqrestore(&ehci->lock, flags);
765 kfree (seen); 796 kfree(seen);
766 797
767 return buf->alloc_size - size; 798 return buf->alloc_size - size;
768} 799}
@@ -789,19 +820,19 @@ static ssize_t fill_registers_buffer(struct debug_buffer *buf)
789 struct ehci_hcd *ehci; 820 struct ehci_hcd *ehci;
790 unsigned long flags; 821 unsigned long flags;
791 unsigned temp, size, i; 822 unsigned temp, size, i;
792 char *next, scratch [80]; 823 char *next, scratch[80];
793 static char fmt [] = "%*s\n"; 824 static char fmt[] = "%*s\n";
794 static char label [] = ""; 825 static char label[] = "";
795 826
796 hcd = bus_to_hcd(buf->bus); 827 hcd = bus_to_hcd(buf->bus);
797 ehci = hcd_to_ehci (hcd); 828 ehci = hcd_to_ehci(hcd);
798 next = buf->output_buf; 829 next = buf->output_buf;
799 size = buf->alloc_size; 830 size = buf->alloc_size;
800 831
801 spin_lock_irqsave (&ehci->lock, flags); 832 spin_lock_irqsave(&ehci->lock, flags);
802 833
803 if (!HCD_HW_ACCESSIBLE(hcd)) { 834 if (!HCD_HW_ACCESSIBLE(hcd)) {
804 size = scnprintf (next, size, 835 size = scnprintf(next, size,
805 "bus %s, device %s\n" 836 "bus %s, device %s\n"
806 "%s\n" 837 "%s\n"
807 "SUSPENDED (no register access)\n", 838 "SUSPENDED (no register access)\n",
@@ -813,7 +844,7 @@ static ssize_t fill_registers_buffer(struct debug_buffer *buf)
813 844
814 /* Capability Registers */ 845 /* Capability Registers */
815 i = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase)); 846 i = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
816 temp = scnprintf (next, size, 847 temp = scnprintf(next, size,
817 "bus %s, device %s\n" 848 "bus %s, device %s\n"
818 "%s\n" 849 "%s\n"
819 "EHCI %x.%02x, rh state %s\n", 850 "EHCI %x.%02x, rh state %s\n",
@@ -829,16 +860,16 @@ static ssize_t fill_registers_buffer(struct debug_buffer *buf)
829 if (dev_is_pci(hcd->self.controller)) { 860 if (dev_is_pci(hcd->self.controller)) {
830 struct pci_dev *pdev; 861 struct pci_dev *pdev;
831 u32 offset, cap, cap2; 862 u32 offset, cap, cap2;
832 unsigned count = 256/4; 863 unsigned count = 256 / 4;
833 864
834 pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller); 865 pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
835 offset = HCC_EXT_CAPS(ehci_readl(ehci, 866 offset = HCC_EXT_CAPS(ehci_readl(ehci,
836 &ehci->caps->hcc_params)); 867 &ehci->caps->hcc_params));
837 while (offset && count--) { 868 while (offset && count--) {
838 pci_read_config_dword (pdev, offset, &cap); 869 pci_read_config_dword(pdev, offset, &cap);
839 switch (cap & 0xff) { 870 switch (cap & 0xff) {
840 case 1: 871 case 1:
841 temp = scnprintf (next, size, 872 temp = scnprintf(next, size,
842 "ownership %08x%s%s\n", cap, 873 "ownership %08x%s%s\n", cap,
843 (cap & (1 << 24)) ? " linux" : "", 874 (cap & (1 << 24)) ? " linux" : "",
844 (cap & (1 << 16)) ? " firmware" : ""); 875 (cap & (1 << 16)) ? " firmware" : "");
@@ -846,8 +877,8 @@ static ssize_t fill_registers_buffer(struct debug_buffer *buf)
846 next += temp; 877 next += temp;
847 878
848 offset += 4; 879 offset += 4;
849 pci_read_config_dword (pdev, offset, &cap2); 880 pci_read_config_dword(pdev, offset, &cap2);
850 temp = scnprintf (next, size, 881 temp = scnprintf(next, size,
851 "SMI sts/enable 0x%08x\n", cap2); 882 "SMI sts/enable 0x%08x\n", cap2);
852 size -= temp; 883 size -= temp;
853 next += temp; 884 next += temp;
@@ -863,50 +894,50 @@ static ssize_t fill_registers_buffer(struct debug_buffer *buf)
863 } 894 }
864#endif 895#endif
865 896
866 // FIXME interpret both types of params 897 /* FIXME interpret both types of params */
867 i = ehci_readl(ehci, &ehci->caps->hcs_params); 898 i = ehci_readl(ehci, &ehci->caps->hcs_params);
868 temp = scnprintf (next, size, "structural params 0x%08x\n", i); 899 temp = scnprintf(next, size, "structural params 0x%08x\n", i);
869 size -= temp; 900 size -= temp;
870 next += temp; 901 next += temp;
871 902
872 i = ehci_readl(ehci, &ehci->caps->hcc_params); 903 i = ehci_readl(ehci, &ehci->caps->hcc_params);
873 temp = scnprintf (next, size, "capability params 0x%08x\n", i); 904 temp = scnprintf(next, size, "capability params 0x%08x\n", i);
874 size -= temp; 905 size -= temp;
875 next += temp; 906 next += temp;
876 907
877 /* Operational Registers */ 908 /* Operational Registers */
878 temp = dbg_status_buf (scratch, sizeof scratch, label, 909 temp = dbg_status_buf(scratch, sizeof(scratch), label,
879 ehci_readl(ehci, &ehci->regs->status)); 910 ehci_readl(ehci, &ehci->regs->status));
880 temp = scnprintf (next, size, fmt, temp, scratch); 911 temp = scnprintf(next, size, fmt, temp, scratch);
881 size -= temp; 912 size -= temp;
882 next += temp; 913 next += temp;
883 914
884 temp = dbg_command_buf (scratch, sizeof scratch, label, 915 temp = dbg_command_buf(scratch, sizeof(scratch), label,
885 ehci_readl(ehci, &ehci->regs->command)); 916 ehci_readl(ehci, &ehci->regs->command));
886 temp = scnprintf (next, size, fmt, temp, scratch); 917 temp = scnprintf(next, size, fmt, temp, scratch);
887 size -= temp; 918 size -= temp;
888 next += temp; 919 next += temp;
889 920
890 temp = dbg_intr_buf (scratch, sizeof scratch, label, 921 temp = dbg_intr_buf(scratch, sizeof(scratch), label,
891 ehci_readl(ehci, &ehci->regs->intr_enable)); 922 ehci_readl(ehci, &ehci->regs->intr_enable));
892 temp = scnprintf (next, size, fmt, temp, scratch); 923 temp = scnprintf(next, size, fmt, temp, scratch);
893 size -= temp; 924 size -= temp;
894 next += temp; 925 next += temp;
895 926
896 temp = scnprintf (next, size, "uframe %04x\n", 927 temp = scnprintf(next, size, "uframe %04x\n",
897 ehci_read_frame_index(ehci)); 928 ehci_read_frame_index(ehci));
898 size -= temp; 929 size -= temp;
899 next += temp; 930 next += temp;
900 931
901 for (i = 1; i <= HCS_N_PORTS (ehci->hcs_params); i++) { 932 for (i = 1; i <= HCS_N_PORTS(ehci->hcs_params); i++) {
902 temp = dbg_port_buf (scratch, sizeof scratch, label, i, 933 temp = dbg_port_buf(scratch, sizeof(scratch), label, i,
903 ehci_readl(ehci, 934 ehci_readl(ehci,
904 &ehci->regs->port_status[i - 1])); 935 &ehci->regs->port_status[i - 1]));
905 temp = scnprintf (next, size, fmt, temp, scratch); 936 temp = scnprintf(next, size, fmt, temp, scratch);
906 size -= temp; 937 size -= temp;
907 next += temp; 938 next += temp;
908 if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) { 939 if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
909 temp = scnprintf (next, size, 940 temp = scnprintf(next, size,
910 " debug control %08x\n", 941 " debug control %08x\n",
911 ehci_readl(ehci, 942 ehci_readl(ehci,
912 &ehci->debug->control)); 943 &ehci->debug->control));
@@ -924,31 +955,31 @@ static ssize_t fill_registers_buffer(struct debug_buffer *buf)
924 } 955 }
925 956
926#ifdef EHCI_STATS 957#ifdef EHCI_STATS
927 temp = scnprintf (next, size, 958 temp = scnprintf(next, size,
928 "irq normal %ld err %ld iaa %ld (lost %ld)\n", 959 "irq normal %ld err %ld iaa %ld (lost %ld)\n",
929 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa, 960 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
930 ehci->stats.lost_iaa); 961 ehci->stats.lost_iaa);
931 size -= temp; 962 size -= temp;
932 next += temp; 963 next += temp;
933 964
934 temp = scnprintf (next, size, "complete %ld unlink %ld\n", 965 temp = scnprintf(next, size, "complete %ld unlink %ld\n",
935 ehci->stats.complete, ehci->stats.unlink); 966 ehci->stats.complete, ehci->stats.unlink);
936 size -= temp; 967 size -= temp;
937 next += temp; 968 next += temp;
938#endif 969#endif
939 970
940done: 971done:
941 spin_unlock_irqrestore (&ehci->lock, flags); 972 spin_unlock_irqrestore(&ehci->lock, flags);
942 973
943 return buf->alloc_size - size; 974 return buf->alloc_size - size;
944} 975}
945 976
946static struct debug_buffer *alloc_buffer(struct usb_bus *bus, 977static struct debug_buffer *alloc_buffer(struct usb_bus *bus,
947 ssize_t (*fill_func)(struct debug_buffer *)) 978 ssize_t (*fill_func)(struct debug_buffer *))
948{ 979{
949 struct debug_buffer *buf; 980 struct debug_buffer *buf;
950 981
951 buf = kzalloc(sizeof(struct debug_buffer), GFP_KERNEL); 982 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
952 983
953 if (buf) { 984 if (buf) {
954 buf->bus = bus; 985 buf->bus = bus;
@@ -984,7 +1015,7 @@ out:
984} 1015}
985 1016
986static ssize_t debug_output(struct file *file, char __user *user_buf, 1017static ssize_t debug_output(struct file *file, char __user *user_buf,
987 size_t len, loff_t *offset) 1018 size_t len, loff_t *offset)
988{ 1019{
989 struct debug_buffer *buf = file->private_data; 1020 struct debug_buffer *buf = file->private_data;
990 int ret = 0; 1021 int ret = 0;
@@ -1004,7 +1035,6 @@ static ssize_t debug_output(struct file *file, char __user *user_buf,
1004 1035
1005out: 1036out:
1006 return ret; 1037 return ret;
1007
1008} 1038}
1009 1039
1010static int debug_close(struct inode *inode, struct file *file) 1040static int debug_close(struct inode *inode, struct file *file)
@@ -1037,11 +1067,12 @@ static int debug_bandwidth_open(struct inode *inode, struct file *file)
1037static int debug_periodic_open(struct inode *inode, struct file *file) 1067static int debug_periodic_open(struct inode *inode, struct file *file)
1038{ 1068{
1039 struct debug_buffer *buf; 1069 struct debug_buffer *buf;
1070
1040 buf = alloc_buffer(inode->i_private, fill_periodic_buffer); 1071 buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
1041 if (!buf) 1072 if (!buf)
1042 return -ENOMEM; 1073 return -ENOMEM;
1043 1074
1044 buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8)*PAGE_SIZE; 1075 buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8) * PAGE_SIZE;
1045 file->private_data = buf; 1076 file->private_data = buf;
1046 return 0; 1077 return 0;
1047} 1078}
@@ -1054,7 +1085,7 @@ static int debug_registers_open(struct inode *inode, struct file *file)
1054 return file->private_data ? 0 : -ENOMEM; 1085 return file->private_data ? 0 : -ENOMEM;
1055} 1086}
1056 1087
1057static inline void create_debug_files (struct ehci_hcd *ehci) 1088static inline void create_debug_files(struct ehci_hcd *ehci)
1058{ 1089{
1059 struct usb_bus *bus = &ehci_to_hcd(ehci)->self; 1090 struct usb_bus *bus = &ehci_to_hcd(ehci)->self;
1060 1091
@@ -1084,9 +1115,9 @@ file_error:
1084 debugfs_remove_recursive(ehci->debug_dir); 1115 debugfs_remove_recursive(ehci->debug_dir);
1085} 1116}
1086 1117
1087static inline void remove_debug_files (struct ehci_hcd *ehci) 1118static inline void remove_debug_files(struct ehci_hcd *ehci)
1088{ 1119{
1089 debugfs_remove_recursive(ehci->debug_dir); 1120 debugfs_remove_recursive(ehci->debug_dir);
1090} 1121}
1091 1122
1092#endif /* STUB_DEBUG_FILES */ 1123#endif /* CONFIG_DYNAMIC_DEBUG */
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 3b6eb219de1a..9f5ffb629973 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -35,6 +35,7 @@
35#include <linux/usb/otg.h> 35#include <linux/usb/otg.h>
36#include <linux/platform_device.h> 36#include <linux/platform_device.h>
37#include <linux/fsl_devices.h> 37#include <linux/fsl_devices.h>
38#include <linux/of_platform.h>
38 39
39#include "ehci.h" 40#include "ehci.h"
40#include "ehci-fsl.h" 41#include "ehci-fsl.h"
@@ -241,7 +242,8 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
241 * to portsc 242 * to portsc
242 */ 243 */
243 if (pdata->check_phy_clk_valid) { 244 if (pdata->check_phy_clk_valid) {
244 if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID)) { 245 if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) &
246 PHY_CLK_VALID)) {
245 dev_warn(hcd->self.controller, 247 dev_warn(hcd->self.controller,
246 "USB PHY clock invalid\n"); 248 "USB PHY clock invalid\n");
247 return -EINVAL; 249 return -EINVAL;
@@ -273,9 +275,11 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
273 275
274 /* Setup Snooping for all the 4GB space */ 276 /* Setup Snooping for all the 4GB space */
275 /* SNOOP1 starts from 0x0, size 2G */ 277 /* SNOOP1 starts from 0x0, size 2G */
276 out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB); 278 iowrite32be(0x0 | SNOOP_SIZE_2GB,
279 non_ehci + FSL_SOC_USB_SNOOP1);
277 /* SNOOP2 starts from 0x80000000, size 2G */ 280 /* SNOOP2 starts from 0x80000000, size 2G */
278 out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB); 281 iowrite32be(0x80000000 | SNOOP_SIZE_2GB,
282 non_ehci + FSL_SOC_USB_SNOOP2);
279 } 283 }
280 284
281 /* Deal with USB erratum A-005275 */ 285 /* Deal with USB erratum A-005275 */
@@ -309,13 +313,13 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
309 313
310 if (pdata->have_sysif_regs) { 314 if (pdata->have_sysif_regs) {
311#ifdef CONFIG_FSL_SOC_BOOKE 315#ifdef CONFIG_FSL_SOC_BOOKE
312 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008); 316 iowrite32be(0x00000008, non_ehci + FSL_SOC_USB_PRICTRL);
313 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080); 317 iowrite32be(0x00000080, non_ehci + FSL_SOC_USB_AGECNTTHRSH);
314#else 318#else
315 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c); 319 iowrite32be(0x0000000c, non_ehci + FSL_SOC_USB_PRICTRL);
316 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040); 320 iowrite32be(0x00000040, non_ehci + FSL_SOC_USB_AGECNTTHRSH);
317#endif 321#endif
318 out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001); 322 iowrite32be(0x00000001, non_ehci + FSL_SOC_USB_SICTRL);
319 } 323 }
320 324
321 return 0; 325 return 0;
@@ -554,7 +558,7 @@ static int ehci_fsl_drv_suspend(struct device *dev)
554 if (!fsl_deep_sleep()) 558 if (!fsl_deep_sleep())
555 return 0; 559 return 0;
556 560
557 ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL); 561 ehci_fsl->usb_ctrl = ioread32be(non_ehci + FSL_SOC_USB_CTRL);
558 return 0; 562 return 0;
559} 563}
560 564
@@ -577,7 +581,7 @@ static int ehci_fsl_drv_resume(struct device *dev)
577 usb_root_hub_lost_power(hcd->self.root_hub); 581 usb_root_hub_lost_power(hcd->self.root_hub);
578 582
579 /* Restore USB PHY settings and enable the controller. */ 583 /* Restore USB PHY settings and enable the controller. */
580 out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl); 584 iowrite32be(ehci_fsl->usb_ctrl, non_ehci + FSL_SOC_USB_CTRL);
581 585
582 ehci_reset(ehci); 586 ehci_reset(ehci);
583 ehci_fsl_reinit(ehci); 587 ehci_fsl_reinit(ehci);
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 14178bbf0694..ae1b6e69eb96 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -306,9 +306,9 @@ static void ehci_quiesce (struct ehci_hcd *ehci)
306 306
307/*-------------------------------------------------------------------------*/ 307/*-------------------------------------------------------------------------*/
308 308
309static void end_iaa_cycle(struct ehci_hcd *ehci);
309static void end_unlink_async(struct ehci_hcd *ehci); 310static void end_unlink_async(struct ehci_hcd *ehci);
310static void unlink_empty_async(struct ehci_hcd *ehci); 311static void unlink_empty_async(struct ehci_hcd *ehci);
311static void unlink_empty_async_suspended(struct ehci_hcd *ehci);
312static void ehci_work(struct ehci_hcd *ehci); 312static void ehci_work(struct ehci_hcd *ehci);
313static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh); 313static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
314static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh); 314static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
@@ -565,6 +565,9 @@ static int ehci_init(struct usb_hcd *hcd)
565 /* Accept arbitrarily long scatter-gather lists */ 565 /* Accept arbitrarily long scatter-gather lists */
566 if (!(hcd->driver->flags & HCD_LOCAL_MEM)) 566 if (!(hcd->driver->flags & HCD_LOCAL_MEM))
567 hcd->self.sg_tablesize = ~0; 567 hcd->self.sg_tablesize = ~0;
568
569 /* Prepare for unlinking active QHs */
570 ehci->old_current = ~0;
568 return 0; 571 return 0;
569} 572}
570 573
@@ -675,8 +678,10 @@ int ehci_setup(struct usb_hcd *hcd)
675 return retval; 678 return retval;
676 679
677 retval = ehci_halt(ehci); 680 retval = ehci_halt(ehci);
678 if (retval) 681 if (retval) {
682 ehci_mem_cleanup(ehci);
679 return retval; 683 return retval;
684 }
680 685
681 ehci_reset(ehci); 686 ehci_reset(ehci);
682 687
@@ -756,7 +761,7 @@ static irqreturn_t ehci_irq (struct usb_hcd *hcd)
756 ehci_dbg(ehci, "IAA with IAAD still set?\n"); 761 ehci_dbg(ehci, "IAA with IAAD still set?\n");
757 if (ehci->iaa_in_progress) 762 if (ehci->iaa_in_progress)
758 COUNT(ehci->stats.iaa); 763 COUNT(ehci->stats.iaa);
759 end_unlink_async(ehci); 764 end_iaa_cycle(ehci);
760 } 765 }
761 766
762 /* remote wakeup [4.3.1] */ 767 /* remote wakeup [4.3.1] */
@@ -909,7 +914,7 @@ static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
909 */ 914 */
910 } else { 915 } else {
911 qh = (struct ehci_qh *) urb->hcpriv; 916 qh = (struct ehci_qh *) urb->hcpriv;
912 qh->exception = 1; 917 qh->unlink_reason |= QH_UNLINK_REQUESTED;
913 switch (qh->qh_state) { 918 switch (qh->qh_state) {
914 case QH_STATE_LINKED: 919 case QH_STATE_LINKED:
915 if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) 920 if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)
@@ -970,10 +975,13 @@ rescan:
970 goto done; 975 goto done;
971 } 976 }
972 977
973 qh->exception = 1; 978 qh->unlink_reason |= QH_UNLINK_REQUESTED;
974 switch (qh->qh_state) { 979 switch (qh->qh_state) {
975 case QH_STATE_LINKED: 980 case QH_STATE_LINKED:
976 WARN_ON(!list_empty(&qh->qtd_list)); 981 if (list_empty(&qh->qtd_list))
982 qh->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
983 else
984 WARN_ON(1);
977 if (usb_endpoint_type(&ep->desc) != USB_ENDPOINT_XFER_INT) 985 if (usb_endpoint_type(&ep->desc) != USB_ENDPOINT_XFER_INT)
978 start_unlink_async(ehci, qh); 986 start_unlink_async(ehci, qh);
979 else 987 else
@@ -1040,7 +1048,7 @@ ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1040 * re-linking will call qh_refresh(). 1048 * re-linking will call qh_refresh().
1041 */ 1049 */
1042 usb_settoggle(qh->ps.udev, epnum, is_out, 0); 1050 usb_settoggle(qh->ps.udev, epnum, is_out, 0);
1043 qh->exception = 1; 1051 qh->unlink_reason |= QH_UNLINK_REQUESTED;
1044 if (eptype == USB_ENDPOINT_XFER_BULK) 1052 if (eptype == USB_ENDPOINT_XFER_BULK)
1045 start_unlink_async(ehci, qh); 1053 start_unlink_async(ehci, qh);
1046 else 1054 else
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index 086a7115d263..ffc90295a95f 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -33,6 +33,8 @@
33 33
34#ifdef CONFIG_PM 34#ifdef CONFIG_PM
35 35
36static void unlink_empty_async_suspended(struct ehci_hcd *ehci);
37
36static int persist_enabled_on_companion(struct usb_device *udev, void *unused) 38static int persist_enabled_on_companion(struct usb_device *udev, void *unused)
37{ 39{
38 return !udev->maxchild && udev->persist_enabled && 40 return !udev->maxchild && udev->persist_enabled &&
@@ -347,8 +349,10 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
347 goto done; 349 goto done;
348 ehci->rh_state = EHCI_RH_SUSPENDED; 350 ehci->rh_state = EHCI_RH_SUSPENDED;
349 351
350 end_unlink_async(ehci);
351 unlink_empty_async_suspended(ehci); 352 unlink_empty_async_suspended(ehci);
353
354 /* Any IAA cycle that started before the suspend is now invalid */
355 end_iaa_cycle(ehci);
352 ehci_handle_start_intr_unlinks(ehci); 356 ehci_handle_start_intr_unlinks(ehci);
353 ehci_handle_intr_unlinks(ehci); 357 ehci_handle_intr_unlinks(ehci);
354 end_free_itds(ehci); 358 end_free_itds(ehci);
diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c
index c23e2858c815..3e226ef6ca62 100644
--- a/drivers/usb/host/ehci-msm.c
+++ b/drivers/usb/host/ehci-msm.c
@@ -33,6 +33,7 @@
33#include <linux/usb/msm_hsusb_hw.h> 33#include <linux/usb/msm_hsusb_hw.h>
34#include <linux/usb.h> 34#include <linux/usb.h>
35#include <linux/usb/hcd.h> 35#include <linux/usb/hcd.h>
36#include <linux/acpi.h>
36 37
37#include "ehci.h" 38#include "ehci.h"
38 39
@@ -55,12 +56,16 @@ static int ehci_msm_reset(struct usb_hcd *hcd)
55 if (retval) 56 if (retval)
56 return retval; 57 return retval;
57 58
59 /* select ULPI phy and clear other status/control bits in PORTSC */
60 writel(PORTSC_PTS_ULPI, USB_PORTSC);
58 /* bursts of unspecified length. */ 61 /* bursts of unspecified length. */
59 writel(0, USB_AHBBURST); 62 writel(0, USB_AHBBURST);
60 /* Use the AHB transactor, allow posted data writes */ 63 /* Use the AHB transactor, allow posted data writes */
61 writel(0x8, USB_AHBMODE); 64 writel(0x8, USB_AHBMODE);
62 /* Disable streaming mode and select host mode */ 65 /* Disable streaming mode and select host mode */
63 writel(0x13, USB_USBMODE); 66 writel(0x13, USB_USBMODE);
67 /* Disable ULPI_TX_PKT_EN_CLR_FIX which is valid only for HSIC */
68 writel(readl(USB_GENCONFIG_2) & ~ULPI_TX_PKT_EN_CLR_FIX, USB_GENCONFIG_2);
64 69
65 return 0; 70 return 0;
66} 71}
@@ -104,9 +109,9 @@ static int ehci_msm_probe(struct platform_device *pdev)
104 } 109 }
105 110
106 /* 111 /*
107 * OTG driver takes care of PHY initialization, clock management, 112 * If there is an OTG driver, let it take care of PHY initialization,
108 * powering up VBUS, mapping of registers address space and power 113 * clock management, powering up VBUS, mapping of registers address
109 * management. 114 * space and power management.
110 */ 115 */
111 if (pdev->dev.of_node) 116 if (pdev->dev.of_node)
112 phy = devm_usb_get_phy_by_phandle(&pdev->dev, "usb-phy", 0); 117 phy = devm_usb_get_phy_by_phandle(&pdev->dev, "usb-phy", 0);
@@ -114,27 +119,35 @@ static int ehci_msm_probe(struct platform_device *pdev)
114 phy = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2); 119 phy = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2);
115 120
116 if (IS_ERR(phy)) { 121 if (IS_ERR(phy)) {
117 dev_err(&pdev->dev, "unable to find transceiver\n"); 122 if (PTR_ERR(phy) == -EPROBE_DEFER) {
118 ret = -EPROBE_DEFER; 123 dev_err(&pdev->dev, "unable to find transceiver\n");
119 goto put_hcd; 124 ret = -EPROBE_DEFER;
120 } 125 goto put_hcd;
121 126 }
122 ret = otg_set_host(phy->otg, &hcd->self); 127 phy = NULL;
123 if (ret < 0) {
124 dev_err(&pdev->dev, "unable to register with transceiver\n");
125 goto put_hcd;
126 } 128 }
127 129
128 hcd->usb_phy = phy; 130 hcd->usb_phy = phy;
129 device_init_wakeup(&pdev->dev, 1); 131 device_init_wakeup(&pdev->dev, 1);
130 /*
131 * OTG device parent of HCD takes care of putting
132 * hardware into low power mode.
133 */
134 pm_runtime_no_callbacks(&pdev->dev);
135 pm_runtime_enable(&pdev->dev);
136 132
137 /* FIXME: need to call usb_add_hcd() here? */ 133 if (phy && phy->otg) {
134 /*
135 * MSM OTG driver takes care of adding the HCD and
136 * placing hardware into low power mode via runtime PM.
137 */
138 ret = otg_set_host(phy->otg, &hcd->self);
139 if (ret < 0) {
140 dev_err(&pdev->dev, "unable to register with transceiver\n");
141 goto put_hcd;
142 }
143
144 pm_runtime_no_callbacks(&pdev->dev);
145 pm_runtime_enable(&pdev->dev);
146 } else {
147 ret = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
148 if (ret)
149 goto put_hcd;
150 }
138 151
139 return 0; 152 return 0;
140 153
@@ -152,9 +165,10 @@ static int ehci_msm_remove(struct platform_device *pdev)
152 pm_runtime_disable(&pdev->dev); 165 pm_runtime_disable(&pdev->dev);
153 pm_runtime_set_suspended(&pdev->dev); 166 pm_runtime_set_suspended(&pdev->dev);
154 167
155 otg_set_host(hcd->usb_phy->otg, NULL); 168 if (hcd->usb_phy && hcd->usb_phy->otg)
156 169 otg_set_host(hcd->usb_phy->otg, NULL);
157 /* FIXME: need to call usb_remove_hcd() here? */ 170 else
171 usb_remove_hcd(hcd);
158 172
159 usb_put_hcd(hcd); 173 usb_put_hcd(hcd);
160 174
@@ -191,6 +205,12 @@ static const struct dev_pm_ops ehci_msm_dev_pm_ops = {
191 .resume = ehci_msm_pm_resume, 205 .resume = ehci_msm_pm_resume,
192}; 206};
193 207
208static const struct acpi_device_id msm_ehci_acpi_ids[] = {
209 { "QCOM8040", 0 },
210 { }
211};
212MODULE_DEVICE_TABLE(acpi, msm_ehci_acpi_ids);
213
194static const struct of_device_id msm_ehci_dt_match[] = { 214static const struct of_device_id msm_ehci_dt_match[] = {
195 { .compatible = "qcom,ehci-host", }, 215 { .compatible = "qcom,ehci-host", },
196 {} 216 {}
@@ -200,10 +220,12 @@ MODULE_DEVICE_TABLE(of, msm_ehci_dt_match);
200static struct platform_driver ehci_msm_driver = { 220static struct platform_driver ehci_msm_driver = {
201 .probe = ehci_msm_probe, 221 .probe = ehci_msm_probe,
202 .remove = ehci_msm_remove, 222 .remove = ehci_msm_remove,
223 .shutdown = usb_hcd_platform_shutdown,
203 .driver = { 224 .driver = {
204 .name = "msm_hsusb_host", 225 .name = "msm_hsusb_host",
205 .pm = &ehci_msm_dev_pm_ops, 226 .pm = &ehci_msm_dev_pm_ops,
206 .of_match_table = msm_ehci_dt_match, 227 .of_match_table = msm_ehci_dt_match,
228 .acpi_match_table = ACPI_PTR(msm_ehci_acpi_ids),
207 }, 229 },
208}; 230};
209 231
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index 2a5d2fd76040..3b3649d88c5f 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -377,6 +377,12 @@ static int ehci_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
377 return usb_hcd_pci_probe(pdev, id); 377 return usb_hcd_pci_probe(pdev, id);
378} 378}
379 379
380static void ehci_pci_remove(struct pci_dev *pdev)
381{
382 pci_clear_mwi(pdev);
383 usb_hcd_pci_remove(pdev);
384}
385
380/* PCI driver selection metadata; PCI hotplugging uses this */ 386/* PCI driver selection metadata; PCI hotplugging uses this */
381static const struct pci_device_id pci_ids [] = { { 387static const struct pci_device_id pci_ids [] = { {
382 /* handle any USB 2.0 EHCI controller */ 388 /* handle any USB 2.0 EHCI controller */
@@ -396,7 +402,7 @@ static struct pci_driver ehci_pci_driver = {
396 .id_table = pci_ids, 402 .id_table = pci_ids,
397 403
398 .probe = ehci_pci_probe, 404 .probe = ehci_pci_probe,
399 .remove = usb_hcd_pci_remove, 405 .remove = ehci_pci_remove,
400 .shutdown = usb_hcd_pci_shutdown, 406 .shutdown = usb_hcd_pci_shutdown,
401 407
402#ifdef CONFIG_PM 408#ifdef CONFIG_PM
diff --git a/drivers/usb/host/ehci-platform.c b/drivers/usb/host/ehci-platform.c
index bd7082f297bb..1757ebb471b6 100644
--- a/drivers/usb/host/ehci-platform.c
+++ b/drivers/usb/host/ehci-platform.c
@@ -345,8 +345,7 @@ static int ehci_platform_suspend(struct device *dev)
345{ 345{
346 struct usb_hcd *hcd = dev_get_drvdata(dev); 346 struct usb_hcd *hcd = dev_get_drvdata(dev);
347 struct usb_ehci_pdata *pdata = dev_get_platdata(dev); 347 struct usb_ehci_pdata *pdata = dev_get_platdata(dev);
348 struct platform_device *pdev = 348 struct platform_device *pdev = to_platform_device(dev);
349 container_of(dev, struct platform_device, dev);
350 bool do_wakeup = device_may_wakeup(dev); 349 bool do_wakeup = device_may_wakeup(dev);
351 int ret; 350 int ret;
352 351
@@ -364,8 +363,7 @@ static int ehci_platform_resume(struct device *dev)
364{ 363{
365 struct usb_hcd *hcd = dev_get_drvdata(dev); 364 struct usb_hcd *hcd = dev_get_drvdata(dev);
366 struct usb_ehci_pdata *pdata = dev_get_platdata(dev); 365 struct usb_ehci_pdata *pdata = dev_get_platdata(dev);
367 struct platform_device *pdev = 366 struct platform_device *pdev = to_platform_device(dev);
368 container_of(dev, struct platform_device, dev);
369 struct ehci_platform_priv *priv = hcd_to_ehci_priv(hcd); 367 struct ehci_platform_priv *priv = hcd_to_ehci_priv(hcd);
370 368
371 if (pdata->power_on) { 369 if (pdata->power_on) {
diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c
index aad0777240d3..eca3710d8fc4 100644
--- a/drivers/usb/host/ehci-q.c
+++ b/drivers/usb/host/ehci-q.c
@@ -394,6 +394,7 @@ qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
394 goto retry_xacterr; 394 goto retry_xacterr;
395 } 395 }
396 stopped = 1; 396 stopped = 1;
397 qh->unlink_reason |= QH_UNLINK_HALTED;
397 398
398 /* magic dummy for some short reads; qh won't advance. 399 /* magic dummy for some short reads; qh won't advance.
399 * that silicon quirk can kick in with this dummy too. 400 * that silicon quirk can kick in with this dummy too.
@@ -408,6 +409,7 @@ qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
408 && !(qtd->hw_alt_next 409 && !(qtd->hw_alt_next
409 & EHCI_LIST_END(ehci))) { 410 & EHCI_LIST_END(ehci))) {
410 stopped = 1; 411 stopped = 1;
412 qh->unlink_reason |= QH_UNLINK_SHORT_READ;
411 } 413 }
412 414
413 /* stop scanning when we reach qtds the hc is using */ 415 /* stop scanning when we reach qtds the hc is using */
@@ -420,8 +422,10 @@ qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
420 stopped = 1; 422 stopped = 1;
421 423
422 /* cancel everything if we halt, suspend, etc */ 424 /* cancel everything if we halt, suspend, etc */
423 if (ehci->rh_state < EHCI_RH_RUNNING) 425 if (ehci->rh_state < EHCI_RH_RUNNING) {
424 last_status = -ESHUTDOWN; 426 last_status = -ESHUTDOWN;
427 qh->unlink_reason |= QH_UNLINK_SHUTDOWN;
428 }
425 429
426 /* this qtd is active; skip it unless a previous qtd 430 /* this qtd is active; skip it unless a previous qtd
427 * for its urb faulted, or its urb was canceled. 431 * for its urb faulted, or its urb was canceled.
@@ -538,10 +542,10 @@ qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
538 * except maybe high bandwidth ... 542 * except maybe high bandwidth ...
539 */ 543 */
540 if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci)) 544 if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci))
541 qh->exception = 1; 545 qh->unlink_reason |= QH_UNLINK_DUMMY_OVERLAY;
542 546
543 /* Let the caller know if the QH needs to be unlinked. */ 547 /* Let the caller know if the QH needs to be unlinked. */
544 return qh->exception; 548 return qh->unlink_reason;
545} 549}
546 550
547/*-------------------------------------------------------------------------*/ 551/*-------------------------------------------------------------------------*/
@@ -1003,7 +1007,7 @@ static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1003 1007
1004 qh->qh_state = QH_STATE_LINKED; 1008 qh->qh_state = QH_STATE_LINKED;
1005 qh->xacterrs = 0; 1009 qh->xacterrs = 0;
1006 qh->exception = 0; 1010 qh->unlink_reason = 0;
1007 /* qtd completions reported later by interrupt */ 1011 /* qtd completions reported later by interrupt */
1008 1012
1009 enable_async(ehci); 1013 enable_async(ehci);
@@ -1279,17 +1283,13 @@ static void single_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
1279 1283
1280static void start_iaa_cycle(struct ehci_hcd *ehci) 1284static void start_iaa_cycle(struct ehci_hcd *ehci)
1281{ 1285{
1282 /* Do nothing if an IAA cycle is already running */
1283 if (ehci->iaa_in_progress)
1284 return;
1285 ehci->iaa_in_progress = true;
1286
1287 /* If the controller isn't running, we don't have to wait for it */ 1286 /* If the controller isn't running, we don't have to wait for it */
1288 if (unlikely(ehci->rh_state < EHCI_RH_RUNNING)) { 1287 if (unlikely(ehci->rh_state < EHCI_RH_RUNNING)) {
1289 end_unlink_async(ehci); 1288 end_unlink_async(ehci);
1290 1289
1291 /* Otherwise start a new IAA cycle */ 1290 /* Otherwise start a new IAA cycle if one isn't already running */
1292 } else if (likely(ehci->rh_state == EHCI_RH_RUNNING)) { 1291 } else if (ehci->rh_state == EHCI_RH_RUNNING &&
1292 !ehci->iaa_in_progress) {
1293 1293
1294 /* Make sure the unlinks are all visible to the hardware */ 1294 /* Make sure the unlinks are all visible to the hardware */
1295 wmb(); 1295 wmb();
@@ -1297,17 +1297,13 @@ static void start_iaa_cycle(struct ehci_hcd *ehci)
1297 ehci_writel(ehci, ehci->command | CMD_IAAD, 1297 ehci_writel(ehci, ehci->command | CMD_IAAD,
1298 &ehci->regs->command); 1298 &ehci->regs->command);
1299 ehci_readl(ehci, &ehci->regs->command); 1299 ehci_readl(ehci, &ehci->regs->command);
1300 ehci->iaa_in_progress = true;
1300 ehci_enable_event(ehci, EHCI_HRTIMER_IAA_WATCHDOG, true); 1301 ehci_enable_event(ehci, EHCI_HRTIMER_IAA_WATCHDOG, true);
1301 } 1302 }
1302} 1303}
1303 1304
1304/* the async qh for the qtds being unlinked are now gone from the HC */ 1305static void end_iaa_cycle(struct ehci_hcd *ehci)
1305
1306static void end_unlink_async(struct ehci_hcd *ehci)
1307{ 1306{
1308 struct ehci_qh *qh;
1309 bool early_exit;
1310
1311 if (ehci->has_synopsys_hc_bug) 1307 if (ehci->has_synopsys_hc_bug)
1312 ehci_writel(ehci, (u32) ehci->async->qh_dma, 1308 ehci_writel(ehci, (u32) ehci->async->qh_dma,
1313 &ehci->regs->async_next); 1309 &ehci->regs->async_next);
@@ -1315,6 +1311,16 @@ static void end_unlink_async(struct ehci_hcd *ehci)
1315 /* The current IAA cycle has ended */ 1311 /* The current IAA cycle has ended */
1316 ehci->iaa_in_progress = false; 1312 ehci->iaa_in_progress = false;
1317 1313
1314 end_unlink_async(ehci);
1315}
1316
1317/* See if the async qh for the qtds being unlinked are now gone from the HC */
1318
1319static void end_unlink_async(struct ehci_hcd *ehci)
1320{
1321 struct ehci_qh *qh;
1322 bool early_exit;
1323
1318 if (list_empty(&ehci->async_unlink)) 1324 if (list_empty(&ehci->async_unlink))
1319 return; 1325 return;
1320 qh = list_first_entry(&ehci->async_unlink, struct ehci_qh, 1326 qh = list_first_entry(&ehci->async_unlink, struct ehci_qh,
@@ -1335,14 +1341,60 @@ static void end_unlink_async(struct ehci_hcd *ehci)
1335 * after the IAA interrupt occurs. In self-defense, always go 1341 * after the IAA interrupt occurs. In self-defense, always go
1336 * through two IAA cycles for each QH. 1342 * through two IAA cycles for each QH.
1337 */ 1343 */
1338 else if (qh->qh_state == QH_STATE_UNLINK_WAIT) { 1344 else if (qh->qh_state == QH_STATE_UNLINK) {
1345 /*
1346 * Second IAA cycle has finished. Process only the first
1347 * waiting QH (NVIDIA (?) bug).
1348 */
1349 list_move_tail(&qh->unlink_node, &ehci->async_idle);
1350 }
1351
1352 /*
1353 * AMD/ATI (?) bug: The HC can continue to use an active QH long
1354 * after the IAA interrupt occurs. To prevent problems, QHs that
1355 * may still be active will wait until 2 ms have passed with no
1356 * change to the hw_current and hw_token fields (this delay occurs
1357 * between the two IAA cycles).
1358 *
1359 * The EHCI spec (4.8.2) says that active QHs must not be removed
1360 * from the async schedule and recommends waiting until the QH
1361 * goes inactive. This is ridiculous because the QH will _never_
1362 * become inactive if the endpoint NAKs indefinitely.
1363 */
1364
1365 /* Some reasons for unlinking guarantee the QH can't be active */
1366 else if (qh->unlink_reason & (QH_UNLINK_HALTED |
1367 QH_UNLINK_SHORT_READ | QH_UNLINK_DUMMY_OVERLAY))
1368 goto DelayDone;
1369
1370 /* The QH can't be active if the queue was and still is empty... */
1371 else if ((qh->unlink_reason & QH_UNLINK_QUEUE_EMPTY) &&
1372 list_empty(&qh->qtd_list))
1373 goto DelayDone;
1374
1375 /* ... or if the QH has halted */
1376 else if (qh->hw->hw_token & cpu_to_hc32(ehci, QTD_STS_HALT))
1377 goto DelayDone;
1378
1379 /* Otherwise we have to wait until the QH stops changing */
1380 else {
1381 __hc32 qh_current, qh_token;
1382
1383 qh_current = qh->hw->hw_current;
1384 qh_token = qh->hw->hw_token;
1385 if (qh_current != ehci->old_current ||
1386 qh_token != ehci->old_token) {
1387 ehci->old_current = qh_current;
1388 ehci->old_token = qh_token;
1389 ehci_enable_event(ehci,
1390 EHCI_HRTIMER_ACTIVE_UNLINK, true);
1391 return;
1392 }
1393 DelayDone:
1339 qh->qh_state = QH_STATE_UNLINK; 1394 qh->qh_state = QH_STATE_UNLINK;
1340 early_exit = true; 1395 early_exit = true;
1341 } 1396 }
1342 1397 ehci->old_current = ~0; /* Prepare for next QH */
1343 /* Otherwise process only the first waiting QH (NVIDIA bug?) */
1344 else
1345 list_move_tail(&qh->unlink_node, &ehci->async_idle);
1346 1398
1347 /* Start a new IAA cycle if any QHs are waiting for it */ 1399 /* Start a new IAA cycle if any QHs are waiting for it */
1348 if (!list_empty(&ehci->async_unlink)) 1400 if (!list_empty(&ehci->async_unlink))
@@ -1395,6 +1447,7 @@ static void unlink_empty_async(struct ehci_hcd *ehci)
1395 1447
1396 /* If nothing else is being unlinked, unlink the last empty QH */ 1448 /* If nothing else is being unlinked, unlink the last empty QH */
1397 if (list_empty(&ehci->async_unlink) && qh_to_unlink) { 1449 if (list_empty(&ehci->async_unlink) && qh_to_unlink) {
1450 qh_to_unlink->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
1398 start_unlink_async(ehci, qh_to_unlink); 1451 start_unlink_async(ehci, qh_to_unlink);
1399 --count; 1452 --count;
1400 } 1453 }
@@ -1406,8 +1459,10 @@ static void unlink_empty_async(struct ehci_hcd *ehci)
1406 } 1459 }
1407} 1460}
1408 1461
1462#ifdef CONFIG_PM
1463
1409/* The root hub is suspended; unlink all the async QHs */ 1464/* The root hub is suspended; unlink all the async QHs */
1410static void __maybe_unused unlink_empty_async_suspended(struct ehci_hcd *ehci) 1465static void unlink_empty_async_suspended(struct ehci_hcd *ehci)
1411{ 1466{
1412 struct ehci_qh *qh; 1467 struct ehci_qh *qh;
1413 1468
@@ -1416,9 +1471,10 @@ static void __maybe_unused unlink_empty_async_suspended(struct ehci_hcd *ehci)
1416 WARN_ON(!list_empty(&qh->qtd_list)); 1471 WARN_ON(!list_empty(&qh->qtd_list));
1417 single_unlink_async(ehci, qh); 1472 single_unlink_async(ehci, qh);
1418 } 1473 }
1419 start_iaa_cycle(ehci);
1420} 1474}
1421 1475
1476#endif
1477
1422/* makes sure the async qh will become idle */ 1478/* makes sure the async qh will become idle */
1423/* caller must own ehci->lock */ 1479/* caller must own ehci->lock */
1424 1480
diff --git a/drivers/usb/host/ehci-sched.c b/drivers/usb/host/ehci-sched.c
index f9a332775c47..1dfe54f14737 100644
--- a/drivers/usb/host/ehci-sched.c
+++ b/drivers/usb/host/ehci-sched.c
@@ -34,7 +34,7 @@
34 * pre-calculated schedule data to make appending to the queue be quick. 34 * pre-calculated schedule data to make appending to the queue be quick.
35 */ 35 */
36 36
37static int ehci_get_frame (struct usb_hcd *hcd); 37static int ehci_get_frame(struct usb_hcd *hcd);
38 38
39/* 39/*
40 * periodic_next_shadow - return "next" pointer on shadow list 40 * periodic_next_shadow - return "next" pointer on shadow list
@@ -52,7 +52,7 @@ periodic_next_shadow(struct ehci_hcd *ehci, union ehci_shadow *periodic,
52 return &periodic->fstn->fstn_next; 52 return &periodic->fstn->fstn_next;
53 case Q_TYPE_ITD: 53 case Q_TYPE_ITD:
54 return &periodic->itd->itd_next; 54 return &periodic->itd->itd_next;
55 // case Q_TYPE_SITD: 55 /* case Q_TYPE_SITD: */
56 default: 56 default:
57 return &periodic->sitd->sitd_next; 57 return &periodic->sitd->sitd_next;
58 } 58 }
@@ -73,7 +73,7 @@ shadow_next_periodic(struct ehci_hcd *ehci, union ehci_shadow *periodic,
73} 73}
74 74
75/* caller must hold ehci->lock */ 75/* caller must hold ehci->lock */
76static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr) 76static void periodic_unlink(struct ehci_hcd *ehci, unsigned frame, void *ptr)
77{ 77{
78 union ehci_shadow *prev_p = &ehci->pshadow[frame]; 78 union ehci_shadow *prev_p = &ehci->pshadow[frame];
79 __hc32 *hw_p = &ehci->periodic[frame]; 79 __hc32 *hw_p = &ehci->periodic[frame];
@@ -296,10 +296,9 @@ static void compute_tt_budget(u8 budget_table[EHCI_BANDWIDTH_SIZE],
296 if (x <= 125) { 296 if (x <= 125) {
297 budget_line[uf] = x; 297 budget_line[uf] = x;
298 break; 298 break;
299 } else {
300 budget_line[uf] = 125;
301 x -= 125;
302 } 299 }
300 budget_line[uf] = 125;
301 x -= 125;
303 } 302 }
304 } 303 }
305 } 304 }
@@ -330,7 +329,8 @@ static int __maybe_unused same_tt(struct usb_device *dev1,
330 */ 329 */
331static inline unsigned char tt_start_uframe(struct ehci_hcd *ehci, __hc32 mask) 330static inline unsigned char tt_start_uframe(struct ehci_hcd *ehci, __hc32 mask)
332{ 331{
333 unsigned char smask = QH_SMASK & hc32_to_cpu(ehci, mask); 332 unsigned char smask = hc32_to_cpu(ehci, mask) & QH_SMASK;
333
334 if (!smask) { 334 if (!smask) {
335 ehci_err(ehci, "invalid empty smask!\n"); 335 ehci_err(ehci, "invalid empty smask!\n");
336 /* uframe 7 can't have bw so this will indicate failure */ 336 /* uframe 7 can't have bw so this will indicate failure */
@@ -346,7 +346,8 @@ max_tt_usecs[] = { 125, 125, 125, 125, 125, 125, 30, 0 };
346static inline void carryover_tt_bandwidth(unsigned short tt_usecs[8]) 346static inline void carryover_tt_bandwidth(unsigned short tt_usecs[8])
347{ 347{
348 int i; 348 int i;
349 for (i=0; i<7; i++) { 349
350 for (i = 0; i < 7; i++) {
350 if (max_tt_usecs[i] < tt_usecs[i]) { 351 if (max_tt_usecs[i] < tt_usecs[i]) {
351 tt_usecs[i+1] += tt_usecs[i] - max_tt_usecs[i]; 352 tt_usecs[i+1] += tt_usecs[i] - max_tt_usecs[i];
352 tt_usecs[i] = max_tt_usecs[i]; 353 tt_usecs[i] = max_tt_usecs[i];
@@ -375,7 +376,7 @@ static inline void carryover_tt_bandwidth(unsigned short tt_usecs[8])
375 * limit of 16, specified in USB 2.0 spec section 11.18.4 requirement #4, 376 * limit of 16, specified in USB 2.0 spec section 11.18.4 requirement #4,
376 * since proper scheduling limits ssplits to less than 16 per uframe. 377 * since proper scheduling limits ssplits to less than 16 per uframe.
377 */ 378 */
378static int tt_available ( 379static int tt_available(
379 struct ehci_hcd *ehci, 380 struct ehci_hcd *ehci,
380 struct ehci_per_sched *ps, 381 struct ehci_per_sched *ps,
381 struct ehci_tt *tt, 382 struct ehci_tt *tt,
@@ -409,11 +410,11 @@ static int tt_available (
409 * must be empty, so as to not illegally delay 410 * must be empty, so as to not illegally delay
410 * already scheduled transactions 411 * already scheduled transactions
411 */ 412 */
412 if (125 < usecs) { 413 if (usecs > 125) {
413 int ufs = (usecs / 125); 414 int ufs = (usecs / 125);
414 415
415 for (i = uframe; i < (uframe + ufs) && i < 8; i++) 416 for (i = uframe; i < (uframe + ufs) && i < 8; i++)
416 if (0 < tt_usecs[i]) 417 if (tt_usecs[i] > 0)
417 return 0; 418 return 0;
418 } 419 }
419 420
@@ -435,7 +436,7 @@ static int tt_available (
435 * for a periodic transfer starting at the specified frame, using 436 * for a periodic transfer starting at the specified frame, using
436 * all the uframes in the mask. 437 * all the uframes in the mask.
437 */ 438 */
438static int tt_no_collision ( 439static int tt_no_collision(
439 struct ehci_hcd *ehci, 440 struct ehci_hcd *ehci,
440 unsigned period, 441 unsigned period,
441 struct usb_device *dev, 442 struct usb_device *dev,
@@ -455,8 +456,8 @@ static int tt_no_collision (
455 __hc32 type; 456 __hc32 type;
456 struct ehci_qh_hw *hw; 457 struct ehci_qh_hw *hw;
457 458
458 here = ehci->pshadow [frame]; 459 here = ehci->pshadow[frame];
459 type = Q_NEXT_TYPE(ehci, ehci->periodic [frame]); 460 type = Q_NEXT_TYPE(ehci, ehci->periodic[frame]);
460 while (here.ptr) { 461 while (here.ptr) {
461 switch (hc32_to_cpu(ehci, type)) { 462 switch (hc32_to_cpu(ehci, type)) {
462 case Q_TYPE_ITD: 463 case Q_TYPE_ITD:
@@ -479,7 +480,7 @@ static int tt_no_collision (
479 here = here.qh->qh_next; 480 here = here.qh->qh_next;
480 continue; 481 continue;
481 case Q_TYPE_SITD: 482 case Q_TYPE_SITD:
482 if (same_tt (dev, here.sitd->urb->dev)) { 483 if (same_tt(dev, here.sitd->urb->dev)) {
483 u16 mask; 484 u16 mask;
484 485
485 mask = hc32_to_cpu(ehci, here.sitd 486 mask = hc32_to_cpu(ehci, here.sitd
@@ -492,9 +493,9 @@ static int tt_no_collision (
492 type = Q_NEXT_TYPE(ehci, here.sitd->hw_next); 493 type = Q_NEXT_TYPE(ehci, here.sitd->hw_next);
493 here = here.sitd->sitd_next; 494 here = here.sitd->sitd_next;
494 continue; 495 continue;
495 // case Q_TYPE_FSTN: 496 /* case Q_TYPE_FSTN: */
496 default: 497 default:
497 ehci_dbg (ehci, 498 ehci_dbg(ehci,
498 "periodic frame %d bogus type %d\n", 499 "periodic frame %d bogus type %d\n",
499 frame, type); 500 frame, type);
500 } 501 }
@@ -588,14 +589,14 @@ static void qh_link_periodic(struct ehci_hcd *ehci, struct ehci_qh *qh)
588 qh->qh_next = here; 589 qh->qh_next = here;
589 if (here.qh) 590 if (here.qh)
590 qh->hw->hw_next = *hw_p; 591 qh->hw->hw_next = *hw_p;
591 wmb (); 592 wmb();
592 prev->qh = qh; 593 prev->qh = qh;
593 *hw_p = QH_NEXT (ehci, qh->qh_dma); 594 *hw_p = QH_NEXT(ehci, qh->qh_dma);
594 } 595 }
595 } 596 }
596 qh->qh_state = QH_STATE_LINKED; 597 qh->qh_state = QH_STATE_LINKED;
597 qh->xacterrs = 0; 598 qh->xacterrs = 0;
598 qh->exception = 0; 599 qh->unlink_reason = 0;
599 600
600 /* update per-qh bandwidth for debugfs */ 601 /* update per-qh bandwidth for debugfs */
601 ehci_to_hcd(ehci)->self.bandwidth_allocated += qh->ps.bw_period 602 ehci_to_hcd(ehci)->self.bandwidth_allocated += qh->ps.bw_period
@@ -633,7 +634,7 @@ static void qh_unlink_periodic(struct ehci_hcd *ehci, struct ehci_qh *qh)
633 period = qh->ps.period ? : 1; 634 period = qh->ps.period ? : 1;
634 635
635 for (i = qh->ps.phase; i < ehci->periodic_size; i += period) 636 for (i = qh->ps.phase; i < ehci->periodic_size; i += period)
636 periodic_unlink (ehci, i, qh); 637 periodic_unlink(ehci, i, qh);
637 638
638 /* update per-qh bandwidth for debugfs */ 639 /* update per-qh bandwidth for debugfs */
639 ehci_to_hcd(ehci)->self.bandwidth_allocated -= qh->ps.bw_period 640 ehci_to_hcd(ehci)->self.bandwidth_allocated -= qh->ps.bw_period
@@ -679,7 +680,7 @@ static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh)
679 /* if the qh is waiting for unlink, cancel it now */ 680 /* if the qh is waiting for unlink, cancel it now */
680 cancel_unlink_wait_intr(ehci, qh); 681 cancel_unlink_wait_intr(ehci, qh);
681 682
682 qh_unlink_periodic (ehci, qh); 683 qh_unlink_periodic(ehci, qh);
683 684
684 /* Make sure the unlinks are visible before starting the timer */ 685 /* Make sure the unlinks are visible before starting the timer */
685 wmb(); 686 wmb();
@@ -763,7 +764,7 @@ static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh)
763 764
764/*-------------------------------------------------------------------------*/ 765/*-------------------------------------------------------------------------*/
765 766
766static int check_period ( 767static int check_period(
767 struct ehci_hcd *ehci, 768 struct ehci_hcd *ehci,
768 unsigned frame, 769 unsigned frame,
769 unsigned uframe, 770 unsigned uframe,
@@ -785,11 +786,11 @@ static int check_period (
785 return 0; 786 return 0;
786 } 787 }
787 788
788 // success! 789 /* success! */
789 return 1; 790 return 1;
790} 791}
791 792
792static int check_intr_schedule ( 793static int check_intr_schedule(
793 struct ehci_hcd *ehci, 794 struct ehci_hcd *ehci,
794 unsigned frame, 795 unsigned frame,
795 unsigned uframe, 796 unsigned uframe,
@@ -925,7 +926,7 @@ done:
925 return status; 926 return status;
926} 927}
927 928
928static int intr_submit ( 929static int intr_submit(
929 struct ehci_hcd *ehci, 930 struct ehci_hcd *ehci,
930 struct urb *urb, 931 struct urb *urb,
931 struct list_head *qtd_list, 932 struct list_head *qtd_list,
@@ -940,7 +941,7 @@ static int intr_submit (
940 /* get endpoint and transfer/schedule data */ 941 /* get endpoint and transfer/schedule data */
941 epnum = urb->ep->desc.bEndpointAddress; 942 epnum = urb->ep->desc.bEndpointAddress;
942 943
943 spin_lock_irqsave (&ehci->lock, flags); 944 spin_lock_irqsave(&ehci->lock, flags);
944 945
945 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) { 946 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
946 status = -ESHUTDOWN; 947 status = -ESHUTDOWN;
@@ -951,20 +952,21 @@ static int intr_submit (
951 goto done_not_linked; 952 goto done_not_linked;
952 953
953 /* get qh and force any scheduling errors */ 954 /* get qh and force any scheduling errors */
954 INIT_LIST_HEAD (&empty); 955 INIT_LIST_HEAD(&empty);
955 qh = qh_append_tds(ehci, urb, &empty, epnum, &urb->ep->hcpriv); 956 qh = qh_append_tds(ehci, urb, &empty, epnum, &urb->ep->hcpriv);
956 if (qh == NULL) { 957 if (qh == NULL) {
957 status = -ENOMEM; 958 status = -ENOMEM;
958 goto done; 959 goto done;
959 } 960 }
960 if (qh->qh_state == QH_STATE_IDLE) { 961 if (qh->qh_state == QH_STATE_IDLE) {
961 if ((status = qh_schedule (ehci, qh)) != 0) 962 status = qh_schedule(ehci, qh);
963 if (status)
962 goto done; 964 goto done;
963 } 965 }
964 966
965 /* then queue the urb's tds to the qh */ 967 /* then queue the urb's tds to the qh */
966 qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv); 968 qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
967 BUG_ON (qh == NULL); 969 BUG_ON(qh == NULL);
968 970
969 /* stuff into the periodic schedule */ 971 /* stuff into the periodic schedule */
970 if (qh->qh_state == QH_STATE_IDLE) { 972 if (qh->qh_state == QH_STATE_IDLE) {
@@ -982,9 +984,9 @@ done:
982 if (unlikely(status)) 984 if (unlikely(status))
983 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb); 985 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
984done_not_linked: 986done_not_linked:
985 spin_unlock_irqrestore (&ehci->lock, flags); 987 spin_unlock_irqrestore(&ehci->lock, flags);
986 if (status) 988 if (status)
987 qtd_list_free (ehci, urb, qtd_list); 989 qtd_list_free(ehci, urb, qtd_list);
988 990
989 return status; 991 return status;
990} 992}
@@ -1022,12 +1024,12 @@ static void scan_intr(struct ehci_hcd *ehci)
1022/* ehci_iso_stream ops work with both ITD and SITD */ 1024/* ehci_iso_stream ops work with both ITD and SITD */
1023 1025
1024static struct ehci_iso_stream * 1026static struct ehci_iso_stream *
1025iso_stream_alloc (gfp_t mem_flags) 1027iso_stream_alloc(gfp_t mem_flags)
1026{ 1028{
1027 struct ehci_iso_stream *stream; 1029 struct ehci_iso_stream *stream;
1028 1030
1029 stream = kzalloc(sizeof *stream, mem_flags); 1031 stream = kzalloc(sizeof(*stream), mem_flags);
1030 if (likely (stream != NULL)) { 1032 if (likely(stream != NULL)) {
1031 INIT_LIST_HEAD(&stream->td_list); 1033 INIT_LIST_HEAD(&stream->td_list);
1032 INIT_LIST_HEAD(&stream->free_list); 1034 INIT_LIST_HEAD(&stream->free_list);
1033 stream->next_uframe = NO_FRAME; 1035 stream->next_uframe = NO_FRAME;
@@ -1037,13 +1039,13 @@ iso_stream_alloc (gfp_t mem_flags)
1037} 1039}
1038 1040
1039static void 1041static void
1040iso_stream_init ( 1042iso_stream_init(
1041 struct ehci_hcd *ehci, 1043 struct ehci_hcd *ehci,
1042 struct ehci_iso_stream *stream, 1044 struct ehci_iso_stream *stream,
1043 struct urb *urb 1045 struct urb *urb
1044) 1046)
1045{ 1047{
1046 static const u8 smask_out [] = { 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f }; 1048 static const u8 smask_out[] = { 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f };
1047 1049
1048 struct usb_device *dev = urb->dev; 1050 struct usb_device *dev = urb->dev;
1049 u32 buf1; 1051 u32 buf1;
@@ -1058,11 +1060,7 @@ iso_stream_init (
1058 epnum = usb_pipeendpoint(urb->pipe); 1060 epnum = usb_pipeendpoint(urb->pipe);
1059 is_input = usb_pipein(urb->pipe) ? USB_DIR_IN : 0; 1061 is_input = usb_pipein(urb->pipe) ? USB_DIR_IN : 0;
1060 maxp = usb_endpoint_maxp(&urb->ep->desc); 1062 maxp = usb_endpoint_maxp(&urb->ep->desc);
1061 if (is_input) { 1063 buf1 = is_input ? 1 << 11 : 0;
1062 buf1 = (1 << 11);
1063 } else {
1064 buf1 = 0;
1065 }
1066 1064
1067 /* knows about ITD vs SITD */ 1065 /* knows about ITD vs SITD */
1068 if (dev->speed == USB_SPEED_HIGH) { 1066 if (dev->speed == USB_SPEED_HIGH) {
@@ -1111,7 +1109,7 @@ iso_stream_init (
1111 think_time = dev->tt ? dev->tt->think_time : 0; 1109 think_time = dev->tt ? dev->tt->think_time : 0;
1112 stream->ps.tt_usecs = NS_TO_US(think_time + usb_calc_bus_time( 1110 stream->ps.tt_usecs = NS_TO_US(think_time + usb_calc_bus_time(
1113 dev->speed, is_input, 1, maxp)); 1111 dev->speed, is_input, 1, maxp));
1114 hs_transfers = max (1u, (maxp + 187) / 188); 1112 hs_transfers = max(1u, (maxp + 187) / 188);
1115 if (is_input) { 1113 if (is_input) {
1116 u32 tmp; 1114 u32 tmp;
1117 1115
@@ -1151,7 +1149,7 @@ iso_stream_init (
1151} 1149}
1152 1150
1153static struct ehci_iso_stream * 1151static struct ehci_iso_stream *
1154iso_stream_find (struct ehci_hcd *ehci, struct urb *urb) 1152iso_stream_find(struct ehci_hcd *ehci, struct urb *urb)
1155{ 1153{
1156 unsigned epnum; 1154 unsigned epnum;
1157 struct ehci_iso_stream *stream; 1155 struct ehci_iso_stream *stream;
@@ -1164,25 +1162,25 @@ iso_stream_find (struct ehci_hcd *ehci, struct urb *urb)
1164 else 1162 else
1165 ep = urb->dev->ep_out[epnum]; 1163 ep = urb->dev->ep_out[epnum];
1166 1164
1167 spin_lock_irqsave (&ehci->lock, flags); 1165 spin_lock_irqsave(&ehci->lock, flags);
1168 stream = ep->hcpriv; 1166 stream = ep->hcpriv;
1169 1167
1170 if (unlikely (stream == NULL)) { 1168 if (unlikely(stream == NULL)) {
1171 stream = iso_stream_alloc(GFP_ATOMIC); 1169 stream = iso_stream_alloc(GFP_ATOMIC);
1172 if (likely (stream != NULL)) { 1170 if (likely(stream != NULL)) {
1173 ep->hcpriv = stream; 1171 ep->hcpriv = stream;
1174 iso_stream_init(ehci, stream, urb); 1172 iso_stream_init(ehci, stream, urb);
1175 } 1173 }
1176 1174
1177 /* if dev->ep [epnum] is a QH, hw is set */ 1175 /* if dev->ep [epnum] is a QH, hw is set */
1178 } else if (unlikely (stream->hw != NULL)) { 1176 } else if (unlikely(stream->hw != NULL)) {
1179 ehci_dbg (ehci, "dev %s ep%d%s, not iso??\n", 1177 ehci_dbg(ehci, "dev %s ep%d%s, not iso??\n",
1180 urb->dev->devpath, epnum, 1178 urb->dev->devpath, epnum,
1181 usb_pipein(urb->pipe) ? "in" : "out"); 1179 usb_pipein(urb->pipe) ? "in" : "out");
1182 stream = NULL; 1180 stream = NULL;
1183 } 1181 }
1184 1182
1185 spin_unlock_irqrestore (&ehci->lock, flags); 1183 spin_unlock_irqrestore(&ehci->lock, flags);
1186 return stream; 1184 return stream;
1187} 1185}
1188 1186
@@ -1191,16 +1189,16 @@ iso_stream_find (struct ehci_hcd *ehci, struct urb *urb)
1191/* ehci_iso_sched ops can be ITD-only or SITD-only */ 1189/* ehci_iso_sched ops can be ITD-only or SITD-only */
1192 1190
1193static struct ehci_iso_sched * 1191static struct ehci_iso_sched *
1194iso_sched_alloc (unsigned packets, gfp_t mem_flags) 1192iso_sched_alloc(unsigned packets, gfp_t mem_flags)
1195{ 1193{
1196 struct ehci_iso_sched *iso_sched; 1194 struct ehci_iso_sched *iso_sched;
1197 int size = sizeof *iso_sched; 1195 int size = sizeof(*iso_sched);
1198 1196
1199 size += packets * sizeof (struct ehci_iso_packet); 1197 size += packets * sizeof(struct ehci_iso_packet);
1200 iso_sched = kzalloc(size, mem_flags); 1198 iso_sched = kzalloc(size, mem_flags);
1201 if (likely (iso_sched != NULL)) { 1199 if (likely(iso_sched != NULL))
1202 INIT_LIST_HEAD (&iso_sched->td_list); 1200 INIT_LIST_HEAD(&iso_sched->td_list);
1203 } 1201
1204 return iso_sched; 1202 return iso_sched;
1205} 1203}
1206 1204
@@ -1222,17 +1220,17 @@ itd_sched_init(
1222 * when we fit new itds into the schedule. 1220 * when we fit new itds into the schedule.
1223 */ 1221 */
1224 for (i = 0; i < urb->number_of_packets; i++) { 1222 for (i = 0; i < urb->number_of_packets; i++) {
1225 struct ehci_iso_packet *uframe = &iso_sched->packet [i]; 1223 struct ehci_iso_packet *uframe = &iso_sched->packet[i];
1226 unsigned length; 1224 unsigned length;
1227 dma_addr_t buf; 1225 dma_addr_t buf;
1228 u32 trans; 1226 u32 trans;
1229 1227
1230 length = urb->iso_frame_desc [i].length; 1228 length = urb->iso_frame_desc[i].length;
1231 buf = dma + urb->iso_frame_desc [i].offset; 1229 buf = dma + urb->iso_frame_desc[i].offset;
1232 1230
1233 trans = EHCI_ISOC_ACTIVE; 1231 trans = EHCI_ISOC_ACTIVE;
1234 trans |= buf & 0x0fff; 1232 trans |= buf & 0x0fff;
1235 if (unlikely (((i + 1) == urb->number_of_packets)) 1233 if (unlikely(((i + 1) == urb->number_of_packets))
1236 && !(urb->transfer_flags & URB_NO_INTERRUPT)) 1234 && !(urb->transfer_flags & URB_NO_INTERRUPT))
1237 trans |= EHCI_ITD_IOC; 1235 trans |= EHCI_ITD_IOC;
1238 trans |= length << 16; 1236 trans |= length << 16;
@@ -1241,26 +1239,26 @@ itd_sched_init(
1241 /* might need to cross a buffer page within a uframe */ 1239 /* might need to cross a buffer page within a uframe */
1242 uframe->bufp = (buf & ~(u64)0x0fff); 1240 uframe->bufp = (buf & ~(u64)0x0fff);
1243 buf += length; 1241 buf += length;
1244 if (unlikely ((uframe->bufp != (buf & ~(u64)0x0fff)))) 1242 if (unlikely((uframe->bufp != (buf & ~(u64)0x0fff))))
1245 uframe->cross = 1; 1243 uframe->cross = 1;
1246 } 1244 }
1247} 1245}
1248 1246
1249static void 1247static void
1250iso_sched_free ( 1248iso_sched_free(
1251 struct ehci_iso_stream *stream, 1249 struct ehci_iso_stream *stream,
1252 struct ehci_iso_sched *iso_sched 1250 struct ehci_iso_sched *iso_sched
1253) 1251)
1254{ 1252{
1255 if (!iso_sched) 1253 if (!iso_sched)
1256 return; 1254 return;
1257 // caller must hold ehci->lock! 1255 /* caller must hold ehci->lock! */
1258 list_splice (&iso_sched->td_list, &stream->free_list); 1256 list_splice(&iso_sched->td_list, &stream->free_list);
1259 kfree (iso_sched); 1257 kfree(iso_sched);
1260} 1258}
1261 1259
1262static int 1260static int
1263itd_urb_transaction ( 1261itd_urb_transaction(
1264 struct ehci_iso_stream *stream, 1262 struct ehci_iso_stream *stream,
1265 struct ehci_hcd *ehci, 1263 struct ehci_hcd *ehci,
1266 struct urb *urb, 1264 struct urb *urb,
@@ -1274,8 +1272,8 @@ itd_urb_transaction (
1274 struct ehci_iso_sched *sched; 1272 struct ehci_iso_sched *sched;
1275 unsigned long flags; 1273 unsigned long flags;
1276 1274
1277 sched = iso_sched_alloc (urb->number_of_packets, mem_flags); 1275 sched = iso_sched_alloc(urb->number_of_packets, mem_flags);
1278 if (unlikely (sched == NULL)) 1276 if (unlikely(sched == NULL))
1279 return -ENOMEM; 1277 return -ENOMEM;
1280 1278
1281 itd_sched_init(ehci, sched, stream, urb); 1279 itd_sched_init(ehci, sched, stream, urb);
@@ -1286,7 +1284,7 @@ itd_urb_transaction (
1286 num_itds = urb->number_of_packets; 1284 num_itds = urb->number_of_packets;
1287 1285
1288 /* allocate/init ITDs */ 1286 /* allocate/init ITDs */
1289 spin_lock_irqsave (&ehci->lock, flags); 1287 spin_lock_irqsave(&ehci->lock, flags);
1290 for (i = 0; i < num_itds; i++) { 1288 for (i = 0; i < num_itds; i++) {
1291 1289
1292 /* 1290 /*
@@ -1298,14 +1296,14 @@ itd_urb_transaction (
1298 struct ehci_itd, itd_list); 1296 struct ehci_itd, itd_list);
1299 if (itd->frame == ehci->now_frame) 1297 if (itd->frame == ehci->now_frame)
1300 goto alloc_itd; 1298 goto alloc_itd;
1301 list_del (&itd->itd_list); 1299 list_del(&itd->itd_list);
1302 itd_dma = itd->itd_dma; 1300 itd_dma = itd->itd_dma;
1303 } else { 1301 } else {
1304 alloc_itd: 1302 alloc_itd:
1305 spin_unlock_irqrestore (&ehci->lock, flags); 1303 spin_unlock_irqrestore(&ehci->lock, flags);
1306 itd = dma_pool_alloc (ehci->itd_pool, mem_flags, 1304 itd = dma_pool_alloc(ehci->itd_pool, mem_flags,
1307 &itd_dma); 1305 &itd_dma);
1308 spin_lock_irqsave (&ehci->lock, flags); 1306 spin_lock_irqsave(&ehci->lock, flags);
1309 if (!itd) { 1307 if (!itd) {
1310 iso_sched_free(stream, sched); 1308 iso_sched_free(stream, sched);
1311 spin_unlock_irqrestore(&ehci->lock, flags); 1309 spin_unlock_irqrestore(&ehci->lock, flags);
@@ -1313,12 +1311,12 @@ itd_urb_transaction (
1313 } 1311 }
1314 } 1312 }
1315 1313
1316 memset (itd, 0, sizeof *itd); 1314 memset(itd, 0, sizeof(*itd));
1317 itd->itd_dma = itd_dma; 1315 itd->itd_dma = itd_dma;
1318 itd->frame = NO_FRAME; 1316 itd->frame = NO_FRAME;
1319 list_add (&itd->itd_list, &sched->td_list); 1317 list_add(&itd->itd_list, &sched->td_list);
1320 } 1318 }
1321 spin_unlock_irqrestore (&ehci->lock, flags); 1319 spin_unlock_irqrestore(&ehci->lock, flags);
1322 1320
1323 /* temporarily store schedule info in hcpriv */ 1321 /* temporarily store schedule info in hcpriv */
1324 urb->hcpriv = sched; 1322 urb->hcpriv = sched;
@@ -1385,7 +1383,7 @@ static void reserve_release_iso_bandwidth(struct ehci_hcd *ehci,
1385} 1383}
1386 1384
1387static inline int 1385static inline int
1388itd_slot_ok ( 1386itd_slot_ok(
1389 struct ehci_hcd *ehci, 1387 struct ehci_hcd *ehci,
1390 struct ehci_iso_stream *stream, 1388 struct ehci_iso_stream *stream,
1391 unsigned uframe 1389 unsigned uframe
@@ -1405,7 +1403,7 @@ itd_slot_ok (
1405} 1403}
1406 1404
1407static inline int 1405static inline int
1408sitd_slot_ok ( 1406sitd_slot_ok(
1409 struct ehci_hcd *ehci, 1407 struct ehci_hcd *ehci,
1410 struct ehci_iso_stream *stream, 1408 struct ehci_iso_stream *stream,
1411 unsigned uframe, 1409 unsigned uframe,
@@ -1492,7 +1490,7 @@ sitd_slot_ok (
1492 */ 1490 */
1493 1491
1494static int 1492static int
1495iso_stream_schedule ( 1493iso_stream_schedule(
1496 struct ehci_hcd *ehci, 1494 struct ehci_hcd *ehci,
1497 struct urb *urb, 1495 struct urb *urb,
1498 struct ehci_iso_stream *stream 1496 struct ehci_iso_stream *stream
@@ -1693,9 +1691,9 @@ itd_init(struct ehci_hcd *ehci, struct ehci_iso_stream *stream,
1693 1691
1694 /* it's been recently zeroed */ 1692 /* it's been recently zeroed */
1695 itd->hw_next = EHCI_LIST_END(ehci); 1693 itd->hw_next = EHCI_LIST_END(ehci);
1696 itd->hw_bufp [0] = stream->buf0; 1694 itd->hw_bufp[0] = stream->buf0;
1697 itd->hw_bufp [1] = stream->buf1; 1695 itd->hw_bufp[1] = stream->buf1;
1698 itd->hw_bufp [2] = stream->buf2; 1696 itd->hw_bufp[2] = stream->buf2;
1699 1697
1700 for (i = 0; i < 8; i++) 1698 for (i = 0; i < 8; i++)
1701 itd->index[i] = -1; 1699 itd->index[i] = -1;
@@ -1712,13 +1710,13 @@ itd_patch(
1712 u16 uframe 1710 u16 uframe
1713) 1711)
1714{ 1712{
1715 struct ehci_iso_packet *uf = &iso_sched->packet [index]; 1713 struct ehci_iso_packet *uf = &iso_sched->packet[index];
1716 unsigned pg = itd->pg; 1714 unsigned pg = itd->pg;
1717 1715
1718 // BUG_ON (pg == 6 && uf->cross); 1716 /* BUG_ON(pg == 6 && uf->cross); */
1719 1717
1720 uframe &= 0x07; 1718 uframe &= 0x07;
1721 itd->index [uframe] = index; 1719 itd->index[uframe] = index;
1722 1720
1723 itd->hw_transaction[uframe] = uf->transaction; 1721 itd->hw_transaction[uframe] = uf->transaction;
1724 itd->hw_transaction[uframe] |= cpu_to_hc32(ehci, pg << 12); 1722 itd->hw_transaction[uframe] |= cpu_to_hc32(ehci, pg << 12);
@@ -1726,7 +1724,7 @@ itd_patch(
1726 itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(uf->bufp >> 32)); 1724 itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(uf->bufp >> 32));
1727 1725
1728 /* iso_frame_desc[].offset must be strictly increasing */ 1726 /* iso_frame_desc[].offset must be strictly increasing */
1729 if (unlikely (uf->cross)) { 1727 if (unlikely(uf->cross)) {
1730 u64 bufp = uf->bufp + 4096; 1728 u64 bufp = uf->bufp + 4096;
1731 1729
1732 itd->pg = ++pg; 1730 itd->pg = ++pg;
@@ -1736,7 +1734,7 @@ itd_patch(
1736} 1734}
1737 1735
1738static inline void 1736static inline void
1739itd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd) 1737itd_link(struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd)
1740{ 1738{
1741 union ehci_shadow *prev = &ehci->pshadow[frame]; 1739 union ehci_shadow *prev = &ehci->pshadow[frame];
1742 __hc32 *hw_p = &ehci->periodic[frame]; 1740 __hc32 *hw_p = &ehci->periodic[frame];
@@ -1757,7 +1755,7 @@ itd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd)
1757 itd->hw_next = *hw_p; 1755 itd->hw_next = *hw_p;
1758 prev->itd = itd; 1756 prev->itd = itd;
1759 itd->frame = frame; 1757 itd->frame = frame;
1760 wmb (); 1758 wmb();
1761 *hw_p = cpu_to_hc32(ehci, itd->itd_dma | Q_TYPE_ITD); 1759 *hw_p = cpu_to_hc32(ehci, itd->itd_dma | Q_TYPE_ITD);
1762} 1760}
1763 1761
@@ -1776,7 +1774,7 @@ static void itd_link_urb(
1776 1774
1777 next_uframe = stream->next_uframe & (mod - 1); 1775 next_uframe = stream->next_uframe & (mod - 1);
1778 1776
1779 if (unlikely (list_empty(&stream->td_list))) 1777 if (unlikely(list_empty(&stream->td_list)))
1780 ehci_to_hcd(ehci)->self.bandwidth_allocated 1778 ehci_to_hcd(ehci)->self.bandwidth_allocated
1781 += stream->bandwidth; 1779 += stream->bandwidth;
1782 1780
@@ -1792,16 +1790,16 @@ static void itd_link_urb(
1792 packet < urb->number_of_packets;) { 1790 packet < urb->number_of_packets;) {
1793 if (itd == NULL) { 1791 if (itd == NULL) {
1794 /* ASSERT: we have all necessary itds */ 1792 /* ASSERT: we have all necessary itds */
1795 // BUG_ON (list_empty (&iso_sched->td_list)); 1793 /* BUG_ON(list_empty(&iso_sched->td_list)); */
1796 1794
1797 /* ASSERT: no itds for this endpoint in this uframe */ 1795 /* ASSERT: no itds for this endpoint in this uframe */
1798 1796
1799 itd = list_entry (iso_sched->td_list.next, 1797 itd = list_entry(iso_sched->td_list.next,
1800 struct ehci_itd, itd_list); 1798 struct ehci_itd, itd_list);
1801 list_move_tail (&itd->itd_list, &stream->td_list); 1799 list_move_tail(&itd->itd_list, &stream->td_list);
1802 itd->stream = stream; 1800 itd->stream = stream;
1803 itd->urb = urb; 1801 itd->urb = urb;
1804 itd_init (ehci, stream, itd); 1802 itd_init(ehci, stream, itd);
1805 } 1803 }
1806 1804
1807 uframe = next_uframe & 0x07; 1805 uframe = next_uframe & 0x07;
@@ -1823,7 +1821,7 @@ static void itd_link_urb(
1823 stream->next_uframe = next_uframe; 1821 stream->next_uframe = next_uframe;
1824 1822
1825 /* don't need that schedule data any more */ 1823 /* don't need that schedule data any more */
1826 iso_sched_free (stream, iso_sched); 1824 iso_sched_free(stream, iso_sched);
1827 urb->hcpriv = stream; 1825 urb->hcpriv = stream;
1828 1826
1829 ++ehci->isoc_count; 1827 ++ehci->isoc_count;
@@ -1855,19 +1853,19 @@ static bool itd_complete(struct ehci_hcd *ehci, struct ehci_itd *itd)
1855 1853
1856 /* for each uframe with a packet */ 1854 /* for each uframe with a packet */
1857 for (uframe = 0; uframe < 8; uframe++) { 1855 for (uframe = 0; uframe < 8; uframe++) {
1858 if (likely (itd->index[uframe] == -1)) 1856 if (likely(itd->index[uframe] == -1))
1859 continue; 1857 continue;
1860 urb_index = itd->index[uframe]; 1858 urb_index = itd->index[uframe];
1861 desc = &urb->iso_frame_desc [urb_index]; 1859 desc = &urb->iso_frame_desc[urb_index];
1862 1860
1863 t = hc32_to_cpup(ehci, &itd->hw_transaction [uframe]); 1861 t = hc32_to_cpup(ehci, &itd->hw_transaction[uframe]);
1864 itd->hw_transaction [uframe] = 0; 1862 itd->hw_transaction[uframe] = 0;
1865 1863
1866 /* report transfer status */ 1864 /* report transfer status */
1867 if (unlikely (t & ISO_ERRS)) { 1865 if (unlikely(t & ISO_ERRS)) {
1868 urb->error_count++; 1866 urb->error_count++;
1869 if (t & EHCI_ISOC_BUF_ERR) 1867 if (t & EHCI_ISOC_BUF_ERR)
1870 desc->status = usb_pipein (urb->pipe) 1868 desc->status = usb_pipein(urb->pipe)
1871 ? -ENOSR /* hc couldn't read */ 1869 ? -ENOSR /* hc couldn't read */
1872 : -ECOMM; /* hc couldn't write */ 1870 : -ECOMM; /* hc couldn't write */
1873 else if (t & EHCI_ISOC_BABBLE) 1871 else if (t & EHCI_ISOC_BABBLE)
@@ -1880,7 +1878,7 @@ static bool itd_complete(struct ehci_hcd *ehci, struct ehci_itd *itd)
1880 desc->actual_length = EHCI_ITD_LENGTH(t); 1878 desc->actual_length = EHCI_ITD_LENGTH(t);
1881 urb->actual_length += desc->actual_length; 1879 urb->actual_length += desc->actual_length;
1882 } 1880 }
1883 } else if (likely ((t & EHCI_ISOC_ACTIVE) == 0)) { 1881 } else if (likely((t & EHCI_ISOC_ACTIVE) == 0)) {
1884 desc->status = 0; 1882 desc->status = 0;
1885 desc->actual_length = EHCI_ITD_LENGTH(t); 1883 desc->actual_length = EHCI_ITD_LENGTH(t);
1886 urb->actual_length += desc->actual_length; 1884 urb->actual_length += desc->actual_length;
@@ -1891,12 +1889,13 @@ static bool itd_complete(struct ehci_hcd *ehci, struct ehci_itd *itd)
1891 } 1889 }
1892 1890
1893 /* handle completion now? */ 1891 /* handle completion now? */
1894 if (likely ((urb_index + 1) != urb->number_of_packets)) 1892 if (likely((urb_index + 1) != urb->number_of_packets))
1895 goto done; 1893 goto done;
1896 1894
1897 /* ASSERT: it's really the last itd for this urb 1895 /*
1898 list_for_each_entry (itd, &stream->td_list, itd_list) 1896 * ASSERT: it's really the last itd for this urb
1899 BUG_ON (itd->urb == urb); 1897 * list_for_each_entry (itd, &stream->td_list, itd_list)
1898 * BUG_ON(itd->urb == urb);
1900 */ 1899 */
1901 1900
1902 /* give urb back to the driver; completion often (re)submits */ 1901 /* give urb back to the driver; completion often (re)submits */
@@ -1936,7 +1935,7 @@ done:
1936 1935
1937/*-------------------------------------------------------------------------*/ 1936/*-------------------------------------------------------------------------*/
1938 1937
1939static int itd_submit (struct ehci_hcd *ehci, struct urb *urb, 1938static int itd_submit(struct ehci_hcd *ehci, struct urb *urb,
1940 gfp_t mem_flags) 1939 gfp_t mem_flags)
1941{ 1940{
1942 int status = -EINVAL; 1941 int status = -EINVAL;
@@ -1944,37 +1943,37 @@ static int itd_submit (struct ehci_hcd *ehci, struct urb *urb,
1944 struct ehci_iso_stream *stream; 1943 struct ehci_iso_stream *stream;
1945 1944
1946 /* Get iso_stream head */ 1945 /* Get iso_stream head */
1947 stream = iso_stream_find (ehci, urb); 1946 stream = iso_stream_find(ehci, urb);
1948 if (unlikely (stream == NULL)) { 1947 if (unlikely(stream == NULL)) {
1949 ehci_dbg (ehci, "can't get iso stream\n"); 1948 ehci_dbg(ehci, "can't get iso stream\n");
1950 return -ENOMEM; 1949 return -ENOMEM;
1951 } 1950 }
1952 if (unlikely(urb->interval != stream->uperiod)) { 1951 if (unlikely(urb->interval != stream->uperiod)) {
1953 ehci_dbg (ehci, "can't change iso interval %d --> %d\n", 1952 ehci_dbg(ehci, "can't change iso interval %d --> %d\n",
1954 stream->uperiod, urb->interval); 1953 stream->uperiod, urb->interval);
1955 goto done; 1954 goto done;
1956 } 1955 }
1957 1956
1958#ifdef EHCI_URB_TRACE 1957#ifdef EHCI_URB_TRACE
1959 ehci_dbg (ehci, 1958 ehci_dbg(ehci,
1960 "%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n", 1959 "%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n",
1961 __func__, urb->dev->devpath, urb, 1960 __func__, urb->dev->devpath, urb,
1962 usb_pipeendpoint (urb->pipe), 1961 usb_pipeendpoint(urb->pipe),
1963 usb_pipein (urb->pipe) ? "in" : "out", 1962 usb_pipein(urb->pipe) ? "in" : "out",
1964 urb->transfer_buffer_length, 1963 urb->transfer_buffer_length,
1965 urb->number_of_packets, urb->interval, 1964 urb->number_of_packets, urb->interval,
1966 stream); 1965 stream);
1967#endif 1966#endif
1968 1967
1969 /* allocate ITDs w/o locking anything */ 1968 /* allocate ITDs w/o locking anything */
1970 status = itd_urb_transaction (stream, ehci, urb, mem_flags); 1969 status = itd_urb_transaction(stream, ehci, urb, mem_flags);
1971 if (unlikely (status < 0)) { 1970 if (unlikely(status < 0)) {
1972 ehci_dbg (ehci, "can't init itds\n"); 1971 ehci_dbg(ehci, "can't init itds\n");
1973 goto done; 1972 goto done;
1974 } 1973 }
1975 1974
1976 /* schedule ... need to lock */ 1975 /* schedule ... need to lock */
1977 spin_lock_irqsave (&ehci->lock, flags); 1976 spin_lock_irqsave(&ehci->lock, flags);
1978 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) { 1977 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
1979 status = -ESHUTDOWN; 1978 status = -ESHUTDOWN;
1980 goto done_not_linked; 1979 goto done_not_linked;
@@ -1984,7 +1983,7 @@ static int itd_submit (struct ehci_hcd *ehci, struct urb *urb,
1984 goto done_not_linked; 1983 goto done_not_linked;
1985 status = iso_stream_schedule(ehci, urb, stream); 1984 status = iso_stream_schedule(ehci, urb, stream);
1986 if (likely(status == 0)) { 1985 if (likely(status == 0)) {
1987 itd_link_urb (ehci, urb, ehci->periodic_size << 3, stream); 1986 itd_link_urb(ehci, urb, ehci->periodic_size << 3, stream);
1988 } else if (status > 0) { 1987 } else if (status > 0) {
1989 status = 0; 1988 status = 0;
1990 ehci_urb_done(ehci, urb, 0); 1989 ehci_urb_done(ehci, urb, 0);
@@ -1992,7 +1991,7 @@ static int itd_submit (struct ehci_hcd *ehci, struct urb *urb,
1992 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb); 1991 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1993 } 1992 }
1994 done_not_linked: 1993 done_not_linked:
1995 spin_unlock_irqrestore (&ehci->lock, flags); 1994 spin_unlock_irqrestore(&ehci->lock, flags);
1996 done: 1995 done:
1997 return status; 1996 return status;
1998} 1997}
@@ -2022,13 +2021,13 @@ sitd_sched_init(
2022 * when we fit new sitds into the schedule. 2021 * when we fit new sitds into the schedule.
2023 */ 2022 */
2024 for (i = 0; i < urb->number_of_packets; i++) { 2023 for (i = 0; i < urb->number_of_packets; i++) {
2025 struct ehci_iso_packet *packet = &iso_sched->packet [i]; 2024 struct ehci_iso_packet *packet = &iso_sched->packet[i];
2026 unsigned length; 2025 unsigned length;
2027 dma_addr_t buf; 2026 dma_addr_t buf;
2028 u32 trans; 2027 u32 trans;
2029 2028
2030 length = urb->iso_frame_desc [i].length & 0x03ff; 2029 length = urb->iso_frame_desc[i].length & 0x03ff;
2031 buf = dma + urb->iso_frame_desc [i].offset; 2030 buf = dma + urb->iso_frame_desc[i].offset;
2032 2031
2033 trans = SITD_STS_ACTIVE; 2032 trans = SITD_STS_ACTIVE;
2034 if (((i + 1) == urb->number_of_packets) 2033 if (((i + 1) == urb->number_of_packets)
@@ -2054,7 +2053,7 @@ sitd_sched_init(
2054} 2053}
2055 2054
2056static int 2055static int
2057sitd_urb_transaction ( 2056sitd_urb_transaction(
2058 struct ehci_iso_stream *stream, 2057 struct ehci_iso_stream *stream,
2059 struct ehci_hcd *ehci, 2058 struct ehci_hcd *ehci,
2060 struct urb *urb, 2059 struct urb *urb,
@@ -2067,14 +2066,14 @@ sitd_urb_transaction (
2067 struct ehci_iso_sched *iso_sched; 2066 struct ehci_iso_sched *iso_sched;
2068 unsigned long flags; 2067 unsigned long flags;
2069 2068
2070 iso_sched = iso_sched_alloc (urb->number_of_packets, mem_flags); 2069 iso_sched = iso_sched_alloc(urb->number_of_packets, mem_flags);
2071 if (iso_sched == NULL) 2070 if (iso_sched == NULL)
2072 return -ENOMEM; 2071 return -ENOMEM;
2073 2072
2074 sitd_sched_init(ehci, iso_sched, stream, urb); 2073 sitd_sched_init(ehci, iso_sched, stream, urb);
2075 2074
2076 /* allocate/init sITDs */ 2075 /* allocate/init sITDs */
2077 spin_lock_irqsave (&ehci->lock, flags); 2076 spin_lock_irqsave(&ehci->lock, flags);
2078 for (i = 0; i < urb->number_of_packets; i++) { 2077 for (i = 0; i < urb->number_of_packets; i++) {
2079 2078
2080 /* NOTE: for now, we don't try to handle wraparound cases 2079 /* NOTE: for now, we don't try to handle wraparound cases
@@ -2091,14 +2090,14 @@ sitd_urb_transaction (
2091 struct ehci_sitd, sitd_list); 2090 struct ehci_sitd, sitd_list);
2092 if (sitd->frame == ehci->now_frame) 2091 if (sitd->frame == ehci->now_frame)
2093 goto alloc_sitd; 2092 goto alloc_sitd;
2094 list_del (&sitd->sitd_list); 2093 list_del(&sitd->sitd_list);
2095 sitd_dma = sitd->sitd_dma; 2094 sitd_dma = sitd->sitd_dma;
2096 } else { 2095 } else {
2097 alloc_sitd: 2096 alloc_sitd:
2098 spin_unlock_irqrestore (&ehci->lock, flags); 2097 spin_unlock_irqrestore(&ehci->lock, flags);
2099 sitd = dma_pool_alloc (ehci->sitd_pool, mem_flags, 2098 sitd = dma_pool_alloc(ehci->sitd_pool, mem_flags,
2100 &sitd_dma); 2099 &sitd_dma);
2101 spin_lock_irqsave (&ehci->lock, flags); 2100 spin_lock_irqsave(&ehci->lock, flags);
2102 if (!sitd) { 2101 if (!sitd) {
2103 iso_sched_free(stream, iso_sched); 2102 iso_sched_free(stream, iso_sched);
2104 spin_unlock_irqrestore(&ehci->lock, flags); 2103 spin_unlock_irqrestore(&ehci->lock, flags);
@@ -2106,17 +2105,17 @@ sitd_urb_transaction (
2106 } 2105 }
2107 } 2106 }
2108 2107
2109 memset (sitd, 0, sizeof *sitd); 2108 memset(sitd, 0, sizeof(*sitd));
2110 sitd->sitd_dma = sitd_dma; 2109 sitd->sitd_dma = sitd_dma;
2111 sitd->frame = NO_FRAME; 2110 sitd->frame = NO_FRAME;
2112 list_add (&sitd->sitd_list, &iso_sched->td_list); 2111 list_add(&sitd->sitd_list, &iso_sched->td_list);
2113 } 2112 }
2114 2113
2115 /* temporarily store schedule info in hcpriv */ 2114 /* temporarily store schedule info in hcpriv */
2116 urb->hcpriv = iso_sched; 2115 urb->hcpriv = iso_sched;
2117 urb->error_count = 0; 2116 urb->error_count = 0;
2118 2117
2119 spin_unlock_irqrestore (&ehci->lock, flags); 2118 spin_unlock_irqrestore(&ehci->lock, flags);
2120 return 0; 2119 return 0;
2121} 2120}
2122 2121
@@ -2131,8 +2130,8 @@ sitd_patch(
2131 unsigned index 2130 unsigned index
2132) 2131)
2133{ 2132{
2134 struct ehci_iso_packet *uf = &iso_sched->packet [index]; 2133 struct ehci_iso_packet *uf = &iso_sched->packet[index];
2135 u64 bufp = uf->bufp; 2134 u64 bufp;
2136 2135
2137 sitd->hw_next = EHCI_LIST_END(ehci); 2136 sitd->hw_next = EHCI_LIST_END(ehci);
2138 sitd->hw_fullspeed_ep = stream->address; 2137 sitd->hw_fullspeed_ep = stream->address;
@@ -2152,14 +2151,14 @@ sitd_patch(
2152} 2151}
2153 2152
2154static inline void 2153static inline void
2155sitd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_sitd *sitd) 2154sitd_link(struct ehci_hcd *ehci, unsigned frame, struct ehci_sitd *sitd)
2156{ 2155{
2157 /* note: sitd ordering could matter (CSPLIT then SSPLIT) */ 2156 /* note: sitd ordering could matter (CSPLIT then SSPLIT) */
2158 sitd->sitd_next = ehci->pshadow [frame]; 2157 sitd->sitd_next = ehci->pshadow[frame];
2159 sitd->hw_next = ehci->periodic [frame]; 2158 sitd->hw_next = ehci->periodic[frame];
2160 ehci->pshadow [frame].sitd = sitd; 2159 ehci->pshadow[frame].sitd = sitd;
2161 sitd->frame = frame; 2160 sitd->frame = frame;
2162 wmb (); 2161 wmb();
2163 ehci->periodic[frame] = cpu_to_hc32(ehci, sitd->sitd_dma | Q_TYPE_SITD); 2162 ehci->periodic[frame] = cpu_to_hc32(ehci, sitd->sitd_dma | Q_TYPE_SITD);
2164} 2163}
2165 2164
@@ -2196,13 +2195,13 @@ static void sitd_link_urb(
2196 packet++) { 2195 packet++) {
2197 2196
2198 /* ASSERT: we have all necessary sitds */ 2197 /* ASSERT: we have all necessary sitds */
2199 BUG_ON (list_empty (&sched->td_list)); 2198 BUG_ON(list_empty(&sched->td_list));
2200 2199
2201 /* ASSERT: no itds for this endpoint in this frame */ 2200 /* ASSERT: no itds for this endpoint in this frame */
2202 2201
2203 sitd = list_entry (sched->td_list.next, 2202 sitd = list_entry(sched->td_list.next,
2204 struct ehci_sitd, sitd_list); 2203 struct ehci_sitd, sitd_list);
2205 list_move_tail (&sitd->sitd_list, &stream->td_list); 2204 list_move_tail(&sitd->sitd_list, &stream->td_list);
2206 sitd->stream = stream; 2205 sitd->stream = stream;
2207 sitd->urb = urb; 2206 sitd->urb = urb;
2208 2207
@@ -2215,7 +2214,7 @@ static void sitd_link_urb(
2215 stream->next_uframe = next_uframe & (mod - 1); 2214 stream->next_uframe = next_uframe & (mod - 1);
2216 2215
2217 /* don't need that schedule data any more */ 2216 /* don't need that schedule data any more */
2218 iso_sched_free (stream, sched); 2217 iso_sched_free(stream, sched);
2219 urb->hcpriv = stream; 2218 urb->hcpriv = stream;
2220 2219
2221 ++ehci->isoc_count; 2220 ++ehci->isoc_count;
@@ -2242,20 +2241,20 @@ static bool sitd_complete(struct ehci_hcd *ehci, struct ehci_sitd *sitd)
2242 struct urb *urb = sitd->urb; 2241 struct urb *urb = sitd->urb;
2243 struct usb_iso_packet_descriptor *desc; 2242 struct usb_iso_packet_descriptor *desc;
2244 u32 t; 2243 u32 t;
2245 int urb_index = -1; 2244 int urb_index;
2246 struct ehci_iso_stream *stream = sitd->stream; 2245 struct ehci_iso_stream *stream = sitd->stream;
2247 struct usb_device *dev; 2246 struct usb_device *dev;
2248 bool retval = false; 2247 bool retval = false;
2249 2248
2250 urb_index = sitd->index; 2249 urb_index = sitd->index;
2251 desc = &urb->iso_frame_desc [urb_index]; 2250 desc = &urb->iso_frame_desc[urb_index];
2252 t = hc32_to_cpup(ehci, &sitd->hw_results); 2251 t = hc32_to_cpup(ehci, &sitd->hw_results);
2253 2252
2254 /* report transfer status */ 2253 /* report transfer status */
2255 if (unlikely(t & SITD_ERRS)) { 2254 if (unlikely(t & SITD_ERRS)) {
2256 urb->error_count++; 2255 urb->error_count++;
2257 if (t & SITD_STS_DBE) 2256 if (t & SITD_STS_DBE)
2258 desc->status = usb_pipein (urb->pipe) 2257 desc->status = usb_pipein(urb->pipe)
2259 ? -ENOSR /* hc couldn't read */ 2258 ? -ENOSR /* hc couldn't read */
2260 : -ECOMM; /* hc couldn't write */ 2259 : -ECOMM; /* hc couldn't write */
2261 else if (t & SITD_STS_BABBLE) 2260 else if (t & SITD_STS_BABBLE)
@@ -2275,9 +2274,10 @@ static bool sitd_complete(struct ehci_hcd *ehci, struct ehci_sitd *sitd)
2275 if ((urb_index + 1) != urb->number_of_packets) 2274 if ((urb_index + 1) != urb->number_of_packets)
2276 goto done; 2275 goto done;
2277 2276
2278 /* ASSERT: it's really the last sitd for this urb 2277 /*
2279 list_for_each_entry (sitd, &stream->td_list, sitd_list) 2278 * ASSERT: it's really the last sitd for this urb
2280 BUG_ON (sitd->urb == urb); 2279 * list_for_each_entry (sitd, &stream->td_list, sitd_list)
2280 * BUG_ON(sitd->urb == urb);
2281 */ 2281 */
2282 2282
2283 /* give urb back to the driver; completion often (re)submits */ 2283 /* give urb back to the driver; completion often (re)submits */
@@ -2316,7 +2316,7 @@ done:
2316} 2316}
2317 2317
2318 2318
2319static int sitd_submit (struct ehci_hcd *ehci, struct urb *urb, 2319static int sitd_submit(struct ehci_hcd *ehci, struct urb *urb,
2320 gfp_t mem_flags) 2320 gfp_t mem_flags)
2321{ 2321{
2322 int status = -EINVAL; 2322 int status = -EINVAL;
@@ -2324,35 +2324,35 @@ static int sitd_submit (struct ehci_hcd *ehci, struct urb *urb,
2324 struct ehci_iso_stream *stream; 2324 struct ehci_iso_stream *stream;
2325 2325
2326 /* Get iso_stream head */ 2326 /* Get iso_stream head */
2327 stream = iso_stream_find (ehci, urb); 2327 stream = iso_stream_find(ehci, urb);
2328 if (stream == NULL) { 2328 if (stream == NULL) {
2329 ehci_dbg (ehci, "can't get iso stream\n"); 2329 ehci_dbg(ehci, "can't get iso stream\n");
2330 return -ENOMEM; 2330 return -ENOMEM;
2331 } 2331 }
2332 if (urb->interval != stream->ps.period) { 2332 if (urb->interval != stream->ps.period) {
2333 ehci_dbg (ehci, "can't change iso interval %d --> %d\n", 2333 ehci_dbg(ehci, "can't change iso interval %d --> %d\n",
2334 stream->ps.period, urb->interval); 2334 stream->ps.period, urb->interval);
2335 goto done; 2335 goto done;
2336 } 2336 }
2337 2337
2338#ifdef EHCI_URB_TRACE 2338#ifdef EHCI_URB_TRACE
2339 ehci_dbg (ehci, 2339 ehci_dbg(ehci,
2340 "submit %p dev%s ep%d%s-iso len %d\n", 2340 "submit %p dev%s ep%d%s-iso len %d\n",
2341 urb, urb->dev->devpath, 2341 urb, urb->dev->devpath,
2342 usb_pipeendpoint (urb->pipe), 2342 usb_pipeendpoint(urb->pipe),
2343 usb_pipein (urb->pipe) ? "in" : "out", 2343 usb_pipein(urb->pipe) ? "in" : "out",
2344 urb->transfer_buffer_length); 2344 urb->transfer_buffer_length);
2345#endif 2345#endif
2346 2346
2347 /* allocate SITDs */ 2347 /* allocate SITDs */
2348 status = sitd_urb_transaction (stream, ehci, urb, mem_flags); 2348 status = sitd_urb_transaction(stream, ehci, urb, mem_flags);
2349 if (status < 0) { 2349 if (status < 0) {
2350 ehci_dbg (ehci, "can't init sitds\n"); 2350 ehci_dbg(ehci, "can't init sitds\n");
2351 goto done; 2351 goto done;
2352 } 2352 }
2353 2353
2354 /* schedule ... need to lock */ 2354 /* schedule ... need to lock */
2355 spin_lock_irqsave (&ehci->lock, flags); 2355 spin_lock_irqsave(&ehci->lock, flags);
2356 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) { 2356 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
2357 status = -ESHUTDOWN; 2357 status = -ESHUTDOWN;
2358 goto done_not_linked; 2358 goto done_not_linked;
@@ -2362,7 +2362,7 @@ static int sitd_submit (struct ehci_hcd *ehci, struct urb *urb,
2362 goto done_not_linked; 2362 goto done_not_linked;
2363 status = iso_stream_schedule(ehci, urb, stream); 2363 status = iso_stream_schedule(ehci, urb, stream);
2364 if (likely(status == 0)) { 2364 if (likely(status == 0)) {
2365 sitd_link_urb (ehci, urb, ehci->periodic_size << 3, stream); 2365 sitd_link_urb(ehci, urb, ehci->periodic_size << 3, stream);
2366 } else if (status > 0) { 2366 } else if (status > 0) {
2367 status = 0; 2367 status = 0;
2368 ehci_urb_done(ehci, urb, 0); 2368 ehci_urb_done(ehci, urb, 0);
@@ -2370,7 +2370,7 @@ static int sitd_submit (struct ehci_hcd *ehci, struct urb *urb,
2370 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb); 2370 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
2371 } 2371 }
2372 done_not_linked: 2372 done_not_linked:
2373 spin_unlock_irqrestore (&ehci->lock, flags); 2373 spin_unlock_irqrestore(&ehci->lock, flags);
2374 done: 2374 done:
2375 return status; 2375 return status;
2376} 2376}
@@ -2379,9 +2379,11 @@ static int sitd_submit (struct ehci_hcd *ehci, struct urb *urb,
2379 2379
2380static void scan_isoc(struct ehci_hcd *ehci) 2380static void scan_isoc(struct ehci_hcd *ehci)
2381{ 2381{
2382 unsigned uf, now_frame, frame; 2382 unsigned uf, now_frame, frame;
2383 unsigned fmask = ehci->periodic_size - 1; 2383 unsigned fmask = ehci->periodic_size - 1;
2384 bool modified, live; 2384 bool modified, live;
2385 union ehci_shadow q, *q_p;
2386 __hc32 type, *hw_p;
2385 2387
2386 /* 2388 /*
2387 * When running, scan from last scan point up to "now" 2389 * When running, scan from last scan point up to "now"
@@ -2399,119 +2401,117 @@ static void scan_isoc(struct ehci_hcd *ehci)
2399 ehci->now_frame = now_frame; 2401 ehci->now_frame = now_frame;
2400 2402
2401 frame = ehci->last_iso_frame; 2403 frame = ehci->last_iso_frame;
2402 for (;;) {
2403 union ehci_shadow q, *q_p;
2404 __hc32 type, *hw_p;
2405 2404
2406restart: 2405restart:
2407 /* scan each element in frame's queue for completions */ 2406 /* Scan each element in frame's queue for completions */
2408 q_p = &ehci->pshadow [frame]; 2407 q_p = &ehci->pshadow[frame];
2409 hw_p = &ehci->periodic [frame]; 2408 hw_p = &ehci->periodic[frame];
2410 q.ptr = q_p->ptr; 2409 q.ptr = q_p->ptr;
2411 type = Q_NEXT_TYPE(ehci, *hw_p); 2410 type = Q_NEXT_TYPE(ehci, *hw_p);
2412 modified = false; 2411 modified = false;
2413 2412
2414 while (q.ptr != NULL) { 2413 while (q.ptr != NULL) {
2415 switch (hc32_to_cpu(ehci, type)) { 2414 switch (hc32_to_cpu(ehci, type)) {
2416 case Q_TYPE_ITD: 2415 case Q_TYPE_ITD:
2417 /* If this ITD is still active, leave it for 2416 /*
2418 * later processing ... check the next entry. 2417 * If this ITD is still active, leave it for
2419 * No need to check for activity unless the 2418 * later processing ... check the next entry.
2420 * frame is current. 2419 * No need to check for activity unless the
2421 */ 2420 * frame is current.
2422 if (frame == now_frame && live) { 2421 */
2423 rmb(); 2422 if (frame == now_frame && live) {
2424 for (uf = 0; uf < 8; uf++) { 2423 rmb();
2425 if (q.itd->hw_transaction[uf] & 2424 for (uf = 0; uf < 8; uf++) {
2426 ITD_ACTIVE(ehci)) 2425 if (q.itd->hw_transaction[uf] &
2427 break; 2426 ITD_ACTIVE(ehci))
2428 }
2429 if (uf < 8) {
2430 q_p = &q.itd->itd_next;
2431 hw_p = &q.itd->hw_next;
2432 type = Q_NEXT_TYPE(ehci,
2433 q.itd->hw_next);
2434 q = *q_p;
2435 break; 2427 break;
2436 }
2437 } 2428 }
2438 2429 if (uf < 8) {
2439 /* Take finished ITDs out of the schedule 2430 q_p = &q.itd->itd_next;
2440 * and process them: recycle, maybe report 2431 hw_p = &q.itd->hw_next;
2441 * URB completion. HC won't cache the
2442 * pointer for much longer, if at all.
2443 */
2444 *q_p = q.itd->itd_next;
2445 if (!ehci->use_dummy_qh ||
2446 q.itd->hw_next != EHCI_LIST_END(ehci))
2447 *hw_p = q.itd->hw_next;
2448 else
2449 *hw_p = cpu_to_hc32(ehci,
2450 ehci->dummy->qh_dma);
2451 type = Q_NEXT_TYPE(ehci, q.itd->hw_next);
2452 wmb();
2453 modified = itd_complete (ehci, q.itd);
2454 q = *q_p;
2455 break;
2456 case Q_TYPE_SITD:
2457 /* If this SITD is still active, leave it for
2458 * later processing ... check the next entry.
2459 * No need to check for activity unless the
2460 * frame is current.
2461 */
2462 if (((frame == now_frame) ||
2463 (((frame + 1) & fmask) == now_frame))
2464 && live
2465 && (q.sitd->hw_results &
2466 SITD_ACTIVE(ehci))) {
2467
2468 q_p = &q.sitd->sitd_next;
2469 hw_p = &q.sitd->hw_next;
2470 type = Q_NEXT_TYPE(ehci, 2432 type = Q_NEXT_TYPE(ehci,
2471 q.sitd->hw_next); 2433 q.itd->hw_next);
2472 q = *q_p; 2434 q = *q_p;
2473 break; 2435 break;
2474 } 2436 }
2437 }
2438
2439 /*
2440 * Take finished ITDs out of the schedule
2441 * and process them: recycle, maybe report
2442 * URB completion. HC won't cache the
2443 * pointer for much longer, if at all.
2444 */
2445 *q_p = q.itd->itd_next;
2446 if (!ehci->use_dummy_qh ||
2447 q.itd->hw_next != EHCI_LIST_END(ehci))
2448 *hw_p = q.itd->hw_next;
2449 else
2450 *hw_p = cpu_to_hc32(ehci, ehci->dummy->qh_dma);
2451 type = Q_NEXT_TYPE(ehci, q.itd->hw_next);
2452 wmb();
2453 modified = itd_complete(ehci, q.itd);
2454 q = *q_p;
2455 break;
2456 case Q_TYPE_SITD:
2457 /*
2458 * If this SITD is still active, leave it for
2459 * later processing ... check the next entry.
2460 * No need to check for activity unless the
2461 * frame is current.
2462 */
2463 if (((frame == now_frame) ||
2464 (((frame + 1) & fmask) == now_frame))
2465 && live
2466 && (q.sitd->hw_results & SITD_ACTIVE(ehci))) {
2475 2467
2476 /* Take finished SITDs out of the schedule 2468 q_p = &q.sitd->sitd_next;
2477 * and process them: recycle, maybe report 2469 hw_p = &q.sitd->hw_next;
2478 * URB completion.
2479 */
2480 *q_p = q.sitd->sitd_next;
2481 if (!ehci->use_dummy_qh ||
2482 q.sitd->hw_next != EHCI_LIST_END(ehci))
2483 *hw_p = q.sitd->hw_next;
2484 else
2485 *hw_p = cpu_to_hc32(ehci,
2486 ehci->dummy->qh_dma);
2487 type = Q_NEXT_TYPE(ehci, q.sitd->hw_next); 2470 type = Q_NEXT_TYPE(ehci, q.sitd->hw_next);
2488 wmb();
2489 modified = sitd_complete (ehci, q.sitd);
2490 q = *q_p; 2471 q = *q_p;
2491 break; 2472 break;
2492 default:
2493 ehci_dbg(ehci, "corrupt type %d frame %d shadow %p\n",
2494 type, frame, q.ptr);
2495 // BUG ();
2496 /* FALL THROUGH */
2497 case Q_TYPE_QH:
2498 case Q_TYPE_FSTN:
2499 /* End of the iTDs and siTDs */
2500 q.ptr = NULL;
2501 break;
2502 } 2473 }
2503 2474
2504 /* assume completion callbacks modify the queue */ 2475 /*
2505 if (unlikely(modified && ehci->isoc_count > 0)) 2476 * Take finished SITDs out of the schedule
2506 goto restart; 2477 * and process them: recycle, maybe report
2507 } 2478 * URB completion.
2508 2479 */
2509 /* Stop when we have reached the current frame */ 2480 *q_p = q.sitd->sitd_next;
2510 if (frame == now_frame) 2481 if (!ehci->use_dummy_qh ||
2482 q.sitd->hw_next != EHCI_LIST_END(ehci))
2483 *hw_p = q.sitd->hw_next;
2484 else
2485 *hw_p = cpu_to_hc32(ehci, ehci->dummy->qh_dma);
2486 type = Q_NEXT_TYPE(ehci, q.sitd->hw_next);
2487 wmb();
2488 modified = sitd_complete(ehci, q.sitd);
2489 q = *q_p;
2490 break;
2491 default:
2492 ehci_dbg(ehci, "corrupt type %d frame %d shadow %p\n",
2493 type, frame, q.ptr);
2494 /* BUG(); */
2495 /* FALL THROUGH */
2496 case Q_TYPE_QH:
2497 case Q_TYPE_FSTN:
2498 /* End of the iTDs and siTDs */
2499 q.ptr = NULL;
2511 break; 2500 break;
2501 }
2512 2502
2513 /* The last frame may still have active siTDs */ 2503 /* Assume completion callbacks modify the queue */
2514 ehci->last_iso_frame = frame; 2504 if (unlikely(modified && ehci->isoc_count > 0))
2515 frame = (frame + 1) & fmask; 2505 goto restart;
2516 } 2506 }
2507
2508 /* Stop when we have reached the current frame */
2509 if (frame == now_frame)
2510 return;
2511
2512 /* The last frame may still have active siTDs */
2513 ehci->last_iso_frame = frame;
2514 frame = (frame + 1) & fmask;
2515
2516 goto restart;
2517} 2517}
diff --git a/drivers/usb/host/ehci-st.c b/drivers/usb/host/ehci-st.c
index b7c5cfa37a83..a94ed677d937 100644
--- a/drivers/usb/host/ehci-st.c
+++ b/drivers/usb/host/ehci-st.c
@@ -287,8 +287,7 @@ static int st_ehci_suspend(struct device *dev)
287{ 287{
288 struct usb_hcd *hcd = dev_get_drvdata(dev); 288 struct usb_hcd *hcd = dev_get_drvdata(dev);
289 struct usb_ehci_pdata *pdata = dev_get_platdata(dev); 289 struct usb_ehci_pdata *pdata = dev_get_platdata(dev);
290 struct platform_device *pdev = 290 struct platform_device *pdev = to_platform_device(dev);
291 container_of(dev, struct platform_device, dev);
292 bool do_wakeup = device_may_wakeup(dev); 291 bool do_wakeup = device_may_wakeup(dev);
293 int ret; 292 int ret;
294 293
@@ -308,8 +307,7 @@ static int st_ehci_resume(struct device *dev)
308{ 307{
309 struct usb_hcd *hcd = dev_get_drvdata(dev); 308 struct usb_hcd *hcd = dev_get_drvdata(dev);
310 struct usb_ehci_pdata *pdata = dev_get_platdata(dev); 309 struct usb_ehci_pdata *pdata = dev_get_platdata(dev);
311 struct platform_device *pdev = 310 struct platform_device *pdev = to_platform_device(dev);
312 container_of(dev, struct platform_device, dev);
313 int err; 311 int err;
314 312
315 pinctrl_pm_select_default_state(dev); 313 pinctrl_pm_select_default_state(dev);
diff --git a/drivers/usb/host/ehci-timer.c b/drivers/usb/host/ehci-timer.c
index 424ac5d83714..69f50e6533a6 100644
--- a/drivers/usb/host/ehci-timer.c
+++ b/drivers/usb/host/ehci-timer.c
@@ -72,6 +72,7 @@ static unsigned event_delays_ns[] = {
72 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_DEAD */ 72 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_DEAD */
73 1125 * NSEC_PER_USEC, /* EHCI_HRTIMER_UNLINK_INTR */ 73 1125 * NSEC_PER_USEC, /* EHCI_HRTIMER_UNLINK_INTR */
74 2 * NSEC_PER_MSEC, /* EHCI_HRTIMER_FREE_ITDS */ 74 2 * NSEC_PER_MSEC, /* EHCI_HRTIMER_FREE_ITDS */
75 2 * NSEC_PER_MSEC, /* EHCI_HRTIMER_ACTIVE_UNLINK */
75 5 * NSEC_PER_MSEC, /* EHCI_HRTIMER_START_UNLINK_INTR */ 76 5 * NSEC_PER_MSEC, /* EHCI_HRTIMER_START_UNLINK_INTR */
76 6 * NSEC_PER_MSEC, /* EHCI_HRTIMER_ASYNC_UNLINKS */ 77 6 * NSEC_PER_MSEC, /* EHCI_HRTIMER_ASYNC_UNLINKS */
77 10 * NSEC_PER_MSEC, /* EHCI_HRTIMER_IAA_WATCHDOG */ 78 10 * NSEC_PER_MSEC, /* EHCI_HRTIMER_IAA_WATCHDOG */
@@ -237,6 +238,7 @@ static void ehci_handle_start_intr_unlinks(struct ehci_hcd *ehci)
237 ehci->intr_unlink_wait_cycle)) 238 ehci->intr_unlink_wait_cycle))
238 break; 239 break;
239 list_del_init(&qh->unlink_node); 240 list_del_init(&qh->unlink_node);
241 qh->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
240 start_unlink_intr(ehci, qh); 242 start_unlink_intr(ehci, qh);
241 } 243 }
242 244
@@ -360,7 +362,7 @@ static void ehci_iaa_watchdog(struct ehci_hcd *ehci)
360 } 362 }
361 363
362 ehci_dbg(ehci, "IAA watchdog: status %x cmd %x\n", status, cmd); 364 ehci_dbg(ehci, "IAA watchdog: status %x cmd %x\n", status, cmd);
363 end_unlink_async(ehci); 365 end_iaa_cycle(ehci);
364} 366}
365 367
366 368
@@ -394,6 +396,7 @@ static void (*event_handlers[])(struct ehci_hcd *) = {
394 ehci_handle_controller_death, /* EHCI_HRTIMER_POLL_DEAD */ 396 ehci_handle_controller_death, /* EHCI_HRTIMER_POLL_DEAD */
395 ehci_handle_intr_unlinks, /* EHCI_HRTIMER_UNLINK_INTR */ 397 ehci_handle_intr_unlinks, /* EHCI_HRTIMER_UNLINK_INTR */
396 end_free_itds, /* EHCI_HRTIMER_FREE_ITDS */ 398 end_free_itds, /* EHCI_HRTIMER_FREE_ITDS */
399 end_unlink_async, /* EHCI_HRTIMER_ACTIVE_UNLINK */
397 ehci_handle_start_intr_unlinks, /* EHCI_HRTIMER_START_UNLINK_INTR */ 400 ehci_handle_start_intr_unlinks, /* EHCI_HRTIMER_START_UNLINK_INTR */
398 unlink_empty_async, /* EHCI_HRTIMER_ASYNC_UNLINKS */ 401 unlink_empty_async, /* EHCI_HRTIMER_ASYNC_UNLINKS */
399 ehci_iaa_watchdog, /* EHCI_HRTIMER_IAA_WATCHDOG */ 402 ehci_iaa_watchdog, /* EHCI_HRTIMER_IAA_WATCHDOG */
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index ec61aedb0067..3f3b74aeca97 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -110,6 +110,7 @@ enum ehci_hrtimer_event {
110 EHCI_HRTIMER_POLL_DEAD, /* Wait for dead controller to stop */ 110 EHCI_HRTIMER_POLL_DEAD, /* Wait for dead controller to stop */
111 EHCI_HRTIMER_UNLINK_INTR, /* Wait for interrupt QH unlink */ 111 EHCI_HRTIMER_UNLINK_INTR, /* Wait for interrupt QH unlink */
112 EHCI_HRTIMER_FREE_ITDS, /* Wait for unused iTDs and siTDs */ 112 EHCI_HRTIMER_FREE_ITDS, /* Wait for unused iTDs and siTDs */
113 EHCI_HRTIMER_ACTIVE_UNLINK, /* Wait while unlinking an active QH */
113 EHCI_HRTIMER_START_UNLINK_INTR, /* Unlink empty interrupt QHs */ 114 EHCI_HRTIMER_START_UNLINK_INTR, /* Unlink empty interrupt QHs */
114 EHCI_HRTIMER_ASYNC_UNLINKS, /* Unlink empty async QHs */ 115 EHCI_HRTIMER_ASYNC_UNLINKS, /* Unlink empty async QHs */
115 EHCI_HRTIMER_IAA_WATCHDOG, /* Handle lost IAA interrupts */ 116 EHCI_HRTIMER_IAA_WATCHDOG, /* Handle lost IAA interrupts */
@@ -156,6 +157,8 @@ struct ehci_hcd { /* one per controller */
156 struct list_head async_idle; 157 struct list_head async_idle;
157 unsigned async_unlink_cycle; 158 unsigned async_unlink_cycle;
158 unsigned async_count; /* async activity count */ 159 unsigned async_count; /* async activity count */
160 __hc32 old_current; /* Test for QH becoming */
161 __hc32 old_token; /* inactive during unlink */
159 162
160 /* periodic schedule support */ 163 /* periodic schedule support */
161#define DEFAULT_I_TDPS 1024 /* some HCs can do less */ 164#define DEFAULT_I_TDPS 1024 /* some HCs can do less */
@@ -185,7 +188,7 @@ struct ehci_hcd { /* one per controller */
185 struct ehci_sitd *last_sitd_to_free; 188 struct ehci_sitd *last_sitd_to_free;
186 189
187 /* per root hub port */ 190 /* per root hub port */
188 unsigned long reset_done [EHCI_MAX_ROOT_PORTS]; 191 unsigned long reset_done[EHCI_MAX_ROOT_PORTS];
189 192
190 /* bit vectors (one bit per port) */ 193 /* bit vectors (one bit per port) */
191 unsigned long bus_suspended; /* which ports were 194 unsigned long bus_suspended; /* which ports were
@@ -244,9 +247,9 @@ struct ehci_hcd { /* one per controller */
244 /* irq statistics */ 247 /* irq statistics */
245#ifdef EHCI_STATS 248#ifdef EHCI_STATS
246 struct ehci_stats stats; 249 struct ehci_stats stats;
247# define COUNT(x) do { (x)++; } while (0) 250# define COUNT(x) ((x)++)
248#else 251#else
249# define COUNT(x) do {} while (0) 252# define COUNT(x)
250#endif 253#endif
251 254
252 /* debug files */ 255 /* debug files */
@@ -268,13 +271,13 @@ struct ehci_hcd { /* one per controller */
268}; 271};
269 272
270/* convert between an HCD pointer and the corresponding EHCI_HCD */ 273/* convert between an HCD pointer and the corresponding EHCI_HCD */
271static inline struct ehci_hcd *hcd_to_ehci (struct usb_hcd *hcd) 274static inline struct ehci_hcd *hcd_to_ehci(struct usb_hcd *hcd)
272{ 275{
273 return (struct ehci_hcd *) (hcd->hcd_priv); 276 return (struct ehci_hcd *) (hcd->hcd_priv);
274} 277}
275static inline struct usb_hcd *ehci_to_hcd (struct ehci_hcd *ehci) 278static inline struct usb_hcd *ehci_to_hcd(struct ehci_hcd *ehci)
276{ 279{
277 return container_of ((void *) ehci, struct usb_hcd, hcd_priv); 280 return container_of((void *) ehci, struct usb_hcd, hcd_priv);
278} 281}
279 282
280/*-------------------------------------------------------------------------*/ 283/*-------------------------------------------------------------------------*/
@@ -316,25 +319,25 @@ struct ehci_qtd {
316#define HALT_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_HALT) 319#define HALT_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_HALT)
317#define STATUS_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_STS) 320#define STATUS_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_STS)
318 321
319 __hc32 hw_buf [5]; /* see EHCI 3.5.4 */ 322 __hc32 hw_buf[5]; /* see EHCI 3.5.4 */
320 __hc32 hw_buf_hi [5]; /* Appendix B */ 323 __hc32 hw_buf_hi[5]; /* Appendix B */
321 324
322 /* the rest is HCD-private */ 325 /* the rest is HCD-private */
323 dma_addr_t qtd_dma; /* qtd address */ 326 dma_addr_t qtd_dma; /* qtd address */
324 struct list_head qtd_list; /* sw qtd list */ 327 struct list_head qtd_list; /* sw qtd list */
325 struct urb *urb; /* qtd's urb */ 328 struct urb *urb; /* qtd's urb */
326 size_t length; /* length of buffer */ 329 size_t length; /* length of buffer */
327} __attribute__ ((aligned (32))); 330} __aligned(32);
328 331
329/* mask NakCnt+T in qh->hw_alt_next */ 332/* mask NakCnt+T in qh->hw_alt_next */
330#define QTD_MASK(ehci) cpu_to_hc32 (ehci, ~0x1f) 333#define QTD_MASK(ehci) cpu_to_hc32(ehci, ~0x1f)
331 334
332#define IS_SHORT_READ(token) (QTD_LENGTH (token) != 0 && QTD_PID (token) == 1) 335#define IS_SHORT_READ(token) (QTD_LENGTH(token) != 0 && QTD_PID(token) == 1)
333 336
334/*-------------------------------------------------------------------------*/ 337/*-------------------------------------------------------------------------*/
335 338
336/* type tag from {qh,itd,sitd,fstn}->hw_next */ 339/* type tag from {qh,itd,sitd,fstn}->hw_next */
337#define Q_NEXT_TYPE(ehci,dma) ((dma) & cpu_to_hc32(ehci, 3 << 1)) 340#define Q_NEXT_TYPE(ehci, dma) ((dma) & cpu_to_hc32(ehci, 3 << 1))
338 341
339/* 342/*
340 * Now the following defines are not converted using the 343 * Now the following defines are not converted using the
@@ -350,7 +353,8 @@ struct ehci_qtd {
350#define Q_TYPE_FSTN (3 << 1) 353#define Q_TYPE_FSTN (3 << 1)
351 354
352/* next async queue entry, or pointer to interrupt/periodic QH */ 355/* next async queue entry, or pointer to interrupt/periodic QH */
353#define QH_NEXT(ehci,dma) (cpu_to_hc32(ehci, (((u32)dma)&~0x01f)|Q_TYPE_QH)) 356#define QH_NEXT(ehci, dma) \
357 (cpu_to_hc32(ehci, (((u32) dma) & ~0x01f) | Q_TYPE_QH))
354 358
355/* for periodic/async schedules and qtd lists, mark end of list */ 359/* for periodic/async schedules and qtd lists, mark end of list */
356#define EHCI_LIST_END(ehci) cpu_to_hc32(ehci, 1) /* "null pointer" to hw */ 360#define EHCI_LIST_END(ehci) cpu_to_hc32(ehci, 1) /* "null pointer" to hw */
@@ -405,9 +409,9 @@ struct ehci_qh_hw {
405 __hc32 hw_qtd_next; 409 __hc32 hw_qtd_next;
406 __hc32 hw_alt_next; 410 __hc32 hw_alt_next;
407 __hc32 hw_token; 411 __hc32 hw_token;
408 __hc32 hw_buf [5]; 412 __hc32 hw_buf[5];
409 __hc32 hw_buf_hi [5]; 413 __hc32 hw_buf_hi[5];
410} __attribute__ ((aligned(32))); 414} __aligned(32);
411 415
412struct ehci_qh { 416struct ehci_qh {
413 struct ehci_qh_hw *hw; /* Must come first */ 417 struct ehci_qh_hw *hw; /* Must come first */
@@ -432,13 +436,19 @@ struct ehci_qh {
432 u8 xacterrs; /* XactErr retry counter */ 436 u8 xacterrs; /* XactErr retry counter */
433#define QH_XACTERR_MAX 32 /* XactErr retry limit */ 437#define QH_XACTERR_MAX 32 /* XactErr retry limit */
434 438
439 u8 unlink_reason;
440#define QH_UNLINK_HALTED 0x01 /* Halt flag is set */
441#define QH_UNLINK_SHORT_READ 0x02 /* Recover from a short read */
442#define QH_UNLINK_DUMMY_OVERLAY 0x04 /* QH overlayed the dummy TD */
443#define QH_UNLINK_SHUTDOWN 0x08 /* The HC isn't running */
444#define QH_UNLINK_QUEUE_EMPTY 0x10 /* Reached end of the queue */
445#define QH_UNLINK_REQUESTED 0x20 /* Disable, reset, or dequeue */
446
435 u8 gap_uf; /* uframes split/csplit gap */ 447 u8 gap_uf; /* uframes split/csplit gap */
436 448
437 unsigned is_out:1; /* bulk or intr OUT */ 449 unsigned is_out:1; /* bulk or intr OUT */
438 unsigned clearing_tt:1; /* Clear-TT-Buf in progress */ 450 unsigned clearing_tt:1; /* Clear-TT-Buf in progress */
439 unsigned dequeue_during_giveback:1; 451 unsigned dequeue_during_giveback:1;
440 unsigned exception:1; /* got a fault, or an unlink
441 was requested */
442 unsigned should_be_inactive:1; 452 unsigned should_be_inactive:1;
443}; 453};
444 454
@@ -462,7 +472,7 @@ struct ehci_iso_sched {
462 struct list_head td_list; 472 struct list_head td_list;
463 unsigned span; 473 unsigned span;
464 unsigned first_packet; 474 unsigned first_packet;
465 struct ehci_iso_packet packet [0]; 475 struct ehci_iso_packet packet[0];
466}; 476};
467 477
468/* 478/*
@@ -510,7 +520,7 @@ struct ehci_iso_stream {
510struct ehci_itd { 520struct ehci_itd {
511 /* first part defined by EHCI spec */ 521 /* first part defined by EHCI spec */
512 __hc32 hw_next; /* see EHCI 3.3.1 */ 522 __hc32 hw_next; /* see EHCI 3.3.1 */
513 __hc32 hw_transaction [8]; /* see EHCI 3.3.2 */ 523 __hc32 hw_transaction[8]; /* see EHCI 3.3.2 */
514#define EHCI_ISOC_ACTIVE (1<<31) /* activate transfer this slot */ 524#define EHCI_ISOC_ACTIVE (1<<31) /* activate transfer this slot */
515#define EHCI_ISOC_BUF_ERR (1<<30) /* Data buffer error */ 525#define EHCI_ISOC_BUF_ERR (1<<30) /* Data buffer error */
516#define EHCI_ISOC_BABBLE (1<<29) /* babble detected */ 526#define EHCI_ISOC_BABBLE (1<<29) /* babble detected */
@@ -520,8 +530,8 @@ struct ehci_itd {
520 530
521#define ITD_ACTIVE(ehci) cpu_to_hc32(ehci, EHCI_ISOC_ACTIVE) 531#define ITD_ACTIVE(ehci) cpu_to_hc32(ehci, EHCI_ISOC_ACTIVE)
522 532
523 __hc32 hw_bufp [7]; /* see EHCI 3.3.3 */ 533 __hc32 hw_bufp[7]; /* see EHCI 3.3.3 */
524 __hc32 hw_bufp_hi [7]; /* Appendix B */ 534 __hc32 hw_bufp_hi[7]; /* Appendix B */
525 535
526 /* the rest is HCD-private */ 536 /* the rest is HCD-private */
527 dma_addr_t itd_dma; /* for this itd */ 537 dma_addr_t itd_dma; /* for this itd */
@@ -535,7 +545,7 @@ struct ehci_itd {
535 unsigned frame; /* where scheduled */ 545 unsigned frame; /* where scheduled */
536 unsigned pg; 546 unsigned pg;
537 unsigned index[8]; /* in urb->iso_frame_desc */ 547 unsigned index[8]; /* in urb->iso_frame_desc */
538} __attribute__ ((aligned (32))); 548} __aligned(32);
539 549
540/*-------------------------------------------------------------------------*/ 550/*-------------------------------------------------------------------------*/
541 551
@@ -554,7 +564,7 @@ struct ehci_sitd {
554 __hc32 hw_results; /* EHCI table 3-11 */ 564 __hc32 hw_results; /* EHCI table 3-11 */
555#define SITD_IOC (1 << 31) /* interrupt on completion */ 565#define SITD_IOC (1 << 31) /* interrupt on completion */
556#define SITD_PAGE (1 << 30) /* buffer 0/1 */ 566#define SITD_PAGE (1 << 30) /* buffer 0/1 */
557#define SITD_LENGTH(x) (0x3ff & ((x)>>16)) 567#define SITD_LENGTH(x) (((x) >> 16) & 0x3ff)
558#define SITD_STS_ACTIVE (1 << 7) /* HC may execute this */ 568#define SITD_STS_ACTIVE (1 << 7) /* HC may execute this */
559#define SITD_STS_ERR (1 << 6) /* error from TT */ 569#define SITD_STS_ERR (1 << 6) /* error from TT */
560#define SITD_STS_DBE (1 << 5) /* data buffer error (in HC) */ 570#define SITD_STS_DBE (1 << 5) /* data buffer error (in HC) */
@@ -565,9 +575,9 @@ struct ehci_sitd {
565 575
566#define SITD_ACTIVE(ehci) cpu_to_hc32(ehci, SITD_STS_ACTIVE) 576#define SITD_ACTIVE(ehci) cpu_to_hc32(ehci, SITD_STS_ACTIVE)
567 577
568 __hc32 hw_buf [2]; /* EHCI table 3-12 */ 578 __hc32 hw_buf[2]; /* EHCI table 3-12 */
569 __hc32 hw_backpointer; /* EHCI table 3-13 */ 579 __hc32 hw_backpointer; /* EHCI table 3-13 */
570 __hc32 hw_buf_hi [2]; /* Appendix B */ 580 __hc32 hw_buf_hi[2]; /* Appendix B */
571 581
572 /* the rest is HCD-private */ 582 /* the rest is HCD-private */
573 dma_addr_t sitd_dma; 583 dma_addr_t sitd_dma;
@@ -578,7 +588,7 @@ struct ehci_sitd {
578 struct list_head sitd_list; /* list of stream's sitds */ 588 struct list_head sitd_list; /* list of stream's sitds */
579 unsigned frame; 589 unsigned frame;
580 unsigned index; 590 unsigned index;
581} __attribute__ ((aligned (32))); 591} __aligned(32);
582 592
583/*-------------------------------------------------------------------------*/ 593/*-------------------------------------------------------------------------*/
584 594
@@ -598,7 +608,7 @@ struct ehci_fstn {
598 /* the rest is HCD-private */ 608 /* the rest is HCD-private */
599 dma_addr_t fstn_dma; 609 dma_addr_t fstn_dma;
600 union ehci_shadow fstn_next; /* ptr to periodic q entry */ 610 union ehci_shadow fstn_next; /* ptr to periodic q entry */
601} __attribute__ ((aligned (32))); 611} __aligned(32);
602 612
603/*-------------------------------------------------------------------------*/ 613/*-------------------------------------------------------------------------*/
604 614
@@ -634,10 +644,10 @@ struct ehci_tt {
634/* Prepare the PORTSC wakeup flags during controller suspend/resume */ 644/* Prepare the PORTSC wakeup flags during controller suspend/resume */
635 645
636#define ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup) \ 646#define ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup) \
637 ehci_adjust_port_wakeup_flags(ehci, true, do_wakeup); 647 ehci_adjust_port_wakeup_flags(ehci, true, do_wakeup)
638 648
639#define ehci_prepare_ports_for_controller_resume(ehci) \ 649#define ehci_prepare_ports_for_controller_resume(ehci) \
640 ehci_adjust_port_wakeup_flags(ehci, false, false); 650 ehci_adjust_port_wakeup_flags(ehci, false, false)
641 651
642/*-------------------------------------------------------------------------*/ 652/*-------------------------------------------------------------------------*/
643 653
@@ -731,7 +741,7 @@ ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
731#endif 741#endif
732 742
733static inline unsigned int ehci_readl(const struct ehci_hcd *ehci, 743static inline unsigned int ehci_readl(const struct ehci_hcd *ehci,
734 __u32 __iomem * regs) 744 __u32 __iomem *regs)
735{ 745{
736#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO 746#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
737 return ehci_big_endian_mmio(ehci) ? 747 return ehci_big_endian_mmio(ehci) ?
@@ -806,7 +816,7 @@ static inline void set_ohci_hcfs(struct ehci_hcd *ehci, int operational)
806#define ehci_big_endian_desc(e) ((e)->big_endian_desc) 816#define ehci_big_endian_desc(e) ((e)->big_endian_desc)
807 817
808/* cpu to ehci */ 818/* cpu to ehci */
809static inline __hc32 cpu_to_hc32 (const struct ehci_hcd *ehci, const u32 x) 819static inline __hc32 cpu_to_hc32(const struct ehci_hcd *ehci, const u32 x)
810{ 820{
811 return ehci_big_endian_desc(ehci) 821 return ehci_big_endian_desc(ehci)
812 ? (__force __hc32)cpu_to_be32(x) 822 ? (__force __hc32)cpu_to_be32(x)
@@ -814,14 +824,14 @@ static inline __hc32 cpu_to_hc32 (const struct ehci_hcd *ehci, const u32 x)
814} 824}
815 825
816/* ehci to cpu */ 826/* ehci to cpu */
817static inline u32 hc32_to_cpu (const struct ehci_hcd *ehci, const __hc32 x) 827static inline u32 hc32_to_cpu(const struct ehci_hcd *ehci, const __hc32 x)
818{ 828{
819 return ehci_big_endian_desc(ehci) 829 return ehci_big_endian_desc(ehci)
820 ? be32_to_cpu((__force __be32)x) 830 ? be32_to_cpu((__force __be32)x)
821 : le32_to_cpu((__force __le32)x); 831 : le32_to_cpu((__force __le32)x);
822} 832}
823 833
824static inline u32 hc32_to_cpup (const struct ehci_hcd *ehci, const __hc32 *x) 834static inline u32 hc32_to_cpup(const struct ehci_hcd *ehci, const __hc32 *x)
825{ 835{
826 return ehci_big_endian_desc(ehci) 836 return ehci_big_endian_desc(ehci)
827 ? be32_to_cpup((__force __be32 *)x) 837 ? be32_to_cpup((__force __be32 *)x)
@@ -831,18 +841,18 @@ static inline u32 hc32_to_cpup (const struct ehci_hcd *ehci, const __hc32 *x)
831#else 841#else
832 842
833/* cpu to ehci */ 843/* cpu to ehci */
834static inline __hc32 cpu_to_hc32 (const struct ehci_hcd *ehci, const u32 x) 844static inline __hc32 cpu_to_hc32(const struct ehci_hcd *ehci, const u32 x)
835{ 845{
836 return cpu_to_le32(x); 846 return cpu_to_le32(x);
837} 847}
838 848
839/* ehci to cpu */ 849/* ehci to cpu */
840static inline u32 hc32_to_cpu (const struct ehci_hcd *ehci, const __hc32 x) 850static inline u32 hc32_to_cpu(const struct ehci_hcd *ehci, const __hc32 x)
841{ 851{
842 return le32_to_cpu(x); 852 return le32_to_cpu(x);
843} 853}
844 854
845static inline u32 hc32_to_cpup (const struct ehci_hcd *ehci, const __hc32 *x) 855static inline u32 hc32_to_cpup(const struct ehci_hcd *ehci, const __hc32 *x)
846{ 856{
847 return le32_to_cpup(x); 857 return le32_to_cpup(x);
848} 858}
@@ -852,18 +862,13 @@ static inline u32 hc32_to_cpup (const struct ehci_hcd *ehci, const __hc32 *x)
852/*-------------------------------------------------------------------------*/ 862/*-------------------------------------------------------------------------*/
853 863
854#define ehci_dbg(ehci, fmt, args...) \ 864#define ehci_dbg(ehci, fmt, args...) \
855 dev_dbg(ehci_to_hcd(ehci)->self.controller , fmt , ## args) 865 dev_dbg(ehci_to_hcd(ehci)->self.controller, fmt, ## args)
856#define ehci_err(ehci, fmt, args...) \ 866#define ehci_err(ehci, fmt, args...) \
857 dev_err(ehci_to_hcd(ehci)->self.controller , fmt , ## args) 867 dev_err(ehci_to_hcd(ehci)->self.controller, fmt, ## args)
858#define ehci_info(ehci, fmt, args...) \ 868#define ehci_info(ehci, fmt, args...) \
859 dev_info(ehci_to_hcd(ehci)->self.controller , fmt , ## args) 869 dev_info(ehci_to_hcd(ehci)->self.controller, fmt, ## args)
860#define ehci_warn(ehci, fmt, args...) \ 870#define ehci_warn(ehci, fmt, args...) \
861 dev_warn(ehci_to_hcd(ehci)->self.controller , fmt , ## args) 871 dev_warn(ehci_to_hcd(ehci)->self.controller, fmt, ## args)
862
863
864#ifndef CONFIG_DYNAMIC_DEBUG
865#define STUB_DEBUG_FILES
866#endif
867 872
868/*-------------------------------------------------------------------------*/ 873/*-------------------------------------------------------------------------*/
869 874
@@ -883,12 +888,10 @@ extern int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr,
883 u32 mask, u32 done, int usec); 888 u32 mask, u32 done, int usec);
884extern int ehci_reset(struct ehci_hcd *ehci); 889extern int ehci_reset(struct ehci_hcd *ehci);
885 890
886#ifdef CONFIG_PM
887extern int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup); 891extern int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup);
888extern int ehci_resume(struct usb_hcd *hcd, bool force_reset); 892extern int ehci_resume(struct usb_hcd *hcd, bool force_reset);
889extern void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci, 893extern void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci,
890 bool suspending, bool do_wakeup); 894 bool suspending, bool do_wakeup);
891#endif /* CONFIG_PM */
892 895
893extern int ehci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 896extern int ehci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
894 u16 wIndex, char *buf, u16 wLength); 897 u16 wIndex, char *buf, u16 wLength);
diff --git a/drivers/usb/host/fotg210-hcd.c b/drivers/usb/host/fotg210-hcd.c
index 2341af4f3490..360a5e95abca 100644
--- a/drivers/usb/host/fotg210-hcd.c
+++ b/drivers/usb/host/fotg210-hcd.c
@@ -2267,7 +2267,7 @@ static unsigned qh_completions(struct fotg210_hcd *fotg210,
2267 struct fotg210_qh *qh) 2267 struct fotg210_qh *qh)
2268{ 2268{
2269 struct fotg210_qtd *last, *end = qh->dummy; 2269 struct fotg210_qtd *last, *end = qh->dummy;
2270 struct list_head *entry, *tmp; 2270 struct fotg210_qtd *qtd, *tmp;
2271 int last_status; 2271 int last_status;
2272 int stopped; 2272 int stopped;
2273 unsigned count = 0; 2273 unsigned count = 0;
@@ -2301,12 +2301,10 @@ rescan:
2301 * then let the queue advance. 2301 * then let the queue advance.
2302 * if queue is stopped, handles unlinks. 2302 * if queue is stopped, handles unlinks.
2303 */ 2303 */
2304 list_for_each_safe(entry, tmp, &qh->qtd_list) { 2304 list_for_each_entry_safe(qtd, tmp, &qh->qtd_list, qtd_list) {
2305 struct fotg210_qtd *qtd;
2306 struct urb *urb; 2305 struct urb *urb;
2307 u32 token = 0; 2306 u32 token = 0;
2308 2307
2309 qtd = list_entry(entry, struct fotg210_qtd, qtd_list);
2310 urb = qtd->urb; 2308 urb = qtd->urb;
2311 2309
2312 /* clean up any state from previous QTD ...*/ 2310 /* clean up any state from previous QTD ...*/
@@ -2544,14 +2542,11 @@ retry_xacterr:
2544 * used for cleanup after errors, before HC sees an URB's TDs. 2542 * used for cleanup after errors, before HC sees an URB's TDs.
2545 */ 2543 */
2546static void qtd_list_free(struct fotg210_hcd *fotg210, struct urb *urb, 2544static void qtd_list_free(struct fotg210_hcd *fotg210, struct urb *urb,
2547 struct list_head *qtd_list) 2545 struct list_head *head)
2548{ 2546{
2549 struct list_head *entry, *temp; 2547 struct fotg210_qtd *qtd, *temp;
2550
2551 list_for_each_safe(entry, temp, qtd_list) {
2552 struct fotg210_qtd *qtd;
2553 2548
2554 qtd = list_entry(entry, struct fotg210_qtd, qtd_list); 2549 list_for_each_entry_safe(qtd, temp, head, qtd_list) {
2555 list_del(&qtd->qtd_list); 2550 list_del(&qtd->qtd_list);
2556 fotg210_qtd_free(fotg210, qtd); 2551 fotg210_qtd_free(fotg210, qtd);
2557 } 2552 }
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 0c382652a399..1044b0f9d656 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -17,6 +17,7 @@
17#include <linux/of_platform.h> 17#include <linux/of_platform.h>
18#include <linux/clk.h> 18#include <linux/clk.h>
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/dma-mapping.h>
20 21
21struct fsl_usb2_dev_data { 22struct fsl_usb2_dev_data {
22 char *dr_mode; /* controller mode */ 23 char *dr_mode; /* controller mode */
@@ -96,7 +97,11 @@ static struct platform_device *fsl_usb2_device_register(
96 pdev->dev.parent = &ofdev->dev; 97 pdev->dev.parent = &ofdev->dev;
97 98
98 pdev->dev.coherent_dma_mask = ofdev->dev.coherent_dma_mask; 99 pdev->dev.coherent_dma_mask = ofdev->dev.coherent_dma_mask;
99 *pdev->dev.dma_mask = *ofdev->dev.dma_mask; 100
101 if (!pdev->dev.dma_mask)
102 pdev->dev.dma_mask = &ofdev->dev.coherent_dma_mask;
103 else
104 dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
100 105
101 retval = platform_device_add_data(pdev, pdata, sizeof(*pdata)); 106 retval = platform_device_add_data(pdev, pdata, sizeof(*pdata));
102 if (retval) 107 if (retval)
diff --git a/drivers/usb/host/max3421-hcd.c b/drivers/usb/host/max3421-hcd.c
index bd98706d1ce9..c369c29e496d 100644
--- a/drivers/usb/host/max3421-hcd.c
+++ b/drivers/usb/host/max3421-hcd.c
@@ -797,19 +797,16 @@ max3421_check_unlink(struct usb_hcd *hcd)
797{ 797{
798 struct spi_device *spi = to_spi_device(hcd->self.controller); 798 struct spi_device *spi = to_spi_device(hcd->self.controller);
799 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); 799 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
800 struct list_head *pos, *upos, *next_upos;
801 struct max3421_ep *max3421_ep; 800 struct max3421_ep *max3421_ep;
802 struct usb_host_endpoint *ep; 801 struct usb_host_endpoint *ep;
803 struct urb *urb; 802 struct urb *urb, *next;
804 unsigned long flags; 803 unsigned long flags;
805 int retval = 0; 804 int retval = 0;
806 805
807 spin_lock_irqsave(&max3421_hcd->lock, flags); 806 spin_lock_irqsave(&max3421_hcd->lock, flags);
808 list_for_each(pos, &max3421_hcd->ep_list) { 807 list_for_each_entry(max3421_ep, &max3421_hcd->ep_list, ep_list) {
809 max3421_ep = container_of(pos, struct max3421_ep, ep_list);
810 ep = max3421_ep->ep; 808 ep = max3421_ep->ep;
811 list_for_each_safe(upos, next_upos, &ep->urb_list) { 809 list_for_each_entry_safe(urb, next, &ep->urb_list, urb_list) {
812 urb = container_of(upos, struct urb, urb_list);
813 if (urb->unlinked) { 810 if (urb->unlinked) {
814 retval = 1; 811 retval = 1;
815 dev_dbg(&spi->dev, "%s: URB %p unlinked=%d", 812 dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
@@ -1184,22 +1181,19 @@ dump_eps(struct usb_hcd *hcd)
1184 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd); 1181 struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
1185 struct max3421_ep *max3421_ep; 1182 struct max3421_ep *max3421_ep;
1186 struct usb_host_endpoint *ep; 1183 struct usb_host_endpoint *ep;
1187 struct list_head *pos, *upos;
1188 char ubuf[512], *dp, *end; 1184 char ubuf[512], *dp, *end;
1189 unsigned long flags; 1185 unsigned long flags;
1190 struct urb *urb; 1186 struct urb *urb;
1191 int epnum, ret; 1187 int epnum, ret;
1192 1188
1193 spin_lock_irqsave(&max3421_hcd->lock, flags); 1189 spin_lock_irqsave(&max3421_hcd->lock, flags);
1194 list_for_each(pos, &max3421_hcd->ep_list) { 1190 list_for_each_entry(max3421_ep, &max3421_hcd->ep_list, ep_list) {
1195 max3421_ep = container_of(pos, struct max3421_ep, ep_list);
1196 ep = max3421_ep->ep; 1191 ep = max3421_ep->ep;
1197 1192
1198 dp = ubuf; 1193 dp = ubuf;
1199 end = dp + sizeof(ubuf); 1194 end = dp + sizeof(ubuf);
1200 *dp = '\0'; 1195 *dp = '\0';
1201 list_for_each(upos, &ep->urb_list) { 1196 list_for_each_entry(urb, &ep->urb_list, urb_list) {
1202 urb = container_of(upos, struct urb, urb_list);
1203 ret = snprintf(dp, end - dp, " %p(%d.%s %d/%d)", urb, 1197 ret = snprintf(dp, end - dp, " %p(%d.%s %d/%d)", urb,
1204 usb_pipetype(urb->pipe), 1198 usb_pipetype(urb->pipe),
1205 usb_urb_dir_in(urb) ? "IN" : "OUT", 1199 usb_urb_dir_in(urb) ? "IN" : "OUT",
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 8c6e15bd6ff0..f789d2954c5d 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -583,9 +583,7 @@ static int ohci_hcd_at91_drv_remove(struct platform_device *pdev)
583 return 0; 583 return 0;
584} 584}
585 585
586#ifdef CONFIG_PM 586static int __maybe_unused
587
588static int
589ohci_hcd_at91_drv_suspend(struct device *dev) 587ohci_hcd_at91_drv_suspend(struct device *dev)
590{ 588{
591 struct usb_hcd *hcd = dev_get_drvdata(dev); 589 struct usb_hcd *hcd = dev_get_drvdata(dev);
@@ -630,7 +628,8 @@ ohci_hcd_at91_drv_suspend(struct device *dev)
630 return ret; 628 return ret;
631} 629}
632 630
633static int ohci_hcd_at91_drv_resume(struct device *dev) 631static int __maybe_unused
632ohci_hcd_at91_drv_resume(struct device *dev)
634{ 633{
635 struct usb_hcd *hcd = dev_get_drvdata(dev); 634 struct usb_hcd *hcd = dev_get_drvdata(dev);
636 struct ohci_at91_priv *ohci_at91 = hcd_to_ohci_at91_priv(hcd); 635 struct ohci_at91_priv *ohci_at91 = hcd_to_ohci_at91_priv(hcd);
@@ -643,7 +642,6 @@ static int ohci_hcd_at91_drv_resume(struct device *dev)
643 ohci_resume(hcd, false); 642 ohci_resume(hcd, false);
644 return 0; 643 return 0;
645} 644}
646#endif
647 645
648static SIMPLE_DEV_PM_OPS(ohci_hcd_at91_pm_ops, ohci_hcd_at91_drv_suspend, 646static SIMPLE_DEV_PM_OPS(ohci_hcd_at91_pm_ops, ohci_hcd_at91_drv_suspend,
649 ohci_hcd_at91_drv_resume); 647 ohci_hcd_at91_drv_resume);
diff --git a/drivers/usb/host/ohci-nxp.c b/drivers/usb/host/ohci-nxp.c
index cfa94275c52c..b7d4756232ae 100644
--- a/drivers/usb/host/ohci-nxp.c
+++ b/drivers/usb/host/ohci-nxp.c
@@ -22,7 +22,6 @@
22#include <linux/dma-mapping.h> 22#include <linux/dma-mapping.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/i2c.h> 24#include <linux/i2c.h>
25#include <linux/kernel.h>
26#include <linux/module.h> 25#include <linux/module.h>
27#include <linux/of.h> 26#include <linux/of.h>
28#include <linux/platform_device.h> 27#include <linux/platform_device.h>
@@ -32,25 +31,9 @@
32 31
33#include "ohci.h" 32#include "ohci.h"
34 33
35
36#include <mach/hardware.h> 34#include <mach/hardware.h>
37#include <asm/mach-types.h>
38#include <asm/io.h>
39
40#include <mach/platform.h>
41#include <mach/irqs.h>
42 35
43#define USB_CONFIG_BASE 0x31020000 36#define USB_CONFIG_BASE 0x31020000
44#define PWRMAN_BASE 0x40004000
45
46#define USB_CTRL IO_ADDRESS(PWRMAN_BASE + 0x64)
47
48/* USB_CTRL bit defines */
49#define USB_SLAVE_HCLK_EN (1 << 24)
50#define USB_DEV_NEED_CLK_EN (1 << 22)
51#define USB_HOST_NEED_CLK_EN (1 << 21)
52#define PAD_CONTROL_LAST_DRIVEN (1 << 19)
53
54#define USB_OTG_STAT_CONTROL IO_ADDRESS(USB_CONFIG_BASE + 0x110) 37#define USB_OTG_STAT_CONTROL IO_ADDRESS(USB_CONFIG_BASE + 0x110)
55 38
56/* USB_OTG_STAT_CONTROL bit defines */ 39/* USB_OTG_STAT_CONTROL bit defines */
@@ -75,9 +58,7 @@ static struct i2c_client *isp1301_i2c_client;
75 58
76extern int usb_disabled(void); 59extern int usb_disabled(void);
77 60
78static struct clk *usb_pll_clk; 61static struct clk *usb_host_clk;
79static struct clk *usb_dev_clk;
80static struct clk *usb_otg_clk;
81 62
82static void isp1301_configure_lpc32xx(void) 63static void isp1301_configure_lpc32xx(void)
83{ 64{
@@ -117,9 +98,6 @@ static void isp1301_configure_lpc32xx(void)
117 i2c_smbus_write_byte_data(isp1301_i2c_client, 98 i2c_smbus_write_byte_data(isp1301_i2c_client,
118 ISP1301_I2C_INTERRUPT_RISING | ISP1301_I2C_REG_CLEAR_ADDR, ~0); 99 ISP1301_I2C_INTERRUPT_RISING | ISP1301_I2C_REG_CLEAR_ADDR, ~0);
119 100
120 /* Enable usb_need_clk clock after transceiver is initialized */
121 __raw_writel(__raw_readl(USB_CTRL) | USB_HOST_NEED_CLK_EN, USB_CTRL);
122
123 printk(KERN_INFO "ISP1301 Vendor ID : 0x%04x\n", 101 printk(KERN_INFO "ISP1301 Vendor ID : 0x%04x\n",
124 i2c_smbus_read_word_data(isp1301_i2c_client, 0x00)); 102 i2c_smbus_read_word_data(isp1301_i2c_client, 0x00));
125 printk(KERN_INFO "ISP1301 Product ID : 0x%04x\n", 103 printk(KERN_INFO "ISP1301 Product ID : 0x%04x\n",
@@ -192,59 +170,20 @@ static int ohci_hcd_nxp_probe(struct platform_device *pdev)
192 goto fail_disable; 170 goto fail_disable;
193 } 171 }
194 172
195 /* Enable AHB slave USB clock, needed for further USB clock control */ 173 /* Enable USB host clock */
196 __raw_writel(USB_SLAVE_HCLK_EN | PAD_CONTROL_LAST_DRIVEN, USB_CTRL); 174 usb_host_clk = devm_clk_get(&pdev->dev, NULL);
197 175 if (IS_ERR(usb_host_clk)) {
198 /* Enable USB PLL */ 176 dev_err(&pdev->dev, "failed to acquire USB OHCI clock\n");
199 usb_pll_clk = devm_clk_get(&pdev->dev, "ck_pll5"); 177 ret = PTR_ERR(usb_host_clk);
200 if (IS_ERR(usb_pll_clk)) {
201 dev_err(&pdev->dev, "failed to acquire USB PLL\n");
202 ret = PTR_ERR(usb_pll_clk);
203 goto fail_disable; 178 goto fail_disable;
204 } 179 }
205 180
206 ret = clk_prepare_enable(usb_pll_clk); 181 ret = clk_prepare_enable(usb_host_clk);
207 if (ret < 0) { 182 if (ret < 0) {
208 dev_err(&pdev->dev, "failed to start USB PLL\n"); 183 dev_err(&pdev->dev, "failed to start USB OHCI clock\n");
209 goto fail_disable; 184 goto fail_disable;
210 } 185 }
211 186
212 ret = clk_set_rate(usb_pll_clk, 48000);
213 if (ret < 0) {
214 dev_err(&pdev->dev, "failed to set USB clock rate\n");
215 goto fail_rate;
216 }
217
218 /* Enable USB device clock */
219 usb_dev_clk = devm_clk_get(&pdev->dev, "ck_usbd");
220 if (IS_ERR(usb_dev_clk)) {
221 dev_err(&pdev->dev, "failed to acquire USB DEV Clock\n");
222 ret = PTR_ERR(usb_dev_clk);
223 goto fail_rate;
224 }
225
226 ret = clk_prepare_enable(usb_dev_clk);
227 if (ret < 0) {
228 dev_err(&pdev->dev, "failed to start USB DEV Clock\n");
229 goto fail_rate;
230 }
231
232 /* Enable USB otg clocks */
233 usb_otg_clk = devm_clk_get(&pdev->dev, "ck_usb_otg");
234 if (IS_ERR(usb_otg_clk)) {
235 dev_err(&pdev->dev, "failed to acquire USB DEV Clock\n");
236 ret = PTR_ERR(usb_otg_clk);
237 goto fail_otg;
238 }
239
240 __raw_writel(__raw_readl(USB_CTRL) | USB_HOST_NEED_CLK_EN, USB_CTRL);
241
242 ret = clk_prepare_enable(usb_otg_clk);
243 if (ret < 0) {
244 dev_err(&pdev->dev, "failed to start USB DEV Clock\n");
245 goto fail_otg;
246 }
247
248 isp1301_configure(); 187 isp1301_configure();
249 188
250 hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev)); 189 hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
@@ -283,11 +222,7 @@ static int ohci_hcd_nxp_probe(struct platform_device *pdev)
283fail_resource: 222fail_resource:
284 usb_put_hcd(hcd); 223 usb_put_hcd(hcd);
285fail_hcd: 224fail_hcd:
286 clk_disable_unprepare(usb_otg_clk); 225 clk_disable_unprepare(usb_host_clk);
287fail_otg:
288 clk_disable_unprepare(usb_dev_clk);
289fail_rate:
290 clk_disable_unprepare(usb_pll_clk);
291fail_disable: 226fail_disable:
292 isp1301_i2c_client = NULL; 227 isp1301_i2c_client = NULL;
293 return ret; 228 return ret;
@@ -300,9 +235,7 @@ static int ohci_hcd_nxp_remove(struct platform_device *pdev)
300 usb_remove_hcd(hcd); 235 usb_remove_hcd(hcd);
301 ohci_nxp_stop_hc(); 236 ohci_nxp_stop_hc();
302 usb_put_hcd(hcd); 237 usb_put_hcd(hcd);
303 clk_disable_unprepare(usb_otg_clk); 238 clk_disable_unprepare(usb_host_clk);
304 clk_disable_unprepare(usb_dev_clk);
305 clk_disable_unprepare(usb_pll_clk);
306 isp1301_i2c_client = NULL; 239 isp1301_i2c_client = NULL;
307 240
308 return 0; 241 return 0;
diff --git a/drivers/usb/host/ohci-platform.c b/drivers/usb/host/ohci-platform.c
index c2669f185f65..ae1c988da146 100644
--- a/drivers/usb/host/ohci-platform.c
+++ b/drivers/usb/host/ohci-platform.c
@@ -310,8 +310,7 @@ static int ohci_platform_suspend(struct device *dev)
310{ 310{
311 struct usb_hcd *hcd = dev_get_drvdata(dev); 311 struct usb_hcd *hcd = dev_get_drvdata(dev);
312 struct usb_ohci_pdata *pdata = dev->platform_data; 312 struct usb_ohci_pdata *pdata = dev->platform_data;
313 struct platform_device *pdev = 313 struct platform_device *pdev = to_platform_device(dev);
314 container_of(dev, struct platform_device, dev);
315 bool do_wakeup = device_may_wakeup(dev); 314 bool do_wakeup = device_may_wakeup(dev);
316 int ret; 315 int ret;
317 316
@@ -329,8 +328,7 @@ static int ohci_platform_resume(struct device *dev)
329{ 328{
330 struct usb_hcd *hcd = dev_get_drvdata(dev); 329 struct usb_hcd *hcd = dev_get_drvdata(dev);
331 struct usb_ohci_pdata *pdata = dev_get_platdata(dev); 330 struct usb_ohci_pdata *pdata = dev_get_platdata(dev);
332 struct platform_device *pdev = 331 struct platform_device *pdev = to_platform_device(dev);
333 container_of(dev, struct platform_device, dev);
334 332
335 if (pdata->power_on) { 333 if (pdata->power_on) {
336 int err = pdata->power_on(pdev); 334 int err = pdata->power_on(pdev);
diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c
index e8c006e7a960..a667cf2d5788 100644
--- a/drivers/usb/host/ohci-pxa27x.c
+++ b/drivers/usb/host/ohci-pxa27x.c
@@ -435,7 +435,7 @@ int usb_hcd_pxa27x_probe (const struct hc_driver *driver, struct platform_device
435 irq = platform_get_irq(pdev, 0); 435 irq = platform_get_irq(pdev, 0);
436 if (irq < 0) { 436 if (irq < 0) {
437 pr_err("no resource of IORESOURCE_IRQ"); 437 pr_err("no resource of IORESOURCE_IRQ");
438 return -ENXIO; 438 return irq;
439 } 439 }
440 440
441 usb_clk = devm_clk_get(&pdev->dev, NULL); 441 usb_clk = devm_clk_get(&pdev->dev, NULL);
diff --git a/drivers/usb/host/ohci-st.c b/drivers/usb/host/ohci-st.c
index df9028e0d9b4..acf2eb2a5676 100644
--- a/drivers/usb/host/ohci-st.c
+++ b/drivers/usb/host/ohci-st.c
@@ -270,8 +270,7 @@ static int st_ohci_suspend(struct device *dev)
270{ 270{
271 struct usb_hcd *hcd = dev_get_drvdata(dev); 271 struct usb_hcd *hcd = dev_get_drvdata(dev);
272 struct usb_ohci_pdata *pdata = dev->platform_data; 272 struct usb_ohci_pdata *pdata = dev->platform_data;
273 struct platform_device *pdev = 273 struct platform_device *pdev = to_platform_device(dev);
274 container_of(dev, struct platform_device, dev);
275 bool do_wakeup = device_may_wakeup(dev); 274 bool do_wakeup = device_may_wakeup(dev);
276 int ret; 275 int ret;
277 276
@@ -289,8 +288,7 @@ static int st_ohci_resume(struct device *dev)
289{ 288{
290 struct usb_hcd *hcd = dev_get_drvdata(dev); 289 struct usb_hcd *hcd = dev_get_drvdata(dev);
291 struct usb_ohci_pdata *pdata = dev_get_platdata(dev); 290 struct usb_ohci_pdata *pdata = dev_get_platdata(dev);
292 struct platform_device *pdev = 291 struct platform_device *pdev = to_platform_device(dev);
293 container_of(dev, struct platform_device, dev);
294 int err; 292 int err;
295 293
296 if (pdata->power_on) { 294 if (pdata->power_on) {
diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h
index bc462288cfb0..37f1725e7a46 100644
--- a/drivers/usb/host/ohci.h
+++ b/drivers/usb/host/ohci.h
@@ -735,10 +735,8 @@ extern void ohci_init_driver(struct hc_driver *drv,
735 const struct ohci_driver_overrides *over); 735 const struct ohci_driver_overrides *over);
736extern int ohci_restart(struct ohci_hcd *ohci); 736extern int ohci_restart(struct ohci_hcd *ohci);
737extern int ohci_setup(struct usb_hcd *hcd); 737extern int ohci_setup(struct usb_hcd *hcd);
738#ifdef CONFIG_PM
739extern int ohci_suspend(struct usb_hcd *hcd, bool do_wakeup); 738extern int ohci_suspend(struct usb_hcd *hcd, bool do_wakeup);
740extern int ohci_resume(struct usb_hcd *hcd, bool hibernated); 739extern int ohci_resume(struct usb_hcd *hcd, bool hibernated);
741#endif
742extern int ohci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 740extern int ohci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
743 u16 wIndex, char *buf, u16 wLength); 741 u16 wIndex, char *buf, u16 wLength);
744extern int ohci_hub_status_data(struct usb_hcd *hcd, char *buf); 742extern int ohci_hub_status_data(struct usb_hcd *hcd, char *buf);
diff --git a/drivers/usb/host/oxu210hp-hcd.c b/drivers/usb/host/oxu210hp-hcd.c
index bc74aca8a54c..4e4d601af35c 100644
--- a/drivers/usb/host/oxu210hp-hcd.c
+++ b/drivers/usb/host/oxu210hp-hcd.c
@@ -981,7 +981,7 @@ static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
981static unsigned qh_completions(struct oxu_hcd *oxu, struct ehci_qh *qh) 981static unsigned qh_completions(struct oxu_hcd *oxu, struct ehci_qh *qh)
982{ 982{
983 struct ehci_qtd *last = NULL, *end = qh->dummy; 983 struct ehci_qtd *last = NULL, *end = qh->dummy;
984 struct list_head *entry, *tmp; 984 struct ehci_qtd *qtd, *tmp;
985 int stopped; 985 int stopped;
986 unsigned count = 0; 986 unsigned count = 0;
987 int do_status = 0; 987 int do_status = 0;
@@ -1006,12 +1006,10 @@ static unsigned qh_completions(struct oxu_hcd *oxu, struct ehci_qh *qh)
1006 * then let the queue advance. 1006 * then let the queue advance.
1007 * if queue is stopped, handles unlinks. 1007 * if queue is stopped, handles unlinks.
1008 */ 1008 */
1009 list_for_each_safe(entry, tmp, &qh->qtd_list) { 1009 list_for_each_entry_safe(qtd, tmp, &qh->qtd_list, qtd_list) {
1010 struct ehci_qtd *qtd;
1011 struct urb *urb; 1010 struct urb *urb;
1012 u32 token = 0; 1011 u32 token = 0;
1013 1012
1014 qtd = list_entry(entry, struct ehci_qtd, qtd_list);
1015 urb = qtd->urb; 1013 urb = qtd->urb;
1016 1014
1017 /* Clean up any state from previous QTD ...*/ 1015 /* Clean up any state from previous QTD ...*/
@@ -1174,14 +1172,11 @@ halt:
1174 * used for cleanup after errors, before HC sees an URB's TDs. 1172 * used for cleanup after errors, before HC sees an URB's TDs.
1175 */ 1173 */
1176static void qtd_list_free(struct oxu_hcd *oxu, 1174static void qtd_list_free(struct oxu_hcd *oxu,
1177 struct urb *urb, struct list_head *qtd_list) 1175 struct urb *urb, struct list_head *head)
1178{ 1176{
1179 struct list_head *entry, *temp; 1177 struct ehci_qtd *qtd, *temp;
1180
1181 list_for_each_safe(entry, temp, qtd_list) {
1182 struct ehci_qtd *qtd;
1183 1178
1184 qtd = list_entry(entry, struct ehci_qtd, qtd_list); 1179 list_for_each_entry_safe(qtd, temp, head, qtd_list) {
1185 list_del(&qtd->qtd_list); 1180 list_del(&qtd->qtd_list);
1186 oxu_qtd_free(oxu, qtd); 1181 oxu_qtd_free(oxu, qtd);
1187 } 1182 }
diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
index 26cb8c861e6e..35af36253440 100644
--- a/drivers/usb/host/pci-quirks.c
+++ b/drivers/usb/host/pci-quirks.c
@@ -992,7 +992,7 @@ static void quirk_usb_handoff_xhci(struct pci_dev *pdev)
992 if ((ext_cap_offset + sizeof(val)) > len) { 992 if ((ext_cap_offset + sizeof(val)) > len) {
993 /* We're reading garbage from the controller */ 993 /* We're reading garbage from the controller */
994 dev_warn(&pdev->dev, "xHCI controller failing to respond"); 994 dev_warn(&pdev->dev, "xHCI controller failing to respond");
995 return; 995 goto iounmap;
996 } 996 }
997 val = readl(base + ext_cap_offset); 997 val = readl(base + ext_cap_offset);
998 998
@@ -1055,6 +1055,7 @@ hc_init:
1055 XHCI_MAX_HALT_USEC, val); 1055 XHCI_MAX_HALT_USEC, val);
1056 } 1056 }
1057 1057
1058iounmap:
1058 iounmap(base); 1059 iounmap(base);
1059} 1060}
1060 1061
diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index 4cbd0633c5c2..bfa7fa3d2eea 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -2099,16 +2099,13 @@ static void r8a66597_check_detect_child(struct r8a66597 *r8a66597,
2099 2099
2100 memset(now_map, 0, sizeof(now_map)); 2100 memset(now_map, 0, sizeof(now_map));
2101 2101
2102 list_for_each_entry(bus, &usb_bus_list, bus_list) { 2102 mutex_lock(&usb_bus_idr_lock);
2103 if (!bus->root_hub) 2103 bus = idr_find(&usb_bus_idr, hcd->self.busnum);
2104 continue; 2104 if (bus && bus->root_hub) {
2105
2106 if (bus->busnum != hcd->self.busnum)
2107 continue;
2108
2109 collect_usb_address_map(bus->root_hub, now_map); 2105 collect_usb_address_map(bus->root_hub, now_map);
2110 update_usb_address_map(r8a66597, bus->root_hub, now_map); 2106 update_usb_address_map(r8a66597, bus->root_hub, now_map);
2111 } 2107 }
2108 mutex_unlock(&usb_bus_idr_lock);
2112} 2109}
2113 2110
2114static int r8a66597_hub_status_data(struct usb_hcd *hcd, char *buf) 2111static int r8a66597_hub_status_data(struct usb_hcd *hcd, char *buf)
diff --git a/drivers/usb/host/u132-hcd.c b/drivers/usb/host/u132-hcd.c
index 05c85c7baf84..43d52931b5bf 100644
--- a/drivers/usb/host/u132-hcd.c
+++ b/drivers/usb/host/u132-hcd.c
@@ -1309,13 +1309,9 @@ static void u132_hcd_ring_work_scheduler(struct work_struct *work)
1309 u132_ring_put_kref(u132, ring); 1309 u132_ring_put_kref(u132, ring);
1310 return; 1310 return;
1311 } else if (ring->curr_endp) { 1311 } else if (ring->curr_endp) {
1312 struct u132_endp *last_endp = ring->curr_endp; 1312 struct u132_endp *endp, *last_endp = ring->curr_endp;
1313 struct list_head *scan;
1314 struct list_head *head = &last_endp->endp_ring;
1315 unsigned long wakeup = 0; 1313 unsigned long wakeup = 0;
1316 list_for_each(scan, head) { 1314 list_for_each_entry(endp, &last_endp->endp_ring, endp_ring) {
1317 struct u132_endp *endp = list_entry(scan,
1318 struct u132_endp, endp_ring);
1319 if (endp->queue_next == endp->queue_last) { 1315 if (endp->queue_next == endp->queue_last) {
1320 } else if ((endp->delayed == 0) 1316 } else if ((endp->delayed == 0)
1321 || time_after_eq(jiffies, endp->jiffies)) { 1317 || time_after_eq(jiffies, endp->jiffies)) {
@@ -2393,14 +2389,12 @@ static int u132_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
2393static int dequeue_from_overflow_chain(struct u132 *u132, 2389static int dequeue_from_overflow_chain(struct u132 *u132,
2394 struct u132_endp *endp, struct urb *urb) 2390 struct u132_endp *endp, struct urb *urb)
2395{ 2391{
2396 struct list_head *scan; 2392 struct u132_urbq *urbq;
2397 struct list_head *head = &endp->urb_more; 2393
2398 list_for_each(scan, head) { 2394 list_for_each_entry(urbq, &endp->urb_more, urb_more) {
2399 struct u132_urbq *urbq = list_entry(scan, struct u132_urbq,
2400 urb_more);
2401 if (urbq->urb == urb) { 2395 if (urbq->urb == urb) {
2402 struct usb_hcd *hcd = u132_to_hcd(u132); 2396 struct usb_hcd *hcd = u132_to_hcd(u132);
2403 list_del(scan); 2397 list_del(&urbq->urb_more);
2404 endp->queue_size -= 1; 2398 endp->queue_size -= 1;
2405 urb->error_count = 0; 2399 urb->error_count = 0;
2406 usb_hcd_giveback_urb(hcd, urb, 0); 2400 usb_hcd_giveback_urb(hcd, urb, 0);
diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c
index b30b4ce294d3..d61fcc48099e 100644
--- a/drivers/usb/host/xhci-hub.c
+++ b/drivers/usb/host/xhci-hub.c
@@ -50,14 +50,18 @@ static u8 usb_bos_descriptor [] = {
50 0x00, /* bU1DevExitLat, set later. */ 50 0x00, /* bU1DevExitLat, set later. */
51 0x00, 0x00, /* __le16 bU2DevExitLat, set later. */ 51 0x00, 0x00, /* __le16 bU2DevExitLat, set later. */
52 /* Second device capability, SuperSpeedPlus */ 52 /* Second device capability, SuperSpeedPlus */
53 0x0c, /* bLength 12, will be adjusted later */ 53 0x1c, /* bLength 28, will be adjusted later */
54 USB_DT_DEVICE_CAPABILITY, /* Device Capability */ 54 USB_DT_DEVICE_CAPABILITY, /* Device Capability */
55 USB_SSP_CAP_TYPE, /* bDevCapabilityType SUPERSPEED_PLUS */ 55 USB_SSP_CAP_TYPE, /* bDevCapabilityType SUPERSPEED_PLUS */
56 0x00, /* bReserved 0 */ 56 0x00, /* bReserved 0 */
57 0x00, 0x00, 0x00, 0x00, /* bmAttributes, get from xhci psic */ 57 0x23, 0x00, 0x00, 0x00, /* bmAttributes, SSAC=3 SSIC=1 */
58 0x00, 0x00, /* wFunctionalitySupport */ 58 0x01, 0x00, /* wFunctionalitySupport */
59 0x00, 0x00, /* wReserved 0 */ 59 0x00, 0x00, /* wReserved 0 */
60 /* Sublink Speed Attributes are added in xhci_create_usb3_bos_desc() */ 60 /* Default Sublink Speed Attributes, overwrite if custom PSI exists */
61 0x34, 0x00, 0x05, 0x00, /* 5Gbps, symmetric, rx, ID = 4 */
62 0xb4, 0x00, 0x05, 0x00, /* 5Gbps, symmetric, tx, ID = 4 */
63 0x35, 0x40, 0x0a, 0x00, /* 10Gbps, SSP, symmetric, rx, ID = 5 */
64 0xb5, 0x40, 0x0a, 0x00, /* 10Gbps, SSP, symmetric, tx, ID = 5 */
61}; 65};
62 66
63static int xhci_create_usb3_bos_desc(struct xhci_hcd *xhci, char *buf, 67static int xhci_create_usb3_bos_desc(struct xhci_hcd *xhci, char *buf,
@@ -72,10 +76,14 @@ static int xhci_create_usb3_bos_desc(struct xhci_hcd *xhci, char *buf,
72 ssp_cap_size = sizeof(usb_bos_descriptor) - desc_size; 76 ssp_cap_size = sizeof(usb_bos_descriptor) - desc_size;
73 77
74 /* does xhci support USB 3.1 Enhanced SuperSpeed */ 78 /* does xhci support USB 3.1 Enhanced SuperSpeed */
75 if (xhci->usb3_rhub.min_rev >= 0x01 && xhci->usb3_rhub.psi_uid_count) { 79 if (xhci->usb3_rhub.min_rev >= 0x01) {
76 /* two SSA entries for each unique PSI ID, one RX and one TX */ 80 /* does xhci provide a PSI table for SSA speed attributes? */
77 ssa_count = xhci->usb3_rhub.psi_uid_count * 2; 81 if (xhci->usb3_rhub.psi_count) {
78 ssa_size = ssa_count * sizeof(u32); 82 /* two SSA entries for each unique PSI ID, RX and TX */
83 ssa_count = xhci->usb3_rhub.psi_uid_count * 2;
84 ssa_size = ssa_count * sizeof(u32);
85 ssp_cap_size -= 16; /* skip copying the default SSA */
86 }
79 desc_size += ssp_cap_size; 87 desc_size += ssp_cap_size;
80 usb3_1 = true; 88 usb3_1 = true;
81 } 89 }
@@ -102,7 +110,8 @@ static int xhci_create_usb3_bos_desc(struct xhci_hcd *xhci, char *buf,
102 put_unaligned_le16(HCS_U2_LATENCY(temp), &buf[13]); 110 put_unaligned_le16(HCS_U2_LATENCY(temp), &buf[13]);
103 } 111 }
104 112
105 if (usb3_1) { 113 /* If PSI table exists, add the custom speed attributes from it */
114 if (usb3_1 && xhci->usb3_rhub.psi_count) {
106 u32 ssp_cap_base, bm_attrib, psi; 115 u32 ssp_cap_base, bm_attrib, psi;
107 int offset; 116 int offset;
108 117
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 5cd080e0a685..80c1de239e9a 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -1070,7 +1070,7 @@ static u32 xhci_find_real_port_number(struct xhci_hcd *xhci,
1070 struct usb_device *top_dev; 1070 struct usb_device *top_dev;
1071 struct usb_hcd *hcd; 1071 struct usb_hcd *hcd;
1072 1072
1073 if (udev->speed == USB_SPEED_SUPER) 1073 if (udev->speed >= USB_SPEED_SUPER)
1074 hcd = xhci->shared_hcd; 1074 hcd = xhci->shared_hcd;
1075 else 1075 else
1076 hcd = xhci->main_hcd; 1076 hcd = xhci->main_hcd;
@@ -1105,6 +1105,10 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud
1105 /* 3) Only the control endpoint is valid - one endpoint context */ 1105 /* 3) Only the control endpoint is valid - one endpoint context */
1106 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1) | udev->route); 1106 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1) | udev->route);
1107 switch (udev->speed) { 1107 switch (udev->speed) {
1108 case USB_SPEED_SUPER_PLUS:
1109 slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_SSP);
1110 max_packets = MAX_PACKET(512);
1111 break;
1108 case USB_SPEED_SUPER: 1112 case USB_SPEED_SUPER:
1109 slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_SS); 1113 slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_SS);
1110 max_packets = MAX_PACKET(512); 1114 max_packets = MAX_PACKET(512);
@@ -1292,6 +1296,7 @@ static unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
1292 } 1296 }
1293 /* Fall through - SS and HS isoc/int have same decoding */ 1297 /* Fall through - SS and HS isoc/int have same decoding */
1294 1298
1299 case USB_SPEED_SUPER_PLUS:
1295 case USB_SPEED_SUPER: 1300 case USB_SPEED_SUPER:
1296 if (usb_endpoint_xfer_int(&ep->desc) || 1301 if (usb_endpoint_xfer_int(&ep->desc) ||
1297 usb_endpoint_xfer_isoc(&ep->desc)) { 1302 usb_endpoint_xfer_isoc(&ep->desc)) {
@@ -1321,7 +1326,7 @@ static unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
1321 default: 1326 default:
1322 BUG(); 1327 BUG();
1323 } 1328 }
1324 return EP_INTERVAL(interval); 1329 return interval;
1325} 1330}
1326 1331
1327/* The "Mult" field in the endpoint context is only set for SuperSpeed isoc eps. 1332/* The "Mult" field in the endpoint context is only set for SuperSpeed isoc eps.
@@ -1332,39 +1337,42 @@ static unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
1332static u32 xhci_get_endpoint_mult(struct usb_device *udev, 1337static u32 xhci_get_endpoint_mult(struct usb_device *udev,
1333 struct usb_host_endpoint *ep) 1338 struct usb_host_endpoint *ep)
1334{ 1339{
1335 if (udev->speed != USB_SPEED_SUPER || 1340 if (udev->speed < USB_SPEED_SUPER ||
1336 !usb_endpoint_xfer_isoc(&ep->desc)) 1341 !usb_endpoint_xfer_isoc(&ep->desc))
1337 return 0; 1342 return 0;
1338 return ep->ss_ep_comp.bmAttributes; 1343 return ep->ss_ep_comp.bmAttributes;
1339} 1344}
1340 1345
1346static u32 xhci_get_endpoint_max_burst(struct usb_device *udev,
1347 struct usb_host_endpoint *ep)
1348{
1349 /* Super speed and Plus have max burst in ep companion desc */
1350 if (udev->speed >= USB_SPEED_SUPER)
1351 return ep->ss_ep_comp.bMaxBurst;
1352
1353 if (udev->speed == USB_SPEED_HIGH &&
1354 (usb_endpoint_xfer_isoc(&ep->desc) ||
1355 usb_endpoint_xfer_int(&ep->desc)))
1356 return (usb_endpoint_maxp(&ep->desc) & 0x1800) >> 11;
1357
1358 return 0;
1359}
1360
1341static u32 xhci_get_endpoint_type(struct usb_host_endpoint *ep) 1361static u32 xhci_get_endpoint_type(struct usb_host_endpoint *ep)
1342{ 1362{
1343 int in; 1363 int in;
1344 u32 type;
1345 1364
1346 in = usb_endpoint_dir_in(&ep->desc); 1365 in = usb_endpoint_dir_in(&ep->desc);
1347 if (usb_endpoint_xfer_control(&ep->desc)) { 1366
1348 type = EP_TYPE(CTRL_EP); 1367 if (usb_endpoint_xfer_control(&ep->desc))
1349 } else if (usb_endpoint_xfer_bulk(&ep->desc)) { 1368 return CTRL_EP;
1350 if (in) 1369 if (usb_endpoint_xfer_bulk(&ep->desc))
1351 type = EP_TYPE(BULK_IN_EP); 1370 return in ? BULK_IN_EP : BULK_OUT_EP;
1352 else 1371 if (usb_endpoint_xfer_isoc(&ep->desc))
1353 type = EP_TYPE(BULK_OUT_EP); 1372 return in ? ISOC_IN_EP : ISOC_OUT_EP;
1354 } else if (usb_endpoint_xfer_isoc(&ep->desc)) { 1373 if (usb_endpoint_xfer_int(&ep->desc))
1355 if (in) 1374 return in ? INT_IN_EP : INT_OUT_EP;
1356 type = EP_TYPE(ISOC_IN_EP); 1375 return 0;
1357 else
1358 type = EP_TYPE(ISOC_OUT_EP);
1359 } else if (usb_endpoint_xfer_int(&ep->desc)) {
1360 if (in)
1361 type = EP_TYPE(INT_IN_EP);
1362 else
1363 type = EP_TYPE(INT_OUT_EP);
1364 } else {
1365 type = 0;
1366 }
1367 return type;
1368} 1376}
1369 1377
1370/* Return the maximum endpoint service interval time (ESIT) payload. 1378/* Return the maximum endpoint service interval time (ESIT) payload.
@@ -1382,7 +1390,12 @@ static u32 xhci_get_max_esit_payload(struct usb_device *udev,
1382 usb_endpoint_xfer_bulk(&ep->desc)) 1390 usb_endpoint_xfer_bulk(&ep->desc))
1383 return 0; 1391 return 0;
1384 1392
1385 if (udev->speed == USB_SPEED_SUPER) 1393 /* SuperSpeedPlus Isoc ep sending over 48k per esit */
1394 if ((udev->speed >= USB_SPEED_SUPER_PLUS) &&
1395 USB_SS_SSP_ISOC_COMP(ep->ss_ep_comp.bmAttributes))
1396 return le32_to_cpu(ep->ssp_isoc_ep_comp.dwBytesPerInterval);
1397 /* SuperSpeed or SuperSpeedPlus Isoc ep with less than 48k per esit */
1398 else if (udev->speed >= USB_SPEED_SUPER)
1386 return le16_to_cpu(ep->ss_ep_comp.wBytesPerInterval); 1399 return le16_to_cpu(ep->ss_ep_comp.wBytesPerInterval);
1387 1400
1388 max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc)); 1401 max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc));
@@ -1404,10 +1417,14 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
1404 struct xhci_ep_ctx *ep_ctx; 1417 struct xhci_ep_ctx *ep_ctx;
1405 struct xhci_ring *ep_ring; 1418 struct xhci_ring *ep_ring;
1406 unsigned int max_packet; 1419 unsigned int max_packet;
1407 unsigned int max_burst; 1420 enum xhci_ring_type ring_type;
1408 enum xhci_ring_type type;
1409 u32 max_esit_payload; 1421 u32 max_esit_payload;
1410 u32 endpoint_type; 1422 u32 endpoint_type;
1423 unsigned int max_burst;
1424 unsigned int interval;
1425 unsigned int mult;
1426 unsigned int avg_trb_len;
1427 unsigned int err_count = 0;
1411 1428
1412 ep_index = xhci_get_endpoint_index(&ep->desc); 1429 ep_index = xhci_get_endpoint_index(&ep->desc);
1413 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index); 1430 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
@@ -1415,12 +1432,11 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
1415 endpoint_type = xhci_get_endpoint_type(ep); 1432 endpoint_type = xhci_get_endpoint_type(ep);
1416 if (!endpoint_type) 1433 if (!endpoint_type)
1417 return -EINVAL; 1434 return -EINVAL;
1418 ep_ctx->ep_info2 = cpu_to_le32(endpoint_type);
1419 1435
1420 type = usb_endpoint_type(&ep->desc); 1436 ring_type = usb_endpoint_type(&ep->desc);
1421 /* Set up the endpoint ring */ 1437 /* Set up the endpoint ring */
1422 virt_dev->eps[ep_index].new_ring = 1438 virt_dev->eps[ep_index].new_ring =
1423 xhci_ring_alloc(xhci, 2, 1, type, mem_flags); 1439 xhci_ring_alloc(xhci, 2, 1, ring_type, mem_flags);
1424 if (!virt_dev->eps[ep_index].new_ring) { 1440 if (!virt_dev->eps[ep_index].new_ring) {
1425 /* Attempt to use the ring cache */ 1441 /* Attempt to use the ring cache */
1426 if (virt_dev->num_rings_cached == 0) 1442 if (virt_dev->num_rings_cached == 0)
@@ -1430,80 +1446,52 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
1430 virt_dev->ring_cache[virt_dev->num_rings_cached]; 1446 virt_dev->ring_cache[virt_dev->num_rings_cached];
1431 virt_dev->ring_cache[virt_dev->num_rings_cached] = NULL; 1447 virt_dev->ring_cache[virt_dev->num_rings_cached] = NULL;
1432 xhci_reinit_cached_ring(xhci, virt_dev->eps[ep_index].new_ring, 1448 xhci_reinit_cached_ring(xhci, virt_dev->eps[ep_index].new_ring,
1433 1, type); 1449 1, ring_type);
1434 } 1450 }
1435 virt_dev->eps[ep_index].skip = false; 1451 virt_dev->eps[ep_index].skip = false;
1436 ep_ring = virt_dev->eps[ep_index].new_ring; 1452 ep_ring = virt_dev->eps[ep_index].new_ring;
1437 ep_ctx->deq = cpu_to_le64(ep_ring->first_seg->dma | ep_ring->cycle_state);
1438 1453
1439 ep_ctx->ep_info = cpu_to_le32(xhci_get_endpoint_interval(udev, ep) 1454 /*
1440 | EP_MULT(xhci_get_endpoint_mult(udev, ep))); 1455 * Get values to fill the endpoint context, mostly from ep descriptor.
1456 * The average TRB buffer lengt for bulk endpoints is unclear as we
1457 * have no clue on scatter gather list entry size. For Isoc and Int,
1458 * set it to max available. See xHCI 1.1 spec 4.14.1.1 for details.
1459 */
1460 max_esit_payload = xhci_get_max_esit_payload(udev, ep);
1461 interval = xhci_get_endpoint_interval(udev, ep);
1462 mult = xhci_get_endpoint_mult(udev, ep);
1463 max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc));
1464 max_burst = xhci_get_endpoint_max_burst(udev, ep);
1465 avg_trb_len = max_esit_payload;
1441 1466
1442 /* FIXME dig Mult and streams info out of ep companion desc */ 1467 /* FIXME dig Mult and streams info out of ep companion desc */
1443 1468
1444 /* Allow 3 retries for everything but isoc; 1469 /* Allow 3 retries for everything but isoc, set CErr = 3 */
1445 * CErr shall be set to 0 for Isoch endpoints.
1446 */
1447 if (!usb_endpoint_xfer_isoc(&ep->desc)) 1470 if (!usb_endpoint_xfer_isoc(&ep->desc))
1448 ep_ctx->ep_info2 |= cpu_to_le32(ERROR_COUNT(3)); 1471 err_count = 3;
1449 else 1472 /* Some devices get this wrong */
1450 ep_ctx->ep_info2 |= cpu_to_le32(ERROR_COUNT(0)); 1473 if (usb_endpoint_xfer_bulk(&ep->desc) && udev->speed == USB_SPEED_HIGH)
1451 1474 max_packet = 512;
1452 /* Set the max packet size and max burst */ 1475 /* xHCI 1.0 and 1.1 indicates that ctrl ep avg TRB Length should be 8 */
1453 max_packet = GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc));
1454 max_burst = 0;
1455 switch (udev->speed) {
1456 case USB_SPEED_SUPER:
1457 /* dig out max burst from ep companion desc */
1458 max_burst = ep->ss_ep_comp.bMaxBurst;
1459 break;
1460 case USB_SPEED_HIGH:
1461 /* Some devices get this wrong */
1462 if (usb_endpoint_xfer_bulk(&ep->desc))
1463 max_packet = 512;
1464 /* bits 11:12 specify the number of additional transaction
1465 * opportunities per microframe (USB 2.0, section 9.6.6)
1466 */
1467 if (usb_endpoint_xfer_isoc(&ep->desc) ||
1468 usb_endpoint_xfer_int(&ep->desc)) {
1469 max_burst = (usb_endpoint_maxp(&ep->desc)
1470 & 0x1800) >> 11;
1471 }
1472 break;
1473 case USB_SPEED_FULL:
1474 case USB_SPEED_LOW:
1475 break;
1476 default:
1477 BUG();
1478 }
1479 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet) |
1480 MAX_BURST(max_burst));
1481 max_esit_payload = xhci_get_max_esit_payload(udev, ep);
1482 ep_ctx->tx_info = cpu_to_le32(MAX_ESIT_PAYLOAD_FOR_EP(max_esit_payload));
1483
1484 /*
1485 * XXX no idea how to calculate the average TRB buffer length for bulk
1486 * endpoints, as the driver gives us no clue how big each scatter gather
1487 * list entry (or buffer) is going to be.
1488 *
1489 * For isochronous and interrupt endpoints, we set it to the max
1490 * available, until we have new API in the USB core to allow drivers to
1491 * declare how much bandwidth they actually need.
1492 *
1493 * Normally, it would be calculated by taking the total of the buffer
1494 * lengths in the TD and then dividing by the number of TRBs in a TD,
1495 * including link TRBs, No-op TRBs, and Event data TRBs. Since we don't
1496 * use Event Data TRBs, and we don't chain in a link TRB on short
1497 * transfers, we're basically dividing by 1.
1498 *
1499 * xHCI 1.0 and 1.1 specification indicates that the Average TRB Length
1500 * should be set to 8 for control endpoints.
1501 */
1502 if (usb_endpoint_xfer_control(&ep->desc) && xhci->hci_version >= 0x100) 1476 if (usb_endpoint_xfer_control(&ep->desc) && xhci->hci_version >= 0x100)
1503 ep_ctx->tx_info |= cpu_to_le32(AVG_TRB_LENGTH_FOR_EP(8)); 1477 avg_trb_len = 8;
1504 else 1478 /* xhci 1.1 with LEC support doesn't use mult field, use RsvdZ */
1505 ep_ctx->tx_info |= 1479 if ((xhci->hci_version > 0x100) && HCC2_LEC(xhci->hcc_params2))
1506 cpu_to_le32(AVG_TRB_LENGTH_FOR_EP(max_esit_payload)); 1480 mult = 0;
1481
1482 /* Fill the endpoint context */
1483 ep_ctx->ep_info = cpu_to_le32(EP_MAX_ESIT_PAYLOAD_HI(max_esit_payload) |
1484 EP_INTERVAL(interval) |
1485 EP_MULT(mult));
1486 ep_ctx->ep_info2 = cpu_to_le32(EP_TYPE(endpoint_type) |
1487 MAX_PACKET(max_packet) |
1488 MAX_BURST(max_burst) |
1489 ERROR_COUNT(err_count));
1490 ep_ctx->deq = cpu_to_le64(ep_ring->first_seg->dma |
1491 ep_ring->cycle_state);
1492
1493 ep_ctx->tx_info = cpu_to_le32(EP_MAX_ESIT_PAYLOAD_LO(max_esit_payload) |
1494 EP_AVG_TRB_LENGTH(avg_trb_len));
1507 1495
1508 /* FIXME Debug endpoint context */ 1496 /* FIXME Debug endpoint context */
1509 return 0; 1497 return 0;
diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index 9532f5aef71b..79959f17c38c 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -695,7 +695,6 @@ static int xhci_mtk_remove(struct platform_device *dev)
695 return 0; 695 return 0;
696} 696}
697 697
698#ifdef CONFIG_PM_SLEEP
699/* 698/*
700 * if ip sleep fails, and all clocks are disabled, access register will hang 699 * if ip sleep fails, and all clocks are disabled, access register will hang
701 * AHB bus, so stop polling roothubs to avoid regs access on bus suspend. 700 * AHB bus, so stop polling roothubs to avoid regs access on bus suspend.
@@ -703,7 +702,7 @@ static int xhci_mtk_remove(struct platform_device *dev)
703 * to wake up system immediately after system suspend complete if ip sleep 702 * to wake up system immediately after system suspend complete if ip sleep
704 * fails, it is what we wanted. 703 * fails, it is what we wanted.
705 */ 704 */
706static int xhci_mtk_suspend(struct device *dev) 705static int __maybe_unused xhci_mtk_suspend(struct device *dev)
707{ 706{
708 struct xhci_hcd_mtk *mtk = dev_get_drvdata(dev); 707 struct xhci_hcd_mtk *mtk = dev_get_drvdata(dev);
709 struct usb_hcd *hcd = mtk->hcd; 708 struct usb_hcd *hcd = mtk->hcd;
@@ -722,7 +721,7 @@ static int xhci_mtk_suspend(struct device *dev)
722 return 0; 721 return 0;
723} 722}
724 723
725static int xhci_mtk_resume(struct device *dev) 724static int __maybe_unused xhci_mtk_resume(struct device *dev)
726{ 725{
727 struct xhci_hcd_mtk *mtk = dev_get_drvdata(dev); 726 struct xhci_hcd_mtk *mtk = dev_get_drvdata(dev);
728 struct usb_hcd *hcd = mtk->hcd; 727 struct usb_hcd *hcd = mtk->hcd;
@@ -744,10 +743,7 @@ static int xhci_mtk_resume(struct device *dev)
744static const struct dev_pm_ops xhci_mtk_pm_ops = { 743static const struct dev_pm_ops xhci_mtk_pm_ops = {
745 SET_SYSTEM_SLEEP_PM_OPS(xhci_mtk_suspend, xhci_mtk_resume) 744 SET_SYSTEM_SLEEP_PM_OPS(xhci_mtk_suspend, xhci_mtk_resume)
746}; 745};
747#define DEV_PM_OPS (&xhci_mtk_pm_ops) 746#define DEV_PM_OPS IS_ENABLED(CONFIG_PM) ? &xhci_mtk_pm_ops : NULL
748#else
749#define DEV_PM_OPS NULL
750#endif /* CONFIG_PM */
751 747
752#ifdef CONFIG_OF 748#ifdef CONFIG_OF
753static const struct of_device_id mtk_xhci_of_match[] = { 749static const struct of_device_id mtk_xhci_of_match[] = {
diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
index d39d6bf1d090..5c15e9bc5f7a 100644
--- a/drivers/usb/host/xhci-plat.c
+++ b/drivers/usb/host/xhci-plat.c
@@ -110,7 +110,13 @@ static const struct of_device_id usb_xhci_of_match[] = {
110 .compatible = "renesas,xhci-r8a7795", 110 .compatible = "renesas,xhci-r8a7795",
111 .data = &xhci_plat_renesas_rcar_gen3, 111 .data = &xhci_plat_renesas_rcar_gen3,
112 }, { 112 }, {
113 .compatible = "renesas,rcar-gen2-xhci",
114 .data = &xhci_plat_renesas_rcar_gen2,
115 }, {
116 .compatible = "renesas,rcar-gen3-xhci",
117 .data = &xhci_plat_renesas_rcar_gen3,
113 }, 118 },
119 {},
114}; 120};
115MODULE_DEVICE_TABLE(of, usb_xhci_of_match); 121MODULE_DEVICE_TABLE(of, usb_xhci_of_match);
116#endif 122#endif
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 3915657e6078..7cf66212ceae 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -3558,12 +3558,11 @@ static int count_isoc_trbs_needed(struct xhci_hcd *xhci,
3558 * zero. Only xHCI 1.0 host controllers support this field. 3558 * zero. Only xHCI 1.0 host controllers support this field.
3559 */ 3559 */
3560static unsigned int xhci_get_burst_count(struct xhci_hcd *xhci, 3560static unsigned int xhci_get_burst_count(struct xhci_hcd *xhci,
3561 struct usb_device *udev,
3562 struct urb *urb, unsigned int total_packet_count) 3561 struct urb *urb, unsigned int total_packet_count)
3563{ 3562{
3564 unsigned int max_burst; 3563 unsigned int max_burst;
3565 3564
3566 if (xhci->hci_version < 0x100 || udev->speed != USB_SPEED_SUPER) 3565 if (xhci->hci_version < 0x100 || urb->dev->speed < USB_SPEED_SUPER)
3567 return 0; 3566 return 0;
3568 3567
3569 max_burst = urb->ep->ss_ep_comp.bMaxBurst; 3568 max_burst = urb->ep->ss_ep_comp.bMaxBurst;
@@ -3579,7 +3578,6 @@ static unsigned int xhci_get_burst_count(struct xhci_hcd *xhci,
3579 * contain 1 to (bMaxBurst + 1) packets. 3578 * contain 1 to (bMaxBurst + 1) packets.
3580 */ 3579 */
3581static unsigned int xhci_get_last_burst_packet_count(struct xhci_hcd *xhci, 3580static unsigned int xhci_get_last_burst_packet_count(struct xhci_hcd *xhci,
3582 struct usb_device *udev,
3583 struct urb *urb, unsigned int total_packet_count) 3581 struct urb *urb, unsigned int total_packet_count)
3584{ 3582{
3585 unsigned int max_burst; 3583 unsigned int max_burst;
@@ -3588,8 +3586,7 @@ static unsigned int xhci_get_last_burst_packet_count(struct xhci_hcd *xhci,
3588 if (xhci->hci_version < 0x100) 3586 if (xhci->hci_version < 0x100)
3589 return 0; 3587 return 0;
3590 3588
3591 switch (udev->speed) { 3589 if (urb->dev->speed >= USB_SPEED_SUPER) {
3592 case USB_SPEED_SUPER:
3593 /* bMaxBurst is zero based: 0 means 1 packet per burst */ 3590 /* bMaxBurst is zero based: 0 means 1 packet per burst */
3594 max_burst = urb->ep->ss_ep_comp.bMaxBurst; 3591 max_burst = urb->ep->ss_ep_comp.bMaxBurst;
3595 residue = total_packet_count % (max_burst + 1); 3592 residue = total_packet_count % (max_burst + 1);
@@ -3599,11 +3596,10 @@ static unsigned int xhci_get_last_burst_packet_count(struct xhci_hcd *xhci,
3599 if (residue == 0) 3596 if (residue == 0)
3600 return max_burst; 3597 return max_burst;
3601 return residue - 1; 3598 return residue - 1;
3602 default:
3603 if (total_packet_count == 0)
3604 return 0;
3605 return total_packet_count - 1;
3606 } 3599 }
3600 if (total_packet_count == 0)
3601 return 0;
3602 return total_packet_count - 1;
3607} 3603}
3608 3604
3609/* 3605/*
@@ -3714,6 +3710,7 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3714 int i, j; 3710 int i, j;
3715 bool more_trbs_coming; 3711 bool more_trbs_coming;
3716 struct xhci_virt_ep *xep; 3712 struct xhci_virt_ep *xep;
3713 int frame_id;
3717 3714
3718 xep = &xhci->devs[slot_id]->eps[ep_index]; 3715 xep = &xhci->devs[slot_id]->eps[ep_index];
3719 ep_ring = xhci->devs[slot_id]->eps[ep_index].ring; 3716 ep_ring = xhci->devs[slot_id]->eps[ep_index].ring;
@@ -3723,33 +3720,31 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3723 xhci_dbg(xhci, "Isoc URB with zero packets?\n"); 3720 xhci_dbg(xhci, "Isoc URB with zero packets?\n");
3724 return -EINVAL; 3721 return -EINVAL;
3725 } 3722 }
3726
3727 start_addr = (u64) urb->transfer_dma; 3723 start_addr = (u64) urb->transfer_dma;
3728 start_trb = &ep_ring->enqueue->generic; 3724 start_trb = &ep_ring->enqueue->generic;
3729 start_cycle = ep_ring->cycle_state; 3725 start_cycle = ep_ring->cycle_state;
3730 3726
3731 urb_priv = urb->hcpriv; 3727 urb_priv = urb->hcpriv;
3732 /* Queue the first TRB, even if it's zero-length */ 3728 /* Queue the TRBs for each TD, even if they are zero-length */
3733 for (i = 0; i < num_tds; i++) { 3729 for (i = 0; i < num_tds; i++) {
3734 unsigned int total_packet_count; 3730 unsigned int total_pkt_count, max_pkt;
3735 unsigned int burst_count; 3731 unsigned int burst_count, last_burst_pkt_count;
3736 unsigned int residue; 3732 u32 sia_frame_id;
3737 3733
3738 first_trb = true; 3734 first_trb = true;
3739 running_total = 0; 3735 running_total = 0;
3740 addr = start_addr + urb->iso_frame_desc[i].offset; 3736 addr = start_addr + urb->iso_frame_desc[i].offset;
3741 td_len = urb->iso_frame_desc[i].length; 3737 td_len = urb->iso_frame_desc[i].length;
3742 td_remain_len = td_len; 3738 td_remain_len = td_len;
3743 total_packet_count = DIV_ROUND_UP(td_len, 3739 max_pkt = GET_MAX_PACKET(usb_endpoint_maxp(&urb->ep->desc));
3744 GET_MAX_PACKET( 3740 total_pkt_count = DIV_ROUND_UP(td_len, max_pkt);
3745 usb_endpoint_maxp(&urb->ep->desc))); 3741
3746 /* A zero-length transfer still involves at least one packet. */ 3742 /* A zero-length transfer still involves at least one packet. */
3747 if (total_packet_count == 0) 3743 if (total_pkt_count == 0)
3748 total_packet_count++; 3744 total_pkt_count++;
3749 burst_count = xhci_get_burst_count(xhci, urb->dev, urb, 3745 burst_count = xhci_get_burst_count(xhci, urb, total_pkt_count);
3750 total_packet_count); 3746 last_burst_pkt_count = xhci_get_last_burst_packet_count(xhci,
3751 residue = xhci_get_last_burst_packet_count(xhci, 3747 urb, total_pkt_count);
3752 urb->dev, urb, total_packet_count);
3753 3748
3754 trbs_per_td = count_isoc_trbs_needed(xhci, urb, i); 3749 trbs_per_td = count_isoc_trbs_needed(xhci, urb, i);
3755 3750
@@ -3760,68 +3755,57 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3760 return ret; 3755 return ret;
3761 goto cleanup; 3756 goto cleanup;
3762 } 3757 }
3763
3764 td = urb_priv->td[i]; 3758 td = urb_priv->td[i];
3759
3760 /* use SIA as default, if frame id is used overwrite it */
3761 sia_frame_id = TRB_SIA;
3762 if (!(urb->transfer_flags & URB_ISO_ASAP) &&
3763 HCC_CFC(xhci->hcc_params)) {
3764 frame_id = xhci_get_isoc_frame_id(xhci, urb, i);
3765 if (frame_id >= 0)
3766 sia_frame_id = TRB_FRAME_ID(frame_id);
3767 }
3768 /*
3769 * Set isoc specific data for the first TRB in a TD.
3770 * Prevent HW from getting the TRBs by keeping the cycle state
3771 * inverted in the first TDs isoc TRB.
3772 */
3773 field = TRB_TYPE(TRB_ISOC) |
3774 TRB_TLBPC(last_burst_pkt_count) |
3775 sia_frame_id |
3776 (i ? ep_ring->cycle_state : !start_cycle);
3777
3778 /* xhci 1.1 with ETE uses TD_Size field for TBC, old is Rsvdz */
3779 if (!xep->use_extended_tbc)
3780 field |= TRB_TBC(burst_count);
3781
3782 /* fill the rest of the TRB fields, and remaining normal TRBs */
3765 for (j = 0; j < trbs_per_td; j++) { 3783 for (j = 0; j < trbs_per_td; j++) {
3766 int frame_id = 0;
3767 u32 remainder = 0; 3784 u32 remainder = 0;
3768 field = 0; 3785
3769 3786 /* only first TRB is isoc, overwrite otherwise */
3770 if (first_trb) { 3787 if (!first_trb)
3771 field = TRB_TBC(burst_count) | 3788 field = TRB_TYPE(TRB_NORMAL) |
3772 TRB_TLBPC(residue); 3789 ep_ring->cycle_state;
3773 /* Queue the isoc TRB */
3774 field |= TRB_TYPE(TRB_ISOC);
3775
3776 /* Calculate Frame ID and SIA fields */
3777 if (!(urb->transfer_flags & URB_ISO_ASAP) &&
3778 HCC_CFC(xhci->hcc_params)) {
3779 frame_id = xhci_get_isoc_frame_id(xhci,
3780 urb,
3781 i);
3782 if (frame_id >= 0)
3783 field |= TRB_FRAME_ID(frame_id);
3784 else
3785 field |= TRB_SIA;
3786 } else
3787 field |= TRB_SIA;
3788
3789 if (i == 0) {
3790 if (start_cycle == 0)
3791 field |= 0x1;
3792 } else
3793 field |= ep_ring->cycle_state;
3794 first_trb = false;
3795 } else {
3796 /* Queue other normal TRBs */
3797 field |= TRB_TYPE(TRB_NORMAL);
3798 field |= ep_ring->cycle_state;
3799 }
3800 3790
3801 /* Only set interrupt on short packet for IN EPs */ 3791 /* Only set interrupt on short packet for IN EPs */
3802 if (usb_urb_dir_in(urb)) 3792 if (usb_urb_dir_in(urb))
3803 field |= TRB_ISP; 3793 field |= TRB_ISP;
3804 3794
3805 /* Chain all the TRBs together; clear the chain bit in 3795 /* Set the chain bit for all except the last TRB */
3806 * the last TRB to indicate it's the last TRB in the
3807 * chain.
3808 */
3809 if (j < trbs_per_td - 1) { 3796 if (j < trbs_per_td - 1) {
3810 field |= TRB_CHAIN;
3811 more_trbs_coming = true; 3797 more_trbs_coming = true;
3798 field |= TRB_CHAIN;
3812 } else { 3799 } else {
3800 more_trbs_coming = false;
3813 td->last_trb = ep_ring->enqueue; 3801 td->last_trb = ep_ring->enqueue;
3814 field |= TRB_IOC; 3802 field |= TRB_IOC;
3815 if (xhci->hci_version == 0x100 && 3803 /* set BEI, except for the last TD */
3816 !(xhci->quirks & 3804 if (xhci->hci_version >= 0x100 &&
3817 XHCI_AVOID_BEI)) { 3805 !(xhci->quirks & XHCI_AVOID_BEI) &&
3818 /* Set BEI bit except for the last td */ 3806 i < num_tds - 1)
3819 if (i < num_tds - 1) 3807 field |= TRB_BEI;
3820 field |= TRB_BEI;
3821 }
3822 more_trbs_coming = false;
3823 } 3808 }
3824
3825 /* Calculate TRB length */ 3809 /* Calculate TRB length */
3826 trb_buff_len = TRB_MAX_BUFF_SIZE - 3810 trb_buff_len = TRB_MAX_BUFF_SIZE -
3827 (addr & ((1 << TRB_MAX_BUFF_SHIFT) - 1)); 3811 (addr & ((1 << TRB_MAX_BUFF_SHIFT) - 1));
@@ -3834,9 +3818,15 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
3834 urb, trbs_per_td - j - 1); 3818 urb, trbs_per_td - j - 1);
3835 3819
3836 length_field = TRB_LEN(trb_buff_len) | 3820 length_field = TRB_LEN(trb_buff_len) |
3837 TRB_TD_SIZE(remainder) |
3838 TRB_INTR_TARGET(0); 3821 TRB_INTR_TARGET(0);
3839 3822
3823 /* xhci 1.1 with ETE uses TD Size field for TBC */
3824 if (first_trb && xep->use_extended_tbc)
3825 length_field |= TRB_TD_SIZE_TBC(burst_count);
3826 else
3827 length_field |= TRB_TD_SIZE(remainder);
3828 first_trb = false;
3829
3840 queue_trb(xhci, ep_ring, more_trbs_coming, 3830 queue_trb(xhci, ep_ring, more_trbs_coming,
3841 lower_32_bits(addr), 3831 lower_32_bits(addr),
3842 upper_32_bits(addr), 3832 upper_32_bits(addr),
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 0c8087d3c313..d51ee0c3cf9f 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -2086,6 +2086,7 @@ static unsigned int xhci_get_block_size(struct usb_device *udev)
2086 case USB_SPEED_HIGH: 2086 case USB_SPEED_HIGH:
2087 return HS_BLOCK; 2087 return HS_BLOCK;
2088 case USB_SPEED_SUPER: 2088 case USB_SPEED_SUPER:
2089 case USB_SPEED_SUPER_PLUS:
2089 return SS_BLOCK; 2090 return SS_BLOCK;
2090 case USB_SPEED_UNKNOWN: 2091 case USB_SPEED_UNKNOWN:
2091 case USB_SPEED_WIRELESS: 2092 case USB_SPEED_WIRELESS:
@@ -2211,7 +2212,7 @@ static int xhci_check_bw_table(struct xhci_hcd *xhci,
2211 unsigned int packets_remaining = 0; 2212 unsigned int packets_remaining = 0;
2212 unsigned int i; 2213 unsigned int i;
2213 2214
2214 if (virt_dev->udev->speed == USB_SPEED_SUPER) 2215 if (virt_dev->udev->speed >= USB_SPEED_SUPER)
2215 return xhci_check_ss_bw(xhci, virt_dev); 2216 return xhci_check_ss_bw(xhci, virt_dev);
2216 2217
2217 if (virt_dev->udev->speed == USB_SPEED_HIGH) { 2218 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
@@ -2412,7 +2413,7 @@ void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2412 if (xhci_is_async_ep(ep_bw->type)) 2413 if (xhci_is_async_ep(ep_bw->type))
2413 return; 2414 return;
2414 2415
2415 if (udev->speed == USB_SPEED_SUPER) { 2416 if (udev->speed >= USB_SPEED_SUPER) {
2416 if (xhci_is_sync_in_ep(ep_bw->type)) 2417 if (xhci_is_sync_in_ep(ep_bw->type))
2417 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -= 2418 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2418 xhci_get_ss_bw_consumed(ep_bw); 2419 xhci_get_ss_bw_consumed(ep_bw);
@@ -2450,6 +2451,7 @@ void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2450 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1; 2451 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2451 break; 2452 break;
2452 case USB_SPEED_SUPER: 2453 case USB_SPEED_SUPER:
2454 case USB_SPEED_SUPER_PLUS:
2453 case USB_SPEED_UNKNOWN: 2455 case USB_SPEED_UNKNOWN:
2454 case USB_SPEED_WIRELESS: 2456 case USB_SPEED_WIRELESS:
2455 /* Should never happen because only LS/FS/HS endpoints will get 2457 /* Should never happen because only LS/FS/HS endpoints will get
@@ -2509,6 +2511,7 @@ static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2509 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1; 2511 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2510 break; 2512 break;
2511 case USB_SPEED_SUPER: 2513 case USB_SPEED_SUPER:
2514 case USB_SPEED_SUPER_PLUS:
2512 case USB_SPEED_UNKNOWN: 2515 case USB_SPEED_UNKNOWN:
2513 case USB_SPEED_WIRELESS: 2516 case USB_SPEED_WIRELESS:
2514 /* Should never happen because only LS/FS/HS endpoints will get 2517 /* Should never happen because only LS/FS/HS endpoints will get
@@ -4897,6 +4900,7 @@ int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4897 if (xhci->sbrn == 0x31) { 4900 if (xhci->sbrn == 0x31) {
4898 xhci_info(xhci, "Host supports USB 3.1 Enhanced SuperSpeed\n"); 4901 xhci_info(xhci, "Host supports USB 3.1 Enhanced SuperSpeed\n");
4899 hcd->speed = HCD_USB31; 4902 hcd->speed = HCD_USB31;
4903 hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS;
4900 } 4904 }
4901 /* xHCI private pointer was set in xhci_pci_probe for the second 4905 /* xHCI private pointer was set in xhci_pci_probe for the second
4902 * registered roothub. 4906 * registered roothub.
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index cc651383ce5a..e293e0974f48 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -232,7 +232,9 @@ struct xhci_op_regs {
232 * disabled, or powered-off state. 232 * disabled, or powered-off state.
233 */ 233 */
234#define CMD_PM_INDEX (1 << 11) 234#define CMD_PM_INDEX (1 << 11)
235/* bits 12:31 are reserved (and should be preserved on writes). */ 235/* bit 14 Extended TBC Enable, changes Isoc TRB fields to support larger TBC */
236#define CMD_ETE (1 << 14)
237/* bits 15:31 are reserved (and should be preserved on writes). */
236 238
237/* IMAN - Interrupt Management Register */ 239/* IMAN - Interrupt Management Register */
238#define IMAN_IE (1 << 1) 240#define IMAN_IE (1 << 1)
@@ -343,6 +345,7 @@ struct xhci_op_regs {
343#define SLOT_SPEED_LS (XDEV_LS << 10) 345#define SLOT_SPEED_LS (XDEV_LS << 10)
344#define SLOT_SPEED_HS (XDEV_HS << 10) 346#define SLOT_SPEED_HS (XDEV_HS << 10)
345#define SLOT_SPEED_SS (XDEV_SS << 10) 347#define SLOT_SPEED_SS (XDEV_SS << 10)
348#define SLOT_SPEED_SSP (XDEV_SSP << 10)
346/* Port Indicator Control */ 349/* Port Indicator Control */
347#define PORT_LED_OFF (0 << 14) 350#define PORT_LED_OFF (0 << 14)
348#define PORT_LED_AMBER (1 << 14) 351#define PORT_LED_AMBER (1 << 14)
@@ -748,8 +751,9 @@ struct xhci_ep_ctx {
748#define GET_MAX_PACKET(p) ((p) & 0x7ff) 751#define GET_MAX_PACKET(p) ((p) & 0x7ff)
749 752
750/* tx_info bitmasks */ 753/* tx_info bitmasks */
751#define AVG_TRB_LENGTH_FOR_EP(p) ((p) & 0xffff) 754#define EP_AVG_TRB_LENGTH(p) ((p) & 0xffff)
752#define MAX_ESIT_PAYLOAD_FOR_EP(p) (((p) & 0xffff) << 16) 755#define EP_MAX_ESIT_PAYLOAD_LO(p) (((p) & 0xffff) << 16)
756#define EP_MAX_ESIT_PAYLOAD_HI(p) ((((p) >> 16) & 0xff) << 24)
753#define CTX_TO_MAX_ESIT_PAYLOAD(p) (((p) >> 16) & 0xffff) 757#define CTX_TO_MAX_ESIT_PAYLOAD(p) (((p) >> 16) & 0xffff)
754 758
755/* deq bitmasks */ 759/* deq bitmasks */
@@ -941,6 +945,8 @@ struct xhci_virt_ep {
941 struct list_head bw_endpoint_list; 945 struct list_head bw_endpoint_list;
942 /* Isoch Frame ID checking storage */ 946 /* Isoch Frame ID checking storage */
943 int next_frame_id; 947 int next_frame_id;
948 /* Use new Isoch TRB layout needed for extended TBC support */
949 bool use_extended_tbc;
944}; 950};
945 951
946enum xhci_overhead_type { 952enum xhci_overhead_type {
@@ -1182,9 +1188,12 @@ enum xhci_setup_dev {
1182#define TRB_LEN(p) ((p) & 0x1ffff) 1188#define TRB_LEN(p) ((p) & 0x1ffff)
1183/* TD Size, packets remaining in this TD, bits 21:17 (5 bits, so max 31) */ 1189/* TD Size, packets remaining in this TD, bits 21:17 (5 bits, so max 31) */
1184#define TRB_TD_SIZE(p) (min((p), (u32)31) << 17) 1190#define TRB_TD_SIZE(p) (min((p), (u32)31) << 17)
1191/* xhci 1.1 uses the TD_SIZE field for TBC if Extended TBC is enabled (ETE) */
1192#define TRB_TD_SIZE_TBC(p) (min((p), (u32)31) << 17)
1185/* Interrupter Target - which MSI-X vector to target the completion event at */ 1193/* Interrupter Target - which MSI-X vector to target the completion event at */
1186#define TRB_INTR_TARGET(p) (((p) & 0x3ff) << 22) 1194#define TRB_INTR_TARGET(p) (((p) & 0x3ff) << 22)
1187#define GET_INTR_TARGET(p) (((p) >> 22) & 0x3ff) 1195#define GET_INTR_TARGET(p) (((p) >> 22) & 0x3ff)
1196/* Total burst count field, Rsvdz on xhci 1.1 with Extended TBC enabled (ETE) */
1188#define TRB_TBC(p) (((p) & 0x3) << 7) 1197#define TRB_TBC(p) (((p) & 0x3) << 7)
1189#define TRB_TLBPC(p) (((p) & 0xf) << 16) 1198#define TRB_TLBPC(p) (((p) & 0xf) << 16)
1190 1199
diff --git a/drivers/usb/misc/chaoskey.c b/drivers/usb/misc/chaoskey.c
index 23c794813e6a..76350e4ee807 100644
--- a/drivers/usb/misc/chaoskey.c
+++ b/drivers/usb/misc/chaoskey.c
@@ -73,6 +73,8 @@ static const struct usb_device_id chaoskey_table[] = {
73}; 73};
74MODULE_DEVICE_TABLE(usb, chaoskey_table); 74MODULE_DEVICE_TABLE(usb, chaoskey_table);
75 75
76static void chaos_read_callback(struct urb *urb);
77
76/* Driver-local specific stuff */ 78/* Driver-local specific stuff */
77struct chaoskey { 79struct chaoskey {
78 struct usb_interface *interface; 80 struct usb_interface *interface;
@@ -80,7 +82,8 @@ struct chaoskey {
80 struct mutex lock; 82 struct mutex lock;
81 struct mutex rng_lock; 83 struct mutex rng_lock;
82 int open; /* open count */ 84 int open; /* open count */
83 int present; /* device not disconnected */ 85 bool present; /* device not disconnected */
86 bool reading; /* ongoing IO */
84 int size; /* size of buf */ 87 int size; /* size of buf */
85 int valid; /* bytes of buf read */ 88 int valid; /* bytes of buf read */
86 int used; /* bytes of buf consumed */ 89 int used; /* bytes of buf consumed */
@@ -88,15 +91,19 @@ struct chaoskey {
88 struct hwrng hwrng; /* Embedded struct for hwrng */ 91 struct hwrng hwrng; /* Embedded struct for hwrng */
89 int hwrng_registered; /* registered with hwrng API */ 92 int hwrng_registered; /* registered with hwrng API */
90 wait_queue_head_t wait_q; /* for timeouts */ 93 wait_queue_head_t wait_q; /* for timeouts */
94 struct urb *urb; /* for performing IO */
91 char *buf; 95 char *buf;
92}; 96};
93 97
94static void chaoskey_free(struct chaoskey *dev) 98static void chaoskey_free(struct chaoskey *dev)
95{ 99{
96 usb_dbg(dev->interface, "free"); 100 if (dev) {
97 kfree(dev->name); 101 usb_dbg(dev->interface, "free");
98 kfree(dev->buf); 102 usb_free_urb(dev->urb);
99 kfree(dev); 103 kfree(dev->name);
104 kfree(dev->buf);
105 kfree(dev);
106 }
100} 107}
101 108
102static int chaoskey_probe(struct usb_interface *interface, 109static int chaoskey_probe(struct usb_interface *interface,
@@ -107,7 +114,7 @@ static int chaoskey_probe(struct usb_interface *interface,
107 int i; 114 int i;
108 int in_ep = -1; 115 int in_ep = -1;
109 struct chaoskey *dev; 116 struct chaoskey *dev;
110 int result; 117 int result = -ENOMEM;
111 int size; 118 int size;
112 119
113 usb_dbg(interface, "probe %s-%s", udev->product, udev->serial); 120 usb_dbg(interface, "probe %s-%s", udev->product, udev->serial);
@@ -142,14 +149,25 @@ static int chaoskey_probe(struct usb_interface *interface,
142 dev = kzalloc(sizeof(struct chaoskey), GFP_KERNEL); 149 dev = kzalloc(sizeof(struct chaoskey), GFP_KERNEL);
143 150
144 if (dev == NULL) 151 if (dev == NULL)
145 return -ENOMEM; 152 goto out;
146 153
147 dev->buf = kmalloc(size, GFP_KERNEL); 154 dev->buf = kmalloc(size, GFP_KERNEL);
148 155
149 if (dev->buf == NULL) { 156 if (dev->buf == NULL)
150 kfree(dev); 157 goto out;
151 return -ENOMEM; 158
152 } 159 dev->urb = usb_alloc_urb(0, GFP_KERNEL);
160
161 if (!dev->urb)
162 goto out;
163
164 usb_fill_bulk_urb(dev->urb,
165 udev,
166 usb_rcvbulkpipe(udev, in_ep),
167 dev->buf,
168 size,
169 chaos_read_callback,
170 dev);
153 171
154 /* Construct a name using the product and serial values. Each 172 /* Construct a name using the product and serial values. Each
155 * device needs a unique name for the hwrng code 173 * device needs a unique name for the hwrng code
@@ -158,11 +176,8 @@ static int chaoskey_probe(struct usb_interface *interface,
158 if (udev->product && udev->serial) { 176 if (udev->product && udev->serial) {
159 dev->name = kmalloc(strlen(udev->product) + 1 + 177 dev->name = kmalloc(strlen(udev->product) + 1 +
160 strlen(udev->serial) + 1, GFP_KERNEL); 178 strlen(udev->serial) + 1, GFP_KERNEL);
161 if (dev->name == NULL) { 179 if (dev->name == NULL)
162 kfree(dev->buf); 180 goto out;
163 kfree(dev);
164 return -ENOMEM;
165 }
166 181
167 strcpy(dev->name, udev->product); 182 strcpy(dev->name, udev->product);
168 strcat(dev->name, "-"); 183 strcat(dev->name, "-");
@@ -186,9 +201,7 @@ static int chaoskey_probe(struct usb_interface *interface,
186 result = usb_register_dev(interface, &chaoskey_class); 201 result = usb_register_dev(interface, &chaoskey_class);
187 if (result) { 202 if (result) {
188 usb_err(interface, "Unable to allocate minor number."); 203 usb_err(interface, "Unable to allocate minor number.");
189 usb_set_intfdata(interface, NULL); 204 goto out;
190 chaoskey_free(dev);
191 return result;
192 } 205 }
193 206
194 dev->hwrng.name = dev->name ? dev->name : chaoskey_driver.name; 207 dev->hwrng.name = dev->name ? dev->name : chaoskey_driver.name;
@@ -215,6 +228,11 @@ static int chaoskey_probe(struct usb_interface *interface,
215 228
216 usb_dbg(interface, "chaoskey probe success, size %d", dev->size); 229 usb_dbg(interface, "chaoskey probe success, size %d", dev->size);
217 return 0; 230 return 0;
231
232out:
233 usb_set_intfdata(interface, NULL);
234 chaoskey_free(dev);
235 return result;
218} 236}
219 237
220static void chaoskey_disconnect(struct usb_interface *interface) 238static void chaoskey_disconnect(struct usb_interface *interface)
@@ -237,6 +255,7 @@ static void chaoskey_disconnect(struct usb_interface *interface)
237 mutex_lock(&dev->lock); 255 mutex_lock(&dev->lock);
238 256
239 dev->present = 0; 257 dev->present = 0;
258 usb_poison_urb(dev->urb);
240 259
241 if (!dev->open) { 260 if (!dev->open) {
242 mutex_unlock(&dev->lock); 261 mutex_unlock(&dev->lock);
@@ -311,14 +330,33 @@ static int chaoskey_release(struct inode *inode, struct file *file)
311 return 0; 330 return 0;
312} 331}
313 332
333static void chaos_read_callback(struct urb *urb)
334{
335 struct chaoskey *dev = urb->context;
336 int status = urb->status;
337
338 usb_dbg(dev->interface, "callback status (%d)", status);
339
340 if (status == 0)
341 dev->valid = urb->actual_length;
342 else
343 dev->valid = 0;
344
345 dev->used = 0;
346
347 /* must be seen first before validity is announced */
348 smp_wmb();
349
350 dev->reading = false;
351 wake_up(&dev->wait_q);
352}
353
314/* Fill the buffer. Called with dev->lock held 354/* Fill the buffer. Called with dev->lock held
315 */ 355 */
316static int _chaoskey_fill(struct chaoskey *dev) 356static int _chaoskey_fill(struct chaoskey *dev)
317{ 357{
318 DEFINE_WAIT(wait); 358 DEFINE_WAIT(wait);
319 int result; 359 int result;
320 int this_read;
321 struct usb_device *udev = interface_to_usbdev(dev->interface);
322 360
323 usb_dbg(dev->interface, "fill"); 361 usb_dbg(dev->interface, "fill");
324 362
@@ -343,21 +381,31 @@ static int _chaoskey_fill(struct chaoskey *dev)
343 return result; 381 return result;
344 } 382 }
345 383
346 result = usb_bulk_msg(udev, 384 dev->reading = true;
347 usb_rcvbulkpipe(udev, dev->in_ep), 385 result = usb_submit_urb(dev->urb, GFP_KERNEL);
348 dev->buf, dev->size, &this_read, 386 if (result < 0) {
349 NAK_TIMEOUT); 387 result = usb_translate_errors(result);
388 dev->reading = false;
389 goto out;
390 }
391
392 result = wait_event_interruptible_timeout(
393 dev->wait_q,
394 !dev->reading,
395 NAK_TIMEOUT);
396
397 if (result < 0)
398 goto out;
350 399
400 if (result == 0)
401 result = -ETIMEDOUT;
402 else
403 result = dev->valid;
404out:
351 /* Let the device go back to sleep eventually */ 405 /* Let the device go back to sleep eventually */
352 usb_autopm_put_interface(dev->interface); 406 usb_autopm_put_interface(dev->interface);
353 407
354 if (result == 0) { 408 usb_dbg(dev->interface, "read %d bytes", dev->valid);
355 dev->valid = this_read;
356 dev->used = 0;
357 }
358
359 usb_dbg(dev->interface, "bulk_msg result %d this_read %d",
360 result, this_read);
361 409
362 return result; 410 return result;
363} 411}
@@ -395,13 +443,7 @@ static ssize_t chaoskey_read(struct file *file,
395 goto bail; 443 goto bail;
396 if (dev->valid == dev->used) { 444 if (dev->valid == dev->used) {
397 result = _chaoskey_fill(dev); 445 result = _chaoskey_fill(dev);
398 if (result) { 446 if (result < 0) {
399 mutex_unlock(&dev->lock);
400 goto bail;
401 }
402
403 /* Read returned zero bytes */
404 if (dev->used == dev->valid) {
405 mutex_unlock(&dev->lock); 447 mutex_unlock(&dev->lock);
406 goto bail; 448 goto bail;
407 } 449 }
@@ -435,6 +477,8 @@ bail:
435 return read_count; 477 return read_count;
436 } 478 }
437 usb_dbg(dev->interface, "empty read, result %d", result); 479 usb_dbg(dev->interface, "empty read, result %d", result);
480 if (result == -ETIMEDOUT)
481 result = -EAGAIN;
438 return result; 482 return result;
439} 483}
440 484
diff --git a/drivers/usb/misc/idmouse.c b/drivers/usb/misc/idmouse.c
index 4e38683c653c..5105397e62fc 100644
--- a/drivers/usb/misc/idmouse.c
+++ b/drivers/usb/misc/idmouse.c
@@ -257,9 +257,9 @@ static int idmouse_open(struct inode *inode, struct file *file)
257 if (result) 257 if (result)
258 goto error; 258 goto error;
259 result = idmouse_create_image (dev); 259 result = idmouse_create_image (dev);
260 usb_autopm_put_interface(interface);
260 if (result) 261 if (result)
261 goto error; 262 goto error;
262 usb_autopm_put_interface(interface);
263 263
264 /* increment our usage count for the driver */ 264 /* increment our usage count for the driver */
265 ++dev->open; 265 ++dev->open;
diff --git a/drivers/usb/misc/sisusbvga/sisusb.c b/drivers/usb/misc/sisusbvga/sisusb.c
index 8efbabacc84e..a22de52cb083 100644
--- a/drivers/usb/misc/sisusbvga/sisusb.c
+++ b/drivers/usb/misc/sisusbvga/sisusb.c
@@ -61,8 +61,8 @@
61/* Forward declarations / clean-up routines */ 61/* Forward declarations / clean-up routines */
62 62
63#ifdef INCL_SISUSB_CON 63#ifdef INCL_SISUSB_CON
64static int sisusb_first_vc = 0; 64static int sisusb_first_vc;
65static int sisusb_last_vc = 0; 65static int sisusb_last_vc;
66module_param_named(first, sisusb_first_vc, int, 0); 66module_param_named(first, sisusb_first_vc, int, 0);
67module_param_named(last, sisusb_last_vc, int, 0); 67module_param_named(last, sisusb_last_vc, int, 0);
68MODULE_PARM_DESC(first, "Number of first console to take over (1 - MAX_NR_CONSOLES)"); 68MODULE_PARM_DESC(first, "Number of first console to take over (1 - MAX_NR_CONSOLES)");
@@ -71,25 +71,19 @@ MODULE_PARM_DESC(last, "Number of last console to take over (1 - MAX_NR_CONSOLES
71 71
72static struct usb_driver sisusb_driver; 72static struct usb_driver sisusb_driver;
73 73
74static void 74static void sisusb_free_buffers(struct sisusb_usb_data *sisusb)
75sisusb_free_buffers(struct sisusb_usb_data *sisusb)
76{ 75{
77 int i; 76 int i;
78 77
79 for (i = 0; i < NUMOBUFS; i++) { 78 for (i = 0; i < NUMOBUFS; i++) {
80 if (sisusb->obuf[i]) { 79 kfree(sisusb->obuf[i]);
81 kfree(sisusb->obuf[i]); 80 sisusb->obuf[i] = NULL;
82 sisusb->obuf[i] = NULL;
83 }
84 }
85 if (sisusb->ibuf) {
86 kfree(sisusb->ibuf);
87 sisusb->ibuf = NULL;
88 } 81 }
82 kfree(sisusb->ibuf);
83 sisusb->ibuf = NULL;
89} 84}
90 85
91static void 86static void sisusb_free_urbs(struct sisusb_usb_data *sisusb)
92sisusb_free_urbs(struct sisusb_usb_data *sisusb)
93{ 87{
94 int i; 88 int i;
95 89
@@ -108,8 +102,7 @@ sisusb_free_urbs(struct sisusb_usb_data *sisusb)
108/* out-urb management */ 102/* out-urb management */
109 103
110/* Return 1 if all free, 0 otherwise */ 104/* Return 1 if all free, 0 otherwise */
111static int 105static int sisusb_all_free(struct sisusb_usb_data *sisusb)
112sisusb_all_free(struct sisusb_usb_data *sisusb)
113{ 106{
114 int i; 107 int i;
115 108
@@ -124,8 +117,7 @@ sisusb_all_free(struct sisusb_usb_data *sisusb)
124} 117}
125 118
126/* Kill all busy URBs */ 119/* Kill all busy URBs */
127static void 120static void sisusb_kill_all_busy(struct sisusb_usb_data *sisusb)
128sisusb_kill_all_busy(struct sisusb_usb_data *sisusb)
129{ 121{
130 int i; 122 int i;
131 123
@@ -141,20 +133,17 @@ sisusb_kill_all_busy(struct sisusb_usb_data *sisusb)
141} 133}
142 134
143/* Return 1 if ok, 0 if error (not all complete within timeout) */ 135/* Return 1 if ok, 0 if error (not all complete within timeout) */
144static int 136static int sisusb_wait_all_out_complete(struct sisusb_usb_data *sisusb)
145sisusb_wait_all_out_complete(struct sisusb_usb_data *sisusb)
146{ 137{
147 int timeout = 5 * HZ, i = 1; 138 int timeout = 5 * HZ, i = 1;
148 139
149 wait_event_timeout(sisusb->wait_q, 140 wait_event_timeout(sisusb->wait_q, (i = sisusb_all_free(sisusb)),
150 (i = sisusb_all_free(sisusb)), 141 timeout);
151 timeout);
152 142
153 return i; 143 return i;
154} 144}
155 145
156static int 146static int sisusb_outurb_available(struct sisusb_usb_data *sisusb)
157sisusb_outurb_available(struct sisusb_usb_data *sisusb)
158{ 147{
159 int i; 148 int i;
160 149
@@ -168,20 +157,17 @@ sisusb_outurb_available(struct sisusb_usb_data *sisusb)
168 return -1; 157 return -1;
169} 158}
170 159
171static int 160static int sisusb_get_free_outbuf(struct sisusb_usb_data *sisusb)
172sisusb_get_free_outbuf(struct sisusb_usb_data *sisusb)
173{ 161{
174 int i, timeout = 5 * HZ; 162 int i, timeout = 5 * HZ;
175 163
176 wait_event_timeout(sisusb->wait_q, 164 wait_event_timeout(sisusb->wait_q,
177 ((i = sisusb_outurb_available(sisusb)) >= 0), 165 ((i = sisusb_outurb_available(sisusb)) >= 0), timeout);
178 timeout);
179 166
180 return i; 167 return i;
181} 168}
182 169
183static int 170static int sisusb_alloc_outbuf(struct sisusb_usb_data *sisusb)
184sisusb_alloc_outbuf(struct sisusb_usb_data *sisusb)
185{ 171{
186 int i; 172 int i;
187 173
@@ -193,8 +179,7 @@ sisusb_alloc_outbuf(struct sisusb_usb_data *sisusb)
193 return i; 179 return i;
194} 180}
195 181
196static void 182static void sisusb_free_outbuf(struct sisusb_usb_data *sisusb, int index)
197sisusb_free_outbuf(struct sisusb_usb_data *sisusb, int index)
198{ 183{
199 if ((index >= 0) && (index < sisusb->numobufs)) 184 if ((index >= 0) && (index < sisusb->numobufs))
200 sisusb->urbstatus[index] &= ~SU_URB_ALLOC; 185 sisusb->urbstatus[index] &= ~SU_URB_ALLOC;
@@ -202,8 +187,7 @@ sisusb_free_outbuf(struct sisusb_usb_data *sisusb, int index)
202 187
203/* completion callback */ 188/* completion callback */
204 189
205static void 190static void sisusb_bulk_completeout(struct urb *urb)
206sisusb_bulk_completeout(struct urb *urb)
207{ 191{
208 struct sisusb_urb_context *context = urb->context; 192 struct sisusb_urb_context *context = urb->context;
209 struct sisusb_usb_data *sisusb; 193 struct sisusb_usb_data *sisusb;
@@ -225,9 +209,9 @@ sisusb_bulk_completeout(struct urb *urb)
225 wake_up(&sisusb->wait_q); 209 wake_up(&sisusb->wait_q);
226} 210}
227 211
228static int 212static int sisusb_bulkout_msg(struct sisusb_usb_data *sisusb, int index,
229sisusb_bulkout_msg(struct sisusb_usb_data *sisusb, int index, unsigned int pipe, void *data, 213 unsigned int pipe, void *data, int len, int *actual_length,
230 int len, int *actual_length, int timeout, unsigned int tflags) 214 int timeout, unsigned int tflags)
231{ 215{
232 struct urb *urb = sisusb->sisurbout[index]; 216 struct urb *urb = sisusb->sisurbout[index];
233 int retval, byteswritten = 0; 217 int retval, byteswritten = 0;
@@ -236,14 +220,15 @@ sisusb_bulkout_msg(struct sisusb_usb_data *sisusb, int index, unsigned int pipe,
236 urb->transfer_flags = 0; 220 urb->transfer_flags = 0;
237 221
238 usb_fill_bulk_urb(urb, sisusb->sisusb_dev, pipe, data, len, 222 usb_fill_bulk_urb(urb, sisusb->sisusb_dev, pipe, data, len,
239 sisusb_bulk_completeout, &sisusb->urbout_context[index]); 223 sisusb_bulk_completeout,
224 &sisusb->urbout_context[index]);
240 225
241 urb->transfer_flags |= tflags; 226 urb->transfer_flags |= tflags;
242 urb->actual_length = 0; 227 urb->actual_length = 0;
243 228
244 /* Set up context */ 229 /* Set up context */
245 sisusb->urbout_context[index].actual_length = (timeout) ? 230 sisusb->urbout_context[index].actual_length = (timeout) ?
246 NULL : actual_length; 231 NULL : actual_length;
247 232
248 /* Declare this urb/buffer in use */ 233 /* Declare this urb/buffer in use */
249 sisusb->urbstatus[index] |= SU_URB_BUSY; 234 sisusb->urbstatus[index] |= SU_URB_BUSY;
@@ -254,8 +239,8 @@ sisusb_bulkout_msg(struct sisusb_usb_data *sisusb, int index, unsigned int pipe,
254 /* If OK, and if timeout > 0, wait for completion */ 239 /* If OK, and if timeout > 0, wait for completion */
255 if ((retval == 0) && timeout) { 240 if ((retval == 0) && timeout) {
256 wait_event_timeout(sisusb->wait_q, 241 wait_event_timeout(sisusb->wait_q,
257 (!(sisusb->urbstatus[index] & SU_URB_BUSY)), 242 (!(sisusb->urbstatus[index] & SU_URB_BUSY)),
258 timeout); 243 timeout);
259 if (sisusb->urbstatus[index] & SU_URB_BUSY) { 244 if (sisusb->urbstatus[index] & SU_URB_BUSY) {
260 /* URB timed out... kill it and report error */ 245 /* URB timed out... kill it and report error */
261 usb_kill_urb(urb); 246 usb_kill_urb(urb);
@@ -277,8 +262,7 @@ sisusb_bulkout_msg(struct sisusb_usb_data *sisusb, int index, unsigned int pipe,
277 262
278/* completion callback */ 263/* completion callback */
279 264
280static void 265static void sisusb_bulk_completein(struct urb *urb)
281sisusb_bulk_completein(struct urb *urb)
282{ 266{
283 struct sisusb_usb_data *sisusb = urb->context; 267 struct sisusb_usb_data *sisusb = urb->context;
284 268
@@ -289,9 +273,9 @@ sisusb_bulk_completein(struct urb *urb)
289 wake_up(&sisusb->wait_q); 273 wake_up(&sisusb->wait_q);
290} 274}
291 275
292static int 276static int sisusb_bulkin_msg(struct sisusb_usb_data *sisusb,
293sisusb_bulkin_msg(struct sisusb_usb_data *sisusb, unsigned int pipe, void *data, 277 unsigned int pipe, void *data, int len,
294 int len, int *actual_length, int timeout, unsigned int tflags) 278 int *actual_length, int timeout, unsigned int tflags)
295{ 279{
296 struct urb *urb = sisusb->sisurbin; 280 struct urb *urb = sisusb->sisurbin;
297 int retval, readbytes = 0; 281 int retval, readbytes = 0;
@@ -375,7 +359,7 @@ static int sisusb_send_bulk_msg(struct sisusb_usb_data *sisusb, int ep, int len,
375 359
376 do { 360 do {
377 passsize = thispass = (sisusb->obufsize < count) ? 361 passsize = thispass = (sisusb->obufsize < count) ?
378 sisusb->obufsize : count; 362 sisusb->obufsize : count;
379 363
380 if (index < 0) 364 if (index < 0)
381 index = sisusb_get_free_outbuf(sisusb); 365 index = sisusb_get_free_outbuf(sisusb);
@@ -405,14 +389,9 @@ static int sisusb_send_bulk_msg(struct sisusb_usb_data *sisusb, int ep, int len,
405 if (!sisusb->sisusb_dev) 389 if (!sisusb->sisusb_dev)
406 return -ENODEV; 390 return -ENODEV;
407 391
408 result = sisusb_bulkout_msg(sisusb, 392 result = sisusb_bulkout_msg(sisusb, index, pipe,
409 index, 393 buffer, thispass, &transferred_len,
410 pipe, 394 async ? 0 : 5 * HZ, tflags);
411 buffer,
412 thispass,
413 &transferred_len,
414 async ? 0 : 5 * HZ,
415 tflags);
416 395
417 if (result == -ETIMEDOUT) { 396 if (result == -ETIMEDOUT) {
418 397
@@ -500,13 +479,8 @@ static int sisusb_recv_bulk_msg(struct sisusb_usb_data *sisusb, int ep, int len,
500 479
501 thispass = (bufsize < count) ? bufsize : count; 480 thispass = (bufsize < count) ? bufsize : count;
502 481
503 result = sisusb_bulkin_msg(sisusb, 482 result = sisusb_bulkin_msg(sisusb, pipe, buffer, thispass,
504 pipe, 483 &transferred_len, 5 * HZ, tflags);
505 buffer,
506 thispass,
507 &transferred_len,
508 5 * HZ,
509 tflags);
510 484
511 if (transferred_len) 485 if (transferred_len)
512 thispass = transferred_len; 486 thispass = transferred_len;
@@ -549,7 +523,7 @@ static int sisusb_recv_bulk_msg(struct sisusb_usb_data *sisusb, int ep, int len,
549} 523}
550 524
551static int sisusb_send_packet(struct sisusb_usb_data *sisusb, int len, 525static int sisusb_send_packet(struct sisusb_usb_data *sisusb, int len,
552 struct sisusb_packet *packet) 526 struct sisusb_packet *packet)
553{ 527{
554 int ret; 528 int ret;
555 ssize_t bytes_transferred = 0; 529 ssize_t bytes_transferred = 0;
@@ -585,8 +559,7 @@ static int sisusb_send_packet(struct sisusb_usb_data *sisusb, int len,
585} 559}
586 560
587static int sisusb_send_bridge_packet(struct sisusb_usb_data *sisusb, int len, 561static int sisusb_send_bridge_packet(struct sisusb_usb_data *sisusb, int len,
588 struct sisusb_packet *packet, 562 struct sisusb_packet *packet, unsigned int tflags)
589 unsigned int tflags)
590{ 563{
591 int ret; 564 int ret;
592 ssize_t bytes_transferred = 0; 565 ssize_t bytes_transferred = 0;
@@ -634,7 +607,7 @@ static int sisusb_send_bridge_packet(struct sisusb_usb_data *sisusb, int len,
634 */ 607 */
635 608
636static int sisusb_write_memio_byte(struct sisusb_usb_data *sisusb, int type, 609static int sisusb_write_memio_byte(struct sisusb_usb_data *sisusb, int type,
637 u32 addr, u8 data) 610 u32 addr, u8 data)
638{ 611{
639 struct sisusb_packet packet; 612 struct sisusb_packet packet;
640 int ret; 613 int ret;
@@ -647,7 +620,7 @@ static int sisusb_write_memio_byte(struct sisusb_usb_data *sisusb, int type,
647} 620}
648 621
649static int sisusb_write_memio_word(struct sisusb_usb_data *sisusb, int type, 622static int sisusb_write_memio_word(struct sisusb_usb_data *sisusb, int type,
650 u32 addr, u16 data) 623 u32 addr, u16 data)
651{ 624{
652 struct sisusb_packet packet; 625 struct sisusb_packet packet;
653 int ret = 0; 626 int ret = 0;
@@ -655,36 +628,36 @@ static int sisusb_write_memio_word(struct sisusb_usb_data *sisusb, int type,
655 packet.address = addr & ~3; 628 packet.address = addr & ~3;
656 629
657 switch (addr & 3) { 630 switch (addr & 3) {
658 case 0: 631 case 0:
659 packet.header = (type << 6) | 0x0003; 632 packet.header = (type << 6) | 0x0003;
660 packet.data = (u32)data; 633 packet.data = (u32)data;
661 ret = sisusb_send_packet(sisusb, 10, &packet); 634 ret = sisusb_send_packet(sisusb, 10, &packet);
662 break; 635 break;
663 case 1: 636 case 1:
664 packet.header = (type << 6) | 0x0006; 637 packet.header = (type << 6) | 0x0006;
665 packet.data = (u32)data << 8; 638 packet.data = (u32)data << 8;
666 ret = sisusb_send_packet(sisusb, 10, &packet); 639 ret = sisusb_send_packet(sisusb, 10, &packet);
667 break; 640 break;
668 case 2: 641 case 2:
669 packet.header = (type << 6) | 0x000c; 642 packet.header = (type << 6) | 0x000c;
670 packet.data = (u32)data << 16; 643 packet.data = (u32)data << 16;
671 ret = sisusb_send_packet(sisusb, 10, &packet); 644 ret = sisusb_send_packet(sisusb, 10, &packet);
672 break; 645 break;
673 case 3: 646 case 3:
674 packet.header = (type << 6) | 0x0008; 647 packet.header = (type << 6) | 0x0008;
675 packet.data = (u32)data << 24; 648 packet.data = (u32)data << 24;
676 ret = sisusb_send_packet(sisusb, 10, &packet); 649 ret = sisusb_send_packet(sisusb, 10, &packet);
677 packet.header = (type << 6) | 0x0001; 650 packet.header = (type << 6) | 0x0001;
678 packet.address = (addr & ~3) + 4; 651 packet.address = (addr & ~3) + 4;
679 packet.data = (u32)data >> 8; 652 packet.data = (u32)data >> 8;
680 ret |= sisusb_send_packet(sisusb, 10, &packet); 653 ret |= sisusb_send_packet(sisusb, 10, &packet);
681 } 654 }
682 655
683 return ret; 656 return ret;
684} 657}
685 658
686static int sisusb_write_memio_24bit(struct sisusb_usb_data *sisusb, int type, 659static int sisusb_write_memio_24bit(struct sisusb_usb_data *sisusb, int type,
687 u32 addr, u32 data) 660 u32 addr, u32 data)
688{ 661{
689 struct sisusb_packet packet; 662 struct sisusb_packet packet;
690 int ret = 0; 663 int ret = 0;
@@ -692,40 +665,40 @@ static int sisusb_write_memio_24bit(struct sisusb_usb_data *sisusb, int type,
692 packet.address = addr & ~3; 665 packet.address = addr & ~3;
693 666
694 switch (addr & 3) { 667 switch (addr & 3) {
695 case 0: 668 case 0:
696 packet.header = (type << 6) | 0x0007; 669 packet.header = (type << 6) | 0x0007;
697 packet.data = data & 0x00ffffff; 670 packet.data = data & 0x00ffffff;
698 ret = sisusb_send_packet(sisusb, 10, &packet); 671 ret = sisusb_send_packet(sisusb, 10, &packet);
699 break; 672 break;
700 case 1: 673 case 1:
701 packet.header = (type << 6) | 0x000e; 674 packet.header = (type << 6) | 0x000e;
702 packet.data = data << 8; 675 packet.data = data << 8;
703 ret = sisusb_send_packet(sisusb, 10, &packet); 676 ret = sisusb_send_packet(sisusb, 10, &packet);
704 break; 677 break;
705 case 2: 678 case 2:
706 packet.header = (type << 6) | 0x000c; 679 packet.header = (type << 6) | 0x000c;
707 packet.data = data << 16; 680 packet.data = data << 16;
708 ret = sisusb_send_packet(sisusb, 10, &packet); 681 ret = sisusb_send_packet(sisusb, 10, &packet);
709 packet.header = (type << 6) | 0x0001; 682 packet.header = (type << 6) | 0x0001;
710 packet.address = (addr & ~3) + 4; 683 packet.address = (addr & ~3) + 4;
711 packet.data = (data >> 16) & 0x00ff; 684 packet.data = (data >> 16) & 0x00ff;
712 ret |= sisusb_send_packet(sisusb, 10, &packet); 685 ret |= sisusb_send_packet(sisusb, 10, &packet);
713 break; 686 break;
714 case 3: 687 case 3:
715 packet.header = (type << 6) | 0x0008; 688 packet.header = (type << 6) | 0x0008;
716 packet.data = data << 24; 689 packet.data = data << 24;
717 ret = sisusb_send_packet(sisusb, 10, &packet); 690 ret = sisusb_send_packet(sisusb, 10, &packet);
718 packet.header = (type << 6) | 0x0003; 691 packet.header = (type << 6) | 0x0003;
719 packet.address = (addr & ~3) + 4; 692 packet.address = (addr & ~3) + 4;
720 packet.data = (data >> 8) & 0xffff; 693 packet.data = (data >> 8) & 0xffff;
721 ret |= sisusb_send_packet(sisusb, 10, &packet); 694 ret |= sisusb_send_packet(sisusb, 10, &packet);
722 } 695 }
723 696
724 return ret; 697 return ret;
725} 698}
726 699
727static int sisusb_write_memio_long(struct sisusb_usb_data *sisusb, int type, 700static int sisusb_write_memio_long(struct sisusb_usb_data *sisusb, int type,
728 u32 addr, u32 data) 701 u32 addr, u32 data)
729{ 702{
730 struct sisusb_packet packet; 703 struct sisusb_packet packet;
731 int ret = 0; 704 int ret = 0;
@@ -733,37 +706,37 @@ static int sisusb_write_memio_long(struct sisusb_usb_data *sisusb, int type,
733 packet.address = addr & ~3; 706 packet.address = addr & ~3;
734 707
735 switch (addr & 3) { 708 switch (addr & 3) {
736 case 0: 709 case 0:
737 packet.header = (type << 6) | 0x000f; 710 packet.header = (type << 6) | 0x000f;
738 packet.data = data; 711 packet.data = data;
739 ret = sisusb_send_packet(sisusb, 10, &packet); 712 ret = sisusb_send_packet(sisusb, 10, &packet);
740 break; 713 break;
741 case 1: 714 case 1:
742 packet.header = (type << 6) | 0x000e; 715 packet.header = (type << 6) | 0x000e;
743 packet.data = data << 8; 716 packet.data = data << 8;
744 ret = sisusb_send_packet(sisusb, 10, &packet); 717 ret = sisusb_send_packet(sisusb, 10, &packet);
745 packet.header = (type << 6) | 0x0001; 718 packet.header = (type << 6) | 0x0001;
746 packet.address = (addr & ~3) + 4; 719 packet.address = (addr & ~3) + 4;
747 packet.data = data >> 24; 720 packet.data = data >> 24;
748 ret |= sisusb_send_packet(sisusb, 10, &packet); 721 ret |= sisusb_send_packet(sisusb, 10, &packet);
749 break; 722 break;
750 case 2: 723 case 2:
751 packet.header = (type << 6) | 0x000c; 724 packet.header = (type << 6) | 0x000c;
752 packet.data = data << 16; 725 packet.data = data << 16;
753 ret = sisusb_send_packet(sisusb, 10, &packet); 726 ret = sisusb_send_packet(sisusb, 10, &packet);
754 packet.header = (type << 6) | 0x0003; 727 packet.header = (type << 6) | 0x0003;
755 packet.address = (addr & ~3) + 4; 728 packet.address = (addr & ~3) + 4;
756 packet.data = data >> 16; 729 packet.data = data >> 16;
757 ret |= sisusb_send_packet(sisusb, 10, &packet); 730 ret |= sisusb_send_packet(sisusb, 10, &packet);
758 break; 731 break;
759 case 3: 732 case 3:
760 packet.header = (type << 6) | 0x0008; 733 packet.header = (type << 6) | 0x0008;
761 packet.data = data << 24; 734 packet.data = data << 24;
762 ret = sisusb_send_packet(sisusb, 10, &packet); 735 ret = sisusb_send_packet(sisusb, 10, &packet);
763 packet.header = (type << 6) | 0x0007; 736 packet.header = (type << 6) | 0x0007;
764 packet.address = (addr & ~3) + 4; 737 packet.address = (addr & ~3) + 4;
765 packet.data = data >> 8; 738 packet.data = data >> 8;
766 ret |= sisusb_send_packet(sisusb, 10, &packet); 739 ret |= sisusb_send_packet(sisusb, 10, &packet);
767 } 740 }
768 741
769 return ret; 742 return ret;
@@ -780,13 +753,12 @@ static int sisusb_write_memio_long(struct sisusb_usb_data *sisusb, int type,
780 */ 753 */
781 754
782static int sisusb_write_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr, 755static int sisusb_write_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr,
783 char *kernbuffer, int length, 756 char *kernbuffer, int length, const char __user *userbuffer,
784 const char __user *userbuffer, int index, 757 int index, ssize_t *bytes_written)
785 ssize_t *bytes_written)
786{ 758{
787 struct sisusb_packet packet; 759 struct sisusb_packet packet;
788 int ret = 0; 760 int ret = 0;
789 static int msgcount = 0; 761 static int msgcount;
790 u8 swap8, fromkern = kernbuffer ? 1 : 0; 762 u8 swap8, fromkern = kernbuffer ? 1 : 0;
791 u16 swap16; 763 u16 swap16;
792 u32 swap32, flag = (length >> 28) & 1; 764 u32 swap32, flag = (length >> 28) & 1;
@@ -803,9 +775,7 @@ static int sisusb_write_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr,
803 length &= 0x00ffffff; 775 length &= 0x00ffffff;
804 776
805 while (length) { 777 while (length) {
806 778 switch (length) {
807 switch (length) {
808
809 case 1: 779 case 1:
810 if (userbuffer) { 780 if (userbuffer) {
811 if (get_user(swap8, (u8 __user *)userbuffer)) 781 if (get_user(swap8, (u8 __user *)userbuffer))
@@ -813,9 +783,8 @@ static int sisusb_write_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr,
813 } else 783 } else
814 swap8 = kernbuffer[0]; 784 swap8 = kernbuffer[0];
815 785
816 ret = sisusb_write_memio_byte(sisusb, 786 ret = sisusb_write_memio_byte(sisusb, SISUSB_TYPE_MEM,
817 SISUSB_TYPE_MEM, 787 addr, swap8);
818 addr, swap8);
819 788
820 if (!ret) 789 if (!ret)
821 (*bytes_written)++; 790 (*bytes_written)++;
@@ -829,10 +798,8 @@ static int sisusb_write_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr,
829 } else 798 } else
830 swap16 = *((u16 *)kernbuffer); 799 swap16 = *((u16 *)kernbuffer);
831 800
832 ret = sisusb_write_memio_word(sisusb, 801 ret = sisusb_write_memio_word(sisusb, SISUSB_TYPE_MEM,
833 SISUSB_TYPE_MEM, 802 addr, swap16);
834 addr,
835 swap16);
836 803
837 if (!ret) 804 if (!ret)
838 (*bytes_written) += 2; 805 (*bytes_written) += 2;
@@ -863,10 +830,8 @@ static int sisusb_write_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr,
863 kernbuffer[0]; 830 kernbuffer[0];
864#endif 831#endif
865 832
866 ret = sisusb_write_memio_24bit(sisusb, 833 ret = sisusb_write_memio_24bit(sisusb, SISUSB_TYPE_MEM,
867 SISUSB_TYPE_MEM, 834 addr, swap32);
868 addr,
869 swap32);
870 835
871 if (!ret) 836 if (!ret)
872 (*bytes_written) += 3; 837 (*bytes_written) += 3;
@@ -880,10 +845,8 @@ static int sisusb_write_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr,
880 } else 845 } else
881 swap32 = *((u32 *)kernbuffer); 846 swap32 = *((u32 *)kernbuffer);
882 847
883 ret = sisusb_write_memio_long(sisusb, 848 ret = sisusb_write_memio_long(sisusb, SISUSB_TYPE_MEM,
884 SISUSB_TYPE_MEM, 849 addr, swap32);
885 addr,
886 swap32);
887 if (!ret) 850 if (!ret)
888 (*bytes_written) += 4; 851 (*bytes_written) += 4;
889 852
@@ -892,103 +855,106 @@ static int sisusb_write_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr,
892 default: 855 default:
893 if ((length & ~3) > 0x10000) { 856 if ((length & ~3) > 0x10000) {
894 857
895 packet.header = 0x001f; 858 packet.header = 0x001f;
896 packet.address = 0x000001d4; 859 packet.address = 0x000001d4;
897 packet.data = addr; 860 packet.data = addr;
898 ret = sisusb_send_bridge_packet(sisusb, 10, 861 ret = sisusb_send_bridge_packet(sisusb, 10,
899 &packet, 0); 862 &packet, 0);
900 packet.header = 0x001f; 863 packet.header = 0x001f;
901 packet.address = 0x000001d0; 864 packet.address = 0x000001d0;
902 packet.data = (length & ~3); 865 packet.data = (length & ~3);
903 ret |= sisusb_send_bridge_packet(sisusb, 10, 866 ret |= sisusb_send_bridge_packet(sisusb, 10,
904 &packet, 0); 867 &packet, 0);
905 packet.header = 0x001f; 868 packet.header = 0x001f;
906 packet.address = 0x000001c0; 869 packet.address = 0x000001c0;
907 packet.data = flag | 0x16; 870 packet.data = flag | 0x16;
908 ret |= sisusb_send_bridge_packet(sisusb, 10, 871 ret |= sisusb_send_bridge_packet(sisusb, 10,
909 &packet, 0); 872 &packet, 0);
910 if (userbuffer) { 873 if (userbuffer) {
911 ret |= sisusb_send_bulk_msg(sisusb, 874 ret |= sisusb_send_bulk_msg(sisusb,
912 SISUSB_EP_GFX_LBULK_OUT, 875 SISUSB_EP_GFX_LBULK_OUT,
913 (length & ~3), 876 (length & ~3),
914 NULL, userbuffer, 0, 877 NULL, userbuffer, 0,
915 bytes_written, 0, 1); 878 bytes_written, 0, 1);
916 userbuffer += (*bytes_written); 879 userbuffer += (*bytes_written);
917 } else if (fromkern) { 880 } else if (fromkern) {
918 ret |= sisusb_send_bulk_msg(sisusb, 881 ret |= sisusb_send_bulk_msg(sisusb,
919 SISUSB_EP_GFX_LBULK_OUT, 882 SISUSB_EP_GFX_LBULK_OUT,
920 (length & ~3), 883 (length & ~3),
921 kernbuffer, NULL, 0, 884 kernbuffer, NULL, 0,
922 bytes_written, 0, 1); 885 bytes_written, 0, 1);
923 kernbuffer += (*bytes_written); 886 kernbuffer += (*bytes_written);
924 } else { 887 } else {
925 ret |= sisusb_send_bulk_msg(sisusb, 888 ret |= sisusb_send_bulk_msg(sisusb,
926 SISUSB_EP_GFX_LBULK_OUT, 889 SISUSB_EP_GFX_LBULK_OUT,
927 (length & ~3), 890 (length & ~3),
928 NULL, NULL, index, 891 NULL, NULL, index,
929 bytes_written, 0, 1); 892 bytes_written, 0, 1);
930 kernbuffer += ((*bytes_written) & 893 kernbuffer += ((*bytes_written) &
931 (sisusb->obufsize-1)); 894 (sisusb->obufsize-1));
932 } 895 }
933 896
934 } else { 897 } else {
935 898
936 packet.header = 0x001f;
937 packet.address = 0x00000194;
938 packet.data = addr;
939 ret = sisusb_send_bridge_packet(sisusb, 10,
940 &packet, 0);
941 packet.header = 0x001f;
942 packet.address = 0x00000190;
943 packet.data = (length & ~3);
944 ret |= sisusb_send_bridge_packet(sisusb, 10,
945 &packet, 0);
946 if (sisusb->flagb0 != 0x16) {
947 packet.header = 0x001f; 899 packet.header = 0x001f;
948 packet.address = 0x00000180; 900 packet.address = 0x00000194;
949 packet.data = flag | 0x16; 901 packet.data = addr;
902 ret = sisusb_send_bridge_packet(sisusb, 10,
903 &packet, 0);
904 packet.header = 0x001f;
905 packet.address = 0x00000190;
906 packet.data = (length & ~3);
950 ret |= sisusb_send_bridge_packet(sisusb, 10, 907 ret |= sisusb_send_bridge_packet(sisusb, 10,
951 &packet, 0); 908 &packet, 0);
952 sisusb->flagb0 = 0x16; 909 if (sisusb->flagb0 != 0x16) {
953 } 910 packet.header = 0x001f;
954 if (userbuffer) { 911 packet.address = 0x00000180;
955 ret |= sisusb_send_bulk_msg(sisusb, 912 packet.data = flag | 0x16;
913 ret |= sisusb_send_bridge_packet(sisusb,
914 10, &packet, 0);
915 sisusb->flagb0 = 0x16;
916 }
917 if (userbuffer) {
918 ret |= sisusb_send_bulk_msg(sisusb,
956 SISUSB_EP_GFX_BULK_OUT, 919 SISUSB_EP_GFX_BULK_OUT,
957 (length & ~3), 920 (length & ~3),
958 NULL, userbuffer, 0, 921 NULL, userbuffer, 0,
959 bytes_written, 0, 1); 922 bytes_written, 0, 1);
960 userbuffer += (*bytes_written); 923 userbuffer += (*bytes_written);
961 } else if (fromkern) { 924 } else if (fromkern) {
962 ret |= sisusb_send_bulk_msg(sisusb, 925 ret |= sisusb_send_bulk_msg(sisusb,
963 SISUSB_EP_GFX_BULK_OUT, 926 SISUSB_EP_GFX_BULK_OUT,
964 (length & ~3), 927 (length & ~3),
965 kernbuffer, NULL, 0, 928 kernbuffer, NULL, 0,
966 bytes_written, 0, 1); 929 bytes_written, 0, 1);
967 kernbuffer += (*bytes_written); 930 kernbuffer += (*bytes_written);
968 } else { 931 } else {
969 ret |= sisusb_send_bulk_msg(sisusb, 932 ret |= sisusb_send_bulk_msg(sisusb,
970 SISUSB_EP_GFX_BULK_OUT, 933 SISUSB_EP_GFX_BULK_OUT,
971 (length & ~3), 934 (length & ~3),
972 NULL, NULL, index, 935 NULL, NULL, index,
973 bytes_written, 0, 1); 936 bytes_written, 0, 1);
974 kernbuffer += ((*bytes_written) & 937 kernbuffer += ((*bytes_written) &
975 (sisusb->obufsize-1)); 938 (sisusb->obufsize-1));
976 } 939 }
977 } 940 }
978 if (ret) { 941 if (ret) {
979 msgcount++; 942 msgcount++;
980 if (msgcount < 500) 943 if (msgcount < 500)
981 dev_err(&sisusb->sisusb_dev->dev, "Wrote %zd of %d bytes, error %d\n", 944 dev_err(&sisusb->sisusb_dev->dev,
982 *bytes_written, length, ret); 945 "Wrote %zd of %d bytes, error %d\n",
946 *bytes_written, length,
947 ret);
983 else if (msgcount == 500) 948 else if (msgcount == 500)
984 dev_err(&sisusb->sisusb_dev->dev, "Too many errors, logging stopped\n"); 949 dev_err(&sisusb->sisusb_dev->dev,
950 "Too many errors, logging stopped\n");
985 } 951 }
986 addr += (*bytes_written); 952 addr += (*bytes_written);
987 length -= (*bytes_written); 953 length -= (*bytes_written);
988 } 954 }
989 955
990 if (ret) 956 if (ret)
991 break; 957 break;
992 958
993 } 959 }
994 960
@@ -1000,7 +966,7 @@ static int sisusb_write_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr,
1000 */ 966 */
1001 967
1002static int sisusb_read_memio_byte(struct sisusb_usb_data *sisusb, int type, 968static int sisusb_read_memio_byte(struct sisusb_usb_data *sisusb, int type,
1003 u32 addr, u8 *data) 969 u32 addr, u8 *data)
1004{ 970{
1005 struct sisusb_packet packet; 971 struct sisusb_packet packet;
1006 int ret; 972 int ret;
@@ -1014,7 +980,7 @@ static int sisusb_read_memio_byte(struct sisusb_usb_data *sisusb, int type,
1014} 980}
1015 981
1016static int sisusb_read_memio_word(struct sisusb_usb_data *sisusb, int type, 982static int sisusb_read_memio_word(struct sisusb_usb_data *sisusb, int type,
1017 u32 addr, u16 *data) 983 u32 addr, u16 *data)
1018{ 984{
1019 struct sisusb_packet packet; 985 struct sisusb_packet packet;
1020 int ret = 0; 986 int ret = 0;
@@ -1024,36 +990,36 @@ static int sisusb_read_memio_word(struct sisusb_usb_data *sisusb, int type,
1024 packet.address = addr & ~3; 990 packet.address = addr & ~3;
1025 991
1026 switch (addr & 3) { 992 switch (addr & 3) {
1027 case 0: 993 case 0:
1028 packet.header = (type << 6) | 0x0003; 994 packet.header = (type << 6) | 0x0003;
1029 ret = sisusb_send_packet(sisusb, 6, &packet); 995 ret = sisusb_send_packet(sisusb, 6, &packet);
1030 *data = (u16)(packet.data); 996 *data = (u16)(packet.data);
1031 break; 997 break;
1032 case 1: 998 case 1:
1033 packet.header = (type << 6) | 0x0006; 999 packet.header = (type << 6) | 0x0006;
1034 ret = sisusb_send_packet(sisusb, 6, &packet); 1000 ret = sisusb_send_packet(sisusb, 6, &packet);
1035 *data = (u16)(packet.data >> 8); 1001 *data = (u16)(packet.data >> 8);
1036 break; 1002 break;
1037 case 2: 1003 case 2:
1038 packet.header = (type << 6) | 0x000c; 1004 packet.header = (type << 6) | 0x000c;
1039 ret = sisusb_send_packet(sisusb, 6, &packet); 1005 ret = sisusb_send_packet(sisusb, 6, &packet);
1040 *data = (u16)(packet.data >> 16); 1006 *data = (u16)(packet.data >> 16);
1041 break; 1007 break;
1042 case 3: 1008 case 3:
1043 packet.header = (type << 6) | 0x0008; 1009 packet.header = (type << 6) | 0x0008;
1044 ret = sisusb_send_packet(sisusb, 6, &packet); 1010 ret = sisusb_send_packet(sisusb, 6, &packet);
1045 *data = (u16)(packet.data >> 24); 1011 *data = (u16)(packet.data >> 24);
1046 packet.header = (type << 6) | 0x0001; 1012 packet.header = (type << 6) | 0x0001;
1047 packet.address = (addr & ~3) + 4; 1013 packet.address = (addr & ~3) + 4;
1048 ret |= sisusb_send_packet(sisusb, 6, &packet); 1014 ret |= sisusb_send_packet(sisusb, 6, &packet);
1049 *data |= (u16)(packet.data << 8); 1015 *data |= (u16)(packet.data << 8);
1050 } 1016 }
1051 1017
1052 return ret; 1018 return ret;
1053} 1019}
1054 1020
1055static int sisusb_read_memio_24bit(struct sisusb_usb_data *sisusb, int type, 1021static int sisusb_read_memio_24bit(struct sisusb_usb_data *sisusb, int type,
1056 u32 addr, u32 *data) 1022 u32 addr, u32 *data)
1057{ 1023{
1058 struct sisusb_packet packet; 1024 struct sisusb_packet packet;
1059 int ret = 0; 1025 int ret = 0;
@@ -1061,40 +1027,40 @@ static int sisusb_read_memio_24bit(struct sisusb_usb_data *sisusb, int type,
1061 packet.address = addr & ~3; 1027 packet.address = addr & ~3;
1062 1028
1063 switch (addr & 3) { 1029 switch (addr & 3) {
1064 case 0: 1030 case 0:
1065 packet.header = (type << 6) | 0x0007; 1031 packet.header = (type << 6) | 0x0007;
1066 ret = sisusb_send_packet(sisusb, 6, &packet); 1032 ret = sisusb_send_packet(sisusb, 6, &packet);
1067 *data = packet.data & 0x00ffffff; 1033 *data = packet.data & 0x00ffffff;
1068 break; 1034 break;
1069 case 1: 1035 case 1:
1070 packet.header = (type << 6) | 0x000e; 1036 packet.header = (type << 6) | 0x000e;
1071 ret = sisusb_send_packet(sisusb, 6, &packet); 1037 ret = sisusb_send_packet(sisusb, 6, &packet);
1072 *data = packet.data >> 8; 1038 *data = packet.data >> 8;
1073 break; 1039 break;
1074 case 2: 1040 case 2:
1075 packet.header = (type << 6) | 0x000c; 1041 packet.header = (type << 6) | 0x000c;
1076 ret = sisusb_send_packet(sisusb, 6, &packet); 1042 ret = sisusb_send_packet(sisusb, 6, &packet);
1077 *data = packet.data >> 16; 1043 *data = packet.data >> 16;
1078 packet.header = (type << 6) | 0x0001; 1044 packet.header = (type << 6) | 0x0001;
1079 packet.address = (addr & ~3) + 4; 1045 packet.address = (addr & ~3) + 4;
1080 ret |= sisusb_send_packet(sisusb, 6, &packet); 1046 ret |= sisusb_send_packet(sisusb, 6, &packet);
1081 *data |= ((packet.data & 0xff) << 16); 1047 *data |= ((packet.data & 0xff) << 16);
1082 break; 1048 break;
1083 case 3: 1049 case 3:
1084 packet.header = (type << 6) | 0x0008; 1050 packet.header = (type << 6) | 0x0008;
1085 ret = sisusb_send_packet(sisusb, 6, &packet); 1051 ret = sisusb_send_packet(sisusb, 6, &packet);
1086 *data = packet.data >> 24; 1052 *data = packet.data >> 24;
1087 packet.header = (type << 6) | 0x0003; 1053 packet.header = (type << 6) | 0x0003;
1088 packet.address = (addr & ~3) + 4; 1054 packet.address = (addr & ~3) + 4;
1089 ret |= sisusb_send_packet(sisusb, 6, &packet); 1055 ret |= sisusb_send_packet(sisusb, 6, &packet);
1090 *data |= ((packet.data & 0xffff) << 8); 1056 *data |= ((packet.data & 0xffff) << 8);
1091 } 1057 }
1092 1058
1093 return ret; 1059 return ret;
1094} 1060}
1095 1061
1096static int sisusb_read_memio_long(struct sisusb_usb_data *sisusb, int type, 1062static int sisusb_read_memio_long(struct sisusb_usb_data *sisusb, int type,
1097 u32 addr, u32 *data) 1063 u32 addr, u32 *data)
1098{ 1064{
1099 struct sisusb_packet packet; 1065 struct sisusb_packet packet;
1100 int ret = 0; 1066 int ret = 0;
@@ -1102,45 +1068,45 @@ static int sisusb_read_memio_long(struct sisusb_usb_data *sisusb, int type,
1102 packet.address = addr & ~3; 1068 packet.address = addr & ~3;
1103 1069
1104 switch (addr & 3) { 1070 switch (addr & 3) {
1105 case 0: 1071 case 0:
1106 packet.header = (type << 6) | 0x000f; 1072 packet.header = (type << 6) | 0x000f;
1107 ret = sisusb_send_packet(sisusb, 6, &packet); 1073 ret = sisusb_send_packet(sisusb, 6, &packet);
1108 *data = packet.data; 1074 *data = packet.data;
1109 break; 1075 break;
1110 case 1: 1076 case 1:
1111 packet.header = (type << 6) | 0x000e; 1077 packet.header = (type << 6) | 0x000e;
1112 ret = sisusb_send_packet(sisusb, 6, &packet); 1078 ret = sisusb_send_packet(sisusb, 6, &packet);
1113 *data = packet.data >> 8; 1079 *data = packet.data >> 8;
1114 packet.header = (type << 6) | 0x0001; 1080 packet.header = (type << 6) | 0x0001;
1115 packet.address = (addr & ~3) + 4; 1081 packet.address = (addr & ~3) + 4;
1116 ret |= sisusb_send_packet(sisusb, 6, &packet); 1082 ret |= sisusb_send_packet(sisusb, 6, &packet);
1117 *data |= (packet.data << 24); 1083 *data |= (packet.data << 24);
1118 break; 1084 break;
1119 case 2: 1085 case 2:
1120 packet.header = (type << 6) | 0x000c; 1086 packet.header = (type << 6) | 0x000c;
1121 ret = sisusb_send_packet(sisusb, 6, &packet); 1087 ret = sisusb_send_packet(sisusb, 6, &packet);
1122 *data = packet.data >> 16; 1088 *data = packet.data >> 16;
1123 packet.header = (type << 6) | 0x0003; 1089 packet.header = (type << 6) | 0x0003;
1124 packet.address = (addr & ~3) + 4; 1090 packet.address = (addr & ~3) + 4;
1125 ret |= sisusb_send_packet(sisusb, 6, &packet); 1091 ret |= sisusb_send_packet(sisusb, 6, &packet);
1126 *data |= (packet.data << 16); 1092 *data |= (packet.data << 16);
1127 break; 1093 break;
1128 case 3: 1094 case 3:
1129 packet.header = (type << 6) | 0x0008; 1095 packet.header = (type << 6) | 0x0008;
1130 ret = sisusb_send_packet(sisusb, 6, &packet); 1096 ret = sisusb_send_packet(sisusb, 6, &packet);
1131 *data = packet.data >> 24; 1097 *data = packet.data >> 24;
1132 packet.header = (type << 6) | 0x0007; 1098 packet.header = (type << 6) | 0x0007;
1133 packet.address = (addr & ~3) + 4; 1099 packet.address = (addr & ~3) + 4;
1134 ret |= sisusb_send_packet(sisusb, 6, &packet); 1100 ret |= sisusb_send_packet(sisusb, 6, &packet);
1135 *data |= (packet.data << 8); 1101 *data |= (packet.data << 8);
1136 } 1102 }
1137 1103
1138 return ret; 1104 return ret;
1139} 1105}
1140 1106
1141static int sisusb_read_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr, 1107static int sisusb_read_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr,
1142 char *kernbuffer, int length, 1108 char *kernbuffer, int length, char __user *userbuffer,
1143 char __user *userbuffer, ssize_t *bytes_read) 1109 ssize_t *bytes_read)
1144{ 1110{
1145 int ret = 0; 1111 int ret = 0;
1146 char buf[4]; 1112 char buf[4];
@@ -1152,34 +1118,27 @@ static int sisusb_read_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr,
1152 length &= 0x00ffffff; 1118 length &= 0x00ffffff;
1153 1119
1154 while (length) { 1120 while (length) {
1155 1121 switch (length) {
1156 switch (length) {
1157
1158 case 1: 1122 case 1:
1159
1160 ret |= sisusb_read_memio_byte(sisusb, SISUSB_TYPE_MEM, 1123 ret |= sisusb_read_memio_byte(sisusb, SISUSB_TYPE_MEM,
1161 addr, &buf[0]); 1124 addr, &buf[0]);
1162 if (!ret) { 1125 if (!ret) {
1163 (*bytes_read)++; 1126 (*bytes_read)++;
1164 if (userbuffer) { 1127 if (userbuffer) {
1165 if (put_user(buf[0], 1128 if (put_user(buf[0], (u8 __user *)userbuffer))
1166 (u8 __user *)userbuffer)) {
1167 return -EFAULT; 1129 return -EFAULT;
1168 } 1130 } else
1169 } else {
1170 kernbuffer[0] = buf[0]; 1131 kernbuffer[0] = buf[0];
1171 }
1172 } 1132 }
1173 return ret; 1133 return ret;
1174 1134
1175 case 2: 1135 case 2:
1176 ret |= sisusb_read_memio_word(sisusb, SISUSB_TYPE_MEM, 1136 ret |= sisusb_read_memio_word(sisusb, SISUSB_TYPE_MEM,
1177 addr, &swap16); 1137 addr, &swap16);
1178 if (!ret) { 1138 if (!ret) {
1179 (*bytes_read) += 2; 1139 (*bytes_read) += 2;
1180 if (userbuffer) { 1140 if (userbuffer) {
1181 if (put_user(swap16, 1141 if (put_user(swap16, (u16 __user *)userbuffer))
1182 (u16 __user *)userbuffer))
1183 return -EFAULT; 1142 return -EFAULT;
1184 } else { 1143 } else {
1185 *((u16 *)kernbuffer) = swap16; 1144 *((u16 *)kernbuffer) = swap16;
@@ -1189,7 +1148,7 @@ static int sisusb_read_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr,
1189 1148
1190 case 3: 1149 case 3:
1191 ret |= sisusb_read_memio_24bit(sisusb, SISUSB_TYPE_MEM, 1150 ret |= sisusb_read_memio_24bit(sisusb, SISUSB_TYPE_MEM,
1192 addr, &swap32); 1151 addr, &swap32);
1193 if (!ret) { 1152 if (!ret) {
1194 (*bytes_read) += 3; 1153 (*bytes_read) += 3;
1195#ifdef __BIG_ENDIAN 1154#ifdef __BIG_ENDIAN
@@ -1202,7 +1161,8 @@ static int sisusb_read_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr,
1202 buf[0] = swap32 & 0xff; 1161 buf[0] = swap32 & 0xff;
1203#endif 1162#endif
1204 if (userbuffer) { 1163 if (userbuffer) {
1205 if (copy_to_user(userbuffer, &buf[0], 3)) 1164 if (copy_to_user(userbuffer,
1165 &buf[0], 3))
1206 return -EFAULT; 1166 return -EFAULT;
1207 } else { 1167 } else {
1208 kernbuffer[0] = buf[0]; 1168 kernbuffer[0] = buf[0];
@@ -1214,12 +1174,11 @@ static int sisusb_read_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr,
1214 1174
1215 default: 1175 default:
1216 ret |= sisusb_read_memio_long(sisusb, SISUSB_TYPE_MEM, 1176 ret |= sisusb_read_memio_long(sisusb, SISUSB_TYPE_MEM,
1217 addr, &swap32); 1177 addr, &swap32);
1218 if (!ret) { 1178 if (!ret) {
1219 (*bytes_read) += 4; 1179 (*bytes_read) += 4;
1220 if (userbuffer) { 1180 if (userbuffer) {
1221 if (put_user(swap32, 1181 if (put_user(swap32, (u32 __user *)userbuffer))
1222 (u32 __user *)userbuffer))
1223 return -EFAULT; 1182 return -EFAULT;
1224 1183
1225 userbuffer += 4; 1184 userbuffer += 4;
@@ -1230,10 +1189,9 @@ static int sisusb_read_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr,
1230 addr += 4; 1189 addr += 4;
1231 length -= 4; 1190 length -= 4;
1232 } 1191 }
1233 } 1192 }
1234 1193 if (ret)
1235 if (ret) 1194 break;
1236 break;
1237 } 1195 }
1238 1196
1239 return ret; 1197 return ret;
@@ -1242,40 +1200,39 @@ static int sisusb_read_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr,
1242/* High level: Gfx (indexed) register access */ 1200/* High level: Gfx (indexed) register access */
1243 1201
1244#ifdef INCL_SISUSB_CON 1202#ifdef INCL_SISUSB_CON
1245int 1203int sisusb_setreg(struct sisusb_usb_data *sisusb, int port, u8 data)
1246sisusb_setreg(struct sisusb_usb_data *sisusb, int port, u8 data)
1247{ 1204{
1248 return sisusb_write_memio_byte(sisusb, SISUSB_TYPE_IO, port, data); 1205 return sisusb_write_memio_byte(sisusb, SISUSB_TYPE_IO, port, data);
1249} 1206}
1250 1207
1251int 1208int sisusb_getreg(struct sisusb_usb_data *sisusb, int port, u8 *data)
1252sisusb_getreg(struct sisusb_usb_data *sisusb, int port, u8 *data)
1253{ 1209{
1254 return sisusb_read_memio_byte(sisusb, SISUSB_TYPE_IO, port, data); 1210 return sisusb_read_memio_byte(sisusb, SISUSB_TYPE_IO, port, data);
1255} 1211}
1256#endif 1212#endif
1257 1213
1258int 1214int sisusb_setidxreg(struct sisusb_usb_data *sisusb, int port,
1259sisusb_setidxreg(struct sisusb_usb_data *sisusb, int port, u8 index, u8 data) 1215 u8 index, u8 data)
1260{ 1216{
1261 int ret; 1217 int ret;
1218
1262 ret = sisusb_write_memio_byte(sisusb, SISUSB_TYPE_IO, port, index); 1219 ret = sisusb_write_memio_byte(sisusb, SISUSB_TYPE_IO, port, index);
1263 ret |= sisusb_write_memio_byte(sisusb, SISUSB_TYPE_IO, port + 1, data); 1220 ret |= sisusb_write_memio_byte(sisusb, SISUSB_TYPE_IO, port + 1, data);
1264 return ret; 1221 return ret;
1265} 1222}
1266 1223
1267int 1224int sisusb_getidxreg(struct sisusb_usb_data *sisusb, int port,
1268sisusb_getidxreg(struct sisusb_usb_data *sisusb, int port, u8 index, u8 *data) 1225 u8 index, u8 *data)
1269{ 1226{
1270 int ret; 1227 int ret;
1228
1271 ret = sisusb_write_memio_byte(sisusb, SISUSB_TYPE_IO, port, index); 1229 ret = sisusb_write_memio_byte(sisusb, SISUSB_TYPE_IO, port, index);
1272 ret |= sisusb_read_memio_byte(sisusb, SISUSB_TYPE_IO, port + 1, data); 1230 ret |= sisusb_read_memio_byte(sisusb, SISUSB_TYPE_IO, port + 1, data);
1273 return ret; 1231 return ret;
1274} 1232}
1275 1233
1276int 1234int sisusb_setidxregandor(struct sisusb_usb_data *sisusb, int port, u8 idx,
1277sisusb_setidxregandor(struct sisusb_usb_data *sisusb, int port, u8 idx, 1235 u8 myand, u8 myor)
1278 u8 myand, u8 myor)
1279{ 1236{
1280 int ret; 1237 int ret;
1281 u8 tmp; 1238 u8 tmp;
@@ -1288,12 +1245,12 @@ sisusb_setidxregandor(struct sisusb_usb_data *sisusb, int port, u8 idx,
1288 return ret; 1245 return ret;
1289} 1246}
1290 1247
1291static int 1248static int sisusb_setidxregmask(struct sisusb_usb_data *sisusb,
1292sisusb_setidxregmask(struct sisusb_usb_data *sisusb, int port, u8 idx, 1249 int port, u8 idx, u8 data, u8 mask)
1293 u8 data, u8 mask)
1294{ 1250{
1295 int ret; 1251 int ret;
1296 u8 tmp; 1252 u8 tmp;
1253
1297 ret = sisusb_write_memio_byte(sisusb, SISUSB_TYPE_IO, port, idx); 1254 ret = sisusb_write_memio_byte(sisusb, SISUSB_TYPE_IO, port, idx);
1298 ret |= sisusb_read_memio_byte(sisusb, SISUSB_TYPE_IO, port + 1, &tmp); 1255 ret |= sisusb_read_memio_byte(sisusb, SISUSB_TYPE_IO, port + 1, &tmp);
1299 tmp &= ~(mask); 1256 tmp &= ~(mask);
@@ -1302,75 +1259,76 @@ sisusb_setidxregmask(struct sisusb_usb_data *sisusb, int port, u8 idx,
1302 return ret; 1259 return ret;
1303} 1260}
1304 1261
1305int 1262int sisusb_setidxregor(struct sisusb_usb_data *sisusb, int port,
1306sisusb_setidxregor(struct sisusb_usb_data *sisusb, int port, u8 index, u8 myor) 1263 u8 index, u8 myor)
1307{ 1264{
1308 return(sisusb_setidxregandor(sisusb, port, index, 0xff, myor)); 1265 return sisusb_setidxregandor(sisusb, port, index, 0xff, myor);
1309} 1266}
1310 1267
1311int 1268int sisusb_setidxregand(struct sisusb_usb_data *sisusb, int port,
1312sisusb_setidxregand(struct sisusb_usb_data *sisusb, int port, u8 idx, u8 myand) 1269 u8 idx, u8 myand)
1313{ 1270{
1314 return(sisusb_setidxregandor(sisusb, port, idx, myand, 0x00)); 1271 return sisusb_setidxregandor(sisusb, port, idx, myand, 0x00);
1315} 1272}
1316 1273
1317/* Write/read video ram */ 1274/* Write/read video ram */
1318 1275
1319#ifdef INCL_SISUSB_CON 1276#ifdef INCL_SISUSB_CON
1320int 1277int sisusb_writeb(struct sisusb_usb_data *sisusb, u32 adr, u8 data)
1321sisusb_writeb(struct sisusb_usb_data *sisusb, u32 adr, u8 data)
1322{ 1278{
1323 return(sisusb_write_memio_byte(sisusb, SISUSB_TYPE_MEM, adr, data)); 1279 return sisusb_write_memio_byte(sisusb, SISUSB_TYPE_MEM, adr, data);
1324} 1280}
1325 1281
1326int 1282int sisusb_readb(struct sisusb_usb_data *sisusb, u32 adr, u8 *data)
1327sisusb_readb(struct sisusb_usb_data *sisusb, u32 adr, u8 *data)
1328{ 1283{
1329 return(sisusb_read_memio_byte(sisusb, SISUSB_TYPE_MEM, adr, data)); 1284 return sisusb_read_memio_byte(sisusb, SISUSB_TYPE_MEM, adr, data);
1330} 1285}
1331 1286
1332int 1287int sisusb_copy_memory(struct sisusb_usb_data *sisusb, char *src,
1333sisusb_copy_memory(struct sisusb_usb_data *sisusb, char *src, 1288 u32 dest, int length, size_t *bytes_written)
1334 u32 dest, int length, size_t *bytes_written)
1335{ 1289{
1336 return(sisusb_write_mem_bulk(sisusb, dest, src, length, NULL, 0, bytes_written)); 1290 return sisusb_write_mem_bulk(sisusb, dest, src, length,
1291 NULL, 0, bytes_written);
1337} 1292}
1338 1293
1339#ifdef SISUSBENDIANTEST 1294#ifdef SISUSBENDIANTEST
1340int 1295int sisusb_read_memory(struct sisusb_usb_data *sisusb, char *dest,
1341sisusb_read_memory(struct sisusb_usb_data *sisusb, char *dest, 1296 u32 src, int length, size_t *bytes_written)
1342 u32 src, int length, size_t *bytes_written)
1343{ 1297{
1344 return(sisusb_read_mem_bulk(sisusb, src, dest, length, NULL, bytes_written)); 1298 return sisusb_read_mem_bulk(sisusb, src, dest, length,
1299 NULL, bytes_written);
1345} 1300}
1346#endif 1301#endif
1347#endif 1302#endif
1348 1303
1349#ifdef SISUSBENDIANTEST 1304#ifdef SISUSBENDIANTEST
1350static void 1305static void sisusb_testreadwrite(struct sisusb_usb_data *sisusb)
1351sisusb_testreadwrite(struct sisusb_usb_data *sisusb) 1306{
1352{ 1307 static char srcbuffer[] = { 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77 };
1353 static char srcbuffer[] = { 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77 }; 1308 char destbuffer[10];
1354 char destbuffer[10]; 1309 size_t dummy;
1355 size_t dummy; 1310 int i, j;
1356 int i,j; 1311
1357 1312 sisusb_copy_memory(sisusb, srcbuffer, sisusb->vrambase, 7, &dummy);
1358 sisusb_copy_memory(sisusb, srcbuffer, sisusb->vrambase, 7, &dummy); 1313
1359 1314 for (i = 1; i <= 7; i++) {
1360 for(i = 1; i <= 7; i++) { 1315 dev_dbg(&sisusb->sisusb_dev->dev,
1361 dev_dbg(&sisusb->sisusb_dev->dev, "sisusb: rwtest %d bytes\n", i); 1316 "sisusb: rwtest %d bytes\n", i);
1362 sisusb_read_memory(sisusb, destbuffer, sisusb->vrambase, i, &dummy); 1317 sisusb_read_memory(sisusb, destbuffer, sisusb->vrambase,
1363 for(j = 0; j < i; j++) { 1318 i, &dummy);
1364 dev_dbg(&sisusb->sisusb_dev->dev, "rwtest read[%d] = %x\n", j, destbuffer[j]); 1319 for (j = 0; j < i; j++) {
1320 dev_dbg(&sisusb->sisusb_dev->dev,
1321 "rwtest read[%d] = %x\n",
1322 j, destbuffer[j]);
1323 }
1365 } 1324 }
1366 }
1367} 1325}
1368#endif 1326#endif
1369 1327
1370/* access pci config registers (reg numbers 0, 4, 8, etc) */ 1328/* access pci config registers (reg numbers 0, 4, 8, etc) */
1371 1329
1372static int 1330static int sisusb_write_pci_config(struct sisusb_usb_data *sisusb,
1373sisusb_write_pci_config(struct sisusb_usb_data *sisusb, int regnum, u32 data) 1331 int regnum, u32 data)
1374{ 1332{
1375 struct sisusb_packet packet; 1333 struct sisusb_packet packet;
1376 int ret; 1334 int ret;
@@ -1382,8 +1340,8 @@ sisusb_write_pci_config(struct sisusb_usb_data *sisusb, int regnum, u32 data)
1382 return ret; 1340 return ret;
1383} 1341}
1384 1342
1385static int 1343static int sisusb_read_pci_config(struct sisusb_usb_data *sisusb,
1386sisusb_read_pci_config(struct sisusb_usb_data *sisusb, int regnum, u32 *data) 1344 int regnum, u32 *data)
1387{ 1345{
1388 struct sisusb_packet packet; 1346 struct sisusb_packet packet;
1389 int ret; 1347 int ret;
@@ -1397,8 +1355,8 @@ sisusb_read_pci_config(struct sisusb_usb_data *sisusb, int regnum, u32 *data)
1397 1355
1398/* Clear video RAM */ 1356/* Clear video RAM */
1399 1357
1400static int 1358static int sisusb_clear_vram(struct sisusb_usb_data *sisusb,
1401sisusb_clear_vram(struct sisusb_usb_data *sisusb, u32 address, int length) 1359 u32 address, int length)
1402{ 1360{
1403 int ret, i; 1361 int ret, i;
1404 ssize_t j; 1362 ssize_t j;
@@ -1416,7 +1374,8 @@ sisusb_clear_vram(struct sisusb_usb_data *sisusb, u32 address, int length)
1416 return 0; 1374 return 0;
1417 1375
1418 /* allocate free buffer/urb and clear the buffer */ 1376 /* allocate free buffer/urb and clear the buffer */
1419 if ((i = sisusb_alloc_outbuf(sisusb)) < 0) 1377 i = sisusb_alloc_outbuf(sisusb);
1378 if (i < 0)
1420 return -EBUSY; 1379 return -EBUSY;
1421 1380
1422 memset(sisusb->obuf[i], 0, sisusb->obufsize); 1381 memset(sisusb->obuf[i], 0, sisusb->obufsize);
@@ -1437,20 +1396,19 @@ sisusb_clear_vram(struct sisusb_usb_data *sisusb, u32 address, int length)
1437 * a defined mode (640x480@60Hz) 1396 * a defined mode (640x480@60Hz)
1438 */ 1397 */
1439 1398
1440#define GETREG(r,d) sisusb_read_memio_byte(sisusb, SISUSB_TYPE_IO, r, d) 1399#define GETREG(r, d) sisusb_read_memio_byte(sisusb, SISUSB_TYPE_IO, r, d)
1441#define SETREG(r,d) sisusb_write_memio_byte(sisusb, SISUSB_TYPE_IO, r, d) 1400#define SETREG(r, d) sisusb_write_memio_byte(sisusb, SISUSB_TYPE_IO, r, d)
1442#define SETIREG(r,i,d) sisusb_setidxreg(sisusb, r, i, d) 1401#define SETIREG(r, i, d) sisusb_setidxreg(sisusb, r, i, d)
1443#define GETIREG(r,i,d) sisusb_getidxreg(sisusb, r, i, d) 1402#define GETIREG(r, i, d) sisusb_getidxreg(sisusb, r, i, d)
1444#define SETIREGOR(r,i,o) sisusb_setidxregor(sisusb, r, i, o) 1403#define SETIREGOR(r, i, o) sisusb_setidxregor(sisusb, r, i, o)
1445#define SETIREGAND(r,i,a) sisusb_setidxregand(sisusb, r, i, a) 1404#define SETIREGAND(r, i, a) sisusb_setidxregand(sisusb, r, i, a)
1446#define SETIREGANDOR(r,i,a,o) sisusb_setidxregandor(sisusb, r, i, a, o) 1405#define SETIREGANDOR(r, i, a, o) sisusb_setidxregandor(sisusb, r, i, a, o)
1447#define READL(a,d) sisusb_read_memio_long(sisusb, SISUSB_TYPE_MEM, a, d) 1406#define READL(a, d) sisusb_read_memio_long(sisusb, SISUSB_TYPE_MEM, a, d)
1448#define WRITEL(a,d) sisusb_write_memio_long(sisusb, SISUSB_TYPE_MEM, a, d) 1407#define WRITEL(a, d) sisusb_write_memio_long(sisusb, SISUSB_TYPE_MEM, a, d)
1449#define READB(a,d) sisusb_read_memio_byte(sisusb, SISUSB_TYPE_MEM, a, d) 1408#define READB(a, d) sisusb_read_memio_byte(sisusb, SISUSB_TYPE_MEM, a, d)
1450#define WRITEB(a,d) sisusb_write_memio_byte(sisusb, SISUSB_TYPE_MEM, a, d) 1409#define WRITEB(a, d) sisusb_write_memio_byte(sisusb, SISUSB_TYPE_MEM, a, d)
1451 1410
1452static int 1411static int sisusb_triggersr16(struct sisusb_usb_data *sisusb, u8 ramtype)
1453sisusb_triggersr16(struct sisusb_usb_data *sisusb, u8 ramtype)
1454{ 1412{
1455 int ret; 1413 int ret;
1456 u8 tmp8; 1414 u8 tmp8;
@@ -1480,8 +1438,8 @@ sisusb_triggersr16(struct sisusb_usb_data *sisusb, u8 ramtype)
1480 return ret; 1438 return ret;
1481} 1439}
1482 1440
1483static int 1441static int sisusb_getbuswidth(struct sisusb_usb_data *sisusb,
1484sisusb_getbuswidth(struct sisusb_usb_data *sisusb, int *bw, int *chab) 1442 int *bw, int *chab)
1485{ 1443{
1486 int ret; 1444 int ret;
1487 u8 ramtype, done = 0; 1445 u8 ramtype, done = 0;
@@ -1526,7 +1484,7 @@ sisusb_getbuswidth(struct sisusb_usb_data *sisusb, int *bw, int *chab)
1526 } 1484 }
1527 if ((t1 != 0x456789ab) || (t0 != 0x01234567)) { 1485 if ((t1 != 0x456789ab) || (t0 != 0x01234567)) {
1528 *chab = 1; *bw = 64; 1486 *chab = 1; *bw = 64;
1529 ret |= SETIREGANDOR(SISSR, 0x14, 0xfc,0x01); 1487 ret |= SETIREGANDOR(SISSR, 0x14, 0xfc, 0x01);
1530 1488
1531 ret |= sisusb_triggersr16(sisusb, ramtype); 1489 ret |= sisusb_triggersr16(sisusb, ramtype);
1532 ret |= WRITEL(ramptr + 0, 0x89abcdef); 1490 ret |= WRITEL(ramptr + 0, 0x89abcdef);
@@ -1593,8 +1551,7 @@ sisusb_getbuswidth(struct sisusb_usb_data *sisusb, int *bw, int *chab)
1593 return ret; 1551 return ret;
1594} 1552}
1595 1553
1596static int 1554static int sisusb_verify_mclk(struct sisusb_usb_data *sisusb)
1597sisusb_verify_mclk(struct sisusb_usb_data *sisusb)
1598{ 1555{
1599 int ret = 0; 1556 int ret = 0;
1600 u32 ramptr = SISUSB_PCI_MEMBASE; 1557 u32 ramptr = SISUSB_PCI_MEMBASE;
@@ -1622,10 +1579,8 @@ sisusb_verify_mclk(struct sisusb_usb_data *sisusb)
1622 return ret; 1579 return ret;
1623} 1580}
1624 1581
1625static int 1582static int sisusb_set_rank(struct sisusb_usb_data *sisusb, int *iret,
1626sisusb_set_rank(struct sisusb_usb_data *sisusb, int *iret, int index, 1583 int index, u8 rankno, u8 chab, const u8 dramtype[][5], int bw)
1627 u8 rankno, u8 chab, const u8 dramtype[][5],
1628 int bw)
1629{ 1584{
1630 int ret = 0, ranksize; 1585 int ret = 0, ranksize;
1631 u8 tmp; 1586 u8 tmp;
@@ -1641,7 +1596,9 @@ sisusb_set_rank(struct sisusb_usb_data *sisusb, int *iret, int index,
1641 return ret; 1596 return ret;
1642 1597
1643 tmp = 0; 1598 tmp = 0;
1644 while ((ranksize >>= 1) > 0) tmp += 0x10; 1599 while ((ranksize >>= 1) > 0)
1600 tmp += 0x10;
1601
1645 tmp |= ((rankno - 1) << 2); 1602 tmp |= ((rankno - 1) << 2);
1646 tmp |= ((bw / 64) & 0x02); 1603 tmp |= ((bw / 64) & 0x02);
1647 tmp |= (chab & 0x01); 1604 tmp |= (chab & 0x01);
@@ -1654,8 +1611,8 @@ sisusb_set_rank(struct sisusb_usb_data *sisusb, int *iret, int index,
1654 return ret; 1611 return ret;
1655} 1612}
1656 1613
1657static int 1614static int sisusb_check_rbc(struct sisusb_usb_data *sisusb, int *iret,
1658sisusb_check_rbc(struct sisusb_usb_data *sisusb, int *iret, u32 inc, int testn) 1615 u32 inc, int testn)
1659{ 1616{
1660 int ret = 0, i; 1617 int ret = 0, i;
1661 u32 j, tmp; 1618 u32 j, tmp;
@@ -1669,7 +1626,9 @@ sisusb_check_rbc(struct sisusb_usb_data *sisusb, int *iret, u32 inc, int testn)
1669 1626
1670 for (i = 0, j = 0; i < testn; i++) { 1627 for (i = 0, j = 0; i < testn; i++) {
1671 ret |= READL(sisusb->vrambase + j, &tmp); 1628 ret |= READL(sisusb->vrambase + j, &tmp);
1672 if (tmp != j) return ret; 1629 if (tmp != j)
1630 return ret;
1631
1673 j += inc; 1632 j += inc;
1674 } 1633 }
1675 1634
@@ -1677,9 +1636,8 @@ sisusb_check_rbc(struct sisusb_usb_data *sisusb, int *iret, u32 inc, int testn)
1677 return ret; 1636 return ret;
1678} 1637}
1679 1638
1680static int 1639static int sisusb_check_ranks(struct sisusb_usb_data *sisusb,
1681sisusb_check_ranks(struct sisusb_usb_data *sisusb, int *iret, int rankno, 1640 int *iret, int rankno, int idx, int bw, const u8 rtype[][5])
1682 int idx, int bw, const u8 rtype[][5])
1683{ 1641{
1684 int ret = 0, i, i2ret; 1642 int ret = 0, i, i2ret;
1685 u32 inc; 1643 u32 inc;
@@ -1687,10 +1645,8 @@ sisusb_check_ranks(struct sisusb_usb_data *sisusb, int *iret, int rankno,
1687 *iret = 0; 1645 *iret = 0;
1688 1646
1689 for (i = rankno; i >= 1; i--) { 1647 for (i = rankno; i >= 1; i--) {
1690 inc = 1 << (rtype[idx][2] + 1648 inc = 1 << (rtype[idx][2] + rtype[idx][1] + rtype[idx][0] +
1691 rtype[idx][1] + 1649 bw / 64 + i);
1692 rtype[idx][0] +
1693 bw / 64 + i);
1694 ret |= sisusb_check_rbc(sisusb, &i2ret, inc, 2); 1650 ret |= sisusb_check_rbc(sisusb, &i2ret, inc, 2);
1695 if (!i2ret) 1651 if (!i2ret)
1696 return ret; 1652 return ret;
@@ -1710,9 +1666,8 @@ sisusb_check_ranks(struct sisusb_usb_data *sisusb, int *iret, int rankno,
1710 return ret; 1666 return ret;
1711} 1667}
1712 1668
1713static int 1669static int sisusb_get_sdram_size(struct sisusb_usb_data *sisusb, int *iret,
1714sisusb_get_sdram_size(struct sisusb_usb_data *sisusb, int *iret, int bw, 1670 int bw, int chab)
1715 int chab)
1716{ 1671{
1717 int ret = 0, i2ret = 0, i, j; 1672 int ret = 0, i2ret = 0, i, j;
1718 static const u8 sdramtype[13][5] = { 1673 static const u8 sdramtype[13][5] = {
@@ -1736,13 +1691,13 @@ sisusb_get_sdram_size(struct sisusb_usb_data *sisusb, int *iret, int bw,
1736 for (i = 0; i < 13; i++) { 1691 for (i = 0; i < 13; i++) {
1737 ret |= SETIREGANDOR(SISSR, 0x13, 0x80, sdramtype[i][4]); 1692 ret |= SETIREGANDOR(SISSR, 0x13, 0x80, sdramtype[i][4]);
1738 for (j = 2; j > 0; j--) { 1693 for (j = 2; j > 0; j--) {
1739 ret |= sisusb_set_rank(sisusb, &i2ret, i, j, 1694 ret |= sisusb_set_rank(sisusb, &i2ret, i, j, chab,
1740 chab, sdramtype, bw); 1695 sdramtype, bw);
1741 if (!i2ret) 1696 if (!i2ret)
1742 continue; 1697 continue;
1743 1698
1744 ret |= sisusb_check_ranks(sisusb, &i2ret, j, i, 1699 ret |= sisusb_check_ranks(sisusb, &i2ret, j, i, bw,
1745 bw, sdramtype); 1700 sdramtype);
1746 if (i2ret) { 1701 if (i2ret) {
1747 *iret = 0; /* ram size found */ 1702 *iret = 0; /* ram size found */
1748 return ret; 1703 return ret;
@@ -1753,8 +1708,8 @@ sisusb_get_sdram_size(struct sisusb_usb_data *sisusb, int *iret, int bw,
1753 return ret; 1708 return ret;
1754} 1709}
1755 1710
1756static int 1711static int sisusb_setup_screen(struct sisusb_usb_data *sisusb,
1757sisusb_setup_screen(struct sisusb_usb_data *sisusb, int clrall, int drwfr) 1712 int clrall, int drwfr)
1758{ 1713{
1759 int ret = 0; 1714 int ret = 0;
1760 u32 address; 1715 u32 address;
@@ -1775,47 +1730,47 @@ sisusb_setup_screen(struct sisusb_usb_data *sisusb, int clrall, int drwfr)
1775 for (i = 0; i < modex; i++) { 1730 for (i = 0; i < modex; i++) {
1776 address = sisusb->vrambase + (i * bpp); 1731 address = sisusb->vrambase + (i * bpp);
1777 ret |= sisusb_write_memio_word(sisusb, SISUSB_TYPE_MEM, 1732 ret |= sisusb_write_memio_word(sisusb, SISUSB_TYPE_MEM,
1778 address, 0xf100); 1733 address, 0xf100);
1779 address += (modex * (modey-1) * bpp); 1734 address += (modex * (modey-1) * bpp);
1780 ret |= sisusb_write_memio_word(sisusb, SISUSB_TYPE_MEM, 1735 ret |= sisusb_write_memio_word(sisusb, SISUSB_TYPE_MEM,
1781 address, 0xf100); 1736 address, 0xf100);
1782 } 1737 }
1783 for (i = 0; i < modey; i++) { 1738 for (i = 0; i < modey; i++) {
1784 address = sisusb->vrambase + ((i * modex) * bpp); 1739 address = sisusb->vrambase + ((i * modex) * bpp);
1785 ret |= sisusb_write_memio_word(sisusb, SISUSB_TYPE_MEM, 1740 ret |= sisusb_write_memio_word(sisusb, SISUSB_TYPE_MEM,
1786 address, 0xf100); 1741 address, 0xf100);
1787 address += ((modex - 1) * bpp); 1742 address += ((modex - 1) * bpp);
1788 ret |= sisusb_write_memio_word(sisusb, SISUSB_TYPE_MEM, 1743 ret |= sisusb_write_memio_word(sisusb, SISUSB_TYPE_MEM,
1789 address, 0xf100); 1744 address, 0xf100);
1790 } 1745 }
1791 } 1746 }
1792 1747
1793 return ret; 1748 return ret;
1794} 1749}
1795 1750
1796static int 1751static int sisusb_set_default_mode(struct sisusb_usb_data *sisusb,
1797sisusb_set_default_mode(struct sisusb_usb_data *sisusb, int touchengines) 1752 int touchengines)
1798{ 1753{
1799 int ret = 0, i, j, modex, modey, bpp, du; 1754 int ret = 0, i, j, modex, modey, bpp, du;
1800 u8 sr31, cr63, tmp8; 1755 u8 sr31, cr63, tmp8;
1801 static const char attrdata[] = { 1756 static const char attrdata[] = {
1802 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, 1757 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
1803 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f, 1758 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
1804 0x01,0x00,0x00,0x00 1759 0x01, 0x00, 0x00, 0x00
1805 }; 1760 };
1806 static const char crtcrdata[] = { 1761 static const char crtcrdata[] = {
1807 0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e, 1762 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
1808 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, 1763 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1809 0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3, 1764 0xea, 0x8c, 0xdf, 0x28, 0x40, 0xe7, 0x04, 0xa3,
1810 0xff 1765 0xff
1811 }; 1766 };
1812 static const char grcdata[] = { 1767 static const char grcdata[] = {
1813 0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f, 1768 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f,
1814 0xff 1769 0xff
1815 }; 1770 };
1816 static const char crtcdata[] = { 1771 static const char crtcdata[] = {
1817 0x5f,0x4f,0x4f,0x83,0x55,0x81,0x0b,0x3e, 1772 0x5f, 0x4f, 0x4f, 0x83, 0x55, 0x81, 0x0b, 0x3e,
1818 0xe9,0x8b,0xdf,0xe8,0x0c,0x00,0x00,0x05, 1773 0xe9, 0x8b, 0xdf, 0xe8, 0x0c, 0x00, 0x00, 0x05,
1819 0x00 1774 0x00
1820 }; 1775 };
1821 1776
@@ -1858,28 +1813,32 @@ sisusb_set_default_mode(struct sisusb_usb_data *sisusb, int touchengines)
1858 SETIREGAND(SISSR, 0x37, 0xfe); 1813 SETIREGAND(SISSR, 0x37, 0xfe);
1859 SETREG(SISMISCW, 0xef); /* sync */ 1814 SETREG(SISMISCW, 0xef); /* sync */
1860 SETIREG(SISCR, 0x11, 0x00); /* crtc */ 1815 SETIREG(SISCR, 0x11, 0x00); /* crtc */
1861 for (j = 0x00, i = 0; i <= 7; i++, j++) { 1816 for (j = 0x00, i = 0; i <= 7; i++, j++)
1862 SETIREG(SISCR, j, crtcdata[i]); 1817 SETIREG(SISCR, j, crtcdata[i]);
1863 } 1818
1864 for (j = 0x10; i <= 10; i++, j++) { 1819 for (j = 0x10; i <= 10; i++, j++)
1865 SETIREG(SISCR, j, crtcdata[i]); 1820 SETIREG(SISCR, j, crtcdata[i]);
1866 } 1821
1867 for (j = 0x15; i <= 12; i++, j++) { 1822 for (j = 0x15; i <= 12; i++, j++)
1868 SETIREG(SISCR, j, crtcdata[i]); 1823 SETIREG(SISCR, j, crtcdata[i]);
1869 } 1824
1870 for (j = 0x0A; i <= 15; i++, j++) { 1825 for (j = 0x0A; i <= 15; i++, j++)
1871 SETIREG(SISSR, j, crtcdata[i]); 1826 SETIREG(SISSR, j, crtcdata[i]);
1872 } 1827
1873 SETIREG(SISSR, 0x0E, (crtcdata[16] & 0xE0)); 1828 SETIREG(SISSR, 0x0E, (crtcdata[16] & 0xE0));
1874 SETIREGANDOR(SISCR, 0x09, 0x5f, ((crtcdata[16] & 0x01) << 5)); 1829 SETIREGANDOR(SISCR, 0x09, 0x5f, ((crtcdata[16] & 0x01) << 5));
1875 SETIREG(SISCR, 0x14, 0x4f); 1830 SETIREG(SISCR, 0x14, 0x4f);
1876 du = (modex / 16) * (bpp * 2); /* offset/pitch */ 1831 du = (modex / 16) * (bpp * 2); /* offset/pitch */
1877 if (modex % 16) du += bpp; 1832 if (modex % 16)
1833 du += bpp;
1834
1878 SETIREGANDOR(SISSR, 0x0e, 0xf0, ((du >> 8) & 0x0f)); 1835 SETIREGANDOR(SISSR, 0x0e, 0xf0, ((du >> 8) & 0x0f));
1879 SETIREG(SISCR, 0x13, (du & 0xff)); 1836 SETIREG(SISCR, 0x13, (du & 0xff));
1880 du <<= 5; 1837 du <<= 5;
1881 tmp8 = du >> 8; 1838 tmp8 = du >> 8;
1882 if (du & 0xff) tmp8++; 1839 if (du & 0xff)
1840 tmp8++;
1841
1883 SETIREG(SISSR, 0x10, tmp8); 1842 SETIREG(SISSR, 0x10, tmp8);
1884 SETIREG(SISSR, 0x31, 0x00); /* VCLK */ 1843 SETIREG(SISSR, 0x31, 0x00); /* VCLK */
1885 SETIREG(SISSR, 0x2b, 0x1b); 1844 SETIREG(SISSR, 0x2b, 0x1b);
@@ -1925,8 +1884,7 @@ sisusb_set_default_mode(struct sisusb_usb_data *sisusb, int touchengines)
1925 return ret; 1884 return ret;
1926} 1885}
1927 1886
1928static int 1887static int sisusb_init_gfxcore(struct sisusb_usb_data *sisusb)
1929sisusb_init_gfxcore(struct sisusb_usb_data *sisusb)
1930{ 1888{
1931 int ret = 0, i, j, bw, chab, iret, retry = 3; 1889 int ret = 0, i, j, bw, chab, iret, retry = 3;
1932 u8 tmp8, ramtype; 1890 u8 tmp8, ramtype;
@@ -1970,7 +1928,8 @@ sisusb_init_gfxcore(struct sisusb_usb_data *sisusb)
1970 ret |= GETREG(SISMISCR, &tmp8); 1928 ret |= GETREG(SISMISCR, &tmp8);
1971 ret |= SETREG(SISMISCW, (tmp8 | 0x01)); 1929 ret |= SETREG(SISMISCW, (tmp8 | 0x01));
1972 1930
1973 if (ret) continue; 1931 if (ret)
1932 continue;
1974 1933
1975 /* Reset registers */ 1934 /* Reset registers */
1976 ret |= SETIREGAND(SISCR, 0x5b, 0xdf); 1935 ret |= SETIREGAND(SISCR, 0x5b, 0xdf);
@@ -1979,23 +1938,23 @@ sisusb_init_gfxcore(struct sisusb_usb_data *sisusb)
1979 1938
1980 ret |= SETREG(SISMISCW, 0x67); 1939 ret |= SETREG(SISMISCW, 0x67);
1981 1940
1982 for (i = 0x06; i <= 0x1f; i++) { 1941 for (i = 0x06; i <= 0x1f; i++)
1983 ret |= SETIREG(SISSR, i, 0x00); 1942 ret |= SETIREG(SISSR, i, 0x00);
1984 } 1943
1985 for (i = 0x21; i <= 0x27; i++) { 1944 for (i = 0x21; i <= 0x27; i++)
1986 ret |= SETIREG(SISSR, i, 0x00); 1945 ret |= SETIREG(SISSR, i, 0x00);
1987 } 1946
1988 for (i = 0x31; i <= 0x3d; i++) { 1947 for (i = 0x31; i <= 0x3d; i++)
1989 ret |= SETIREG(SISSR, i, 0x00); 1948 ret |= SETIREG(SISSR, i, 0x00);
1990 } 1949
1991 for (i = 0x12; i <= 0x1b; i++) { 1950 for (i = 0x12; i <= 0x1b; i++)
1992 ret |= SETIREG(SISSR, i, 0x00); 1951 ret |= SETIREG(SISSR, i, 0x00);
1993 } 1952
1994 for (i = 0x79; i <= 0x7c; i++) { 1953 for (i = 0x79; i <= 0x7c; i++)
1995 ret |= SETIREG(SISCR, i, 0x00); 1954 ret |= SETIREG(SISCR, i, 0x00);
1996 }
1997 1955
1998 if (ret) continue; 1956 if (ret)
1957 continue;
1999 1958
2000 ret |= SETIREG(SISCR, 0x63, 0x80); 1959 ret |= SETIREG(SISCR, 0x63, 0x80);
2001 1960
@@ -2013,13 +1972,16 @@ sisusb_init_gfxcore(struct sisusb_usb_data *sisusb)
2013 ret |= SETIREG(SISSR, 0x07, 0x18); 1972 ret |= SETIREG(SISSR, 0x07, 0x18);
2014 ret |= SETIREG(SISSR, 0x11, 0x0f); 1973 ret |= SETIREG(SISSR, 0x11, 0x0f);
2015 1974
2016 if (ret) continue; 1975 if (ret)
1976 continue;
2017 1977
2018 for (i = 0x15, j = 0; i <= 0x1b; i++, j++) { 1978 for (i = 0x15, j = 0; i <= 0x1b; i++, j++) {
2019 ret |= SETIREG(SISSR, i, ramtypetable1[(j*4) + ramtype]); 1979 ret |= SETIREG(SISSR, i,
1980 ramtypetable1[(j*4) + ramtype]);
2020 } 1981 }
2021 for (i = 0x40, j = 0; i <= 0x44; i++, j++) { 1982 for (i = 0x40, j = 0; i <= 0x44; i++, j++) {
2022 ret |= SETIREG(SISCR, i, ramtypetable2[(j*4) + ramtype]); 1983 ret |= SETIREG(SISCR, i,
1984 ramtypetable2[(j*4) + ramtype]);
2023 } 1985 }
2024 1986
2025 ret |= SETIREG(SISCR, 0x49, 0xaa); 1987 ret |= SETIREG(SISCR, 0x49, 0xaa);
@@ -2036,7 +1998,8 @@ sisusb_init_gfxcore(struct sisusb_usb_data *sisusb)
2036 1998
2037 ret |= SETIREGAND(SISCAP, 0x3f, 0xef); 1999 ret |= SETIREGAND(SISCAP, 0x3f, 0xef);
2038 2000
2039 if (ret) continue; 2001 if (ret)
2002 continue;
2040 2003
2041 ret |= SETIREG(SISPART1, 0x00, 0x00); 2004 ret |= SETIREG(SISPART1, 0x00, 0x00);
2042 2005
@@ -2058,7 +2021,8 @@ sisusb_init_gfxcore(struct sisusb_usb_data *sisusb)
2058 ret |= SETIREG(SISSR, 0x32, 0x11); 2021 ret |= SETIREG(SISSR, 0x32, 0x11);
2059 ret |= SETIREG(SISSR, 0x33, 0x00); 2022 ret |= SETIREG(SISSR, 0x33, 0x00);
2060 2023
2061 if (ret) continue; 2024 if (ret)
2025 continue;
2062 2026
2063 ret |= SETIREG(SISCR, 0x83, 0x00); 2027 ret |= SETIREG(SISCR, 0x83, 0x00);
2064 2028
@@ -2080,13 +2044,15 @@ sisusb_init_gfxcore(struct sisusb_usb_data *sisusb)
2080 if (ramtype <= 1) { 2044 if (ramtype <= 1) {
2081 ret |= sisusb_get_sdram_size(sisusb, &iret, bw, chab); 2045 ret |= sisusb_get_sdram_size(sisusb, &iret, bw, chab);
2082 if (iret) { 2046 if (iret) {
2083 dev_err(&sisusb->sisusb_dev->dev,"RAM size detection failed, assuming 8MB video RAM\n"); 2047 dev_err(&sisusb->sisusb_dev->dev,
2084 ret |= SETIREG(SISSR,0x14,0x31); 2048 "RAM size detection failed, assuming 8MB video RAM\n");
2049 ret |= SETIREG(SISSR, 0x14, 0x31);
2085 /* TODO */ 2050 /* TODO */
2086 } 2051 }
2087 } else { 2052 } else {
2088 dev_err(&sisusb->sisusb_dev->dev, "DDR RAM device found, assuming 8MB video RAM\n"); 2053 dev_err(&sisusb->sisusb_dev->dev,
2089 ret |= SETIREG(SISSR,0x14,0x31); 2054 "DDR RAM device found, assuming 8MB video RAM\n");
2055 ret |= SETIREG(SISSR, 0x14, 0x31);
2090 /* *** TODO *** */ 2056 /* *** TODO *** */
2091 } 2057 }
2092 2058
@@ -2117,8 +2083,7 @@ sisusb_init_gfxcore(struct sisusb_usb_data *sisusb)
2117#undef READL 2083#undef READL
2118#undef WRITEL 2084#undef WRITEL
2119 2085
2120static void 2086static void sisusb_get_ramconfig(struct sisusb_usb_data *sisusb)
2121sisusb_get_ramconfig(struct sisusb_usb_data *sisusb)
2122{ 2087{
2123 u8 tmp8, tmp82, ramtype; 2088 u8 tmp8, tmp82, ramtype;
2124 int bw = 0; 2089 int bw = 0;
@@ -2127,7 +2092,7 @@ sisusb_get_ramconfig(struct sisusb_usb_data *sisusb)
2127 static const char ram_dynamictype[4] = {'D', 'G', 'D', 'G'}; 2092 static const char ram_dynamictype[4] = {'D', 'G', 'D', 'G'};
2128 static const int busSDR[4] = {64, 64, 128, 128}; 2093 static const int busSDR[4] = {64, 64, 128, 128};
2129 static const int busDDR[4] = {32, 32, 64, 64}; 2094 static const int busDDR[4] = {32, 32, 64, 64};
2130 static const int busDDRA[4] = {64+32, 64+32 , (64+32)*2, (64+32)*2}; 2095 static const int busDDRA[4] = {64+32, 64+32, (64+32)*2, (64+32)*2};
2131 2096
2132 sisusb_getidxreg(sisusb, SISSR, 0x14, &tmp8); 2097 sisusb_getidxreg(sisusb, SISSR, 0x14, &tmp8);
2133 sisusb_getidxreg(sisusb, SISSR, 0x15, &tmp82); 2098 sisusb_getidxreg(sisusb, SISSR, 0x15, &tmp82);
@@ -2135,35 +2100,38 @@ sisusb_get_ramconfig(struct sisusb_usb_data *sisusb)
2135 sisusb->vramsize = (1 << ((tmp8 & 0xf0) >> 4)) * 1024 * 1024; 2100 sisusb->vramsize = (1 << ((tmp8 & 0xf0) >> 4)) * 1024 * 1024;
2136 ramtype &= 0x03; 2101 ramtype &= 0x03;
2137 switch ((tmp8 >> 2) & 0x03) { 2102 switch ((tmp8 >> 2) & 0x03) {
2138 case 0: ramtypetext1 = "1 ch/1 r"; 2103 case 0:
2139 if (tmp82 & 0x10) { 2104 ramtypetext1 = "1 ch/1 r";
2105 if (tmp82 & 0x10)
2140 bw = 32; 2106 bw = 32;
2141 } else { 2107 else
2142 bw = busSDR[(tmp8 & 0x03)]; 2108 bw = busSDR[(tmp8 & 0x03)];
2143 } 2109
2144 break; 2110 break;
2145 case 1: ramtypetext1 = "1 ch/2 r"; 2111 case 1:
2112 ramtypetext1 = "1 ch/2 r";
2146 sisusb->vramsize <<= 1; 2113 sisusb->vramsize <<= 1;
2147 bw = busSDR[(tmp8 & 0x03)]; 2114 bw = busSDR[(tmp8 & 0x03)];
2148 break; 2115 break;
2149 case 2: ramtypetext1 = "asymmeric"; 2116 case 2:
2117 ramtypetext1 = "asymmeric";
2150 sisusb->vramsize += sisusb->vramsize/2; 2118 sisusb->vramsize += sisusb->vramsize/2;
2151 bw = busDDRA[(tmp8 & 0x03)]; 2119 bw = busDDRA[(tmp8 & 0x03)];
2152 break; 2120 break;
2153 case 3: ramtypetext1 = "2 channel"; 2121 case 3:
2122 ramtypetext1 = "2 channel";
2154 sisusb->vramsize <<= 1; 2123 sisusb->vramsize <<= 1;
2155 bw = busDDR[(tmp8 & 0x03)]; 2124 bw = busDDR[(tmp8 & 0x03)];
2156 break; 2125 break;
2157 } 2126 }
2158 2127
2159 2128 dev_info(&sisusb->sisusb_dev->dev,
2160 dev_info(&sisusb->sisusb_dev->dev, "%dMB %s %cDR S%cRAM, bus width %d\n", 2129 "%dMB %s %cDR S%cRAM, bus width %d\n",
2161 sisusb->vramsize >> 20, ramtypetext1, 2130 sisusb->vramsize >> 20, ramtypetext1,
2162 ram_datarate[ramtype], ram_dynamictype[ramtype], bw); 2131 ram_datarate[ramtype], ram_dynamictype[ramtype], bw);
2163} 2132}
2164 2133
2165static int 2134static int sisusb_do_init_gfxdevice(struct sisusb_usb_data *sisusb)
2166sisusb_do_init_gfxdevice(struct sisusb_usb_data *sisusb)
2167{ 2135{
2168 struct sisusb_packet packet; 2136 struct sisusb_packet packet;
2169 int ret; 2137 int ret;
@@ -2241,8 +2209,7 @@ sisusb_do_init_gfxdevice(struct sisusb_usb_data *sisusb)
2241 * of the graphics board. 2209 * of the graphics board.
2242 */ 2210 */
2243 2211
2244static int 2212static int sisusb_init_gfxdevice(struct sisusb_usb_data *sisusb, int initscreen)
2245sisusb_init_gfxdevice(struct sisusb_usb_data *sisusb, int initscreen)
2246{ 2213{
2247 int ret = 0, test = 0; 2214 int ret = 0, test = 0;
2248 u32 tmp32; 2215 u32 tmp32;
@@ -2250,16 +2217,25 @@ sisusb_init_gfxdevice(struct sisusb_usb_data *sisusb, int initscreen)
2250 if (sisusb->devinit == 1) { 2217 if (sisusb->devinit == 1) {
2251 /* Read PCI BARs and see if they have been set up */ 2218 /* Read PCI BARs and see if they have been set up */
2252 ret |= sisusb_read_pci_config(sisusb, 0x10, &tmp32); 2219 ret |= sisusb_read_pci_config(sisusb, 0x10, &tmp32);
2253 if (ret) return ret; 2220 if (ret)
2254 if ((tmp32 & 0xfffffff0) == SISUSB_PCI_MEMBASE) test++; 2221 return ret;
2222
2223 if ((tmp32 & 0xfffffff0) == SISUSB_PCI_MEMBASE)
2224 test++;
2255 2225
2256 ret |= sisusb_read_pci_config(sisusb, 0x14, &tmp32); 2226 ret |= sisusb_read_pci_config(sisusb, 0x14, &tmp32);
2257 if (ret) return ret; 2227 if (ret)
2258 if ((tmp32 & 0xfffffff0) == SISUSB_PCI_MMIOBASE) test++; 2228 return ret;
2229
2230 if ((tmp32 & 0xfffffff0) == SISUSB_PCI_MMIOBASE)
2231 test++;
2259 2232
2260 ret |= sisusb_read_pci_config(sisusb, 0x18, &tmp32); 2233 ret |= sisusb_read_pci_config(sisusb, 0x18, &tmp32);
2261 if (ret) return ret; 2234 if (ret)
2262 if ((tmp32 & 0xfffffff0) == SISUSB_PCI_IOPORTBASE) test++; 2235 return ret;
2236
2237 if ((tmp32 & 0xfffffff0) == SISUSB_PCI_IOPORTBASE)
2238 test++;
2263 } 2239 }
2264 2240
2265 /* No? So reset the device */ 2241 /* No? So reset the device */
@@ -2289,20 +2265,20 @@ sisusb_init_gfxdevice(struct sisusb_usb_data *sisusb, int initscreen)
2289#ifdef INCL_SISUSB_CON 2265#ifdef INCL_SISUSB_CON
2290 2266
2291/* Set up default text mode: 2267/* Set up default text mode:
2292 - Set text mode (0x03) 2268 * - Set text mode (0x03)
2293 - Upload default font 2269 * - Upload default font
2294 - Upload user font (if available) 2270 * - Upload user font (if available)
2295*/ 2271 */
2296 2272
2297int 2273int sisusb_reset_text_mode(struct sisusb_usb_data *sisusb, int init)
2298sisusb_reset_text_mode(struct sisusb_usb_data *sisusb, int init)
2299{ 2274{
2300 int ret = 0, slot = sisusb->font_slot, i; 2275 int ret = 0, slot = sisusb->font_slot, i;
2301 const struct font_desc *myfont; 2276 const struct font_desc *myfont;
2302 u8 *tempbuf; 2277 u8 *tempbuf;
2303 u16 *tempbufb; 2278 u16 *tempbufb;
2304 size_t written; 2279 size_t written;
2305 static const char bootstring[] = "SiSUSB VGA text console, (C) 2005 Thomas Winischhofer."; 2280 static const char bootstring[] =
2281 "SiSUSB VGA text console, (C) 2005 Thomas Winischhofer.";
2306 static const char bootlogo[] = "(o_ //\\ V_/_"; 2282 static const char bootlogo[] = "(o_ //\\ V_/_";
2307 2283
2308 /* sisusb->lock is down */ 2284 /* sisusb->lock is down */
@@ -2328,7 +2304,8 @@ sisusb_reset_text_mode(struct sisusb_usb_data *sisusb, int init)
2328 memcpy(tempbuf + (i * 32), myfont->data + (i * 16), 16); 2304 memcpy(tempbuf + (i * 32), myfont->data + (i * 16), 16);
2329 2305
2330 /* Upload default font */ 2306 /* Upload default font */
2331 ret = sisusbcon_do_font_op(sisusb, 1, 0, tempbuf, 8192, 0, 1, NULL, 16, 0); 2307 ret = sisusbcon_do_font_op(sisusb, 1, 0, tempbuf, 8192,
2308 0, 1, NULL, 16, 0);
2332 2309
2333 vfree(tempbuf); 2310 vfree(tempbuf);
2334 2311
@@ -2366,7 +2343,7 @@ sisusb_reset_text_mode(struct sisusb_usb_data *sisusb, int init)
2366 *(tempbufb++) = 0x0700 | bootstring[i++]; 2343 *(tempbufb++) = 0x0700 | bootstring[i++];
2367 2344
2368 ret |= sisusb_copy_memory(sisusb, tempbuf, 2345 ret |= sisusb_copy_memory(sisusb, tempbuf,
2369 sisusb->vrambase, 8192, &written); 2346 sisusb->vrambase, 8192, &written);
2370 2347
2371 vfree(tempbuf); 2348 vfree(tempbuf);
2372 2349
@@ -2375,12 +2352,13 @@ sisusb_reset_text_mode(struct sisusb_usb_data *sisusb, int init)
2375 } else if (sisusb->scrbuf) { 2352 } else if (sisusb->scrbuf) {
2376 2353
2377 ret |= sisusb_copy_memory(sisusb, (char *)sisusb->scrbuf, 2354 ret |= sisusb_copy_memory(sisusb, (char *)sisusb->scrbuf,
2378 sisusb->vrambase, sisusb->scrbuf_size, &written); 2355 sisusb->vrambase, sisusb->scrbuf_size,
2356 &written);
2379 2357
2380 } 2358 }
2381 2359
2382 if (sisusb->sisusb_cursor_size_from >= 0 && 2360 if (sisusb->sisusb_cursor_size_from >= 0 &&
2383 sisusb->sisusb_cursor_size_to >= 0) { 2361 sisusb->sisusb_cursor_size_to >= 0) {
2384 sisusb_setidxreg(sisusb, SISCR, 0x0a, 2362 sisusb_setidxreg(sisusb, SISCR, 0x0a,
2385 sisusb->sisusb_cursor_size_from); 2363 sisusb->sisusb_cursor_size_from);
2386 sisusb_setidxregandor(sisusb, SISCR, 0x0b, 0xe0, 2364 sisusb_setidxregandor(sisusb, SISCR, 0x0b, 0xe0,
@@ -2392,7 +2370,8 @@ sisusb_reset_text_mode(struct sisusb_usb_data *sisusb, int init)
2392 } 2370 }
2393 2371
2394 slot = sisusb->sisusb_cursor_loc; 2372 slot = sisusb->sisusb_cursor_loc;
2395 if(slot < 0) slot = 0; 2373 if (slot < 0)
2374 slot = 0;
2396 2375
2397 sisusb->sisusb_cursor_loc = -1; 2376 sisusb->sisusb_cursor_loc = -1;
2398 sisusb->bad_cursor_pos = 1; 2377 sisusb->bad_cursor_pos = 1;
@@ -2413,22 +2392,19 @@ sisusb_reset_text_mode(struct sisusb_usb_data *sisusb, int init)
2413 2392
2414/* fops */ 2393/* fops */
2415 2394
2416static int 2395static int sisusb_open(struct inode *inode, struct file *file)
2417sisusb_open(struct inode *inode, struct file *file)
2418{ 2396{
2419 struct sisusb_usb_data *sisusb; 2397 struct sisusb_usb_data *sisusb;
2420 struct usb_interface *interface; 2398 struct usb_interface *interface;
2421 int subminor = iminor(inode); 2399 int subminor = iminor(inode);
2422 2400
2423 interface = usb_find_interface(&sisusb_driver, subminor); 2401 interface = usb_find_interface(&sisusb_driver, subminor);
2424 if (!interface) { 2402 if (!interface)
2425 return -ENODEV; 2403 return -ENODEV;
2426 }
2427 2404
2428 sisusb = usb_get_intfdata(interface); 2405 sisusb = usb_get_intfdata(interface);
2429 if (!sisusb) { 2406 if (!sisusb)
2430 return -ENODEV; 2407 return -ENODEV;
2431 }
2432 2408
2433 mutex_lock(&sisusb->lock); 2409 mutex_lock(&sisusb->lock);
2434 2410
@@ -2444,15 +2420,17 @@ sisusb_open(struct inode *inode, struct file *file)
2444 2420
2445 if (!sisusb->devinit) { 2421 if (!sisusb->devinit) {
2446 if (sisusb->sisusb_dev->speed == USB_SPEED_HIGH || 2422 if (sisusb->sisusb_dev->speed == USB_SPEED_HIGH ||
2447 sisusb->sisusb_dev->speed == USB_SPEED_SUPER) { 2423 sisusb->sisusb_dev->speed == USB_SPEED_SUPER) {
2448 if (sisusb_init_gfxdevice(sisusb, 0)) { 2424 if (sisusb_init_gfxdevice(sisusb, 0)) {
2449 mutex_unlock(&sisusb->lock); 2425 mutex_unlock(&sisusb->lock);
2450 dev_err(&sisusb->sisusb_dev->dev, "Failed to initialize device\n"); 2426 dev_err(&sisusb->sisusb_dev->dev,
2427 "Failed to initialize device\n");
2451 return -EIO; 2428 return -EIO;
2452 } 2429 }
2453 } else { 2430 } else {
2454 mutex_unlock(&sisusb->lock); 2431 mutex_unlock(&sisusb->lock);
2455 dev_err(&sisusb->sisusb_dev->dev, "Device not attached to USB 2.0 hub\n"); 2432 dev_err(&sisusb->sisusb_dev->dev,
2433 "Device not attached to USB 2.0 hub\n");
2456 return -EIO; 2434 return -EIO;
2457 } 2435 }
2458 } 2436 }
@@ -2469,8 +2447,7 @@ sisusb_open(struct inode *inode, struct file *file)
2469 return 0; 2447 return 0;
2470} 2448}
2471 2449
2472void 2450void sisusb_delete(struct kref *kref)
2473sisusb_delete(struct kref *kref)
2474{ 2451{
2475 struct sisusb_usb_data *sisusb = to_sisusb_dev(kref); 2452 struct sisusb_usb_data *sisusb = to_sisusb_dev(kref);
2476 2453
@@ -2488,8 +2465,7 @@ sisusb_delete(struct kref *kref)
2488 kfree(sisusb); 2465 kfree(sisusb);
2489} 2466}
2490 2467
2491static int 2468static int sisusb_release(struct inode *inode, struct file *file)
2492sisusb_release(struct inode *inode, struct file *file)
2493{ 2469{
2494 struct sisusb_usb_data *sisusb; 2470 struct sisusb_usb_data *sisusb;
2495 2471
@@ -2516,8 +2492,8 @@ sisusb_release(struct inode *inode, struct file *file)
2516 return 0; 2492 return 0;
2517} 2493}
2518 2494
2519static ssize_t 2495static ssize_t sisusb_read(struct file *file, char __user *buffer,
2520sisusb_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos) 2496 size_t count, loff_t *ppos)
2521{ 2497{
2522 struct sisusb_usb_data *sisusb; 2498 struct sisusb_usb_data *sisusb;
2523 ssize_t bytes_read = 0; 2499 ssize_t bytes_read = 0;
@@ -2539,11 +2515,10 @@ sisusb_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
2539 } 2515 }
2540 2516
2541 if ((*ppos) >= SISUSB_PCI_PSEUDO_IOPORTBASE && 2517 if ((*ppos) >= SISUSB_PCI_PSEUDO_IOPORTBASE &&
2542 (*ppos) < SISUSB_PCI_PSEUDO_IOPORTBASE + 128) { 2518 (*ppos) < SISUSB_PCI_PSEUDO_IOPORTBASE + 128) {
2543 2519
2544 address = (*ppos) - 2520 address = (*ppos) - SISUSB_PCI_PSEUDO_IOPORTBASE +
2545 SISUSB_PCI_PSEUDO_IOPORTBASE + 2521 SISUSB_PCI_IOPORTBASE;
2546 SISUSB_PCI_IOPORTBASE;
2547 2522
2548 /* Read i/o ports 2523 /* Read i/o ports
2549 * Byte, word and long(32) can be read. As this 2524 * Byte, word and long(32) can be read. As this
@@ -2551,82 +2526,77 @@ sisusb_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
2551 * in machine-endianness. 2526 * in machine-endianness.
2552 */ 2527 */
2553 switch (count) { 2528 switch (count) {
2529 case 1:
2530 if (sisusb_read_memio_byte(sisusb, SISUSB_TYPE_IO,
2531 address, &buf8))
2532 errno = -EIO;
2533 else if (put_user(buf8, (u8 __user *)buffer))
2534 errno = -EFAULT;
2535 else
2536 bytes_read = 1;
2554 2537
2555 case 1: 2538 break;
2556 if (sisusb_read_memio_byte(sisusb,
2557 SISUSB_TYPE_IO,
2558 address, &buf8))
2559 errno = -EIO;
2560 else if (put_user(buf8, (u8 __user *)buffer))
2561 errno = -EFAULT;
2562 else
2563 bytes_read = 1;
2564
2565 break;
2566 2539
2567 case 2: 2540 case 2:
2568 if (sisusb_read_memio_word(sisusb, 2541 if (sisusb_read_memio_word(sisusb, SISUSB_TYPE_IO,
2569 SISUSB_TYPE_IO, 2542 address, &buf16))
2570 address, &buf16)) 2543 errno = -EIO;
2571 errno = -EIO; 2544 else if (put_user(buf16, (u16 __user *)buffer))
2572 else if (put_user(buf16, (u16 __user *)buffer)) 2545 errno = -EFAULT;
2573 errno = -EFAULT; 2546 else
2574 else 2547 bytes_read = 2;
2575 bytes_read = 2;
2576 2548
2577 break; 2549 break;
2578 2550
2579 case 4: 2551 case 4:
2580 if (sisusb_read_memio_long(sisusb, 2552 if (sisusb_read_memio_long(sisusb, SISUSB_TYPE_IO,
2581 SISUSB_TYPE_IO, 2553 address, &buf32))
2582 address, &buf32)) 2554 errno = -EIO;
2583 errno = -EIO; 2555 else if (put_user(buf32, (u32 __user *)buffer))
2584 else if (put_user(buf32, (u32 __user *)buffer)) 2556 errno = -EFAULT;
2585 errno = -EFAULT; 2557 else
2586 else 2558 bytes_read = 4;
2587 bytes_read = 4;
2588 2559
2589 break; 2560 break;
2590 2561
2591 default: 2562 default:
2592 errno = -EIO; 2563 errno = -EIO;
2593 2564
2594 } 2565 }
2595 2566
2596 } else if ((*ppos) >= SISUSB_PCI_PSEUDO_MEMBASE && 2567 } else if ((*ppos) >= SISUSB_PCI_PSEUDO_MEMBASE && (*ppos) <
2597 (*ppos) < SISUSB_PCI_PSEUDO_MEMBASE + sisusb->vramsize) { 2568 SISUSB_PCI_PSEUDO_MEMBASE + sisusb->vramsize) {
2598 2569
2599 address = (*ppos) - 2570 address = (*ppos) - SISUSB_PCI_PSEUDO_MEMBASE +
2600 SISUSB_PCI_PSEUDO_MEMBASE + 2571 SISUSB_PCI_MEMBASE;
2601 SISUSB_PCI_MEMBASE;
2602 2572
2603 /* Read video ram 2573 /* Read video ram
2604 * Remember: Data delivered is never endian-corrected 2574 * Remember: Data delivered is never endian-corrected
2605 */ 2575 */
2606 errno = sisusb_read_mem_bulk(sisusb, address, 2576 errno = sisusb_read_mem_bulk(sisusb, address,
2607 NULL, count, buffer, &bytes_read); 2577 NULL, count, buffer, &bytes_read);
2608 2578
2609 if (bytes_read) 2579 if (bytes_read)
2610 errno = bytes_read; 2580 errno = bytes_read;
2611 2581
2612 } else if ((*ppos) >= SISUSB_PCI_PSEUDO_MMIOBASE && 2582 } else if ((*ppos) >= SISUSB_PCI_PSEUDO_MMIOBASE &&
2613 (*ppos) < SISUSB_PCI_PSEUDO_MMIOBASE + SISUSB_PCI_MMIOSIZE) { 2583 (*ppos) < SISUSB_PCI_PSEUDO_MMIOBASE +
2584 SISUSB_PCI_MMIOSIZE) {
2614 2585
2615 address = (*ppos) - 2586 address = (*ppos) - SISUSB_PCI_PSEUDO_MMIOBASE +
2616 SISUSB_PCI_PSEUDO_MMIOBASE + 2587 SISUSB_PCI_MMIOBASE;
2617 SISUSB_PCI_MMIOBASE;
2618 2588
2619 /* Read MMIO 2589 /* Read MMIO
2620 * Remember: Data delivered is never endian-corrected 2590 * Remember: Data delivered is never endian-corrected
2621 */ 2591 */
2622 errno = sisusb_read_mem_bulk(sisusb, address, 2592 errno = sisusb_read_mem_bulk(sisusb, address,
2623 NULL, count, buffer, &bytes_read); 2593 NULL, count, buffer, &bytes_read);
2624 2594
2625 if (bytes_read) 2595 if (bytes_read)
2626 errno = bytes_read; 2596 errno = bytes_read;
2627 2597
2628 } else if ((*ppos) >= SISUSB_PCI_PSEUDO_PCIBASE && 2598 } else if ((*ppos) >= SISUSB_PCI_PSEUDO_PCIBASE &&
2629 (*ppos) <= SISUSB_PCI_PSEUDO_PCIBASE + 0x5c) { 2599 (*ppos) <= SISUSB_PCI_PSEUDO_PCIBASE + 0x5c) {
2630 2600
2631 if (count != 4) { 2601 if (count != 4) {
2632 mutex_unlock(&sisusb->lock); 2602 mutex_unlock(&sisusb->lock);
@@ -2658,9 +2628,8 @@ sisusb_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
2658 return errno ? errno : bytes_read; 2628 return errno ? errno : bytes_read;
2659} 2629}
2660 2630
2661static ssize_t 2631static ssize_t sisusb_write(struct file *file, const char __user *buffer,
2662sisusb_write(struct file *file, const char __user *buffer, size_t count, 2632 size_t count, loff_t *ppos)
2663 loff_t *ppos)
2664{ 2633{
2665 struct sisusb_usb_data *sisusb; 2634 struct sisusb_usb_data *sisusb;
2666 int errno = 0; 2635 int errno = 0;
@@ -2682,11 +2651,10 @@ sisusb_write(struct file *file, const char __user *buffer, size_t count,
2682 } 2651 }
2683 2652
2684 if ((*ppos) >= SISUSB_PCI_PSEUDO_IOPORTBASE && 2653 if ((*ppos) >= SISUSB_PCI_PSEUDO_IOPORTBASE &&
2685 (*ppos) < SISUSB_PCI_PSEUDO_IOPORTBASE + 128) { 2654 (*ppos) < SISUSB_PCI_PSEUDO_IOPORTBASE + 128) {
2686 2655
2687 address = (*ppos) - 2656 address = (*ppos) - SISUSB_PCI_PSEUDO_IOPORTBASE +
2688 SISUSB_PCI_PSEUDO_IOPORTBASE + 2657 SISUSB_PCI_IOPORTBASE;
2689 SISUSB_PCI_IOPORTBASE;
2690 2658
2691 /* Write i/o ports 2659 /* Write i/o ports
2692 * Byte, word and long(32) can be written. As this 2660 * Byte, word and long(32) can be written. As this
@@ -2694,53 +2662,49 @@ sisusb_write(struct file *file, const char __user *buffer, size_t count,
2694 * in machine-endianness. 2662 * in machine-endianness.
2695 */ 2663 */
2696 switch (count) { 2664 switch (count) {
2665 case 1:
2666 if (get_user(buf8, (u8 __user *)buffer))
2667 errno = -EFAULT;
2668 else if (sisusb_write_memio_byte(sisusb,
2669 SISUSB_TYPE_IO, address, buf8))
2670 errno = -EIO;
2671 else
2672 bytes_written = 1;
2697 2673
2698 case 1: 2674 break;
2699 if (get_user(buf8, (u8 __user *)buffer))
2700 errno = -EFAULT;
2701 else if (sisusb_write_memio_byte(sisusb,
2702 SISUSB_TYPE_IO,
2703 address, buf8))
2704 errno = -EIO;
2705 else
2706 bytes_written = 1;
2707
2708 break;
2709 2675
2710 case 2: 2676 case 2:
2711 if (get_user(buf16, (u16 __user *)buffer)) 2677 if (get_user(buf16, (u16 __user *)buffer))
2712 errno = -EFAULT; 2678 errno = -EFAULT;
2713 else if (sisusb_write_memio_word(sisusb, 2679 else if (sisusb_write_memio_word(sisusb,
2714 SISUSB_TYPE_IO, 2680 SISUSB_TYPE_IO, address, buf16))
2715 address, buf16)) 2681 errno = -EIO;
2716 errno = -EIO; 2682 else
2717 else 2683 bytes_written = 2;
2718 bytes_written = 2;
2719 2684
2720 break; 2685 break;
2721 2686
2722 case 4: 2687 case 4:
2723 if (get_user(buf32, (u32 __user *)buffer)) 2688 if (get_user(buf32, (u32 __user *)buffer))
2724 errno = -EFAULT; 2689 errno = -EFAULT;
2725 else if (sisusb_write_memio_long(sisusb, 2690 else if (sisusb_write_memio_long(sisusb,
2726 SISUSB_TYPE_IO, 2691 SISUSB_TYPE_IO, address, buf32))
2727 address, buf32)) 2692 errno = -EIO;
2728 errno = -EIO; 2693 else
2729 else 2694 bytes_written = 4;
2730 bytes_written = 4;
2731 2695
2732 break; 2696 break;
2733 2697
2734 default: 2698 default:
2735 errno = -EIO; 2699 errno = -EIO;
2736 } 2700 }
2737 2701
2738 } else if ((*ppos) >= SISUSB_PCI_PSEUDO_MEMBASE && 2702 } else if ((*ppos) >= SISUSB_PCI_PSEUDO_MEMBASE &&
2739 (*ppos) < SISUSB_PCI_PSEUDO_MEMBASE + sisusb->vramsize) { 2703 (*ppos) < SISUSB_PCI_PSEUDO_MEMBASE +
2704 sisusb->vramsize) {
2740 2705
2741 address = (*ppos) - 2706 address = (*ppos) - SISUSB_PCI_PSEUDO_MEMBASE +
2742 SISUSB_PCI_PSEUDO_MEMBASE + 2707 SISUSB_PCI_MEMBASE;
2743 SISUSB_PCI_MEMBASE;
2744 2708
2745 /* Write video ram. 2709 /* Write video ram.
2746 * Buffer is copied 1:1, therefore, on big-endian 2710 * Buffer is copied 1:1, therefore, on big-endian
@@ -2749,17 +2713,17 @@ sisusb_write(struct file *file, const char __user *buffer, size_t count,
2749 * mode or if YUV data is being transferred). 2713 * mode or if YUV data is being transferred).
2750 */ 2714 */
2751 errno = sisusb_write_mem_bulk(sisusb, address, NULL, 2715 errno = sisusb_write_mem_bulk(sisusb, address, NULL,
2752 count, buffer, 0, &bytes_written); 2716 count, buffer, 0, &bytes_written);
2753 2717
2754 if (bytes_written) 2718 if (bytes_written)
2755 errno = bytes_written; 2719 errno = bytes_written;
2756 2720
2757 } else if ((*ppos) >= SISUSB_PCI_PSEUDO_MMIOBASE && 2721 } else if ((*ppos) >= SISUSB_PCI_PSEUDO_MMIOBASE &&
2758 (*ppos) < SISUSB_PCI_PSEUDO_MMIOBASE + SISUSB_PCI_MMIOSIZE) { 2722 (*ppos) < SISUSB_PCI_PSEUDO_MMIOBASE +
2723 SISUSB_PCI_MMIOSIZE) {
2759 2724
2760 address = (*ppos) - 2725 address = (*ppos) - SISUSB_PCI_PSEUDO_MMIOBASE +
2761 SISUSB_PCI_PSEUDO_MMIOBASE + 2726 SISUSB_PCI_MMIOBASE;
2762 SISUSB_PCI_MMIOBASE;
2763 2727
2764 /* Write MMIO. 2728 /* Write MMIO.
2765 * Buffer is copied 1:1, therefore, on big-endian 2729 * Buffer is copied 1:1, therefore, on big-endian
@@ -2767,13 +2731,14 @@ sisusb_write(struct file *file, const char __user *buffer, size_t count,
2767 * in advance. 2731 * in advance.
2768 */ 2732 */
2769 errno = sisusb_write_mem_bulk(sisusb, address, NULL, 2733 errno = sisusb_write_mem_bulk(sisusb, address, NULL,
2770 count, buffer, 0, &bytes_written); 2734 count, buffer, 0, &bytes_written);
2771 2735
2772 if (bytes_written) 2736 if (bytes_written)
2773 errno = bytes_written; 2737 errno = bytes_written;
2774 2738
2775 } else if ((*ppos) >= SISUSB_PCI_PSEUDO_PCIBASE && 2739 } else if ((*ppos) >= SISUSB_PCI_PSEUDO_PCIBASE &&
2776 (*ppos) <= SISUSB_PCI_PSEUDO_PCIBASE + SISUSB_PCI_PCONFSIZE) { 2740 (*ppos) <= SISUSB_PCI_PSEUDO_PCIBASE +
2741 SISUSB_PCI_PCONFSIZE) {
2777 2742
2778 if (count != 4) { 2743 if (count != 4) {
2779 mutex_unlock(&sisusb->lock); 2744 mutex_unlock(&sisusb->lock);
@@ -2807,8 +2772,7 @@ sisusb_write(struct file *file, const char __user *buffer, size_t count,
2807 return errno ? errno : bytes_written; 2772 return errno ? errno : bytes_written;
2808} 2773}
2809 2774
2810static loff_t 2775static loff_t sisusb_lseek(struct file *file, loff_t offset, int orig)
2811sisusb_lseek(struct file *file, loff_t offset, int orig)
2812{ 2776{
2813 struct sisusb_usb_data *sisusb; 2777 struct sisusb_usb_data *sisusb;
2814 loff_t ret; 2778 loff_t ret;
@@ -2831,9 +2795,8 @@ sisusb_lseek(struct file *file, loff_t offset, int orig)
2831 return ret; 2795 return ret;
2832} 2796}
2833 2797
2834static int 2798static int sisusb_handle_command(struct sisusb_usb_data *sisusb,
2835sisusb_handle_command(struct sisusb_usb_data *sisusb, struct sisusb_command *y, 2799 struct sisusb_command *y, unsigned long arg)
2836 unsigned long arg)
2837{ 2800{
2838 int retval, port, length; 2801 int retval, port, length;
2839 u32 address; 2802 u32 address;
@@ -2849,105 +2812,99 @@ sisusb_handle_command(struct sisusb_usb_data *sisusb, struct sisusb_command *y,
2849 SISUSB_PCI_IOPORTBASE; 2812 SISUSB_PCI_IOPORTBASE;
2850 2813
2851 switch (y->operation) { 2814 switch (y->operation) {
2852 case SUCMD_GET: 2815 case SUCMD_GET:
2853 retval = sisusb_getidxreg(sisusb, port, 2816 retval = sisusb_getidxreg(sisusb, port, y->data0, &y->data1);
2854 y->data0, &y->data1); 2817 if (!retval) {
2855 if (!retval) { 2818 if (copy_to_user((void __user *)arg, y, sizeof(*y)))
2856 if (copy_to_user((void __user *)arg, y, 2819 retval = -EFAULT;
2857 sizeof(*y))) 2820 }
2858 retval = -EFAULT; 2821 break;
2859 }
2860 break;
2861 2822
2862 case SUCMD_SET: 2823 case SUCMD_SET:
2863 retval = sisusb_setidxreg(sisusb, port, 2824 retval = sisusb_setidxreg(sisusb, port, y->data0, y->data1);
2864 y->data0, y->data1); 2825 break;
2865 break;
2866 2826
2867 case SUCMD_SETOR: 2827 case SUCMD_SETOR:
2868 retval = sisusb_setidxregor(sisusb, port, 2828 retval = sisusb_setidxregor(sisusb, port, y->data0, y->data1);
2869 y->data0, y->data1); 2829 break;
2870 break;
2871 2830
2872 case SUCMD_SETAND: 2831 case SUCMD_SETAND:
2873 retval = sisusb_setidxregand(sisusb, port, 2832 retval = sisusb_setidxregand(sisusb, port, y->data0, y->data1);
2874 y->data0, y->data1); 2833 break;
2875 break;
2876 2834
2877 case SUCMD_SETANDOR: 2835 case SUCMD_SETANDOR:
2878 retval = sisusb_setidxregandor(sisusb, port, 2836 retval = sisusb_setidxregandor(sisusb, port, y->data0,
2879 y->data0, y->data1, y->data2); 2837 y->data1, y->data2);
2880 break; 2838 break;
2881 2839
2882 case SUCMD_SETMASK: 2840 case SUCMD_SETMASK:
2883 retval = sisusb_setidxregmask(sisusb, port, 2841 retval = sisusb_setidxregmask(sisusb, port, y->data0,
2884 y->data0, y->data1, y->data2); 2842 y->data1, y->data2);
2885 break; 2843 break;
2886 2844
2887 case SUCMD_CLRSCR: 2845 case SUCMD_CLRSCR:
2888 /* Gfx core must be initialized */ 2846 /* Gfx core must be initialized */
2889 if (!sisusb->gfxinit) 2847 if (!sisusb->gfxinit)
2890 return -ENODEV; 2848 return -ENODEV;
2891 2849
2892 length = (y->data0 << 16) | (y->data1 << 8) | y->data2; 2850 length = (y->data0 << 16) | (y->data1 << 8) | y->data2;
2893 address = y->data3 - 2851 address = y->data3 - SISUSB_PCI_PSEUDO_MEMBASE +
2894 SISUSB_PCI_PSEUDO_MEMBASE +
2895 SISUSB_PCI_MEMBASE; 2852 SISUSB_PCI_MEMBASE;
2896 retval = sisusb_clear_vram(sisusb, address, length); 2853 retval = sisusb_clear_vram(sisusb, address, length);
2897 break; 2854 break;
2898 2855
2899 case SUCMD_HANDLETEXTMODE: 2856 case SUCMD_HANDLETEXTMODE:
2900 retval = 0; 2857 retval = 0;
2901#ifdef INCL_SISUSB_CON 2858#ifdef INCL_SISUSB_CON
2902 /* Gfx core must be initialized, SiS_Pr must exist */ 2859 /* Gfx core must be initialized, SiS_Pr must exist */
2903 if (!sisusb->gfxinit || !sisusb->SiS_Pr) 2860 if (!sisusb->gfxinit || !sisusb->SiS_Pr)
2904 return -ENODEV; 2861 return -ENODEV;
2905 2862
2906 switch (y->data0) { 2863 switch (y->data0) {
2907 case 0: 2864 case 0:
2908 retval = sisusb_reset_text_mode(sisusb, 0); 2865 retval = sisusb_reset_text_mode(sisusb, 0);
2909 break; 2866 break;
2910 case 1: 2867 case 1:
2911 sisusb->textmodedestroyed = 1; 2868 sisusb->textmodedestroyed = 1;
2912 break;
2913 }
2914#endif
2915 break; 2869 break;
2870 }
2871#endif
2872 break;
2916 2873
2917#ifdef INCL_SISUSB_CON 2874#ifdef INCL_SISUSB_CON
2918 case SUCMD_SETMODE: 2875 case SUCMD_SETMODE:
2919 /* Gfx core must be initialized, SiS_Pr must exist */ 2876 /* Gfx core must be initialized, SiS_Pr must exist */
2920 if (!sisusb->gfxinit || !sisusb->SiS_Pr) 2877 if (!sisusb->gfxinit || !sisusb->SiS_Pr)
2921 return -ENODEV; 2878 return -ENODEV;
2922 2879
2923 retval = 0; 2880 retval = 0;
2924 2881
2925 sisusb->SiS_Pr->IOAddress = SISUSB_PCI_IOPORTBASE + 0x30; 2882 sisusb->SiS_Pr->IOAddress = SISUSB_PCI_IOPORTBASE + 0x30;
2926 sisusb->SiS_Pr->sisusb = (void *)sisusb; 2883 sisusb->SiS_Pr->sisusb = (void *)sisusb;
2927 2884
2928 if (SiSUSBSetMode(sisusb->SiS_Pr, y->data3)) 2885 if (SiSUSBSetMode(sisusb->SiS_Pr, y->data3))
2929 retval = -EINVAL; 2886 retval = -EINVAL;
2930 2887
2931 break; 2888 break;
2932 2889
2933 case SUCMD_SETVESAMODE: 2890 case SUCMD_SETVESAMODE:
2934 /* Gfx core must be initialized, SiS_Pr must exist */ 2891 /* Gfx core must be initialized, SiS_Pr must exist */
2935 if (!sisusb->gfxinit || !sisusb->SiS_Pr) 2892 if (!sisusb->gfxinit || !sisusb->SiS_Pr)
2936 return -ENODEV; 2893 return -ENODEV;
2937 2894
2938 retval = 0; 2895 retval = 0;
2939 2896
2940 sisusb->SiS_Pr->IOAddress = SISUSB_PCI_IOPORTBASE + 0x30; 2897 sisusb->SiS_Pr->IOAddress = SISUSB_PCI_IOPORTBASE + 0x30;
2941 sisusb->SiS_Pr->sisusb = (void *)sisusb; 2898 sisusb->SiS_Pr->sisusb = (void *)sisusb;
2942 2899
2943 if (SiSUSBSetVESAMode(sisusb->SiS_Pr, y->data3)) 2900 if (SiSUSBSetVESAMode(sisusb->SiS_Pr, y->data3))
2944 retval = -EINVAL; 2901 retval = -EINVAL;
2945 2902
2946 break; 2903 break;
2947#endif 2904#endif
2948 2905
2949 default: 2906 default:
2950 retval = -EINVAL; 2907 retval = -EINVAL;
2951 } 2908 }
2952 2909
2953 if (retval > 0) 2910 if (retval > 0)
@@ -2956,8 +2913,7 @@ sisusb_handle_command(struct sisusb_usb_data *sisusb, struct sisusb_command *y,
2956 return retval; 2913 return retval;
2957} 2914}
2958 2915
2959static long 2916static long sisusb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
2960sisusb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
2961{ 2917{
2962 struct sisusb_usb_data *sisusb; 2918 struct sisusb_usb_data *sisusb;
2963 struct sisusb_info x; 2919 struct sisusb_info x;
@@ -2978,52 +2934,51 @@ sisusb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
2978 } 2934 }
2979 2935
2980 switch (cmd) { 2936 switch (cmd) {
2937 case SISUSB_GET_CONFIG_SIZE:
2981 2938
2982 case SISUSB_GET_CONFIG_SIZE: 2939 if (put_user(sizeof(x), argp))
2983 2940 retval = -EFAULT;
2984 if (put_user(sizeof(x), argp))
2985 retval = -EFAULT;
2986 2941
2987 break; 2942 break;
2988 2943
2989 case SISUSB_GET_CONFIG: 2944 case SISUSB_GET_CONFIG:
2990 2945
2991 x.sisusb_id = SISUSB_ID; 2946 x.sisusb_id = SISUSB_ID;
2992 x.sisusb_version = SISUSB_VERSION; 2947 x.sisusb_version = SISUSB_VERSION;
2993 x.sisusb_revision = SISUSB_REVISION; 2948 x.sisusb_revision = SISUSB_REVISION;
2994 x.sisusb_patchlevel = SISUSB_PATCHLEVEL; 2949 x.sisusb_patchlevel = SISUSB_PATCHLEVEL;
2995 x.sisusb_gfxinit = sisusb->gfxinit; 2950 x.sisusb_gfxinit = sisusb->gfxinit;
2996 x.sisusb_vrambase = SISUSB_PCI_PSEUDO_MEMBASE; 2951 x.sisusb_vrambase = SISUSB_PCI_PSEUDO_MEMBASE;
2997 x.sisusb_mmiobase = SISUSB_PCI_PSEUDO_MMIOBASE; 2952 x.sisusb_mmiobase = SISUSB_PCI_PSEUDO_MMIOBASE;
2998 x.sisusb_iobase = SISUSB_PCI_PSEUDO_IOPORTBASE; 2953 x.sisusb_iobase = SISUSB_PCI_PSEUDO_IOPORTBASE;
2999 x.sisusb_pcibase = SISUSB_PCI_PSEUDO_PCIBASE; 2954 x.sisusb_pcibase = SISUSB_PCI_PSEUDO_PCIBASE;
3000 x.sisusb_vramsize = sisusb->vramsize; 2955 x.sisusb_vramsize = sisusb->vramsize;
3001 x.sisusb_minor = sisusb->minor; 2956 x.sisusb_minor = sisusb->minor;
3002 x.sisusb_fbdevactive= 0; 2957 x.sisusb_fbdevactive = 0;
3003#ifdef INCL_SISUSB_CON 2958#ifdef INCL_SISUSB_CON
3004 x.sisusb_conactive = sisusb->haveconsole ? 1 : 0; 2959 x.sisusb_conactive = sisusb->haveconsole ? 1 : 0;
3005#else 2960#else
3006 x.sisusb_conactive = 0; 2961 x.sisusb_conactive = 0;
3007#endif 2962#endif
3008 memset(x.sisusb_reserved, 0, sizeof(x.sisusb_reserved)); 2963 memset(x.sisusb_reserved, 0, sizeof(x.sisusb_reserved));
3009 2964
3010 if (copy_to_user((void __user *)arg, &x, sizeof(x))) 2965 if (copy_to_user((void __user *)arg, &x, sizeof(x)))
3011 retval = -EFAULT; 2966 retval = -EFAULT;
3012 2967
3013 break; 2968 break;
3014 2969
3015 case SISUSB_COMMAND: 2970 case SISUSB_COMMAND:
3016 2971
3017 if (copy_from_user(&y, (void __user *)arg, sizeof(y))) 2972 if (copy_from_user(&y, (void __user *)arg, sizeof(y)))
3018 retval = -EFAULT; 2973 retval = -EFAULT;
3019 else 2974 else
3020 retval = sisusb_handle_command(sisusb, &y, arg); 2975 retval = sisusb_handle_command(sisusb, &y, arg);
3021 2976
3022 break; 2977 break;
3023 2978
3024 default: 2979 default:
3025 retval = -ENOTTY; 2980 retval = -ENOTTY;
3026 break; 2981 break;
3027 } 2982 }
3028 2983
3029err_out: 2984err_out:
@@ -3032,20 +2987,20 @@ err_out:
3032} 2987}
3033 2988
3034#ifdef SISUSB_NEW_CONFIG_COMPAT 2989#ifdef SISUSB_NEW_CONFIG_COMPAT
3035static long 2990static long sisusb_compat_ioctl(struct file *f, unsigned int cmd,
3036sisusb_compat_ioctl(struct file *f, unsigned int cmd, unsigned long arg) 2991 unsigned long arg)
3037{ 2992{
3038 long retval; 2993 long retval;
3039 2994
3040 switch (cmd) { 2995 switch (cmd) {
3041 case SISUSB_GET_CONFIG_SIZE: 2996 case SISUSB_GET_CONFIG_SIZE:
3042 case SISUSB_GET_CONFIG: 2997 case SISUSB_GET_CONFIG:
3043 case SISUSB_COMMAND: 2998 case SISUSB_COMMAND:
3044 retval = sisusb_ioctl(f, cmd, arg); 2999 retval = sisusb_ioctl(f, cmd, arg);
3045 return retval; 3000 return retval;
3046 3001
3047 default: 3002 default:
3048 return -ENOIOCTLCMD; 3003 return -ENOIOCTLCMD;
3049 } 3004 }
3050} 3005}
3051#endif 3006#endif
@@ -3070,21 +3025,20 @@ static struct usb_class_driver usb_sisusb_class = {
3070}; 3025};
3071 3026
3072static int sisusb_probe(struct usb_interface *intf, 3027static int sisusb_probe(struct usb_interface *intf,
3073 const struct usb_device_id *id) 3028 const struct usb_device_id *id)
3074{ 3029{
3075 struct usb_device *dev = interface_to_usbdev(intf); 3030 struct usb_device *dev = interface_to_usbdev(intf);
3076 struct sisusb_usb_data *sisusb; 3031 struct sisusb_usb_data *sisusb;
3077 int retval = 0, i; 3032 int retval = 0, i;
3078 3033
3079 dev_info(&dev->dev, "USB2VGA dongle found at address %d\n", 3034 dev_info(&dev->dev, "USB2VGA dongle found at address %d\n",
3080 dev->devnum); 3035 dev->devnum);
3081 3036
3082 /* Allocate memory for our private */ 3037 /* Allocate memory for our private */
3083 sisusb = kzalloc(sizeof(*sisusb), GFP_KERNEL); 3038 sisusb = kzalloc(sizeof(*sisusb), GFP_KERNEL);
3084 if (!sisusb) { 3039 if (!sisusb)
3085 dev_err(&dev->dev, "Failed to allocate memory for private data\n");
3086 return -ENOMEM; 3040 return -ENOMEM;
3087 } 3041
3088 kref_init(&sisusb->kref); 3042 kref_init(&sisusb->kref);
3089 3043
3090 mutex_init(&(sisusb->lock)); 3044 mutex_init(&(sisusb->lock));
@@ -3092,8 +3046,9 @@ static int sisusb_probe(struct usb_interface *intf,
3092 /* Register device */ 3046 /* Register device */
3093 retval = usb_register_dev(intf, &usb_sisusb_class); 3047 retval = usb_register_dev(intf, &usb_sisusb_class);
3094 if (retval) { 3048 if (retval) {
3095 dev_err(&sisusb->sisusb_dev->dev, "Failed to get a minor for device %d\n", 3049 dev_err(&sisusb->sisusb_dev->dev,
3096 dev->devnum); 3050 "Failed to get a minor for device %d\n",
3051 dev->devnum);
3097 retval = -ENODEV; 3052 retval = -ENODEV;
3098 goto error_1; 3053 goto error_1;
3099 } 3054 }
@@ -3108,8 +3063,8 @@ static int sisusb_probe(struct usb_interface *intf,
3108 3063
3109 /* Allocate buffers */ 3064 /* Allocate buffers */
3110 sisusb->ibufsize = SISUSB_IBUF_SIZE; 3065 sisusb->ibufsize = SISUSB_IBUF_SIZE;
3111 if (!(sisusb->ibuf = kmalloc(SISUSB_IBUF_SIZE, GFP_KERNEL))) { 3066 sisusb->ibuf = kmalloc(SISUSB_IBUF_SIZE, GFP_KERNEL);
3112 dev_err(&sisusb->sisusb_dev->dev, "Failed to allocate memory for input buffer"); 3067 if (!sisusb->ibuf) {
3113 retval = -ENOMEM; 3068 retval = -ENOMEM;
3114 goto error_2; 3069 goto error_2;
3115 } 3070 }
@@ -3117,20 +3072,20 @@ static int sisusb_probe(struct usb_interface *intf,
3117 sisusb->numobufs = 0; 3072 sisusb->numobufs = 0;
3118 sisusb->obufsize = SISUSB_OBUF_SIZE; 3073 sisusb->obufsize = SISUSB_OBUF_SIZE;
3119 for (i = 0; i < NUMOBUFS; i++) { 3074 for (i = 0; i < NUMOBUFS; i++) {
3120 if (!(sisusb->obuf[i] = kmalloc(SISUSB_OBUF_SIZE, GFP_KERNEL))) { 3075 sisusb->obuf[i] = kmalloc(SISUSB_OBUF_SIZE, GFP_KERNEL);
3076 if (!sisusb->obuf[i]) {
3121 if (i == 0) { 3077 if (i == 0) {
3122 dev_err(&sisusb->sisusb_dev->dev, "Failed to allocate memory for output buffer\n");
3123 retval = -ENOMEM; 3078 retval = -ENOMEM;
3124 goto error_3; 3079 goto error_3;
3125 } 3080 }
3126 break; 3081 break;
3127 } else 3082 }
3128 sisusb->numobufs++; 3083 sisusb->numobufs++;
3129
3130 } 3084 }
3131 3085
3132 /* Allocate URBs */ 3086 /* Allocate URBs */
3133 if (!(sisusb->sisurbin = usb_alloc_urb(0, GFP_KERNEL))) { 3087 sisusb->sisurbin = usb_alloc_urb(0, GFP_KERNEL);
3088 if (!sisusb->sisurbin) {
3134 dev_err(&sisusb->sisusb_dev->dev, "Failed to allocate URBs\n"); 3089 dev_err(&sisusb->sisusb_dev->dev, "Failed to allocate URBs\n");
3135 retval = -ENOMEM; 3090 retval = -ENOMEM;
3136 goto error_3; 3091 goto error_3;
@@ -3138,8 +3093,10 @@ static int sisusb_probe(struct usb_interface *intf,
3138 sisusb->completein = 1; 3093 sisusb->completein = 1;
3139 3094
3140 for (i = 0; i < sisusb->numobufs; i++) { 3095 for (i = 0; i < sisusb->numobufs; i++) {
3141 if (!(sisusb->sisurbout[i] = usb_alloc_urb(0, GFP_KERNEL))) { 3096 sisusb->sisurbout[i] = usb_alloc_urb(0, GFP_KERNEL);
3142 dev_err(&sisusb->sisusb_dev->dev, "Failed to allocate URBs\n"); 3097 if (!sisusb->sisurbout[i]) {
3098 dev_err(&sisusb->sisusb_dev->dev,
3099 "Failed to allocate URBs\n");
3143 retval = -ENOMEM; 3100 retval = -ENOMEM;
3144 goto error_4; 3101 goto error_4;
3145 } 3102 }
@@ -3148,12 +3105,15 @@ static int sisusb_probe(struct usb_interface *intf,
3148 sisusb->urbstatus[i] = 0; 3105 sisusb->urbstatus[i] = 0;
3149 } 3106 }
3150 3107
3151 dev_info(&sisusb->sisusb_dev->dev, "Allocated %d output buffers\n", sisusb->numobufs); 3108 dev_info(&sisusb->sisusb_dev->dev, "Allocated %d output buffers\n",
3109 sisusb->numobufs);
3152 3110
3153#ifdef INCL_SISUSB_CON 3111#ifdef INCL_SISUSB_CON
3154 /* Allocate our SiS_Pr */ 3112 /* Allocate our SiS_Pr */
3155 if (!(sisusb->SiS_Pr = kmalloc(sizeof(struct SiS_Private), GFP_KERNEL))) { 3113 sisusb->SiS_Pr = kmalloc(sizeof(struct SiS_Private), GFP_KERNEL);
3156 dev_err(&sisusb->sisusb_dev->dev, "Failed to allocate SiS_Pr\n"); 3114 if (!sisusb->SiS_Pr) {
3115 retval = -ENOMEM;
3116 goto error_4;
3157 } 3117 }
3158#endif 3118#endif
3159 3119
@@ -3170,17 +3130,18 @@ static int sisusb_probe(struct usb_interface *intf,
3170 if (dev->speed == USB_SPEED_HIGH || dev->speed == USB_SPEED_SUPER) { 3130 if (dev->speed == USB_SPEED_HIGH || dev->speed == USB_SPEED_SUPER) {
3171 int initscreen = 1; 3131 int initscreen = 1;
3172#ifdef INCL_SISUSB_CON 3132#ifdef INCL_SISUSB_CON
3173 if (sisusb_first_vc > 0 && 3133 if (sisusb_first_vc > 0 && sisusb_last_vc > 0 &&
3174 sisusb_last_vc > 0 && 3134 sisusb_first_vc <= sisusb_last_vc &&
3175 sisusb_first_vc <= sisusb_last_vc && 3135 sisusb_last_vc <= MAX_NR_CONSOLES)
3176 sisusb_last_vc <= MAX_NR_CONSOLES)
3177 initscreen = 0; 3136 initscreen = 0;
3178#endif 3137#endif
3179 if (sisusb_init_gfxdevice(sisusb, initscreen)) 3138 if (sisusb_init_gfxdevice(sisusb, initscreen))
3180 dev_err(&sisusb->sisusb_dev->dev, "Failed to early initialize device\n"); 3139 dev_err(&sisusb->sisusb_dev->dev,
3140 "Failed to early initialize device\n");
3181 3141
3182 } else 3142 } else
3183 dev_info(&sisusb->sisusb_dev->dev, "Not attached to USB 2.0 hub, deferring init\n"); 3143 dev_info(&sisusb->sisusb_dev->dev,
3144 "Not attached to USB 2.0 hub, deferring init\n");
3184 3145
3185 sisusb->ready = 1; 3146 sisusb->ready = 1;
3186 3147
@@ -3254,7 +3215,7 @@ static const struct usb_device_id sisusb_table[] = {
3254 { } 3215 { }
3255}; 3216};
3256 3217
3257MODULE_DEVICE_TABLE (usb, sisusb_table); 3218MODULE_DEVICE_TABLE(usb, sisusb_table);
3258 3219
3259static struct usb_driver sisusb_driver = { 3220static struct usb_driver sisusb_driver = {
3260 .name = "sisusb", 3221 .name = "sisusb",
diff --git a/drivers/usb/mon/mon_main.c b/drivers/usb/mon/mon_main.c
index fec3f1128fdc..33ff49c4cea4 100644
--- a/drivers/usb/mon/mon_main.c
+++ b/drivers/usb/mon/mon_main.c
@@ -349,7 +349,7 @@ struct mon_bus *mon_bus_lookup(unsigned int num)
349static int __init mon_init(void) 349static int __init mon_init(void)
350{ 350{
351 struct usb_bus *ubus; 351 struct usb_bus *ubus;
352 int rc; 352 int rc, id;
353 353
354 if ((rc = mon_text_init()) != 0) 354 if ((rc = mon_text_init()) != 0)
355 goto err_text; 355 goto err_text;
@@ -365,12 +365,11 @@ static int __init mon_init(void)
365 } 365 }
366 // MOD_INC_USE_COUNT(which_module?); 366 // MOD_INC_USE_COUNT(which_module?);
367 367
368 mutex_lock(&usb_bus_list_lock); 368 mutex_lock(&usb_bus_idr_lock);
369 list_for_each_entry (ubus, &usb_bus_list, bus_list) { 369 idr_for_each_entry(&usb_bus_idr, ubus, id)
370 mon_bus_init(ubus); 370 mon_bus_init(ubus);
371 }
372 usb_register_notify(&mon_nb); 371 usb_register_notify(&mon_nb);
373 mutex_unlock(&usb_bus_list_lock); 372 mutex_unlock(&usb_bus_idr_lock);
374 return 0; 373 return 0;
375 374
376err_reg: 375err_reg:
diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
index 45c83baf675d..886526b5fcdd 100644
--- a/drivers/usb/musb/Kconfig
+++ b/drivers/usb/musb/Kconfig
@@ -7,6 +7,7 @@
7config USB_MUSB_HDRC 7config USB_MUSB_HDRC
8 tristate 'Inventra Highspeed Dual Role Controller (TI, ADI, AW, ...)' 8 tristate 'Inventra Highspeed Dual Role Controller (TI, ADI, AW, ...)'
9 depends on (USB || USB_GADGET) 9 depends on (USB || USB_GADGET)
10 depends on HAS_IOMEM
10 help 11 help
11 Say Y here if your system has a dual role high speed USB 12 Say Y here if your system has a dual role high speed USB
12 controller based on the Mentor Graphics silicon IP. Then 13 controller based on the Mentor Graphics silicon IP. Then
@@ -85,6 +86,7 @@ config USB_MUSB_DA8XX
85 86
86config USB_MUSB_TUSB6010 87config USB_MUSB_TUSB6010
87 tristate "TUSB6010" 88 tristate "TUSB6010"
89 depends on HAS_IOMEM
88 depends on ARCH_OMAP2PLUS || COMPILE_TEST 90 depends on ARCH_OMAP2PLUS || COMPILE_TEST
89 depends on NOP_USB_XCEIV = USB_MUSB_HDRC # both built-in or both modules 91 depends on NOP_USB_XCEIV = USB_MUSB_HDRC # both built-in or both modules
90 92
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index c3791a01ab31..39fd95833eb8 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -1901,7 +1901,7 @@ static void musb_recover_from_babble(struct musb *musb)
1901 */ 1901 */
1902 1902
1903static struct musb *allocate_instance(struct device *dev, 1903static struct musb *allocate_instance(struct device *dev,
1904 struct musb_hdrc_config *config, void __iomem *mbase) 1904 const struct musb_hdrc_config *config, void __iomem *mbase)
1905{ 1905{
1906 struct musb *musb; 1906 struct musb *musb;
1907 struct musb_hw_ep *ep; 1907 struct musb_hw_ep *ep;
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index fd215fb45fd4..b6afe9e43305 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -438,7 +438,7 @@ struct musb {
438 */ 438 */
439 unsigned double_buffer_not_ok:1; 439 unsigned double_buffer_not_ok:1;
440 440
441 struct musb_hdrc_config *config; 441 const struct musb_hdrc_config *config;
442 442
443 int xceiv_old_state; 443 int xceiv_old_state;
444#ifdef CONFIG_DEBUG_FS 444#ifdef CONFIG_DEBUG_FS
diff --git a/drivers/usb/musb/musbhsdma.c b/drivers/usb/musb/musbhsdma.c
index 7539c3188ffc..8abfe4ec62fb 100644
--- a/drivers/usb/musb/musbhsdma.c
+++ b/drivers/usb/musb/musbhsdma.c
@@ -117,8 +117,8 @@ static void configure_channel(struct dma_channel *channel,
117 u8 bchannel = musb_channel->idx; 117 u8 bchannel = musb_channel->idx;
118 u16 csr = 0; 118 u16 csr = 0;
119 119
120 dev_dbg(musb->controller, "%p, pkt_sz %d, addr 0x%x, len %d, mode %d\n", 120 dev_dbg(musb->controller, "%p, pkt_sz %d, addr %pad, len %d, mode %d\n",
121 channel, packet_sz, dma_addr, len, mode); 121 channel, packet_sz, &dma_addr, len, mode);
122 122
123 if (mode) { 123 if (mode) {
124 csr |= 1 << MUSB_HSDMA_MODE1_SHIFT; 124 csr |= 1 << MUSB_HSDMA_MODE1_SHIFT;
@@ -152,10 +152,10 @@ static int dma_channel_program(struct dma_channel *channel,
152 struct musb_dma_controller *controller = musb_channel->controller; 152 struct musb_dma_controller *controller = musb_channel->controller;
153 struct musb *musb = controller->private_data; 153 struct musb *musb = controller->private_data;
154 154
155 dev_dbg(musb->controller, "ep%d-%s pkt_sz %d, dma_addr 0x%x length %d, mode %d\n", 155 dev_dbg(musb->controller, "ep%d-%s pkt_sz %d, dma_addr %pad length %d, mode %d\n",
156 musb_channel->epnum, 156 musb_channel->epnum,
157 musb_channel->transmit ? "Tx" : "Rx", 157 musb_channel->transmit ? "Tx" : "Rx",
158 packet_sz, dma_addr, len, mode); 158 packet_sz, &dma_addr, len, mode);
159 159
160 BUG_ON(channel->status == MUSB_DMA_STATUS_UNKNOWN || 160 BUG_ON(channel->status == MUSB_DMA_STATUS_UNKNOWN ||
161 channel->status == MUSB_DMA_STATUS_BUSY); 161 channel->status == MUSB_DMA_STATUS_BUSY);
diff --git a/drivers/usb/musb/tusb6010_omap.c b/drivers/usb/musb/tusb6010_omap.c
index 4c82077da475..e6959ccb4453 100644
--- a/drivers/usb/musb/tusb6010_omap.c
+++ b/drivers/usb/musb/tusb6010_omap.c
@@ -310,9 +310,9 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
310 310
311 dma_params.frame_count = chdat->transfer_len / 32; /* Burst sz frame */ 311 dma_params.frame_count = chdat->transfer_len / 32; /* Burst sz frame */
312 312
313 dev_dbg(musb->controller, "ep%i %s dma ch%i dma: %08x len: %u(%u) packet_sz: %i(%i)\n", 313 dev_dbg(musb->controller, "ep%i %s dma ch%i dma: %pad len: %u(%u) packet_sz: %i(%i)\n",
314 chdat->epnum, chdat->tx ? "tx" : "rx", 314 chdat->epnum, chdat->tx ? "tx" : "rx",
315 ch, dma_addr, chdat->transfer_len, len, 315 ch, &dma_addr, chdat->transfer_len, len,
316 chdat->transfer_packet_sz, packet_sz); 316 chdat->transfer_packet_sz, packet_sz);
317 317
318 /* 318 /*
diff --git a/drivers/usb/musb/ux500_dma.c b/drivers/usb/musb/ux500_dma.c
index d0b6a1cd7f62..c92a295049ad 100644
--- a/drivers/usb/musb/ux500_dma.c
+++ b/drivers/usb/musb/ux500_dma.c
@@ -207,9 +207,6 @@ static int ux500_dma_channel_program(struct dma_channel *channel,
207 BUG_ON(channel->status == MUSB_DMA_STATUS_UNKNOWN || 207 BUG_ON(channel->status == MUSB_DMA_STATUS_UNKNOWN ||
208 channel->status == MUSB_DMA_STATUS_BUSY); 208 channel->status == MUSB_DMA_STATUS_BUSY);
209 209
210 if (!ux500_dma_is_compatible(channel, packet_sz, (void *)dma_addr, len))
211 return false;
212
213 channel->status = MUSB_DMA_STATUS_BUSY; 210 channel->status = MUSB_DMA_STATUS_BUSY;
214 channel->actual_len = 0; 211 channel->actual_len = 0;
215 ret = ux500_configure_channel(channel, packet_sz, mode, dma_addr, len); 212 ret = ux500_configure_channel(channel, packet_sz, mode, dma_addr, len);
diff --git a/drivers/usb/phy/phy-am335x.c b/drivers/usb/phy/phy-am335x.c
index 39b424f7f629..a262a4343f29 100644
--- a/drivers/usb/phy/phy-am335x.c
+++ b/drivers/usb/phy/phy-am335x.c
@@ -5,7 +5,6 @@
5#include <linux/usb/usb_phy_generic.h> 5#include <linux/usb/usb_phy_generic.h>
6#include <linux/slab.h> 6#include <linux/slab.h>
7#include <linux/clk.h> 7#include <linux/clk.h>
8#include <linux/regulator/consumer.h>
9#include <linux/of.h> 8#include <linux/of.h>
10#include <linux/of_address.h> 9#include <linux/of_address.h>
11#include <linux/usb/of.h> 10#include <linux/usb/of.h>
diff --git a/drivers/usb/phy/phy-generic.c b/drivers/usb/phy/phy-generic.c
index 5320cb8642cb..980c9dee09eb 100644
--- a/drivers/usb/phy/phy-generic.c
+++ b/drivers/usb/phy/phy-generic.c
@@ -118,7 +118,8 @@ static irqreturn_t nop_gpio_vbus_thread(int irq, void *data)
118 status = USB_EVENT_VBUS; 118 status = USB_EVENT_VBUS;
119 otg->state = OTG_STATE_B_PERIPHERAL; 119 otg->state = OTG_STATE_B_PERIPHERAL;
120 nop->phy.last_event = status; 120 nop->phy.last_event = status;
121 usb_gadget_vbus_connect(otg->gadget); 121 if (otg->gadget)
122 usb_gadget_vbus_connect(otg->gadget);
122 123
123 /* drawing a "unit load" is *always* OK, except for OTG */ 124 /* drawing a "unit load" is *always* OK, except for OTG */
124 nop_set_vbus_draw(nop, 100); 125 nop_set_vbus_draw(nop, 100);
@@ -128,7 +129,8 @@ static irqreturn_t nop_gpio_vbus_thread(int irq, void *data)
128 } else { 129 } else {
129 nop_set_vbus_draw(nop, 0); 130 nop_set_vbus_draw(nop, 0);
130 131
131 usb_gadget_vbus_disconnect(otg->gadget); 132 if (otg->gadget)
133 usb_gadget_vbus_disconnect(otg->gadget);
132 status = USB_EVENT_NONE; 134 status = USB_EVENT_NONE;
133 otg->state = OTG_STATE_B_IDLE; 135 otg->state = OTG_STATE_B_IDLE;
134 nop->phy.last_event = status; 136 nop->phy.last_event = status;
@@ -184,7 +186,10 @@ static int nop_set_peripheral(struct usb_otg *otg, struct usb_gadget *gadget)
184 } 186 }
185 187
186 otg->gadget = gadget; 188 otg->gadget = gadget;
187 otg->state = OTG_STATE_B_IDLE; 189 if (otg->state == OTG_STATE_B_PERIPHERAL)
190 usb_gadget_vbus_connect(gadget);
191 else
192 otg->state = OTG_STATE_B_IDLE;
188 return 0; 193 return 0;
189} 194}
190 195
diff --git a/drivers/usb/phy/phy-isp1301-omap.c b/drivers/usb/phy/phy-isp1301-omap.c
index 3af263cc0caa..8d111ec653e4 100644
--- a/drivers/usb/phy/phy-isp1301-omap.c
+++ b/drivers/usb/phy/phy-isp1301-omap.c
@@ -258,7 +258,7 @@ static void power_down(struct isp1301 *isp)
258 isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0); 258 isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0);
259} 259}
260 260
261static void power_up(struct isp1301 *isp) 261static void __maybe_unused power_up(struct isp1301 *isp)
262{ 262{
263 // isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN); 263 // isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN);
264 isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND); 264 isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND);
diff --git a/drivers/usb/renesas_usbhs/Kconfig b/drivers/usb/renesas_usbhs/Kconfig
index ebc99ee076ce..b26d7c339c05 100644
--- a/drivers/usb/renesas_usbhs/Kconfig
+++ b/drivers/usb/renesas_usbhs/Kconfig
@@ -5,7 +5,7 @@
5config USB_RENESAS_USBHS 5config USB_RENESAS_USBHS
6 tristate 'Renesas USBHS controller' 6 tristate 'Renesas USBHS controller'
7 depends on USB_GADGET 7 depends on USB_GADGET
8 depends on ARCH_SHMOBILE || SUPERH || COMPILE_TEST 8 depends on ARCH_RENESAS || SUPERH || COMPILE_TEST
9 depends on EXTCON || !EXTCON # if EXTCON=m, USBHS cannot be built-in 9 depends on EXTCON || !EXTCON # if EXTCON=m, USBHS cannot be built-in
10 default n 10 default n
11 help 11 help
diff --git a/drivers/usb/renesas_usbhs/Makefile b/drivers/usb/renesas_usbhs/Makefile
index 9e47f477b6d2..d787d05f6546 100644
--- a/drivers/usb/renesas_usbhs/Makefile
+++ b/drivers/usb/renesas_usbhs/Makefile
@@ -4,7 +4,7 @@
4 4
5obj-$(CONFIG_USB_RENESAS_USBHS) += renesas_usbhs.o 5obj-$(CONFIG_USB_RENESAS_USBHS) += renesas_usbhs.o
6 6
7renesas_usbhs-y := common.o mod.o pipe.o fifo.o rcar2.o 7renesas_usbhs-y := common.o mod.o pipe.o fifo.o rcar2.o rcar3.o
8 8
9ifneq ($(CONFIG_USB_RENESAS_USBHS_HCD),) 9ifneq ($(CONFIG_USB_RENESAS_USBHS_HCD),)
10 renesas_usbhs-y += mod_host.o 10 renesas_usbhs-y += mod_host.o
diff --git a/drivers/usb/renesas_usbhs/common.c b/drivers/usb/renesas_usbhs/common.c
index 5af9ca5d54ab..baeb7d23bf24 100644
--- a/drivers/usb/renesas_usbhs/common.c
+++ b/drivers/usb/renesas_usbhs/common.c
@@ -25,6 +25,7 @@
25#include <linux/sysfs.h> 25#include <linux/sysfs.h>
26#include "common.h" 26#include "common.h"
27#include "rcar2.h" 27#include "rcar2.h"
28#include "rcar3.h"
28 29
29/* 30/*
30 * image of renesas_usbhs 31 * image of renesas_usbhs
@@ -477,18 +478,16 @@ static const struct of_device_id usbhs_of_match[] = {
477 .data = (void *)USBHS_TYPE_RCAR_GEN2, 478 .data = (void *)USBHS_TYPE_RCAR_GEN2,
478 }, 479 },
479 { 480 {
480 /* Gen3 is compatible with Gen2 */
481 .compatible = "renesas,usbhs-r8a7795", 481 .compatible = "renesas,usbhs-r8a7795",
482 .data = (void *)USBHS_TYPE_RCAR_GEN2, 482 .data = (void *)USBHS_TYPE_RCAR_GEN3,
483 }, 483 },
484 { 484 {
485 .compatible = "renesas,rcar-gen2-usbhs", 485 .compatible = "renesas,rcar-gen2-usbhs",
486 .data = (void *)USBHS_TYPE_RCAR_GEN2, 486 .data = (void *)USBHS_TYPE_RCAR_GEN2,
487 }, 487 },
488 { 488 {
489 /* Gen3 is compatible with Gen2 */
490 .compatible = "renesas,rcar-gen3-usbhs", 489 .compatible = "renesas,rcar-gen3-usbhs",
491 .data = (void *)USBHS_TYPE_RCAR_GEN2, 490 .data = (void *)USBHS_TYPE_RCAR_GEN3,
492 }, 491 },
493 { }, 492 { },
494}; 493};
@@ -578,6 +577,13 @@ static int usbhs_probe(struct platform_device *pdev)
578 priv->dparam.pipe_size = ARRAY_SIZE(usbhsc_new_pipe); 577 priv->dparam.pipe_size = ARRAY_SIZE(usbhsc_new_pipe);
579 } 578 }
580 break; 579 break;
580 case USBHS_TYPE_RCAR_GEN3:
581 priv->pfunc = usbhs_rcar3_ops;
582 if (!priv->dparam.pipe_configs) {
583 priv->dparam.pipe_configs = usbhsc_new_pipe;
584 priv->dparam.pipe_size = ARRAY_SIZE(usbhsc_new_pipe);
585 }
586 break;
581 default: 587 default:
582 if (!info->platform_callback.get_id) { 588 if (!info->platform_callback.get_id) {
583 dev_err(&pdev->dev, "no platform callbacks"); 589 dev_err(&pdev->dev, "no platform callbacks");
diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c
index c0f5c652d272..b4de70ee16d3 100644
--- a/drivers/usb/renesas_usbhs/fifo.c
+++ b/drivers/usb/renesas_usbhs/fifo.c
@@ -46,7 +46,7 @@ static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done)
46 return -EINVAL; 46 return -EINVAL;
47} 47}
48 48
49static struct usbhs_pkt_handle usbhsf_null_handler = { 49static const struct usbhs_pkt_handle usbhsf_null_handler = {
50 .prepare = usbhsf_null_handle, 50 .prepare = usbhsf_null_handle,
51 .try_run = usbhsf_null_handle, 51 .try_run = usbhsf_null_handle,
52}; 52};
@@ -422,12 +422,12 @@ static int usbhs_dcp_dir_switch_done(struct usbhs_pkt *pkt, int *is_done)
422 return 0; 422 return 0;
423} 423}
424 424
425struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler = { 425const struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler = {
426 .prepare = usbhs_dcp_dir_switch_to_write, 426 .prepare = usbhs_dcp_dir_switch_to_write,
427 .try_run = usbhs_dcp_dir_switch_done, 427 .try_run = usbhs_dcp_dir_switch_done,
428}; 428};
429 429
430struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler = { 430const struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler = {
431 .prepare = usbhs_dcp_dir_switch_to_read, 431 .prepare = usbhs_dcp_dir_switch_to_read,
432 .try_run = usbhs_dcp_dir_switch_done, 432 .try_run = usbhs_dcp_dir_switch_done,
433}; 433};
@@ -449,7 +449,7 @@ static int usbhsf_dcp_data_stage_try_push(struct usbhs_pkt *pkt, int *is_done)
449 return pkt->handler->prepare(pkt, is_done); 449 return pkt->handler->prepare(pkt, is_done);
450} 450}
451 451
452struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler = { 452const struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler = {
453 .prepare = usbhsf_dcp_data_stage_try_push, 453 .prepare = usbhsf_dcp_data_stage_try_push,
454}; 454};
455 455
@@ -488,7 +488,7 @@ static int usbhsf_dcp_data_stage_prepare_pop(struct usbhs_pkt *pkt,
488 return pkt->handler->prepare(pkt, is_done); 488 return pkt->handler->prepare(pkt, is_done);
489} 489}
490 490
491struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler = { 491const struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler = {
492 .prepare = usbhsf_dcp_data_stage_prepare_pop, 492 .prepare = usbhsf_dcp_data_stage_prepare_pop,
493}; 493};
494 494
@@ -600,7 +600,7 @@ static int usbhsf_pio_prepare_push(struct usbhs_pkt *pkt, int *is_done)
600 return usbhsf_pio_try_push(pkt, is_done); 600 return usbhsf_pio_try_push(pkt, is_done);
601} 601}
602 602
603struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = { 603const struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = {
604 .prepare = usbhsf_pio_prepare_push, 604 .prepare = usbhsf_pio_prepare_push,
605 .try_run = usbhsf_pio_try_push, 605 .try_run = usbhsf_pio_try_push,
606}; 606};
@@ -730,7 +730,7 @@ usbhs_fifo_read_busy:
730 return ret; 730 return ret;
731} 731}
732 732
733struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = { 733const struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = {
734 .prepare = usbhsf_prepare_pop, 734 .prepare = usbhsf_prepare_pop,
735 .try_run = usbhsf_pio_try_pop, 735 .try_run = usbhsf_pio_try_pop,
736}; 736};
@@ -747,7 +747,7 @@ static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done)
747 return 0; 747 return 0;
748} 748}
749 749
750struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = { 750const struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = {
751 .prepare = usbhsf_ctrl_stage_end, 751 .prepare = usbhsf_ctrl_stage_end,
752 .try_run = usbhsf_ctrl_stage_end, 752 .try_run = usbhsf_ctrl_stage_end,
753}; 753};
@@ -934,7 +934,7 @@ static int usbhsf_dma_push_done(struct usbhs_pkt *pkt, int *is_done)
934 return 0; 934 return 0;
935} 935}
936 936
937struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = { 937const struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = {
938 .prepare = usbhsf_dma_prepare_push, 938 .prepare = usbhsf_dma_prepare_push,
939 .dma_done = usbhsf_dma_push_done, 939 .dma_done = usbhsf_dma_push_done,
940}; 940};
@@ -1182,7 +1182,7 @@ static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done)
1182 return usbhsf_dma_pop_done_with_rx_irq(pkt, is_done); 1182 return usbhsf_dma_pop_done_with_rx_irq(pkt, is_done);
1183} 1183}
1184 1184
1185struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = { 1185const struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = {
1186 .prepare = usbhsf_dma_prepare_pop, 1186 .prepare = usbhsf_dma_prepare_pop,
1187 .try_run = usbhsf_dma_try_pop, 1187 .try_run = usbhsf_dma_try_pop,
1188 .dma_done = usbhsf_dma_pop_done 1188 .dma_done = usbhsf_dma_pop_done
diff --git a/drivers/usb/renesas_usbhs/fifo.h b/drivers/usb/renesas_usbhs/fifo.h
index c7d9b86d51bf..8b98507d7abc 100644
--- a/drivers/usb/renesas_usbhs/fifo.h
+++ b/drivers/usb/renesas_usbhs/fifo.h
@@ -54,7 +54,7 @@ struct usbhs_pkt_handle;
54struct usbhs_pkt { 54struct usbhs_pkt {
55 struct list_head node; 55 struct list_head node;
56 struct usbhs_pipe *pipe; 56 struct usbhs_pipe *pipe;
57 struct usbhs_pkt_handle *handler; 57 const struct usbhs_pkt_handle *handler;
58 void (*done)(struct usbhs_priv *priv, 58 void (*done)(struct usbhs_priv *priv,
59 struct usbhs_pkt *pkt); 59 struct usbhs_pkt *pkt);
60 struct work_struct work; 60 struct work_struct work;
@@ -86,18 +86,18 @@ void usbhs_fifo_clear_dcp(struct usbhs_pipe *pipe);
86/* 86/*
87 * packet info 87 * packet info
88 */ 88 */
89extern struct usbhs_pkt_handle usbhs_fifo_pio_push_handler; 89extern const struct usbhs_pkt_handle usbhs_fifo_pio_push_handler;
90extern struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler; 90extern const struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler;
91extern struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler; 91extern const struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler;
92 92
93extern struct usbhs_pkt_handle usbhs_fifo_dma_push_handler; 93extern const struct usbhs_pkt_handle usbhs_fifo_dma_push_handler;
94extern struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler; 94extern const struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler;
95 95
96extern struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler; 96extern const struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler;
97extern struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler; 97extern const struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler;
98 98
99extern struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler; 99extern const struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler;
100extern struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler; 100extern const struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler;
101 101
102void usbhs_pkt_init(struct usbhs_pkt *pkt); 102void usbhs_pkt_init(struct usbhs_pkt *pkt);
103void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, 103void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,
diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c
index 657f9672ceba..664b263e4b20 100644
--- a/drivers/usb/renesas_usbhs/mod_gadget.c
+++ b/drivers/usb/renesas_usbhs/mod_gadget.c
@@ -561,7 +561,7 @@ static int usbhsg_pipe_disable(struct usbhsg_uep *uep)
561 if (!pkt) 561 if (!pkt)
562 break; 562 break;
563 563
564 usbhsg_queue_pop(uep, usbhsg_pkt_to_ureq(pkt), -ECONNRESET); 564 usbhsg_queue_pop(uep, usbhsg_pkt_to_ureq(pkt), -ESHUTDOWN);
565 } 565 }
566 566
567 usbhs_pipe_disable(pipe); 567 usbhs_pipe_disable(pipe);
diff --git a/drivers/usb/renesas_usbhs/pipe.c b/drivers/usb/renesas_usbhs/pipe.c
index 0e95d2925dc5..78e9dba701c4 100644
--- a/drivers/usb/renesas_usbhs/pipe.c
+++ b/drivers/usb/renesas_usbhs/pipe.c
@@ -241,7 +241,7 @@ static int usbhsp_pipe_barrier(struct usbhs_pipe *pipe)
241{ 241{
242 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 242 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
243 int timeout = 1024; 243 int timeout = 1024;
244 u16 val; 244 u16 mask = usbhs_mod_is_host(priv) ? (CSSTS | PID_MASK) : PID_MASK;
245 245
246 /* 246 /*
247 * make sure.... 247 * make sure....
@@ -265,9 +265,7 @@ static int usbhsp_pipe_barrier(struct usbhs_pipe *pipe)
265 usbhs_pipe_disable(pipe); 265 usbhs_pipe_disable(pipe);
266 266
267 do { 267 do {
268 val = usbhsp_pipectrl_get(pipe); 268 if (!(usbhsp_pipectrl_get(pipe) & mask))
269 val &= CSSTS | PID_MASK;
270 if (!val)
271 return 0; 269 return 0;
272 270
273 udelay(10); 271 udelay(10);
diff --git a/drivers/usb/renesas_usbhs/pipe.h b/drivers/usb/renesas_usbhs/pipe.h
index 3212ab51e844..7835747f9803 100644
--- a/drivers/usb/renesas_usbhs/pipe.h
+++ b/drivers/usb/renesas_usbhs/pipe.h
@@ -38,7 +38,7 @@ struct usbhs_pipe {
38#define USBHS_PIPE_FLAGS_IS_DIR_HOST (1 << 2) 38#define USBHS_PIPE_FLAGS_IS_DIR_HOST (1 << 2)
39#define USBHS_PIPE_FLAGS_IS_RUNNING (1 << 3) 39#define USBHS_PIPE_FLAGS_IS_RUNNING (1 << 3)
40 40
41 struct usbhs_pkt_handle *handler; 41 const struct usbhs_pkt_handle *handler;
42 42
43 void *mod_private; 43 void *mod_private;
44}; 44};
diff --git a/drivers/usb/renesas_usbhs/rcar3.c b/drivers/usb/renesas_usbhs/rcar3.c
new file mode 100644
index 000000000000..38b01f2aeeb0
--- /dev/null
+++ b/drivers/usb/renesas_usbhs/rcar3.c
@@ -0,0 +1,54 @@
1/*
2 * Renesas USB driver R-Car Gen. 3 initialization and power control
3 *
4 * Copyright (C) 2016 Renesas Electronics Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <linux/io.h>
13#include "common.h"
14#include "rcar3.h"
15
16#define LPSTS 0x102
17#define UGCTRL2 0x184 /* 32-bit register */
18
19/* Low Power Status register (LPSTS) */
20#define LPSTS_SUSPM 0x4000
21
22/* USB General control register 2 (UGCTRL2), bit[31:6] should be 0 */
23#define UGCTRL2_RESERVED_3 0x00000001 /* bit[3:0] should be B'0001 */
24#define UGCTRL2_USB0SEL_OTG 0x00000030
25
26void usbhs_write32(struct usbhs_priv *priv, u32 reg, u32 data)
27{
28 iowrite32(data, priv->base + reg);
29}
30
31static int usbhs_rcar3_power_ctrl(struct platform_device *pdev,
32 void __iomem *base, int enable)
33{
34 struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
35
36 usbhs_write32(priv, UGCTRL2, UGCTRL2_RESERVED_3 | UGCTRL2_USB0SEL_OTG);
37
38 if (enable)
39 usbhs_bset(priv, LPSTS, LPSTS_SUSPM, LPSTS_SUSPM);
40 else
41 usbhs_bset(priv, LPSTS, LPSTS_SUSPM, 0);
42
43 return 0;
44}
45
46static int usbhs_rcar3_get_id(struct platform_device *pdev)
47{
48 return USBHS_GADGET;
49}
50
51const struct renesas_usbhs_platform_callback usbhs_rcar3_ops = {
52 .power_ctrl = usbhs_rcar3_power_ctrl,
53 .get_id = usbhs_rcar3_get_id,
54};
diff --git a/drivers/usb/renesas_usbhs/rcar3.h b/drivers/usb/renesas_usbhs/rcar3.h
new file mode 100644
index 000000000000..5f850b23ff18
--- /dev/null
+++ b/drivers/usb/renesas_usbhs/rcar3.h
@@ -0,0 +1,3 @@
1#include "common.h"
2
3extern const struct renesas_usbhs_platform_callback usbhs_rcar3_ops;
diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c
index c73808f095bb..f139488d0816 100644
--- a/drivers/usb/serial/ch341.c
+++ b/drivers/usb/serial/ch341.c
@@ -370,7 +370,7 @@ static void ch341_set_termios(struct tty_struct *tty,
370static void ch341_break_ctl(struct tty_struct *tty, int break_state) 370static void ch341_break_ctl(struct tty_struct *tty, int break_state)
371{ 371{
372 const uint16_t ch341_break_reg = 372 const uint16_t ch341_break_reg =
373 CH341_REG_BREAK1 | ((uint16_t) CH341_REG_BREAK2 << 8); 373 ((uint16_t) CH341_REG_BREAK2 << 8) | CH341_REG_BREAK1;
374 struct usb_serial_port *port = tty->driver_data; 374 struct usb_serial_port *port = tty->driver_data;
375 int r; 375 int r;
376 uint16_t reg_contents; 376 uint16_t reg_contents;
diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c
index 73a366de5102..fbfe761c7fba 100644
--- a/drivers/usb/serial/cp210x.c
+++ b/drivers/usb/serial/cp210x.c
@@ -327,113 +327,169 @@ struct cp210x_comm_status {
327#define PURGE_ALL 0x000f 327#define PURGE_ALL 0x000f
328 328
329/* 329/*
330 * cp210x_get_config 330 * Reads a variable-sized block of CP210X_ registers, identified by req.
331 * Reads from the CP210x configuration registers 331 * Returns data into buf in native USB byte order.
332 * 'size' is specified in bytes.
333 * 'data' is a pointer to a pre-allocated array of integers large
334 * enough to hold 'size' bytes (with 4 bytes to each integer)
335 */ 332 */
336static int cp210x_get_config(struct usb_serial_port *port, u8 request, 333static int cp210x_read_reg_block(struct usb_serial_port *port, u8 req,
337 unsigned int *data, int size) 334 void *buf, int bufsize)
338{ 335{
339 struct usb_serial *serial = port->serial; 336 struct usb_serial *serial = port->serial;
340 struct cp210x_port_private *port_priv = usb_get_serial_port_data(port); 337 struct cp210x_port_private *port_priv = usb_get_serial_port_data(port);
341 __le32 *buf; 338 void *dmabuf;
342 int result, i, length; 339 int result;
343
344 /* Number of integers required to contain the array */
345 length = (((size - 1) | 3) + 1) / 4;
346 340
347 buf = kcalloc(length, sizeof(__le32), GFP_KERNEL); 341 dmabuf = kmalloc(bufsize, GFP_KERNEL);
348 if (!buf) 342 if (!dmabuf) {
343 /*
344 * FIXME Some callers don't bother to check for error,
345 * at least give them consistent junk until they are fixed
346 */
347 memset(buf, 0, bufsize);
349 return -ENOMEM; 348 return -ENOMEM;
349 }
350 350
351 /* Issue the request, attempting to read 'size' bytes */
352 result = usb_control_msg(serial->dev, usb_rcvctrlpipe(serial->dev, 0), 351 result = usb_control_msg(serial->dev, usb_rcvctrlpipe(serial->dev, 0),
353 request, REQTYPE_INTERFACE_TO_HOST, 0x0000, 352 req, REQTYPE_INTERFACE_TO_HOST, 0,
354 port_priv->bInterfaceNumber, buf, size, 353 port_priv->bInterfaceNumber, dmabuf, bufsize,
355 USB_CTRL_GET_TIMEOUT); 354 USB_CTRL_SET_TIMEOUT);
355 if (result == bufsize) {
356 memcpy(buf, dmabuf, bufsize);
357 result = 0;
358 } else {
359 dev_err(&port->dev, "failed get req 0x%x size %d status: %d\n",
360 req, bufsize, result);
361 if (result >= 0)
362 result = -EPROTO;
356 363
357 /* Convert data into an array of integers */ 364 /*
358 for (i = 0; i < length; i++) 365 * FIXME Some callers don't bother to check for error,
359 data[i] = le32_to_cpu(buf[i]); 366 * at least give them consistent junk until they are fixed
367 */
368 memset(buf, 0, bufsize);
369 }
360 370
361 kfree(buf); 371 kfree(dmabuf);
362 372
363 if (result != size) { 373 return result;
364 dev_dbg(&port->dev, "%s - Unable to send config request, request=0x%x size=%d result=%d\n", 374}
365 __func__, request, size, result);
366 if (result > 0)
367 result = -EPROTO;
368 375
369 return result; 376/*
377 * Reads any 32-bit CP210X_ register identified by req.
378 */
379static int cp210x_read_u32_reg(struct usb_serial_port *port, u8 req, u32 *val)
380{
381 __le32 le32_val;
382 int err;
383
384 err = cp210x_read_reg_block(port, req, &le32_val, sizeof(le32_val));
385 if (err) {
386 /*
387 * FIXME Some callers don't bother to check for error,
388 * at least give them consistent junk until they are fixed
389 */
390 *val = 0;
391 return err;
370 } 392 }
371 393
394 *val = le32_to_cpu(le32_val);
395
396 return 0;
397}
398
399/*
400 * Reads any 16-bit CP210X_ register identified by req.
401 */
402static int cp210x_read_u16_reg(struct usb_serial_port *port, u8 req, u16 *val)
403{
404 __le16 le16_val;
405 int err;
406
407 err = cp210x_read_reg_block(port, req, &le16_val, sizeof(le16_val));
408 if (err)
409 return err;
410
411 *val = le16_to_cpu(le16_val);
412
372 return 0; 413 return 0;
373} 414}
374 415
375/* 416/*
376 * cp210x_set_config 417 * Reads any 8-bit CP210X_ register identified by req.
377 * Writes to the CP210x configuration registers 418 */
378 * Values less than 16 bits wide are sent directly 419static int cp210x_read_u8_reg(struct usb_serial_port *port, u8 req, u8 *val)
379 * 'size' is specified in bytes. 420{
421 return cp210x_read_reg_block(port, req, val, sizeof(*val));
422}
423
424/*
425 * Writes any 16-bit CP210X_ register (req) whose value is passed
426 * entirely in the wValue field of the USB request.
380 */ 427 */
381static int cp210x_set_config(struct usb_serial_port *port, u8 request, 428static int cp210x_write_u16_reg(struct usb_serial_port *port, u8 req, u16 val)
382 unsigned int *data, int size)
383{ 429{
384 struct usb_serial *serial = port->serial; 430 struct usb_serial *serial = port->serial;
385 struct cp210x_port_private *port_priv = usb_get_serial_port_data(port); 431 struct cp210x_port_private *port_priv = usb_get_serial_port_data(port);
386 __le32 *buf; 432 int result;
387 int result, i, length; 433
434 result = usb_control_msg(serial->dev, usb_sndctrlpipe(serial->dev, 0),
435 req, REQTYPE_HOST_TO_INTERFACE, val,
436 port_priv->bInterfaceNumber, NULL, 0,
437 USB_CTRL_SET_TIMEOUT);
438 if (result < 0) {
439 dev_err(&port->dev, "failed set request 0x%x status: %d\n",
440 req, result);
441 }
442
443 return result;
444}
388 445
389 /* Number of integers required to contain the array */ 446/*
390 length = (((size - 1) | 3) + 1) / 4; 447 * Writes a variable-sized block of CP210X_ registers, identified by req.
448 * Data in buf must be in native USB byte order.
449 */
450static int cp210x_write_reg_block(struct usb_serial_port *port, u8 req,
451 void *buf, int bufsize)
452{
453 struct usb_serial *serial = port->serial;
454 struct cp210x_port_private *port_priv = usb_get_serial_port_data(port);
455 void *dmabuf;
456 int result;
391 457
392 buf = kmalloc(length * sizeof(__le32), GFP_KERNEL); 458 dmabuf = kmalloc(bufsize, GFP_KERNEL);
393 if (!buf) 459 if (!dmabuf)
394 return -ENOMEM; 460 return -ENOMEM;
395 461
396 /* Array of integers into bytes */ 462 memcpy(dmabuf, buf, bufsize);
397 for (i = 0; i < length; i++)
398 buf[i] = cpu_to_le32(data[i]);
399 463
400 if (size > 2) { 464 result = usb_control_msg(serial->dev, usb_sndctrlpipe(serial->dev, 0),
401 result = usb_control_msg(serial->dev, 465 req, REQTYPE_HOST_TO_INTERFACE, 0,
402 usb_sndctrlpipe(serial->dev, 0), 466 port_priv->bInterfaceNumber, dmabuf, bufsize,
403 request, REQTYPE_HOST_TO_INTERFACE, 0x0000, 467 USB_CTRL_SET_TIMEOUT);
404 port_priv->bInterfaceNumber, buf, size,
405 USB_CTRL_SET_TIMEOUT);
406 } else {
407 result = usb_control_msg(serial->dev,
408 usb_sndctrlpipe(serial->dev, 0),
409 request, REQTYPE_HOST_TO_INTERFACE, data[0],
410 port_priv->bInterfaceNumber, NULL, 0,
411 USB_CTRL_SET_TIMEOUT);
412 }
413 468
414 kfree(buf); 469 kfree(dmabuf);
415 470
416 if ((size > 2 && result != size) || result < 0) { 471 if (result == bufsize) {
417 dev_dbg(&port->dev, "%s - Unable to send request, request=0x%x size=%d result=%d\n", 472 result = 0;
418 __func__, request, size, result); 473 } else {
419 if (result > 0) 474 dev_err(&port->dev, "failed set req 0x%x size %d status: %d\n",
475 req, bufsize, result);
476 if (result >= 0)
420 result = -EPROTO; 477 result = -EPROTO;
421
422 return result;
423 } 478 }
424 479
425 return 0; 480 return result;
426} 481}
427 482
428/* 483/*
429 * cp210x_set_config_single 484 * Writes any 32-bit CP210X_ register identified by req.
430 * Convenience function for calling cp210x_set_config on single data values
431 * without requiring an integer pointer
432 */ 485 */
433static inline int cp210x_set_config_single(struct usb_serial_port *port, 486static int cp210x_write_u32_reg(struct usb_serial_port *port, u8 req, u32 val)
434 u8 request, unsigned int data)
435{ 487{
436 return cp210x_set_config(port, request, &data, 2); 488 __le32 le32_val;
489
490 le32_val = cpu_to_le32(val);
491
492 return cp210x_write_reg_block(port, req, &le32_val, sizeof(le32_val));
437} 493}
438 494
439/* 495/*
@@ -445,47 +501,46 @@ static inline int cp210x_set_config_single(struct usb_serial_port *port,
445static int cp210x_detect_swapped_line_ctl(struct usb_serial_port *port) 501static int cp210x_detect_swapped_line_ctl(struct usb_serial_port *port)
446{ 502{
447 struct cp210x_port_private *port_priv = usb_get_serial_port_data(port); 503 struct cp210x_port_private *port_priv = usb_get_serial_port_data(port);
448 unsigned int line_ctl_save; 504 u16 line_ctl_save;
449 unsigned int line_ctl_test; 505 u16 line_ctl_test;
450 int err; 506 int err;
451 507
452 err = cp210x_get_config(port, CP210X_GET_LINE_CTL, &line_ctl_save, 2); 508 err = cp210x_read_u16_reg(port, CP210X_GET_LINE_CTL, &line_ctl_save);
453 if (err) 509 if (err)
454 return err; 510 return err;
455 511
456 line_ctl_test = 0x800; 512 err = cp210x_write_u16_reg(port, CP210X_SET_LINE_CTL, 0x800);
457 err = cp210x_set_config(port, CP210X_SET_LINE_CTL, &line_ctl_test, 2);
458 if (err) 513 if (err)
459 return err; 514 return err;
460 515
461 err = cp210x_get_config(port, CP210X_GET_LINE_CTL, &line_ctl_test, 2); 516 err = cp210x_read_u16_reg(port, CP210X_GET_LINE_CTL, &line_ctl_test);
462 if (err) 517 if (err)
463 return err; 518 return err;
464 519
465 if (line_ctl_test == 8) { 520 if (line_ctl_test == 8) {
466 port_priv->has_swapped_line_ctl = true; 521 port_priv->has_swapped_line_ctl = true;
467 line_ctl_save = swab16((u16)line_ctl_save); 522 line_ctl_save = swab16(line_ctl_save);
468 } 523 }
469 524
470 return cp210x_set_config(port, CP210X_SET_LINE_CTL, &line_ctl_save, 2); 525 return cp210x_write_u16_reg(port, CP210X_SET_LINE_CTL, line_ctl_save);
471} 526}
472 527
473/* 528/*
474 * Must always be called instead of cp210x_get_config(CP210X_GET_LINE_CTL) 529 * Must always be called instead of cp210x_read_u16_reg(CP210X_GET_LINE_CTL)
475 * to workaround cp2108 bug and get correct value. 530 * to workaround cp2108 bug and get correct value.
476 */ 531 */
477static int cp210x_get_line_ctl(struct usb_serial_port *port, unsigned int *ctl) 532static int cp210x_get_line_ctl(struct usb_serial_port *port, u16 *ctl)
478{ 533{
479 struct cp210x_port_private *port_priv = usb_get_serial_port_data(port); 534 struct cp210x_port_private *port_priv = usb_get_serial_port_data(port);
480 int err; 535 int err;
481 536
482 err = cp210x_get_config(port, CP210X_GET_LINE_CTL, ctl, 2); 537 err = cp210x_read_u16_reg(port, CP210X_GET_LINE_CTL, ctl);
483 if (err) 538 if (err)
484 return err; 539 return err;
485 540
486 /* Workaround swapped bytes in 16-bit value from CP210X_GET_LINE_CTL */ 541 /* Workaround swapped bytes in 16-bit value from CP210X_GET_LINE_CTL */
487 if (port_priv->has_swapped_line_ctl) 542 if (port_priv->has_swapped_line_ctl)
488 *ctl = swab16((u16)(*ctl)); 543 *ctl = swab16(*ctl);
489 544
490 return 0; 545 return 0;
491} 546}
@@ -536,8 +591,7 @@ static int cp210x_open(struct tty_struct *tty, struct usb_serial_port *port)
536{ 591{
537 int result; 592 int result;
538 593
539 result = cp210x_set_config_single(port, CP210X_IFC_ENABLE, 594 result = cp210x_write_u16_reg(port, CP210X_IFC_ENABLE, UART_ENABLE);
540 UART_ENABLE);
541 if (result) { 595 if (result) {
542 dev_err(&port->dev, "%s - Unable to enable UART\n", __func__); 596 dev_err(&port->dev, "%s - Unable to enable UART\n", __func__);
543 return result; 597 return result;
@@ -555,15 +609,12 @@ static int cp210x_open(struct tty_struct *tty, struct usb_serial_port *port)
555 609
556static void cp210x_close(struct usb_serial_port *port) 610static void cp210x_close(struct usb_serial_port *port)
557{ 611{
558 unsigned int purge_ctl;
559
560 usb_serial_generic_close(port); 612 usb_serial_generic_close(port);
561 613
562 /* Clear both queues; cp2108 needs this to avoid an occasional hang */ 614 /* Clear both queues; cp2108 needs this to avoid an occasional hang */
563 purge_ctl = PURGE_ALL; 615 cp210x_write_u16_reg(port, CP210X_PURGE, PURGE_ALL);
564 cp210x_set_config(port, CP210X_PURGE, &purge_ctl, 2);
565 616
566 cp210x_set_config_single(port, CP210X_IFC_ENABLE, UART_DISABLE); 617 cp210x_write_u16_reg(port, CP210X_IFC_ENABLE, UART_DISABLE);
567} 618}
568 619
569/* 620/*
@@ -641,11 +692,12 @@ static void cp210x_get_termios_port(struct usb_serial_port *port,
641 unsigned int *cflagp, unsigned int *baudp) 692 unsigned int *cflagp, unsigned int *baudp)
642{ 693{
643 struct device *dev = &port->dev; 694 struct device *dev = &port->dev;
644 unsigned int cflag, modem_ctl[4]; 695 unsigned int cflag;
645 unsigned int baud; 696 u8 modem_ctl[16];
646 unsigned int bits; 697 u32 baud;
698 u16 bits;
647 699
648 cp210x_get_config(port, CP210X_GET_BAUDRATE, &baud, 4); 700 cp210x_read_u32_reg(port, CP210X_GET_BAUDRATE, &baud);
649 701
650 dev_dbg(dev, "%s - baud rate = %d\n", __func__, baud); 702 dev_dbg(dev, "%s - baud rate = %d\n", __func__, baud);
651 *baudp = baud; 703 *baudp = baud;
@@ -676,14 +728,14 @@ static void cp210x_get_termios_port(struct usb_serial_port *port,
676 cflag |= CS8; 728 cflag |= CS8;
677 bits &= ~BITS_DATA_MASK; 729 bits &= ~BITS_DATA_MASK;
678 bits |= BITS_DATA_8; 730 bits |= BITS_DATA_8;
679 cp210x_set_config(port, CP210X_SET_LINE_CTL, &bits, 2); 731 cp210x_write_u16_reg(port, CP210X_SET_LINE_CTL, bits);
680 break; 732 break;
681 default: 733 default:
682 dev_dbg(dev, "%s - Unknown number of data bits, using 8\n", __func__); 734 dev_dbg(dev, "%s - Unknown number of data bits, using 8\n", __func__);
683 cflag |= CS8; 735 cflag |= CS8;
684 bits &= ~BITS_DATA_MASK; 736 bits &= ~BITS_DATA_MASK;
685 bits |= BITS_DATA_8; 737 bits |= BITS_DATA_8;
686 cp210x_set_config(port, CP210X_SET_LINE_CTL, &bits, 2); 738 cp210x_write_u16_reg(port, CP210X_SET_LINE_CTL, bits);
687 break; 739 break;
688 } 740 }
689 741
@@ -714,7 +766,7 @@ static void cp210x_get_termios_port(struct usb_serial_port *port,
714 dev_dbg(dev, "%s - Unknown parity mode, disabling parity\n", __func__); 766 dev_dbg(dev, "%s - Unknown parity mode, disabling parity\n", __func__);
715 cflag &= ~PARENB; 767 cflag &= ~PARENB;
716 bits &= ~BITS_PARITY_MASK; 768 bits &= ~BITS_PARITY_MASK;
717 cp210x_set_config(port, CP210X_SET_LINE_CTL, &bits, 2); 769 cp210x_write_u16_reg(port, CP210X_SET_LINE_CTL, bits);
718 break; 770 break;
719 } 771 }
720 772
@@ -726,7 +778,7 @@ static void cp210x_get_termios_port(struct usb_serial_port *port,
726 case BITS_STOP_1_5: 778 case BITS_STOP_1_5:
727 dev_dbg(dev, "%s - stop bits = 1.5 (not supported, using 1 stop bit)\n", __func__); 779 dev_dbg(dev, "%s - stop bits = 1.5 (not supported, using 1 stop bit)\n", __func__);
728 bits &= ~BITS_STOP_MASK; 780 bits &= ~BITS_STOP_MASK;
729 cp210x_set_config(port, CP210X_SET_LINE_CTL, &bits, 2); 781 cp210x_write_u16_reg(port, CP210X_SET_LINE_CTL, bits);
730 break; 782 break;
731 case BITS_STOP_2: 783 case BITS_STOP_2:
732 dev_dbg(dev, "%s - stop bits = 2\n", __func__); 784 dev_dbg(dev, "%s - stop bits = 2\n", __func__);
@@ -735,12 +787,13 @@ static void cp210x_get_termios_port(struct usb_serial_port *port,
735 default: 787 default:
736 dev_dbg(dev, "%s - Unknown number of stop bits, using 1 stop bit\n", __func__); 788 dev_dbg(dev, "%s - Unknown number of stop bits, using 1 stop bit\n", __func__);
737 bits &= ~BITS_STOP_MASK; 789 bits &= ~BITS_STOP_MASK;
738 cp210x_set_config(port, CP210X_SET_LINE_CTL, &bits, 2); 790 cp210x_write_u16_reg(port, CP210X_SET_LINE_CTL, bits);
739 break; 791 break;
740 } 792 }
741 793
742 cp210x_get_config(port, CP210X_GET_FLOW, modem_ctl, 16); 794 cp210x_read_reg_block(port, CP210X_GET_FLOW, modem_ctl,
743 if (modem_ctl[0] & 0x0008) { 795 sizeof(modem_ctl));
796 if (modem_ctl[0] & 0x08) {
744 dev_dbg(dev, "%s - flow control = CRTSCTS\n", __func__); 797 dev_dbg(dev, "%s - flow control = CRTSCTS\n", __func__);
745 cflag |= CRTSCTS; 798 cflag |= CRTSCTS;
746 } else { 799 } else {
@@ -792,8 +845,7 @@ static void cp210x_change_speed(struct tty_struct *tty,
792 baud = cp210x_quantise_baudrate(baud); 845 baud = cp210x_quantise_baudrate(baud);
793 846
794 dev_dbg(&port->dev, "%s - setting baud rate to %u\n", __func__, baud); 847 dev_dbg(&port->dev, "%s - setting baud rate to %u\n", __func__, baud);
795 if (cp210x_set_config(port, CP210X_SET_BAUDRATE, &baud, 848 if (cp210x_write_u32_reg(port, CP210X_SET_BAUDRATE, baud)) {
796 sizeof(baud))) {
797 dev_warn(&port->dev, "failed to set baud rate to %u\n", baud); 849 dev_warn(&port->dev, "failed to set baud rate to %u\n", baud);
798 if (old_termios) 850 if (old_termios)
799 baud = old_termios->c_ospeed; 851 baud = old_termios->c_ospeed;
@@ -809,8 +861,8 @@ static void cp210x_set_termios(struct tty_struct *tty,
809{ 861{
810 struct device *dev = &port->dev; 862 struct device *dev = &port->dev;
811 unsigned int cflag, old_cflag; 863 unsigned int cflag, old_cflag;
812 unsigned int bits; 864 u16 bits;
813 unsigned int modem_ctl[4]; 865 u8 modem_ctl[16];
814 866
815 cflag = tty->termios.c_cflag; 867 cflag = tty->termios.c_cflag;
816 old_cflag = old_termios->c_cflag; 868 old_cflag = old_termios->c_cflag;
@@ -848,7 +900,7 @@ static void cp210x_set_termios(struct tty_struct *tty,
848 bits |= BITS_DATA_8; 900 bits |= BITS_DATA_8;
849 break; 901 break;
850 } 902 }
851 if (cp210x_set_config(port, CP210X_SET_LINE_CTL, &bits, 2)) 903 if (cp210x_write_u16_reg(port, CP210X_SET_LINE_CTL, bits))
852 dev_dbg(dev, "Number of data bits requested not supported by device\n"); 904 dev_dbg(dev, "Number of data bits requested not supported by device\n");
853 } 905 }
854 906
@@ -875,7 +927,7 @@ static void cp210x_set_termios(struct tty_struct *tty,
875 } 927 }
876 } 928 }
877 } 929 }
878 if (cp210x_set_config(port, CP210X_SET_LINE_CTL, &bits, 2)) 930 if (cp210x_write_u16_reg(port, CP210X_SET_LINE_CTL, bits))
879 dev_dbg(dev, "Parity mode not supported by device\n"); 931 dev_dbg(dev, "Parity mode not supported by device\n");
880 } 932 }
881 933
@@ -889,32 +941,40 @@ static void cp210x_set_termios(struct tty_struct *tty,
889 bits |= BITS_STOP_1; 941 bits |= BITS_STOP_1;
890 dev_dbg(dev, "%s - stop bits = 1\n", __func__); 942 dev_dbg(dev, "%s - stop bits = 1\n", __func__);
891 } 943 }
892 if (cp210x_set_config(port, CP210X_SET_LINE_CTL, &bits, 2)) 944 if (cp210x_write_u16_reg(port, CP210X_SET_LINE_CTL, bits))
893 dev_dbg(dev, "Number of stop bits requested not supported by device\n"); 945 dev_dbg(dev, "Number of stop bits requested not supported by device\n");
894 } 946 }
895 947
896 if ((cflag & CRTSCTS) != (old_cflag & CRTSCTS)) { 948 if ((cflag & CRTSCTS) != (old_cflag & CRTSCTS)) {
897 cp210x_get_config(port, CP210X_GET_FLOW, modem_ctl, 16); 949
898 dev_dbg(dev, "%s - read modem controls = 0x%.4x 0x%.4x 0x%.4x 0x%.4x\n", 950 /* Only bytes 0, 4 and 7 out of first 8 have functional bits */
899 __func__, modem_ctl[0], modem_ctl[1], 951
900 modem_ctl[2], modem_ctl[3]); 952 cp210x_read_reg_block(port, CP210X_GET_FLOW, modem_ctl,
953 sizeof(modem_ctl));
954 dev_dbg(dev, "%s - read modem controls = %02x .. .. .. %02x .. .. %02x\n",
955 __func__, modem_ctl[0], modem_ctl[4], modem_ctl[7]);
901 956
902 if (cflag & CRTSCTS) { 957 if (cflag & CRTSCTS) {
903 modem_ctl[0] &= ~0x7B; 958 modem_ctl[0] &= ~0x7B;
904 modem_ctl[0] |= 0x09; 959 modem_ctl[0] |= 0x09;
905 modem_ctl[1] = 0x80; 960 modem_ctl[4] = 0x80;
961 /* FIXME - why clear reserved bits just read? */
962 modem_ctl[5] = 0;
963 modem_ctl[6] = 0;
964 modem_ctl[7] = 0;
906 dev_dbg(dev, "%s - flow control = CRTSCTS\n", __func__); 965 dev_dbg(dev, "%s - flow control = CRTSCTS\n", __func__);
907 } else { 966 } else {
908 modem_ctl[0] &= ~0x7B; 967 modem_ctl[0] &= ~0x7B;
909 modem_ctl[0] |= 0x01; 968 modem_ctl[0] |= 0x01;
910 modem_ctl[1] |= 0x40; 969 /* FIXME - OR here instead of assignment looks wrong */
970 modem_ctl[4] |= 0x40;
911 dev_dbg(dev, "%s - flow control = NONE\n", __func__); 971 dev_dbg(dev, "%s - flow control = NONE\n", __func__);
912 } 972 }
913 973
914 dev_dbg(dev, "%s - write modem controls = 0x%.4x 0x%.4x 0x%.4x 0x%.4x\n", 974 dev_dbg(dev, "%s - write modem controls = %02x .. .. .. %02x .. .. %02x\n",
915 __func__, modem_ctl[0], modem_ctl[1], 975 __func__, modem_ctl[0], modem_ctl[4], modem_ctl[7]);
916 modem_ctl[2], modem_ctl[3]); 976 cp210x_write_reg_block(port, CP210X_SET_FLOW, modem_ctl,
917 cp210x_set_config(port, CP210X_SET_FLOW, modem_ctl, 16); 977 sizeof(modem_ctl));
918 } 978 }
919 979
920} 980}
@@ -929,7 +989,7 @@ static int cp210x_tiocmset(struct tty_struct *tty,
929static int cp210x_tiocmset_port(struct usb_serial_port *port, 989static int cp210x_tiocmset_port(struct usb_serial_port *port,
930 unsigned int set, unsigned int clear) 990 unsigned int set, unsigned int clear)
931{ 991{
932 unsigned int control = 0; 992 u16 control = 0;
933 993
934 if (set & TIOCM_RTS) { 994 if (set & TIOCM_RTS) {
935 control |= CONTROL_RTS; 995 control |= CONTROL_RTS;
@@ -950,7 +1010,7 @@ static int cp210x_tiocmset_port(struct usb_serial_port *port,
950 1010
951 dev_dbg(&port->dev, "%s - control = 0x%.4x\n", __func__, control); 1011 dev_dbg(&port->dev, "%s - control = 0x%.4x\n", __func__, control);
952 1012
953 return cp210x_set_config(port, CP210X_SET_MHS, &control, 2); 1013 return cp210x_write_u16_reg(port, CP210X_SET_MHS, control);
954} 1014}
955 1015
956static void cp210x_dtr_rts(struct usb_serial_port *p, int on) 1016static void cp210x_dtr_rts(struct usb_serial_port *p, int on)
@@ -964,10 +1024,10 @@ static void cp210x_dtr_rts(struct usb_serial_port *p, int on)
964static int cp210x_tiocmget(struct tty_struct *tty) 1024static int cp210x_tiocmget(struct tty_struct *tty)
965{ 1025{
966 struct usb_serial_port *port = tty->driver_data; 1026 struct usb_serial_port *port = tty->driver_data;
967 unsigned int control; 1027 u8 control;
968 int result; 1028 int result;
969 1029
970 cp210x_get_config(port, CP210X_GET_MDMSTS, &control, 1); 1030 cp210x_read_u8_reg(port, CP210X_GET_MDMSTS, &control);
971 1031
972 result = ((control & CONTROL_DTR) ? TIOCM_DTR : 0) 1032 result = ((control & CONTROL_DTR) ? TIOCM_DTR : 0)
973 |((control & CONTROL_RTS) ? TIOCM_RTS : 0) 1033 |((control & CONTROL_RTS) ? TIOCM_RTS : 0)
@@ -984,7 +1044,7 @@ static int cp210x_tiocmget(struct tty_struct *tty)
984static void cp210x_break_ctl(struct tty_struct *tty, int break_state) 1044static void cp210x_break_ctl(struct tty_struct *tty, int break_state)
985{ 1045{
986 struct usb_serial_port *port = tty->driver_data; 1046 struct usb_serial_port *port = tty->driver_data;
987 unsigned int state; 1047 u16 state;
988 1048
989 if (break_state == 0) 1049 if (break_state == 0)
990 state = BREAK_OFF; 1050 state = BREAK_OFF;
@@ -992,7 +1052,7 @@ static void cp210x_break_ctl(struct tty_struct *tty, int break_state)
992 state = BREAK_ON; 1052 state = BREAK_ON;
993 dev_dbg(&port->dev, "%s - turning break %s\n", __func__, 1053 dev_dbg(&port->dev, "%s - turning break %s\n", __func__,
994 state == BREAK_OFF ? "off" : "on"); 1054 state == BREAK_OFF ? "off" : "on");
995 cp210x_set_config(port, CP210X_SET_BREAK, &state, 2); 1055 cp210x_write_u16_reg(port, CP210X_SET_BREAK, state);
996} 1056}
997 1057
998static int cp210x_port_probe(struct usb_serial_port *port) 1058static int cp210x_port_probe(struct usb_serial_port *port)
diff --git a/drivers/usb/serial/cyberjack.c b/drivers/usb/serial/cyberjack.c
index 2916dea3ede8..5f17a3b9916d 100644
--- a/drivers/usb/serial/cyberjack.c
+++ b/drivers/usb/serial/cyberjack.c
@@ -140,7 +140,6 @@ static int cyberjack_open(struct tty_struct *tty,
140{ 140{
141 struct cyberjack_private *priv; 141 struct cyberjack_private *priv;
142 unsigned long flags; 142 unsigned long flags;
143 int result = 0;
144 143
145 dev_dbg(&port->dev, "%s - usb_clear_halt\n", __func__); 144 dev_dbg(&port->dev, "%s - usb_clear_halt\n", __func__);
146 usb_clear_halt(port->serial->dev, port->write_urb->pipe); 145 usb_clear_halt(port->serial->dev, port->write_urb->pipe);
@@ -152,7 +151,7 @@ static int cyberjack_open(struct tty_struct *tty,
152 priv->wrsent = 0; 151 priv->wrsent = 0;
153 spin_unlock_irqrestore(&priv->lock, flags); 152 spin_unlock_irqrestore(&priv->lock, flags);
154 153
155 return result; 154 return 0;
156} 155}
157 156
158static void cyberjack_close(struct usb_serial_port *port) 157static void cyberjack_close(struct usb_serial_port *port)
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index 8c660ae401d8..427ae43ee898 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
@@ -1320,11 +1320,11 @@ static __u32 get_ftdi_divisor(struct tty_struct *tty,
1320 if (baud <= 3000000) { 1320 if (baud <= 3000000) {
1321 __u16 product_id = le16_to_cpu( 1321 __u16 product_id = le16_to_cpu(
1322 port->serial->dev->descriptor.idProduct); 1322 port->serial->dev->descriptor.idProduct);
1323 if (((FTDI_NDI_HUC_PID == product_id) || 1323 if (((product_id == FTDI_NDI_HUC_PID) ||
1324 (FTDI_NDI_SPECTRA_SCU_PID == product_id) || 1324 (product_id == FTDI_NDI_SPECTRA_SCU_PID) ||
1325 (FTDI_NDI_FUTURE_2_PID == product_id) || 1325 (product_id == FTDI_NDI_FUTURE_2_PID) ||
1326 (FTDI_NDI_FUTURE_3_PID == product_id) || 1326 (product_id == FTDI_NDI_FUTURE_3_PID) ||
1327 (FTDI_NDI_AURORA_SCU_PID == product_id)) && 1327 (product_id == FTDI_NDI_AURORA_SCU_PID)) &&
1328 (baud == 19200)) { 1328 (baud == 19200)) {
1329 baud = 1200000; 1329 baud = 1200000;
1330 } 1330 }
diff --git a/drivers/usb/serial/ftdi_sio.h b/drivers/usb/serial/ftdi_sio.h
index ed58c6fa8dbe..bbcc13df11ac 100644
--- a/drivers/usb/serial/ftdi_sio.h
+++ b/drivers/usb/serial/ftdi_sio.h
@@ -239,11 +239,11 @@ enum ftdi_sio_baudrate {
239 */ 239 */
240 240
241#define FTDI_SIO_SET_DTR_MASK 0x1 241#define FTDI_SIO_SET_DTR_MASK 0x1
242#define FTDI_SIO_SET_DTR_HIGH (1 | (FTDI_SIO_SET_DTR_MASK << 8)) 242#define FTDI_SIO_SET_DTR_HIGH ((FTDI_SIO_SET_DTR_MASK << 8) | 1)
243#define FTDI_SIO_SET_DTR_LOW (0 | (FTDI_SIO_SET_DTR_MASK << 8)) 243#define FTDI_SIO_SET_DTR_LOW ((FTDI_SIO_SET_DTR_MASK << 8) | 0)
244#define FTDI_SIO_SET_RTS_MASK 0x2 244#define FTDI_SIO_SET_RTS_MASK 0x2
245#define FTDI_SIO_SET_RTS_HIGH (2 | (FTDI_SIO_SET_RTS_MASK << 8)) 245#define FTDI_SIO_SET_RTS_HIGH ((FTDI_SIO_SET_RTS_MASK << 8) | 2)
246#define FTDI_SIO_SET_RTS_LOW (0 | (FTDI_SIO_SET_RTS_MASK << 8)) 246#define FTDI_SIO_SET_RTS_LOW ((FTDI_SIO_SET_RTS_MASK << 8) | 0)
247 247
248/* 248/*
249 * ControlValue 249 * ControlValue
diff --git a/drivers/usb/serial/garmin_gps.c b/drivers/usb/serial/garmin_gps.c
index db591d19d416..97cabf803c2f 100644
--- a/drivers/usb/serial/garmin_gps.c
+++ b/drivers/usb/serial/garmin_gps.c
@@ -237,10 +237,10 @@ static inline int getDataLength(const __u8 *usbPacket)
237 */ 237 */
238static inline int isAbortTrfCmnd(const unsigned char *buf) 238static inline int isAbortTrfCmnd(const unsigned char *buf)
239{ 239{
240 if (0 == memcmp(buf, GARMIN_STOP_TRANSFER_REQ, 240 if (memcmp(buf, GARMIN_STOP_TRANSFER_REQ,
241 sizeof(GARMIN_STOP_TRANSFER_REQ)) || 241 sizeof(GARMIN_STOP_TRANSFER_REQ)) == 0 ||
242 0 == memcmp(buf, GARMIN_STOP_TRANSFER_REQ_V2, 242 memcmp(buf, GARMIN_STOP_TRANSFER_REQ_V2,
243 sizeof(GARMIN_STOP_TRANSFER_REQ_V2))) 243 sizeof(GARMIN_STOP_TRANSFER_REQ_V2)) == 0)
244 return 1; 244 return 1;
245 else 245 else
246 return 0; 246 return 0;
@@ -350,7 +350,7 @@ static int gsp_send_ack(struct garmin_data *garmin_data_p, __u8 pkt_id)
350 unsigned l = 0; 350 unsigned l = 0;
351 351
352 dev_dbg(&garmin_data_p->port->dev, "%s - pkt-id: 0x%X.\n", __func__, 352 dev_dbg(&garmin_data_p->port->dev, "%s - pkt-id: 0x%X.\n", __func__,
353 0xFF & pkt_id); 353 pkt_id);
354 354
355 *ptr++ = DLE; 355 *ptr++ = DLE;
356 *ptr++ = ACK; 356 *ptr++ = ACK;
@@ -366,7 +366,7 @@ static int gsp_send_ack(struct garmin_data *garmin_data_p, __u8 pkt_id)
366 *ptr++ = DLE; 366 *ptr++ = DLE;
367 367
368 *ptr++ = 0; 368 *ptr++ = 0;
369 *ptr++ = 0xFF & (-cksum); 369 *ptr++ = (-cksum) & 0xFF;
370 *ptr++ = DLE; 370 *ptr++ = DLE;
371 *ptr++ = ETX; 371 *ptr++ = ETX;
372 372
@@ -423,9 +423,9 @@ static int gsp_rec_packet(struct garmin_data *garmin_data_p, int count)
423 n++; 423 n++;
424 } 424 }
425 425
426 if ((0xff & (cksum + *recpkt)) != 0) { 426 if (((cksum + *recpkt) & 0xff) != 0) {
427 dev_dbg(dev, "%s - invalid checksum, expected %02x, got %02x\n", 427 dev_dbg(dev, "%s - invalid checksum, expected %02x, got %02x\n",
428 __func__, 0xff & -cksum, 0xff & *recpkt); 428 __func__, -cksum & 0xff, *recpkt);
429 return -EINVPKT; 429 return -EINVPKT;
430 } 430 }
431 431
@@ -528,7 +528,7 @@ static int gsp_receive(struct garmin_data *garmin_data_p,
528 dev_dbg(dev, "NAK packet complete.\n"); 528 dev_dbg(dev, "NAK packet complete.\n");
529 } else { 529 } else {
530 dev_dbg(dev, "packet complete - id=0x%X.\n", 530 dev_dbg(dev, "packet complete - id=0x%X.\n",
531 0xFF & data); 531 data);
532 gsp_rec_packet(garmin_data_p, size); 532 gsp_rec_packet(garmin_data_p, size);
533 } 533 }
534 534
@@ -636,7 +636,7 @@ static int gsp_send(struct garmin_data *garmin_data_p,
636 636
637 garmin_data_p->outsize = 0; 637 garmin_data_p->outsize = 0;
638 638
639 if (GARMIN_LAYERID_APPL != getLayerId(garmin_data_p->outbuffer)) { 639 if (getLayerId(garmin_data_p->outbuffer) != GARMIN_LAYERID_APPL) {
640 dev_dbg(dev, "not an application packet (%d)\n", 640 dev_dbg(dev, "not an application packet (%d)\n",
641 getLayerId(garmin_data_p->outbuffer)); 641 getLayerId(garmin_data_p->outbuffer));
642 return -1; 642 return -1;
@@ -688,7 +688,7 @@ static int gsp_send(struct garmin_data *garmin_data_p,
688 *dst++ = DLE; 688 *dst++ = DLE;
689 } 689 }
690 690
691 cksum = 0xFF & -cksum; 691 cksum = -cksum & 0xFF;
692 *dst++ = cksum; 692 *dst++ = cksum;
693 if (cksum == DLE) 693 if (cksum == DLE)
694 *dst++ = DLE; 694 *dst++ = DLE;
@@ -860,7 +860,6 @@ static int process_resetdev_request(struct usb_serial_port *port)
860static int garmin_clear(struct garmin_data *garmin_data_p) 860static int garmin_clear(struct garmin_data *garmin_data_p)
861{ 861{
862 unsigned long flags; 862 unsigned long flags;
863 int status = 0;
864 863
865 /* flush all queued data */ 864 /* flush all queued data */
866 pkt_clear(garmin_data_p); 865 pkt_clear(garmin_data_p);
@@ -870,7 +869,7 @@ static int garmin_clear(struct garmin_data *garmin_data_p)
870 garmin_data_p->outsize = 0; 869 garmin_data_p->outsize = 0;
871 spin_unlock_irqrestore(&garmin_data_p->lock, flags); 870 spin_unlock_irqrestore(&garmin_data_p->lock, flags);
872 871
873 return status; 872 return 0;
874} 873}
875 874
876 875
@@ -970,7 +969,7 @@ static void garmin_write_bulk_callback(struct urb *urb)
970 struct garmin_data *garmin_data_p = 969 struct garmin_data *garmin_data_p =
971 usb_get_serial_port_data(port); 970 usb_get_serial_port_data(port);
972 971
973 if (GARMIN_LAYERID_APPL == getLayerId(urb->transfer_buffer)) { 972 if (getLayerId(urb->transfer_buffer) == GARMIN_LAYERID_APPL) {
974 973
975 if (garmin_data_p->mode == MODE_GARMIN_SERIAL) { 974 if (garmin_data_p->mode == MODE_GARMIN_SERIAL) {
976 gsp_send_ack(garmin_data_p, 975 gsp_send_ack(garmin_data_p,
@@ -1025,7 +1024,7 @@ static int garmin_write_bulk(struct usb_serial_port *port,
1025 dismiss_ack ? NULL : port); 1024 dismiss_ack ? NULL : port);
1026 urb->transfer_flags |= URB_ZERO_PACKET; 1025 urb->transfer_flags |= URB_ZERO_PACKET;
1027 1026
1028 if (GARMIN_LAYERID_APPL == getLayerId(buffer)) { 1027 if (getLayerId(buffer) == GARMIN_LAYERID_APPL) {
1029 1028
1030 spin_lock_irqsave(&garmin_data_p->lock, flags); 1029 spin_lock_irqsave(&garmin_data_p->lock, flags);
1031 garmin_data_p->flags |= APP_REQ_SEEN; 1030 garmin_data_p->flags |= APP_REQ_SEEN;
@@ -1077,9 +1076,9 @@ static int garmin_write(struct tty_struct *tty, struct usb_serial_port *port,
1077 pktsiz = getDataLength(garmin_data_p->privpkt); 1076 pktsiz = getDataLength(garmin_data_p->privpkt);
1078 pktid = getPacketId(garmin_data_p->privpkt); 1077 pktid = getPacketId(garmin_data_p->privpkt);
1079 1078
1080 if (count == (GARMIN_PKTHDR_LENGTH+pktsiz) 1079 if (count == (GARMIN_PKTHDR_LENGTH + pktsiz) &&
1081 && GARMIN_LAYERID_PRIVATE == 1080 getLayerId(garmin_data_p->privpkt) ==
1082 getLayerId(garmin_data_p->privpkt)) { 1081 GARMIN_LAYERID_PRIVATE) {
1083 1082
1084 dev_dbg(dev, "%s - processing private request %d\n", 1083 dev_dbg(dev, "%s - processing private request %d\n",
1085 __func__, pktid); 1084 __func__, pktid);
@@ -1192,7 +1191,7 @@ static void garmin_read_bulk_callback(struct urb *urb)
1192 garmin_read_process(garmin_data_p, data, urb->actual_length, 1); 1191 garmin_read_process(garmin_data_p, data, urb->actual_length, 1);
1193 1192
1194 if (urb->actual_length == 0 && 1193 if (urb->actual_length == 0 &&
1195 0 != (garmin_data_p->flags & FLAGS_BULK_IN_RESTART)) { 1194 (garmin_data_p->flags & FLAGS_BULK_IN_RESTART) != 0) {
1196 spin_lock_irqsave(&garmin_data_p->lock, flags); 1195 spin_lock_irqsave(&garmin_data_p->lock, flags);
1197 garmin_data_p->flags &= ~FLAGS_BULK_IN_RESTART; 1196 garmin_data_p->flags &= ~FLAGS_BULK_IN_RESTART;
1198 spin_unlock_irqrestore(&garmin_data_p->lock, flags); 1197 spin_unlock_irqrestore(&garmin_data_p->lock, flags);
@@ -1203,7 +1202,7 @@ static void garmin_read_bulk_callback(struct urb *urb)
1203 __func__, retval); 1202 __func__, retval);
1204 } else if (urb->actual_length > 0) { 1203 } else if (urb->actual_length > 0) {
1205 /* Continue trying to read until nothing more is received */ 1204 /* Continue trying to read until nothing more is received */
1206 if (0 == (garmin_data_p->flags & FLAGS_THROTTLED)) { 1205 if ((garmin_data_p->flags & FLAGS_THROTTLED) == 0) {
1207 retval = usb_submit_urb(port->read_urb, GFP_ATOMIC); 1206 retval = usb_submit_urb(port->read_urb, GFP_ATOMIC);
1208 if (retval) 1207 if (retval)
1209 dev_err(&port->dev, 1208 dev_err(&port->dev,
@@ -1249,12 +1248,12 @@ static void garmin_read_int_callback(struct urb *urb)
1249 urb->transfer_buffer); 1248 urb->transfer_buffer);
1250 1249
1251 if (urb->actual_length == sizeof(GARMIN_BULK_IN_AVAIL_REPLY) && 1250 if (urb->actual_length == sizeof(GARMIN_BULK_IN_AVAIL_REPLY) &&
1252 0 == memcmp(data, GARMIN_BULK_IN_AVAIL_REPLY, 1251 memcmp(data, GARMIN_BULK_IN_AVAIL_REPLY,
1253 sizeof(GARMIN_BULK_IN_AVAIL_REPLY))) { 1252 sizeof(GARMIN_BULK_IN_AVAIL_REPLY)) == 0) {
1254 1253
1255 dev_dbg(&port->dev, "%s - bulk data available.\n", __func__); 1254 dev_dbg(&port->dev, "%s - bulk data available.\n", __func__);
1256 1255
1257 if (0 == (garmin_data_p->flags & FLAGS_BULK_IN_ACTIVE)) { 1256 if ((garmin_data_p->flags & FLAGS_BULK_IN_ACTIVE) == 0) {
1258 1257
1259 /* bulk data available */ 1258 /* bulk data available */
1260 retval = usb_submit_urb(port->read_urb, GFP_ATOMIC); 1259 retval = usb_submit_urb(port->read_urb, GFP_ATOMIC);
@@ -1276,8 +1275,8 @@ static void garmin_read_int_callback(struct urb *urb)
1276 } 1275 }
1277 1276
1278 } else if (urb->actual_length == (4+sizeof(GARMIN_START_SESSION_REPLY)) 1277 } else if (urb->actual_length == (4+sizeof(GARMIN_START_SESSION_REPLY))
1279 && 0 == memcmp(data, GARMIN_START_SESSION_REPLY, 1278 && memcmp(data, GARMIN_START_SESSION_REPLY,
1280 sizeof(GARMIN_START_SESSION_REPLY))) { 1279 sizeof(GARMIN_START_SESSION_REPLY)) == 0) {
1281 1280
1282 spin_lock_irqsave(&garmin_data_p->lock, flags); 1281 spin_lock_irqsave(&garmin_data_p->lock, flags);
1283 garmin_data_p->flags |= FLAGS_SESSION_REPLY1_SEEN; 1282 garmin_data_p->flags |= FLAGS_SESSION_REPLY1_SEEN;
@@ -1356,7 +1355,7 @@ static void garmin_unthrottle(struct tty_struct *tty)
1356 if (garmin_data_p->mode == MODE_NATIVE) 1355 if (garmin_data_p->mode == MODE_NATIVE)
1357 garmin_flush_queue(garmin_data_p); 1356 garmin_flush_queue(garmin_data_p);
1358 1357
1359 if (0 != (garmin_data_p->flags & FLAGS_BULK_IN_ACTIVE)) { 1358 if ((garmin_data_p->flags & FLAGS_BULK_IN_ACTIVE) != 0) {
1360 status = usb_submit_urb(port->read_urb, GFP_KERNEL); 1359 status = usb_submit_urb(port->read_urb, GFP_KERNEL);
1361 if (status) 1360 if (status)
1362 dev_err(&port->dev, 1361 dev_err(&port->dev,
diff --git a/drivers/usb/serial/iuu_phoenix.c b/drivers/usb/serial/iuu_phoenix.c
index 5ad4a0fb4b26..344b4eea4bd5 100644
--- a/drivers/usb/serial/iuu_phoenix.c
+++ b/drivers/usb/serial/iuu_phoenix.c
@@ -360,7 +360,7 @@ static void iuu_led_activity_on(struct urb *urb)
360 int result; 360 int result;
361 char *buf_ptr = port->write_urb->transfer_buffer; 361 char *buf_ptr = port->write_urb->transfer_buffer;
362 *buf_ptr++ = IUU_SET_LED; 362 *buf_ptr++ = IUU_SET_LED;
363 if (xmas == 1) { 363 if (xmas) {
364 get_random_bytes(buf_ptr, 6); 364 get_random_bytes(buf_ptr, 6);
365 *(buf_ptr+7) = 1; 365 *(buf_ptr+7) = 1;
366 } else { 366 } else {
@@ -380,7 +380,7 @@ static void iuu_led_activity_off(struct urb *urb)
380 struct usb_serial_port *port = urb->context; 380 struct usb_serial_port *port = urb->context;
381 int result; 381 int result;
382 char *buf_ptr = port->write_urb->transfer_buffer; 382 char *buf_ptr = port->write_urb->transfer_buffer;
383 if (xmas == 1) { 383 if (xmas) {
384 iuu_rxcmd(urb); 384 iuu_rxcmd(urb);
385 return; 385 return;
386 } else { 386 } else {
diff --git a/drivers/usb/serial/keyspan.c b/drivers/usb/serial/keyspan.c
index e07b15ed5814..b6bd8e4a6486 100644
--- a/drivers/usb/serial/keyspan.c
+++ b/drivers/usb/serial/keyspan.c
@@ -1963,7 +1963,7 @@ static int keyspan_usa49_send_setup(struct usb_serial *serial,
1963 if (d_details->product_id == keyspan_usa49wg_product_id) { 1963 if (d_details->product_id == keyspan_usa49wg_product_id) {
1964 dr = (void *)(s_priv->ctrl_buf); 1964 dr = (void *)(s_priv->ctrl_buf);
1965 dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT; 1965 dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT;
1966 dr->bRequest = 0xB0; /* 49wg control message */; 1966 dr->bRequest = 0xB0; /* 49wg control message */
1967 dr->wValue = 0; 1967 dr->wValue = 0;
1968 dr->wIndex = 0; 1968 dr->wIndex = 0;
1969 dr->wLength = cpu_to_le16(sizeof(msg)); 1969 dr->wLength = cpu_to_le16(sizeof(msg));
diff --git a/drivers/usb/serial/kl5kusb105.c b/drivers/usb/serial/kl5kusb105.c
index e020ad28a00c..fc5d3a791e08 100644
--- a/drivers/usb/serial/kl5kusb105.c
+++ b/drivers/usb/serial/kl5kusb105.c
@@ -472,7 +472,6 @@ static void klsi_105_set_termios(struct tty_struct *tty,
472 /* maybe this should be simulated by sending read 472 /* maybe this should be simulated by sending read
473 * disable and read enable messages? 473 * disable and read enable messages?
474 */ 474 */
475 ;
476#if 0 475#if 0
477 priv->control_state &= ~(TIOCM_DTR | TIOCM_RTS); 476 priv->control_state &= ~(TIOCM_DTR | TIOCM_RTS);
478 mct_u232_set_modem_ctrl(serial, priv->control_state); 477 mct_u232_set_modem_ctrl(serial, priv->control_state);
@@ -527,7 +526,6 @@ static void klsi_105_set_termios(struct tty_struct *tty,
527 526
528 mct_u232_set_line_ctrl(serial, priv->last_lcr); 527 mct_u232_set_line_ctrl(serial, priv->last_lcr);
529#endif 528#endif
530 ;
531 } 529 }
532 /* 530 /*
533 * Set flow control: well, I do not really now how to handle DTR/RTS. 531 * Set flow control: well, I do not really now how to handle DTR/RTS.
@@ -546,7 +544,6 @@ static void klsi_105_set_termios(struct tty_struct *tty,
546 priv->control_state &= ~(TIOCM_DTR | TIOCM_RTS); 544 priv->control_state &= ~(TIOCM_DTR | TIOCM_RTS);
547 mct_u232_set_modem_ctrl(serial, priv->control_state); 545 mct_u232_set_modem_ctrl(serial, priv->control_state);
548#endif 546#endif
549 ;
550 } 547 }
551 memcpy(cfg, &priv->cfg, sizeof(*cfg)); 548 memcpy(cfg, &priv->cfg, sizeof(*cfg));
552 spin_unlock_irqrestore(&priv->lock, flags); 549 spin_unlock_irqrestore(&priv->lock, flags);
diff --git a/drivers/usb/serial/mos7840.c b/drivers/usb/serial/mos7840.c
index 02ea975754f5..ed378fb232e7 100644
--- a/drivers/usb/serial/mos7840.c
+++ b/drivers/usb/serial/mos7840.c
@@ -1842,7 +1842,7 @@ static void mos7840_change_port_settings(struct tty_struct *tty,
1842 Data = 0x0c; 1842 Data = 0x0c;
1843 mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data); 1843 mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
1844 1844
1845 if (mos7840_port->read_urb_busy == false) { 1845 if (!mos7840_port->read_urb_busy) {
1846 mos7840_port->read_urb_busy = true; 1846 mos7840_port->read_urb_busy = true;
1847 status = usb_submit_urb(mos7840_port->read_urb, GFP_KERNEL); 1847 status = usb_submit_urb(mos7840_port->read_urb, GFP_KERNEL);
1848 if (status) { 1848 if (status) {
@@ -1906,7 +1906,7 @@ static void mos7840_set_termios(struct tty_struct *tty,
1906 return; 1906 return;
1907 } 1907 }
1908 1908
1909 if (mos7840_port->read_urb_busy == false) { 1909 if (!mos7840_port->read_urb_busy) {
1910 mos7840_port->read_urb_busy = true; 1910 mos7840_port->read_urb_busy = true;
1911 status = usb_submit_urb(mos7840_port->read_urb, GFP_KERNEL); 1911 status = usb_submit_urb(mos7840_port->read_urb, GFP_KERNEL);
1912 if (status) { 1912 if (status) {
diff --git a/drivers/usb/serial/quatech2.c b/drivers/usb/serial/quatech2.c
index 504f5bff79c0..2df8ad5ede89 100644
--- a/drivers/usb/serial/quatech2.c
+++ b/drivers/usb/serial/quatech2.c
@@ -973,7 +973,7 @@ static int qt2_write(struct tty_struct *tty,
973 973
974 data = write_urb->transfer_buffer; 974 data = write_urb->transfer_buffer;
975 spin_lock_irqsave(&port_priv->urb_lock, flags); 975 spin_lock_irqsave(&port_priv->urb_lock, flags);
976 if (port_priv->urb_in_use == true) { 976 if (port_priv->urb_in_use) {
977 dev_err(&port->dev, "qt2_write - urb is in use\n"); 977 dev_err(&port->dev, "qt2_write - urb is in use\n");
978 goto write_out; 978 goto write_out;
979 } 979 }
diff --git a/drivers/usb/serial/safe_serial.c b/drivers/usb/serial/safe_serial.c
index b2dff0f14743..93c6c9b08daa 100644
--- a/drivers/usb/serial/safe_serial.c
+++ b/drivers/usb/serial/safe_serial.c
@@ -76,13 +76,8 @@
76#include <linux/usb.h> 76#include <linux/usb.h>
77#include <linux/usb/serial.h> 77#include <linux/usb/serial.h>
78 78
79 79static bool safe = true;
80#ifndef CONFIG_USB_SERIAL_SAFE_PADDED 80static bool padded = IS_ENABLED(CONFIG_USB_SERIAL_SAFE_PADDED);
81#define CONFIG_USB_SERIAL_SAFE_PADDED 0
82#endif
83
84static bool safe = 1;
85static bool padded = CONFIG_USB_SERIAL_SAFE_PADDED;
86 81
87#define DRIVER_AUTHOR "sl@lineo.com, tbr@lineo.com, Johan Hovold <jhovold@gmail.com>" 82#define DRIVER_AUTHOR "sl@lineo.com, tbr@lineo.com, Johan Hovold <jhovold@gmail.com>"
88#define DRIVER_DESC "USB Safe Encapsulated Serial" 83#define DRIVER_DESC "USB Safe Encapsulated Serial"
@@ -278,7 +273,7 @@ static int safe_startup(struct usb_serial *serial)
278 case LINEO_SAFESERIAL_CRC: 273 case LINEO_SAFESERIAL_CRC:
279 break; 274 break;
280 case LINEO_SAFESERIAL_CRC_PADDED: 275 case LINEO_SAFESERIAL_CRC_PADDED:
281 padded = 1; 276 padded = true;
282 break; 277 break;
283 default: 278 default:
284 return -EINVAL; 279 return -EINVAL;
diff --git a/drivers/usb/storage/debug.c b/drivers/usb/storage/debug.c
index 57bf3ad41fb6..5a12c03138f8 100644
--- a/drivers/usb/storage/debug.c
+++ b/drivers/usb/storage/debug.c
@@ -57,7 +57,6 @@
57void usb_stor_show_command(const struct us_data *us, struct scsi_cmnd *srb) 57void usb_stor_show_command(const struct us_data *us, struct scsi_cmnd *srb)
58{ 58{
59 char *what = NULL; 59 char *what = NULL;
60 int i;
61 60
62 switch (srb->cmnd[0]) { 61 switch (srb->cmnd[0]) {
63 case TEST_UNIT_READY: what = "TEST_UNIT_READY"; break; 62 case TEST_UNIT_READY: what = "TEST_UNIT_READY"; break;
@@ -153,10 +152,8 @@ void usb_stor_show_command(const struct us_data *us, struct scsi_cmnd *srb)
153 default: what = "(unknown command)"; break; 152 default: what = "(unknown command)"; break;
154 } 153 }
155 usb_stor_dbg(us, "Command %s (%d bytes)\n", what, srb->cmd_len); 154 usb_stor_dbg(us, "Command %s (%d bytes)\n", what, srb->cmd_len);
156 usb_stor_dbg(us, "bytes: "); 155 usb_stor_dbg(us, "bytes: %*ph\n", min_t(int, srb->cmd_len, 16),
157 for (i = 0; i < srb->cmd_len && i < 16; i++) 156 (const unsigned char *)srb->cmnd);
158 US_DEBUGPX(" %02x", srb->cmnd[i]);
159 US_DEBUGPX("\n");
160} 157}
161 158
162void usb_stor_show_sense(const struct us_data *us, 159void usb_stor_show_sense(const struct us_data *us,
@@ -174,11 +171,10 @@ void usb_stor_show_sense(const struct us_data *us,
174 if (what == NULL) 171 if (what == NULL)
175 what = "(unknown ASC/ASCQ)"; 172 what = "(unknown ASC/ASCQ)";
176 173
177 usb_stor_dbg(us, "%s: ", keystr);
178 if (fmt) 174 if (fmt)
179 US_DEBUGPX("%s (%s%x)\n", what, fmt, ascq); 175 usb_stor_dbg(us, "%s: %s (%s%x)\n", keystr, what, fmt, ascq);
180 else 176 else
181 US_DEBUGPX("%s\n", what); 177 usb_stor_dbg(us, "%s: %s\n", keystr, what);
182} 178}
183 179
184void usb_stor_dbg(const struct us_data *us, const char *fmt, ...) 180void usb_stor_dbg(const struct us_data *us, const char *fmt, ...)
diff --git a/drivers/usb/storage/debug.h b/drivers/usb/storage/debug.h
index f52520306e1a..6b365ce4e610 100644
--- a/drivers/usb/storage/debug.h
+++ b/drivers/usb/storage/debug.h
@@ -53,7 +53,6 @@ void usb_stor_show_sense(const struct us_data *us, unsigned char key,
53__printf(2, 3) void usb_stor_dbg(const struct us_data *us, 53__printf(2, 3) void usb_stor_dbg(const struct us_data *us,
54 const char *fmt, ...); 54 const char *fmt, ...);
55 55
56#define US_DEBUGPX(fmt, ...) printk(fmt, ##__VA_ARGS__)
57#define US_DEBUG(x) x 56#define US_DEBUG(x) x
58#else 57#else
59__printf(2, 3) 58__printf(2, 3)
@@ -63,8 +62,6 @@ static inline void _usb_stor_dbg(const struct us_data *us,
63} 62}
64#define usb_stor_dbg(us, fmt, ...) \ 63#define usb_stor_dbg(us, fmt, ...) \
65 do { if (0) _usb_stor_dbg(us, fmt, ##__VA_ARGS__); } while (0) 64 do { if (0) _usb_stor_dbg(us, fmt, ##__VA_ARGS__); } while (0)
66#define US_DEBUGPX(fmt, ...) \
67 do { if (0) printk(fmt, ##__VA_ARGS__); } while (0)
68#define US_DEBUG(x) 65#define US_DEBUG(x)
69#endif 66#endif
70 67
diff --git a/drivers/usb/storage/ene_ub6250.c b/drivers/usb/storage/ene_ub6250.c
index f3cf4cecd2b7..d3a17c65a702 100644
--- a/drivers/usb/storage/ene_ub6250.c
+++ b/drivers/usb/storage/ene_ub6250.c
@@ -1067,12 +1067,12 @@ static void ms_lib_free_writebuf(struct us_data *us)
1067 ms_lib_clear_pagemap(info); /* (pdx)->MS_Lib.pagemap memset 0 in ms.h */ 1067 ms_lib_clear_pagemap(info); /* (pdx)->MS_Lib.pagemap memset 0 in ms.h */
1068 1068
1069 if (info->MS_Lib.blkpag) { 1069 if (info->MS_Lib.blkpag) {
1070 kfree((u8 *)(info->MS_Lib.blkpag)); /* Arnold test ... */ 1070 kfree(info->MS_Lib.blkpag); /* Arnold test ... */
1071 info->MS_Lib.blkpag = NULL; 1071 info->MS_Lib.blkpag = NULL;
1072 } 1072 }
1073 1073
1074 if (info->MS_Lib.blkext) { 1074 if (info->MS_Lib.blkext) {
1075 kfree((u8 *)(info->MS_Lib.blkext)); /* Arnold test ... */ 1075 kfree(info->MS_Lib.blkext); /* Arnold test ... */
1076 info->MS_Lib.blkext = NULL; 1076 info->MS_Lib.blkext = NULL;
1077 } 1077 }
1078} 1078}
diff --git a/drivers/usb/storage/sddr09.c b/drivers/usb/storage/sddr09.c
index b74603689b9e..79224fcf9b59 100644
--- a/drivers/usb/storage/sddr09.c
+++ b/drivers/usb/storage/sddr09.c
@@ -1102,24 +1102,24 @@ static int
1102sddr09_get_wp(struct us_data *us, struct sddr09_card_info *info) { 1102sddr09_get_wp(struct us_data *us, struct sddr09_card_info *info) {
1103 int result; 1103 int result;
1104 unsigned char status; 1104 unsigned char status;
1105 const char *wp_fmt;
1105 1106
1106 result = sddr09_read_status(us, &status); 1107 result = sddr09_read_status(us, &status);
1107 if (result) { 1108 if (result) {
1108 usb_stor_dbg(us, "read_status fails\n"); 1109 usb_stor_dbg(us, "read_status fails\n");
1109 return result; 1110 return result;
1110 } 1111 }
1111 usb_stor_dbg(us, "status 0x%02X", status);
1112 if ((status & 0x80) == 0) { 1112 if ((status & 0x80) == 0) {
1113 info->flags |= SDDR09_WP; /* write protected */ 1113 info->flags |= SDDR09_WP; /* write protected */
1114 US_DEBUGPX(" WP"); 1114 wp_fmt = " WP";
1115 } else {
1116 wp_fmt = "";
1115 } 1117 }
1116 if (status & 0x40) 1118 usb_stor_dbg(us, "status 0x%02X%s%s%s%s\n", status, wp_fmt,
1117 US_DEBUGPX(" Ready"); 1119 status & 0x40 ? " Ready" : "",
1118 if (status & LUNBITS) 1120 status & LUNBITS ? " Suspended" : "",
1119 US_DEBUGPX(" Suspended"); 1121 status & 0x01 ? " Error" : "");
1120 if (status & 0x1) 1122
1121 US_DEBUGPX(" Error");
1122 US_DEBUGPX("\n");
1123 return 0; 1123 return 0;
1124} 1124}
1125 1125
diff --git a/drivers/usb/storage/uas.c b/drivers/usb/storage/uas.c
index 9ff9404f99d7..44b096c1737b 100644
--- a/drivers/usb/storage/uas.c
+++ b/drivers/usb/storage/uas.c
@@ -246,6 +246,29 @@ static void uas_xfer_data(struct urb *urb, struct scsi_cmnd *cmnd,
246 } 246 }
247} 247}
248 248
249static bool uas_evaluate_response_iu(struct response_iu *riu, struct scsi_cmnd *cmnd)
250{
251 u8 response_code = riu->response_code;
252
253 switch (response_code) {
254 case RC_INCORRECT_LUN:
255 cmnd->result = DID_BAD_TARGET << 16;
256 break;
257 case RC_TMF_SUCCEEDED:
258 cmnd->result = DID_OK << 16;
259 break;
260 case RC_TMF_NOT_SUPPORTED:
261 cmnd->result = DID_TARGET_FAILURE << 16;
262 break;
263 default:
264 uas_log_cmd_state(cmnd, "response iu", response_code);
265 cmnd->result = DID_ERROR << 16;
266 break;
267 }
268
269 return response_code == RC_TMF_SUCCEEDED;
270}
271
249static void uas_stat_cmplt(struct urb *urb) 272static void uas_stat_cmplt(struct urb *urb)
250{ 273{
251 struct iu *iu = urb->transfer_buffer; 274 struct iu *iu = urb->transfer_buffer;
@@ -258,6 +281,7 @@ static void uas_stat_cmplt(struct urb *urb)
258 unsigned long flags; 281 unsigned long flags;
259 unsigned int idx; 282 unsigned int idx;
260 int status = urb->status; 283 int status = urb->status;
284 bool success;
261 285
262 spin_lock_irqsave(&devinfo->lock, flags); 286 spin_lock_irqsave(&devinfo->lock, flags);
263 287
@@ -313,13 +337,13 @@ static void uas_stat_cmplt(struct urb *urb)
313 uas_xfer_data(urb, cmnd, SUBMIT_DATA_OUT_URB); 337 uas_xfer_data(urb, cmnd, SUBMIT_DATA_OUT_URB);
314 break; 338 break;
315 case IU_ID_RESPONSE: 339 case IU_ID_RESPONSE:
316 uas_log_cmd_state(cmnd, "unexpected response iu",
317 ((struct response_iu *)iu)->response_code);
318 /* Error, cancel data transfers */
319 data_in_urb = usb_get_urb(cmdinfo->data_in_urb);
320 data_out_urb = usb_get_urb(cmdinfo->data_out_urb);
321 cmdinfo->state &= ~COMMAND_INFLIGHT; 340 cmdinfo->state &= ~COMMAND_INFLIGHT;
322 cmnd->result = DID_ERROR << 16; 341 success = uas_evaluate_response_iu((struct response_iu *)iu, cmnd);
342 if (!success) {
343 /* Error, cancel data transfers */
344 data_in_urb = usb_get_urb(cmdinfo->data_in_urb);
345 data_out_urb = usb_get_urb(cmdinfo->data_out_urb);
346 }
323 uas_try_complete(cmnd, __func__); 347 uas_try_complete(cmnd, __func__);
324 break; 348 break;
325 default: 349 default:
diff --git a/drivers/usb/usbip/usbip_event.c b/drivers/usb/usbip/usbip_event.c
index 64933b993d7a..2580a32bcdff 100644
--- a/drivers/usb/usbip/usbip_event.c
+++ b/drivers/usb/usbip/usbip_event.c
@@ -117,11 +117,12 @@ EXPORT_SYMBOL_GPL(usbip_event_add);
117int usbip_event_happened(struct usbip_device *ud) 117int usbip_event_happened(struct usbip_device *ud)
118{ 118{
119 int happened = 0; 119 int happened = 0;
120 unsigned long flags;
120 121
121 spin_lock(&ud->lock); 122 spin_lock_irqsave(&ud->lock, flags);
122 if (ud->event != 0) 123 if (ud->event != 0)
123 happened = 1; 124 happened = 1;
124 spin_unlock(&ud->lock); 125 spin_unlock_irqrestore(&ud->lock, flags);
125 126
126 return happened; 127 return happened;
127} 128}
diff --git a/drivers/usb/usbip/usbip_protocol.txt b/drivers/usb/usbip/usbip_protocol.txt
deleted file mode 100644
index 16b6fe27284c..000000000000
--- a/drivers/usb/usbip/usbip_protocol.txt
+++ /dev/null
@@ -1,358 +0,0 @@
1PRELIMINARY DRAFT, MAY CONTAIN MISTAKES!
228 Jun 2011
3
4The USB/IP protocol follows a server/client architecture. The server exports the
5USB devices and the clients imports them. The device driver for the exported
6USB device runs on the client machine.
7
8The client may ask for the list of the exported USB devices. To get the list the
9client opens a TCP/IP connection towards the server, and sends an OP_REQ_DEVLIST
10packet on top of the TCP/IP connection (so the actual OP_REQ_DEVLIST may be sent
11in one or more pieces at the low level transport layer). The server sends back
12the OP_REP_DEVLIST packet which lists the exported USB devices. Finally the
13TCP/IP connection is closed.
14
15 virtual host controller usb host
16 "client" "server"
17 (imports USB devices) (exports USB devices)
18 | |
19 | OP_REQ_DEVLIST |
20 | ----------------------------------------------> |
21 | |
22 | OP_REP_DEVLIST |
23 | <---------------------------------------------- |
24 | |
25
26Once the client knows the list of exported USB devices it may decide to use one
27of them. First the client opens a TCP/IP connection towards the server and
28sends an OP_REQ_IMPORT packet. The server replies with OP_REP_IMPORT. If the
29import was successful the TCP/IP connection remains open and will be used
30to transfer the URB traffic between the client and the server. The client may
31send two types of packets: the USBIP_CMD_SUBMIT to submit an URB, and
32USBIP_CMD_UNLINK to unlink a previously submitted URB. The answers of the
33server may be USBIP_RET_SUBMIT and USBIP_RET_UNLINK respectively.
34
35 virtual host controller usb host
36 "client" "server"
37 (imports USB devices) (exports USB devices)
38 | |
39 | OP_REQ_IMPORT |
40 | ----------------------------------------------> |
41 | |
42 | OP_REP_IMPORT |
43 | <---------------------------------------------- |
44 | |
45 | |
46 | USBIP_CMD_SUBMIT(seqnum = n) |
47 | ----------------------------------------------> |
48 | |
49 | USBIP_RET_SUBMIT(seqnum = n) |
50 | <---------------------------------------------- |
51 | . |
52 | : |
53 | |
54 | USBIP_CMD_SUBMIT(seqnum = m) |
55 | ----------------------------------------------> |
56 | |
57 | USBIP_CMD_SUBMIT(seqnum = m+1) |
58 | ----------------------------------------------> |
59 | |
60 | USBIP_CMD_SUBMIT(seqnum = m+2) |
61 | ----------------------------------------------> |
62 | |
63 | USBIP_RET_SUBMIT(seqnum = m) |
64 | <---------------------------------------------- |
65 | |
66 | USBIP_CMD_SUBMIT(seqnum = m+3) |
67 | ----------------------------------------------> |
68 | |
69 | USBIP_RET_SUBMIT(seqnum = m+1) |
70 | <---------------------------------------------- |
71 | |
72 | USBIP_CMD_SUBMIT(seqnum = m+4) |
73 | ----------------------------------------------> |
74 | |
75 | USBIP_RET_SUBMIT(seqnum = m+2) |
76 | <---------------------------------------------- |
77 | . |
78 | : |
79 | |
80 | USBIP_CMD_UNLINK |
81 | ----------------------------------------------> |
82 | |
83 | USBIP_RET_UNLINK |
84 | <---------------------------------------------- |
85 | |
86
87The fields are in network (big endian) byte order meaning that the most significant
88byte (MSB) is stored at the lowest address.
89
90
91OP_REQ_DEVLIST: Retrieve the list of exported USB devices.
92
93 Offset | Length | Value | Description
94-----------+--------+------------+---------------------------------------------------
95 0 | 2 | 0x0100 | Binary-coded decimal USBIP version number: v1.0.0
96-----------+--------+------------+---------------------------------------------------
97 2 | 2 | 0x8005 | Command code: Retrieve the list of exported USB
98 | | | devices.
99-----------+--------+------------+---------------------------------------------------
100 4 | 4 | 0x00000000 | Status: unused, shall be set to 0
101
102OP_REP_DEVLIST: Reply with the list of exported USB devices.
103
104 Offset | Length | Value | Description
105-----------+--------+------------+---------------------------------------------------
106 0 | 2 | 0x0100 | Binary-coded decimal USBIP version number: v1.0.0.
107-----------+--------+------------+---------------------------------------------------
108 2 | 2 | 0x0005 | Reply code: The list of exported USB devices.
109-----------+--------+------------+---------------------------------------------------
110 4 | 4 | 0x00000000 | Status: 0 for OK
111-----------+--------+------------+---------------------------------------------------
112 8 | 4 | n | Number of exported devices: 0 means no exported
113 | | | devices.
114-----------+--------+------------+---------------------------------------------------
115 0x0C | | | From now on the exported n devices are described,
116 | | | if any. If no devices are exported the message
117 | | | ends with the previous "number of exported
118 | | | devices" field.
119-----------+--------+------------+---------------------------------------------------
120 | 256 | | path: Path of the device on the host exporting the
121 | | | USB device, string closed with zero byte, e.g.
122 | | | "/sys/devices/pci0000:00/0000:00:1d.1/usb3/3-2"
123 | | | The unused bytes shall be filled with zero
124 | | | bytes.
125-----------+--------+------------+---------------------------------------------------
126 0x10C | 32 | | busid: Bus ID of the exported device, string
127 | | | closed with zero byte, e.g. "3-2". The unused
128 | | | bytes shall be filled with zero bytes.
129-----------+--------+------------+---------------------------------------------------
130 0x12C | 4 | | busnum
131-----------+--------+------------+---------------------------------------------------
132 0x130 | 4 | | devnum
133-----------+--------+------------+---------------------------------------------------
134 0x134 | 4 | | speed
135-----------+--------+------------+---------------------------------------------------
136 0x138 | 2 | | idVendor
137-----------+--------+------------+---------------------------------------------------
138 0x13A | 2 | | idProduct
139-----------+--------+------------+---------------------------------------------------
140 0x13C | 2 | | bcdDevice
141-----------+--------+------------+---------------------------------------------------
142 0x13E | 1 | | bDeviceClass
143-----------+--------+------------+---------------------------------------------------
144 0x13F | 1 | | bDeviceSubClass
145-----------+--------+------------+---------------------------------------------------
146 0x140 | 1 | | bDeviceProtocol
147-----------+--------+------------+---------------------------------------------------
148 0x141 | 1 | | bConfigurationValue
149-----------+--------+------------+---------------------------------------------------
150 0x142 | 1 | | bNumConfigurations
151-----------+--------+------------+---------------------------------------------------
152 0x143 | 1 | | bNumInterfaces
153-----------+--------+------------+---------------------------------------------------
154 0x144 | | m_0 | From now on each interface is described, all
155 | | | together bNumInterfaces times, with the
156 | | | the following 4 fields:
157-----------+--------+------------+---------------------------------------------------
158 | 1 | | bInterfaceClass
159-----------+--------+------------+---------------------------------------------------
160 0x145 | 1 | | bInterfaceSubClass
161-----------+--------+------------+---------------------------------------------------
162 0x146 | 1 | | bInterfaceProtocol
163-----------+--------+------------+---------------------------------------------------
164 0x147 | 1 | | padding byte for alignment, shall be set to zero
165-----------+--------+------------+---------------------------------------------------
166 0xC + | | | The second exported USB device starts at i=1
167 i*0x138 + | | | with the busid field.
168 m_(i-1)*4 | | |
169
170OP_REQ_IMPORT: Request to import (attach) a remote USB device.
171
172 Offset | Length | Value | Description
173-----------+--------+------------+---------------------------------------------------
174 0 | 2 | 0x0100 | Binary-coded decimal USBIP version number: v1.0.0
175-----------+--------+------------+---------------------------------------------------
176 2 | 2 | 0x8003 | Command code: import a remote USB device.
177-----------+--------+------------+---------------------------------------------------
178 4 | 4 | 0x00000000 | Status: unused, shall be set to 0
179-----------+--------+------------+---------------------------------------------------
180 8 | 32 | | busid: the busid of the exported device on the
181 | | | remote host. The possible values are taken
182 | | | from the message field OP_REP_DEVLIST.busid.
183 | | | A string closed with zero, the unused bytes
184 | | | shall be filled with zeros.
185-----------+--------+------------+---------------------------------------------------
186
187OP_REP_IMPORT: Reply to import (attach) a remote USB device.
188
189 Offset | Length | Value | Description
190-----------+--------+------------+---------------------------------------------------
191 0 | 2 | 0x0100 | Binary-coded decimal USBIP version number: v1.0.0
192-----------+--------+------------+---------------------------------------------------
193 2 | 2 | 0x0003 | Reply code: Reply to import.
194-----------+--------+------------+---------------------------------------------------
195 4 | 4 | 0x00000000 | Status: 0 for OK
196 | | | 1 for error
197-----------+--------+------------+---------------------------------------------------
198 8 | | | From now on comes the details of the imported
199 | | | device, if the previous status field was OK (0),
200 | | | otherwise the reply ends with the status field.
201-----------+--------+------------+---------------------------------------------------
202 | 256 | | path: Path of the device on the host exporting the
203 | | | USB device, string closed with zero byte, e.g.
204 | | | "/sys/devices/pci0000:00/0000:00:1d.1/usb3/3-2"
205 | | | The unused bytes shall be filled with zero
206 | | | bytes.
207-----------+--------+------------+---------------------------------------------------
208 0x108 | 32 | | busid: Bus ID of the exported device, string
209 | | | closed with zero byte, e.g. "3-2". The unused
210 | | | bytes shall be filled with zero bytes.
211-----------+--------+------------+---------------------------------------------------
212 0x128 | 4 | | busnum
213-----------+--------+------------+---------------------------------------------------
214 0x12C | 4 | | devnum
215-----------+--------+------------+---------------------------------------------------
216 0x130 | 4 | | speed
217-----------+--------+------------+---------------------------------------------------
218 0x134 | 2 | | idVendor
219-----------+--------+------------+---------------------------------------------------
220 0x136 | 2 | | idProduct
221-----------+--------+------------+---------------------------------------------------
222 0x138 | 2 | | bcdDevice
223-----------+--------+------------+---------------------------------------------------
224 0x139 | 1 | | bDeviceClass
225-----------+--------+------------+---------------------------------------------------
226 0x13A | 1 | | bDeviceSubClass
227-----------+--------+------------+---------------------------------------------------
228 0x13B | 1 | | bDeviceProtocol
229-----------+--------+------------+---------------------------------------------------
230 0x13C | 1 | | bConfigurationValue
231-----------+--------+------------+---------------------------------------------------
232 0x13D | 1 | | bNumConfigurations
233-----------+--------+------------+---------------------------------------------------
234 0x13E | 1 | | bNumInterfaces
235
236USBIP_CMD_SUBMIT: Submit an URB
237
238 Offset | Length | Value | Description
239-----------+--------+------------+---------------------------------------------------
240 0 | 4 | 0x00000001 | command: Submit an URB
241-----------+--------+------------+---------------------------------------------------
242 4 | 4 | | seqnum: the sequence number of the URB to submit
243-----------+--------+------------+---------------------------------------------------
244 8 | 4 | | devid
245-----------+--------+------------+---------------------------------------------------
246 0xC | 4 | | direction: 0: USBIP_DIR_OUT
247 | | | 1: USBIP_DIR_IN
248-----------+--------+------------+---------------------------------------------------
249 0x10 | 4 | | ep: endpoint number, possible values are: 0...15
250-----------+--------+------------+---------------------------------------------------
251 0x14 | 4 | | transfer_flags: possible values depend on the
252 | | | URB transfer type, see below
253-----------+--------+------------+---------------------------------------------------
254 0x18 | 4 | | transfer_buffer_length
255-----------+--------+------------+---------------------------------------------------
256 0x1C | 4 | | start_frame: specify the selected frame to
257 | | | transmit an ISO frame, ignored if URB_ISO_ASAP
258 | | | is specified at transfer_flags
259-----------+--------+------------+---------------------------------------------------
260 0x20 | 4 | | number_of_packets: number of ISO packets
261-----------+--------+------------+---------------------------------------------------
262 0x24 | 4 | | interval: maximum time for the request on the
263 | | | server-side host controller
264-----------+--------+------------+---------------------------------------------------
265 0x28 | 8 | | setup: data bytes for USB setup, filled with
266 | | | zeros if not used
267-----------+--------+------------+---------------------------------------------------
268 0x30 | | | URB data. For ISO transfers the padding between
269 | | | each ISO packets is not transmitted.
270
271
272 Allowed transfer_flags | value | control | interrupt | bulk | isochronous
273 -------------------------+------------+---------+-----------+----------+-------------
274 URB_SHORT_NOT_OK | 0x00000001 | only in | only in | only in | no
275 URB_ISO_ASAP | 0x00000002 | no | no | no | yes
276 URB_NO_TRANSFER_DMA_MAP | 0x00000004 | yes | yes | yes | yes
277 URB_NO_FSBR | 0x00000020 | yes | no | no | no
278 URB_ZERO_PACKET | 0x00000040 | no | no | only out | no
279 URB_NO_INTERRUPT | 0x00000080 | yes | yes | yes | yes
280 URB_FREE_BUFFER | 0x00000100 | yes | yes | yes | yes
281 URB_DIR_MASK | 0x00000200 | yes | yes | yes | yes
282
283
284USBIP_RET_SUBMIT: Reply for submitting an URB
285
286 Offset | Length | Value | Description
287-----------+--------+------------+---------------------------------------------------
288 0 | 4 | 0x00000003 | command
289-----------+--------+------------+---------------------------------------------------
290 4 | 4 | | seqnum: URB sequence number
291-----------+--------+------------+---------------------------------------------------
292 8 | 4 | | devid
293-----------+--------+------------+---------------------------------------------------
294 0xC | 4 | | direction: 0: USBIP_DIR_OUT
295 | | | 1: USBIP_DIR_IN
296-----------+--------+------------+---------------------------------------------------
297 0x10 | 4 | | ep: endpoint number
298-----------+--------+------------+---------------------------------------------------
299 0x14 | 4 | | status: zero for successful URB transaction,
300 | | | otherwise some kind of error happened.
301-----------+--------+------------+---------------------------------------------------
302 0x18 | 4 | n | actual_length: number of URB data bytes
303-----------+--------+------------+---------------------------------------------------
304 0x1C | 4 | | start_frame: for an ISO frame the actually
305 | | | selected frame for transmit.
306-----------+--------+------------+---------------------------------------------------
307 0x20 | 4 | | number_of_packets
308-----------+--------+------------+---------------------------------------------------
309 0x24 | 4 | | error_count
310-----------+--------+------------+---------------------------------------------------
311 0x28 | 8 | | setup: data bytes for USB setup, filled with
312 | | | zeros if not used
313-----------+--------+------------+---------------------------------------------------
314 0x30 | n | | URB data bytes. For ISO transfers the padding
315 | | | between each ISO packets is not transmitted.
316
317USBIP_CMD_UNLINK: Unlink an URB
318
319 Offset | Length | Value | Description
320-----------+--------+------------+---------------------------------------------------
321 0 | 4 | 0x00000002 | command: URB unlink command
322-----------+--------+------------+---------------------------------------------------
323 4 | 4 | | seqnum: URB sequence number to unlink: FIXME: is this so?
324-----------+--------+------------+---------------------------------------------------
325 8 | 4 | | devid
326-----------+--------+------------+---------------------------------------------------
327 0xC | 4 | | direction: 0: USBIP_DIR_OUT
328 | | | 1: USBIP_DIR_IN
329-----------+--------+------------+---------------------------------------------------
330 0x10 | 4 | | ep: endpoint number: zero
331-----------+--------+------------+---------------------------------------------------
332 0x14 | 4 | | seqnum: the URB sequence number given previously
333 | | | at USBIP_CMD_SUBMIT.seqnum field
334-----------+--------+------------+---------------------------------------------------
335 0x30 | n | | URB data bytes. For ISO transfers the padding
336 | | | between each ISO packets is not transmitted.
337
338USBIP_RET_UNLINK: Reply for URB unlink
339
340 Offset | Length | Value | Description
341-----------+--------+------------+---------------------------------------------------
342 0 | 4 | 0x00000004 | command: reply for the URB unlink command
343-----------+--------+------------+---------------------------------------------------
344 4 | 4 | | seqnum: the unlinked URB sequence number
345-----------+--------+------------+---------------------------------------------------
346 8 | 4 | | devid
347-----------+--------+------------+---------------------------------------------------
348 0xC | 4 | | direction: 0: USBIP_DIR_OUT
349 | | | 1: USBIP_DIR_IN
350-----------+--------+------------+---------------------------------------------------
351 0x10 | 4 | | ep: endpoint number
352-----------+--------+------------+---------------------------------------------------
353 0x14 | 4 | | status: This is the value contained in the
354 | | | urb->status in the URB completition handler.
355 | | | FIXME: a better explanation needed.
356-----------+--------+------------+---------------------------------------------------
357 0x30 | n | | URB data bytes. For ISO transfers the padding
358 | | | between each ISO packets is not transmitted.
diff --git a/drivers/usb/usbip/vhci_hcd.c b/drivers/usb/usbip/vhci_hcd.c
index 7fbe19d5279e..fca51105974e 100644
--- a/drivers/usb/usbip/vhci_hcd.c
+++ b/drivers/usb/usbip/vhci_hcd.c
@@ -121,9 +121,11 @@ static void dump_port_status_diff(u32 prev_status, u32 new_status)
121 121
122void rh_port_connect(int rhport, enum usb_device_speed speed) 122void rh_port_connect(int rhport, enum usb_device_speed speed)
123{ 123{
124 unsigned long flags;
125
124 usbip_dbg_vhci_rh("rh_port_connect %d\n", rhport); 126 usbip_dbg_vhci_rh("rh_port_connect %d\n", rhport);
125 127
126 spin_lock(&the_controller->lock); 128 spin_lock_irqsave(&the_controller->lock, flags);
127 129
128 the_controller->port_status[rhport] |= USB_PORT_STAT_CONNECTION 130 the_controller->port_status[rhport] |= USB_PORT_STAT_CONNECTION
129 | (1 << USB_PORT_FEAT_C_CONNECTION); 131 | (1 << USB_PORT_FEAT_C_CONNECTION);
@@ -139,22 +141,24 @@ void rh_port_connect(int rhport, enum usb_device_speed speed)
139 break; 141 break;
140 } 142 }
141 143
142 spin_unlock(&the_controller->lock); 144 spin_unlock_irqrestore(&the_controller->lock, flags);
143 145
144 usb_hcd_poll_rh_status(vhci_to_hcd(the_controller)); 146 usb_hcd_poll_rh_status(vhci_to_hcd(the_controller));
145} 147}
146 148
147static void rh_port_disconnect(int rhport) 149static void rh_port_disconnect(int rhport)
148{ 150{
151 unsigned long flags;
152
149 usbip_dbg_vhci_rh("rh_port_disconnect %d\n", rhport); 153 usbip_dbg_vhci_rh("rh_port_disconnect %d\n", rhport);
150 154
151 spin_lock(&the_controller->lock); 155 spin_lock_irqsave(&the_controller->lock, flags);
152 156
153 the_controller->port_status[rhport] &= ~USB_PORT_STAT_CONNECTION; 157 the_controller->port_status[rhport] &= ~USB_PORT_STAT_CONNECTION;
154 the_controller->port_status[rhport] |= 158 the_controller->port_status[rhport] |=
155 (1 << USB_PORT_FEAT_C_CONNECTION); 159 (1 << USB_PORT_FEAT_C_CONNECTION);
156 160
157 spin_unlock(&the_controller->lock); 161 spin_unlock_irqrestore(&the_controller->lock, flags);
158 usb_hcd_poll_rh_status(vhci_to_hcd(the_controller)); 162 usb_hcd_poll_rh_status(vhci_to_hcd(the_controller));
159} 163}
160 164
@@ -182,13 +186,14 @@ static int vhci_hub_status(struct usb_hcd *hcd, char *buf)
182 int retval; 186 int retval;
183 int rhport; 187 int rhport;
184 int changed = 0; 188 int changed = 0;
189 unsigned long flags;
185 190
186 retval = DIV_ROUND_UP(VHCI_NPORTS + 1, 8); 191 retval = DIV_ROUND_UP(VHCI_NPORTS + 1, 8);
187 memset(buf, 0, retval); 192 memset(buf, 0, retval);
188 193
189 vhci = hcd_to_vhci(hcd); 194 vhci = hcd_to_vhci(hcd);
190 195
191 spin_lock(&vhci->lock); 196 spin_lock_irqsave(&vhci->lock, flags);
192 if (!HCD_HW_ACCESSIBLE(hcd)) { 197 if (!HCD_HW_ACCESSIBLE(hcd)) {
193 usbip_dbg_vhci_rh("hw accessible flag not on?\n"); 198 usbip_dbg_vhci_rh("hw accessible flag not on?\n");
194 goto done; 199 goto done;
@@ -209,7 +214,7 @@ static int vhci_hub_status(struct usb_hcd *hcd, char *buf)
209 usb_hcd_resume_root_hub(hcd); 214 usb_hcd_resume_root_hub(hcd);
210 215
211done: 216done:
212 spin_unlock(&vhci->lock); 217 spin_unlock_irqrestore(&vhci->lock, flags);
213 return changed ? retval : 0; 218 return changed ? retval : 0;
214} 219}
215 220
@@ -231,6 +236,7 @@ static int vhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
231 struct vhci_hcd *dum; 236 struct vhci_hcd *dum;
232 int retval = 0; 237 int retval = 0;
233 int rhport; 238 int rhport;
239 unsigned long flags;
234 240
235 u32 prev_port_status[VHCI_NPORTS]; 241 u32 prev_port_status[VHCI_NPORTS];
236 242
@@ -249,7 +255,7 @@ static int vhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
249 255
250 dum = hcd_to_vhci(hcd); 256 dum = hcd_to_vhci(hcd);
251 257
252 spin_lock(&dum->lock); 258 spin_lock_irqsave(&dum->lock, flags);
253 259
254 /* store old status and compare now and old later */ 260 /* store old status and compare now and old later */
255 if (usbip_dbg_flag_vhci_rh) { 261 if (usbip_dbg_flag_vhci_rh) {
@@ -403,7 +409,7 @@ static int vhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
403 } 409 }
404 usbip_dbg_vhci_rh(" bye\n"); 410 usbip_dbg_vhci_rh(" bye\n");
405 411
406 spin_unlock(&dum->lock); 412 spin_unlock_irqrestore(&dum->lock, flags);
407 413
408 return retval; 414 return retval;
409} 415}
@@ -426,6 +432,7 @@ static void vhci_tx_urb(struct urb *urb)
426{ 432{
427 struct vhci_device *vdev = get_vdev(urb->dev); 433 struct vhci_device *vdev = get_vdev(urb->dev);
428 struct vhci_priv *priv; 434 struct vhci_priv *priv;
435 unsigned long flags;
429 436
430 if (!vdev) { 437 if (!vdev) {
431 pr_err("could not get virtual device"); 438 pr_err("could not get virtual device");
@@ -438,7 +445,7 @@ static void vhci_tx_urb(struct urb *urb)
438 return; 445 return;
439 } 446 }
440 447
441 spin_lock(&vdev->priv_lock); 448 spin_lock_irqsave(&vdev->priv_lock, flags);
442 449
443 priv->seqnum = atomic_inc_return(&the_controller->seqnum); 450 priv->seqnum = atomic_inc_return(&the_controller->seqnum);
444 if (priv->seqnum == 0xffff) 451 if (priv->seqnum == 0xffff)
@@ -452,7 +459,7 @@ static void vhci_tx_urb(struct urb *urb)
452 list_add_tail(&priv->list, &vdev->priv_tx); 459 list_add_tail(&priv->list, &vdev->priv_tx);
453 460
454 wake_up(&vdev->waitq_tx); 461 wake_up(&vdev->waitq_tx);
455 spin_unlock(&vdev->priv_lock); 462 spin_unlock_irqrestore(&vdev->priv_lock, flags);
456} 463}
457 464
458static int vhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, 465static int vhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
@@ -461,6 +468,7 @@ static int vhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
461 struct device *dev = &urb->dev->dev; 468 struct device *dev = &urb->dev->dev;
462 int ret = 0; 469 int ret = 0;
463 struct vhci_device *vdev; 470 struct vhci_device *vdev;
471 unsigned long flags;
464 472
465 usbip_dbg_vhci_hc("enter, usb_hcd %p urb %p mem_flags %d\n", 473 usbip_dbg_vhci_hc("enter, usb_hcd %p urb %p mem_flags %d\n",
466 hcd, urb, mem_flags); 474 hcd, urb, mem_flags);
@@ -468,11 +476,11 @@ static int vhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
468 /* patch to usb_sg_init() is in 2.5.60 */ 476 /* patch to usb_sg_init() is in 2.5.60 */
469 BUG_ON(!urb->transfer_buffer && urb->transfer_buffer_length); 477 BUG_ON(!urb->transfer_buffer && urb->transfer_buffer_length);
470 478
471 spin_lock(&the_controller->lock); 479 spin_lock_irqsave(&the_controller->lock, flags);
472 480
473 if (urb->status != -EINPROGRESS) { 481 if (urb->status != -EINPROGRESS) {
474 dev_err(dev, "URB already unlinked!, status %d\n", urb->status); 482 dev_err(dev, "URB already unlinked!, status %d\n", urb->status);
475 spin_unlock(&the_controller->lock); 483 spin_unlock_irqrestore(&the_controller->lock, flags);
476 return urb->status; 484 return urb->status;
477 } 485 }
478 486
@@ -484,7 +492,7 @@ static int vhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
484 vdev->ud.status == VDEV_ST_ERROR) { 492 vdev->ud.status == VDEV_ST_ERROR) {
485 dev_err(dev, "enqueue for inactive port %d\n", vdev->rhport); 493 dev_err(dev, "enqueue for inactive port %d\n", vdev->rhport);
486 spin_unlock(&vdev->ud.lock); 494 spin_unlock(&vdev->ud.lock);
487 spin_unlock(&the_controller->lock); 495 spin_unlock_irqrestore(&the_controller->lock, flags);
488 return -ENODEV; 496 return -ENODEV;
489 } 497 }
490 spin_unlock(&vdev->ud.lock); 498 spin_unlock(&vdev->ud.lock);
@@ -557,14 +565,14 @@ static int vhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
557 565
558out: 566out:
559 vhci_tx_urb(urb); 567 vhci_tx_urb(urb);
560 spin_unlock(&the_controller->lock); 568 spin_unlock_irqrestore(&the_controller->lock, flags);
561 569
562 return 0; 570 return 0;
563 571
564no_need_xmit: 572no_need_xmit:
565 usb_hcd_unlink_urb_from_ep(hcd, urb); 573 usb_hcd_unlink_urb_from_ep(hcd, urb);
566no_need_unlink: 574no_need_unlink:
567 spin_unlock(&the_controller->lock); 575 spin_unlock_irqrestore(&the_controller->lock, flags);
568 if (!ret) 576 if (!ret)
569 usb_hcd_giveback_urb(vhci_to_hcd(the_controller), 577 usb_hcd_giveback_urb(vhci_to_hcd(the_controller),
570 urb, urb->status); 578 urb, urb->status);
@@ -621,16 +629,17 @@ static int vhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
621{ 629{
622 struct vhci_priv *priv; 630 struct vhci_priv *priv;
623 struct vhci_device *vdev; 631 struct vhci_device *vdev;
632 unsigned long flags;
624 633
625 pr_info("dequeue a urb %p\n", urb); 634 pr_info("dequeue a urb %p\n", urb);
626 635
627 spin_lock(&the_controller->lock); 636 spin_lock_irqsave(&the_controller->lock, flags);
628 637
629 priv = urb->hcpriv; 638 priv = urb->hcpriv;
630 if (!priv) { 639 if (!priv) {
631 /* URB was never linked! or will be soon given back by 640 /* URB was never linked! or will be soon given back by
632 * vhci_rx. */ 641 * vhci_rx. */
633 spin_unlock(&the_controller->lock); 642 spin_unlock_irqrestore(&the_controller->lock, flags);
634 return -EIDRM; 643 return -EIDRM;
635 } 644 }
636 645
@@ -639,7 +648,7 @@ static int vhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
639 648
640 ret = usb_hcd_check_unlink_urb(hcd, urb, status); 649 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
641 if (ret) { 650 if (ret) {
642 spin_unlock(&the_controller->lock); 651 spin_unlock_irqrestore(&the_controller->lock, flags);
643 return ret; 652 return ret;
644 } 653 }
645 } 654 }
@@ -667,10 +676,10 @@ static int vhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
667 676
668 usb_hcd_unlink_urb_from_ep(hcd, urb); 677 usb_hcd_unlink_urb_from_ep(hcd, urb);
669 678
670 spin_unlock(&the_controller->lock); 679 spin_unlock_irqrestore(&the_controller->lock, flags);
671 usb_hcd_giveback_urb(vhci_to_hcd(the_controller), urb, 680 usb_hcd_giveback_urb(vhci_to_hcd(the_controller), urb,
672 urb->status); 681 urb->status);
673 spin_lock(&the_controller->lock); 682 spin_lock_irqsave(&the_controller->lock, flags);
674 683
675 } else { 684 } else {
676 /* tcp connection is alive */ 685 /* tcp connection is alive */
@@ -682,7 +691,7 @@ static int vhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
682 unlink = kzalloc(sizeof(struct vhci_unlink), GFP_ATOMIC); 691 unlink = kzalloc(sizeof(struct vhci_unlink), GFP_ATOMIC);
683 if (!unlink) { 692 if (!unlink) {
684 spin_unlock(&vdev->priv_lock); 693 spin_unlock(&vdev->priv_lock);
685 spin_unlock(&the_controller->lock); 694 spin_unlock_irqrestore(&the_controller->lock, flags);
686 usbip_event_add(&vdev->ud, VDEV_EVENT_ERROR_MALLOC); 695 usbip_event_add(&vdev->ud, VDEV_EVENT_ERROR_MALLOC);
687 return -ENOMEM; 696 return -ENOMEM;
688 } 697 }
@@ -703,7 +712,7 @@ static int vhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
703 spin_unlock(&vdev->priv_lock); 712 spin_unlock(&vdev->priv_lock);
704 } 713 }
705 714
706 spin_unlock(&the_controller->lock); 715 spin_unlock_irqrestore(&the_controller->lock, flags);
707 716
708 usbip_dbg_vhci_hc("leave\n"); 717 usbip_dbg_vhci_hc("leave\n");
709 return 0; 718 return 0;
@@ -712,8 +721,9 @@ static int vhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
712static void vhci_device_unlink_cleanup(struct vhci_device *vdev) 721static void vhci_device_unlink_cleanup(struct vhci_device *vdev)
713{ 722{
714 struct vhci_unlink *unlink, *tmp; 723 struct vhci_unlink *unlink, *tmp;
724 unsigned long flags;
715 725
716 spin_lock(&the_controller->lock); 726 spin_lock_irqsave(&the_controller->lock, flags);
717 spin_lock(&vdev->priv_lock); 727 spin_lock(&vdev->priv_lock);
718 728
719 list_for_each_entry_safe(unlink, tmp, &vdev->unlink_tx, list) { 729 list_for_each_entry_safe(unlink, tmp, &vdev->unlink_tx, list) {
@@ -747,19 +757,19 @@ static void vhci_device_unlink_cleanup(struct vhci_device *vdev)
747 list_del(&unlink->list); 757 list_del(&unlink->list);
748 758
749 spin_unlock(&vdev->priv_lock); 759 spin_unlock(&vdev->priv_lock);
750 spin_unlock(&the_controller->lock); 760 spin_unlock_irqrestore(&the_controller->lock, flags);
751 761
752 usb_hcd_giveback_urb(vhci_to_hcd(the_controller), urb, 762 usb_hcd_giveback_urb(vhci_to_hcd(the_controller), urb,
753 urb->status); 763 urb->status);
754 764
755 spin_lock(&the_controller->lock); 765 spin_lock_irqsave(&the_controller->lock, flags);
756 spin_lock(&vdev->priv_lock); 766 spin_lock(&vdev->priv_lock);
757 767
758 kfree(unlink); 768 kfree(unlink);
759 } 769 }
760 770
761 spin_unlock(&vdev->priv_lock); 771 spin_unlock(&vdev->priv_lock);
762 spin_unlock(&the_controller->lock); 772 spin_unlock_irqrestore(&the_controller->lock, flags);
763} 773}
764 774
765/* 775/*
@@ -826,8 +836,9 @@ static void vhci_shutdown_connection(struct usbip_device *ud)
826static void vhci_device_reset(struct usbip_device *ud) 836static void vhci_device_reset(struct usbip_device *ud)
827{ 837{
828 struct vhci_device *vdev = container_of(ud, struct vhci_device, ud); 838 struct vhci_device *vdev = container_of(ud, struct vhci_device, ud);
839 unsigned long flags;
829 840
830 spin_lock(&ud->lock); 841 spin_lock_irqsave(&ud->lock, flags);
831 842
832 vdev->speed = 0; 843 vdev->speed = 0;
833 vdev->devid = 0; 844 vdev->devid = 0;
@@ -841,14 +852,16 @@ static void vhci_device_reset(struct usbip_device *ud)
841 } 852 }
842 ud->status = VDEV_ST_NULL; 853 ud->status = VDEV_ST_NULL;
843 854
844 spin_unlock(&ud->lock); 855 spin_unlock_irqrestore(&ud->lock, flags);
845} 856}
846 857
847static void vhci_device_unusable(struct usbip_device *ud) 858static void vhci_device_unusable(struct usbip_device *ud)
848{ 859{
849 spin_lock(&ud->lock); 860 unsigned long flags;
861
862 spin_lock_irqsave(&ud->lock, flags);
850 ud->status = VDEV_ST_ERROR; 863 ud->status = VDEV_ST_ERROR;
851 spin_unlock(&ud->lock); 864 spin_unlock_irqrestore(&ud->lock, flags);
852} 865}
853 866
854static void vhci_device_init(struct vhci_device *vdev) 867static void vhci_device_init(struct vhci_device *vdev)
@@ -938,12 +951,13 @@ static int vhci_get_frame_number(struct usb_hcd *hcd)
938static int vhci_bus_suspend(struct usb_hcd *hcd) 951static int vhci_bus_suspend(struct usb_hcd *hcd)
939{ 952{
940 struct vhci_hcd *vhci = hcd_to_vhci(hcd); 953 struct vhci_hcd *vhci = hcd_to_vhci(hcd);
954 unsigned long flags;
941 955
942 dev_dbg(&hcd->self.root_hub->dev, "%s\n", __func__); 956 dev_dbg(&hcd->self.root_hub->dev, "%s\n", __func__);
943 957
944 spin_lock(&vhci->lock); 958 spin_lock_irqsave(&vhci->lock, flags);
945 hcd->state = HC_STATE_SUSPENDED; 959 hcd->state = HC_STATE_SUSPENDED;
946 spin_unlock(&vhci->lock); 960 spin_unlock_irqrestore(&vhci->lock, flags);
947 961
948 return 0; 962 return 0;
949} 963}
@@ -952,15 +966,16 @@ static int vhci_bus_resume(struct usb_hcd *hcd)
952{ 966{
953 struct vhci_hcd *vhci = hcd_to_vhci(hcd); 967 struct vhci_hcd *vhci = hcd_to_vhci(hcd);
954 int rc = 0; 968 int rc = 0;
969 unsigned long flags;
955 970
956 dev_dbg(&hcd->self.root_hub->dev, "%s\n", __func__); 971 dev_dbg(&hcd->self.root_hub->dev, "%s\n", __func__);
957 972
958 spin_lock(&vhci->lock); 973 spin_lock_irqsave(&vhci->lock, flags);
959 if (!HCD_HW_ACCESSIBLE(hcd)) 974 if (!HCD_HW_ACCESSIBLE(hcd))
960 rc = -ESHUTDOWN; 975 rc = -ESHUTDOWN;
961 else 976 else
962 hcd->state = HC_STATE_RUNNING; 977 hcd->state = HC_STATE_RUNNING;
963 spin_unlock(&vhci->lock); 978 spin_unlock_irqrestore(&vhci->lock, flags);
964 979
965 return rc; 980 return rc;
966} 981}
@@ -1058,17 +1073,18 @@ static int vhci_hcd_suspend(struct platform_device *pdev, pm_message_t state)
1058 int rhport = 0; 1073 int rhport = 0;
1059 int connected = 0; 1074 int connected = 0;
1060 int ret = 0; 1075 int ret = 0;
1076 unsigned long flags;
1061 1077
1062 hcd = platform_get_drvdata(pdev); 1078 hcd = platform_get_drvdata(pdev);
1063 1079
1064 spin_lock(&the_controller->lock); 1080 spin_lock_irqsave(&the_controller->lock, flags);
1065 1081
1066 for (rhport = 0; rhport < VHCI_NPORTS; rhport++) 1082 for (rhport = 0; rhport < VHCI_NPORTS; rhport++)
1067 if (the_controller->port_status[rhport] & 1083 if (the_controller->port_status[rhport] &
1068 USB_PORT_STAT_CONNECTION) 1084 USB_PORT_STAT_CONNECTION)
1069 connected += 1; 1085 connected += 1;
1070 1086
1071 spin_unlock(&the_controller->lock); 1087 spin_unlock_irqrestore(&the_controller->lock, flags);
1072 1088
1073 if (connected > 0) { 1089 if (connected > 0) {
1074 dev_info(&pdev->dev, 1090 dev_info(&pdev->dev,
diff --git a/drivers/usb/usbip/vhci_rx.c b/drivers/usb/usbip/vhci_rx.c
index 00e4a54308e4..d656e0edc3d5 100644
--- a/drivers/usb/usbip/vhci_rx.c
+++ b/drivers/usb/usbip/vhci_rx.c
@@ -72,10 +72,11 @@ static void vhci_recv_ret_submit(struct vhci_device *vdev,
72{ 72{
73 struct usbip_device *ud = &vdev->ud; 73 struct usbip_device *ud = &vdev->ud;
74 struct urb *urb; 74 struct urb *urb;
75 unsigned long flags;
75 76
76 spin_lock(&vdev->priv_lock); 77 spin_lock_irqsave(&vdev->priv_lock, flags);
77 urb = pickup_urb_and_free_priv(vdev, pdu->base.seqnum); 78 urb = pickup_urb_and_free_priv(vdev, pdu->base.seqnum);
78 spin_unlock(&vdev->priv_lock); 79 spin_unlock_irqrestore(&vdev->priv_lock, flags);
79 80
80 if (!urb) { 81 if (!urb) {
81 pr_err("cannot find a urb of seqnum %u\n", pdu->base.seqnum); 82 pr_err("cannot find a urb of seqnum %u\n", pdu->base.seqnum);
@@ -104,9 +105,9 @@ static void vhci_recv_ret_submit(struct vhci_device *vdev,
104 105
105 usbip_dbg_vhci_rx("now giveback urb %p\n", urb); 106 usbip_dbg_vhci_rx("now giveback urb %p\n", urb);
106 107
107 spin_lock(&the_controller->lock); 108 spin_lock_irqsave(&the_controller->lock, flags);
108 usb_hcd_unlink_urb_from_ep(vhci_to_hcd(the_controller), urb); 109 usb_hcd_unlink_urb_from_ep(vhci_to_hcd(the_controller), urb);
109 spin_unlock(&the_controller->lock); 110 spin_unlock_irqrestore(&the_controller->lock, flags);
110 111
111 usb_hcd_giveback_urb(vhci_to_hcd(the_controller), urb, urb->status); 112 usb_hcd_giveback_urb(vhci_to_hcd(the_controller), urb, urb->status);
112 113
@@ -117,8 +118,9 @@ static struct vhci_unlink *dequeue_pending_unlink(struct vhci_device *vdev,
117 struct usbip_header *pdu) 118 struct usbip_header *pdu)
118{ 119{
119 struct vhci_unlink *unlink, *tmp; 120 struct vhci_unlink *unlink, *tmp;
121 unsigned long flags;
120 122
121 spin_lock(&vdev->priv_lock); 123 spin_lock_irqsave(&vdev->priv_lock, flags);
122 124
123 list_for_each_entry_safe(unlink, tmp, &vdev->unlink_rx, list) { 125 list_for_each_entry_safe(unlink, tmp, &vdev->unlink_rx, list) {
124 pr_info("unlink->seqnum %lu\n", unlink->seqnum); 126 pr_info("unlink->seqnum %lu\n", unlink->seqnum);
@@ -127,12 +129,12 @@ static struct vhci_unlink *dequeue_pending_unlink(struct vhci_device *vdev,
127 unlink->seqnum); 129 unlink->seqnum);
128 list_del(&unlink->list); 130 list_del(&unlink->list);
129 131
130 spin_unlock(&vdev->priv_lock); 132 spin_unlock_irqrestore(&vdev->priv_lock, flags);
131 return unlink; 133 return unlink;
132 } 134 }
133 } 135 }
134 136
135 spin_unlock(&vdev->priv_lock); 137 spin_unlock_irqrestore(&vdev->priv_lock, flags);
136 138
137 return NULL; 139 return NULL;
138} 140}
@@ -142,6 +144,7 @@ static void vhci_recv_ret_unlink(struct vhci_device *vdev,
142{ 144{
143 struct vhci_unlink *unlink; 145 struct vhci_unlink *unlink;
144 struct urb *urb; 146 struct urb *urb;
147 unsigned long flags;
145 148
146 usbip_dump_header(pdu); 149 usbip_dump_header(pdu);
147 150
@@ -152,9 +155,9 @@ static void vhci_recv_ret_unlink(struct vhci_device *vdev,
152 return; 155 return;
153 } 156 }
154 157
155 spin_lock(&vdev->priv_lock); 158 spin_lock_irqsave(&vdev->priv_lock, flags);
156 urb = pickup_urb_and_free_priv(vdev, unlink->unlink_seqnum); 159 urb = pickup_urb_and_free_priv(vdev, unlink->unlink_seqnum);
157 spin_unlock(&vdev->priv_lock); 160 spin_unlock_irqrestore(&vdev->priv_lock, flags);
158 161
159 if (!urb) { 162 if (!urb) {
160 /* 163 /*
@@ -171,9 +174,9 @@ static void vhci_recv_ret_unlink(struct vhci_device *vdev,
171 urb->status = pdu->u.ret_unlink.status; 174 urb->status = pdu->u.ret_unlink.status;
172 pr_info("urb->status %d\n", urb->status); 175 pr_info("urb->status %d\n", urb->status);
173 176
174 spin_lock(&the_controller->lock); 177 spin_lock_irqsave(&the_controller->lock, flags);
175 usb_hcd_unlink_urb_from_ep(vhci_to_hcd(the_controller), urb); 178 usb_hcd_unlink_urb_from_ep(vhci_to_hcd(the_controller), urb);
176 spin_unlock(&the_controller->lock); 179 spin_unlock_irqrestore(&the_controller->lock, flags);
177 180
178 usb_hcd_giveback_urb(vhci_to_hcd(the_controller), urb, 181 usb_hcd_giveback_urb(vhci_to_hcd(the_controller), urb,
179 urb->status); 182 urb->status);
@@ -185,10 +188,11 @@ static void vhci_recv_ret_unlink(struct vhci_device *vdev,
185static int vhci_priv_tx_empty(struct vhci_device *vdev) 188static int vhci_priv_tx_empty(struct vhci_device *vdev)
186{ 189{
187 int empty = 0; 190 int empty = 0;
191 unsigned long flags;
188 192
189 spin_lock(&vdev->priv_lock); 193 spin_lock_irqsave(&vdev->priv_lock, flags);
190 empty = list_empty(&vdev->priv_rx); 194 empty = list_empty(&vdev->priv_rx);
191 spin_unlock(&vdev->priv_lock); 195 spin_unlock_irqrestore(&vdev->priv_lock, flags);
192 196
193 return empty; 197 return empty;
194} 198}
diff --git a/drivers/usb/usbip/vhci_sysfs.c b/drivers/usb/usbip/vhci_sysfs.c
index 211f43f67ea2..5b5462eb1665 100644
--- a/drivers/usb/usbip/vhci_sysfs.c
+++ b/drivers/usb/usbip/vhci_sysfs.c
@@ -32,10 +32,11 @@ static ssize_t status_show(struct device *dev, struct device_attribute *attr,
32{ 32{
33 char *s = out; 33 char *s = out;
34 int i = 0; 34 int i = 0;
35 unsigned long flags;
35 36
36 BUG_ON(!the_controller || !out); 37 BUG_ON(!the_controller || !out);
37 38
38 spin_lock(&the_controller->lock); 39 spin_lock_irqsave(&the_controller->lock, flags);
39 40
40 /* 41 /*
41 * output example: 42 * output example:
@@ -70,7 +71,7 @@ static ssize_t status_show(struct device *dev, struct device_attribute *attr,
70 spin_unlock(&vdev->ud.lock); 71 spin_unlock(&vdev->ud.lock);
71 } 72 }
72 73
73 spin_unlock(&the_controller->lock); 74 spin_unlock_irqrestore(&the_controller->lock, flags);
74 75
75 return out - s; 76 return out - s;
76} 77}
@@ -80,11 +81,12 @@ static DEVICE_ATTR_RO(status);
80static int vhci_port_disconnect(__u32 rhport) 81static int vhci_port_disconnect(__u32 rhport)
81{ 82{
82 struct vhci_device *vdev; 83 struct vhci_device *vdev;
84 unsigned long flags;
83 85
84 usbip_dbg_vhci_sysfs("enter\n"); 86 usbip_dbg_vhci_sysfs("enter\n");
85 87
86 /* lock */ 88 /* lock */
87 spin_lock(&the_controller->lock); 89 spin_lock_irqsave(&the_controller->lock, flags);
88 90
89 vdev = port_to_vdev(rhport); 91 vdev = port_to_vdev(rhport);
90 92
@@ -94,14 +96,14 @@ static int vhci_port_disconnect(__u32 rhport)
94 96
95 /* unlock */ 97 /* unlock */
96 spin_unlock(&vdev->ud.lock); 98 spin_unlock(&vdev->ud.lock);
97 spin_unlock(&the_controller->lock); 99 spin_unlock_irqrestore(&the_controller->lock, flags);
98 100
99 return -EINVAL; 101 return -EINVAL;
100 } 102 }
101 103
102 /* unlock */ 104 /* unlock */
103 spin_unlock(&vdev->ud.lock); 105 spin_unlock(&vdev->ud.lock);
104 spin_unlock(&the_controller->lock); 106 spin_unlock_irqrestore(&the_controller->lock, flags);
105 107
106 usbip_event_add(&vdev->ud, VDEV_EVENT_DOWN); 108 usbip_event_add(&vdev->ud, VDEV_EVENT_DOWN);
107 109
@@ -177,6 +179,7 @@ static ssize_t store_attach(struct device *dev, struct device_attribute *attr,
177 int sockfd = 0; 179 int sockfd = 0;
178 __u32 rhport = 0, devid = 0, speed = 0; 180 __u32 rhport = 0, devid = 0, speed = 0;
179 int err; 181 int err;
182 unsigned long flags;
180 183
181 /* 184 /*
182 * @rhport: port number of vhci_hcd 185 * @rhport: port number of vhci_hcd
@@ -202,14 +205,14 @@ static ssize_t store_attach(struct device *dev, struct device_attribute *attr,
202 /* now need lock until setting vdev status as used */ 205 /* now need lock until setting vdev status as used */
203 206
204 /* begin a lock */ 207 /* begin a lock */
205 spin_lock(&the_controller->lock); 208 spin_lock_irqsave(&the_controller->lock, flags);
206 vdev = port_to_vdev(rhport); 209 vdev = port_to_vdev(rhport);
207 spin_lock(&vdev->ud.lock); 210 spin_lock(&vdev->ud.lock);
208 211
209 if (vdev->ud.status != VDEV_ST_NULL) { 212 if (vdev->ud.status != VDEV_ST_NULL) {
210 /* end of the lock */ 213 /* end of the lock */
211 spin_unlock(&vdev->ud.lock); 214 spin_unlock(&vdev->ud.lock);
212 spin_unlock(&the_controller->lock); 215 spin_unlock_irqrestore(&the_controller->lock, flags);
213 216
214 sockfd_put(socket); 217 sockfd_put(socket);
215 218
@@ -227,7 +230,7 @@ static ssize_t store_attach(struct device *dev, struct device_attribute *attr,
227 vdev->ud.status = VDEV_ST_NOTASSIGNED; 230 vdev->ud.status = VDEV_ST_NOTASSIGNED;
228 231
229 spin_unlock(&vdev->ud.lock); 232 spin_unlock(&vdev->ud.lock);
230 spin_unlock(&the_controller->lock); 233 spin_unlock_irqrestore(&the_controller->lock, flags);
231 /* end the lock */ 234 /* end the lock */
232 235
233 vdev->ud.tcp_rx = kthread_get_run(vhci_rx_loop, &vdev->ud, "vhci_rx"); 236 vdev->ud.tcp_rx = kthread_get_run(vhci_rx_loop, &vdev->ud, "vhci_rx");
diff --git a/drivers/usb/usbip/vhci_tx.c b/drivers/usb/usbip/vhci_tx.c
index 409fd99f3257..3e7878fe2fd4 100644
--- a/drivers/usb/usbip/vhci_tx.c
+++ b/drivers/usb/usbip/vhci_tx.c
@@ -47,16 +47,17 @@ static void setup_cmd_submit_pdu(struct usbip_header *pdup, struct urb *urb)
47static struct vhci_priv *dequeue_from_priv_tx(struct vhci_device *vdev) 47static struct vhci_priv *dequeue_from_priv_tx(struct vhci_device *vdev)
48{ 48{
49 struct vhci_priv *priv, *tmp; 49 struct vhci_priv *priv, *tmp;
50 unsigned long flags;
50 51
51 spin_lock(&vdev->priv_lock); 52 spin_lock_irqsave(&vdev->priv_lock, flags);
52 53
53 list_for_each_entry_safe(priv, tmp, &vdev->priv_tx, list) { 54 list_for_each_entry_safe(priv, tmp, &vdev->priv_tx, list) {
54 list_move_tail(&priv->list, &vdev->priv_rx); 55 list_move_tail(&priv->list, &vdev->priv_rx);
55 spin_unlock(&vdev->priv_lock); 56 spin_unlock_irqrestore(&vdev->priv_lock, flags);
56 return priv; 57 return priv;
57 } 58 }
58 59
59 spin_unlock(&vdev->priv_lock); 60 spin_unlock_irqrestore(&vdev->priv_lock, flags);
60 61
61 return NULL; 62 return NULL;
62} 63}
@@ -136,16 +137,17 @@ static int vhci_send_cmd_submit(struct vhci_device *vdev)
136static struct vhci_unlink *dequeue_from_unlink_tx(struct vhci_device *vdev) 137static struct vhci_unlink *dequeue_from_unlink_tx(struct vhci_device *vdev)
137{ 138{
138 struct vhci_unlink *unlink, *tmp; 139 struct vhci_unlink *unlink, *tmp;
140 unsigned long flags;
139 141
140 spin_lock(&vdev->priv_lock); 142 spin_lock_irqsave(&vdev->priv_lock, flags);
141 143
142 list_for_each_entry_safe(unlink, tmp, &vdev->unlink_tx, list) { 144 list_for_each_entry_safe(unlink, tmp, &vdev->unlink_tx, list) {
143 list_move_tail(&unlink->list, &vdev->unlink_rx); 145 list_move_tail(&unlink->list, &vdev->unlink_rx);
144 spin_unlock(&vdev->priv_lock); 146 spin_unlock_irqrestore(&vdev->priv_lock, flags);
145 return unlink; 147 return unlink;
146 } 148 }
147 149
148 spin_unlock(&vdev->priv_lock); 150 spin_unlock_irqrestore(&vdev->priv_lock, flags);
149 151
150 return NULL; 152 return NULL;
151} 153}
diff --git a/drivers/usb/wusbcore/wusbhc.h b/drivers/usb/wusbcore/wusbhc.h
index 41838db7f85c..8c5bd000739b 100644
--- a/drivers/usb/wusbcore/wusbhc.h
+++ b/drivers/usb/wusbcore/wusbhc.h
@@ -336,7 +336,7 @@ static inline
336struct usb_hcd *usb_hcd_get_by_usb_dev(struct usb_device *usb_dev) 336struct usb_hcd *usb_hcd_get_by_usb_dev(struct usb_device *usb_dev)
337{ 337{
338 struct usb_hcd *usb_hcd; 338 struct usb_hcd *usb_hcd;
339 usb_hcd = container_of(usb_dev->bus, struct usb_hcd, self); 339 usb_hcd = bus_to_hcd(usb_dev->bus);
340 return usb_get_hcd(usb_hcd); 340 return usb_get_hcd(usb_hcd);
341} 341}
342 342