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authorAntoine Tenart <antoine.tenart@free-electrons.com>2014-10-30 13:41:13 -0400
committerFelipe Balbi <balbi@ti.com>2014-11-03 11:01:25 -0500
commite47d92545c2972bcf3711e7db80f481e402163c7 (patch)
treea84db324fbd565aaa371bc0ef5677456541877e3 /drivers/usb/musb/tusb6010.c
parenta2655e4a8edb66d21b0967940172e83a51d30ef3 (diff)
usb: move the OTG state from the USB PHY to the OTG structure
Before using the PHY framework instead of the USB PHY one, we need to move the OTG state into another place, since it won't be available when USB PHY isn't used. This patch moves the OTG state into the OTG structure, and makes all the needed modifications in the drivers using the OTG state. [ balbi@ti.com : fix build regressions with phy-tahvo.c, musb_dsps.c, phy-isp1301-omap, and chipidea's debug.c ] Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/musb/tusb6010.c')
-rw-r--r--drivers/usb/musb/tusb6010.c40
1 files changed, 20 insertions, 20 deletions
diff --git a/drivers/usb/musb/tusb6010.c b/drivers/usb/musb/tusb6010.c
index 25f02dfc8955..69ca92d6032f 100644
--- a/drivers/usb/musb/tusb6010.c
+++ b/drivers/usb/musb/tusb6010.c
@@ -415,13 +415,13 @@ static void musb_do_idle(unsigned long _musb)
415 415
416 spin_lock_irqsave(&musb->lock, flags); 416 spin_lock_irqsave(&musb->lock, flags);
417 417
418 switch (musb->xceiv->state) { 418 switch (musb->xceiv->otg->state) {
419 case OTG_STATE_A_WAIT_BCON: 419 case OTG_STATE_A_WAIT_BCON:
420 if ((musb->a_wait_bcon != 0) 420 if ((musb->a_wait_bcon != 0)
421 && (musb->idle_timeout == 0 421 && (musb->idle_timeout == 0
422 || time_after(jiffies, musb->idle_timeout))) { 422 || time_after(jiffies, musb->idle_timeout))) {
423 dev_dbg(musb->controller, "Nothing connected %s, turning off VBUS\n", 423 dev_dbg(musb->controller, "Nothing connected %s, turning off VBUS\n",
424 usb_otg_state_string(musb->xceiv->state)); 424 usb_otg_state_string(musb->xceiv->otg->state));
425 } 425 }
426 /* FALLTHROUGH */ 426 /* FALLTHROUGH */
427 case OTG_STATE_A_IDLE: 427 case OTG_STATE_A_IDLE:
@@ -474,9 +474,9 @@ static void tusb_musb_try_idle(struct musb *musb, unsigned long timeout)
474 474
475 /* Never idle if active, or when VBUS timeout is not set as host */ 475 /* Never idle if active, or when VBUS timeout is not set as host */
476 if (musb->is_active || ((musb->a_wait_bcon == 0) 476 if (musb->is_active || ((musb->a_wait_bcon == 0)
477 && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) { 477 && (musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON))) {
478 dev_dbg(musb->controller, "%s active, deleting timer\n", 478 dev_dbg(musb->controller, "%s active, deleting timer\n",
479 usb_otg_state_string(musb->xceiv->state)); 479 usb_otg_state_string(musb->xceiv->otg->state));
480 del_timer(&musb_idle_timer); 480 del_timer(&musb_idle_timer);
481 last_timer = jiffies; 481 last_timer = jiffies;
482 return; 482 return;
@@ -493,7 +493,7 @@ static void tusb_musb_try_idle(struct musb *musb, unsigned long timeout)
493 last_timer = timeout; 493 last_timer = timeout;
494 494
495 dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n", 495 dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n",
496 usb_otg_state_string(musb->xceiv->state), 496 usb_otg_state_string(musb->xceiv->otg->state),
497 (unsigned long)jiffies_to_msecs(timeout - jiffies)); 497 (unsigned long)jiffies_to_msecs(timeout - jiffies));
498 mod_timer(&musb_idle_timer, timeout); 498 mod_timer(&musb_idle_timer, timeout);
499} 499}
@@ -524,7 +524,7 @@ static void tusb_musb_set_vbus(struct musb *musb, int is_on)
524 if (is_on) { 524 if (is_on) {
525 timer = OTG_TIMER_MS(OTG_TIME_A_WAIT_VRISE); 525 timer = OTG_TIMER_MS(OTG_TIME_A_WAIT_VRISE);
526 otg->default_a = 1; 526 otg->default_a = 1;
527 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 527 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
528 devctl |= MUSB_DEVCTL_SESSION; 528 devctl |= MUSB_DEVCTL_SESSION;
529 529
530 conf |= TUSB_DEV_CONF_USB_HOST_MODE; 530 conf |= TUSB_DEV_CONF_USB_HOST_MODE;
@@ -537,16 +537,16 @@ static void tusb_musb_set_vbus(struct musb *musb, int is_on)
537 /* If ID pin is grounded, we want to be a_idle */ 537 /* If ID pin is grounded, we want to be a_idle */
538 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT); 538 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
539 if (!(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS)) { 539 if (!(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS)) {
540 switch (musb->xceiv->state) { 540 switch (musb->xceiv->otg->state) {
541 case OTG_STATE_A_WAIT_VRISE: 541 case OTG_STATE_A_WAIT_VRISE:
542 case OTG_STATE_A_WAIT_BCON: 542 case OTG_STATE_A_WAIT_BCON:
543 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 543 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
544 break; 544 break;
545 case OTG_STATE_A_WAIT_VFALL: 545 case OTG_STATE_A_WAIT_VFALL:
546 musb->xceiv->state = OTG_STATE_A_IDLE; 546 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
547 break; 547 break;
548 default: 548 default:
549 musb->xceiv->state = OTG_STATE_A_IDLE; 549 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
550 } 550 }
551 musb->is_active = 0; 551 musb->is_active = 0;
552 otg->default_a = 1; 552 otg->default_a = 1;
@@ -554,7 +554,7 @@ static void tusb_musb_set_vbus(struct musb *musb, int is_on)
554 } else { 554 } else {
555 musb->is_active = 0; 555 musb->is_active = 0;
556 otg->default_a = 0; 556 otg->default_a = 0;
557 musb->xceiv->state = OTG_STATE_B_IDLE; 557 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
558 MUSB_DEV_MODE(musb); 558 MUSB_DEV_MODE(musb);
559 } 559 }
560 560
@@ -569,7 +569,7 @@ static void tusb_musb_set_vbus(struct musb *musb, int is_on)
569 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); 569 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
570 570
571 dev_dbg(musb->controller, "VBUS %s, devctl %02x otg %3x conf %08x prcm %08x\n", 571 dev_dbg(musb->controller, "VBUS %s, devctl %02x otg %3x conf %08x prcm %08x\n",
572 usb_otg_state_string(musb->xceiv->state), 572 usb_otg_state_string(musb->xceiv->otg->state),
573 musb_readb(musb->mregs, MUSB_DEVCTL), 573 musb_readb(musb->mregs, MUSB_DEVCTL),
574 musb_readl(tbase, TUSB_DEV_OTG_STAT), 574 musb_readl(tbase, TUSB_DEV_OTG_STAT),
575 conf, prcm); 575 conf, prcm);
@@ -668,23 +668,23 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
668 668
669 if (otg_stat & TUSB_DEV_OTG_STAT_SESS_END) { 669 if (otg_stat & TUSB_DEV_OTG_STAT_SESS_END) {
670 dev_dbg(musb->controller, "Forcing disconnect (no interrupt)\n"); 670 dev_dbg(musb->controller, "Forcing disconnect (no interrupt)\n");
671 if (musb->xceiv->state != OTG_STATE_B_IDLE) { 671 if (musb->xceiv->otg->state != OTG_STATE_B_IDLE) {
672 /* INTR_DISCONNECT can hide... */ 672 /* INTR_DISCONNECT can hide... */
673 musb->xceiv->state = OTG_STATE_B_IDLE; 673 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
674 musb->int_usb |= MUSB_INTR_DISCONNECT; 674 musb->int_usb |= MUSB_INTR_DISCONNECT;
675 } 675 }
676 musb->is_active = 0; 676 musb->is_active = 0;
677 } 677 }
678 dev_dbg(musb->controller, "vbus change, %s, otg %03x\n", 678 dev_dbg(musb->controller, "vbus change, %s, otg %03x\n",
679 usb_otg_state_string(musb->xceiv->state), otg_stat); 679 usb_otg_state_string(musb->xceiv->otg->state), otg_stat);
680 idle_timeout = jiffies + (1 * HZ); 680 idle_timeout = jiffies + (1 * HZ);
681 schedule_work(&musb->irq_work); 681 schedule_work(&musb->irq_work);
682 682
683 } else /* A-dev state machine */ { 683 } else /* A-dev state machine */ {
684 dev_dbg(musb->controller, "vbus change, %s, otg %03x\n", 684 dev_dbg(musb->controller, "vbus change, %s, otg %03x\n",
685 usb_otg_state_string(musb->xceiv->state), otg_stat); 685 usb_otg_state_string(musb->xceiv->otg->state), otg_stat);
686 686
687 switch (musb->xceiv->state) { 687 switch (musb->xceiv->otg->state) {
688 case OTG_STATE_A_IDLE: 688 case OTG_STATE_A_IDLE:
689 dev_dbg(musb->controller, "Got SRP, turning on VBUS\n"); 689 dev_dbg(musb->controller, "Got SRP, turning on VBUS\n");
690 musb_platform_set_vbus(musb, 1); 690 musb_platform_set_vbus(musb, 1);
@@ -731,9 +731,9 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
731 u8 devctl; 731 u8 devctl;
732 732
733 dev_dbg(musb->controller, "%s timer, %03x\n", 733 dev_dbg(musb->controller, "%s timer, %03x\n",
734 usb_otg_state_string(musb->xceiv->state), otg_stat); 734 usb_otg_state_string(musb->xceiv->otg->state), otg_stat);
735 735
736 switch (musb->xceiv->state) { 736 switch (musb->xceiv->otg->state) {
737 case OTG_STATE_A_WAIT_VRISE: 737 case OTG_STATE_A_WAIT_VRISE:
738 /* VBUS has probably been valid for a while now, 738 /* VBUS has probably been valid for a while now,
739 * but may well have bounced out of range a bit 739 * but may well have bounced out of range a bit
@@ -745,7 +745,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
745 dev_dbg(musb->controller, "devctl %02x\n", devctl); 745 dev_dbg(musb->controller, "devctl %02x\n", devctl);
746 break; 746 break;
747 } 747 }
748 musb->xceiv->state = OTG_STATE_A_WAIT_BCON; 748 musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON;
749 musb->is_active = 0; 749 musb->is_active = 0;
750 idle_timeout = jiffies 750 idle_timeout = jiffies
751 + msecs_to_jiffies(musb->a_wait_bcon); 751 + msecs_to_jiffies(musb->a_wait_bcon);