diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-12-14 17:57:16 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-12-14 17:57:16 -0500 |
commit | e7cf773d431a63a2417902696fcc9e0ebdc83bbe (patch) | |
tree | 86dbdceb7d91226507a3af0d57e03b0ca664b22e /drivers/usb/musb/musb_core.c | |
parent | 7a02d089695a1217992434f03a78aa32bad85b5c (diff) | |
parent | 81e1dadfb5b2d47aa513ad60b1c9cf0ea17b6514 (diff) |
Merge tag 'usb-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB updates from Greg KH:
"Here's the big set of USB and PHY patches for 3.19-rc1.
The normal churn in the USB gadget area is in here, as well as xhci
and other individual USB driver updates. The PHY tree is also in
here, as there were dependancies on the USB tree.
All of these have been in linux-next"
* tag 'usb-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (351 commits)
arm: omap3: twl: remove usb phy init data
usbip: fix error handling in stub_probe()
usb: gadget: udc: missing curly braces
USB: mos7720: delete some unneeded code
wusb: replace memset by memzero_explicit
usbip: remove unneeded structure
usb: xhci: fix comment for PORT_DEV_REMOVE
xhci: don't use the same variable for stopped and halted rings current TD
xhci: clear extra bits from slot context when setting max exit latency
xhci: cleanup finish_td function
USB: adutux: NULL dereferences on disconnect
usb: chipidea: fix platform_no_drv_owner.cocci warnings
usb: chipidea: Fixed a few typos in comments
Documentation: bindings: add doc for the USB2 ChipIdea USB driver
usb: chipidea: add a usb2 driver for ci13xxx
usb: chipidea: fix phy handling
usb: chipidea: remove duplicate dev_set_drvdata for host_start
usb: chipidea: parameter 'mode' isn't needed for hw_device_reset
usb: chipidea: add controller reset API
usb: chipidea: remove flag CI_HDRC_REQUIRE_TRANSCEIVER
...
Diffstat (limited to 'drivers/usb/musb/musb_core.c')
-rw-r--r-- | drivers/usb/musb/musb_core.c | 335 |
1 files changed, 246 insertions, 89 deletions
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c index b841ee0bff06..55fe0ff6fd87 100644 --- a/drivers/usb/musb/musb_core.c +++ b/drivers/usb/musb/musb_core.c | |||
@@ -224,12 +224,67 @@ static struct usb_phy_io_ops musb_ulpi_access = { | |||
224 | 224 | ||
225 | /*-------------------------------------------------------------------------*/ | 225 | /*-------------------------------------------------------------------------*/ |
226 | 226 | ||
227 | #if !defined(CONFIG_USB_MUSB_TUSB6010) && !defined(CONFIG_USB_MUSB_BLACKFIN) | 227 | static u32 musb_default_fifo_offset(u8 epnum) |
228 | { | ||
229 | return 0x20 + (epnum * 4); | ||
230 | } | ||
231 | |||
232 | /* "flat" mapping: each endpoint has its own i/o address */ | ||
233 | static void musb_flat_ep_select(void __iomem *mbase, u8 epnum) | ||
234 | { | ||
235 | } | ||
236 | |||
237 | static u32 musb_flat_ep_offset(u8 epnum, u16 offset) | ||
238 | { | ||
239 | return 0x100 + (0x10 * epnum) + offset; | ||
240 | } | ||
241 | |||
242 | /* "indexed" mapping: INDEX register controls register bank select */ | ||
243 | static void musb_indexed_ep_select(void __iomem *mbase, u8 epnum) | ||
244 | { | ||
245 | musb_writeb(mbase, MUSB_INDEX, epnum); | ||
246 | } | ||
247 | |||
248 | static u32 musb_indexed_ep_offset(u8 epnum, u16 offset) | ||
249 | { | ||
250 | return 0x10 + offset; | ||
251 | } | ||
252 | |||
253 | static u8 musb_default_readb(const void __iomem *addr, unsigned offset) | ||
254 | { | ||
255 | return __raw_readb(addr + offset); | ||
256 | } | ||
257 | |||
258 | static void musb_default_writeb(void __iomem *addr, unsigned offset, u8 data) | ||
259 | { | ||
260 | __raw_writeb(data, addr + offset); | ||
261 | } | ||
262 | |||
263 | static u16 musb_default_readw(const void __iomem *addr, unsigned offset) | ||
264 | { | ||
265 | return __raw_readw(addr + offset); | ||
266 | } | ||
267 | |||
268 | static void musb_default_writew(void __iomem *addr, unsigned offset, u16 data) | ||
269 | { | ||
270 | __raw_writew(data, addr + offset); | ||
271 | } | ||
272 | |||
273 | static u32 musb_default_readl(const void __iomem *addr, unsigned offset) | ||
274 | { | ||
275 | return __raw_readl(addr + offset); | ||
276 | } | ||
277 | |||
278 | static void musb_default_writel(void __iomem *addr, unsigned offset, u32 data) | ||
279 | { | ||
280 | __raw_writel(data, addr + offset); | ||
281 | } | ||
228 | 282 | ||
229 | /* | 283 | /* |
230 | * Load an endpoint's FIFO | 284 | * Load an endpoint's FIFO |
231 | */ | 285 | */ |
232 | void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src) | 286 | static void musb_default_write_fifo(struct musb_hw_ep *hw_ep, u16 len, |
287 | const u8 *src) | ||
233 | { | 288 | { |
234 | struct musb *musb = hw_ep->musb; | 289 | struct musb *musb = hw_ep->musb; |
235 | void __iomem *fifo = hw_ep->fifo; | 290 | void __iomem *fifo = hw_ep->fifo; |
@@ -270,11 +325,10 @@ void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src) | |||
270 | } | 325 | } |
271 | } | 326 | } |
272 | 327 | ||
273 | #if !defined(CONFIG_USB_MUSB_AM35X) | ||
274 | /* | 328 | /* |
275 | * Unload an endpoint's FIFO | 329 | * Unload an endpoint's FIFO |
276 | */ | 330 | */ |
277 | void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst) | 331 | static void musb_default_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst) |
278 | { | 332 | { |
279 | struct musb *musb = hw_ep->musb; | 333 | struct musb *musb = hw_ep->musb; |
280 | void __iomem *fifo = hw_ep->fifo; | 334 | void __iomem *fifo = hw_ep->fifo; |
@@ -312,10 +366,40 @@ void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst) | |||
312 | ioread8_rep(fifo, dst, len); | 366 | ioread8_rep(fifo, dst, len); |
313 | } | 367 | } |
314 | } | 368 | } |
315 | #endif | ||
316 | 369 | ||
317 | #endif /* normal PIO */ | 370 | /* |
371 | * Old style IO functions | ||
372 | */ | ||
373 | u8 (*musb_readb)(const void __iomem *addr, unsigned offset); | ||
374 | EXPORT_SYMBOL_GPL(musb_readb); | ||
375 | |||
376 | void (*musb_writeb)(void __iomem *addr, unsigned offset, u8 data); | ||
377 | EXPORT_SYMBOL_GPL(musb_writeb); | ||
378 | |||
379 | u16 (*musb_readw)(const void __iomem *addr, unsigned offset); | ||
380 | EXPORT_SYMBOL_GPL(musb_readw); | ||
381 | |||
382 | void (*musb_writew)(void __iomem *addr, unsigned offset, u16 data); | ||
383 | EXPORT_SYMBOL_GPL(musb_writew); | ||
384 | |||
385 | u32 (*musb_readl)(const void __iomem *addr, unsigned offset); | ||
386 | EXPORT_SYMBOL_GPL(musb_readl); | ||
318 | 387 | ||
388 | void (*musb_writel)(void __iomem *addr, unsigned offset, u32 data); | ||
389 | EXPORT_SYMBOL_GPL(musb_writel); | ||
390 | |||
391 | /* | ||
392 | * New style IO functions | ||
393 | */ | ||
394 | void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst) | ||
395 | { | ||
396 | return hw_ep->musb->io.read_fifo(hw_ep, len, dst); | ||
397 | } | ||
398 | |||
399 | void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src) | ||
400 | { | ||
401 | return hw_ep->musb->io.write_fifo(hw_ep, len, src); | ||
402 | } | ||
319 | 403 | ||
320 | /*-------------------------------------------------------------------------*/ | 404 | /*-------------------------------------------------------------------------*/ |
321 | 405 | ||
@@ -360,23 +444,23 @@ static void musb_otg_timer_func(unsigned long data) | |||
360 | unsigned long flags; | 444 | unsigned long flags; |
361 | 445 | ||
362 | spin_lock_irqsave(&musb->lock, flags); | 446 | spin_lock_irqsave(&musb->lock, flags); |
363 | switch (musb->xceiv->state) { | 447 | switch (musb->xceiv->otg->state) { |
364 | case OTG_STATE_B_WAIT_ACON: | 448 | case OTG_STATE_B_WAIT_ACON: |
365 | dev_dbg(musb->controller, "HNP: b_wait_acon timeout; back to b_peripheral\n"); | 449 | dev_dbg(musb->controller, "HNP: b_wait_acon timeout; back to b_peripheral\n"); |
366 | musb_g_disconnect(musb); | 450 | musb_g_disconnect(musb); |
367 | musb->xceiv->state = OTG_STATE_B_PERIPHERAL; | 451 | musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL; |
368 | musb->is_active = 0; | 452 | musb->is_active = 0; |
369 | break; | 453 | break; |
370 | case OTG_STATE_A_SUSPEND: | 454 | case OTG_STATE_A_SUSPEND: |
371 | case OTG_STATE_A_WAIT_BCON: | 455 | case OTG_STATE_A_WAIT_BCON: |
372 | dev_dbg(musb->controller, "HNP: %s timeout\n", | 456 | dev_dbg(musb->controller, "HNP: %s timeout\n", |
373 | usb_otg_state_string(musb->xceiv->state)); | 457 | usb_otg_state_string(musb->xceiv->otg->state)); |
374 | musb_platform_set_vbus(musb, 0); | 458 | musb_platform_set_vbus(musb, 0); |
375 | musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; | 459 | musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL; |
376 | break; | 460 | break; |
377 | default: | 461 | default: |
378 | dev_dbg(musb->controller, "HNP: Unhandled mode %s\n", | 462 | dev_dbg(musb->controller, "HNP: Unhandled mode %s\n", |
379 | usb_otg_state_string(musb->xceiv->state)); | 463 | usb_otg_state_string(musb->xceiv->otg->state)); |
380 | } | 464 | } |
381 | spin_unlock_irqrestore(&musb->lock, flags); | 465 | spin_unlock_irqrestore(&musb->lock, flags); |
382 | } | 466 | } |
@@ -391,19 +475,19 @@ void musb_hnp_stop(struct musb *musb) | |||
391 | u8 reg; | 475 | u8 reg; |
392 | 476 | ||
393 | dev_dbg(musb->controller, "HNP: stop from %s\n", | 477 | dev_dbg(musb->controller, "HNP: stop from %s\n", |
394 | usb_otg_state_string(musb->xceiv->state)); | 478 | usb_otg_state_string(musb->xceiv->otg->state)); |
395 | 479 | ||
396 | switch (musb->xceiv->state) { | 480 | switch (musb->xceiv->otg->state) { |
397 | case OTG_STATE_A_PERIPHERAL: | 481 | case OTG_STATE_A_PERIPHERAL: |
398 | musb_g_disconnect(musb); | 482 | musb_g_disconnect(musb); |
399 | dev_dbg(musb->controller, "HNP: back to %s\n", | 483 | dev_dbg(musb->controller, "HNP: back to %s\n", |
400 | usb_otg_state_string(musb->xceiv->state)); | 484 | usb_otg_state_string(musb->xceiv->otg->state)); |
401 | break; | 485 | break; |
402 | case OTG_STATE_B_HOST: | 486 | case OTG_STATE_B_HOST: |
403 | dev_dbg(musb->controller, "HNP: Disabling HR\n"); | 487 | dev_dbg(musb->controller, "HNP: Disabling HR\n"); |
404 | if (hcd) | 488 | if (hcd) |
405 | hcd->self.is_b_host = 0; | 489 | hcd->self.is_b_host = 0; |
406 | musb->xceiv->state = OTG_STATE_B_PERIPHERAL; | 490 | musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL; |
407 | MUSB_DEV_MODE(musb); | 491 | MUSB_DEV_MODE(musb); |
408 | reg = musb_readb(mbase, MUSB_POWER); | 492 | reg = musb_readb(mbase, MUSB_POWER); |
409 | reg |= MUSB_POWER_SUSPENDM; | 493 | reg |= MUSB_POWER_SUSPENDM; |
@@ -412,7 +496,7 @@ void musb_hnp_stop(struct musb *musb) | |||
412 | break; | 496 | break; |
413 | default: | 497 | default: |
414 | dev_dbg(musb->controller, "HNP: Stopping in unknown state %s\n", | 498 | dev_dbg(musb->controller, "HNP: Stopping in unknown state %s\n", |
415 | usb_otg_state_string(musb->xceiv->state)); | 499 | usb_otg_state_string(musb->xceiv->otg->state)); |
416 | } | 500 | } |
417 | 501 | ||
418 | /* | 502 | /* |
@@ -423,6 +507,7 @@ void musb_hnp_stop(struct musb *musb) | |||
423 | musb->port1_status &= ~(USB_PORT_STAT_C_CONNECTION << 16); | 507 | musb->port1_status &= ~(USB_PORT_STAT_C_CONNECTION << 16); |
424 | } | 508 | } |
425 | 509 | ||
510 | static void musb_generic_disable(struct musb *musb); | ||
426 | /* | 511 | /* |
427 | * Interrupt Service Routine to record USB "global" interrupts. | 512 | * Interrupt Service Routine to record USB "global" interrupts. |
428 | * Since these do not happen often and signify things of | 513 | * Since these do not happen often and signify things of |
@@ -449,13 +534,13 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
449 | */ | 534 | */ |
450 | if (int_usb & MUSB_INTR_RESUME) { | 535 | if (int_usb & MUSB_INTR_RESUME) { |
451 | handled = IRQ_HANDLED; | 536 | handled = IRQ_HANDLED; |
452 | dev_dbg(musb->controller, "RESUME (%s)\n", usb_otg_state_string(musb->xceiv->state)); | 537 | dev_dbg(musb->controller, "RESUME (%s)\n", usb_otg_state_string(musb->xceiv->otg->state)); |
453 | 538 | ||
454 | if (devctl & MUSB_DEVCTL_HM) { | 539 | if (devctl & MUSB_DEVCTL_HM) { |
455 | void __iomem *mbase = musb->mregs; | 540 | void __iomem *mbase = musb->mregs; |
456 | u8 power; | 541 | u8 power; |
457 | 542 | ||
458 | switch (musb->xceiv->state) { | 543 | switch (musb->xceiv->otg->state) { |
459 | case OTG_STATE_A_SUSPEND: | 544 | case OTG_STATE_A_SUSPEND: |
460 | /* remote wakeup? later, GetPortStatus | 545 | /* remote wakeup? later, GetPortStatus |
461 | * will stop RESUME signaling | 546 | * will stop RESUME signaling |
@@ -478,29 +563,26 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
478 | | MUSB_PORT_STAT_RESUME; | 563 | | MUSB_PORT_STAT_RESUME; |
479 | musb->rh_timer = jiffies | 564 | musb->rh_timer = jiffies |
480 | + msecs_to_jiffies(20); | 565 | + msecs_to_jiffies(20); |
481 | schedule_delayed_work( | 566 | musb->need_finish_resume = 1; |
482 | &musb->finish_resume_work, | ||
483 | msecs_to_jiffies(20)); | ||
484 | 567 | ||
485 | musb->xceiv->state = OTG_STATE_A_HOST; | 568 | musb->xceiv->otg->state = OTG_STATE_A_HOST; |
486 | musb->is_active = 1; | 569 | musb->is_active = 1; |
487 | musb_host_resume_root_hub(musb); | ||
488 | break; | 570 | break; |
489 | case OTG_STATE_B_WAIT_ACON: | 571 | case OTG_STATE_B_WAIT_ACON: |
490 | musb->xceiv->state = OTG_STATE_B_PERIPHERAL; | 572 | musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL; |
491 | musb->is_active = 1; | 573 | musb->is_active = 1; |
492 | MUSB_DEV_MODE(musb); | 574 | MUSB_DEV_MODE(musb); |
493 | break; | 575 | break; |
494 | default: | 576 | default: |
495 | WARNING("bogus %s RESUME (%s)\n", | 577 | WARNING("bogus %s RESUME (%s)\n", |
496 | "host", | 578 | "host", |
497 | usb_otg_state_string(musb->xceiv->state)); | 579 | usb_otg_state_string(musb->xceiv->otg->state)); |
498 | } | 580 | } |
499 | } else { | 581 | } else { |
500 | switch (musb->xceiv->state) { | 582 | switch (musb->xceiv->otg->state) { |
501 | case OTG_STATE_A_SUSPEND: | 583 | case OTG_STATE_A_SUSPEND: |
502 | /* possibly DISCONNECT is upcoming */ | 584 | /* possibly DISCONNECT is upcoming */ |
503 | musb->xceiv->state = OTG_STATE_A_HOST; | 585 | musb->xceiv->otg->state = OTG_STATE_A_HOST; |
504 | musb_host_resume_root_hub(musb); | 586 | musb_host_resume_root_hub(musb); |
505 | break; | 587 | break; |
506 | case OTG_STATE_B_WAIT_ACON: | 588 | case OTG_STATE_B_WAIT_ACON: |
@@ -523,7 +605,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
523 | default: | 605 | default: |
524 | WARNING("bogus %s RESUME (%s)\n", | 606 | WARNING("bogus %s RESUME (%s)\n", |
525 | "peripheral", | 607 | "peripheral", |
526 | usb_otg_state_string(musb->xceiv->state)); | 608 | usb_otg_state_string(musb->xceiv->otg->state)); |
527 | } | 609 | } |
528 | } | 610 | } |
529 | } | 611 | } |
@@ -539,7 +621,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
539 | } | 621 | } |
540 | 622 | ||
541 | dev_dbg(musb->controller, "SESSION_REQUEST (%s)\n", | 623 | dev_dbg(musb->controller, "SESSION_REQUEST (%s)\n", |
542 | usb_otg_state_string(musb->xceiv->state)); | 624 | usb_otg_state_string(musb->xceiv->otg->state)); |
543 | 625 | ||
544 | /* IRQ arrives from ID pin sense or (later, if VBUS power | 626 | /* IRQ arrives from ID pin sense or (later, if VBUS power |
545 | * is removed) SRP. responses are time critical: | 627 | * is removed) SRP. responses are time critical: |
@@ -550,7 +632,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
550 | */ | 632 | */ |
551 | musb_writeb(mbase, MUSB_DEVCTL, MUSB_DEVCTL_SESSION); | 633 | musb_writeb(mbase, MUSB_DEVCTL, MUSB_DEVCTL_SESSION); |
552 | musb->ep0_stage = MUSB_EP0_START; | 634 | musb->ep0_stage = MUSB_EP0_START; |
553 | musb->xceiv->state = OTG_STATE_A_IDLE; | 635 | musb->xceiv->otg->state = OTG_STATE_A_IDLE; |
554 | MUSB_HST_MODE(musb); | 636 | MUSB_HST_MODE(musb); |
555 | musb_platform_set_vbus(musb, 1); | 637 | musb_platform_set_vbus(musb, 1); |
556 | 638 | ||
@@ -576,7 +658,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
576 | * REVISIT: do delays from lots of DEBUG_KERNEL checks | 658 | * REVISIT: do delays from lots of DEBUG_KERNEL checks |
577 | * make trouble here, keeping VBUS < 4.4V ? | 659 | * make trouble here, keeping VBUS < 4.4V ? |
578 | */ | 660 | */ |
579 | switch (musb->xceiv->state) { | 661 | switch (musb->xceiv->otg->state) { |
580 | case OTG_STATE_A_HOST: | 662 | case OTG_STATE_A_HOST: |
581 | /* recovery is dicey once we've gotten past the | 663 | /* recovery is dicey once we've gotten past the |
582 | * initial stages of enumeration, but if VBUS | 664 | * initial stages of enumeration, but if VBUS |
@@ -605,7 +687,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
605 | 687 | ||
606 | dev_printk(ignore ? KERN_DEBUG : KERN_ERR, musb->controller, | 688 | dev_printk(ignore ? KERN_DEBUG : KERN_ERR, musb->controller, |
607 | "VBUS_ERROR in %s (%02x, %s), retry #%d, port1 %08x\n", | 689 | "VBUS_ERROR in %s (%02x, %s), retry #%d, port1 %08x\n", |
608 | usb_otg_state_string(musb->xceiv->state), | 690 | usb_otg_state_string(musb->xceiv->otg->state), |
609 | devctl, | 691 | devctl, |
610 | ({ char *s; | 692 | ({ char *s; |
611 | switch (devctl & MUSB_DEVCTL_VBUS) { | 693 | switch (devctl & MUSB_DEVCTL_VBUS) { |
@@ -630,10 +712,10 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
630 | 712 | ||
631 | if (int_usb & MUSB_INTR_SUSPEND) { | 713 | if (int_usb & MUSB_INTR_SUSPEND) { |
632 | dev_dbg(musb->controller, "SUSPEND (%s) devctl %02x\n", | 714 | dev_dbg(musb->controller, "SUSPEND (%s) devctl %02x\n", |
633 | usb_otg_state_string(musb->xceiv->state), devctl); | 715 | usb_otg_state_string(musb->xceiv->otg->state), devctl); |
634 | handled = IRQ_HANDLED; | 716 | handled = IRQ_HANDLED; |
635 | 717 | ||
636 | switch (musb->xceiv->state) { | 718 | switch (musb->xceiv->otg->state) { |
637 | case OTG_STATE_A_PERIPHERAL: | 719 | case OTG_STATE_A_PERIPHERAL: |
638 | /* We also come here if the cable is removed, since | 720 | /* We also come here if the cable is removed, since |
639 | * this silicon doesn't report ID-no-longer-grounded. | 721 | * this silicon doesn't report ID-no-longer-grounded. |
@@ -657,7 +739,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
657 | musb_g_suspend(musb); | 739 | musb_g_suspend(musb); |
658 | musb->is_active = musb->g.b_hnp_enable; | 740 | musb->is_active = musb->g.b_hnp_enable; |
659 | if (musb->is_active) { | 741 | if (musb->is_active) { |
660 | musb->xceiv->state = OTG_STATE_B_WAIT_ACON; | 742 | musb->xceiv->otg->state = OTG_STATE_B_WAIT_ACON; |
661 | dev_dbg(musb->controller, "HNP: Setting timer for b_ase0_brst\n"); | 743 | dev_dbg(musb->controller, "HNP: Setting timer for b_ase0_brst\n"); |
662 | mod_timer(&musb->otg_timer, jiffies | 744 | mod_timer(&musb->otg_timer, jiffies |
663 | + msecs_to_jiffies( | 745 | + msecs_to_jiffies( |
@@ -670,7 +752,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
670 | + msecs_to_jiffies(musb->a_wait_bcon)); | 752 | + msecs_to_jiffies(musb->a_wait_bcon)); |
671 | break; | 753 | break; |
672 | case OTG_STATE_A_HOST: | 754 | case OTG_STATE_A_HOST: |
673 | musb->xceiv->state = OTG_STATE_A_SUSPEND; | 755 | musb->xceiv->otg->state = OTG_STATE_A_SUSPEND; |
674 | musb->is_active = musb->hcd->self.b_hnp_enable; | 756 | musb->is_active = musb->hcd->self.b_hnp_enable; |
675 | break; | 757 | break; |
676 | case OTG_STATE_B_HOST: | 758 | case OTG_STATE_B_HOST: |
@@ -713,7 +795,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
713 | musb->port1_status |= USB_PORT_STAT_LOW_SPEED; | 795 | musb->port1_status |= USB_PORT_STAT_LOW_SPEED; |
714 | 796 | ||
715 | /* indicate new connection to OTG machine */ | 797 | /* indicate new connection to OTG machine */ |
716 | switch (musb->xceiv->state) { | 798 | switch (musb->xceiv->otg->state) { |
717 | case OTG_STATE_B_PERIPHERAL: | 799 | case OTG_STATE_B_PERIPHERAL: |
718 | if (int_usb & MUSB_INTR_SUSPEND) { | 800 | if (int_usb & MUSB_INTR_SUSPEND) { |
719 | dev_dbg(musb->controller, "HNP: SUSPEND+CONNECT, now b_host\n"); | 801 | dev_dbg(musb->controller, "HNP: SUSPEND+CONNECT, now b_host\n"); |
@@ -725,7 +807,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
725 | case OTG_STATE_B_WAIT_ACON: | 807 | case OTG_STATE_B_WAIT_ACON: |
726 | dev_dbg(musb->controller, "HNP: CONNECT, now b_host\n"); | 808 | dev_dbg(musb->controller, "HNP: CONNECT, now b_host\n"); |
727 | b_host: | 809 | b_host: |
728 | musb->xceiv->state = OTG_STATE_B_HOST; | 810 | musb->xceiv->otg->state = OTG_STATE_B_HOST; |
729 | if (musb->hcd) | 811 | if (musb->hcd) |
730 | musb->hcd->self.is_b_host = 1; | 812 | musb->hcd->self.is_b_host = 1; |
731 | del_timer(&musb->otg_timer); | 813 | del_timer(&musb->otg_timer); |
@@ -733,7 +815,7 @@ b_host: | |||
733 | default: | 815 | default: |
734 | if ((devctl & MUSB_DEVCTL_VBUS) | 816 | if ((devctl & MUSB_DEVCTL_VBUS) |
735 | == (3 << MUSB_DEVCTL_VBUS_SHIFT)) { | 817 | == (3 << MUSB_DEVCTL_VBUS_SHIFT)) { |
736 | musb->xceiv->state = OTG_STATE_A_HOST; | 818 | musb->xceiv->otg->state = OTG_STATE_A_HOST; |
737 | if (hcd) | 819 | if (hcd) |
738 | hcd->self.is_b_host = 0; | 820 | hcd->self.is_b_host = 0; |
739 | } | 821 | } |
@@ -743,16 +825,16 @@ b_host: | |||
743 | musb_host_poke_root_hub(musb); | 825 | musb_host_poke_root_hub(musb); |
744 | 826 | ||
745 | dev_dbg(musb->controller, "CONNECT (%s) devctl %02x\n", | 827 | dev_dbg(musb->controller, "CONNECT (%s) devctl %02x\n", |
746 | usb_otg_state_string(musb->xceiv->state), devctl); | 828 | usb_otg_state_string(musb->xceiv->otg->state), devctl); |
747 | } | 829 | } |
748 | 830 | ||
749 | if (int_usb & MUSB_INTR_DISCONNECT) { | 831 | if (int_usb & MUSB_INTR_DISCONNECT) { |
750 | dev_dbg(musb->controller, "DISCONNECT (%s) as %s, devctl %02x\n", | 832 | dev_dbg(musb->controller, "DISCONNECT (%s) as %s, devctl %02x\n", |
751 | usb_otg_state_string(musb->xceiv->state), | 833 | usb_otg_state_string(musb->xceiv->otg->state), |
752 | MUSB_MODE(musb), devctl); | 834 | MUSB_MODE(musb), devctl); |
753 | handled = IRQ_HANDLED; | 835 | handled = IRQ_HANDLED; |
754 | 836 | ||
755 | switch (musb->xceiv->state) { | 837 | switch (musb->xceiv->otg->state) { |
756 | case OTG_STATE_A_HOST: | 838 | case OTG_STATE_A_HOST: |
757 | case OTG_STATE_A_SUSPEND: | 839 | case OTG_STATE_A_SUSPEND: |
758 | musb_host_resume_root_hub(musb); | 840 | musb_host_resume_root_hub(musb); |
@@ -770,7 +852,7 @@ b_host: | |||
770 | musb_root_disconnect(musb); | 852 | musb_root_disconnect(musb); |
771 | if (musb->hcd) | 853 | if (musb->hcd) |
772 | musb->hcd->self.is_b_host = 0; | 854 | musb->hcd->self.is_b_host = 0; |
773 | musb->xceiv->state = OTG_STATE_B_PERIPHERAL; | 855 | musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL; |
774 | MUSB_DEV_MODE(musb); | 856 | MUSB_DEV_MODE(musb); |
775 | musb_g_disconnect(musb); | 857 | musb_g_disconnect(musb); |
776 | break; | 858 | break; |
@@ -786,7 +868,7 @@ b_host: | |||
786 | break; | 868 | break; |
787 | default: | 869 | default: |
788 | WARNING("unhandled DISCONNECT transition (%s)\n", | 870 | WARNING("unhandled DISCONNECT transition (%s)\n", |
789 | usb_otg_state_string(musb->xceiv->state)); | 871 | usb_otg_state_string(musb->xceiv->otg->state)); |
790 | break; | 872 | break; |
791 | } | 873 | } |
792 | } | 874 | } |
@@ -812,15 +894,15 @@ b_host: | |||
812 | } | 894 | } |
813 | } else { | 895 | } else { |
814 | dev_dbg(musb->controller, "BUS RESET as %s\n", | 896 | dev_dbg(musb->controller, "BUS RESET as %s\n", |
815 | usb_otg_state_string(musb->xceiv->state)); | 897 | usb_otg_state_string(musb->xceiv->otg->state)); |
816 | switch (musb->xceiv->state) { | 898 | switch (musb->xceiv->otg->state) { |
817 | case OTG_STATE_A_SUSPEND: | 899 | case OTG_STATE_A_SUSPEND: |
818 | musb_g_reset(musb); | 900 | musb_g_reset(musb); |
819 | /* FALLTHROUGH */ | 901 | /* FALLTHROUGH */ |
820 | case OTG_STATE_A_WAIT_BCON: /* OPT TD.4.7-900ms */ | 902 | case OTG_STATE_A_WAIT_BCON: /* OPT TD.4.7-900ms */ |
821 | /* never use invalid T(a_wait_bcon) */ | 903 | /* never use invalid T(a_wait_bcon) */ |
822 | dev_dbg(musb->controller, "HNP: in %s, %d msec timeout\n", | 904 | dev_dbg(musb->controller, "HNP: in %s, %d msec timeout\n", |
823 | usb_otg_state_string(musb->xceiv->state), | 905 | usb_otg_state_string(musb->xceiv->otg->state), |
824 | TA_WAIT_BCON(musb)); | 906 | TA_WAIT_BCON(musb)); |
825 | mod_timer(&musb->otg_timer, jiffies | 907 | mod_timer(&musb->otg_timer, jiffies |
826 | + msecs_to_jiffies(TA_WAIT_BCON(musb))); | 908 | + msecs_to_jiffies(TA_WAIT_BCON(musb))); |
@@ -831,27 +913,29 @@ b_host: | |||
831 | break; | 913 | break; |
832 | case OTG_STATE_B_WAIT_ACON: | 914 | case OTG_STATE_B_WAIT_ACON: |
833 | dev_dbg(musb->controller, "HNP: RESET (%s), to b_peripheral\n", | 915 | dev_dbg(musb->controller, "HNP: RESET (%s), to b_peripheral\n", |
834 | usb_otg_state_string(musb->xceiv->state)); | 916 | usb_otg_state_string(musb->xceiv->otg->state)); |
835 | musb->xceiv->state = OTG_STATE_B_PERIPHERAL; | 917 | musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL; |
836 | musb_g_reset(musb); | 918 | musb_g_reset(musb); |
837 | break; | 919 | break; |
838 | case OTG_STATE_B_IDLE: | 920 | case OTG_STATE_B_IDLE: |
839 | musb->xceiv->state = OTG_STATE_B_PERIPHERAL; | 921 | musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL; |
840 | /* FALLTHROUGH */ | 922 | /* FALLTHROUGH */ |
841 | case OTG_STATE_B_PERIPHERAL: | 923 | case OTG_STATE_B_PERIPHERAL: |
842 | musb_g_reset(musb); | 924 | musb_g_reset(musb); |
843 | break; | 925 | break; |
844 | default: | 926 | default: |
845 | dev_dbg(musb->controller, "Unhandled BUS RESET as %s\n", | 927 | dev_dbg(musb->controller, "Unhandled BUS RESET as %s\n", |
846 | usb_otg_state_string(musb->xceiv->state)); | 928 | usb_otg_state_string(musb->xceiv->otg->state)); |
847 | } | 929 | } |
848 | } | 930 | } |
849 | } | 931 | } |
850 | 932 | ||
851 | /* handle babble condition */ | 933 | /* handle babble condition */ |
852 | if (int_usb & MUSB_INTR_BABBLE && is_host_active(musb)) | 934 | if (int_usb & MUSB_INTR_BABBLE && is_host_active(musb)) { |
935 | musb_generic_disable(musb); | ||
853 | schedule_delayed_work(&musb->recover_work, | 936 | schedule_delayed_work(&musb->recover_work, |
854 | msecs_to_jiffies(100)); | 937 | msecs_to_jiffies(100)); |
938 | } | ||
855 | 939 | ||
856 | #if 0 | 940 | #if 0 |
857 | /* REVISIT ... this would be for multiplexing periodic endpoints, or | 941 | /* REVISIT ... this would be for multiplexing periodic endpoints, or |
@@ -1032,21 +1116,7 @@ static void musb_shutdown(struct platform_device *pdev) | |||
1032 | * We don't currently use dynamic fifo setup capability to do anything | 1116 | * We don't currently use dynamic fifo setup capability to do anything |
1033 | * more than selecting one of a bunch of predefined configurations. | 1117 | * more than selecting one of a bunch of predefined configurations. |
1034 | */ | 1118 | */ |
1035 | #if defined(CONFIG_USB_MUSB_TUSB6010) \ | 1119 | static ushort fifo_mode; |
1036 | || defined(CONFIG_USB_MUSB_TUSB6010_MODULE) \ | ||
1037 | || defined(CONFIG_USB_MUSB_OMAP2PLUS) \ | ||
1038 | || defined(CONFIG_USB_MUSB_OMAP2PLUS_MODULE) \ | ||
1039 | || defined(CONFIG_USB_MUSB_AM35X) \ | ||
1040 | || defined(CONFIG_USB_MUSB_AM35X_MODULE) \ | ||
1041 | || defined(CONFIG_USB_MUSB_DSPS) \ | ||
1042 | || defined(CONFIG_USB_MUSB_DSPS_MODULE) | ||
1043 | static ushort fifo_mode = 4; | ||
1044 | #elif defined(CONFIG_USB_MUSB_UX500) \ | ||
1045 | || defined(CONFIG_USB_MUSB_UX500_MODULE) | ||
1046 | static ushort fifo_mode = 5; | ||
1047 | #else | ||
1048 | static ushort fifo_mode = 2; | ||
1049 | #endif | ||
1050 | 1120 | ||
1051 | /* "modprobe ... fifo_mode=1" etc */ | 1121 | /* "modprobe ... fifo_mode=1" etc */ |
1052 | module_param(fifo_mode, ushort, 0); | 1122 | module_param(fifo_mode, ushort, 0); |
@@ -1456,20 +1526,25 @@ static int musb_core_init(u16 musb_type, struct musb *musb) | |||
1456 | for (i = 0; i < musb->nr_endpoints; i++) { | 1526 | for (i = 0; i < musb->nr_endpoints; i++) { |
1457 | struct musb_hw_ep *hw_ep = musb->endpoints + i; | 1527 | struct musb_hw_ep *hw_ep = musb->endpoints + i; |
1458 | 1528 | ||
1459 | hw_ep->fifo = MUSB_FIFO_OFFSET(i) + mbase; | 1529 | hw_ep->fifo = musb->io.fifo_offset(i) + mbase; |
1460 | #if defined(CONFIG_USB_MUSB_TUSB6010) || defined (CONFIG_USB_MUSB_TUSB6010_MODULE) | 1530 | #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010) |
1461 | hw_ep->fifo_async = musb->async + 0x400 + MUSB_FIFO_OFFSET(i); | 1531 | if (musb->io.quirks & MUSB_IN_TUSB) { |
1462 | hw_ep->fifo_sync = musb->sync + 0x400 + MUSB_FIFO_OFFSET(i); | 1532 | hw_ep->fifo_async = musb->async + 0x400 + |
1463 | hw_ep->fifo_sync_va = | 1533 | musb->io.fifo_offset(i); |
1464 | musb->sync_va + 0x400 + MUSB_FIFO_OFFSET(i); | 1534 | hw_ep->fifo_sync = musb->sync + 0x400 + |
1465 | 1535 | musb->io.fifo_offset(i); | |
1466 | if (i == 0) | 1536 | hw_ep->fifo_sync_va = |
1467 | hw_ep->conf = mbase - 0x400 + TUSB_EP0_CONF; | 1537 | musb->sync_va + 0x400 + musb->io.fifo_offset(i); |
1468 | else | 1538 | |
1469 | hw_ep->conf = mbase + 0x400 + (((i - 1) & 0xf) << 2); | 1539 | if (i == 0) |
1540 | hw_ep->conf = mbase - 0x400 + TUSB_EP0_CONF; | ||
1541 | else | ||
1542 | hw_ep->conf = mbase + 0x400 + | ||
1543 | (((i - 1) & 0xf) << 2); | ||
1544 | } | ||
1470 | #endif | 1545 | #endif |
1471 | 1546 | ||
1472 | hw_ep->regs = MUSB_EP_OFFSET(i, 0) + mbase; | 1547 | hw_ep->regs = musb->io.ep_offset(i, 0) + mbase; |
1473 | hw_ep->target_regs = musb_read_target_reg_base(i, mbase); | 1548 | hw_ep->target_regs = musb_read_target_reg_base(i, mbase); |
1474 | hw_ep->rx_reinit = 1; | 1549 | hw_ep->rx_reinit = 1; |
1475 | hw_ep->tx_reinit = 1; | 1550 | hw_ep->tx_reinit = 1; |
@@ -1630,7 +1705,7 @@ musb_mode_show(struct device *dev, struct device_attribute *attr, char *buf) | |||
1630 | int ret = -EINVAL; | 1705 | int ret = -EINVAL; |
1631 | 1706 | ||
1632 | spin_lock_irqsave(&musb->lock, flags); | 1707 | spin_lock_irqsave(&musb->lock, flags); |
1633 | ret = sprintf(buf, "%s\n", usb_otg_state_string(musb->xceiv->state)); | 1708 | ret = sprintf(buf, "%s\n", usb_otg_state_string(musb->xceiv->otg->state)); |
1634 | spin_unlock_irqrestore(&musb->lock, flags); | 1709 | spin_unlock_irqrestore(&musb->lock, flags); |
1635 | 1710 | ||
1636 | return ret; | 1711 | return ret; |
@@ -1675,7 +1750,7 @@ musb_vbus_store(struct device *dev, struct device_attribute *attr, | |||
1675 | spin_lock_irqsave(&musb->lock, flags); | 1750 | spin_lock_irqsave(&musb->lock, flags); |
1676 | /* force T(a_wait_bcon) to be zero/unlimited *OR* valid */ | 1751 | /* force T(a_wait_bcon) to be zero/unlimited *OR* valid */ |
1677 | musb->a_wait_bcon = val ? max_t(int, val, OTG_TIME_A_WAIT_BCON) : 0 ; | 1752 | musb->a_wait_bcon = val ? max_t(int, val, OTG_TIME_A_WAIT_BCON) : 0 ; |
1678 | if (musb->xceiv->state == OTG_STATE_A_WAIT_BCON) | 1753 | if (musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON) |
1679 | musb->is_active = 0; | 1754 | musb->is_active = 0; |
1680 | musb_platform_try_idle(musb, jiffies + msecs_to_jiffies(val)); | 1755 | musb_platform_try_idle(musb, jiffies + msecs_to_jiffies(val)); |
1681 | spin_unlock_irqrestore(&musb->lock, flags); | 1756 | spin_unlock_irqrestore(&musb->lock, flags); |
@@ -1743,8 +1818,8 @@ static void musb_irq_work(struct work_struct *data) | |||
1743 | { | 1818 | { |
1744 | struct musb *musb = container_of(data, struct musb, irq_work); | 1819 | struct musb *musb = container_of(data, struct musb, irq_work); |
1745 | 1820 | ||
1746 | if (musb->xceiv->state != musb->xceiv_old_state) { | 1821 | if (musb->xceiv->otg->state != musb->xceiv_old_state) { |
1747 | musb->xceiv_old_state = musb->xceiv->state; | 1822 | musb->xceiv_old_state = musb->xceiv->otg->state; |
1748 | sysfs_notify(&musb->controller->kobj, NULL, "mode"); | 1823 | sysfs_notify(&musb->controller->kobj, NULL, "mode"); |
1749 | } | 1824 | } |
1750 | } | 1825 | } |
@@ -1903,6 +1978,18 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl) | |||
1903 | musb->ops = plat->platform_ops; | 1978 | musb->ops = plat->platform_ops; |
1904 | musb->port_mode = plat->mode; | 1979 | musb->port_mode = plat->mode; |
1905 | 1980 | ||
1981 | /* | ||
1982 | * Initialize the default IO functions. At least omap2430 needs | ||
1983 | * these early. We initialize the platform specific IO functions | ||
1984 | * later on. | ||
1985 | */ | ||
1986 | musb_readb = musb_default_readb; | ||
1987 | musb_writeb = musb_default_writeb; | ||
1988 | musb_readw = musb_default_readw; | ||
1989 | musb_writew = musb_default_writew; | ||
1990 | musb_readl = musb_default_readl; | ||
1991 | musb_writel = musb_default_writel; | ||
1992 | |||
1906 | /* The musb_platform_init() call: | 1993 | /* The musb_platform_init() call: |
1907 | * - adjusts musb->mregs | 1994 | * - adjusts musb->mregs |
1908 | * - sets the musb->isr | 1995 | * - sets the musb->isr |
@@ -1924,6 +2011,57 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl) | |||
1924 | goto fail2; | 2011 | goto fail2; |
1925 | } | 2012 | } |
1926 | 2013 | ||
2014 | if (musb->ops->quirks) | ||
2015 | musb->io.quirks = musb->ops->quirks; | ||
2016 | |||
2017 | /* At least tusb6010 has it's own offsets.. */ | ||
2018 | if (musb->ops->ep_offset) | ||
2019 | musb->io.ep_offset = musb->ops->ep_offset; | ||
2020 | if (musb->ops->ep_select) | ||
2021 | musb->io.ep_select = musb->ops->ep_select; | ||
2022 | |||
2023 | /* ..and some devices use indexed offset or flat offset */ | ||
2024 | if (musb->io.quirks & MUSB_INDEXED_EP) { | ||
2025 | musb->io.ep_offset = musb_indexed_ep_offset; | ||
2026 | musb->io.ep_select = musb_indexed_ep_select; | ||
2027 | } else { | ||
2028 | musb->io.ep_offset = musb_flat_ep_offset; | ||
2029 | musb->io.ep_select = musb_flat_ep_select; | ||
2030 | } | ||
2031 | |||
2032 | if (musb->ops->fifo_mode) | ||
2033 | fifo_mode = musb->ops->fifo_mode; | ||
2034 | else | ||
2035 | fifo_mode = 4; | ||
2036 | |||
2037 | if (musb->ops->fifo_offset) | ||
2038 | musb->io.fifo_offset = musb->ops->fifo_offset; | ||
2039 | else | ||
2040 | musb->io.fifo_offset = musb_default_fifo_offset; | ||
2041 | |||
2042 | if (musb->ops->readb) | ||
2043 | musb_readb = musb->ops->readb; | ||
2044 | if (musb->ops->writeb) | ||
2045 | musb_writeb = musb->ops->writeb; | ||
2046 | if (musb->ops->readw) | ||
2047 | musb_readw = musb->ops->readw; | ||
2048 | if (musb->ops->writew) | ||
2049 | musb_writew = musb->ops->writew; | ||
2050 | if (musb->ops->readl) | ||
2051 | musb_readl = musb->ops->readl; | ||
2052 | if (musb->ops->writel) | ||
2053 | musb_writel = musb->ops->writel; | ||
2054 | |||
2055 | if (musb->ops->read_fifo) | ||
2056 | musb->io.read_fifo = musb->ops->read_fifo; | ||
2057 | else | ||
2058 | musb->io.read_fifo = musb_default_read_fifo; | ||
2059 | |||
2060 | if (musb->ops->write_fifo) | ||
2061 | musb->io.write_fifo = musb->ops->write_fifo; | ||
2062 | else | ||
2063 | musb->io.write_fifo = musb_default_write_fifo; | ||
2064 | |||
1927 | if (!musb->xceiv->io_ops) { | 2065 | if (!musb->xceiv->io_ops) { |
1928 | musb->xceiv->io_dev = musb->controller; | 2066 | musb->xceiv->io_dev = musb->controller; |
1929 | musb->xceiv->io_priv = musb->mregs; | 2067 | musb->xceiv->io_priv = musb->mregs; |
@@ -1983,10 +2121,10 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl) | |||
1983 | 2121 | ||
1984 | if (musb->xceiv->otg->default_a) { | 2122 | if (musb->xceiv->otg->default_a) { |
1985 | MUSB_HST_MODE(musb); | 2123 | MUSB_HST_MODE(musb); |
1986 | musb->xceiv->state = OTG_STATE_A_IDLE; | 2124 | musb->xceiv->otg->state = OTG_STATE_A_IDLE; |
1987 | } else { | 2125 | } else { |
1988 | MUSB_DEV_MODE(musb); | 2126 | MUSB_DEV_MODE(musb); |
1989 | musb->xceiv->state = OTG_STATE_B_IDLE; | 2127 | musb->xceiv->otg->state = OTG_STATE_B_IDLE; |
1990 | } | 2128 | } |
1991 | 2129 | ||
1992 | switch (musb->port_mode) { | 2130 | switch (musb->port_mode) { |
@@ -2080,10 +2218,10 @@ static int musb_probe(struct platform_device *pdev) | |||
2080 | struct resource *iomem; | 2218 | struct resource *iomem; |
2081 | void __iomem *base; | 2219 | void __iomem *base; |
2082 | 2220 | ||
2083 | iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 2221 | if (irq <= 0) |
2084 | if (!iomem || irq <= 0) | ||
2085 | return -ENODEV; | 2222 | return -ENODEV; |
2086 | 2223 | ||
2224 | iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
2087 | base = devm_ioremap_resource(dev, iomem); | 2225 | base = devm_ioremap_resource(dev, iomem); |
2088 | if (IS_ERR(base)) | 2226 | if (IS_ERR(base)) |
2089 | return PTR_ERR(base); | 2227 | return PTR_ERR(base); |
@@ -2297,9 +2435,11 @@ static int musb_suspend(struct device *dev) | |||
2297 | return 0; | 2435 | return 0; |
2298 | } | 2436 | } |
2299 | 2437 | ||
2300 | static int musb_resume_noirq(struct device *dev) | 2438 | static int musb_resume(struct device *dev) |
2301 | { | 2439 | { |
2302 | struct musb *musb = dev_to_musb(dev); | 2440 | struct musb *musb = dev_to_musb(dev); |
2441 | u8 devctl; | ||
2442 | u8 mask; | ||
2303 | 2443 | ||
2304 | /* | 2444 | /* |
2305 | * For static cmos like DaVinci, register values were preserved | 2445 | * For static cmos like DaVinci, register values were preserved |
@@ -2313,6 +2453,23 @@ static int musb_resume_noirq(struct device *dev) | |||
2313 | 2453 | ||
2314 | musb_restore_context(musb); | 2454 | musb_restore_context(musb); |
2315 | 2455 | ||
2456 | devctl = musb_readb(musb->mregs, MUSB_DEVCTL); | ||
2457 | mask = MUSB_DEVCTL_BDEVICE | MUSB_DEVCTL_FSDEV | MUSB_DEVCTL_LSDEV; | ||
2458 | if ((devctl & mask) != (musb->context.devctl & mask)) | ||
2459 | musb->port1_status = 0; | ||
2460 | if (musb->need_finish_resume) { | ||
2461 | musb->need_finish_resume = 0; | ||
2462 | schedule_delayed_work(&musb->finish_resume_work, | ||
2463 | msecs_to_jiffies(20)); | ||
2464 | } | ||
2465 | |||
2466 | /* | ||
2467 | * The USB HUB code expects the device to be in RPM_ACTIVE once it came | ||
2468 | * out of suspend | ||
2469 | */ | ||
2470 | pm_runtime_disable(dev); | ||
2471 | pm_runtime_set_active(dev); | ||
2472 | pm_runtime_enable(dev); | ||
2316 | return 0; | 2473 | return 0; |
2317 | } | 2474 | } |
2318 | 2475 | ||
@@ -2348,7 +2505,7 @@ static int musb_runtime_resume(struct device *dev) | |||
2348 | 2505 | ||
2349 | static const struct dev_pm_ops musb_dev_pm_ops = { | 2506 | static const struct dev_pm_ops musb_dev_pm_ops = { |
2350 | .suspend = musb_suspend, | 2507 | .suspend = musb_suspend, |
2351 | .resume_noirq = musb_resume_noirq, | 2508 | .resume = musb_resume, |
2352 | .runtime_suspend = musb_runtime_suspend, | 2509 | .runtime_suspend = musb_runtime_suspend, |
2353 | .runtime_resume = musb_runtime_resume, | 2510 | .runtime_resume = musb_runtime_resume, |
2354 | }; | 2511 | }; |