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authorJan Andersson <jan@gaisler.com>2011-05-06 06:00:16 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2011-05-06 21:24:01 -0400
commit9faa091a409851ac6b3812164d53644074bc89b1 (patch)
treec7d95c20e9b476261a1ccd7a5f02286be5b7502d /drivers/usb/host
parentc31a65f869f7b8a7039007411c76d7b6f9a63323 (diff)
USB: UHCI: Wrap I/O register accesses
This patch is part of a series that extend the UHCI HCD to support non-PCI controllers. This patch replaces in{b,w,l} and out{b,wl} with calls to local inline functions. This is done so that the register access functions can be extended to support register areas not mapped in PCI I/O space. Signed-off-by: Jan Andersson <jan@gaisler.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host')
-rw-r--r--drivers/usb/host/uhci-debug.c17
-rw-r--r--drivers/usb/host/uhci-hcd.c42
-rw-r--r--drivers/usb/host/uhci-hcd.h30
-rw-r--r--drivers/usb/host/uhci-hub.c35
4 files changed, 77 insertions, 47 deletions
diff --git a/drivers/usb/host/uhci-debug.c b/drivers/usb/host/uhci-debug.c
index ee60cd3ea642..f882a84b1bbb 100644
--- a/drivers/usb/host/uhci-debug.c
+++ b/drivers/usb/host/uhci-debug.c
@@ -285,7 +285,6 @@ static int uhci_show_root_hub_state(struct uhci_hcd *uhci, char *buf, int len)
285static int uhci_show_status(struct uhci_hcd *uhci, char *buf, int len) 285static int uhci_show_status(struct uhci_hcd *uhci, char *buf, int len)
286{ 286{
287 char *out = buf; 287 char *out = buf;
288 unsigned long io_addr = uhci->io_addr;
289 unsigned short usbcmd, usbstat, usbint, usbfrnum; 288 unsigned short usbcmd, usbstat, usbint, usbfrnum;
290 unsigned int flbaseadd; 289 unsigned int flbaseadd;
291 unsigned char sof; 290 unsigned char sof;
@@ -295,14 +294,14 @@ static int uhci_show_status(struct uhci_hcd *uhci, char *buf, int len)
295 if (len < 80 * 9) 294 if (len < 80 * 9)
296 return 0; 295 return 0;
297 296
298 usbcmd = inw(io_addr + 0); 297 usbcmd = uhci_readw(uhci, 0);
299 usbstat = inw(io_addr + 2); 298 usbstat = uhci_readw(uhci, 2);
300 usbint = inw(io_addr + 4); 299 usbint = uhci_readw(uhci, 4);
301 usbfrnum = inw(io_addr + 6); 300 usbfrnum = uhci_readw(uhci, 6);
302 flbaseadd = inl(io_addr + 8); 301 flbaseadd = uhci_readl(uhci, 8);
303 sof = inb(io_addr + 12); 302 sof = uhci_readb(uhci, 12);
304 portsc1 = inw(io_addr + 16); 303 portsc1 = uhci_readw(uhci, 16);
305 portsc2 = inw(io_addr + 18); 304 portsc2 = uhci_readw(uhci, 18);
306 305
307 out += sprintf(out, " usbcmd = %04x %s%s%s%s%s%s%s%s\n", 306 out += sprintf(out, " usbcmd = %04x %s%s%s%s%s%s%s%s\n",
308 usbcmd, 307 usbcmd,
diff --git a/drivers/usb/host/uhci-hcd.c b/drivers/usb/host/uhci-hcd.c
index 3d2a10563be8..5176c537b95a 100644
--- a/drivers/usb/host/uhci-hcd.c
+++ b/drivers/usb/host/uhci-hcd.c
@@ -133,7 +133,7 @@ static void finish_reset(struct uhci_hcd *uhci)
133 * We have to clear them by hand. 133 * We have to clear them by hand.
134 */ 134 */
135 for (port = 0; port < uhci->rh_numports; ++port) 135 for (port = 0; port < uhci->rh_numports; ++port)
136 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2)); 136 uhci_writew(uhci, 0, USBPORTSC1 + (port * 2));
137 137
138 uhci->port_c_suspend = uhci->resuming_ports = 0; 138 uhci->port_c_suspend = uhci->resuming_ports = 0;
139 uhci->rh_state = UHCI_RH_RESET; 139 uhci->rh_state = UHCI_RH_RESET;
@@ -173,14 +173,14 @@ static void check_and_reset_hc(struct uhci_hcd *uhci)
173static void configure_hc(struct uhci_hcd *uhci) 173static void configure_hc(struct uhci_hcd *uhci)
174{ 174{
175 /* Set the frame length to the default: 1 ms exactly */ 175 /* Set the frame length to the default: 1 ms exactly */
176 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF); 176 uhci_writeb(uhci, USBSOF_DEFAULT, USBSOF);
177 177
178 /* Store the frame list base address */ 178 /* Store the frame list base address */
179 outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD); 179 uhci_writel(uhci, uhci->frame_dma_handle, USBFLBASEADD);
180 180
181 /* Set the current frame number */ 181 /* Set the current frame number */
182 outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER, 182 uhci_writew(uhci, uhci->frame_number & UHCI_MAX_SOF_NUMBER,
183 uhci->io_addr + USBFRNUM); 183 USBFRNUM);
184 184
185 /* perform any arch/bus specific configuration */ 185 /* perform any arch/bus specific configuration */
186 if (uhci->configure_hc) 186 if (uhci->configure_hc)
@@ -264,8 +264,8 @@ __acquires(uhci->lock)
264 !int_enable) 264 !int_enable)
265 uhci->RD_enable = int_enable = 0; 265 uhci->RD_enable = int_enable = 0;
266 266
267 outw(int_enable, uhci->io_addr + USBINTR); 267 uhci_writew(uhci, int_enable, USBINTR);
268 outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD); 268 uhci_writew(uhci, egsm_enable | USBCMD_CF, USBCMD);
269 mb(); 269 mb();
270 udelay(5); 270 udelay(5);
271 271
@@ -274,7 +274,7 @@ __acquires(uhci->lock)
274 * controller should stop after a few microseconds. Otherwise 274 * controller should stop after a few microseconds. Otherwise
275 * we will give the controller one frame to stop. 275 * we will give the controller one frame to stop.
276 */ 276 */
277 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) { 277 if (!auto_stop && !(uhci_readw(uhci, USBSTS) & USBSTS_HCH)) {
278 uhci->rh_state = UHCI_RH_SUSPENDING; 278 uhci->rh_state = UHCI_RH_SUSPENDING;
279 spin_unlock_irq(&uhci->lock); 279 spin_unlock_irq(&uhci->lock);
280 msleep(1); 280 msleep(1);
@@ -282,7 +282,7 @@ __acquires(uhci->lock)
282 if (uhci->dead) 282 if (uhci->dead)
283 return; 283 return;
284 } 284 }
285 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) 285 if (!(uhci_readw(uhci, USBSTS) & USBSTS_HCH))
286 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n"); 286 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
287 287
288 uhci_get_current_frame_number(uhci); 288 uhci_get_current_frame_number(uhci);
@@ -309,9 +309,9 @@ static void start_rh(struct uhci_hcd *uhci)
309 /* Mark it configured and running with a 64-byte max packet. 309 /* Mark it configured and running with a 64-byte max packet.
310 * All interrupts are enabled, even though RESUME won't do anything. 310 * All interrupts are enabled, even though RESUME won't do anything.
311 */ 311 */
312 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD); 312 uhci_writew(uhci, USBCMD_RS | USBCMD_CF | USBCMD_MAXP, USBCMD);
313 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP, 313 uhci_writew(uhci, USBINTR_TIMEOUT | USBINTR_RESUME |
314 uhci->io_addr + USBINTR); 314 USBINTR_IOC | USBINTR_SP, USBINTR);
315 mb(); 315 mb();
316 uhci->rh_state = UHCI_RH_RUNNING; 316 uhci->rh_state = UHCI_RH_RUNNING;
317 set_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags); 317 set_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
@@ -334,9 +334,9 @@ __acquires(uhci->lock)
334 unsigned egsm; 334 unsigned egsm;
335 335
336 /* Keep EGSM on if it was set before */ 336 /* Keep EGSM on if it was set before */
337 egsm = inw(uhci->io_addr + USBCMD) & USBCMD_EGSM; 337 egsm = uhci_readw(uhci, USBCMD) & USBCMD_EGSM;
338 uhci->rh_state = UHCI_RH_RESUMING; 338 uhci->rh_state = UHCI_RH_RESUMING;
339 outw(USBCMD_FGR | USBCMD_CF | egsm, uhci->io_addr + USBCMD); 339 uhci_writew(uhci, USBCMD_FGR | USBCMD_CF | egsm, USBCMD);
340 spin_unlock_irq(&uhci->lock); 340 spin_unlock_irq(&uhci->lock);
341 msleep(20); 341 msleep(20);
342 spin_lock_irq(&uhci->lock); 342 spin_lock_irq(&uhci->lock);
@@ -344,10 +344,10 @@ __acquires(uhci->lock)
344 return; 344 return;
345 345
346 /* End Global Resume and wait for EOP to be sent */ 346 /* End Global Resume and wait for EOP to be sent */
347 outw(USBCMD_CF, uhci->io_addr + USBCMD); 347 uhci_writew(uhci, USBCMD_CF, USBCMD);
348 mb(); 348 mb();
349 udelay(4); 349 udelay(4);
350 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR) 350 if (uhci_readw(uhci, USBCMD) & USBCMD_FGR)
351 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n"); 351 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
352 } 352 }
353 353
@@ -367,10 +367,10 @@ static irqreturn_t uhci_irq(struct usb_hcd *hcd)
367 * interrupt cause. Contrary to the UHCI specification, the 367 * interrupt cause. Contrary to the UHCI specification, the
368 * "HC Halted" status bit is persistent: it is RO, not R/WC. 368 * "HC Halted" status bit is persistent: it is RO, not R/WC.
369 */ 369 */
370 status = inw(uhci->io_addr + USBSTS); 370 status = uhci_readw(uhci, USBSTS);
371 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */ 371 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
372 return IRQ_NONE; 372 return IRQ_NONE;
373 outw(status, uhci->io_addr + USBSTS); /* Clear it */ 373 uhci_writew(uhci, status, USBSTS); /* Clear it */
374 374
375 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) { 375 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
376 if (status & USBSTS_HSE) 376 if (status & USBSTS_HSE)
@@ -426,7 +426,7 @@ static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
426 if (!uhci->is_stopped) { 426 if (!uhci->is_stopped) {
427 unsigned delta; 427 unsigned delta;
428 428
429 delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) & 429 delta = (uhci_readw(uhci, USBFRNUM) - uhci->frame_number) &
430 (UHCI_NUMFRAMES - 1); 430 (UHCI_NUMFRAMES - 1);
431 uhci->frame_number += delta; 431 uhci->frame_number += delta;
432 } 432 }
@@ -716,7 +716,7 @@ static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
716 /* Minimize latency by avoiding the spinlock */ 716 /* Minimize latency by avoiding the spinlock */
717 frame_number = uhci->frame_number; 717 frame_number = uhci->frame_number;
718 barrier(); 718 barrier();
719 delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) & 719 delta = (uhci_readw(uhci, USBFRNUM) - frame_number) &
720 (UHCI_NUMFRAMES - 1); 720 (UHCI_NUMFRAMES - 1);
721 return frame_number + delta; 721 return frame_number + delta;
722} 722}
@@ -739,7 +739,7 @@ static int uhci_count_ports(struct usb_hcd *hcd)
739 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) { 739 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
740 unsigned int portstatus; 740 unsigned int portstatus;
741 741
742 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2)); 742 portstatus = uhci_readw(uhci, USBPORTSC1 + (port * 2));
743 if (!(portstatus & 0x0080) || portstatus == 0xffff) 743 if (!(portstatus & 0x0080) || portstatus == 0xffff)
744 break; 744 break;
745 } 745 }
diff --git a/drivers/usb/host/uhci-hcd.h b/drivers/usb/host/uhci-hcd.h
index 569437954578..a6de241bf966 100644
--- a/drivers/usb/host/uhci-hcd.h
+++ b/drivers/usb/host/uhci-hcd.h
@@ -481,4 +481,34 @@ struct urb_priv {
481#define PCI_VENDOR_ID_GENESYS 0x17a0 481#define PCI_VENDOR_ID_GENESYS 0x17a0
482#define PCI_DEVICE_ID_GL880S_UHCI 0x8083 482#define PCI_DEVICE_ID_GL880S_UHCI 0x8083
483 483
484static inline u32 uhci_readl(struct uhci_hcd *uhci, int reg)
485{
486 return inl(uhci->io_addr + reg);
487}
488
489static inline void uhci_writel(struct uhci_hcd *uhci, u32 val, int reg)
490{
491 outl(val, uhci->io_addr + reg);
492}
493
494static inline u16 uhci_readw(struct uhci_hcd *uhci, int reg)
495{
496 return inw(uhci->io_addr + reg);
497}
498
499static inline void uhci_writew(struct uhci_hcd *uhci, u16 val, int reg)
500{
501 outw(val, uhci->io_addr + reg);
502}
503
504static inline u8 uhci_readb(struct uhci_hcd *uhci, int reg)
505{
506 return inb(uhci->io_addr + reg);
507}
508
509static inline void uhci_writeb(struct uhci_hcd *uhci, u8 val, int reg)
510{
511 outb(val, uhci->io_addr + reg);
512}
513
484#endif 514#endif
diff --git a/drivers/usb/host/uhci-hub.c b/drivers/usb/host/uhci-hub.c
index 75418265488d..045cde4cbc3d 100644
--- a/drivers/usb/host/uhci-hub.c
+++ b/drivers/usb/host/uhci-hub.c
@@ -44,7 +44,7 @@ static int any_ports_active(struct uhci_hcd *uhci)
44 int port; 44 int port;
45 45
46 for (port = 0; port < uhci->rh_numports; ++port) { 46 for (port = 0; port < uhci->rh_numports; ++port) {
47 if ((inw(uhci->io_addr + USBPORTSC1 + port * 2) & 47 if ((uhci_readw(uhci, USBPORTSC1 + port * 2) &
48 (USBPORTSC_CCS | RWC_BITS)) || 48 (USBPORTSC_CCS | RWC_BITS)) ||
49 test_bit(port, &uhci->port_c_suspend)) 49 test_bit(port, &uhci->port_c_suspend))
50 return 1; 50 return 1;
@@ -68,7 +68,7 @@ static inline int get_hub_status_data(struct uhci_hcd *uhci, char *buf)
68 68
69 *buf = 0; 69 *buf = 0;
70 for (port = 0; port < uhci->rh_numports; ++port) { 70 for (port = 0; port < uhci->rh_numports; ++port) {
71 if ((inw(uhci->io_addr + USBPORTSC1 + port * 2) & mask) || 71 if ((uhci_readw(uhci, USBPORTSC1 + port * 2) & mask) ||
72 test_bit(port, &uhci->port_c_suspend)) 72 test_bit(port, &uhci->port_c_suspend))
73 *buf |= (1 << (port + 1)); 73 *buf |= (1 << (port + 1));
74 } 74 }
@@ -78,17 +78,17 @@ static inline int get_hub_status_data(struct uhci_hcd *uhci, char *buf)
78#define OK(x) len = (x); break 78#define OK(x) len = (x); break
79 79
80#define CLR_RH_PORTSTAT(x) \ 80#define CLR_RH_PORTSTAT(x) \
81 status = inw(port_addr); \ 81 status = uhci_readw(uhci, port_addr); \
82 status &= ~(RWC_BITS|WZ_BITS); \ 82 status &= ~(RWC_BITS|WZ_BITS); \
83 status &= ~(x); \ 83 status &= ~(x); \
84 status |= RWC_BITS & (x); \ 84 status |= RWC_BITS & (x); \
85 outw(status, port_addr) 85 uhci_writew(uhci, status, port_addr)
86 86
87#define SET_RH_PORTSTAT(x) \ 87#define SET_RH_PORTSTAT(x) \
88 status = inw(port_addr); \ 88 status = uhci_readw(uhci, port_addr); \
89 status |= (x); \ 89 status |= (x); \
90 status &= ~(RWC_BITS|WZ_BITS); \ 90 status &= ~(RWC_BITS|WZ_BITS); \
91 outw(status, port_addr) 91 uhci_writew(uhci, status, port_addr)
92 92
93/* UHCI controllers don't automatically stop resume signalling after 20 msec, 93/* UHCI controllers don't automatically stop resume signalling after 20 msec,
94 * so we have to poll and check timeouts in order to take care of it. 94 * so we have to poll and check timeouts in order to take care of it.
@@ -99,7 +99,7 @@ static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
99 int status; 99 int status;
100 int i; 100 int i;
101 101
102 if (inw(port_addr) & SUSPEND_BITS) { 102 if (uhci_readw(uhci, port_addr) & SUSPEND_BITS) {
103 CLR_RH_PORTSTAT(SUSPEND_BITS); 103 CLR_RH_PORTSTAT(SUSPEND_BITS);
104 if (test_bit(port, &uhci->resuming_ports)) 104 if (test_bit(port, &uhci->resuming_ports))
105 set_bit(port, &uhci->port_c_suspend); 105 set_bit(port, &uhci->port_c_suspend);
@@ -110,7 +110,7 @@ static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
110 * Experiments show that some controllers take longer, so 110 * Experiments show that some controllers take longer, so
111 * we'll poll for completion. */ 111 * we'll poll for completion. */
112 for (i = 0; i < 10; ++i) { 112 for (i = 0; i < 10; ++i) {
113 if (!(inw(port_addr) & SUSPEND_BITS)) 113 if (!(uhci_readw(uhci, port_addr) & SUSPEND_BITS))
114 break; 114 break;
115 udelay(1); 115 udelay(1);
116 } 116 }
@@ -121,12 +121,12 @@ static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
121/* Wait for the UHCI controller in HP's iLO2 server management chip. 121/* Wait for the UHCI controller in HP's iLO2 server management chip.
122 * It can take up to 250 us to finish a reset and set the CSC bit. 122 * It can take up to 250 us to finish a reset and set the CSC bit.
123 */ 123 */
124static void wait_for_HP(unsigned long port_addr) 124static void wait_for_HP(struct uhci_hcd *uhci, unsigned long port_addr)
125{ 125{
126 int i; 126 int i;
127 127
128 for (i = 10; i < 250; i += 10) { 128 for (i = 10; i < 250; i += 10) {
129 if (inw(port_addr) & USBPORTSC_CSC) 129 if (uhci_readw(uhci, port_addr) & USBPORTSC_CSC)
130 return; 130 return;
131 udelay(10); 131 udelay(10);
132 } 132 }
@@ -140,8 +140,8 @@ static void uhci_check_ports(struct uhci_hcd *uhci)
140 int status; 140 int status;
141 141
142 for (port = 0; port < uhci->rh_numports; ++port) { 142 for (port = 0; port < uhci->rh_numports; ++port) {
143 port_addr = uhci->io_addr + USBPORTSC1 + 2 * port; 143 port_addr = USBPORTSC1 + 2 * port;
144 status = inw(port_addr); 144 status = uhci_readw(uhci, port_addr);
145 if (unlikely(status & USBPORTSC_PR)) { 145 if (unlikely(status & USBPORTSC_PR)) {
146 if (time_after_eq(jiffies, uhci->ports_timeout)) { 146 if (time_after_eq(jiffies, uhci->ports_timeout)) {
147 CLR_RH_PORTSTAT(USBPORTSC_PR); 147 CLR_RH_PORTSTAT(USBPORTSC_PR);
@@ -150,7 +150,7 @@ static void uhci_check_ports(struct uhci_hcd *uhci)
150 /* HP's server management chip requires 150 /* HP's server management chip requires
151 * a longer delay. */ 151 * a longer delay. */
152 if (uhci->wait_for_hp) 152 if (uhci->wait_for_hp)
153 wait_for_HP(port_addr); 153 wait_for_HP(uhci, port_addr);
154 154
155 /* If the port was enabled before, turning 155 /* If the port was enabled before, turning
156 * reset on caused a port enable change. 156 * reset on caused a port enable change.
@@ -241,7 +241,7 @@ static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
241 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 241 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
242 int status, lstatus, retval = 0, len = 0; 242 int status, lstatus, retval = 0, len = 0;
243 unsigned int port = wIndex - 1; 243 unsigned int port = wIndex - 1;
244 unsigned long port_addr = uhci->io_addr + USBPORTSC1 + 2 * port; 244 unsigned long port_addr = USBPORTSC1 + 2 * port;
245 u16 wPortChange, wPortStatus; 245 u16 wPortChange, wPortStatus;
246 unsigned long flags; 246 unsigned long flags;
247 247
@@ -259,7 +259,7 @@ static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
259 goto err; 259 goto err;
260 260
261 uhci_check_ports(uhci); 261 uhci_check_ports(uhci);
262 status = inw(port_addr); 262 status = uhci_readw(uhci, port_addr);
263 263
264 /* Intel controllers report the OverCurrent bit active on. 264 /* Intel controllers report the OverCurrent bit active on.
265 * VIA controllers report it active off, so we'll adjust the 265 * VIA controllers report it active off, so we'll adjust the
@@ -356,7 +356,7 @@ static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
356 CLR_RH_PORTSTAT(USBPORTSC_PEC); 356 CLR_RH_PORTSTAT(USBPORTSC_PEC);
357 OK(0); 357 OK(0);
358 case USB_PORT_FEAT_SUSPEND: 358 case USB_PORT_FEAT_SUSPEND:
359 if (!(inw(port_addr) & USBPORTSC_SUSP)) { 359 if (!(uhci_readw(uhci, port_addr) & USBPORTSC_SUSP)) {
360 360
361 /* Make certain the port isn't suspended */ 361 /* Make certain the port isn't suspended */
362 uhci_finish_suspend(uhci, port, port_addr); 362 uhci_finish_suspend(uhci, port, port_addr);
@@ -368,7 +368,8 @@ static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
368 * if the port is disabled. When this happens 368 * if the port is disabled. When this happens
369 * just skip the Resume signalling. 369 * just skip the Resume signalling.
370 */ 370 */
371 if (!(inw(port_addr) & USBPORTSC_RD)) 371 if (!(uhci_readw(uhci, port_addr) &
372 USBPORTSC_RD))
372 uhci_finish_suspend(uhci, port, 373 uhci_finish_suspend(uhci, port,
373 port_addr); 374 port_addr);
374 else 375 else