diff options
author | Huang Rui <ray.huang@amd.com> | 2014-10-28 07:54:28 -0400 |
---|---|---|
committer | Felipe Balbi <balbi@ti.com> | 2014-11-03 11:03:36 -0500 |
commit | b5a65c406367e3e79ece6f687c83d4ffce4c174c (patch) | |
tree | f8e0b8062965db9a6d1d5761ae9890c68c307e35 /drivers/usb/dwc3/core.c | |
parent | 9a5b2f3167c1f98b879d6a800ab138f04e34f9d5 (diff) |
usb: dwc3: add P3 in U2 SS inactive quirk
This patch adds P3 in U2 SS inactive quirk, and some special platforms can
configure that if it is needed.
[ balbi@ti.com : added DeviceTree binding documentation ]
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/dwc3/core.c')
-rw-r--r-- | drivers/usb/dwc3/core.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 33cbea5c6dda..7c54da187062 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c | |||
@@ -365,6 +365,24 @@ static void dwc3_cache_hwparams(struct dwc3 *dwc) | |||
365 | } | 365 | } |
366 | 366 | ||
367 | /** | 367 | /** |
368 | * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core | ||
369 | * @dwc: Pointer to our controller context structure | ||
370 | */ | ||
371 | static void dwc3_phy_setup(struct dwc3 *dwc) | ||
372 | { | ||
373 | u32 reg; | ||
374 | |||
375 | reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); | ||
376 | |||
377 | if (dwc->u2ss_inp3_quirk) | ||
378 | reg |= DWC3_GUSB3PIPECTL_U2SSINP3OK; | ||
379 | |||
380 | dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); | ||
381 | |||
382 | mdelay(100); | ||
383 | } | ||
384 | |||
385 | /** | ||
368 | * dwc3_core_init - Low-level initialization of DWC3 Core | 386 | * dwc3_core_init - Low-level initialization of DWC3 Core |
369 | * @dwc: Pointer to our controller context structure | 387 | * @dwc: Pointer to our controller context structure |
370 | * | 388 | * |
@@ -489,6 +507,8 @@ static int dwc3_core_init(struct dwc3 *dwc) | |||
489 | 507 | ||
490 | dwc3_writel(dwc->regs, DWC3_GCTL, reg); | 508 | dwc3_writel(dwc->regs, DWC3_GCTL, reg); |
491 | 509 | ||
510 | dwc3_phy_setup(dwc); | ||
511 | |||
492 | ret = dwc3_alloc_scratch_buffers(dwc); | 512 | ret = dwc3_alloc_scratch_buffers(dwc); |
493 | if (ret) | 513 | if (ret) |
494 | goto err1; | 514 | goto err1; |
@@ -734,6 +754,8 @@ static int dwc3_probe(struct platform_device *pdev) | |||
734 | "snps,disable_scramble_quirk"); | 754 | "snps,disable_scramble_quirk"); |
735 | dwc->u2exit_lfps_quirk = of_property_read_bool(node, | 755 | dwc->u2exit_lfps_quirk = of_property_read_bool(node, |
736 | "snps,u2exit_lfps_quirk"); | 756 | "snps,u2exit_lfps_quirk"); |
757 | dwc->u2ss_inp3_quirk = of_property_read_bool(node, | ||
758 | "snps,u2ss_inp3_quirk"); | ||
737 | } else if (pdata) { | 759 | } else if (pdata) { |
738 | dwc->maximum_speed = pdata->maximum_speed; | 760 | dwc->maximum_speed = pdata->maximum_speed; |
739 | dwc->has_lpm_erratum = pdata->has_lpm_erratum; | 761 | dwc->has_lpm_erratum = pdata->has_lpm_erratum; |
@@ -745,6 +767,7 @@ static int dwc3_probe(struct platform_device *pdev) | |||
745 | 767 | ||
746 | dwc->disable_scramble_quirk = pdata->disable_scramble_quirk; | 768 | dwc->disable_scramble_quirk = pdata->disable_scramble_quirk; |
747 | dwc->u2exit_lfps_quirk = pdata->u2exit_lfps_quirk; | 769 | dwc->u2exit_lfps_quirk = pdata->u2exit_lfps_quirk; |
770 | dwc->u2ss_inp3_quirk = pdata->u2ss_inp3_quirk; | ||
748 | } | 771 | } |
749 | 772 | ||
750 | /* default to superspeed if no maximum_speed passed */ | 773 | /* default to superspeed if no maximum_speed passed */ |