diff options
author | John Youn <johnyoun@synopsys.com> | 2016-11-03 20:55:53 -0400 |
---|---|---|
committer | Felipe Balbi <felipe.balbi@linux.intel.com> | 2016-11-18 06:54:11 -0500 |
commit | bea8e86c51cf9cf637e5bf0610d14674e9115783 (patch) | |
tree | 12340f7d5354c95e6194f0d737ad41e9f6fc28f1 /drivers/usb/dwc2/hcd_queue.c | |
parent | 323230ef4ef17512007c22898b008e9fb87b372e (diff) |
usb: dwc2: Declare the core params struct statically
This makes it consistent with the hw_params struct and simplifies the
memory management for future refactoring. Fix up usage in all files.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'drivers/usb/dwc2/hcd_queue.c')
-rw-r--r-- | drivers/usb/dwc2/hcd_queue.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/usb/dwc2/hcd_queue.c b/drivers/usb/dwc2/hcd_queue.c index 13754353251f..08293f0281dc 100644 --- a/drivers/usb/dwc2/hcd_queue.c +++ b/drivers/usb/dwc2/hcd_queue.c | |||
@@ -75,7 +75,7 @@ static int dwc2_periodic_channel_available(struct dwc2_hsotg *hsotg) | |||
75 | int status; | 75 | int status; |
76 | int num_channels; | 76 | int num_channels; |
77 | 77 | ||
78 | num_channels = hsotg->core_params->host_channels; | 78 | num_channels = hsotg->params.host_channels; |
79 | if (hsotg->periodic_channels + hsotg->non_periodic_channels < | 79 | if (hsotg->periodic_channels + hsotg->non_periodic_channels < |
80 | num_channels | 80 | num_channels |
81 | && hsotg->periodic_channels < num_channels - 1) { | 81 | && hsotg->periodic_channels < num_channels - 1) { |
@@ -1104,7 +1104,7 @@ static void dwc2_pick_first_frame(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) | |||
1104 | next_active_frame = earliest_frame; | 1104 | next_active_frame = earliest_frame; |
1105 | 1105 | ||
1106 | /* Get the "no microframe schduler" out of the way... */ | 1106 | /* Get the "no microframe schduler" out of the way... */ |
1107 | if (hsotg->core_params->uframe_sched <= 0) { | 1107 | if (hsotg->params.uframe_sched <= 0) { |
1108 | if (qh->do_split) | 1108 | if (qh->do_split) |
1109 | /* Splits are active at microframe 0 minus 1 */ | 1109 | /* Splits are active at microframe 0 minus 1 */ |
1110 | next_active_frame |= 0x7; | 1110 | next_active_frame |= 0x7; |
@@ -1197,7 +1197,7 @@ static int dwc2_do_reserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) | |||
1197 | { | 1197 | { |
1198 | int status; | 1198 | int status; |
1199 | 1199 | ||
1200 | if (hsotg->core_params->uframe_sched > 0) { | 1200 | if (hsotg->params.uframe_sched > 0) { |
1201 | status = dwc2_uframe_schedule(hsotg, qh); | 1201 | status = dwc2_uframe_schedule(hsotg, qh); |
1202 | } else { | 1202 | } else { |
1203 | status = dwc2_periodic_channel_available(hsotg); | 1203 | status = dwc2_periodic_channel_available(hsotg); |
@@ -1218,7 +1218,7 @@ static int dwc2_do_reserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) | |||
1218 | return status; | 1218 | return status; |
1219 | } | 1219 | } |
1220 | 1220 | ||
1221 | if (hsotg->core_params->uframe_sched <= 0) | 1221 | if (hsotg->params.uframe_sched <= 0) |
1222 | /* Reserve periodic channel */ | 1222 | /* Reserve periodic channel */ |
1223 | hsotg->periodic_channels++; | 1223 | hsotg->periodic_channels++; |
1224 | 1224 | ||
@@ -1254,7 +1254,7 @@ static void dwc2_do_unreserve(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) | |||
1254 | /* Update claimed usecs per (micro)frame */ | 1254 | /* Update claimed usecs per (micro)frame */ |
1255 | hsotg->periodic_usecs -= qh->host_us; | 1255 | hsotg->periodic_usecs -= qh->host_us; |
1256 | 1256 | ||
1257 | if (hsotg->core_params->uframe_sched > 0) { | 1257 | if (hsotg->params.uframe_sched > 0) { |
1258 | dwc2_uframe_unschedule(hsotg, qh); | 1258 | dwc2_uframe_unschedule(hsotg, qh); |
1259 | } else { | 1259 | } else { |
1260 | /* Release periodic channel reservation */ | 1260 | /* Release periodic channel reservation */ |
@@ -1328,7 +1328,7 @@ static int dwc2_check_max_xfer_size(struct dwc2_hsotg *hsotg, | |||
1328 | int status = 0; | 1328 | int status = 0; |
1329 | 1329 | ||
1330 | max_xfer_size = dwc2_max_packet(qh->maxp) * dwc2_hb_mult(qh->maxp); | 1330 | max_xfer_size = dwc2_max_packet(qh->maxp) * dwc2_hb_mult(qh->maxp); |
1331 | max_channel_xfer_size = hsotg->core_params->max_transfer_size; | 1331 | max_channel_xfer_size = hsotg->params.max_transfer_size; |
1332 | 1332 | ||
1333 | if (max_xfer_size > max_channel_xfer_size) { | 1333 | if (max_xfer_size > max_channel_xfer_size) { |
1334 | dev_err(hsotg->dev, | 1334 | dev_err(hsotg->dev, |
@@ -1391,7 +1391,7 @@ static int dwc2_schedule_periodic(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) | |||
1391 | 1391 | ||
1392 | qh->unreserve_pending = 0; | 1392 | qh->unreserve_pending = 0; |
1393 | 1393 | ||
1394 | if (hsotg->core_params->dma_desc_enable > 0) | 1394 | if (hsotg->params.dma_desc_enable > 0) |
1395 | /* Don't rely on SOF and start in ready schedule */ | 1395 | /* Don't rely on SOF and start in ready schedule */ |
1396 | list_add_tail(&qh->qh_list_entry, &hsotg->periodic_sched_ready); | 1396 | list_add_tail(&qh->qh_list_entry, &hsotg->periodic_sched_ready); |
1397 | else | 1397 | else |
@@ -1599,7 +1599,7 @@ struct dwc2_qh *dwc2_hcd_qh_create(struct dwc2_hsotg *hsotg, | |||
1599 | 1599 | ||
1600 | dwc2_qh_init(hsotg, qh, urb, mem_flags); | 1600 | dwc2_qh_init(hsotg, qh, urb, mem_flags); |
1601 | 1601 | ||
1602 | if (hsotg->core_params->dma_desc_enable > 0 && | 1602 | if (hsotg->params.dma_desc_enable > 0 && |
1603 | dwc2_hcd_qh_init_ddma(hsotg, qh, mem_flags) < 0) { | 1603 | dwc2_hcd_qh_init_ddma(hsotg, qh, mem_flags) < 0) { |
1604 | dwc2_hcd_qh_free(hsotg, qh); | 1604 | dwc2_hcd_qh_free(hsotg, qh); |
1605 | return NULL; | 1605 | return NULL; |
@@ -1711,7 +1711,7 @@ void dwc2_hcd_qh_unlink(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh) | |||
1711 | dwc2_deschedule_periodic(hsotg, qh); | 1711 | dwc2_deschedule_periodic(hsotg, qh); |
1712 | hsotg->periodic_qh_count--; | 1712 | hsotg->periodic_qh_count--; |
1713 | if (!hsotg->periodic_qh_count && | 1713 | if (!hsotg->periodic_qh_count && |
1714 | hsotg->core_params->dma_desc_enable <= 0) { | 1714 | hsotg->params.dma_desc_enable <= 0) { |
1715 | intr_mask = dwc2_readl(hsotg->regs + GINTMSK); | 1715 | intr_mask = dwc2_readl(hsotg->regs + GINTMSK); |
1716 | intr_mask &= ~GINTSTS_SOF; | 1716 | intr_mask &= ~GINTSTS_SOF; |
1717 | dwc2_writel(intr_mask, hsotg->regs + GINTMSK); | 1717 | dwc2_writel(intr_mask, hsotg->regs + GINTMSK); |