diff options
author | Heiko Stuebner <heiko@sntech.de> | 2016-10-14 13:47:24 -0400 |
---|---|---|
committer | Felipe Balbi <felipe.balbi@linux.intel.com> | 2016-10-17 05:30:29 -0400 |
commit | a07ce8d34eb3d9c6cec3aa25f7713e6aafad2260 (patch) | |
tree | 12aa3b2164b6cfaba84cdaa1d31d4e196ed57a75 /drivers/usb/dwc2/core.c | |
parent | d889c23ce4e3159e3d737f55f9d686a030a7ba87 (diff) |
usb: dwc2: Add msleep for host-only
Although a host-only controller should not have any associated delay,
some rockchip SOC platforms will not show the correct host-values of
registers until after a delay.
So add a 50 ms sleep when in host-only mode.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'drivers/usb/dwc2/core.c')
-rw-r--r-- | drivers/usb/dwc2/core.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c index fa9b26b91507..4c0fa0b17353 100644 --- a/drivers/usb/dwc2/core.c +++ b/drivers/usb/dwc2/core.c | |||
@@ -463,9 +463,18 @@ static void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg) | |||
463 | */ | 463 | */ |
464 | void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg) | 464 | void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg) |
465 | { | 465 | { |
466 | bool ret; | ||
467 | |||
466 | switch (hsotg->dr_mode) { | 468 | switch (hsotg->dr_mode) { |
467 | case USB_DR_MODE_HOST: | 469 | case USB_DR_MODE_HOST: |
468 | dwc2_force_mode(hsotg, true); | 470 | ret = dwc2_force_mode(hsotg, true); |
471 | /* | ||
472 | * NOTE: This is required for some rockchip soc based | ||
473 | * platforms on their host-only dwc2. | ||
474 | */ | ||
475 | if (!ret) | ||
476 | msleep(50); | ||
477 | |||
469 | break; | 478 | break; |
470 | case USB_DR_MODE_PERIPHERAL: | 479 | case USB_DR_MODE_PERIPHERAL: |
471 | dwc2_force_mode(hsotg, false); | 480 | dwc2_force_mode(hsotg, false); |